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Feature request: VHDL/verilog export from command line
#1372
opened Dec 25, 2024 by
GenericNerdyUsername
Not al connected outputs have the same bit count. How do you fix this?
#1356
opened Oct 31, 2024 by
WikipediasTop100
Pasting a Text object with "Snap To Grid" disabled doesn't immediately copy the behavior.
#1350
opened Oct 23, 2024 by
nitrodynamite18
Open file dialog can't navigate; can only be opened once without re-opening application
#1345
opened Oct 11, 2024 by
UnrelatedString
Error "More than one output is active on a wire causing a short circuit"
#1305
opened Jul 23, 2024 by
neineineinein
74ls161 error "No output connected to a wire ([1; Splitter]) the state of the wire is undefined"
#1304
opened Jul 22, 2024 by
neineineinein
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