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28 Open 35 Closed
28 Open 35 Closed
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Issues list

error while running "make run.kc705g2"
#190 opened Aug 25, 2022 by manish-pp
9
DataBusWidth=256 support
#186 opened Nov 10, 2021 by RadhikaG
8
PCIe drivers fail to compile on Ubuntu 16.04
#184 opened Jul 15, 2021 by CyanoKobalamyne
3
AWS build script should check for credentials before starting the build
#176 opened Nov 13, 2020 by jameyhicks
write documentation for bsvdepend.py
#163 opened Apr 22, 2020 by jameyhicks
Documentation embedded diagrams
#162 opened Apr 2, 2020 by KoviRobi
3
Adding Connectal Support to DE5 Net Board
#156 opened Jan 27, 2020 by NP95
4
Parser for includes.
#132 opened Dec 2, 2016 by threonorm
6
DDR3 Test doesn't do anything
#127 opened Aug 29, 2016 by tudang
@jameyhicks
37
Issue with portalCacheFlush in memcpy example?
#120 opened Jun 6, 2016 by psrawke
9
Issues with defined macros in bsvpreprocessor.py
#115 opened May 9, 2016 by acw1251
3
build error on x86, file dmaSendFd.h, line 85
#106 opened Jan 17, 2016 by chenm001
8
drop support for xilinx pcie gen1
#98 opened Dec 4, 2015 by jameyhicks
3 tasks
warning: overriding commands for target `verilog/mkPcieEndpointX7.v'
#96 opened Dec 4, 2015 by jameyhicks
connectal/doc/library/source/design/portal.rst
#60 opened Feb 22, 2015 by hanw
Support 256-bit DataBusWidth in PCIe enhancement
#58 opened Feb 19, 2015 by hanw
4 of 5 tasks
@jameyhicks
2
generate xilinx pin constraints from .pkg file enhancement
#55 opened Feb 13, 2015 by jameyhicks
5
support ac701 enhancement
#52 opened Feb 13, 2015 by jankcorn
3 of 6 tasks
support routing portal packets to connected fpga devices
#51 opened Feb 13, 2015 by jankcorn
1
support generic tracing facility for debug
#50 opened Feb 13, 2015 by jankcorn
support sockit
#49 opened Feb 13, 2015 by jankcorn
portals over aurora
#46 opened Feb 13, 2015 by jankcorn
portals over jtag
#45 opened Feb 13, 2015 by jankcorn
update AXI trace dump
#44 opened Feb 13, 2015 by jankcorn
fpga config readback/decode
#43 opened Feb 13, 2015 by jankcorn
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