[BearlyML'24, DSP'24] PLL Drivers

[AdamAngle]

Haven't gotten around to making hal driver yet, but this at least can get others up and running with PLL fairly quickly. Working on getting the RCC overall driver over before merge.

Example usage:

CLOCK_SELECTOR->SEL = 0; // Switch away from previous run's PLL
PLL->PLLEN = 0; // Disable PLL
PLL->MDIV_RATIO = 1;
PLL->RATIO = 10;  // 500MHz (50MHz * 10)
PLL->FRACTION = 0;
PLL->ZDIV0_RATIO = 1;
PLL->ZDIV1_RATIO = 1;
PLL->LDO_ENABLE = 1;
PLL->PLLEN = 1; // Enable PLL with new settings
PLL->POWERGOOD_VNN = 1; // Specify power is, indeed, good
PLL->PLLFWEN_B = 1;
CLOCK_SELECTOR->SEL = 1; // Switch main clock mux to PLL