Disable FPU model optimizations (temporarily)

ucb-bar · Dec 21, 2024 · 2507ac9 · 2507ac9
1 parent dd2ce08
commit 2507ac9
Showing 1 changed file with 2 additions and 1 deletion.
diff --git a/generators/firechip/chip/src/main/scala/FireSim.scala b/generators/firechip/chip/src/main/scala/FireSim.scala
@@ -125,7 +125,8 @@ class FireSim(implicit val p: Parameters) extends RawModule with HasHarnessInsta
         if (p(FireSimMultiCycleRegFile)) ls.totalTiles.values.map {
           case r: RocketTile => {
             annotate(MemModelAnnotation(r.module.core.rocketImpl.rf.rf))
-            r.module.fpuOpt.foreach(fpu => annotate(MemModelAnnotation(fpu.fpuImpl.regfile)))
+            // TODO: currently, fpu mem. model optimizations are broken with model multi-threading so disable for now
+            //r.module.fpuOpt.foreach(fpu => annotate(MemModelAnnotation(fpu.fpuImpl.regfile)))
           }
           case b: BoomTile => {
             val core = b.module.core