fix CI.

modules/ruxhal/src/platform/aarch64_common/gic.rs

@@ -19,9 +19,21 @@ pub const MAX_IRQ_COUNT: usize = 1024;
 /// The timer IRQ number.
 pub const TIMER_IRQ_NUM: usize = translate_irq(14, InterruptType::PPI).unwrap();
 
+#[cfg(not(feature = "virtio_console"))]
 /// The UART IRQ number.
 pub const UART_IRQ_NUM: usize = translate_irq(ruxconfig::UART_IRQ, InterruptType::SPI).unwrap();
 
+#[cfg(feature = "virtio_console")]
+/// The Virtio-console base address
+pub const VIRTIO_CONSOLE_BASE: usize = ruxconfig::VIRTIO_CONSOLE_PADDR;
+#[cfg(feature = "virtio_console")]
+/// The Virtio-console register address
+pub const VIRTIO_CONSOLE_REG: usize = 0x200;
+#[cfg(feature = "virtio_console")]
+/// The Virtio-console IRQ number
+pub const VIRTIO_CONSOLE_IRQ_NUM: usize =
+    translate_irq(ruxconfig::VIRTIO_CONSOLE_IRQ, InterruptType::SPI).unwrap();
+
 const GICD_BASE: PhysAddr = PhysAddr::from(ruxconfig::GICD_PADDR);
 const GICC_BASE: PhysAddr = PhysAddr::from(ruxconfig::GICC_PADDR);
 

modules/ruxhal/src/platform/dummy/mod.rs

@@ -82,6 +82,15 @@ pub mod irq {
     /// The timer IRQ number.
     pub const TIMER_IRQ_NUM: usize = 0;
 
+    /// The Virtio-console base address
+    pub const VIRTIO_CONSOLE_BASE: usize = 0;
+
+    /// The Virtio-console register address
+    pub const VIRTIO_CONSOLE_REG: usize = 0x200;
+
+    /// The Virtio-console IRQ number
+    pub const VIRTIO_CONSOLE_IRQ_NUM: usize = 0;
+
     /// Enables or disables the given IRQ.
     pub fn set_enable(irq_num: usize, enabled: bool) {}
 

modules/ruxhal/src/virtio/virtio_console.rs

@@ -14,12 +14,9 @@ use driver_console::ConsoleDriverOps;
 use driver_virtio::VirtIoConsoleDev;
 use spinlock::SpinNoIrq;
 
-/// The UART base address
-const UART_BASE: usize = ruxconfig::VIRTIO_CONSOLE_PADDR;
-/// The UART register address
-const UART_REG: usize = 0x200;
-/// The UART IRQ number
-const VIRTIO_CONSOLE_IRQ_NUM: usize = ruxconfig::VIRTIO_CONSOLE_IRQ + 32;
+use crate::platform::irq::{VIRTIO_CONSOLE_BASE, VIRTIO_CONSOLE_IRQ_NUM, VIRTIO_CONSOLE_REG};
+/// Store buffer size
+const MEM_SIZE: usize = 4096;
 
 #[cfg(feature = "irq")]
 const BUFFER_SIZE: usize = 128;
@@ -72,7 +69,7 @@ impl RxRingBuffer {
 /// The UART driver
 struct UartDrv {
     inner: Option<SpinNoIrq<VirtIoConsoleDev<VirtIoHalImpl, VirtIoTransport>>>,
-    buffer: [u8; 20000],
+    buffer: [u8; MEM_SIZE],
     #[cfg(feature = "irq")]
     irq_buffer: SpinNoIrq<RxRingBuffer>,
     pointer: usize,
@@ -82,7 +79,7 @@ struct UartDrv {
 /// The UART driver instance
 static mut UART: UartDrv = UartDrv {
     inner: None,
-    buffer: [0; 20000],
+    buffer: [0; MEM_SIZE],
     #[cfg(feature = "irq")]
     irq_buffer: SpinNoIrq::new(RxRingBuffer::new()),
     pointer: 0,
@@ -134,10 +131,10 @@ pub fn getchar() -> Option<u8> {
 /// probe virtio console directly
 pub fn directional_probing() {
     info!("Initiating VirtIO Console ...");
-    if let Some(dev) = probe_mmio(UART_BASE, UART_REG) {
+    if let Some(dev) = probe_mmio(VIRTIO_CONSOLE_BASE, VIRTIO_CONSOLE_REG) {
         unsafe {
             UART.inner = Some(SpinNoIrq::new(dev));
-            UART.addr = UART_BASE;
+            UART.addr = VIRTIO_CONSOLE_BASE;
         }
     }
     info!("Output now redirected to VirtIO Console!");