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rcc: Add core clocks definitions
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astapleton committed Jun 7, 2024
1 parent c8c37d9 commit 0e4e7df
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1 change: 1 addition & 0 deletions src/rcc.rs
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mod core_clocks;
mod reset_reason;
146 changes: 146 additions & 0 deletions src/rcc/core_clocks.rs
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//! Structure to represent frozen core clock frequencies
use crate::time::Hertz;

/// Frozen core clock frequencies
///
/// The existence of this value indicates that the core clock
/// configuration can no longer be changed
#[derive(Clone, Copy)]
pub struct CoreClocks {
pub(super) hclk: Hertz,
pub(super) pclk1: Hertz,
pub(super) pclk2: Hertz,
pub(super) pclk3: Hertz,
pub(super) ppre1: u8,
pub(super) ppre2: u8,
pub(super) ppre3: u8,
pub(super) csi_ck: Option<Hertz>,
pub(super) hsi_ck: Option<Hertz>,
pub(super) hsi48_ck: Option<Hertz>,
pub(super) lsi_ck: Option<Hertz>,
pub(super) per_ck: Option<Hertz>,
pub(super) hse_ck: Option<Hertz>,
pub(super) lse_ck: Option<Hertz>,
pub(super) audio_ck: Option<Hertz>,
pub(super) mco1_ck: Option<Hertz>,
pub(super) mco2_ck: Option<Hertz>,
pub(super) pll1_p_ck: Option<Hertz>,
pub(super) pll1_q_ck: Option<Hertz>,
pub(super) pll1_r_ck: Option<Hertz>,
pub(super) pll2_p_ck: Option<Hertz>,
pub(super) pll2_q_ck: Option<Hertz>,
pub(super) pll2_r_ck: Option<Hertz>,
pub(super) timx_ker_ck: Hertz,
pub(super) timy_ker_ck: Hertz,
pub(super) sys_ck: Hertz,
}

/// Getters for pclk and ppre
macro_rules! pclk_ppre_getter {
($(($pclk:ident, $ppre:ident),)+) => {
$(
/// Returns the frequency of the APBn
pub fn $pclk(&self) -> Hertz {
self.$pclk
}
/// Returns the prescaler of the APBn
pub fn $ppre(&self) -> u8 {
self.$ppre
}
)+
};
}

/// Getters for optional clocks
macro_rules! optional_ck_getter {
($($opt_ck:ident: $doc:expr,)+) => {
$(
/// Returns `Some(frequency)` if
#[doc=$doc]
/// is running, otherwise `None`
pub fn $opt_ck(&self) -> Option<Hertz> {
self.$opt_ck
}
)+
};
}

/// Getters for pll clocks
macro_rules! pll_getter {
($($pll_ck:ident,)+) => {
$(
/// Returns `Some(frequency)` if the PLLx output is running,
/// otherwise `None`
pub fn $pll_ck(&self) -> Option<Hertz> {
self.$pll_ck
}
)+
};
}

#[allow(dead_code)]
impl CoreClocks {
/// Returns the frequency of AHB1,2,3 busses
pub fn hclk(&self) -> Hertz {
self.hclk
}

pclk_ppre_getter! {
(pclk1, ppre1),
(pclk2, ppre2),
(pclk3, ppre3),
}

optional_ck_getter! {
csi_ck: "csi_ck",
hsi_ck: "hsi_ck",
hsi48_ck: "hsi48_ck",
per_ck: "per_ck",
hse_ck: "hse_ck",
lse_ck: "lse_ck",
lsi_ck: "lsi_ck",
audio_ck: "audio_ck",
}

/// Returns `Some(frequency)` if the MCO1 output is running, otherwise
/// `None`
pub fn mco1_ck(&self) -> Option<Hertz> {
self.mco1_ck
}

/// Returns `Some(frequency)` if the MCO2 output is running, otherwise
/// `None`
pub fn mco2_ck(&self) -> Option<Hertz> {
self.mco2_ck
}

pll_getter! {
pll1_p_ck,
pll1_q_ck,
pll1_r_ck,
pll2_p_ck,
pll2_q_ck,
pll2_r_ck,
}

/// Returns the input frequency to the SCGU
pub fn sys_ck(&self) -> Hertz {
self.sys_ck
}

/// Returns the input frequency to the SCGU - ALIAS
pub fn sysclk(&self) -> Hertz {
self.sys_ck
}

/// Returns the CK_INT frequency for timers on APB1
pub fn timx_ker_ck(&self) -> Hertz {
self.timx_ker_ck
}

/// Returns the CK_INT frequency for timers on APB2
pub fn timy_ker_ck(&self) -> Hertz {
self.timy_ker_ck
}
}

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