rcc: Correct apb1_freq and apb2_freq calculations. #137
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These frequencies are divided from AHB_FREQ not SYS_FREQ.
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Wow, nice find! Thank you :) |
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From what I can tell, the affected peripherals are:
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@usbalbin Thanks for the quick review and merge! FDCAN is affected as well (that's how I ran into it.) FDCAN can select its clock from multiple sources, but currently the HAL sets it to PCLK1. |
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As per the Reference Manual Clock Tree (figure 17), these frequencies are divided from
ahb_freq(HCLK) notsys_clk(SYSCLK).Thanks for all your work maintaining this crate!