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Update to stm32g0 0.15.1 #130

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Update to stm32g0 0.15.1 #130

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d168689
update stm32g0 dependency and add new chip variant features
dimpolo Oct 13, 2021
168127d
Fix g070
stillinbeta Dec 2, 2022
89e1b71
fix g071 and g081
stillinbeta Dec 4, 2022
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9 changes: 8 additions & 1 deletion .github/workflows/ci.yml
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Expand Up @@ -12,11 +12,18 @@ jobs:
- stable
feature:
- stm32g030
- stm32g050
- stm32g070
- stm32g0b0
- stm32g031
- stm32g041
- stm32g070
- stm32g051
- stm32g061
- stm32g071
- stm32g081
- stm32g0b1
- stm32g0c1

steps:
- uses: actions/checkout@v2
- uses: actions-rs/toolchain@v1
Expand Down
9 changes: 8 additions & 1 deletion Cargo.toml
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Expand Up @@ -21,7 +21,8 @@ nb = "1.0.0"
fugit = "0.3.5"

[dependencies.stm32g0]
version = "0.14.0"
version = "0.15.1"
# git = "https://github.com/stm32-rs/stm32-rs-nightlies"
features = ["rt"]

[dependencies.bare-metal]
Expand Down Expand Up @@ -53,11 +54,17 @@ default = ["i2c-blocking"]
device-selected = []
rt = ["stm32g0/rt"]
stm32g030 = ["stm32g0/stm32g030", "stm32g0x0", "device-selected"]
stm32g050 = ["stm32g0/stm32g050", "stm32g0x0", "device-selected"]
stm32g070 = ["stm32g0/stm32g070", "stm32g0x0", "device-selected"]
stm32g0b0 = ["stm32g0/stm32g0b0", "stm32g0x0", "device-selected"]
stm32g031 = ["stm32g0/stm32g031", "stm32g0x1", "device-selected"]
stm32g041 = ["stm32g0/stm32g041", "stm32g0x1", "device-selected"]
stm32g051 = ["stm32g0/stm32g051", "stm32g0x1", "device-selected"]
stm32g061 = ["stm32g0/stm32g061", "stm32g0x1" ,"device-selected"]
stm32g071 = ["stm32g0/stm32g071", "stm32g0x1", "device-selected"]
stm32g081 = ["stm32g0/stm32g081", "stm32g0x1", "device-selected"]
stm32g0b1 = ["stm32g0/stm32g0b1", "stm32g0x1", "device-selected"]
stm32g0c1 = ["stm32g0/stm32g0c1", "stm32g0x1", "device-selected"]

stm32g0x0 = []
stm32g0x1 = []
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4 changes: 2 additions & 2 deletions src/analog/adc.rs
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Expand Up @@ -362,7 +362,7 @@ where
.modify(|_, w| unsafe { w.smp1().bits(self.sample_time as u8) });

self.rb
.chselr() // set activ channel acording chapter 15.12.9 (ADC_CFGR1; CHSELRMOD=0)
.chselr0() // set active channel according chapter 15.12.9 (ADC_CFGR1; CHSELRMOD=0)
.modify(|_, w| unsafe { w.chsel().bits(1 << PIN::channel()) });
}
}
Expand Down Expand Up @@ -415,7 +415,7 @@ where
.modify(|_, w| unsafe { w.smp1().bits(self.sample_time as u8) });

self.rb
.chselr()
.chselr0()
.modify(|_, w| unsafe { w.chsel().bits(1 << PIN::channel()) });

self.rb.isr.modify(|_, w| w.eos().set_bit());
Expand Down
40 changes: 20 additions & 20 deletions src/analog/dac.rs
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Expand Up @@ -94,7 +94,7 @@ macro_rules! dac {
$trim:ident,
$mode:ident,
$dhrx:ident,
$dac_dor:ident,
$dor:ident,
$daccxdhr:ident,
$wave:ident,
$mamp:ident,
Expand All @@ -106,8 +106,8 @@ macro_rules! dac {
pub fn enable(self) -> $CX<Enabled> {
let dac = unsafe { &(*DAC::ptr()) };

dac.dac_mcr.modify(|_, w| unsafe { w.$mode().bits(1) });
dac.dac_cr.modify(|_, w| w.$en().set_bit());
dac.mcr.modify(|_, w| unsafe { w.$mode().bits(1) });
dac.cr.modify(|_, w| w.$en().set_bit());

$CX {
_enabled: PhantomData,
Expand All @@ -117,8 +117,8 @@ macro_rules! dac {
pub fn enable_unbuffered(self) -> $CX<EnabledUnbuffered> {
let dac = unsafe { &(*DAC::ptr()) };

dac.dac_mcr.modify(|_, w| unsafe { w.$mode().bits(2) });
dac.dac_cr.modify(|_, w| w.$en().set_bit());
dac.mcr.modify(|_, w| unsafe { w.$mode().bits(2) });
dac.cr.modify(|_, w| w.$en().set_bit());

$CX {
_enabled: PhantomData,
Expand All @@ -128,8 +128,8 @@ macro_rules! dac {
pub fn enable_generator(self, config: GeneratorConfig) -> $CX<WaveGenerator> {
let dac = unsafe { &(*DAC::ptr()) };

dac.dac_mcr.modify(|_, w| unsafe { w.$mode().bits(1) });
dac.dac_cr.modify(|_, w| unsafe {
dac.mcr.modify(|_, w| unsafe { w.$mode().bits(1) });
dac.cr.modify(|_, w| unsafe {
w.$wave().bits(config.mode);
w.$ten().set_bit();
w.$mamp().bits(config.amp);
Expand Down Expand Up @@ -159,19 +159,19 @@ macro_rules! dac {
T: DelayUs<u32>,
{
let dac = unsafe { &(*DAC::ptr()) };
dac.dac_cr.modify(|_, w| w.$en().clear_bit());
dac.dac_mcr.modify(|_, w| unsafe { w.$mode().bits(0) });
dac.dac_cr.modify(|_, w| w.$cen().set_bit());
dac.cr.modify(|_, w| w.$en().clear_bit());
dac.mcr.modify(|_, w| unsafe { w.$mode().bits(0) });
dac.cr.modify(|_, w| w.$cen().set_bit());
let mut trim = 0;
while true {
dac.dac_ccr.modify(|_, w| unsafe { w.$trim().bits(trim) });
dac.ccr.modify(|_, w| unsafe { w.$trim().bits(trim) });
delay.delay_us(64_u32);
if dac.dac_sr.read().$cal_flag().bit() {
if dac.sr.read().$cal_flag().bit() {
break;
}
trim += 1;
}
dac.dac_cr.modify(|_, w| w.$cen().clear_bit());
dac.cr.modify(|_, w| w.$cen().clear_bit());

$CX {
_enabled: PhantomData,
Expand All @@ -181,7 +181,7 @@ macro_rules! dac {
/// Disable the DAC channel
pub fn disable(self) -> $CX<Disabled> {
let dac = unsafe { &(*DAC::ptr()) };
dac.dac_cr.modify(|_, w| unsafe {
dac.cr.modify(|_, w| unsafe {
w.$en().clear_bit().$wave().bits(0).$ten().clear_bit()
});

Expand All @@ -201,15 +201,15 @@ macro_rules! dac {

fn get_value(&mut self) -> u16 {
let dac = unsafe { &(*DAC::ptr()) };
dac.$dac_dor.read().bits() as u16
dac.$dor.read().bits() as u16
}
}

/// Wave generator state implementation
impl $CX<WaveGenerator> {
pub fn trigger(&mut self) {
let dac = unsafe { &(*DAC::ptr()) };
dac.dac_swtrgr.write(|w| { w.$swtrig().set_bit() });
dac.swtrgr.write(|w| { w.$swtrig().set_bit() });
}
}
)+
Expand Down Expand Up @@ -239,8 +239,8 @@ dac!(
cal_flag1,
otrim1,
mode1,
dac_dhr12r1,
dac_dor1,
dhr12r1,
dor1,
dacc1dhr,
wave1,
mamp1,
Expand All @@ -254,8 +254,8 @@ dac!(
cal_flag2,
otrim2,
mode2,
dac_dhr12r2,
dac_dor2,
dhr12r2,
dor2,
dacc2dhr,
wave2,
mamp2,
Expand Down
14 changes: 7 additions & 7 deletions src/dmamux.rs
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Expand Up @@ -185,13 +185,13 @@ macro_rules! dma_mux {
#[cfg(any(feature = "stm32g070", feature = "stm32g071", feature = "stm32g081"))]
dma_mux!(
channels: {
C0: (ch0, dmamux_c0cr),
C1: (ch1, dmamux_c1cr),
C2: (ch2, dmamux_c2cr),
C3: (ch3, dmamux_c3cr),
C4: (ch4, dmamux_c4cr),
C5: (ch5, dmamux_c5cr),
C6: (ch6, dmamux_c6cr),
C0: (ch0, c0cr),
C1: (ch1, c1cr),
C2: (ch2, c2cr),
C3: (ch3, c3cr),
C4: (ch4, c4cr),
C5: (ch5, c5cr),
C6: (ch6, c6cr),
},
);

Expand Down
8 changes: 7 additions & 1 deletion src/i2c/blocking.rs
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Expand Up @@ -186,8 +186,14 @@ macro_rules! i2c {
});

if config.slave_address_1 > 0 {
let addr = if config.address_11bits {
config.slave_address_1
} else {
config.slave_address_1 << 1
};

i2c.oar1.write(|w| unsafe {
w.oa1_7_1().bits(config.slave_address_1 as u8)
w.oa1().bits(addr)
.oa1mode().bit(config.address_11bits)
.oa1en().set_bit()
});
Expand Down
24 changes: 21 additions & 3 deletions src/lib.rs
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Expand Up @@ -3,7 +3,7 @@

#[cfg(not(feature = "device-selected"))]
compile_error!(
"This crate requires one of the following features enabled: stm32g030, stm32g070, stm32g031, stm32g041, stm32g071, stm32g081"
"This crate requires one of the following features enabled: stm32g030, stm32g050, stm32g070, stm32g0b0, stm32g031, stm32g041, stm32g051, stm32g061, stm32g071, stm32g081, stm32g0b1, stm32g0c1"
);

extern crate bare_metal;
Expand All @@ -22,20 +22,38 @@ pub use stm32 as pac;
#[cfg(feature = "stm32g030")]
pub use stm32g0::stm32g030 as stm32;

#[cfg(feature = "stm32g050")]
pub use stm32g0::stm32g050 as stm32;

#[cfg(feature = "stm32g070")]
pub use stm32g0::stm32g070 as stm32;

#[cfg(feature = "stm32g0b0")]
pub use stm32g0::stm32g0b0 as stm32;

#[cfg(feature = "stm32g031")]
pub use stm32g0::stm32g031 as stm32;

#[cfg(feature = "stm32g041")]
pub use stm32g0::stm32g041 as stm32;

#[cfg(feature = "stm32g051")]
pub use stm32g0::stm32g051 as stm32;

#[cfg(feature = "stm32g061")]
pub use stm32g0::stm32g061 as stm32;

#[cfg(feature = "stm32g071")]
pub use stm32g0::stm32g071 as stm32;

#[cfg(feature = "stm32g081")]
pub use stm32g0::stm32g081 as stm32;

#[cfg(feature = "stm32g070")]
pub use stm32g0::stm32g070 as stm32;
#[cfg(feature = "stm32g0b1")]
pub use stm32g0::stm32g0b1 as stm32;

#[cfg(feature = "stm32g0c1")]
pub use stm32g0::stm32g0c1 as stm32;

#[cfg(feature = "rt")]
pub use crate::stm32::interrupt;
Expand Down
2 changes: 1 addition & 1 deletion src/spi.rs
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Expand Up @@ -186,7 +186,7 @@ macro_rules! spi {
.set_bit()
.rxonly()
.clear_bit()
.dff()
.crcl()
.clear_bit()
.bidimode()
.clear_bit()
Expand Down
2 changes: 1 addition & 1 deletion src/timer/pwm.rs
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Expand Up @@ -271,7 +271,7 @@ pwm_advanced_hal! {

#[cfg(any(feature = "stm32g070"))]
pwm_advanced_hal! {
TIM15: (Channel1, cc1e: cc1ne, ccmr1_output, oc1pe, oc1m1, ccr1, moe),
TIM15: (Channel1, cc1e: cc1ne, ccmr1_output, oc1pe, oc1m, ccr1, moe),
}

#[cfg(any(feature = "stm32g071", feature = "stm32g081"))]
Expand Down