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Speedup Tests #128

Merged
merged 2 commits into from
Nov 26, 2024
Merged

Speedup Tests #128

merged 2 commits into from
Nov 26, 2024

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Indanz
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@Indanz Indanz commented Nov 24, 2024

This more than halves the time to run all tests.

@Indanz Indanz added enhancement hw-test set to run sel4test hardware test for this PR and removed hw-test set to run sel4test hardware test for this PR labels Nov 24, 2024
Reduce unnecessary sleeping or long SC periods, without
reducing the quality of the tests.

Optimise test_fault() and test_ipc_pair() by taking init code
out of the inner loop and re-using the created processes.

These changes more than halve the time needed to run all tests.

Signed-off-by: Indan Zupancic <[email protected]>
Pass meaningful values as argument so the check adds value.

Signed-off-by: Indan Zupancic <[email protected]>
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Indanz commented Nov 24, 2024

All checks passed, let's try hw tests now.

@Indanz Indanz added the hw-test set to run sel4test hardware test for this PR label Nov 24, 2024
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Indanz commented Nov 25, 2024

Only test failing is MULTICORE0005 on gcc TX2 and I didn't change that one.

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Indanz commented Nov 25, 2024

The main time is spend in CI overhead and board bring up, so running the tests in CI still takes forever. :-(

@kent-mcleod
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The main time is spend in CI overhead and board bring up, so running the tests in CI still takes forever. :-(

In some cases the board bring-up times can usually be optimized because each board is run with a custom run script that usually introduces the delays.

But some boards take a long time from power on to the u-boot prompt. This could also be optimized but someone would need to rebuild the boards boot firmware.

I think the CI overhead is still what dominates though.

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Indanz commented Nov 26, 2024

But some boards take a long time from power on to the u-boot prompt. This could also be optimized but someone would need to rebuild the boards boot firmware.

Switching from tftp boot to USB boot via UUU for NXP based SoCs would probably save a fair bit. Newer SoCs also seem to have built-in board control and can e.g. be power cycled via USB with https://github.com/nxp-imx/bcu.

I think the CI overhead is still what dominates though.

I think there are some suboptimal things going on there. For instance, the last CI had to wait an hour for a lock to become free. The lock was held by the next CI run. That seems fairly bizarre to me. On one hand CI runs release the lock in between all tests, on the other hand it can block a board for an hour?

Thanks for the review!

@Indanz Indanz merged commit d89ce01 into seL4:master Nov 26, 2024
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@Ivan-Velickovic
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Switching from tftp boot to USB boot via UUU for NXP based SoCs would probably save a fair bit. Newer SoCs also seem to have built-in board control and can e.g. be power cycled via USB with https://github.com/nxp-imx/bcu.

I've noticed that the ethernet drivers in U-Boot are generally quite poor so for a lot of boards it can take up to a half a minute or so to just load an image (although for sel4test the images are fairly small so maybe it doesn't matter).

Given that the USB drivers would also be polling-based would it actually be any better?

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Indanz commented Nov 27, 2024

Given that the USB drivers would also be polling-based would it actually be any better?

I don't know, I set the board in serial boot mode and use UUU to upload SPL+Uboot,
then start Uboot in Fastboot mode and run Uboot commands from UUU, including
loading the image and booting it. All that takes 4 seconds from power-on to the first
Elfloader print.

I can share the UUU script I'm using if anyone is interested.

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3 participants