riscv: Add support for riscv64ilp32 (X32 ABI)

[inspireMeNow]

The riscv64ilp32 target, also known as the X32 ABI, allows 64-bit RISC-V processors to run 32-bit user space programs. This provides better performance than the pure 32-bit environment, while maintaining binary compatibility with existing 32-bit programs.

This commit adds support for the riscv64ilp32 target to QEMU. With this change, QEMU can now simulate and execute 32-bit user space programs on 64-bit RISC-V processors following the X32 ABI specification.

Major changes:

• Add new configs for riscv64ilp32 target in configs/devices and configs/targets
• Modify configure script to recognize riscv64ilp32 target
• Update hw/riscv/boot.c to handle kernel load address for riscv64ilp32
• Extend include/elf.h to include EF_RISCV_X32 flag for riscv64ilp32
• Modify linux-user/elfload.c to handle riscv64ilp32 ELF files
• Add RISCV64ILP32 config option in target/riscv/Kconfig
• Update CPU parameter definitions in target/riscv/cpu-param.h for riscv64ilp32
• Extend CPU object initialization in target/riscv/cpu.c for riscv64ilp32
• Handle riscv64ilp32 target in various files under target/riscv/

Testing:

This change has been tested by running the QEMU riscv64ilp32-softmmu and riscv64ilp32-linux-user targets with the following commands:

$ ./qemu-system-riscv64ilp32 -cpu rv64 -M virt -m 256M -nographic
-bios fw_dynamic.bin_m64lp64 -kernel ./Image
-drive file=./rootfs.ext2,format=raw,id=hd0
-device virtio-blk-device,drive=hd0
-append "root=/dev/vda rw console=ttyS0 earlycon=sbi"

$ ./qemu-riscv64ilp32 /path/to/riscv64ilp32-binary

All tests passed successfully.

[github-actions]

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