Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

riscv: Support XUANTIE extended CSR save/restore during task switching #206

Merged
merged 1 commit into from
Dec 24, 2024

Conversation

cp0613
Copy link
Contributor

@cp0613 cp0613 commented Dec 24, 2024

This patch focuses on two XUANTIE extended CSRs:

  • FXCR[31]: Process 16-bit floating point numbers according to the BFloat 16 format.
  • UTNMODE: FP8 output can be ovf or sat mode. Introduced by XUANTIE C908X.

When using, first enable CONFIG_XUANTIE_CSR_EXT, then set the 'riscv,isa' fields of dts to dynamically control whether to save/restore the corresponding CSR. For example, for FXCR, you need to add 'xtheadfxcr', and for UTNMODE, you need to add 'xtheadutnmode'.

This patch focuses on two XUANTIE extended CSRs:
- FXCR[31]: Process 16-bit floating point numbers according to the BFloat
16 format.
- UTNMODE: FP8 output can be ovf or sat mode. Introduced by XUANTIE C908X.

When using, first enable CONFIG_XUANTIE_CSR_EXT, then set the 'riscv,isa'
fields of dts to dynamically control whether to save/restore the
corresponding CSR. For example, for FXCR, you need to add 'xtheadfxcr',
and for UTNMODE, you need to add 'xtheadutnmode'.

Signed-off-by: Chen Pei <[email protected]>
@RevySR RevySR merged commit d9c312f into ruyisdk:linux-6.6.36 Dec 24, 2024
37 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants