Merge pull request #1486 from riscv-software-src/zcmop

Add unratified Zcmop extension
riscv-software-src · Oct 18, 2023 · 67252b3 · 67252b3
2 parents a2e80e1 + 762ed3f
commit 67252b3
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Showing 7 changed files with 182 additions and 5 deletions.
diff --git a/disasm/disasm.cc b/disasm/disasm.cc
@@ -2149,6 +2149,17 @@ void disassembler_t::add_instructions(const isa_parser_t* isa)
     DEFINE_RTYPE(czero_nez);
   }
 
+  if (isa->extension_enabled(EXT_ZCMOP)) {
+      DISASM_INSN("c.mop.1", c_mop_1, 0, {});
+      DISASM_INSN("c.mop.3", c_mop_3, 0, {});
+      DISASM_INSN("c.mop.5", c_mop_5, 0, {});
+      DISASM_INSN("c.mop.7", c_mop_7, 0, {});
+      DISASM_INSN("c.mop.9", c_mop_9, 0, {});
+      DISASM_INSN("c.mop.11", c_mop_11, 0, {});
+      DISASM_INSN("c.mop.13", c_mop_13, 0, {});
+      DISASM_INSN("c.mop.15", c_mop_15, 0, {});
+  }
+
   if (isa->extension_enabled(EXT_ZKND) ||
       isa->extension_enabled(EXT_ZKNE)) {
     DISASM_INSN("aes64ks1i", aes64ks1i, 0, {&xrd, &xrs1, &rcon});
@@ -2302,7 +2313,7 @@ disassembler_t::disassembler_t(const isa_parser_t *isa)
 
   // next-highest priority: other instructions in same base ISA
   std::string fallback_isa_string = std::string("rv") + std::to_string(isa->get_max_xlen()) +
-    "gqchv_zfh_zba_zbb_zbc_zbs_zcb_zicbom_zicboz_zicond_zkn_zkr_zks_svinval";
+    "gqchv_zfh_zba_zbb_zbc_zbs_zcb_zicbom_zicboz_zicond_zkn_zkr_zks_svinval_zcmop";
   isa_parser_t fallback_isa(fallback_isa_string.c_str(), DEFAULT_PRIV);
   add_instructions(&fallback_isa);
 

diff --git a/disasm/isa_parser.cc b/disasm/isa_parser.cc
@@ -292,6 +292,8 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv)
       extension_table[EXT_SSCSRIND] = true;
     } else if (ext_str == "smcntrpmf") {
       extension_table[EXT_SMCNTRPMF] = true;
+    } else if (ext_str == "zcmop") {
+      extension_table[EXT_ZCMOP] = true;
     } else if (ext_str[0] == 'x') {
       extension_table['X'] = true;
       if (ext_str.size() == 1) {

diff --git a/riscv/decode.h b/riscv/decode.h
@@ -1,6 +1,5 @@
 // See LICENSE for license details.
 
-
 #ifndef _RISCV_DECODE_H
 #define _RISCV_DECODE_H
 

diff --git a/riscv/encoding.h b/riscv/encoding.h
@@ -4,7 +4,7 @@
 
 /*
  * This file is auto-generated by running 'make' in
- * https://github.com/riscv/riscv-opcodes (d752f19)
+ * https://github.com/riscv/riscv-opcodes (b9d63ad)
  */
 
 #ifndef RISCV_CSR_ENCODING_H
@@ -592,6 +592,24 @@
 #define MASK_C_LW 0xe003
 #define MATCH_C_LWSP 0x4002
 #define MASK_C_LWSP 0xe003
+#define MATCH_C_MOP_1 0x6081
+#define MASK_C_MOP_1 0xffff
+#define MATCH_C_MOP_11 0x6581
+#define MASK_C_MOP_11 0xffff
+#define MATCH_C_MOP_13 0x6681
+#define MASK_C_MOP_13 0xffff
+#define MATCH_C_MOP_15 0x6781
+#define MASK_C_MOP_15 0xffff
+#define MATCH_C_MOP_3 0x6181
+#define MASK_C_MOP_3 0xffff
+#define MATCH_C_MOP_5 0x6281
+#define MASK_C_MOP_5 0xffff
+#define MATCH_C_MOP_7 0x6381
+#define MASK_C_MOP_7 0xffff
+#define MATCH_C_MOP_9 0x6481
+#define MASK_C_MOP_9 0xffff
+#define MATCH_C_MOP_N 0x6081
+#define MASK_C_MOP_N 0xf8ff
 #define MATCH_C_MUL 0x9c41
 #define MASK_C_MUL 0xfc63
 #define MATCH_C_MV 0x8002
@@ -1402,6 +1420,90 @@
 #define MASK_MINU 0xfe00707f
 #define MATCH_MNRET 0x70200073
 #define MASK_MNRET 0xffffffff
+#define MATCH_MOP_R_0 0x81c04073
+#define MASK_MOP_R_0 0xfff0707f
+#define MATCH_MOP_R_1 0x81d04073
+#define MASK_MOP_R_1 0xfff0707f
+#define MATCH_MOP_R_10 0x89e04073
+#define MASK_MOP_R_10 0xfff0707f
+#define MATCH_MOP_R_11 0x89f04073
+#define MASK_MOP_R_11 0xfff0707f
+#define MATCH_MOP_R_12 0x8dc04073
+#define MASK_MOP_R_12 0xfff0707f
+#define MATCH_MOP_R_13 0x8dd04073
+#define MASK_MOP_R_13 0xfff0707f
+#define MATCH_MOP_R_14 0x8de04073
+#define MASK_MOP_R_14 0xfff0707f
+#define MATCH_MOP_R_15 0x8df04073
+#define MASK_MOP_R_15 0xfff0707f
+#define MATCH_MOP_R_16 0xc1c04073
+#define MASK_MOP_R_16 0xfff0707f
+#define MATCH_MOP_R_17 0xc1d04073
+#define MASK_MOP_R_17 0xfff0707f
+#define MATCH_MOP_R_18 0xc1e04073
+#define MASK_MOP_R_18 0xfff0707f
+#define MATCH_MOP_R_19 0xc1f04073
+#define MASK_MOP_R_19 0xfff0707f
+#define MATCH_MOP_R_2 0x81e04073
+#define MASK_MOP_R_2 0xfff0707f
+#define MATCH_MOP_R_20 0xc5c04073
+#define MASK_MOP_R_20 0xfff0707f
+#define MATCH_MOP_R_21 0xc5d04073
+#define MASK_MOP_R_21 0xfff0707f
+#define MATCH_MOP_R_22 0xc5e04073
+#define MASK_MOP_R_22 0xfff0707f
+#define MATCH_MOP_R_23 0xc5f04073
+#define MASK_MOP_R_23 0xfff0707f
+#define MATCH_MOP_R_24 0xc9c04073
+#define MASK_MOP_R_24 0xfff0707f
+#define MATCH_MOP_R_25 0xc9d04073
+#define MASK_MOP_R_25 0xfff0707f
+#define MATCH_MOP_R_26 0xc9e04073
+#define MASK_MOP_R_26 0xfff0707f
+#define MATCH_MOP_R_27 0xc9f04073
+#define MASK_MOP_R_27 0xfff0707f
+#define MATCH_MOP_R_28 0xcdc04073
+#define MASK_MOP_R_28 0xfff0707f
+#define MATCH_MOP_R_29 0xcdd04073
+#define MASK_MOP_R_29 0xfff0707f
+#define MATCH_MOP_R_3 0x81f04073
+#define MASK_MOP_R_3 0xfff0707f
+#define MATCH_MOP_R_30 0xcde04073
+#define MASK_MOP_R_30 0xfff0707f
+#define MATCH_MOP_R_31 0xcdf04073
+#define MASK_MOP_R_31 0xfff0707f
+#define MATCH_MOP_R_4 0x85c04073
+#define MASK_MOP_R_4 0xfff0707f
+#define MATCH_MOP_R_5 0x85d04073
+#define MASK_MOP_R_5 0xfff0707f
+#define MATCH_MOP_R_6 0x85e04073
+#define MASK_MOP_R_6 0xfff0707f
+#define MATCH_MOP_R_7 0x85f04073
+#define MASK_MOP_R_7 0xfff0707f
+#define MATCH_MOP_R_8 0x89c04073
+#define MASK_MOP_R_8 0xfff0707f
+#define MATCH_MOP_R_9 0x89d04073
+#define MASK_MOP_R_9 0xfff0707f
+#define MATCH_MOP_R_N 0x81c04073
+#define MASK_MOP_R_N 0xb3c0707f
+#define MATCH_MOP_RR_0 0x82004073
+#define MASK_MOP_RR_0 0xfe00707f
+#define MATCH_MOP_RR_1 0x86004073
+#define MASK_MOP_RR_1 0xfe00707f
+#define MATCH_MOP_RR_2 0x8a004073
+#define MASK_MOP_RR_2 0xfe00707f
+#define MATCH_MOP_RR_3 0x8e004073
+#define MASK_MOP_RR_3 0xfe00707f
+#define MATCH_MOP_RR_4 0xc2004073
+#define MASK_MOP_RR_4 0xfe00707f
+#define MATCH_MOP_RR_5 0xc6004073
+#define MASK_MOP_RR_5 0xfe00707f
+#define MATCH_MOP_RR_6 0xca004073
+#define MASK_MOP_RR_6 0xfe00707f
+#define MATCH_MOP_RR_7 0xce004073
+#define MASK_MOP_RR_7 0xfe00707f
+#define MATCH_MOP_RR_N 0x82004073
+#define MASK_MOP_RR_N 0xb200707f
 #define MATCH_MRET 0x30200073
 #define MASK_MRET 0xffffffff
 #define MATCH_MSUBR32 0xc6001077
@@ -3579,6 +3681,12 @@
 #define INSN_FIELD_C_RS2 0x7c
 #define INSN_FIELD_C_SREG1 0x380
 #define INSN_FIELD_C_SREG2 0x1c
+#define INSN_FIELD_MOP_R_T_30 0x40000000
+#define INSN_FIELD_MOP_R_T_27_26 0xc000000
+#define INSN_FIELD_MOP_R_T_21_20 0x300000
+#define INSN_FIELD_MOP_RR_T_30 0x40000000
+#define INSN_FIELD_MOP_RR_T_27_26 0xc000000
+#define INSN_FIELD_C_MOP_T 0x700
 #endif
 #ifdef DECLARE_INSN
 DECLARE_INSN(add, MATCH_ADD, MASK_ADD)
@@ -3686,6 +3794,15 @@ DECLARE_INSN(c_lqsp, MATCH_C_LQSP, MASK_C_LQSP)
 DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
 DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW)
 DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP)
+DECLARE_INSN(c_mop_1, MATCH_C_MOP_1, MASK_C_MOP_1)
+DECLARE_INSN(c_mop_11, MATCH_C_MOP_11, MASK_C_MOP_11)
+DECLARE_INSN(c_mop_13, MATCH_C_MOP_13, MASK_C_MOP_13)
+DECLARE_INSN(c_mop_15, MATCH_C_MOP_15, MASK_C_MOP_15)
+DECLARE_INSN(c_mop_3, MATCH_C_MOP_3, MASK_C_MOP_3)
+DECLARE_INSN(c_mop_5, MATCH_C_MOP_5, MASK_C_MOP_5)
+DECLARE_INSN(c_mop_7, MATCH_C_MOP_7, MASK_C_MOP_7)
+DECLARE_INSN(c_mop_9, MATCH_C_MOP_9, MASK_C_MOP_9)
+DECLARE_INSN(c_mop_N, MATCH_C_MOP_N, MASK_C_MOP_N)
 DECLARE_INSN(c_mul, MATCH_C_MUL, MASK_C_MUL)
 DECLARE_INSN(c_mv, MATCH_C_MV, MASK_C_MV)
 DECLARE_INSN(c_nop, MATCH_C_NOP, MASK_C_NOP)
@@ -4091,6 +4208,48 @@ DECLARE_INSN(maxu, MATCH_MAXU, MASK_MAXU)
 DECLARE_INSN(min, MATCH_MIN, MASK_MIN)
 DECLARE_INSN(minu, MATCH_MINU, MASK_MINU)
 DECLARE_INSN(mnret, MATCH_MNRET, MASK_MNRET)
+DECLARE_INSN(mop_r_0, MATCH_MOP_R_0, MASK_MOP_R_0)
+DECLARE_INSN(mop_r_1, MATCH_MOP_R_1, MASK_MOP_R_1)
+DECLARE_INSN(mop_r_10, MATCH_MOP_R_10, MASK_MOP_R_10)
+DECLARE_INSN(mop_r_11, MATCH_MOP_R_11, MASK_MOP_R_11)
+DECLARE_INSN(mop_r_12, MATCH_MOP_R_12, MASK_MOP_R_12)
+DECLARE_INSN(mop_r_13, MATCH_MOP_R_13, MASK_MOP_R_13)
+DECLARE_INSN(mop_r_14, MATCH_MOP_R_14, MASK_MOP_R_14)
+DECLARE_INSN(mop_r_15, MATCH_MOP_R_15, MASK_MOP_R_15)
+DECLARE_INSN(mop_r_16, MATCH_MOP_R_16, MASK_MOP_R_16)
+DECLARE_INSN(mop_r_17, MATCH_MOP_R_17, MASK_MOP_R_17)
+DECLARE_INSN(mop_r_18, MATCH_MOP_R_18, MASK_MOP_R_18)
+DECLARE_INSN(mop_r_19, MATCH_MOP_R_19, MASK_MOP_R_19)
+DECLARE_INSN(mop_r_2, MATCH_MOP_R_2, MASK_MOP_R_2)
+DECLARE_INSN(mop_r_20, MATCH_MOP_R_20, MASK_MOP_R_20)
+DECLARE_INSN(mop_r_21, MATCH_MOP_R_21, MASK_MOP_R_21)
+DECLARE_INSN(mop_r_22, MATCH_MOP_R_22, MASK_MOP_R_22)
+DECLARE_INSN(mop_r_23, MATCH_MOP_R_23, MASK_MOP_R_23)
+DECLARE_INSN(mop_r_24, MATCH_MOP_R_24, MASK_MOP_R_24)
+DECLARE_INSN(mop_r_25, MATCH_MOP_R_25, MASK_MOP_R_25)
+DECLARE_INSN(mop_r_26, MATCH_MOP_R_26, MASK_MOP_R_26)
+DECLARE_INSN(mop_r_27, MATCH_MOP_R_27, MASK_MOP_R_27)
+DECLARE_INSN(mop_r_28, MATCH_MOP_R_28, MASK_MOP_R_28)
+DECLARE_INSN(mop_r_29, MATCH_MOP_R_29, MASK_MOP_R_29)
+DECLARE_INSN(mop_r_3, MATCH_MOP_R_3, MASK_MOP_R_3)
+DECLARE_INSN(mop_r_30, MATCH_MOP_R_30, MASK_MOP_R_30)
+DECLARE_INSN(mop_r_31, MATCH_MOP_R_31, MASK_MOP_R_31)
+DECLARE_INSN(mop_r_4, MATCH_MOP_R_4, MASK_MOP_R_4)
+DECLARE_INSN(mop_r_5, MATCH_MOP_R_5, MASK_MOP_R_5)
+DECLARE_INSN(mop_r_6, MATCH_MOP_R_6, MASK_MOP_R_6)
+DECLARE_INSN(mop_r_7, MATCH_MOP_R_7, MASK_MOP_R_7)
+DECLARE_INSN(mop_r_8, MATCH_MOP_R_8, MASK_MOP_R_8)
+DECLARE_INSN(mop_r_9, MATCH_MOP_R_9, MASK_MOP_R_9)
+DECLARE_INSN(mop_r_N, MATCH_MOP_R_N, MASK_MOP_R_N)
+DECLARE_INSN(mop_rr_0, MATCH_MOP_RR_0, MASK_MOP_RR_0)
+DECLARE_INSN(mop_rr_1, MATCH_MOP_RR_1, MASK_MOP_RR_1)
+DECLARE_INSN(mop_rr_2, MATCH_MOP_RR_2, MASK_MOP_RR_2)
+DECLARE_INSN(mop_rr_3, MATCH_MOP_RR_3, MASK_MOP_RR_3)
+DECLARE_INSN(mop_rr_4, MATCH_MOP_RR_4, MASK_MOP_RR_4)
+DECLARE_INSN(mop_rr_5, MATCH_MOP_RR_5, MASK_MOP_RR_5)
+DECLARE_INSN(mop_rr_6, MATCH_MOP_RR_6, MASK_MOP_RR_6)
+DECLARE_INSN(mop_rr_7, MATCH_MOP_RR_7, MASK_MOP_RR_7)
+DECLARE_INSN(mop_rr_N, MATCH_MOP_RR_N, MASK_MOP_RR_N)
 DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
 DECLARE_INSN(msubr32, MATCH_MSUBR32, MASK_MSUBR32)
 DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)

diff --git a/riscv/insns/c_lui.h b/riscv/insns/c_lui.h
@@ -2,7 +2,10 @@ require_extension(EXT_ZCA);
 if (insn.rvc_rd() == 2) { // c.addi16sp
   require(insn.rvc_addi16sp_imm() != 0);
   WRITE_REG(X_SP, sext_xlen(RVC_SP + insn.rvc_addi16sp_imm()));
-} else {
-  require(insn.rvc_imm() != 0);
+} else if (insn.rvc_imm() != 0) { // c.lui
   WRITE_RD(insn.rvc_imm() << 12);
+} else if ((insn.rvc_rd() & 1) != 0) { // c.mop.N
+  #include "c_mop_N.h"
+} else {
+  require(false);
 }
diff --git a/riscv/insns/c_mop_N.h b/riscv/insns/c_mop_N.h
@@ -0,0 +1,2 @@
+require_extension(EXT_ZCA);
+require_extension(EXT_ZCMOP);
diff --git a/riscv/isa_parser.h b/riscv/isa_parser.h
@@ -80,6 +80,7 @@ typedef enum {
   EXT_SMCSRIND,
   EXT_SSCSRIND,
   EXT_SMCNTRPMF,
+  EXT_ZCMOP,
   NUM_ISA_EXTENSIONS
 } isa_extension_t;
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1,2 @@
		require_extension(EXT_ZCA);
		require_extension(EXT_ZCMOP);