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update gtw360 device tree
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@devbis
devbis committed Dec 8, 2024
1 parent 3dea967 commit 6b81ef8
Showing 1 changed file with 142 additions and 50 deletions.
192 changes: 142 additions & 50 deletions target/linux/imx/patches-6.6/142-add-imx6ull-gtw360-dts.patch
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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
imx6ull-colibri-emmc-eval-v3.dtb \
--- a/arch/arm/boot/dts/nxp/imx/imx6ull-gtw360.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ull-gtw360.dts
@@ -0,0 +1,267 @@
@@ -0,0 +1,359 @@
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
Expand Down Expand Up @@ -71,18 +71,6 @@
+ };
+ };
+
+ gpio-export {

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@steals

steals Dec 14, 2024

@devbis could you please add this export back? Homed uses the following gpio classes

boot=/sys/class/gpio/zigbee-boot/value
reset=/sys/class/gpio/zigbee-reset/value

but they are not available in opemlumi image
+ compatible = "gpio-export";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio>;
+
+ zigbee_reset {
+ gpio-export,name = "zigbee-reset";
+ gpio-export,output = <0x01>;
+ gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ sdio_pwrseq: pwrsec {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
Expand Down Expand Up @@ -126,61 +114,146 @@
+ fsl,cpu_pdnscr_iso = <0x01>;
+ fsl,ldo-bypass = <0x00>;
+};
+
+&ecspi1 {
+ cs-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi1>;
+ num-chipselects = <1>;
+ status = "okay";
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ spi-cs-high;
+ };
+};
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi4>;
+
+ pinctrl_leds: ledsgrp {
+ fsl,pins = <0x7c 0x308 0x00 0x05 0x00 0xb0 0x60 0x2ec 0x00 0x05 0x00 0xb0 0x64 0x2f0 0x00 0x05 0x00 0xb0>;
+ pinctrl_ecspi1: ecspi1-grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1
+ MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x100b1
+ MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x100b1
+ MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x1b0b0
+ >;
+ };
+
+ pinctrl_keys: keysgrp {
+ fsl,pins = <0x34 0x2c0 0x00 0x05 0x00 0x70a1>;
+ pinctrl_leds: ledsgrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0xb0
+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
+ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
+ >;
+ };
+
+ pinctrl_gpio: gpiogrp {
+ fsl,pins = <0x70 0x2fc 0x00 0x05 0x00 0xb0>;
+ pinctrl_keys: keysgrp {
+ fsl,pins = <
+ MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x70a1
+ >;
+ };
+
+ pinctrl_spi4: spi4grp {
+ fsl,pins = <0x14 0x2a0 0x00 0x05 0x00 0x70a1 0x18 0x2a4 0x00 0x05 0x00 0x70a1 0x38 0x2c4 0x00 0x05 0x00 0x70a1 0x3c 0x2c8 0x00 0x05 0x00 0x80000000>;
+ fsl,pins = <
+ MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
+ MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
+ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
+ MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
+ >;
+ };
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <0x78 0x304 0x00 0x00 0x00 0x1b0b0 0x74 0x300 0x578 0x00 0x00 0x1b0b0 0xcc 0x358 0x00 0x00 0x00 0x1b0b0 0xe0 0x36c 0x00 0x00 0x00 0x1b0b0 0xc4 0x350 0x00 0x00 0x00 0x1b0b0 0xc8 0x354 0x00 0x00 0x00 0x1b0b0 0xd8 0x364 0x00 0x00 0x00 0x1b0b0 0xd0 0x35c 0x00 0x00 0x00 0x1b0b0 0xd4 0x360 0x00 0x00 0x00 0x1b0b0 0xdc 0x368 0x574 0x04 0x02 0x4001b031>;
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <0x84 0x310 0x00 0x00 0x00 0x1b0b1 0x88 0x314 0x624 0x00 0x03 0x1b0b1>;
+ fsl,pins = <
+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <0x94 0x320 0x00 0x00 0x00 0x1b0b1 0x98 0x324 0x62c 0x00 0x01 0x1b0b1 0xa0 0x32c 0x00 0x05 0x00 0x1b0b1 0x9c 0x328 0x00 0x05 0x00 0x1b0b1 0x0c 0x50 0x00 0x05 0x00 0x13069>;
+ fsl,pins = <
+ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+ MX6UL_PAD_UART2_RTS_B__GPIO1_IO23 0x1b0b1
+ MX6UL_PAD_UART2_CTS_B__GPIO1_IO22 0x1b0b1
+ MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x13069
+ >;
+ };
+
+/*
+ pinctrl_uart2dte: uart2dtegrp {
+ fsl,pins = <0x94 0x320 0x62c 0x00 0x00 0x1b0b1 0x98 0x324 0x00 0x00 0x00 0x1b0b1 0xa0 0x32c 0x00 0x00 0x00 0x1b0b1 0x9c 0x328 0x628 0x00 0x00 0x1b0b1 0x0c 0x50 0x00 0x05 0x00 0x13069 0x108 0x394 0x00 0x05 0x00 0x13069>;
+ fsl,pins = <
+ MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX 0x1b0b1
+ MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x1b0b1
+ MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS 0x1b0b1
+ MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS 0x1b0b1
+ MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x13069
+ MX6UL_PAD_LCD_ENABLE__GPIO3_IO01 0x13069
+ >;
+ };
+
+*/
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <0xb4 0x340 0x00 0x00 0x00 0x1b0b1 0xb8 0x344 0x63c 0x00 0x01 0x1b0b1>;
+ fsl,pins = <
+ MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <0x1bc 0x448 0x00 0x00 0x00 0x17059 0x1c0 0x44c 0x00 0x00 0x00 0x10071 0x1c4 0x450 0x00 0x00 0x00 0x17059 0x1c8 0x454 0x00 0x00 0x00 0x17059 0x1cc 0x458 0x00 0x00 0x00 0x17059 0x1d0 0x45c 0x00 0x00 0x00 0x17059 0x80 0x30c 0x00 0x05 0x00 0x17059 0x10 0x54 0x00 0x05 0x00 0x17059>;
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+ MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
+ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 VSELECT */
+ MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059 /* SD1 RESET */
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <0x178 0x404 0x670 0x01 0x02 0x17059 0x17c 0x408 0x678 0x01 0x02 0x17059 0x180 0x40c 0x67c 0x01 0x02 0x17059 0x184 0x410 0x680 0x01 0x02 0x17059 0x188 0x414 0x684 0x01 0x01 0x17059 0x18c 0x418 0x688 0x01 0x02 0x17059>;
+ fsl,pins = <
+ MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059
+ MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
+ MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+ MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+ MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+ MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+ >;
+ };
+
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <0x114 0x3a0 0x00 0x04 0x00 0x30b0>;
+ fsl,pins = <
+ MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
+ >;
+ };
+
+ pinctrl_usb_otg1: usbotg1grp {
+ fsl,pins = <0x5c 0x2e8 0x4b8 0x02 0x00 0x17059>;
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
+ >;
+ };
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+ >;
+ };
+};
+
Expand Down Expand Up @@ -228,47 +301,48 @@
+};
+
+&usbphy1 {
+ fsl,tx-d-cal = <0x6a>;
+ fsl,tx-d-cal = <106>;
+};
+
+&usbphy2 {
+ fsl,tx-d-cal = <0x6a>;
+ fsl,tx-d-cal = <106>;
+};
+
+&usdhc1 {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ assigned-clocks = <0x01 0x40 0x01 0xce>;
+ assigned-clock-parents = <0x01 0x26>;
+ assigned-clock-rates = <0x00 0x7de2900>;
+ max-frequency = <0xe4e1c0>;
+ bus-width = <0x04>;
+ assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>;
+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
+ assigned-clock-rates = <0>, <132000000>;
+ max-frequency = <15000000>;
+ bus-width = <4>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ keep-power-in-suspend;
+ cap-power-off-card;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ supports-sdio;
+ //non-removable;
+ //no-1-8-v;
+ status = "okay";
+
+ wifi@1 {
+ reg = <0x01>;
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <0x21>;
+ interrupts = <0x02 0x04>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ assigned-clocks = <0x01 0x41 0x01 0xcf>;
+ assigned-clock-parents = <0x01 0x26>;
+ assigned-clock-rates = <0x00 0x7de2900>;
+ bus-width = <0x04>;
+ assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
+ assigned-clock-rates = <0>, <132000000>;
+ bus-width = <4>;
+ keep-power-in-suspend;
+ status = "okay";
+};
Expand All @@ -278,3 +352,21 @@
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,wdog_b;
+};
+
+&snvs_rtc {
+ status = "disabled";
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ clock-frequency = <100000>;
+ status = "okay";
+ bridge@69 {
+ compatible = "qcom,rtc_am1805";
+ dev_name = "rtc_am1805";
+ reg = <0x69>;
+ init_date = "2015/01/01";
+ status = "okay";
+ };
+};

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