samples: add support for nrf54l10

Kconfig.dependencies

@@ -107,7 +107,7 @@ choice CC3XX_LOCK_VARIANT
 endchoice
 
 config PSA_WANT_ALG_SHA_512
-	default y if SOC_NRF54L15
+	default y if SOC_SERIES_NRF54LX
 
 config PSA_WANT_ALG_CHACHA20_POLY1305
 	default n

samples/sid_end_device/Kconfig.sysbuild

@@ -25,7 +25,7 @@ config DFU_MULTI_IMAGE_PACKAGE_APP
 	default y
 
 config PM_EXTERNAL_FLASH_MCUBOOT_SECONDARY
-	default y if BOARD_NRF52840DK_NRF52840 || BOARD_NRF5340DK_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPP
+	default y if !BOARD_NRF54L15DK_NRF54L15_CPUAPP || !BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS
 
 if (BOARD_NRF5340DK_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPP)
 
@@ -50,7 +50,7 @@ config DFU_MULTI_IMAGE_PACKAGE_NET
 
 endif # (BOARD_NRF5340DK_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPP)
 
-if (BOARD_NRF54L15DK_NRF54L15_CPUAPP || BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS)
+if (BOARD_NRF54L15DK_NRF54L15_CPUAPP || BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS || BOARD_NRF54L15DK_NRF54L10_CPUAPP)
 
 # TODO: NCSDK-28931: Cannot use fprotect twice, so disable it in MCUboot to
 # test protecting factory data. It can be enabled while there is a support

samples/sid_end_device/boards/nrf54l15dk_nrf54l10_cpuapp.conf

@@ -0,0 +1,14 @@
+#
+# Copyright (c) 2024 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+
+CONFIG_POWEROFF=y
+
+# nRF54L15DK uses SPI NOR external flash for DFU
+CONFIG_SPI=y
+CONFIG_SPI_NOR=y
+CONFIG_MULTITHREADING=y
+CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
+CONFIG_MCUMGR_GRP_IMG_ALLOW_ERASE_PENDING=y

samples/sid_end_device/boards/nrf54l15dk_nrf54l10_cpuapp.overlay

@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/{
+	aliases {
+		state-notifier-connected = &led0;
+		state-notifier-time-sync = &led1;
+		state-notifier-registered = &led2;
+		state-notifier-working = &led3;
+	};
+
+	semtech_sx1262_gpios{
+		compatible = "gpio-keys";
+		semtech_sx1262_reset_gpios: reset {
+			gpios = <&gpio2 8  (GPIO_ACTIVE_LOW|GPIO_PULL_UP)>;
+			label = "semtech_sx1262 Reset";
+		};
+		semtech_sx1262_busy_gpios: busy {
+			gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH)>;
+			label = "semtech_sx1262 Busy";
+		};
+		semtech_sx1262_antenna_enable_gpios: antena_enable {
+			gpios = <&gpio2 10 (GPIO_ACTIVE_HIGH)>;
+			label = "semtech_sx1262 Antena Enable";
+		};
+		semtech_sx1262_dio1_gpios: dio1 {
+			gpios = <&gpio1 11  (GPIO_ACTIVE_HIGH|GPIO_PULL_DOWN)>;
+			label = "semtech_sx1262 DIO1";
+		};
+	};
+
+	chosen {
+		nordic,pm-ext-flash = &mx25r64;
+	};
+};
+
+sid_semtech: &spi30 {
+	compatible = "nordic,nrf-spim";
+	status = "okay";
+	cs-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+	pinctrl-0 = <&spi30_default_alt>;
+	pinctrl-1 = <&spi30_sleep_alt>;
+	pinctrl-names = "default", "sleep";
+	clock-frequency = <DT_FREQ_M(8)>;
+};
+
+&cpuapp_rram {
+	reg = <0x0 DT_SIZE_K(1024)>;
+};
+
+&cpuapp_sram {
+	reg = <0x20000000 DT_SIZE_K(192)>;
+	ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
+};
+
+&pinctrl {
+	spi30_default_alt: spi30_default_alt {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 3)>,
+				<NRF_PSEL(SPIM_MISO, 0, 2)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 1)>;
+		};
+	};
+
+	spi30_sleep_alt: spi30_sleep_alt {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 3)>,
+				<NRF_PSEL(SPIM_MISO, 0, 2)>,
+				<NRF_PSEL(SPIM_MOSI, 0, 1)>;
+			low-power-enable;
+		};
+	};
+};
+
+&adc {
+	status = "disabled";
+};
+&uart21 {
+	status = "disabled";
+};
+&pwm20 {
+	status = "disabled";
+};
+&i2c20 {
+	status = "disabled";
+};
+&spi20 {
+	status = "disabled";
+};
+&spi22 {
+	status = "disabled";
+};
+&mx25r64 {
+	status = "okay";
+};
+
+// TODO: re-enable HWFC once it's fixed
+&uart20 {
+	/delete-property/ hw-flow-control;
+};

samples/sid_end_device/pm_static_nrf54l15dk_nrf54l10_cpuapp.yml

@@ -0,0 +1,63 @@
+app:
+  address: 0xc800
+  end_address: 0xfd000
+  region: flash_primary
+  size: 0xf0800
+mcuboot:
+  address: 0x0
+  end_address: 0xc000
+  placement:
+    before:
+    - mcuboot_primary
+  region: flash_primary
+  size: 0xc000
+mcuboot_pad:
+  address: 0xc000
+  end_address: 0xc800
+  placement:
+    before:
+    - mcuboot_primary_app
+  region: flash_primary
+  size: 0x800
+mcuboot_primary:
+  address: 0xc000
+  end_address: 0xfd000
+  orig_span: &id001
+  - mcuboot_pad
+  - app
+  region: flash_primary
+  size: 0xf1000
+  span: *id001
+mcuboot_primary_app:
+  address: 0xc800
+  end_address: 0xfd000
+  orig_span: &id002
+  - app
+  region: flash_primary
+  size: 0xf0800
+  span: *id002
+settings_storage:
+  address: 0xfd000
+  end_address: 0xff000
+  placement:
+    align:
+      start: 0x1000
+    before:
+    - end
+  region: flash_primary
+  size: 0x2000
+mfg_storage:
+  address: 0xff000
+  end_address: 0x100000
+  region: flash_primary
+  size: 0x1000
+mcuboot_secondary:
+  address: 0x0
+  end_address: 0xf1000
+  placement:
+    align:
+      start: 0x4
+  region: external_flash
+  share_size:
+  - mcuboot_primary
+  size: 0xf1000

samples/sid_end_device/sample.yaml

@@ -9,11 +9,13 @@ common:
     - nrf5340dk/nrf5340/cpuapp
     - nrf54l15dk/nrf54l15/cpuapp
     - nrf54l15dk/nrf54l15/cpuapp/ns
+    - nrf54l15dk/nrf54l10/cpuapp
   integration_platforms:
     - nrf52840dk/nrf52840
     - nrf5340dk/nrf5340/cpuapp
     - nrf54l15dk/nrf54l15/cpuapp
     - nrf54l15dk/nrf54l15/cpuapp/ns
+    - nrf54l15dk/nrf54l10/cpuapp
 tests:
   sample.sidewalk.hello:
     extra_configs:

samples/sid_end_device/sysbuild/mcuboot/boards/nrf54l15dk_nrf54l10_cpuapp.conf

@@ -0,0 +1,34 @@
+#
+# Copyright (c) 2024 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+
+# TODO: NCSDK-28931: Cannot use fprotect twice, so disable it in MCUboot to
+# test protecting factory data. It can be enabled while there is a support
+# for protection more than one region.
+CONFIG_FPROTECT=n
+
+# TODO: Workaround, disable memory guard to avoid false faults in application after boot
+CONFIG_HW_STACK_PROTECTION=n
+
+# Currently, without tickless kernel, the SYSCOUNTER value after the software
+# reset is not set properly and due to that the first system interrupt is not called
+# in the proper time - the SYSCOUNTER value is set to the value from before
+# reset + 1. Hence, the reboot time increases more and more.
+# To avoid it enable tickles kernel for mcuboot.
+CONFIG_TICKLESS_KERNEL=y
+
+CONFIG_BOOT_WATCHDOG_FEED=n
+
+CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
+
+# nRF54L15DK uses SPI NOR external flash
+CONFIG_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_NOR=y
+CONFIG_SPI_NOR_SFDP_DEVICETREE=y
+CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
+
+# required by SPI driver
+CONFIG_MULTITHREADING=y

samples/sid_end_device/sysbuild/mcuboot/boards/nrf54l15dk_nrf54l10_cpuapp.overlay

@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/ {
+	chosen {
+		nordic,pm-ext-flash = &mx25r64;
+	};
+};
+
+/* Application does not use cpuflpr core. Assign whole RRAM and RAM to cpuapp. */
+&cpuapp_rram {
+	reg = <0x0 DT_SIZE_K(1024)>;
+};
+
+&cpuapp_sram {
+	reg = <0x20000000 DT_SIZE_K(192)>;
+	ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
+};
+
+&mx25r64 {
+	status = "okay";
+};

subsys/sal/sid_pal/src/sid_ble_advert.c

@@ -192,7 +192,7 @@ int sid_ble_advert_deinit(void)
 
 void sid_ble_advert_notify_connection(void)
 {
-	LOG_INF("Conneciton has been made, cancel change adv");
+	LOG_DBG("Conneciton has been made, cancel change adv");
 	k_work_cancel_delayable(&change_adv_work);
 }
 

subsys/sal/sid_pal/src/sid_mfg_storage.c

@@ -44,7 +44,7 @@ static int sid_mfg_storage_secure_read(uint16_t *p_value, uint8_t *buffer, uint1
 #elif defined(NRF_NETWORK)
 #define DEV_ID_REG (uint32_t)(NRF_FICR_NS->INFO.DEVICEID[0])
 #endif /* NRF5340_XXAA */
-#elif defined(NRF54L15_ENGA_XXAA) || defined(NRF54L15_XXAA)
+#elif defined(NRF54L10_XXAA) || defined(NRF54L15_XXAA)
 #define DEV_ID_REG (uint32_t)(NRF_FICR->INFO.DEVICEID[0])
 #else
 #error "Unknow Device ID register."

tests/functional/critical_region/testcase.yaml

@@ -6,8 +6,10 @@ tests:
       - nrf5340dk/nrf5340/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp/ns
+      - nrf54l15dk/nrf54l10/cpuapp
     integration_platforms:
       - nrf52840dk/nrf52840
       - nrf5340dk/nrf5340/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp/ns
+      - nrf54l15dk/nrf54l10/cpuapp

tests/functional/crypto/src/main.c

@@ -300,7 +300,7 @@ ZTEST(crypto, test_sid_pal_crypto_hash_256)
 	zassert_equal(SID_ERROR_OUT_OF_RESOURCES, sid_pal_crypto_hash(&params));
 }
 
-#if defined(CONFIG_SOC_NRF54L15)
+#if defined(CONFIG_SOC_SERIES_NRF54LX)
 
 ZTEST(crypto, test_sid_pal_crypto_hash_512)
 {
@@ -375,7 +375,7 @@ ZTEST(crypto, test_sid_pal_crypto_hash_512)
 	zassert_equal(SID_ERROR_NONE, sid_pal_crypto_hash(&params));
 }
 
-#endif /* CONFIG_SOC_NRF54L15 */
+#endif /* CONFIG_SOC_SERIES_NRF54LX */
 
 /**********************************************
 * HMAC
@@ -516,7 +516,7 @@ ZTEST(crypto, test_sid_pal_crypto_hmac_sha256_fake_key)
 	zassert_not_equal(0, memcmp(openssl_test_hmac_sha256_vector, digest, SHA256_LEN));
 }
 
-#if defined(CONFIG_SOC_NRF54L15)
+#if defined(CONFIG_SOC_SERIES_NRF54LX)
 ZTEST(crypto, test_sid_pal_crypto_hmac_sha512)
 {
 	sid_pal_hmac_params_t params;
@@ -636,7 +636,7 @@ ZTEST(crypto, test_sid_pal_crypto_hmac_sha512_fake_key)
 	zassert_not_equal(0, memcmp(openssl_test_hmac_sha512_vector, digest, SHA512_LEN));
 }
 
-#endif /* CONFIG_SOC_NRF54L15 */
+#endif /* CONFIG_SOC_SERIES_NRF54LX */
 
 /**********************************************
 * END HMAC
@@ -2016,7 +2016,9 @@ ZTEST(crypto, test_sid_pal_crypto_ecc_dsa)
 		params.mode = SID_PAL_CRYPTO_VERIFY;
 		params.key = public_Ed25519;
 		params.key_size = sizeof(public_Ed25519);
-		zassert_equal(SID_ERROR_NONE, sid_pal_crypto_ecc_dsa(&params));
+		sid_error_t ret = sid_pal_crypto_ecc_dsa(&params);
+		printk("ret: %d\n", ret);
+		zassert_equal(SID_ERROR_NONE, ret);
 
 		// Bad public key
 		params.key = fake_public_SECP256R1;

tests/functional/crypto/testcase.yaml

@@ -7,8 +7,10 @@ tests:
       - nrf5340dk/nrf5340/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp/ns
+      - nrf54l15dk/nrf54l10/cpuapp
     integration_platforms:
       - nrf52840dk/nrf52840
       - nrf5340dk/nrf5340/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp/ns
+      - nrf54l15dk/nrf54l10/cpuapp

tests/functional/crypto_keys/testcase.yaml

@@ -7,8 +7,10 @@ tests:
       - nrf5340dk/nrf5340/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp/ns
+      - nrf54l15dk/nrf54l10/cpuapp
     integration_platforms:
       - nrf52840dk/nrf52840
       - nrf5340dk/nrf5340/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp/ns
+      - nrf54l15dk/nrf54l10/cpuapp

tests/functional/interrupts/testcase.yaml

@@ -7,8 +7,10 @@ tests:
       - nrf5340dk/nrf5340/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp/ns
+      - nrf54l15dk/nrf54l10/cpuapp
     integration_platforms:
       - nrf52840dk/nrf52840
       - nrf5340dk/nrf5340/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp
       - nrf54l15dk/nrf54l15/cpuapp/ns
+      - nrf54l15dk/nrf54l10/cpuapp