Merge branch 'master' of https://github.com/openjdk/jdk into cf/skip

liachmodded · Sep 5, 2024 · 6b1accc · 6b1accc
2 parents 21f0a22 + 8fb8cd8
commit 6b1accc
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diff --git a/make/InterimImage.gmk b/make/InterimImage.gmk
@@ -27,12 +27,13 @@ default: all
 
 include $(SPEC)
 include MakeBase.gmk
+
+include Execute.gmk
 include Modules.gmk
 
 ################################################################################
 
-# Use this file inside the image as target for make rule
-JIMAGE_TARGET_FILE := bin/java$(EXECUTABLE_SUFFIX)
+INTERIM_JLINK_SUPPORT_DIR := $(SUPPORT_OUTPUTDIR)/interim-image-jlink
 
 INTERIM_MODULES_LIST := $(call CommaList, $(INTERIM_IMAGE_MODULES))
 
@@ -42,19 +43,18 @@ JLINK_TOOL := $(JLINK) -J-Djlink.debug=true \
     --module-path $(INTERIM_JMODS_DIR) \
     --endian $(OPENJDK_BUILD_CPU_ENDIAN)
 
-$(INTERIM_IMAGE_DIR)/$(JIMAGE_TARGET_FILE): $(JMODS) \
-    $(call DependOnVariable, INTERIM_MODULES_LIST)
-	$(call LogWarn, Creating interim jimage)
-	$(RM) -r $(INTERIM_IMAGE_DIR)
-	$(call MakeDir, $(INTERIM_IMAGE_DIR))
-	$(call ExecuteWithLog, $(INTERIM_IMAGE_DIR)/jlink, \
-	    $(JLINK_TOOL) \
-	    --output $(INTERIM_IMAGE_DIR) \
-	    --disable-plugin generate-jli-classes \
-	    --add-modules $(INTERIM_MODULES_LIST))
-	$(TOUCH) $@
-
-TARGETS += $(INTERIM_IMAGE_DIR)/$(JIMAGE_TARGET_FILE)
+$(eval $(call SetupExecute, jlink_interim_image, \
+    WARN := Creating interim jimage, \
+    DEPS :=  $(JMODS) $(call DependOnVariable, INTERIM_MODULES_LIST), \
+    OUTPUT_DIR := $(INTERIM_IMAGE_DIR), \
+    SUPPORT_DIR := $(INTERIM_JLINK_SUPPORT_DIR), \
+    PRE_COMMAND := $(RM) -r $(INTERIM_IMAGE_DIR), \
+    COMMAND := $(JLINK_TOOL) --output $(INTERIM_IMAGE_DIR) \
+        --disable-plugin generate-jli-classes \
+        --add-modules $(INTERIM_MODULES_LIST), \
+))
+
+TARGETS += $(jlink_interim_image)
 
 ################################################################################
 

diff --git a/src/hotspot/cpu/aarch64/c1_MacroAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/c1_MacroAssembler_aarch64.cpp
@@ -75,8 +75,8 @@ int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr
 
   if (DiagnoseSyncOnValueBasedClasses != 0) {
     load_klass(hdr, obj);
-    ldrw(hdr, Address(hdr, Klass::access_flags_offset()));
-    tstw(hdr, JVM_ACC_IS_VALUE_BASED_CLASS);
+    ldrb(hdr, Address(hdr, Klass::misc_flags_offset()));
+    tst(hdr, KlassFlags::_misc_is_value_based_class);
     br(Assembler::NE, slow_case);
   }
 

diff --git a/src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp b/src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp
@@ -783,8 +783,8 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
         Label register_finalizer;
         Register t = r5;
         __ load_klass(t, r0);
-        __ ldrw(t, Address(t, Klass::access_flags_offset()));
-        __ tbnz(t, exact_log2(JVM_ACC_HAS_FINALIZER), register_finalizer);
+        __ ldrb(t, Address(t, Klass::misc_flags_offset()));
+        __ tbnz(t, exact_log2(KlassFlags::_misc_has_finalizer), register_finalizer);
         __ ret(lr);
 
         __ bind(register_finalizer);

diff --git a/src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp
@@ -64,8 +64,8 @@ void C2_MacroAssembler::fast_lock(Register objectReg, Register boxReg, Register
 
   if (DiagnoseSyncOnValueBasedClasses != 0) {
     load_klass(tmp, oop);
-    ldrw(tmp, Address(tmp, Klass::access_flags_offset()));
-    tstw(tmp, JVM_ACC_IS_VALUE_BASED_CLASS);
+    ldrb(tmp, Address(tmp, Klass::misc_flags_offset()));
+    tst(tmp, KlassFlags::_misc_is_value_based_class);
     br(Assembler::NE, cont);
   }
 
@@ -243,8 +243,8 @@ void C2_MacroAssembler::fast_lock_lightweight(Register obj, Register box, Regist
 
   if (DiagnoseSyncOnValueBasedClasses != 0) {
     load_klass(t1, obj);
-    ldrw(t1, Address(t1, Klass::access_flags_offset()));
-    tstw(t1, JVM_ACC_IS_VALUE_BASED_CLASS);
+    ldrb(t1, Address(t1, Klass::misc_flags_offset()));
+    tst(t1, KlassFlags::_misc_is_value_based_class);
     br(Assembler::NE, slow_path);
   }
 

diff --git a/src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp b/src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp
@@ -690,8 +690,8 @@ void InterpreterMacroAssembler::lock_object(Register lock_reg)
 
     if (DiagnoseSyncOnValueBasedClasses != 0) {
       load_klass(tmp, obj_reg);
-      ldrw(tmp, Address(tmp, Klass::access_flags_offset()));
-      tstw(tmp, JVM_ACC_IS_VALUE_BASED_CLASS);
+      ldrb(tmp, Address(tmp, Klass::misc_flags_offset()));
+      tst(tmp, KlassFlags::_misc_is_value_based_class);
       br(Assembler::NE, slow_case);
     }
 

diff --git a/src/hotspot/cpu/aarch64/templateTable_aarch64.cpp b/src/hotspot/cpu/aarch64/templateTable_aarch64.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -2191,9 +2191,9 @@ void TemplateTable::_return(TosState state)
 
     __ ldr(c_rarg1, aaddress(0));
     __ load_klass(r3, c_rarg1);
-    __ ldrw(r3, Address(r3, Klass::access_flags_offset()));
+    __ ldrb(r3, Address(r3, Klass::misc_flags_offset()));
     Label skip_register_finalizer;
-    __ tbz(r3, exact_log2(JVM_ACC_HAS_FINALIZER), skip_register_finalizer);
+    __ tbz(r3, exact_log2(KlassFlags::_misc_has_finalizer), skip_register_finalizer);
 
     __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::register_finalizer), c_rarg1);
 

diff --git a/src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp b/src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp
@@ -195,8 +195,8 @@ int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr
 
   if (DiagnoseSyncOnValueBasedClasses != 0) {
     load_klass(tmp2, obj);
-    ldr_u32(tmp2, Address(tmp2, Klass::access_flags_offset()));
-    tst(tmp2, JVM_ACC_IS_VALUE_BASED_CLASS);
+    ldrb(tmp2, Address(tmp2, Klass::misc_flags_offset()));
+    tst(tmp2, KlassFlags::_misc_is_value_based_class);
     b(slow_case, ne);
   }
 

diff --git a/src/hotspot/cpu/arm/c1_Runtime1_arm.cpp b/src/hotspot/cpu/arm/c1_Runtime1_arm.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -504,11 +504,11 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
       {
         __ set_info("register_finalizer", dont_gc_arguments);
 
-        // Do not call runtime if JVM_ACC_HAS_FINALIZER flag is not set
+        // Do not call runtime if has_finalizer flag is not set
         __ load_klass(Rtemp, R0);
-        __ ldr_u32(Rtemp, Address(Rtemp, Klass::access_flags_offset()));
+        __ ldrb(Rtemp, Address(Rtemp, Klass::misc_flags_offset()));
 
-        __ tst(Rtemp, JVM_ACC_HAS_FINALIZER);
+        __ tst(Rtemp, KlassFlags::_misc_has_finalizer);
         __ bx(LR, eq);
 
         // Call VM

diff --git a/src/hotspot/cpu/arm/c2_MacroAssembler_arm.cpp b/src/hotspot/cpu/arm/c2_MacroAssembler_arm.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2021, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -86,8 +86,8 @@ void C2_MacroAssembler::fast_lock(Register Roop, Register Rbox, Register Rscratc
 
   if (DiagnoseSyncOnValueBasedClasses != 0) {
     load_klass(Rscratch, Roop);
-    ldr_u32(Rscratch, Address(Rscratch, Klass::access_flags_offset()));
-    tst(Rscratch, JVM_ACC_IS_VALUE_BASED_CLASS);
+    ldrb(Rscratch, Address(Rscratch, Klass::misc_flags_offset()));
+    tst(Rscratch, KlassFlags::_misc_is_value_based_class);
     b(done, ne);
   }
 

diff --git a/src/hotspot/cpu/arm/interp_masm_arm.cpp b/src/hotspot/cpu/arm/interp_masm_arm.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -909,8 +909,8 @@ void InterpreterMacroAssembler::lock_object(Register Rlock) {
 
     if (DiagnoseSyncOnValueBasedClasses != 0) {
       load_klass(R0, Robj);
-      ldr_u32(R0, Address(R0, Klass::access_flags_offset()));
-      tst(R0, JVM_ACC_IS_VALUE_BASED_CLASS);
+      ldrb(R0, Address(R0, Klass::misc_flags_offset()));
+      tst(R0, KlassFlags::_misc_is_value_based_class);
       b(slow_case, ne);
     }
 

diff --git a/src/hotspot/cpu/arm/templateTable_arm.cpp b/src/hotspot/cpu/arm/templateTable_arm.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -2494,8 +2494,8 @@ void TemplateTable::_return(TosState state) {
     assert(state == vtos, "only valid state");
     __ ldr(R1, aaddress(0));
     __ load_klass(Rtemp, R1);
-    __ ldr_u32(Rtemp, Address(Rtemp, Klass::access_flags_offset()));
-    __ tbz(Rtemp, exact_log2(JVM_ACC_HAS_FINALIZER), skip_register_finalizer);
+    __ ldrb(Rtemp, Address(Rtemp, Klass::misc_flags_offset()));
+    __ tbz(Rtemp, exact_log2(KlassFlags::_misc_has_finalizer), skip_register_finalizer);
 
     __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::register_finalizer), R1);
 

diff --git a/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp b/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp
@@ -1859,7 +1859,7 @@ void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
       __ stw(R11_scratch1, simm16_offs, tmp);
     }
 #endif
-    __ call_c_with_frame_resize(copyfunc_addr, /*stub does not need resized frame*/ 0);
+    __ call_c(copyfunc_addr, relocInfo::runtime_call_type);
 
     __ nand(tmp, R3_RET, R3_RET);
     __ subf(length, tmp, length);
@@ -2057,7 +2057,7 @@ void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
         int sco_offset = in_bytes(Klass::super_check_offset_offset());
         __ lwz(chk_off, sco_offset, super_k);
 
-        __ call_c_with_frame_resize(copyfunc_addr, /*stub does not need resized frame*/ 0);
+        __ call_c(copyfunc_addr, relocInfo::runtime_call_type);
 
 #ifndef PRODUCT
         if (PrintC1Statistics) {
@@ -2181,7 +2181,7 @@ void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
 
   // Arraycopy stubs takes a length in number of elements, so don't scale it.
   __ mr(len, length);
-  __ call_c_with_frame_resize(entry, /*stub does not need resized frame*/ 0);
+  __ call_c(entry, relocInfo::runtime_call_type);
 
   if (stub != nullptr) {
     __ bind(*stub->continuation());
@@ -2862,7 +2862,7 @@ void LIR_Assembler::rt_call(LIR_Opr result, address dest,
     return;
   }
 
-  __ call_c_with_frame_resize(dest, /*no resizing*/ 0);
+  __ call_c(dest, relocInfo::runtime_call_type);
   if (info != nullptr) {
     add_call_info_here(info);
   }

diff --git a/src/hotspot/cpu/ppc/c1_MacroAssembler_ppc.cpp b/src/hotspot/cpu/ppc/c1_MacroAssembler_ppc.cpp
@@ -86,8 +86,8 @@ void C1_MacroAssembler::lock_object(Register Rmark, Register Roop, Register Rbox
 
   if (DiagnoseSyncOnValueBasedClasses != 0) {
     load_klass(Rscratch, Roop);
-    lwz(Rscratch, in_bytes(Klass::access_flags_offset()), Rscratch);
-    testbitdi(CCR0, R0, Rscratch, exact_log2(JVM_ACC_IS_VALUE_BASED_CLASS));
+    lbz(Rscratch, in_bytes(Klass::misc_flags_offset()), Rscratch);
+    testbitdi(CCR0, R0, Rscratch, exact_log2(KlassFlags::_misc_is_value_based_class));
     bne(CCR0, slow_int);
   }
 
@@ -404,14 +404,3 @@ void C1_MacroAssembler::null_check(Register r, Label* Lnull) {
     bc_far_optimized(Assembler::bcondCRbiIs1, bi0(CCR0, Assembler::equal), *Lnull);
   }
 }
-
-address C1_MacroAssembler::call_c_with_frame_resize(address dest, int frame_resize) {
-  if (frame_resize) { resize_frame(-frame_resize, R0); }
-#if defined(ABI_ELFv2)
-  address return_pc = call_c(dest, relocInfo::runtime_call_type);
-#else
-  address return_pc = call_c(CAST_FROM_FN_PTR(FunctionDescriptor*, dest), relocInfo::runtime_call_type);
-#endif
-  if (frame_resize) { resize_frame(frame_resize, R0); }
-  return return_pc;
-}
diff --git a/src/hotspot/cpu/ppc/c1_MacroAssembler_ppc.hpp b/src/hotspot/cpu/ppc/c1_MacroAssembler_ppc.hpp
@@ -89,6 +89,5 @@
 
   void null_check(Register r, Label *Lnull = nullptr);
 
-  address call_c_with_frame_resize(address dest, int frame_resize);
 
 #endif // CPU_PPC_C1_MACROASSEMBLER_PPC_HPP
diff --git a/src/hotspot/cpu/ppc/c1_Runtime1_ppc.cpp b/src/hotspot/cpu/ppc/c1_Runtime1_ppc.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1999, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2012, 2023 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -62,7 +62,7 @@ int StubAssembler::call_RT(Register oop_result1, Register metadata_result,
   // ARG1 must hold thread address.
   mr(R3_ARG1, R16_thread);
 
-  address return_pc = call_c_with_frame_resize(entry_point, /*No resize, we have a C compatible frame.*/0);
+  address return_pc = call_c(entry_point);
 
   reset_last_Java_frame();
 
@@ -479,8 +479,8 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
 
         // Load the klass and check the has finalizer flag.
         __ load_klass(t, R3_ARG1);
-        __ lwz(t, in_bytes(Klass::access_flags_offset()), t);
-        __ testbitdi(CCR0, R0, t, exact_log2(JVM_ACC_HAS_FINALIZER));
+        __ lbz(t, in_bytes(Klass::misc_flags_offset()), t);
+        __ testbitdi(CCR0, R0, t, exact_log2(KlassFlags::_misc_has_finalizer));
         // Return if has_finalizer bit == 0 (CR0.eq).
         __ bclr(Assembler::bcondCRbiIs1, Assembler::bi0(CCR0, Assembler::equal), Assembler::bhintbhBCLRisReturn);
 

diff --git a/src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp b/src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2012, 2023 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -135,15 +135,7 @@ void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg)
     // Call the Interpreter::remove_activation_preserving_args_entry()
     // func to get the address of the same-named entrypoint in the
     // generated interpreter code.
-#if defined(ABI_ELFv2)
-    call_c(CAST_FROM_FN_PTR(address,
-                            Interpreter::remove_activation_preserving_args_entry),
-           relocInfo::none);
-#else
-    call_c(CAST_FROM_FN_PTR(FunctionDescriptor*,
-                            Interpreter::remove_activation_preserving_args_entry),
-           relocInfo::none);
-#endif
+    call_c(CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry));
 
     // Jump to Interpreter::_remove_activation_preserving_args_entry.
     mtctr(R3_RET);
@@ -970,8 +962,8 @@ void InterpreterMacroAssembler::lock_object(Register monitor, Register object) {
 
     if (DiagnoseSyncOnValueBasedClasses != 0) {
       load_klass(tmp, object);
-      lwz(tmp, in_bytes(Klass::access_flags_offset()), tmp);
-      testbitdi(CCR0, R0, tmp, exact_log2(JVM_ACC_IS_VALUE_BASED_CLASS));
+      lbz(tmp, in_bytes(Klass::misc_flags_offset()), tmp);
+      testbitdi(CCR0, R0, tmp, exact_log2(KlassFlags::_misc_is_value_based_class));
       bne(CCR0, slow_case);
     }
 

diff --git a/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp b/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp
@@ -1293,11 +1293,7 @@ void MacroAssembler::call_VM_base(Register oop_result,
 
   // ARG1 must hold thread address.
   mr(R3_ARG1, R16_thread);
-#if defined(ABI_ELFv2)
   address return_pc = call_c(entry_point, relocInfo::none);
-#else
-  address return_pc = call_c((FunctionDescriptor*)entry_point, relocInfo::none);
-#endif
 
   reset_last_Java_frame();
 
@@ -1318,11 +1314,7 @@ void MacroAssembler::call_VM_base(Register oop_result,
 
 void MacroAssembler::call_VM_leaf_base(address entry_point) {
   BLOCK_COMMENT("call_VM_leaf {");
-#if defined(ABI_ELFv2)
-  call_c(entry_point, relocInfo::none);
-#else
-  call_c(CAST_FROM_FN_PTR(FunctionDescriptor*, entry_point), relocInfo::none);
-#endif
+  call_c(entry_point);
   BLOCK_COMMENT("} call_VM_leaf");
 }
 
@@ -2561,8 +2553,8 @@ void MacroAssembler::compiler_fast_lock_object(ConditionRegister flag, Register
 
   if (DiagnoseSyncOnValueBasedClasses != 0) {
     load_klass(temp, oop);
-    lwz(temp, in_bytes(Klass::access_flags_offset()), temp);
-    testbitdi(flag, R0, temp, exact_log2(JVM_ACC_IS_VALUE_BASED_CLASS));
+    lbz(temp, in_bytes(Klass::misc_flags_offset()), temp);
+    testbitdi(flag, R0, temp, exact_log2(KlassFlags::_misc_is_value_based_class));
     bne(flag, failure);
   }
 
@@ -2752,8 +2744,8 @@ void MacroAssembler::compiler_fast_lock_lightweight_object(ConditionRegister fla
 
   if (DiagnoseSyncOnValueBasedClasses != 0) {
     load_klass(tmp1, obj);
-    lwz(tmp1, in_bytes(Klass::access_flags_offset()), tmp1);
-    testbitdi(flag, R0, tmp1, exact_log2(JVM_ACC_IS_VALUE_BASED_CLASS));
+    lbz(tmp1, in_bytes(Klass::misc_flags_offset()), tmp1);
+    testbitdi(flag, R0, tmp1, exact_log2(KlassFlags::_misc_is_value_based_class));
     bne(flag, slow_path);
   }
Original file line number	Diff line number	Diff line change
Expand Up		@@ -89,6 +89,5 @@

		void null_check(Register r, Label *Lnull = nullptr);

		address call_c_with_frame_resize(address dest, int frame_resize);

		#endif // CPU_PPC_C1_MACROASSEMBLER_PPC_HPP