New package releases (#173)

* Use latest published `svd2rust` * Bump version numbers for relevant packages
esp-rs · Dec 5, 2023 · c01397f · c01397f
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commit c01397f
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diff --git a/esp32/Cargo.toml b/esp32/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "esp32"
-version = "0.27.0"
+version = "0.28.0"
 edition = "2021"
 rust-version = "1.67"
 description = "Peripheral access crate for the ESP32"

diff --git a/esp32/src/lib.rs b/esp32/src/lib.rs
@@ -1,4 +1,4 @@
-#![doc = "Peripheral access API for ESP32 microcontrollers (generated using svd2rust v0.31.1 (c133a7b 2023-11-29))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.31.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
+#![doc = "Peripheral access API for ESP32 microcontrollers (generated using svd2rust v0.31.2 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.31.2/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
 #![allow(non_camel_case_types)]
 #![allow(non_snake_case)]
 #![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]

diff --git a/esp32/src/rmt/int_clr.rs b/esp32/src/rmt/int_clr.rs
@@ -1,12 +1,12 @@
 #[doc = "Register `INT_CLR` writer"]
 pub type W = crate::W<INT_CLR_SPEC>;
-#[doc = "Field `CH_TX_END[0-7]` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."]
+#[doc = "Field `CH_TX_END(0-7)` writer - Set this bit to clear the rmt_ch%s_rx_end_int_raw.."]
 pub type CH_TX_END_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `CH_RX_END[0-7]` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."]
+#[doc = "Field `CH_RX_END(0-7)` writer - Set this bit to clear the rmt_ch%s_tx_end_int_raw."]
 pub type CH_RX_END_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `CH_ERR[0-7]` writer - Set this bit to clear the rmt_ch%s_err_int_raw."]
+#[doc = "Field `CH_ERR(0-7)` writer - Set this bit to clear the rmt_ch%s_err_int_raw."]
 pub type CH_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `CH_TX_THR_EVENT[0-7]` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."]
+#[doc = "Field `CH_TX_THR_EVENT(0-7)` writer - Set this bit to clear the rmt_ch%s_tx_thr_event_int_raw interrupt."]
 pub type CH_TX_THR_EVENT_W<'a, REG> = crate::BitWriter<'a, REG>;
 #[cfg(feature = "impl-register-debug")]
 impl core::fmt::Debug for crate::generic::Reg<INT_CLR_SPEC> {
@@ -15,7 +15,7 @@ impl core::fmt::Debug for crate::generic::Reg<INT_CLR_SPEC> {
     }
 }
 impl W {
-    #[doc = "Set this bit to clear the rmt_ch[0-7]_rx_end_int_raw.."]
+    #[doc = "Set this bit to clear the rmt_ch(0-7)_rx_end_int_raw.."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_TX_END` field"]
     #[inline(always)]
@@ -73,7 +73,7 @@ impl W {
     pub fn ch7_tx_end(&mut self) -> CH_TX_END_W<INT_CLR_SPEC> {
         CH_TX_END_W::new(self, 21)
     }
-    #[doc = "Set this bit to clear the rmt_ch[0-7]_tx_end_int_raw."]
+    #[doc = "Set this bit to clear the rmt_ch(0-7)_tx_end_int_raw."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_RX_END` field"]
     #[inline(always)]
@@ -131,7 +131,7 @@ impl W {
     pub fn ch7_rx_end(&mut self) -> CH_RX_END_W<INT_CLR_SPEC> {
         CH_RX_END_W::new(self, 22)
     }
-    #[doc = "Set this bit to clear the rmt_ch[0-7]_err_int_raw."]
+    #[doc = "Set this bit to clear the rmt_ch(0-7)_err_int_raw."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_ERR` field"]
     #[inline(always)]
@@ -189,7 +189,7 @@ impl W {
     pub fn ch7_err(&mut self) -> CH_ERR_W<INT_CLR_SPEC> {
         CH_ERR_W::new(self, 23)
     }
-    #[doc = "Set this bit to clear the rmt_ch[0-7]_tx_thr_event_int_raw interrupt."]
+    #[doc = "Set this bit to clear the rmt_ch(0-7)_tx_thr_event_int_raw interrupt."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_TX_THR_EVENT` field"]
     #[inline(always)]

diff --git a/esp32/src/rmt/int_ena.rs b/esp32/src/rmt/int_ena.rs
@@ -2,24 +2,24 @@
 pub type R = crate::R<INT_ENA_SPEC>;
 #[doc = "Register `INT_ENA` writer"]
 pub type W = crate::W<INT_ENA_SPEC>;
-#[doc = "Field `CH_TX_END[0-7]` reader - Set this bit to enable rmt_ch%s_tx_end_int_st."]
+#[doc = "Field `CH_TX_END(0-7)` reader - Set this bit to enable rmt_ch%s_tx_end_int_st."]
 pub type CH_TX_END_R = crate::BitReader;
-#[doc = "Field `CH_TX_END[0-7]` writer - Set this bit to enable rmt_ch%s_tx_end_int_st."]
+#[doc = "Field `CH_TX_END(0-7)` writer - Set this bit to enable rmt_ch%s_tx_end_int_st."]
 pub type CH_TX_END_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `CH_RX_END[0-7]` reader - Set this bit to enable rmt_ch%s_rx_end_int_st."]
+#[doc = "Field `CH_RX_END(0-7)` reader - Set this bit to enable rmt_ch%s_rx_end_int_st."]
 pub type CH_RX_END_R = crate::BitReader;
-#[doc = "Field `CH_RX_END[0-7]` writer - Set this bit to enable rmt_ch%s_rx_end_int_st."]
+#[doc = "Field `CH_RX_END(0-7)` writer - Set this bit to enable rmt_ch%s_rx_end_int_st."]
 pub type CH_RX_END_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `CH_ERR[0-7]` reader - Set this bit to enable rmt_ch%s_err_int_st."]
+#[doc = "Field `CH_ERR(0-7)` reader - Set this bit to enable rmt_ch%s_err_int_st."]
 pub type CH_ERR_R = crate::BitReader;
-#[doc = "Field `CH_ERR[0-7]` writer - Set this bit to enable rmt_ch%s_err_int_st."]
+#[doc = "Field `CH_ERR(0-7)` writer - Set this bit to enable rmt_ch%s_err_int_st."]
 pub type CH_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `CH_TX_THR_EVENT[0-7]` reader - Set this bit to enable rmt_ch%s_tx_thr_event_int_st."]
+#[doc = "Field `CH_TX_THR_EVENT(0-7)` reader - Set this bit to enable rmt_ch%s_tx_thr_event_int_st."]
 pub type CH_TX_THR_EVENT_R = crate::BitReader;
-#[doc = "Field `CH_TX_THR_EVENT[0-7]` writer - Set this bit to enable rmt_ch%s_tx_thr_event_int_st."]
+#[doc = "Field `CH_TX_THR_EVENT(0-7)` writer - Set this bit to enable rmt_ch%s_tx_thr_event_int_st."]
 pub type CH_TX_THR_EVENT_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl R {
-    #[doc = "Set this bit to enable rmt_ch[0-7]_tx_end_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_tx_end_int_st."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_TX_END` field"]
     #[inline(always)]
@@ -29,7 +29,7 @@ impl R {
         CH_TX_END_R::new(((self.bits >> (n * 3)) & 1) != 0)
     }
     #[doc = "Iterator for array of:"]
-    #[doc = "Set this bit to enable rmt_ch[0-7]_tx_end_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_tx_end_int_st."]
     #[inline(always)]
     pub fn ch_tx_end_iter(&self) -> impl Iterator<Item = CH_TX_END_R> + '_ {
         (0..8).map(|n| CH_TX_END_R::new(((self.bits >> (n * 3)) & 1) != 0))
@@ -74,7 +74,7 @@ impl R {
     pub fn ch7_tx_end(&self) -> CH_TX_END_R {
         CH_TX_END_R::new(((self.bits >> 21) & 1) != 0)
     }
-    #[doc = "Set this bit to enable rmt_ch[0-7]_rx_end_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_rx_end_int_st."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_RX_END` field"]
     #[inline(always)]
@@ -84,7 +84,7 @@ impl R {
         CH_RX_END_R::new(((self.bits >> (n * 3 + 1)) & 1) != 0)
     }
     #[doc = "Iterator for array of:"]
-    #[doc = "Set this bit to enable rmt_ch[0-7]_rx_end_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_rx_end_int_st."]
     #[inline(always)]
     pub fn ch_rx_end_iter(&self) -> impl Iterator<Item = CH_RX_END_R> + '_ {
         (0..8).map(|n| CH_RX_END_R::new(((self.bits >> (n * 3 + 1)) & 1) != 0))
@@ -129,7 +129,7 @@ impl R {
     pub fn ch7_rx_end(&self) -> CH_RX_END_R {
         CH_RX_END_R::new(((self.bits >> 22) & 1) != 0)
     }
-    #[doc = "Set this bit to enable rmt_ch[0-7]_err_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_err_int_st."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_ERR` field"]
     #[inline(always)]
@@ -139,7 +139,7 @@ impl R {
         CH_ERR_R::new(((self.bits >> (n * 3 + 2)) & 1) != 0)
     }
     #[doc = "Iterator for array of:"]
-    #[doc = "Set this bit to enable rmt_ch[0-7]_err_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_err_int_st."]
     #[inline(always)]
     pub fn ch_err_iter(&self) -> impl Iterator<Item = CH_ERR_R> + '_ {
         (0..8).map(|n| CH_ERR_R::new(((self.bits >> (n * 3 + 2)) & 1) != 0))
@@ -184,7 +184,7 @@ impl R {
     pub fn ch7_err(&self) -> CH_ERR_R {
         CH_ERR_R::new(((self.bits >> 23) & 1) != 0)
     }
-    #[doc = "Set this bit to enable rmt_ch[0-7]_tx_thr_event_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_tx_thr_event_int_st."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_TX_THR_EVENT` field"]
     #[inline(always)]
@@ -194,7 +194,7 @@ impl R {
         CH_TX_THR_EVENT_R::new(((self.bits >> (n + 24)) & 1) != 0)
     }
     #[doc = "Iterator for array of:"]
-    #[doc = "Set this bit to enable rmt_ch[0-7]_tx_thr_event_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_tx_thr_event_int_st."]
     #[inline(always)]
     pub fn ch_tx_thr_event_iter(&self) -> impl Iterator<Item = CH_TX_THR_EVENT_R> + '_ {
         (0..8).map(|n| CH_TX_THR_EVENT_R::new(((self.bits >> (n + 24)) & 1) != 0))
@@ -310,7 +310,7 @@ impl core::fmt::Debug for crate::generic::Reg<INT_ENA_SPEC> {
     }
 }
 impl W {
-    #[doc = "Set this bit to enable rmt_ch[0-7]_tx_end_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_tx_end_int_st."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_TX_END` field"]
     #[inline(always)]
@@ -368,7 +368,7 @@ impl W {
     pub fn ch7_tx_end(&mut self) -> CH_TX_END_W<INT_ENA_SPEC> {
         CH_TX_END_W::new(self, 21)
     }
-    #[doc = "Set this bit to enable rmt_ch[0-7]_rx_end_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_rx_end_int_st."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_RX_END` field"]
     #[inline(always)]
@@ -426,7 +426,7 @@ impl W {
     pub fn ch7_rx_end(&mut self) -> CH_RX_END_W<INT_ENA_SPEC> {
         CH_RX_END_W::new(self, 22)
     }
-    #[doc = "Set this bit to enable rmt_ch[0-7]_err_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_err_int_st."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_ERR` field"]
     #[inline(always)]
@@ -484,7 +484,7 @@ impl W {
     pub fn ch7_err(&mut self) -> CH_ERR_W<INT_ENA_SPEC> {
         CH_ERR_W::new(self, 23)
     }
-    #[doc = "Set this bit to enable rmt_ch[0-7]_tx_thr_event_int_st."]
+    #[doc = "Set this bit to enable rmt_ch(0-7)_tx_thr_event_int_st."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_TX_THR_EVENT` field"]
     #[inline(always)]

diff --git a/esp32/src/rmt/int_raw.rs b/esp32/src/rmt/int_raw.rs
@@ -1,15 +1,15 @@
 #[doc = "Register `INT_RAW` reader"]
 pub type R = crate::R<INT_RAW_SPEC>;
-#[doc = "Field `CH_TX_END[0-7]` reader - The interrupt raw bit for channel %s turns to high level when the transmit process is done."]
+#[doc = "Field `CH_TX_END(0-7)` reader - The interrupt raw bit for channel %s turns to high level when the transmit process is done."]
 pub type CH_TX_END_R = crate::BitReader;
-#[doc = "Field `CH_RX_END[0-7]` reader - The interrupt raw bit for channel %s turns to high level when the receive process is done."]
+#[doc = "Field `CH_RX_END(0-7)` reader - The interrupt raw bit for channel %s turns to high level when the receive process is done."]
 pub type CH_RX_END_R = crate::BitReader;
-#[doc = "Field `CH_ERR[0-7]` reader - The interrupt raw bit for channel %s turns to high level when channle %s detects some errors."]
+#[doc = "Field `CH_ERR(0-7)` reader - The interrupt raw bit for channel %s turns to high level when channle %s detects some errors."]
 pub type CH_ERR_R = crate::BitReader;
-#[doc = "Field `CH_TX_THR_EVENT[0-7]` reader - The interrupt raw bit for channel %s turns to high level when transmitter in channle%s have send datas more than reg_rmt_tx_lim_ch%s after detecting this interrupt software can updata the old datas with new datas."]
+#[doc = "Field `CH_TX_THR_EVENT(0-7)` reader - The interrupt raw bit for channel %s turns to high level when transmitter in channle%s have send datas more than reg_rmt_tx_lim_ch%s after detecting this interrupt software can updata the old datas with new datas."]
 pub type CH_TX_THR_EVENT_R = crate::BitReader;
 impl R {
-    #[doc = "The interrupt raw bit for channel [0-7] turns to high level when the transmit process is done."]
+    #[doc = "The interrupt raw bit for channel (0-7) turns to high level when the transmit process is done."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_TX_END` field"]
     #[inline(always)]
@@ -19,7 +19,7 @@ impl R {
         CH_TX_END_R::new(((self.bits >> (n * 3)) & 1) != 0)
     }
     #[doc = "Iterator for array of:"]
-    #[doc = "The interrupt raw bit for channel [0-7] turns to high level when the transmit process is done."]
+    #[doc = "The interrupt raw bit for channel (0-7) turns to high level when the transmit process is done."]
     #[inline(always)]
     pub fn ch_tx_end_iter(&self) -> impl Iterator<Item = CH_TX_END_R> + '_ {
         (0..8).map(|n| CH_TX_END_R::new(((self.bits >> (n * 3)) & 1) != 0))
@@ -64,7 +64,7 @@ impl R {
     pub fn ch7_tx_end(&self) -> CH_TX_END_R {
         CH_TX_END_R::new(((self.bits >> 21) & 1) != 0)
     }
-    #[doc = "The interrupt raw bit for channel [0-7] turns to high level when the receive process is done."]
+    #[doc = "The interrupt raw bit for channel (0-7) turns to high level when the receive process is done."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_RX_END` field"]
     #[inline(always)]
@@ -74,7 +74,7 @@ impl R {
         CH_RX_END_R::new(((self.bits >> (n * 3 + 1)) & 1) != 0)
     }
     #[doc = "Iterator for array of:"]
-    #[doc = "The interrupt raw bit for channel [0-7] turns to high level when the receive process is done."]
+    #[doc = "The interrupt raw bit for channel (0-7) turns to high level when the receive process is done."]
     #[inline(always)]
     pub fn ch_rx_end_iter(&self) -> impl Iterator<Item = CH_RX_END_R> + '_ {
         (0..8).map(|n| CH_RX_END_R::new(((self.bits >> (n * 3 + 1)) & 1) != 0))
@@ -119,7 +119,7 @@ impl R {
     pub fn ch7_rx_end(&self) -> CH_RX_END_R {
         CH_RX_END_R::new(((self.bits >> 22) & 1) != 0)
     }
-    #[doc = "The interrupt raw bit for channel [0-7] turns to high level when channle [0-7] detects some errors."]
+    #[doc = "The interrupt raw bit for channel (0-7) turns to high level when channle (0-7) detects some errors."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_ERR` field"]
     #[inline(always)]
@@ -129,7 +129,7 @@ impl R {
         CH_ERR_R::new(((self.bits >> (n * 3 + 2)) & 1) != 0)
     }
     #[doc = "Iterator for array of:"]
-    #[doc = "The interrupt raw bit for channel [0-7] turns to high level when channle [0-7] detects some errors."]
+    #[doc = "The interrupt raw bit for channel (0-7) turns to high level when channle (0-7) detects some errors."]
     #[inline(always)]
     pub fn ch_err_iter(&self) -> impl Iterator<Item = CH_ERR_R> + '_ {
         (0..8).map(|n| CH_ERR_R::new(((self.bits >> (n * 3 + 2)) & 1) != 0))
@@ -174,7 +174,7 @@ impl R {
     pub fn ch7_err(&self) -> CH_ERR_R {
         CH_ERR_R::new(((self.bits >> 23) & 1) != 0)
     }
-    #[doc = "The interrupt raw bit for channel [0-7] turns to high level when transmitter in channle[0-7] have send datas more than reg_rmt_tx_lim_ch[0-7] after detecting this interrupt software can updata the old datas with new datas."]
+    #[doc = "The interrupt raw bit for channel (0-7) turns to high level when transmitter in channle(0-7) have send datas more than reg_rmt_tx_lim_ch(0-7) after detecting this interrupt software can updata the old datas with new datas."]
     #[doc = ""]
     #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `CH0_TX_THR_EVENT` field"]
     #[inline(always)]
@@ -184,7 +184,7 @@ impl R {
         CH_TX_THR_EVENT_R::new(((self.bits >> (n + 24)) & 1) != 0)
     }
     #[doc = "Iterator for array of:"]
-    #[doc = "The interrupt raw bit for channel [0-7] turns to high level when transmitter in channle[0-7] have send datas more than reg_rmt_tx_lim_ch[0-7] after detecting this interrupt software can updata the old datas with new datas."]
+    #[doc = "The interrupt raw bit for channel (0-7) turns to high level when transmitter in channle(0-7) have send datas more than reg_rmt_tx_lim_ch(0-7) after detecting this interrupt software can updata the old datas with new datas."]
     #[inline(always)]
     pub fn ch_tx_thr_event_iter(&self) -> impl Iterator<Item = CH_TX_THR_EVENT_R> + '_ {
         (0..8).map(|n| CH_TX_THR_EVENT_R::new(((self.bits >> (n + 24)) & 1) != 0))