soc/ethernet: enable full_memory_we by default for Quartus toolchain #2140
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There is an reported issue with Quartus toolchain, that fails to infer memories with multiple write enable signals.
It is a problem for liteeth module with large buffers (enjoy-digital/liteeth#63) which was fixed and later changed to configurable
full_memory_weoption in enjoy-digital/liteeth#72, because of regression on other FPGAs.However, this option/problem is not documented and not used in existing codebase, and leads to unexpected, difficult to trace problems with high device utilization.
Because of that, I think it would be a good idea to enable this option by default if Quartus toolchain is detected.
The second place where
full_memory_weoption is defined is L2 Cache, where it is enabled by default for all targets.