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[NativeAOT] Linux/ARM bring-up (3/n) #97104

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merged 19 commits into from
Jan 19, 2024
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6e92aed
Mask thumb bit when setting IP in a context (eg. palContext->SetIp((u…
filipnavara Jan 16, 2024
ca93010
Set ExInfo.m_pExContext in RhpThrowHwEx
filipnavara Jan 16, 2024
e774599
Remove REGDISPLAY.GetAddrOfIP and it's only usage
filipnavara Jan 16, 2024
0fcb0f3
Resolve ARM relocations (also workarounds LLD bug with thumb bit pres…
filipnavara Jan 16, 2024
bb99418
Remove REGDISPLAY.pIP/SetAddrOfIP
filipnavara Jan 16, 2024
a689b60
Make most of the assembly code PIE compatible
filipnavara Jan 16, 2024
195edde
NativeAOT: Enable DFEATURE_64BIT_ALIGNMENT on linux-arm
filipnavara Jan 16, 2024
5015d9f
Enable NativeAOT linux-arm build
filipnavara Jan 16, 2024
7888ade
Enable DWARF exception handling for linux-arm
filipnavara Jan 16, 2024
b24b063
Fix UnwindFuncletInvokeThunk to skip over r2 register saved on stack …
filipnavara Jan 17, 2024
59b6def
Fix signature of P/Invoke native code in SafeHandleTest to match the …
filipnavara Jan 17, 2024
563f56a
Implement missing StackFrameIterator::InternalInit code for ARM
filipnavara Jan 17, 2024
a92df1e
Fix thumb bit masking in InInterfaceDispatchHelper
filipnavara Jan 18, 2024
efb7889
Workaround: Ensure the Thumb bit is set when looking up method info i…
filipnavara Jan 17, 2024
b41c7e4
Correctly convert the addend for IMAGE_REL_BASED_THUMB_MOV32[_PCREL] …
filipnavara Jan 19, 2024
90028c3
Simplify CMake condition
filipnavara Jan 19, 2024
b242d0d
Simplify NativeAotSupported conditions
filipnavara Jan 19, 2024
5e70f46
Fix typo
filipnavara Jan 19, 2024
07b6dcd
Fix IMAGE_REL_BASED_THUMB_MOV32 conversion to ELF
filipnavara Jan 19, 2024
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1 change: 1 addition & 0 deletions eng/Subsets.props
Original file line number Diff line number Diff line change
Expand Up @@ -113,6 +113,7 @@
<PropertyGroup>
<!-- CLR NativeAot only builds in a subset of the matrix -->
<NativeAotSupported Condition="('$(TargetOS)' == 'windows' or '$(TargetOS)' == 'linux' or '$(TargetOS)' == 'osx' or '$(TargetOS)' == 'maccatalyst' or '$(TargetOS)' == 'iossimulator' or '$(TargetOS)' == 'ios' or '$(TargetOS)' == 'tvossimulator' or '$(TargetOS)' == 'tvos' or '$(TargetOS)' == 'freebsd') and ('$(TargetArchitecture)' == 'x64' or '$(TargetArchitecture)' == 'arm64')">true</NativeAotSupported>
<NativeAotSupported Condition="'$(TargetOS)' == 'linux' and '$(TargetArchitecture)' == 'arm'">true</NativeAotSupported>
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<!-- If we're building clr.nativeaotlibs and not building the CLR runtime, compile libraries against NativeAOT CoreLib -->
<UseNativeAotCoreLib Condition="'$(TestNativeAot)' == 'true' or ($(_subset.Contains('+clr.nativeaotlibs+')) and !$(_subset.Contains('+clr.native+')) and !$(_subset.Contains('+clr.runtime+')))">true</UseNativeAotCoreLib>
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -147,7 +147,7 @@ add_subdirectory(tools/aot/jitinterface)

if(NOT CLR_CROSS_COMPONENTS_BUILD)
# NativeAOT only buildable for a subset of CoreCLR-supported configurations
if(CLR_CMAKE_HOST_ARCH_ARM64 OR CLR_CMAKE_HOST_ARCH_AMD64)
if(CLR_CMAKE_HOST_ARCH_ARM64 OR CLR_CMAKE_HOST_ARCH_AMD64 OR CLR_CMAKE_HOST_ARCH_ARM)
add_subdirectory(nativeaot)
endif()
endif(NOT CLR_CROSS_COMPONENTS_BUILD)
Expand Down
3 changes: 3 additions & 0 deletions src/coreclr/nativeaot/Runtime/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -239,6 +239,9 @@ add_definitions(-DFEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP)
if(CLR_CMAKE_TARGET_ARCH_AMD64 OR CLR_CMAKE_TARGET_ARCH_ARM64)
add_definitions(-DFEATURE_MANUALLY_MANAGED_CARD_BUNDLES)
endif(CLR_CMAKE_TARGET_ARCH_AMD64 OR CLR_CMAKE_TARGET_ARCH_ARM64)
if(CLR_CMAKE_TARGET_ARCH_ARM)
add_definitions(-DFEATURE_64BIT_ALIGNMENT)
endif(CLR_CMAKE_TARGET_ARCH_ARM)

add_definitions(-DFEATURE_CUSTOM_IMPORTS)
add_definitions(-DFEATURE_DYNAMIC_CODE)
Expand Down
9 changes: 5 additions & 4 deletions src/coreclr/nativeaot/Runtime/EHHelpers.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,7 @@
#include "rhbinder.h"
#include "MethodTable.h"
#include "MethodTable.inl"
#include "CommonMacros.inl"

COOP_PINVOKE_HELPER(FC_BOOL_RET, RhpEHEnumInitFromStackFrameIterator, (
StackFrameIterator* pFrameIter, void ** pMethodStartAddressOut, EHEnum* pEHEnum))
Expand Down Expand Up @@ -327,7 +328,7 @@ static bool InWriteBarrierHelper(uintptr_t faultingIP)
ASSERT(*(uint8_t*)writeBarrierAVLocations[i] != 0xE9); // jmp XXXXXXXX
#endif

if (writeBarrierAVLocations[i] == faultingIP)
if (PCODEToPINSTR(writeBarrierAVLocations[i]) == faultingIP)
return true;
}
#endif // USE_PORTABLE_HELPERS
Expand Down Expand Up @@ -368,7 +369,7 @@ static bool InInterfaceDispatchHelper(uintptr_t faultingIP)
ASSERT(*(uint8_t*)interfaceDispatchAVLocations[i] != 0xE9); // jmp XXXXXXXX
#endif

if (interfaceDispatchAVLocations[i] == faultingIP)
if (PCODEToPINSTR(interfaceDispatchAVLocations[i]) == faultingIP)
return true;
}
#endif // USE_PORTABLE_HELPERS
Expand Down Expand Up @@ -458,7 +459,7 @@ int32_t __stdcall RhpHardwareExceptionHandler(uintptr_t faultCode, uintptr_t fau
{
*arg0Reg = faultCode;
*arg1Reg = faultingIP;
palContext->SetIp((uintptr_t)&RhpThrowHwEx);
palContext->SetIp(PCODEToPINSTR((PCODE)&RhpThrowHwEx));

return EXCEPTION_CONTINUE_EXECUTION;
}
Expand Down Expand Up @@ -542,7 +543,7 @@ int32_t __stdcall RhpVectoredExceptionHandler(PEXCEPTION_POINTERS pExPtrs)

if (translateToManagedException)
{
pExPtrs->ContextRecord->SetIp((uintptr_t)&RhpThrowHwEx);
pExPtrs->ContextRecord->SetIp(PCODEToPINSTR((PCODE)&RhpThrowHwEx));
pExPtrs->ContextRecord->SetArg0Reg(faultCode);
pExPtrs->ContextRecord->SetArg1Reg(faultingIP);

Expand Down
42 changes: 22 additions & 20 deletions src/coreclr/nativeaot/Runtime/StackFrameIterator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -179,8 +179,7 @@ void StackFrameIterator::InternalInit(Thread * pThreadToWalk, PInvokeTransitionF
#if !defined(USE_PORTABLE_HELPERS) // @TODO: no portable version of regdisplay
memset(&m_RegDisplay, 0, sizeof(m_RegDisplay));
m_RegDisplay.SetIP((PCODE)pFrame->m_RIP);
m_RegDisplay.SetAddrOfIP((PTR_PCODE)PTR_HOST_MEMBER(PInvokeTransitionFrame, pFrame, m_RIP));
SetControlPC(dac_cast<PTR_VOID>(*(m_RegDisplay.pIP)));
SetControlPC(dac_cast<PTR_VOID>(m_RegDisplay.GetIP()));

PTR_UIntNative pPreservedRegsCursor = (PTR_UIntNative)PTR_HOST_MEMBER(PInvokeTransitionFrame, pFrame, m_PreservedRegs);

Expand Down Expand Up @@ -388,7 +387,6 @@ void StackFrameIterator::InternalInit(Thread * pThreadToWalk, PTR_PAL_LIMITED_CO
SetControlPC(dac_cast<PTR_VOID>(pCtx->GetIp()));
m_RegDisplay.SP = pCtx->GetSp();
m_RegDisplay.IP = pCtx->GetIp();
m_RegDisplay.pIP = PTR_TO_MEMBER(PAL_LIMITED_CONTEXT, pCtx, IP);

#ifdef TARGET_ARM
//
Expand Down Expand Up @@ -540,8 +538,6 @@ void StackFrameIterator::InternalInit(Thread * pThreadToWalk, NATIVE_CONTEXT* pC

#ifdef TARGET_ARM64

m_RegDisplay.pIP = (PTR_PCODE)PTR_TO_REG(pCtx, Pc);

//
// preserved regs
//
Expand Down Expand Up @@ -583,8 +579,6 @@ void StackFrameIterator::InternalInit(Thread * pThreadToWalk, NATIVE_CONTEXT* pC

#elif defined(TARGET_X86) || defined(TARGET_AMD64)

m_RegDisplay.pIP = (PTR_PCODE)PTR_TO_REG(pCtx, Rip);

//
// preserved regs
//
Expand All @@ -611,6 +605,19 @@ void StackFrameIterator::InternalInit(Thread * pThreadToWalk, NATIVE_CONTEXT* pC
m_RegDisplay.pR10 = (PTR_UIntNative)PTR_TO_REG(pCtx, R10);
m_RegDisplay.pR11 = (PTR_UIntNative)PTR_TO_REG(pCtx, R11);
#endif // TARGET_AMD64
#elif defined(TARGET_ARM)

m_RegDisplay.pR0 = (PTR_UIntNative)PTR_TO_REG(pCtx, R0);
m_RegDisplay.pR1 = (PTR_UIntNative)PTR_TO_REG(pCtx, R1);
m_RegDisplay.pR4 = (PTR_UIntNative)PTR_TO_REG(pCtx, R4);
m_RegDisplay.pR5 = (PTR_UIntNative)PTR_TO_REG(pCtx, R5);
m_RegDisplay.pR6 = (PTR_UIntNative)PTR_TO_REG(pCtx, R6);
m_RegDisplay.pR7 = (PTR_UIntNative)PTR_TO_REG(pCtx, R7);
m_RegDisplay.pR8 = (PTR_UIntNative)PTR_TO_REG(pCtx, R8);
m_RegDisplay.pR9 = (PTR_UIntNative)PTR_TO_REG(pCtx, R9);
m_RegDisplay.pR10 = (PTR_UIntNative)PTR_TO_REG(pCtx, R10);
m_RegDisplay.pR11 = (PTR_UIntNative)PTR_TO_REG(pCtx, R11);
m_RegDisplay.pLR = (PTR_UIntNative)PTR_TO_REG(pCtx, Lr);
#else
PORTABILITY_ASSERT("StackFrameIterator::InternalInit");
#endif // TARGET_ARM
Expand Down Expand Up @@ -779,10 +786,9 @@ void StackFrameIterator::UnwindFuncletInvokeThunk()
#ifdef TARGET_X86
// First, unwind RhpCallFunclet
SP = (PTR_UIntNative)(m_RegDisplay.SP + 0x4); // skip the saved assembly-routine-EBP
m_RegDisplay.SetAddrOfIP(SP);
m_RegDisplay.SetIP(*SP++);
m_RegDisplay.SetSP((uintptr_t)dac_cast<TADDR>(SP));
SetControlPC(dac_cast<PTR_VOID>(*(m_RegDisplay.pIP)));
SetControlPC(dac_cast<PTR_VOID>(m_RegDisplay.GetIP()));

ASSERT(
EQUALS_RETURN_ADDRESS(m_ControlPC, RhpCallCatchFunclet2) ||
Expand Down Expand Up @@ -908,12 +914,12 @@ void StackFrameIterator::UnwindFuncletInvokeThunk()

SP = (PTR_UIntNative)d;

// RhpCallCatchFunclet puts a couple of extra things on the stack that aren't put there by the other two
// thunks, but we don't need to know what they are here, so we just skip them.
SP += EQUALS_RETURN_ADDRESS(m_ControlPC, RhpCallCatchFunclet2) ? 3 : 1;

if (!isFilterInvoke)
{
// RhpCallCatchFunclet puts a couple of extra things on the stack that aren't put there by the other two
// thunks, but we don't need to know what they are here, so we just skip them.
SP += EQUALS_RETURN_ADDRESS(m_ControlPC, RhpCallCatchFunclet2) ? 3 : 1;

// Save the preserved regs portion of the REGDISPLAY across the unwind through the C# EH dispatch code.
m_funcletPtrs.pR4 = m_RegDisplay.pR4;
m_funcletPtrs.pR5 = m_RegDisplay.pR5;
Expand Down Expand Up @@ -966,7 +972,6 @@ void StackFrameIterator::UnwindFuncletInvokeThunk()

m_RegDisplay.pFP = SP++;

m_RegDisplay.SetAddrOfIP((PTR_PCODE)SP);
m_RegDisplay.SetIP(*SP++);

m_RegDisplay.pX19 = SP++;
Expand All @@ -986,12 +991,11 @@ void StackFrameIterator::UnwindFuncletInvokeThunk()
#endif

#if !defined(TARGET_ARM64)
m_RegDisplay.SetAddrOfIP((PTR_PCODE)SP);
m_RegDisplay.SetIP(*SP++);
#endif

m_RegDisplay.SetSP((uintptr_t)dac_cast<TADDR>(SP));
SetControlPC(dac_cast<PTR_VOID>(*(m_RegDisplay.pIP)));
SetControlPC(dac_cast<PTR_VOID>(m_RegDisplay.GetIP()));

// We expect to be called by the runtime's C# EH implementation, and since this function's notion of how
// to unwind through the stub is brittle relative to the stub itself, we want to check as soon as we can.
Expand Down Expand Up @@ -1170,10 +1174,9 @@ void StackFrameIterator::UnwindUniversalTransitionThunk()
stackFrame->UnwindNonVolatileRegisters(&m_RegDisplay);

PTR_UIntNative addressOfPushedCallerIP = stackFrame->get_AddressOfPushedCallerIP();
m_RegDisplay.SetAddrOfIP((PTR_PCODE)addressOfPushedCallerIP);
m_RegDisplay.SetIP(*addressOfPushedCallerIP);
m_RegDisplay.SetSP((uintptr_t)dac_cast<TADDR>(stackFrame->get_CallerSP()));
SetControlPC(dac_cast<PTR_VOID>(*(m_RegDisplay.pIP)));
SetControlPC(dac_cast<PTR_VOID>(m_RegDisplay.GetIP()));

// All universal transition cases rely on conservative GC reporting being applied to the
// full argument set that flowed into the call. Report the lower bound of this range (the
Expand Down Expand Up @@ -1262,7 +1265,6 @@ void StackFrameIterator::UnwindThrowSiteThunk()
ASSERT_UNCONDITIONALLY("NYI for this arch");
#endif

m_RegDisplay.SetAddrOfIP(PTR_TO_MEMBER(PAL_LIMITED_CONTEXT, pContext, IP));
m_RegDisplay.SetIP(pContext->IP);
m_RegDisplay.SetSP(pContext->GetSp());
SetControlPC(dac_cast<PTR_VOID>(pContext->IP));
Expand Down Expand Up @@ -1355,7 +1357,7 @@ void StackFrameIterator::NextInternal()
// if the thread is safe to walk, it better not have a hijack in place.
ASSERT(!m_pThread->IsHijacked());

SetControlPC(dac_cast<PTR_VOID>(*(m_RegDisplay.GetAddrOfIP())));
SetControlPC(dac_cast<PTR_VOID>(m_RegDisplay.GetIP()));

PTR_VOID collapsingTargetFrame = NULL;

Expand Down
12 changes: 6 additions & 6 deletions src/coreclr/nativeaot/Runtime/amd64/AsmOffsetsCpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -71,28 +71,28 @@ PLAT_ASM_OFFSET(90, REGDISPLAY, Xmm)

#else // !UNIX_AMD64_ABI

PLAT_ASM_SIZEOF(1b0, ExInfo)
PLAT_ASM_SIZEOF(1a8, ExInfo)
PLAT_ASM_OFFSET(0, ExInfo, m_pPrevExInfo)
PLAT_ASM_OFFSET(8, ExInfo, m_pExContext)
PLAT_ASM_OFFSET(10, ExInfo, m_exception)
PLAT_ASM_OFFSET(18, ExInfo, m_kind)
PLAT_ASM_OFFSET(19, ExInfo, m_passNumber)
PLAT_ASM_OFFSET(1c, ExInfo, m_idxCurClause)
PLAT_ASM_OFFSET(20, ExInfo, m_frameIter)
PLAT_ASM_OFFSET(1a8, ExInfo, m_notifyDebuggerSP)
PLAT_ASM_OFFSET(1a0, ExInfo, m_notifyDebuggerSP)

PLAT_ASM_OFFSET(0, PInvokeTransitionFrame, m_RIP)
PLAT_ASM_OFFSET(8, PInvokeTransitionFrame, m_FramePointer)
PLAT_ASM_OFFSET(10, PInvokeTransitionFrame, m_pThread)
PLAT_ASM_OFFSET(18, PInvokeTransitionFrame, m_Flags)
PLAT_ASM_OFFSET(20, PInvokeTransitionFrame, m_PreservedRegs)

PLAT_ASM_SIZEOF(188, StackFrameIterator)
PLAT_ASM_SIZEOF(180, StackFrameIterator)
PLAT_ASM_OFFSET(10, StackFrameIterator, m_FramePointer)
PLAT_ASM_OFFSET(18, StackFrameIterator, m_ControlPC)
PLAT_ASM_OFFSET(20, StackFrameIterator, m_RegDisplay)
PLAT_ASM_OFFSET(178, StackFrameIterator, m_OriginalControlPC)
PLAT_ASM_OFFSET(180, StackFrameIterator, m_pPreviousTransitionFrame)
PLAT_ASM_OFFSET(170, StackFrameIterator, m_OriginalControlPC)
PLAT_ASM_OFFSET(178, StackFrameIterator, m_pPreviousTransitionFrame)

PLAT_ASM_SIZEOF(50, PAL_LIMITED_CONTEXT)
PLAT_ASM_OFFSET(0, PAL_LIMITED_CONTEXT, IP)
Expand All @@ -108,7 +108,7 @@ PLAT_ASM_OFFSET(38, PAL_LIMITED_CONTEXT, R13)
PLAT_ASM_OFFSET(40, PAL_LIMITED_CONTEXT, R14)
PLAT_ASM_OFFSET(48, PAL_LIMITED_CONTEXT, R15)

PLAT_ASM_SIZEOF(90, REGDISPLAY)
PLAT_ASM_SIZEOF(88, REGDISPLAY)
PLAT_ASM_OFFSET(78, REGDISPLAY, SP)

PLAT_ASM_OFFSET(18, REGDISPLAY, pRbx)
Expand Down
14 changes: 7 additions & 7 deletions src/coreclr/nativeaot/Runtime/arm/AsmOffsetsCpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -7,28 +7,28 @@
//
// NOTE: the offsets MUST be in hex notation WITHOUT the 0x prefix

PLAT_ASM_SIZEOF(140, ExInfo)
PLAT_ASM_SIZEOF(138, ExInfo)
PLAT_ASM_OFFSET(0, ExInfo, m_pPrevExInfo)
PLAT_ASM_OFFSET(4, ExInfo, m_pExContext)
PLAT_ASM_OFFSET(8, ExInfo, m_exception)
PLAT_ASM_OFFSET(0c, ExInfo, m_kind)
PLAT_ASM_OFFSET(0d, ExInfo, m_passNumber)
PLAT_ASM_OFFSET(10, ExInfo, m_idxCurClause)
PLAT_ASM_OFFSET(18, ExInfo, m_frameIter)
PLAT_ASM_OFFSET(138, ExInfo, m_notifyDebuggerSP)
PLAT_ASM_OFFSET(130, ExInfo, m_notifyDebuggerSP)

PLAT_ASM_OFFSET(4, PInvokeTransitionFrame, m_RIP)
PLAT_ASM_OFFSET(8, PInvokeTransitionFrame, m_FramePointer)
PLAT_ASM_OFFSET(0c, PInvokeTransitionFrame, m_pThread)
PLAT_ASM_OFFSET(10, PInvokeTransitionFrame, m_Flags)
PLAT_ASM_OFFSET(14, PInvokeTransitionFrame, m_PreservedRegs)

PLAT_ASM_SIZEOF(120, StackFrameIterator)
PLAT_ASM_SIZEOF(118, StackFrameIterator)
PLAT_ASM_OFFSET(08, StackFrameIterator, m_FramePointer)
PLAT_ASM_OFFSET(0c, StackFrameIterator, m_ControlPC)
PLAT_ASM_OFFSET(10, StackFrameIterator, m_RegDisplay)
PLAT_ASM_OFFSET(114, StackFrameIterator, m_OriginalControlPC)
PLAT_ASM_OFFSET(118, StackFrameIterator, m_pPreviousTransitionFrame)
PLAT_ASM_OFFSET(10c, StackFrameIterator, m_OriginalControlPC)
PLAT_ASM_OFFSET(110, StackFrameIterator, m_pPreviousTransitionFrame)

PLAT_ASM_SIZEOF(70, PAL_LIMITED_CONTEXT)
PLAT_ASM_OFFSET(24, PAL_LIMITED_CONTEXT, IP)
Expand All @@ -45,7 +45,7 @@ PLAT_ASM_OFFSET(20, PAL_LIMITED_CONTEXT, R11)
PLAT_ASM_OFFSET(28, PAL_LIMITED_CONTEXT, SP)
PLAT_ASM_OFFSET(2c, PAL_LIMITED_CONTEXT, LR)

PLAT_ASM_SIZEOF(88, REGDISPLAY)
PLAT_ASM_SIZEOF(80, REGDISPLAY)
PLAT_ASM_OFFSET(38, REGDISPLAY, SP)

PLAT_ASM_OFFSET(10, REGDISPLAY, pR4)
Expand All @@ -56,4 +56,4 @@ PLAT_ASM_OFFSET(20, REGDISPLAY, pR8)
PLAT_ASM_OFFSET(24, REGDISPLAY, pR9)
PLAT_ASM_OFFSET(28, REGDISPLAY, pR10)
PLAT_ASM_OFFSET(2c, REGDISPLAY, pR11)
PLAT_ASM_OFFSET(48, REGDISPLAY, D)
PLAT_ASM_OFFSET(40, REGDISPLAY, D)
4 changes: 4 additions & 0 deletions src/coreclr/nativeaot/Runtime/arm/ExceptionHandling.S
Original file line number Diff line number Diff line change
Expand Up @@ -62,6 +62,10 @@ NESTED_ENTRY RhpThrowHwEx, _TEXT, NoHandler
str r3, [r1, #OFFSETOF__ExInfo__m_pPrevExInfo] // pExInfo->m_pPrevExInfo = m_pExInfoStackHead
str r1, [r0, #OFFSETOF__Thread__m_pExInfoStackHead] // m_pExInfoStackHead = pExInfo

// set the exception context field on the ExInfo
add r2, sp, #rsp_offsetof_Context // r2 <- PAL_LIMITED_CONTEXT*
str r2, [r1, #OFFSETOF__ExInfo__m_pExContext] // pExInfo->m_pExContext = pContext

mov r0, r4 // restore the exception code
// r0 contains the exception code
// r1 contains the address of the ExInfo
Expand Down
6 changes: 4 additions & 2 deletions src/coreclr/nativeaot/Runtime/arm/GcProbe.S
Original file line number Diff line number Diff line change
@@ -1,14 +1,16 @@
// Licensed to the .NET Foundation under one or more agreements.
// The .NET Foundation licenses this file to you under the MIT license.

.syntax unified
.thumb

#include <unixasmmacros.inc>
#include "AsmOffsets.inc"

.global RhpGcPoll2

LEAF_ENTRY RhpGcPoll
ldr r0, =RhpTrapThreads
ldr r0, [r0]
PREPARE_EXTERNAL_VAR_INDIRECT RhpTrapThreads, r0
cmp r0, #TrapThreadsFlags_None
bne RhpGcPollRare
bx lr
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/nativeaot/Runtime/arm/InteropThunksHelpers.S
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@ NESTED_END RhCommonStub, _TEXT
// IntPtr RhGetCommonStubAddress()
//
LEAF_ENTRY RhGetCommonStubAddress, _TEXT
ldr r0, =C_FUNC(RhCommonStub)
PREPARE_EXTERNAL_VAR RhCommonStub, r0
bx lr
LEAF_END RhGetCommonStubAddress, _TEXT

Expand Down
3 changes: 1 addition & 2 deletions src/coreclr/nativeaot/Runtime/arm/PInvoke.S
Original file line number Diff line number Diff line change
Expand Up @@ -49,8 +49,7 @@ LEAF_ENTRY RhpPInvokeReturn, _TEXT
mov r2, #0
str r2, [r3, #OFFSETOF__Thread__m_pTransitionFrame]

ldr r3, =C_FUNC(RhpTrapThreads)
ldr r3, [r3]
PREPARE_EXTERNAL_VAR_INDIRECT RhpTrapThreads, r3
cbnz r3, LOCAL_LABEL(ReturnRareTrapThread) // TrapThreadsFlags_None = 0

bx lr
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/nativeaot/Runtime/arm/StubDispatch.S
Original file line number Diff line number Diff line change
Expand Up @@ -125,7 +125,7 @@ LEAF_ENTRY RhpInterfaceDispatchSlow, _TEXT
// for the universal thunk target is to be placed in sp-8
// and the universal thunk target address is to be placed in sp-4
str r12, [sp, #-8]
ldr r12, =C_FUNC(RhpCidResolve)
PREPARE_EXTERNAL_VAR RhpCidResolve, r12
str r12, [sp, #-4]

// jump to universal transition thunk
Expand Down
4 changes: 2 additions & 2 deletions src/coreclr/nativeaot/Runtime/arm/UniversalTransition.S
Original file line number Diff line number Diff line change
Expand Up @@ -102,7 +102,7 @@ NESTED_ENTRY Rhp\FunctionName, _TEXT, NoHandler
// frame, and the code at the call target is required to use only the transition frame
// copies when dispatching this call to the eventual callee.

ldr r3, =C_FUNC(RhpFpTrashValues)
PREPARE_EXTERNAL_VAR RhpFpTrashValues, r3
vldr d0, [r3, #(0 * 8)]
vldr d1, [r3, #(1 * 8)]
vldr d2, [r3, #(2 * 8)]
Expand All @@ -112,7 +112,7 @@ NESTED_ENTRY Rhp\FunctionName, _TEXT, NoHandler
vldr d6, [r3, #(6 * 8)]
vldr d7, [r3, #(7 * 8)]

ldr r3, =C_FUNC(RhpIntegerTrashValues)
PREPARE_EXTERNAL_VAR RhpIntegerTrashValues, r3
ldr r2, [r3, #(2 * 4)]
ldr r3, [r3, #(3 * 4)]

Expand Down
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