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add more i16/u16 tests; fix cuda align for i16/u16
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kawogi committed Nov 26, 2023
1 parent c432b1b commit 9aa4336
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Showing 14 changed files with 881 additions and 91 deletions.
20 changes: 16 additions & 4 deletions codegen/templates/vec.rs.tera
Original file line number Diff line number Diff line change
Expand Up @@ -91,10 +91,22 @@
{% set try_from_types = ["I16Vec" ~ dim, "IVec" ~ dim, "I64Vec" ~ dim] %}
{% endif %}

{% if scalar_t == "f64" or scalar_t == "i64" or scalar_t == "u64" or dim == 4 %}
{% set cuda_align = 16 %}
{% elif dim == 2 %}
{% set cuda_align = 8 %}
{% if dim == 2 %}
{% if scalar_t == "i16" or scalar_t == "u16" %}
{% set cuda_align = 4 %}
{% elif scalar_t == "f32" or scalar_t == "i32" or scalar_t == "u32" %}
{% set cuda_align = 8 %}
{% elif scalar_t == "f64" or scalar_t == "i64" or scalar_t == "u64" %}
{% set cuda_align = 16 %}
{% endif %}
{% elif dim == 4 %}
{% if scalar_t == "i16" or scalar_t == "u16" %}
{% set cuda_align = 8 %}
{% elif scalar_t == "f32" or scalar_t == "i32" or scalar_t == "u32" %}
{% set cuda_align = 16 %}
{% elif scalar_t == "f64" or scalar_t == "i64" or scalar_t == "u64" %}
{% set cuda_align = 16 %}
{% endif %}
{% endif %}

{% set components = ["x", "y", "z", "w"] | slice(end = dim) %}
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18 changes: 6 additions & 12 deletions src/i16.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,18 +11,15 @@ mod test {
use super::*;

mod const_test_i16vec2 {
const_assert_eq!(4, core::mem::size_of::<super::I16Vec2>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<i16>(),
core::mem::align_of::<super::I16Vec2>()
);
#[cfg(not(feature = "cuda"))]
const_assert_eq!(4, core::mem::size_of::<super::I16Vec2>());

#[cfg(feature = "cuda")]
const_assert_eq!(8, core::mem::align_of::<super::I16Vec2>());
#[cfg(feature = "cuda")]
const_assert_eq!(8, core::mem::size_of::<super::I16Vec2>());
const_assert_eq!(4, core::mem::align_of::<super::I16Vec2>());
}

mod const_test_i16vec3 {
Expand All @@ -34,17 +31,14 @@ mod test {
}

mod const_test_i16vec4 {
const_assert_eq!(8, core::mem::size_of::<super::I16Vec4>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<i16>(),
core::mem::align_of::<super::I16Vec4>()
);
#[cfg(not(feature = "cuda"))]
const_assert_eq!(8, core::mem::size_of::<super::I16Vec4>());

#[cfg(feature = "cuda")]
const_assert_eq!(16, core::mem::align_of::<super::I16Vec4>());
#[cfg(feature = "cuda")]
const_assert_eq!(16, core::mem::size_of::<super::I16Vec4>());
const_assert_eq!(8, core::mem::align_of::<super::I16Vec4>());
}
}
2 changes: 1 addition & 1 deletion src/i16/i16vec2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ pub const fn i16vec2(x: i16, y: i16) -> I16Vec2 {
/// A 2-dimensional vector.
#[cfg_attr(not(target_arch = "spirv"), derive(Hash))]
#[derive(Clone, Copy, PartialEq, Eq)]
#[cfg_attr(feature = "cuda", repr(align(8)))]
#[cfg_attr(feature = "cuda", repr(align(4)))]
#[cfg_attr(not(target_arch = "spirv"), repr(C))]
#[cfg_attr(target_arch = "spirv", repr(simd))]
pub struct I16Vec2 {
Expand Down
2 changes: 1 addition & 1 deletion src/i16/i16vec4.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ pub const fn i16vec4(x: i16, y: i16, z: i16, w: i16) -> I16Vec4 {
/// A 4-dimensional vector.
#[cfg_attr(not(target_arch = "spirv"), derive(Hash))]
#[derive(Clone, Copy, PartialEq, Eq)]
#[cfg_attr(feature = "cuda", repr(align(16)))]
#[cfg_attr(feature = "cuda", repr(align(8)))]
#[cfg_attr(not(target_arch = "spirv"), repr(C))]
#[cfg_attr(target_arch = "spirv", repr(simd))]
pub struct I16Vec4 {
Expand Down
8 changes: 5 additions & 3 deletions src/i32.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,16 +9,17 @@ pub use ivec4::{ivec4, IVec4};
#[cfg(not(target_arch = "spirv"))]
mod test {
use super::*;

mod const_test_ivec2 {
const_assert_eq!(8, core::mem::size_of::<super::IVec2>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<i32>(),
core::mem::align_of::<super::IVec2>()
);
#[cfg(feature = "cuda")]
const_assert_eq!(8, core::mem::align_of::<super::IVec2>());
const_assert_eq!(8, core::mem::size_of::<super::IVec2>());
}

mod const_test_ivec3 {
Expand All @@ -30,13 +31,14 @@ mod test {
}

mod const_test_ivec4 {
const_assert_eq!(16, core::mem::size_of::<super::IVec4>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<i32>(),
core::mem::align_of::<super::IVec4>()
);
#[cfg(feature = "cuda")]
const_assert_eq!(16, core::mem::align_of::<super::IVec4>());
const_assert_eq!(16, core::mem::size_of::<super::IVec4>());
}
}
9 changes: 6 additions & 3 deletions src/i64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,32 +11,35 @@ mod test {
use super::*;

mod const_test_i64vec2 {
const_assert_eq!(16, core::mem::size_of::<super::I64Vec2>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<i64>(),
core::mem::align_of::<super::I64Vec2>()
);
#[cfg(feature = "cuda")]
const_assert_eq!(16, core::mem::align_of::<super::I64Vec2>());
const_assert_eq!(16, core::mem::size_of::<super::I64Vec2>());
}

mod const_test_i64vec3 {
const_assert_eq!(24, core::mem::size_of::<super::I64Vec3>());

const_assert_eq!(
core::mem::align_of::<i64>(),
core::mem::align_of::<super::I64Vec3>()
);
const_assert_eq!(24, core::mem::size_of::<super::I64Vec3>());
}

mod const_test_i64vec4 {
const_assert_eq!(32, core::mem::size_of::<super::I64Vec4>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<i64>(),
core::mem::align_of::<super::I64Vec4>()
);
#[cfg(feature = "cuda")]
const_assert_eq!(16, core::mem::align_of::<super::I64Vec4>());
const_assert_eq!(32, core::mem::size_of::<super::I64Vec4>());
}
}
18 changes: 6 additions & 12 deletions src/u16.rs
Original file line number Diff line number Diff line change
Expand Up @@ -11,18 +11,15 @@ mod test {
use super::*;

mod const_test_u16vec2 {
const_assert_eq!(4, core::mem::size_of::<super::U16Vec2>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<u16>(),
core::mem::align_of::<super::U16Vec2>()
);
#[cfg(not(feature = "cuda"))]
const_assert_eq!(4, core::mem::size_of::<super::U16Vec2>());
#[cfg(feature = "cuda")]

const_assert_eq!(8, core::mem::align_of::<super::U16Vec2>());
#[cfg(feature = "cuda")]
const_assert_eq!(8, core::mem::size_of::<super::U16Vec2>());
const_assert_eq!(4, core::mem::align_of::<super::U16Vec2>());
}

mod const_test_u16vec3 {
Expand All @@ -34,17 +31,14 @@ mod test {
}

mod const_test_u16vec4 {
const_assert_eq!(8, core::mem::size_of::<super::U16Vec4>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<u16>(),
core::mem::align_of::<super::U16Vec4>()
);
#[cfg(not(feature = "cuda"))]
const_assert_eq!(8, core::mem::size_of::<super::U16Vec4>());

#[cfg(feature = "cuda")]
const_assert_eq!(16, core::mem::align_of::<super::U16Vec4>());
#[cfg(feature = "cuda")]
const_assert_eq!(16, core::mem::size_of::<super::U16Vec4>());
const_assert_eq!(8, core::mem::align_of::<super::U16Vec4>());
}
}
2 changes: 1 addition & 1 deletion src/u16/u16vec2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ pub const fn u16vec2(x: u16, y: u16) -> U16Vec2 {
/// A 2-dimensional vector.
#[cfg_attr(not(target_arch = "spirv"), derive(Hash))]
#[derive(Clone, Copy, PartialEq, Eq)]
#[cfg_attr(feature = "cuda", repr(align(8)))]
#[cfg_attr(feature = "cuda", repr(align(4)))]
#[cfg_attr(not(target_arch = "spirv"), repr(C))]
#[cfg_attr(target_arch = "spirv", repr(simd))]
pub struct U16Vec2 {
Expand Down
2 changes: 1 addition & 1 deletion src/u16/u16vec4.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ pub const fn u16vec4(x: u16, y: u16, z: u16, w: u16) -> U16Vec4 {
/// A 4-dimensional vector.
#[cfg_attr(not(target_arch = "spirv"), derive(Hash))]
#[derive(Clone, Copy, PartialEq, Eq)]
#[cfg_attr(feature = "cuda", repr(align(16)))]
#[cfg_attr(feature = "cuda", repr(align(8)))]
#[cfg_attr(not(target_arch = "spirv"), repr(C))]
#[cfg_attr(target_arch = "spirv", repr(simd))]
pub struct U16Vec4 {
Expand Down
9 changes: 6 additions & 3 deletions src/u32.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,32 +10,35 @@ pub use uvec4::{uvec4, UVec4};
mod test {
use super::*;
mod const_test_uvec2 {
const_assert_eq!(8, core::mem::size_of::<super::UVec2>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<u32>(),
core::mem::align_of::<super::UVec2>()
);
#[cfg(feature = "cuda")]
const_assert_eq!(8, core::mem::align_of::<super::UVec2>());
const_assert_eq!(8, core::mem::size_of::<super::UVec2>());
}

mod const_test_uvec3 {
const_assert_eq!(12, core::mem::size_of::<super::UVec3>());

const_assert_eq!(
core::mem::align_of::<u32>(),
core::mem::align_of::<super::UVec3>()
);
const_assert_eq!(12, core::mem::size_of::<super::UVec3>());
}

mod const_test_uvec4 {
const_assert_eq!(16, core::mem::size_of::<super::UVec4>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<u32>(),
core::mem::align_of::<super::UVec4>()
);
#[cfg(feature = "cuda")]
const_assert_eq!(16, core::mem::align_of::<super::UVec4>());
const_assert_eq!(16, core::mem::size_of::<super::UVec4>());
}
}
9 changes: 6 additions & 3 deletions src/u64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,32 +10,35 @@ pub use u64vec4::{u64vec4, U64Vec4};
mod test {
use super::*;
mod const_test_u64vec2 {
const_assert_eq!(16, core::mem::size_of::<super::U64Vec2>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<u64>(),
core::mem::align_of::<super::U64Vec2>()
);
#[cfg(feature = "cuda")]
const_assert_eq!(16, core::mem::align_of::<super::U64Vec2>());
const_assert_eq!(16, core::mem::size_of::<super::U64Vec2>());
}

mod const_test_u64vec3 {
const_assert_eq!(24, core::mem::size_of::<super::U64Vec3>());

const_assert_eq!(
core::mem::align_of::<u64>(),
core::mem::align_of::<super::U64Vec3>()
);
const_assert_eq!(24, core::mem::size_of::<super::U64Vec3>());
}

mod const_test_u64vec4 {
const_assert_eq!(32, core::mem::size_of::<super::U64Vec4>());

#[cfg(not(feature = "cuda"))]
const_assert_eq!(
core::mem::align_of::<u64>(),
core::mem::align_of::<super::U64Vec4>()
);
#[cfg(feature = "cuda")]
const_assert_eq!(16, core::mem::align_of::<super::U64Vec4>());
const_assert_eq!(32, core::mem::size_of::<super::U64Vec4>());
}
}
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