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ad353xr: zedboard: add project
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Adding project ad353xr for zedboard

Signed-off-by: Alexis Czezar Torreno <[email protected]>
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@actorreno
actorreno committed Dec 18, 2024
1 parent d0662ff commit 0fbc17a
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23 changes: 23 additions & 0 deletions projects/ad353xr/zed/Makefile
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####################################################################################
## Copyright (c) 2018 - 2023 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################

PROJECT_NAME := ad353xR_zed

M_DEPS += ../../scripts/adi_pd.tcl
M_DEPS += ../../common/zed/zed_system_constr.xdc
M_DEPS += ../../common/zed/zed_system_bd.tcl
M_DEPS += ../../../library/common/ad_iobuf.v

LIB_DEPS += axi_clkgen
LIB_DEPS += axi_dmac
LIB_DEPS += axi_hdmi_tx
LIB_DEPS += axi_i2s_adi
LIB_DEPS += axi_spdif_tx
LIB_DEPS += axi_sysid
LIB_DEPS += sysid_rom
LIB_DEPS += util_i2c_mixer

include ../../scripts/project-xilinx.mk
16 changes: 16 additions & 0 deletions projects/ad353xr/zed/system_bd.tcl
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###############################################################################
## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################

source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
source $ad_hdl_dir/projects/scripts/adi_pd.tcl

set mem_init_sys_path [get_env_param ADI_PROJECT_DIR ""]mem_init_sys.txt;

#system ID
ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/$mem_init_sys_path"
ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9

sysid_gen_sys_init_file
43 changes: 43 additions & 0 deletions projects/ad353xr/zed/system_constr.xdc
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###############################################################################
## Copyright (C) 2022-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################

# DAC SPI interface

set_property -dict {PACKAGE_PIN D18 IOSTANDARD LVCMOS33} [get_ports spi_sclk] ; ## FMC-CLK1_P
set_property -dict {PACKAGE_PIN N20 IOSTANDARD LVCMOS33} [get_ports spi_sdi] ; ## FMC-LA01_N
set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVCMOS33} [get_ports spi_sdo] ; ## FMC-LA01_P
set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS33} [get_ports spi_sync_n] ; ## FMC-LA00_P

# DAC GPIO interface
set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVCMOS33} [get_ports dac_ldac_n] ; ## FMC-LA05_P
set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS33} [get_ports dac_reset_n] ; ## FMC-LA10_N

# Reconfigure the pins from Bank 34 and Bank 35 to use LVCMOS33 since VADJ must be set to 3.3V

# otg
set_property IOSTANDARD LVCMOS33 [get_ports otg_vbusoc]

# gpio (switches, leds and such)
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[0]] ; ## BTNC
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[1]] ; ## BTND
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[2]] ; ## BTNL
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[3]] ; ## BTNR
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[4]] ; ## BTNU

set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[11]] ; ## SW0
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[12]] ; ## SW1
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[13]] ; ## SW2
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[14]] ; ## SW3
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[15]] ; ## SW4
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[16]] ; ## SW5
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[17]] ; ## SW6
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[18]] ; ## SW7

set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[27]] ; ## XADC-GIO0
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[28]] ; ## XADC-GIO1
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[29]] ; ## XADC-GIO2
set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[30]] ; ## XADC-GIO3

set_property IOSTANDARD LVCMOS33 [get_ports gpio_bd[31]] ; ## OTG-RESETN
20 changes: 20 additions & 0 deletions projects/ad353xr/zed/system_project.tcl
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###############################################################################
## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################

source ../../../scripts/adi_env.tcl
source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
source $ad_hdl_dir/projects/scripts/adi_board.tcl

adi_project ad353xR_zed

adi_project_files ad353xR_zed [list \
"$ad_hdl_dir/library/common/ad_iobuf.v" \
"system_top.v" \
"system_constr.xdc" \
"$ad_hdl_dir/projects/common/zed/zed_system_constr.xdc"]

set_property PROCESSING_ORDER LATE [get_files system_constr.xdc]

adi_project_run ad353xR_zed
209 changes: 209 additions & 0 deletions projects/ad353xr/zed/system_top.v
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// ***************************************************************************
// ***************************************************************************
// Copyright (C) 2022-2024 Analog Devices, Inc. All rights reserved.
//
// In this HDL repository, there are many different and unique modules, consisting
// of various HDL (Verilog or VHDL) components. The individual modules are
// developed independently, and may be accompanied by separate and unique license
// terms.
//
// The user should read each of these license terms, and understand the
// freedoms and responsibilities that he or she has by using this source/core.
//
// This core is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
// A PARTICULAR PURPOSE.
//
// Redistribution and use of source or resulting binaries, with or without modification
// of this file, are permitted under one of the following two license terms:
//
// 1. The GNU General Public License version 2 as published by the
// Free Software Foundation, which can be found in the top level directory
// of this repository (LICENSE_GPL2), and also online at:
// <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
//
// OR
//
// 2. An ADI specific BSD license, which can be found in the top level directory
// of this repository (LICENSE_ADIBSD), and also on-line at:
// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
// This will allow to generate bit files and not release the source code,
// as long as it attaches to an ADI device.
//
// ***************************************************************************
// ***************************************************************************

`timescale 1ns/100ps

module system_top (

inout [14:0] ddr_addr,
inout [ 2:0] ddr_ba,
inout ddr_cas_n,
inout ddr_ck_n,
inout ddr_ck_p,
inout ddr_cke,
inout ddr_cs_n,
inout [ 3:0] ddr_dm,
inout [31:0] ddr_dq,
inout [ 3:0] ddr_dqs_n,
inout [ 3:0] ddr_dqs_p,
inout ddr_odt,
inout ddr_ras_n,
inout ddr_reset_n,
inout ddr_we_n,

inout fixed_io_ddr_vrn,
inout fixed_io_ddr_vrp,
inout [53:0] fixed_io_mio,
inout fixed_io_ps_clk,
inout fixed_io_ps_porb,
inout fixed_io_ps_srstb,

inout [31:0] gpio_bd,

output hdmi_out_clk,
output hdmi_vsync,
output hdmi_hsync,
output hdmi_data_e,
output [15:0] hdmi_data,

output spdif,

output i2s_mclk,
output i2s_bclk,
output i2s_lrclk,
output i2s_sdata_out,
input i2s_sdata_in,

inout iic_scl,
inout iic_sda,
inout [ 1:0] iic_mux_scl,
inout [ 1:0] iic_mux_sda,

input otg_vbusoc,

output dac_reset_n,
output dac_ldac_n,

input spi_sdi,
output spi_sdo,
output spi_sclk,
output spi_sync_n
);

// internal signals

wire [63:0] gpio_i;
wire [63:0] gpio_o;
wire [63:0] gpio_t;
wire [ 1:0] iic_mux_scl_i_s;
wire [ 1:0] iic_mux_scl_o_s;
wire iic_mux_scl_t_s;
wire [ 1:0] iic_mux_sda_i_s;
wire [ 1:0] iic_mux_sda_o_s;
wire iic_mux_sda_t_s;

assign gpio_i[63:32] = gpio_o[63:32];

assign dac_reset_n = gpio_o[33];
assign dac_ldac_n = gpio_o[34];

// instantiations

ad_iobuf #(
.DATA_WIDTH (32)
) i_iobuf (
.dio_t (gpio_t[31:0]),
.dio_i (gpio_o[31:0]),
.dio_o (gpio_i[31:0]),
.dio_p (gpio_bd));

ad_iobuf #(
.DATA_WIDTH (2)
) i_iic_mux_scl (
.dio_t ({iic_mux_scl_t_s, iic_mux_scl_t_s}),
.dio_i (iic_mux_scl_o_s),
.dio_o (iic_mux_scl_i_s),
.dio_p (iic_mux_scl));

ad_iobuf #(
.DATA_WIDTH (2)
) i_iic_mux_sda (
.dio_t ({iic_mux_sda_t_s, iic_mux_sda_t_s}),
.dio_i (iic_mux_sda_o_s),
.dio_o (iic_mux_sda_i_s),
.dio_p (iic_mux_sda));

system_wrapper i_system_wrapper (
.ddr_addr (ddr_addr),
.ddr_ba (ddr_ba),
.ddr_cas_n (ddr_cas_n),
.ddr_ck_n (ddr_ck_n),
.ddr_ck_p (ddr_ck_p),
.ddr_cke (ddr_cke),
.ddr_cs_n (ddr_cs_n),
.ddr_dm (ddr_dm),
.ddr_dq (ddr_dq),
.ddr_dqs_n (ddr_dqs_n),
.ddr_dqs_p (ddr_dqs_p),
.ddr_odt (ddr_odt),
.ddr_ras_n (ddr_ras_n),
.ddr_reset_n (ddr_reset_n),
.ddr_we_n (ddr_we_n),

.fixed_io_ddr_vrn (fixed_io_ddr_vrn),
.fixed_io_ddr_vrp (fixed_io_ddr_vrp),
.fixed_io_mio (fixed_io_mio),
.fixed_io_ps_clk (fixed_io_ps_clk),
.fixed_io_ps_porb (fixed_io_ps_porb),
.fixed_io_ps_srstb (fixed_io_ps_srstb),

.gpio_i (gpio_i),
.gpio_o (gpio_o),
.gpio_t (gpio_t),

.hdmi_data (hdmi_data),
.hdmi_data_e (hdmi_data_e),
.hdmi_hsync (hdmi_hsync),
.hdmi_out_clk (hdmi_out_clk),
.hdmi_vsync (hdmi_vsync),

.spdif (spdif),

.i2s_bclk (i2s_bclk),
.i2s_lrclk (i2s_lrclk),
.i2s_mclk (i2s_mclk),
.i2s_sdata_in (i2s_sdata_in),
.i2s_sdata_out (i2s_sdata_out),
.iic_fmc_scl_io (iic_scl),
.iic_fmc_sda_io (iic_sda),
.iic_mux_scl_i (iic_mux_scl_i_s),
.iic_mux_scl_o (iic_mux_scl_o_s),
.iic_mux_scl_t (iic_mux_scl_t_s),
.iic_mux_sda_i (iic_mux_sda_i_s),
.iic_mux_sda_o (iic_mux_sda_o_s),
.iic_mux_sda_t (iic_mux_sda_t_s),

.otg_vbusoc (otg_vbusoc),

.spi0_clk_i (1'b0),
.spi0_clk_o (spi_sclk),
.spi0_csn_0_o (spi_sync_n),
.spi0_csn_1_o (),
.spi0_csn_2_o (),
.spi0_csn_i (1'b1),
.spi0_sdi_i (spi_sdi),
.spi0_sdo_i (1'b0),
.spi0_sdo_o (spi_sdo),
.spi1_clk_i (1'b0),
.spi1_clk_o (),
.spi1_csn_0_o (),
.spi1_csn_1_o (),
.spi1_csn_2_o (),
.spi1_csn_i (1'b1),
.spi1_sdi_i (1'b0),
.spi1_sdo_i (1'b0),
.spi1_sdo_o ());

endmodule

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