Fixed output ports

SteffenReith · Apr 3, 2024 · 5f4b2c8 · 5f4b2c8
1 parent f680cdb
commit 5f4b2c8
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/src/SteffenReith_ASGTop.v b/src/SteffenReith_ASGTop.v
@@ -25,6 +25,9 @@ module tt_um_SteffenReith_ASGTop (
   // Set the directions for the IOs (unused at all) 
   assign uio_oe = 8'bZZZZ_ZZZZ;
 
+  // Set unused outputs to Z
+  assign uo_out[7:1] = 7'bZZZZ_ZZZ;
+
   //Instantiate the ASG and connect the signals
   ASG asg (
     .loadIt(ui_in[1:0]),