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feat: riscv64: Unify the 'c906' and 'virt64' architecture portings #9181
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@heyuanjie87 原来的 milkv 修改我放 https://github.com/polarvid/rt-thread-mirror/tree/TEST/rv-next 分支上面了,你可以基于那个审查一下这个 PR ,感谢。 |
周一帮你测试下 |
Changes: - added config for NEW_CTX_SWITCH - used new context on c906 sched switch routine - update _rt_hw_stack_init to fit into NEW_CTX_SWITCH - separated vector ctx from the generic Signed-off-by: Shell <[email protected]>
These changes are designed to standardize the memory management across 'virt64' and 'c906', ensuring efficient handling of address spaces and page tables. Changes: - Creation of ASID management files (`asid.c`) for both 'c906' and 'virt64' architectures, which is essential for maintaining stability. - Extensive updates to the MMU configuration and handling in `mmu.c` and `mmu.h` files. - Addition of functions to manage ASID allocation and switching of page tables. - For c906, accommodated the early memory setup to the one from virt64. Signed-off-by: Shell <[email protected]>
This patch aims to unify the two currently separated RISC-V 64-bit architecture ports, 'virt64' and 'c906', into a single generic 'common64' port. The changes include renaming files and updating includes to use a unified 'interrupt.h' header, as well as making adjustments to IO and trap handling to be more consistent between the two architectures. Changes: - Renamed 'rt_interrupt.h' to 'interrupt.h' and updated includes accordingly. - Unified IO register access functions in 'riscv_io.h'. - Added 'opcode.h' for portable assembly support. - Updated 'plic.c' and 'plic.h' to handle interrupts in a unified manner. - Modified 'trap.c' to handle exceptions and interrupts consistently for 'rv64'. Signed-off-by: Shell <[email protected]>
This patch consolidates the separated architecture-specific code for rv64 (virt64 and c906) under a more unified approach. The changes aim to enhance maintainability and code reuse, reducing duplication between these two architectures while adding small improvements in porting compatibility. Changes: - Modified build scripts (SConscript) for both virt64 and c906 to remove ASID and vector dependencies when not required. - Updated c906's sbi.c and sbi.h to use standard integer types (uint32_t) and include the missing <stdint.h> header. - Unified inline function declaration for `sbi_call` across both c906 and virt64 using `rt_inline`. - Disabled FPU and vector in c906's startup assembly file, aligning it with the virt64 handling. - Corrected syscall handler type definitions in c906 for consistency. Signed-off-by: Shell <[email protected]>
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初步测试成功: BSP:https://github.com/heyuanjie87/bsp-MilkvDuo-xx 测试输出:
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拉取/合并请求描述:(PR description)
[
为什么提交这份PR (why to submit this PR)
Part of the patch set on #9151
Unify the 'c906' and 'virt64' under RISC-V portings.
你的解决方案是什么 (what is your solution)
See messages on each commit for detailed descriptions.
请提供验证的bsp和config (provide the config and bsp)
]
当前拉取/合并请求的状态 Intent for your PR
必须选择一项 Choose one (Mandatory):
代码质量 Code Quality:
我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:
#if 0
代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up