plat-stm32mp1: remove unused stm32mp_nsec_can_access_clock()

Remove unused platform functions stm32mp_nsec_can_access_clock() and stm32mp_gpio_bank_is_secure(). Signed-off-by: Etienne Carriere <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]> Acked-by: Gatien Chevallier <[email protected]>
OP-TEE · Dec 17, 2024 · b6e2a72 · b6e2a72
1 parent da44ce7
commit b6e2a72
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diff --git a/core/arch/arm/plat-stm32mp1/shared_resources.c b/core/arch/arm/plat-stm32mp1/shared_resources.c
@@ -298,75 +298,6 @@ bool stm32mp_periph_is_secure(enum stm32mp_shres id)
 	return shres_state[id] == SHRES_SECURE;
 }
 
-bool stm32mp_nsec_can_access_clock(unsigned long clock_id)
-{
-	enum stm32mp_shres shres_id = STM32MP1_SHRES_COUNT;
-
-	/* Oscillators and PLLs are visible from non-secure world */
-	COMPILE_TIME_ASSERT(CK_HSE == 0 &&
-			    (CK_HSE + 1) == CK_CSI &&
-			    (CK_HSE + 2) == CK_LSI &&
-			    (CK_HSE + 3) == CK_LSE &&
-			    (CK_HSE + 4) == CK_HSI &&
-			    (CK_HSE + 5) == CK_HSE_DIV2 &&
-			    (PLL1_P + 1) == PLL1_Q &&
-			    (PLL1_P + 2) == PLL1_R &&
-			    (PLL1_P + 3) == PLL2_P &&
-			    (PLL1_P + 4) == PLL2_Q &&
-			    (PLL1_P + 5) == PLL2_R &&
-			    (PLL1_P + 6) == PLL3_P &&
-			    (PLL1_P + 7) == PLL3_Q &&
-			    (PLL1_P + 8) == PLL3_R);
-
-	if (clock_id <= CK_HSE_DIV2 ||
-	    (clock_id >= PLL1_P && clock_id <= PLL3_R))
-		return true;
-
-	switch (clock_id) {
-	case RTCAPB:
-	case CK_MPU:
-	case CK_AXI:
-	case BSEC:
-		return true;
-	case GPIOZ:
-		return true;
-	case SPI6_K:
-		shres_id = STM32MP1_SHRES_SPI6;
-		break;
-	case I2C4_K:
-		shres_id = STM32MP1_SHRES_I2C4;
-		break;
-	case I2C6_K:
-		shres_id = STM32MP1_SHRES_I2C6;
-		break;
-	case USART1_K:
-		shres_id = STM32MP1_SHRES_USART1;
-		break;
-	case IWDG1:
-		shres_id = STM32MP1_SHRES_IWDG1;
-		break;
-	case CRYP1:
-		shres_id = STM32MP1_SHRES_CRYP1;
-		break;
-	case HASH1:
-		shres_id = STM32MP1_SHRES_HASH1;
-		break;
-	case RNG1_K:
-		shres_id = STM32MP1_SHRES_RNG1;
-		break;
-	case RTC:
-		shres_id = STM32MP1_SHRES_RTC;
-		break;
-	case CK_MCU:
-		shres_id = STM32MP1_SHRES_MCU;
-		break;
-	default:
-		return false;
-	}
-
-	return !stm32mp_periph_is_secure(shres_id);
-}
-
 bool stm32mp_nsec_can_access_reset(unsigned int reset_id)
 {
 	enum stm32mp_shres shres_id = STM32MP1_SHRES_COUNT;

diff --git a/core/arch/arm/plat-stm32mp1/stm32_util.h b/core/arch/arm/plat-stm32mp1/stm32_util.h
@@ -46,17 +46,6 @@ void may_spin_unlock(unsigned int *lock, uint32_t exceptions);
 /* Helper from platform RCC clock driver */
 struct clk *stm32mp_rcc_clock_id_to_clk(unsigned long clock_id);
 
-#ifdef CFG_STM32MP1_SHARED_RESOURCES
-/* Return true if @clock_id is shared by secure and non-secure worlds */
-bool stm32mp_nsec_can_access_clock(unsigned long clock_id);
-#else /* CFG_STM32MP1_SHARED_RESOURCES */
-static inline bool stm32mp_nsec_can_access_clock(unsigned long clock_id
-						 __unused)
-{
-	return true;
-}
-#endif /* CFG_STM32MP1_SHARED_RESOURCES */
-
 extern const struct clk_ops stm32mp1_clk_ops;
 
 #ifdef CFG_STM32MP1_SHARED_RESOURCES