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1. SDRAM-Controller-Design SDRAM-Controller-Design Public

   Overview: The goal of this project is to design an SDRAM controller that allows SDRAM memory to be interfaced with a microprocessor having only asynchronous memory support. There is no requirement …

2. Design-of-32-bit-RISC-Processor Design-of-32-bit-RISC-Processor Public

   Overview The goal of this project is to design a 32-bit RISC microprocessor with load-store architecture with a 4- stage pipeline and Harvard architecture. The project also includes the instruction…