configuratory sex

sex

groovy/preInit/HV/hvcircuits.groovy

@@ -0,0 +1,118 @@
+package cbt.hvcircuits
+
+// pre 8-bit
+def hv_circuit_4bit_operator_design_1 = content.createItem('hv_circuit_4bit_operator_design_1')
+hv_circuit_4bit_operator_design_1.register()
+
+def hv_circuit_4bit_operator_design_2 = content.createItem('hv_circuit_4bit_operator_design_2')
+hv_circuit_4bit_operator_design_2.register()
+
+def hv_circuit_4bit_operator_design_3 = content.createItem('hv_circuit_4bit_operator_design_3')
+hv_circuit_4bit_operator_design_3.register()
+
+def hv_circuit_4bit_operator_design_4 = content.createItem('hv_circuit_4bit_operator_design_4')
+hv_circuit_4bit_operator_design_4.register()
+
+def hv_circuit_4bit_operator_design_5 = content.createItem('hv_circuit_4bit_operator_design_5')
+hv_circuit_4bit_operator_design_5.register()
+
+def hv_circuit_1bit_storage_circuit = content.createItem('hv_circuit_1bit_storage_circuit')
+hv_circuit_1bit_storage_circuit.register()
+
+def hv_circuit_4bit_circuit_timings = content.createItem('hv_circuit_4bit_circuit_timings')
+hv_circuit_4bit_circuit_timings.register()
+
+def hv_circuit_4bit_storage_circuit = content.createItem('hv_circuit_4bit_storage_circuit')
+hv_circuit_4bit_storage_circuit.register()
+
+def hv_circuit_4bit_controller_chip_operations_center = content.createItem('hv_circuit_4bit_controller_chip_operations_center')
+hv_circuit_4bit_controller_chip_operations_center.register()
+
+def hv_circuit_4bit_accelerator_configuration_chip = content.createItem('hv_circuit_4bit_accelerator_configuration_chip')
+hv_circuit_4bit_accelerator_configuration_chip.register()
+
+def hv_circuit_4bit_hss_circuit_high_speed_speciality = content.createItem('hv_circuit_4bit_hss_circuit_high_speed_speciality')
+hv_circuit_4bit_hss_circuit_high_speed_speciality.register()
+
+def hv_circuit_hub_4bit = content.createItem('hv_circuit_hub_4bit')
+hv_circuit_hub_4bit.register()
+
+def hv_circuit_4bit_sensor_circuit = content.createItem('hv_circuit_4bit_sensor_circuit')
+hv_circuit_4bit_sensor_circuit.register()
+
+def hv_circuit_4bit_sensor_io = content.createItem('hv_circuit_4bit_sensor_io')
+hv_circuit_4bit_sensor_io.register()
+
+def hv_circuit_4bit_sensor_chip = content.createItem('hv_circuit_4bit_sensor_chip')
+hv_circuit_4bit_sensor_chip.register()
+
+def hv_circuit_4bit_8bit_storage_compatibility_module = content.createItem('hv_circuit_4bit_8bit_storage_compatibility_module')
+hv_circuit_4bit_8bit_storage_compatibility_module.register()
+
+def hv_circuit_ddssc4_circuit_timings = content.createItem('hv_circuit_ddssc4_circuit_timings')
+hv_circuit_ddssc4_circuit_timings.register()
+
+def hv_circuit_4bit_refined_circuit_timings = content.createItem('hv_circuit_4bit_refined_circuit_timings')
+hv_circuit_4bit_refined_circuit_timings.register()
+
+def hv_circuit_4bit_memory_component = content.createItem('hv_circuit_4bit_memory_component')
+hv_circuit_4bit_memory_component.register()
+
+def hv_circuit_4bit_memory_bus = content.createItem('hv_circuit_4bit_memory_bus')
+hv_circuit_4bit_memory_bus.register()
+
+def hv_circuit_4bit_cpu = content.createItem('hv_circuit_4bit_cpu')
+hv_circuit_4bit_cpu.register()
+
+def hv_circuit_4bit_ultraspeedifier = content.createItem('hv_circuit_4bit_ultraspeedifier')
+hv_circuit_4bit_ultraspeedifier.register()
+
+def hv_circuit_4bit_computer = content.createItem('hv_circuit_4bit_computer')
+hv_circuit_4bit_computer.register()
+
+def hv_circuit_4bit_8bit_parallelizer_1 = content.createItem('hv_circuit_4bit_8bit_parallelizer_1')
+hv_circuit_4bit_8bit_parallelizer_1.register()
+
+def hv_circuit_4bit_8bit_binary_extender = content.createItem('hv_circuit_4bit_8bit_binary_extender')
+hv_circuit_4bit_8bit_binary_extender.register()
+
+def hv_circuit_4bit_gpu = content.createItem('hv_circuit_4bit_gpu')
+hv_circuit_4bit_gpu.register()
+
+def hv_circuit_4bit_parallelizer_circuit_design_1 = content.createItem('hv_circuit_4bit_parallelizer_circuit_design_1')
+hv_circuit_4bit_parallelizer_circuit_design_1.register()
+
+def hv_circuit_4bit_parallelizer_circuit_design_2 = content.createItem('hv_circuit_4bit_parallelizer_circuit_design_2')
+hv_circuit_4bit_parallelizer_circuit_design_2.register()
+
+def hv_circuit_4bit_extended_memory_bus_lane = content.createItem('hv_circuit_4bit_extended_memory_bus_lane')
+hv_circuit_4bit_extended_memory_bus_lane.register()
+
+def hv_circuit_4bit_refined_cpu = content.createItem('hv_circuit_4bit_refined_cpu')
+hv_circuit_4bit_refined_cpu.register()
+
+def hv_circuit_super4bit_parax = content.createItem('hv_circuit_super4bit_parax')
+hv_circuit_super4bit_parax.register()
+
+def hv_circuit_extended_4bit_sensor_chip = content.createItem('hv_circuit_extended_4bit_sensor_chip')
+hv_circuit_extended_4bit_sensor_chip.register()
+
+def hv_circuit_4bit_8bit_compatibility_layer_module = content.createItem('hv_circuit_4bit_8bit_compatibility_layer_module')
+hv_circuit_4bit_8bit_compatibility_layer_module.register()
+
+def hv_circuit_4bit_8bit_translation_module = content.createItem('hv_circuit_4bit_8bit_translation_module')
+hv_circuit_4bit_8bit_translation_module.register()
+
+def hv_circuit_4bit_8bit_quackity_module = content.createItem('hv_circuit_4bit_8bit_quackity_module')
+hv_circuit_4bit_8bit_quackity_module.register()
+
+def hv_circuit_8bit_support_layer_module = content.createItem('hv_circuit_8bit_support_layer_module')
+hv_circuit_8bit_support_layer_module.register()
+
+def hv_circuit_4bit_megacruncher = content.createItem('hv_circuit_4bit_megacruncher')
+hv_circuit_4bit_megacruncher.register()
+
+// full 8bit processing
+
+
+

groovy/preInit/LV/lvcircuits.groovy

@@ -0,0 +1,118 @@
+package cbt.lvcircuits
+
+// pre 8-bit
+def lv_circuit_4bit_operator_design_1 = content.createItem('lv_circuit_4bit_operator_design_1')
+lv_circuit_4bit_operator_design_1.register()
+
+def lv_circuit_4bit_operator_design_2 = content.createItem('lv_circuit_4bit_operator_design_2')
+lv_circuit_4bit_operator_design_2.register()
+
+def lv_circuit_4bit_operator_design_3 = content.createItem('lv_circuit_4bit_operator_design_3')
+lv_circuit_4bit_operator_design_3.register()
+
+def lv_circuit_4bit_operator_design_4 = content.createItem('lv_circuit_4bit_operator_design_4')
+lv_circuit_4bit_operator_design_4.register()
+
+def lv_circuit_4bit_operator_design_5 = content.createItem('lv_circuit_4bit_operator_design_5')
+lv_circuit_4bit_operator_design_5.register()
+
+def lv_circuit_1bit_storage_circuit = content.createItem('lv_circuit_1bit_storage_circuit')
+lv_circuit_1bit_storage_circuit.register()
+
+def lv_circuit_4bit_circuit_timings = content.createItem('lv_circuit_4bit_circuit_timings')
+lv_circuit_4bit_circuit_timings.register()
+
+def lv_circuit_4bit_storage_circuit = content.createItem('lv_circuit_4bit_storage_circuit')
+lv_circuit_4bit_storage_circuit.register()
+
+def lv_circuit_4bit_controller_chip_operations_center = content.createItem('lv_circuit_4bit_controller_chip_operations_center')
+lv_circuit_4bit_controller_chip_operations_center.register()
+
+def lv_circuit_4bit_accelerator_configuration_chip = content.createItem('lv_circuit_4bit_accelerator_configuration_chip')
+lv_circuit_4bit_accelerator_configuration_chip.register()
+
+def lv_circuit_4bit_hss_circuit_high_speed_speciality = content.createItem('lv_circuit_4bit_hss_circuit_high_speed_speciality')
+lv_circuit_4bit_hss_circuit_high_speed_speciality.register()
+
+def lv_circuit_hub_4bit = content.createItem('lv_circuit_hub_4bit')
+lv_circuit_hub_4bit.register()
+
+def lv_circuit_4bit_sensor_circuit = content.createItem('lv_circuit_4bit_sensor_circuit')
+lv_circuit_4bit_sensor_circuit.register()
+
+def lv_circuit_4bit_sensor_io = content.createItem('lv_circuit_4bit_sensor_io')
+lv_circuit_4bit_sensor_io.register()
+
+def lv_circuit_4bit_sensor_chip = content.createItem('lv_circuit_4bit_sensor_chip')
+lv_circuit_4bit_sensor_chip.register()
+
+def lv_circuit_4bit_8bit_storage_compatibility_module = content.createItem('lv_circuit_4bit_8bit_storage_compatibility_module')
+lv_circuit_4bit_8bit_storage_compatibility_module.register()
+
+def lv_circuit_ddssc4_circuit_timings = content.createItem('lv_circuit_ddssc4_circuit_timings')
+lv_circuit_ddssc4_circuit_timings.register()
+
+def lv_circuit_4bit_refined_circuit_timings = content.createItem('lv_circuit_4bit_refined_circuit_timings')
+lv_circuit_4bit_refined_circuit_timings.register()
+
+def lv_circuit_4bit_memory_component = content.createItem('lv_circuit_4bit_memory_component')
+lv_circuit_4bit_memory_component.register()
+
+def lv_circuit_4bit_memory_bus = content.createItem('lv_circuit_4bit_memory_bus')
+lv_circuit_4bit_memory_bus.register()
+
+def lv_circuit_4bit_cpu = content.createItem('lv_circuit_4bit_cpu')
+lv_circuit_4bit_cpu.register()
+
+def lv_circuit_4bit_ultraspeedifier = content.createItem('lv_circuit_4bit_ultraspeedifier')
+lv_circuit_4bit_ultraspeedifier.register()
+
+def lv_circuit_4bit_computer = content.createItem('lv_circuit_4bit_computer')
+lv_circuit_4bit_computer.register()
+
+def lv_circuit_4bit_8bit_parallelizer_1 = content.createItem('lv_circuit_4bit_8bit_parallelizer_1')
+lv_circuit_4bit_8bit_parallelizer_1.register()
+
+def lv_circuit_4bit_8bit_binary_extender = content.createItem('lv_circuit_4bit_8bit_binary_extender')
+lv_circuit_4bit_8bit_binary_extender.register()
+
+def lv_circuit_4bit_gpu = content.createItem('lv_circuit_4bit_gpu')
+lv_circuit_4bit_gpu.register()
+
+def lv_circuit_4bit_parallelizer_circuit_design_1 = content.createItem('lv_circuit_4bit_parallelizer_circuit_design_1')
+lv_circuit_4bit_parallelizer_circuit_design_1.register()
+
+def lv_circuit_4bit_parallelizer_circuit_design_2 = content.createItem('lv_circuit_4bit_parallelizer_circuit_design_2')
+lv_circuit_4bit_parallelizer_circuit_design_2.register()
+
+def lv_circuit_4bit_extended_memory_bus_lane = content.createItem('lv_circuit_4bit_extended_memory_bus_lane')
+lv_circuit_4bit_extended_memory_bus_lane.register()
+
+def lv_circuit_4bit_refined_cpu = content.createItem('lv_circuit_4bit_refined_cpu')
+lv_circuit_4bit_refined_cpu.register()
+
+def lv_circuit_super4bit_parax = content.createItem('lv_circuit_super4bit_parax')
+lv_circuit_super4bit_parax.register()
+
+def lv_circuit_extended_4bit_sensor_chip = content.createItem('lv_circuit_extended_4bit_sensor_chip')
+lv_circuit_extended_4bit_sensor_chip.register()
+
+def lv_circuit_4bit_8bit_compatibility_layer_module = content.createItem('lv_circuit_4bit_8bit_compatibility_layer_module')
+lv_circuit_4bit_8bit_compatibility_layer_module.register()
+
+def lv_circuit_4bit_8bit_translation_module = content.createItem('lv_circuit_4bit_8bit_translation_module')
+lv_circuit_4bit_8bit_translation_module.register()
+
+def lv_circuit_4bit_8bit_quackity_module = content.createItem('lv_circuit_4bit_8bit_quackity_module')
+lv_circuit_4bit_8bit_quackity_module.register()
+
+def lv_circuit_8bit_support_layer_module = content.createItem('lv_circuit_8bit_support_layer_module')
+lv_circuit_8bit_support_layer_module.register()
+
+def lv_circuit_4bit_megacruncher = content.createItem('lv_circuit_4bit_megacruncher')
+lv_circuit_4bit_megacruncher.register()
+
+// full 8bit processing
+
+
+

groovy/preInit/MV/mvcircuits.groovy

@@ -0,0 +1,118 @@
+package cbt.mvcircuits
+
+// pre 8-bit
+def mv_circuit_4bit_operator_design_1 = content.createItem('mv_circuit_4bit_operator_design_1')
+mv_circuit_4bit_operator_design_1.register()
+
+def mv_circuit_4bit_operator_design_2 = content.createItem('mv_circuit_4bit_operator_design_2')
+mv_circuit_4bit_operator_design_2.register()
+
+def mv_circuit_4bit_operator_design_3 = content.createItem('mv_circuit_4bit_operator_design_3')
+mv_circuit_4bit_operator_design_3.register()
+
+def mv_circuit_4bit_operator_design_4 = content.createItem('mv_circuit_4bit_operator_design_4')
+mv_circuit_4bit_operator_design_4.register()
+
+def mv_circuit_4bit_operator_design_5 = content.createItem('mv_circuit_4bit_operator_design_5')
+mv_circuit_4bit_operator_design_5.register()
+
+def mv_circuit_1bit_storage_circuit = content.createItem('mv_circuit_1bit_storage_circuit')
+mv_circuit_1bit_storage_circuit.register()
+
+def mv_circuit_4bit_circuit_timings = content.createItem('mv_circuit_4bit_circuit_timings')
+mv_circuit_4bit_circuit_timings.register()
+
+def mv_circuit_4bit_storage_circuit = content.createItem('mv_circuit_4bit_storage_circuit')
+mv_circuit_4bit_storage_circuit.register()
+
+def mv_circuit_4bit_controller_chip_operations_center = content.createItem('mv_circuit_4bit_controller_chip_operations_center')
+mv_circuit_4bit_controller_chip_operations_center.register()
+
+def mv_circuit_4bit_accelerator_configuration_chip = content.createItem('mv_circuit_4bit_accelerator_configuration_chip')
+mv_circuit_4bit_accelerator_configuration_chip.register()
+
+def mv_circuit_4bit_hss_circuit_high_speed_speciality = content.createItem('mv_circuit_4bit_hss_circuit_high_speed_speciality')
+mv_circuit_4bit_hss_circuit_high_speed_speciality.register()
+
+def mv_circuit_hub_4bit = content.createItem('mv_circuit_hub_4bit')
+mv_circuit_hub_4bit.register()
+
+def mv_circuit_4bit_sensor_circuit = content.createItem('mv_circuit_4bit_sensor_circuit')
+mv_circuit_4bit_sensor_circuit.register()
+
+def mv_circuit_4bit_sensor_io = content.createItem('mv_circuit_4bit_sensor_io')
+mv_circuit_4bit_sensor_io.register()
+
+def mv_circuit_4bit_sensor_chip = content.createItem('mv_circuit_4bit_sensor_chip')
+mv_circuit_4bit_sensor_chip.register()
+
+def mv_circuit_4bit_8bit_storage_compatibility_module = content.createItem('mv_circuit_4bit_8bit_storage_compatibility_module')
+mv_circuit_4bit_8bit_storage_compatibility_module.register()
+
+def mv_circuit_ddssc4_circuit_timings = content.createItem('mv_circuit_ddssc4_circuit_timings')
+mv_circuit_ddssc4_circuit_timings.register()
+
+def mv_circuit_4bit_refined_circuit_timings = content.createItem('mv_circuit_4bit_refined_circuit_timings')
+mv_circuit_4bit_refined_circuit_timings.register()
+
+def mv_circuit_4bit_memory_component = content.createItem('mv_circuit_4bit_memory_component')
+mv_circuit_4bit_memory_component.register()
+
+def mv_circuit_4bit_memory_bus = content.createItem('mv_circuit_4bit_memory_bus')
+mv_circuit_4bit_memory_bus.register()
+
+def mv_circuit_4bit_cpu = content.createItem('mv_circuit_4bit_cpu')
+mv_circuit_4bit_cpu.register()
+
+def mv_circuit_4bit_ultraspeedifier = content.createItem('mv_circuit_4bit_ultraspeedifier')
+mv_circuit_4bit_ultraspeedifier.register()
+
+def mv_circuit_4bit_computer = content.createItem('mv_circuit_4bit_computer')
+mv_circuit_4bit_computer.register()
+
+def mv_circuit_4bit_8bit_parallelizer_1 = content.createItem('mv_circuit_4bit_8bit_parallelizer_1')
+mv_circuit_4bit_8bit_parallelizer_1.register()
+
+def mv_circuit_4bit_8bit_binary_extender = content.createItem('mv_circuit_4bit_8bit_binary_extender')
+mv_circuit_4bit_8bit_binary_extender.register()
+
+def mv_circuit_4bit_gpu = content.createItem('mv_circuit_4bit_gpu')
+mv_circuit_4bit_gpu.register()
+
+def mv_circuit_4bit_parallelizer_circuit_design_1 = content.createItem('mv_circuit_4bit_parallelizer_circuit_design_1')
+mv_circuit_4bit_parallelizer_circuit_design_1.register()
+
+def mv_circuit_4bit_parallelizer_circuit_design_2 = content.createItem('mv_circuit_4bit_parallelizer_circuit_design_2')
+mv_circuit_4bit_parallelizer_circuit_design_2.register()
+
+def mv_circuit_4bit_extended_memory_bus_lane = content.createItem('mv_circuit_4bit_extended_memory_bus_lane')
+mv_circuit_4bit_extended_memory_bus_lane.register()
+
+def mv_circuit_4bit_refined_cpu = content.createItem('mv_circuit_4bit_refined_cpu')
+mv_circuit_4bit_refined_cpu.register()
+
+def mv_circuit_super4bit_parax = content.createItem('mv_circuit_super4bit_parax')
+mv_circuit_super4bit_parax.register()
+
+def mv_circuit_extended_4bit_sensor_chip = content.createItem('mv_circuit_extended_4bit_sensor_chip')
+mv_circuit_extended_4bit_sensor_chip.register()
+
+def mv_circuit_4bit_8bit_compatibility_layer_module = content.createItem('mv_circuit_4bit_8bit_compatibility_layer_module')
+mv_circuit_4bit_8bit_compatibility_layer_module.register()
+
+def mv_circuit_4bit_8bit_translation_module = content.createItem('mv_circuit_4bit_8bit_translation_module')
+mv_circuit_4bit_8bit_translation_module.register()
+
+def mv_circuit_4bit_8bit_quackity_module = content.createItem('mv_circuit_4bit_8bit_quackity_module')
+mv_circuit_4bit_8bit_quackity_module.register()
+
+def mv_circuit_8bit_support_layer_module = content.createItem('mv_circuit_8bit_support_layer_module')
+mv_circuit_8bit_support_layer_module.register()
+
+def mv_circuit_4bit_megacruncher = content.createItem('mv_circuit_4bit_megacruncher')
+mv_circuit_4bit_megacruncher.register()
+
+// full 8bit processing
+
+
+