Workspace

The workspace is the place where you design and develop Verilog modules. The workspace can be reached by pressing the workspace button on any project card.

1 - Directory List

This list shows the file structure for your project.

You can create five kinds of files in Cloud V by right-clicking a folder:

• Plain Text Files:
  • Netlist Report (.rpt.txt): A report generated after synthesizing a Verilog module. Read-only.
  • Plain (any): A user-created text file.
• Verilog Module (.v): A (preferably synthesizable) Verilog file. Edited using the ACE text editor.
• Verilog Testbench (.v): A SystemVerilog text fixture. Edited using the ACE text editor.
• Finite State Machine (.fsm): A compilable finite state machine. It can be edited using the FSMEdit UI.
• Pin Constraints File (.pcf): Pin constraints for a chosen FPGA board. Allows you to generate bitstreams for said FPGA.
• Value Change Dump (.vcd): Value changes as a result of simulation. Displayed using FlexWave.

Verilog modules can see other Verilog modules in the same folder in addition to regular including.

It should be noted that as of the current version of Cloud V, files need to be created using their special dialog and not by just renaming a text file. An upload option will be offered in the future. which you will be doing a lot of. There are four folders created by default:

build (read-only)

Contains outputs from synthesis and simulation.

docs

Contains the Readme for the repository. As the name may imply, documentation should go in this folder.

IP Cores

Contains IP Cores that the user has elected to include in their project.

src

Contains Verilog source files and SystemVerilog-based testbenches.

Set Top Module

You can set a Verilog Module file by right clicking on it and setting it as the top module.

2 - Edit Pane

Contains currently open files. Each file is displayed using an appropriate UI depending on its aforementioned type.

The "+" tab allows the user to create new files in a manner similar to right-clicking the directory list.

3 - Top Bar

Contains dialog options.

• File allows the user to create new files in a manner similar to right-clicking the directory list, as well as save them. Ctrl + S (⌘ + S on macOS) can also save your file. You can also access the workspace settings.

  • Workspace settings allow you to change the font size.

• Edit has standard document editing options: Undo, Redo, Cutting, Pasting, Finding/Replacing and more.

• Actions gives you the option to Validate the project, simulate a chosen testbench, synthesize and/or generate a Lattice iCE40-based FPGA bitstream for your project's top module and access the workspace settings.

• Post-Synthesis gives you the option to Validate the project, simulate a chosen testbench, synthesize and/or generate a Lattice iCE40-based FPGA bitstream for your project's top module and compile software files.

• Help gives you access to the about page, this wiki (you probably came from there, actually) and lets you report bugs.

There are three shortcut buttons to Validate, Synthesize and Simulate, as these three features will be heavily utilized by most people. The green/yellow icon on the far left shows your connection status to Cloud V.

Simulate

Clicking on simulate after having your testbench ready brings up the Simulation Options window, which then takes you to the FlexWave of your project.

4 - Logs

The logs show a terminal that can display console output, synthesis and/or simulation errors and warnings generated by the linter.