From 663f713bdcb37de5f31a785f7dcca59921cc54d6 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sat, 11 May 2024 11:55:18 -0700 Subject: [PATCH] Test offchip-bus-switcher in CI --- .github/scripts/defaults.sh | 2 +- .github/scripts/run-tests.sh | 3 ++- generators/chipyard/src/main/scala/config/ChipletConfigs.scala | 2 +- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/.github/scripts/defaults.sh b/.github/scripts/defaults.sh index 5e448be447..c294f2f218 100755 --- a/.github/scripts/defaults.sh +++ b/.github/scripts/defaults.sh @@ -56,7 +56,7 @@ mapping["chipyard-spiflashwrite"]=" CONFIG=SmallSPIFlashRocketConfig EXTRA_SIM_F mapping["chipyard-manyperipherals"]=" CONFIG=ManyPeripheralsRocketConfig EXTRA_SIM_FLAGS='+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img'" mapping["chipyard-chiplike"]=" CONFIG=ChipLikeRocketConfig MODEL=FlatTestHarness MODEL_PACKAGE=chipyard.example verilog" mapping["chipyard-tethered"]=" CONFIG=VerilatorCITetheredChipLikeRocketConfig" -mapping["chipyard-symmetric"]=" CONFIG=MultiSimSymmetricChipletRocketConfig" +mapping["chipyard-symmetric"]=" CONFIG=MultiSimMultiLinkSymmetricChipletRocketConfig" mapping["chipyard-llcchiplet"]=" CONFIG=MultiSimLLCChipletRocketConfig" mapping["chipyard-cloneboom"]=" CONFIG=Cloned64MegaBoomV3Config verilog" mapping["chipyard-nocores"]=" CONFIG=NoCoresConfig verilog" diff --git a/.github/scripts/run-tests.sh b/.github/scripts/run-tests.sh index 6855e15a2b..b3f86e8e1d 100755 --- a/.github/scripts/run-tests.sh +++ b/.github/scripts/run-tests.sh @@ -125,7 +125,8 @@ case $1 in ;; chipyard-symmetric) make -C $LOCAL_CHIPYARD_DIR/tests - run_binary BINARY=$LOCAL_CHIPYARD_DIR/tests/symmetric.riscv LOADMEM=1 + run_binary BINARY=$LOCAL_CHIPYARD_DIR/tests/symmetric.riscv LOADMEM=1 EXTRA_SIM_FLAGS="+offchip_sel=0" + run_binary BINARY=$LOCAL_CHIPYARD_DIR/tests/symmetric.riscv LOADMEM=1 EXTRA_SIM_FLAGS="+offchip_sel=1" ;; chipyard-llcchiplet) make -C $LOCAL_CHIPYARD_DIR/tests diff --git a/generators/chipyard/src/main/scala/config/ChipletConfigs.scala b/generators/chipyard/src/main/scala/config/ChipletConfigs.scala index 4efd87e922..fef8a1847a 100644 --- a/generators/chipyard/src/main/scala/config/ChipletConfigs.scala +++ b/generators/chipyard/src/main/scala/config/ChipletConfigs.scala @@ -84,7 +84,7 @@ class MultiLinkSymmetricChipletRocketConfig extends Config( replicationBase = Some(1L << 32) // The upper 4GB goes off-chip ) ++ new testchipip.soc.WithOffchipBus ++ - new freechips.rocketchip.subsystem.WithNBigCores(1) ++ + new freechips.rocketchip.rocket.WithNBigCores(1) ++ new chipyard.config.AbstractConfig) // Simulates 2X of the SymmetricChipletRocketConfig in a multi-sim config