From 9da29b3e9303009a57628e357bec196fc48f14dd Mon Sep 17 00:00:00 2001
From: wuzheng <ken4647@outlook.com>
Date: Fri, 5 Jul 2024 17:31:28 +0800
Subject: [PATCH] fix 9p backend error for fsync

---
 modules/rux9p/src/drv.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/modules/rux9p/src/drv.rs b/modules/rux9p/src/drv.rs
index 131aa8cb1..82951fb3e 100644
--- a/modules/rux9p/src/drv.rs
+++ b/modules/rux9p/src/drv.rs
@@ -135,6 +135,7 @@ impl Drv9pOps {
         let mut request = _9PReq::new(_9PType::Tfsync);
         let mut response_buffer: [u8; _9P_MAX_PSIZE as usize] = [0; _9P_MAX_PSIZE as usize];
         request.write_u32(fid);
+        request.write_u32(0_u32); //0: full data sync; 1: file data only.
         request.finish();
         self.request(&request.buffer, &mut response_buffer)
     }