From 63c17cb6a0ddc5c9c3f5596e6e80d178a25f0475 Mon Sep 17 00:00:00 2001
From: Zhouqi Jiang <luojia@hust.edu.cn>
Date: Thu, 19 Dec 2024 16:40:42 +0800
Subject: [PATCH] gpio: use reference of glb RegisterBlock other than struct
 with Deref to RegisterBlock

This change shortens code and number of type generics. Code cleanup, pass tests on all feature gate options.

Signed-off-by: Zhouqi Jiang <luojia@hust.edu.cn>
---
 bouffalo-hal/src/gpio.rs                      |  21 +-
 bouffalo-hal/src/gpio/alternate.rs            |  58 ++-
 bouffalo-hal/src/gpio/convert.rs              |  38 +-
 bouffalo-hal/src/gpio/disabled.rs             |  53 ++-
 bouffalo-hal/src/gpio/gpio_group.rs           | 150 +++++--
 bouffalo-hal/src/gpio/input.rs                |  59 ++-
 bouffalo-hal/src/gpio/output.rs               |  68 ++-
 bouffalo-hal/src/gpio/pad_dummy.rs            |  41 +-
 bouffalo-hal/src/gpio/pad_v1.rs               |  54 +--
 bouffalo-hal/src/gpio/pad_v2.rs               |  78 ++--
 bouffalo-hal/src/i2c.rs                       |  60 +--
 bouffalo-hal/src/pwm.rs                       | 401 +++++++++---------
 bouffalo-hal/src/spi.rs                       | 131 +++---
 bouffalo-hal/src/uart/mux.rs                  |  77 +++-
 bouffalo-hal/src/uart/pad.rs                  | 247 +++++------
 bouffalo-rt/build.rs                          |   3 +-
 bouffalo-rt/macros/src/lib.rs                 |   3 +-
 bouffalo-rt/macros/src/soc.rs                 |   3 +
 bouffalo-rt/src/lib.rs                        |   6 +-
 bouffalo-rt/src/soc/bl616.rs                  |  32 +-
 bouffalo-rt/src/soc/bl702.rs                  |  19 +-
 bouffalo-rt/src/soc/bl808.rs                  |  41 +-
 .../peripherals/sdcard-gpt-demo/src/main.rs   |  24 +-
 .../peripherals/uart-async-demo/src/main.rs   |   2 +-
 24 files changed, 889 insertions(+), 780 deletions(-)

diff --git a/bouffalo-hal/src/gpio.rs b/bouffalo-hal/src/gpio.rs
index e87e9b2..11a54e9 100644
--- a/bouffalo-hal/src/gpio.rs
+++ b/bouffalo-hal/src/gpio.rs
@@ -24,14 +24,15 @@
 //!
 //! ```no_run
 //! # use bouffalo_hal::gpio::{Pads, IntoPad};
-//! # pub struct Peripherals { gpio: Pads<GLBv2> }
+//! # pub struct Peripherals { gpio: Pads<'static> }
 //! # pub struct GLBv2;
 //! # impl core::ops::Deref for GLBv2 {
 //! #     type Target = bouffalo_hal::glb::RegisterBlock;
 //! #     fn deref(&self) -> &Self::Target { unimplemented!() }
 //! # }
 //! # fn main() -> ! {
-//! #   let p: Peripherals = unsafe { core::mem::transmute(()) };
+//! # let glb: &bouffalo_hal::glb::RegisterBlock = unsafe { &*core::ptr::null() };
+//! # let p: Peripherals = Peripherals { gpio: Pads::__pads_from_glb(glb) };
 //! use embedded_hal::digital::{OutputPin, PinState};
 //!
 //! // Switch io8 pin into floating output mode to prepare setting its state.
@@ -61,35 +62,31 @@
 //! # use embedded_time::rate::*;
 //! # use bouffalo_hal::{
 //! #     clocks::Clocks,
-//! #     gpio::Pads,
+//! #     gpio::{Pads, IntoPadv2},
 //! #     uart::{BitOrder, Config, Parity, StopBits, WordLength},
 //! # };
 //! # use embedded_io::Write;
 //! # pub struct Serial<PADS> { pads: PADS }
 //! # impl<PADS> Serial<PADS> {
 //! #     pub fn new<UART>(_: UART, _: Config, _: Baud,
-//! # #[cfg(feature = "glb-v2")] _: PADS, _: &Clocks, _: &GLBv2)
+//! # #[cfg(feature = "glb-v2")] _: PADS, _: &Clocks, _: &())
 //! #     -> Self { unimplemented!() }
 //! #     pub fn write_fmt(&mut self, fmt: core::fmt::Arguments<'_>) -> Result<(), ()> { unimplemented!() }
 //! #     pub fn flush(&mut self) -> Result<(), ()> { unimplemented!() }
 //! # }
 //! # pub struct Peripherals {
-//! #     gpio: Pads<GLBv2>,
-//! #     glb: GLBv2,
+//! #     gpio: Pads<'static>,
+//! #     glb: (),
 //! #     uart0: UART0,
 //! # }
-//! # pub struct GLBv2;
-//! # impl core::ops::Deref for GLBv2 {
-//! #     type Target = bouffalo_hal::glb::RegisterBlock;
-//! #     fn deref(&self) -> &Self::Target { unimplemented!() }
-//! # }
 //! # pub struct UART0;
 //! # impl core::ops::Deref for UART0 {
 //! #     type Target = bouffalo_hal::uart::RegisterBlock;
 //! #     fn deref(&self) -> &Self::Target { unimplemented!() }
 //! # }
 //! # fn main() {
-//! # let p: Peripherals = unsafe { core::mem::transmute(()) };
+//! # let glb: &bouffalo_hal::glb::RegisterBlock = unsafe { &*core::ptr::null() };
+//! # let p: Peripherals = Peripherals { gpio: Pads::__pads_from_glb(glb), glb: (), uart0: UART0 };
 //! # let clocks = Clocks { xtal: Hertz(40_000_000) };
 //! // Prepare UART transmit and receive pads by converting io14 and io15 into
 //! // UART signal alternate mode.
diff --git a/bouffalo-hal/src/gpio/alternate.rs b/bouffalo-hal/src/gpio/alternate.rs
index 51ee7e4..091eaa0 100644
--- a/bouffalo-hal/src/gpio/alternate.rs
+++ b/bouffalo-hal/src/gpio/alternate.rs
@@ -1,99 +1,95 @@
 use super::{
-    convert::{IntoPad, IntoPadv2},
+    convert::IntoPad,
     input::Input,
     output::Output,
-    typestate::{self, Floating, PullDown, PullUp},
+    typestate::{Floating, PullDown, PullUp},
 };
-use crate::glb::RegisterBlock;
-use core::ops::Deref;
+#[cfg(any(doc, feature = "glb-v2"))]
+use super::{convert::IntoPadv2, typestate};
 
 /// GPIO pad with alternate mode.
-pub struct Alternate<GLB, const N: usize, M> {
-    inner: super::Inner<GLB, N, M>,
+pub struct Alternate<'a, const N: usize, M> {
+    inner: super::Inner<'a, N, M>,
 }
 
-impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPad<GLB, N>
-    for Alternate<GLB, N, M>
-{
+impl<'a, const N: usize, M> IntoPad<'a, N> for Alternate<'a, N, M> {
     #[inline]
-    fn into_pull_up_output(self) -> Output<GLB, N, PullUp> {
+    fn into_pull_up_output(self) -> Output<'a, N, PullUp> {
         self.inner.into_pull_up_output().into()
     }
     #[inline]
-    fn into_pull_down_output(self) -> Output<GLB, N, PullDown> {
+    fn into_pull_down_output(self) -> Output<'a, N, PullDown> {
         self.inner.into_pull_down_output().into()
     }
     #[inline]
-    fn into_floating_output(self) -> Output<GLB, N, Floating> {
+    fn into_floating_output(self) -> Output<'a, N, Floating> {
         self.inner.into_floating_output().into()
     }
     #[inline]
-    fn into_pull_up_input(self) -> Input<GLB, N, PullUp> {
+    fn into_pull_up_input(self) -> Input<'a, N, PullUp> {
         self.inner.into_pull_up_input().into()
     }
     #[inline]
-    fn into_pull_down_input(self) -> Input<GLB, N, PullDown> {
+    fn into_pull_down_input(self) -> Input<'a, N, PullDown> {
         self.inner.into_pull_down_input().into()
     }
     #[inline]
-    fn into_floating_input(self) -> Input<GLB, N, Floating> {
+    fn into_floating_input(self) -> Input<'a, N, Floating> {
         self.inner.into_floating_input().into()
     }
 }
 
 #[cfg(any(doc, feature = "glb-v2"))]
-impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPadv2<GLB, N>
-    for Alternate<GLB, N, M>
-{
+impl<'a, const N: usize, M> IntoPadv2<'a, N> for Alternate<'a, N, M> {
     #[inline]
-    fn into_spi<const I: usize>(self) -> Alternate<GLB, N, typestate::Spi<I>> {
+    fn into_spi<const I: usize>(self) -> Alternate<'a, N, typestate::Spi<I>> {
         self.inner.into_spi().into()
     }
     #[inline]
-    fn into_sdh(self) -> Alternate<GLB, N, typestate::Sdh> {
+    fn into_sdh(self) -> Alternate<'a, N, typestate::Sdh> {
         self.inner.into_sdh().into()
     }
     #[inline]
-    fn into_uart(self) -> Alternate<GLB, N, typestate::Uart> {
+    fn into_uart(self) -> Alternate<'a, N, typestate::Uart> {
         self.inner.into_uart().into()
     }
     #[inline]
-    fn into_mm_uart(self) -> Alternate<GLB, N, typestate::MmUart> {
+    fn into_mm_uart(self) -> Alternate<'a, N, typestate::MmUart> {
         self.inner.into_mm_uart().into()
     }
     #[inline]
-    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_pull_up_pwm().into()
     }
     #[inline]
-    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_pull_down_pwm().into()
     }
     #[inline]
-    fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_floating_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_floating_pwm().into()
     }
     #[inline]
-    fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, typestate::I2c<I>> {
+    fn into_i2c<const I: usize>(self) -> Alternate<'a, N, typestate::I2c<I>> {
         self.inner.into_i2c().into()
     }
     #[inline]
-    fn into_jtag_d0(self) -> Alternate<GLB, N, typestate::JtagD0> {
+    fn into_jtag_d0(self) -> Alternate<'a, N, typestate::JtagD0> {
         self.inner.into_jtag_d0().into()
     }
     #[inline]
-    fn into_jtag_m0(self) -> Alternate<GLB, N, typestate::JtagM0> {
+    fn into_jtag_m0(self) -> Alternate<'a, N, typestate::JtagM0> {
         self.inner.into_jtag_m0().into()
     }
     #[inline]
-    fn into_jtag_lp(self) -> Alternate<GLB, N, typestate::JtagLp> {
+    fn into_jtag_lp(self) -> Alternate<'a, N, typestate::JtagLp> {
         self.inner.into_jtag_lp().into()
     }
 }
 
-impl<GLB, const N: usize, M> From<super::Inner<GLB, N, M>> for Alternate<GLB, N, M> {
+impl<'a, const N: usize, M> From<super::Inner<'a, N, M>> for Alternate<'a, N, M> {
     #[inline]
-    fn from(inner: super::Inner<GLB, N, M>) -> Self {
+    fn from(inner: super::Inner<'a, N, M>) -> Self {
         Self { inner }
     }
 }
diff --git a/bouffalo-hal/src/gpio/convert.rs b/bouffalo-hal/src/gpio/convert.rs
index 838e168..3fb43fd 100644
--- a/bouffalo-hal/src/gpio/convert.rs
+++ b/bouffalo-hal/src/gpio/convert.rs
@@ -6,43 +6,43 @@ use super::{
 };
 
 /// Trait for pad mode conversations.
-pub trait IntoPad<GLB, const N: usize> {
+pub trait IntoPad<'a, const N: usize> {
     /// Configures the pad to operate as a pull up output pad.
-    fn into_pull_up_output(self) -> Output<GLB, N, PullUp>;
+    fn into_pull_up_output(self) -> Output<'a, N, PullUp>;
     /// Configures the pad to operate as a pull down output pad.
-    fn into_pull_down_output(self) -> Output<GLB, N, PullDown>;
+    fn into_pull_down_output(self) -> Output<'a, N, PullDown>;
     /// Configures the pad to operate as a floating output pad.
-    fn into_floating_output(self) -> Output<GLB, N, Floating>;
+    fn into_floating_output(self) -> Output<'a, N, Floating>;
     /// Configures the pad to operate as a pull up input pad.
-    fn into_pull_up_input(self) -> Input<GLB, N, PullUp>;
+    fn into_pull_up_input(self) -> Input<'a, N, PullUp>;
     /// Configures the pad to operate as a pull down input pad.
-    fn into_pull_down_input(self) -> Input<GLB, N, PullDown>;
+    fn into_pull_down_input(self) -> Input<'a, N, PullDown>;
     /// Configures the pad to operate as a floating input pad.
-    fn into_floating_input(self) -> Input<GLB, N, Floating>;
+    fn into_floating_input(self) -> Input<'a, N, Floating>;
 }
 
 /// Trait for GLBv2 pad mode conversations.
-pub trait IntoPadv2<GLB, const N: usize> {
+pub trait IntoPadv2<'a, const N: usize> {
     /// Configures the pin to operate as a SPI pin.
-    fn into_spi<const I: usize>(self) -> Alternate<GLB, N, typestate::Spi<I>>;
+    fn into_spi<const I: usize>(self) -> Alternate<'a, N, typestate::Spi<I>>;
     /// Configures the pin to operate as a SDH pin.
-    fn into_sdh(self) -> Alternate<GLB, N, typestate::Sdh>;
+    fn into_sdh(self) -> Alternate<'a, N, typestate::Sdh>;
     /// Configures the pin to operate as UART signal.
-    fn into_uart(self) -> Alternate<GLB, N, typestate::Uart>;
+    fn into_uart(self) -> Alternate<'a, N, typestate::Uart>;
     /// Configures the pin to operate as multi-media cluster UART signal.
-    fn into_mm_uart(self) -> Alternate<GLB, N, typestate::MmUart>;
+    fn into_mm_uart(self) -> Alternate<'a, N, typestate::MmUart>;
     /// Configures the pin to operate as a pull up Pulse Width Modulation signal pin.
-    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>>;
+    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>>;
     /// Configures the pin to operate as a pull down Pulse Width Modulation signal pin.
-    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>>;
+    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>>;
     /// Configures the pin to operate as floating Pulse Width Modulation signal pin.
-    fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>>;
+    fn into_floating_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>>;
     /// Configures the pin to operate as an Inter-Integrated Circuit signal pin.
-    fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, typestate::I2c<I>>;
+    fn into_i2c<const I: usize>(self) -> Alternate<'a, N, typestate::I2c<I>>;
     /// Configures the pin to operate as D0 core JTAG.
-    fn into_jtag_d0(self) -> Alternate<GLB, N, typestate::JtagD0>;
+    fn into_jtag_d0(self) -> Alternate<'a, N, typestate::JtagD0>;
     /// Configures the pin to operate as M0 core JTAG.
-    fn into_jtag_m0(self) -> Alternate<GLB, N, typestate::JtagM0>;
+    fn into_jtag_m0(self) -> Alternate<'a, N, typestate::JtagM0>;
     /// Configures the pin to operate as LP core JTAG.
-    fn into_jtag_lp(self) -> Alternate<GLB, N, typestate::JtagLp>;
+    fn into_jtag_lp(self) -> Alternate<'a, N, typestate::JtagLp>;
 }
diff --git a/bouffalo-hal/src/gpio/disabled.rs b/bouffalo-hal/src/gpio/disabled.rs
index bcd6b3f..53b0537 100644
--- a/bouffalo-hal/src/gpio/disabled.rs
+++ b/bouffalo-hal/src/gpio/disabled.rs
@@ -1,96 +1,95 @@
+#[cfg(any(doc, feature = "glb-v2"))]
+use super::{alternate::Alternate, convert::IntoPadv2};
 use super::{
-    alternate::Alternate,
-    convert::{IntoPad, IntoPadv2},
+    convert::IntoPad,
     input::Input,
     output::Output,
     typestate::{self, Floating, PullDown, PullUp},
 };
-use crate::glb::RegisterBlock;
-use core::ops::Deref;
 
 /// GPIO pad which is disabled.
-pub struct Disabled<GLB, const N: usize> {
-    inner: super::Inner<GLB, N, typestate::Disabled>,
+pub struct Disabled<'a, const N: usize> {
+    inner: super::Inner<'a, N, typestate::Disabled>,
 }
 
-impl<GLB: Deref<Target = RegisterBlock>, const N: usize> IntoPad<GLB, N> for Disabled<GLB, N> {
+impl<'a, const N: usize> IntoPad<'a, N> for Disabled<'a, N> {
     #[inline]
-    fn into_pull_up_output(self) -> Output<GLB, N, PullUp> {
+    fn into_pull_up_output(self) -> Output<'a, N, PullUp> {
         self.inner.into_pull_up_output().into()
     }
     #[inline]
-    fn into_pull_down_output(self) -> Output<GLB, N, PullDown> {
+    fn into_pull_down_output(self) -> Output<'a, N, PullDown> {
         self.inner.into_pull_down_output().into()
     }
     #[inline]
-    fn into_floating_output(self) -> Output<GLB, N, Floating> {
+    fn into_floating_output(self) -> Output<'a, N, Floating> {
         self.inner.into_floating_output().into()
     }
     #[inline]
-    fn into_pull_up_input(self) -> Input<GLB, N, PullUp> {
+    fn into_pull_up_input(self) -> Input<'a, N, PullUp> {
         self.inner.into_pull_up_input().into()
     }
     #[inline]
-    fn into_pull_down_input(self) -> Input<GLB, N, PullDown> {
+    fn into_pull_down_input(self) -> Input<'a, N, PullDown> {
         self.inner.into_pull_down_input().into()
     }
     #[inline]
-    fn into_floating_input(self) -> Input<GLB, N, Floating> {
+    fn into_floating_input(self) -> Input<'a, N, Floating> {
         self.inner.into_floating_input().into()
     }
 }
 
 #[cfg(any(doc, feature = "glb-v2"))]
-impl<GLB: Deref<Target = RegisterBlock>, const N: usize> IntoPadv2<GLB, N> for Disabled<GLB, N> {
+impl<'a, const N: usize> IntoPadv2<'a, N> for Disabled<'a, N> {
     #[inline]
-    fn into_spi<const I: usize>(self) -> Alternate<GLB, N, typestate::Spi<I>> {
+    fn into_spi<const I: usize>(self) -> Alternate<'a, N, typestate::Spi<I>> {
         self.inner.into_spi().into()
     }
     #[inline]
-    fn into_sdh(self) -> Alternate<GLB, N, typestate::Sdh> {
+    fn into_sdh(self) -> Alternate<'a, N, typestate::Sdh> {
         self.inner.into_sdh().into()
     }
     #[inline]
-    fn into_uart(self) -> Alternate<GLB, N, typestate::Uart> {
+    fn into_uart(self) -> Alternate<'a, N, typestate::Uart> {
         self.inner.into_uart().into()
     }
     #[inline]
-    fn into_mm_uart(self) -> Alternate<GLB, N, typestate::MmUart> {
+    fn into_mm_uart(self) -> Alternate<'a, N, typestate::MmUart> {
         self.inner.into_mm_uart().into()
     }
     #[inline]
-    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_pull_up_pwm().into()
     }
     #[inline]
-    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_pull_down_pwm().into()
     }
     #[inline]
-    fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_floating_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_floating_pwm().into()
     }
     #[inline]
-    fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, typestate::I2c<I>> {
+    fn into_i2c<const I: usize>(self) -> Alternate<'a, N, typestate::I2c<I>> {
         self.inner.into_i2c().into()
     }
     #[inline]
-    fn into_jtag_d0(self) -> Alternate<GLB, N, typestate::JtagD0> {
+    fn into_jtag_d0(self) -> Alternate<'a, N, typestate::JtagD0> {
         self.inner.into_jtag_d0().into()
     }
     #[inline]
-    fn into_jtag_m0(self) -> Alternate<GLB, N, typestate::JtagM0> {
+    fn into_jtag_m0(self) -> Alternate<'a, N, typestate::JtagM0> {
         self.inner.into_jtag_m0().into()
     }
     #[inline]
-    fn into_jtag_lp(self) -> Alternate<GLB, N, typestate::JtagLp> {
+    fn into_jtag_lp(self) -> Alternate<'a, N, typestate::JtagLp> {
         self.inner.into_jtag_lp().into()
     }
 }
 
-impl<GLB, const N: usize> From<super::Inner<GLB, N, typestate::Disabled>> for Disabled<GLB, N> {
+impl<'a, const N: usize> From<super::Inner<'a, N, typestate::Disabled>> for Disabled<'a, N> {
     #[inline]
-    fn from(inner: super::Inner<GLB, N, typestate::Disabled>) -> Self {
+    fn from(inner: super::Inner<'a, N, typestate::Disabled>) -> Self {
         Self { inner }
     }
 }
diff --git a/bouffalo-hal/src/gpio/gpio_group.rs b/bouffalo-hal/src/gpio/gpio_group.rs
index a928cdc..94473ef 100644
--- a/bouffalo-hal/src/gpio/gpio_group.rs
+++ b/bouffalo-hal/src/gpio/gpio_group.rs
@@ -1,97 +1,153 @@
 use super::disabled::Disabled;
 
 /// Available GPIO pads.
-pub struct Pads<GLB> {
+pub struct Pads<'a> {
     /// GPIO I/O 0.
-    pub io0: Disabled<GLB, 0>,
+    pub io0: Disabled<'a, 0>,
     /// GPIO I/O 1.
-    pub io1: Disabled<GLB, 1>,
+    pub io1: Disabled<'a, 1>,
     /// GPIO I/O 2.
-    pub io2: Disabled<GLB, 2>,
+    pub io2: Disabled<'a, 2>,
     /// GPIO I/O 3.
-    pub io3: Disabled<GLB, 3>,
+    pub io3: Disabled<'a, 3>,
     /// GPIO I/O 4.
-    pub io4: Disabled<GLB, 4>,
+    pub io4: Disabled<'a, 4>,
     /// GPIO I/O 5.
-    pub io5: Disabled<GLB, 5>,
+    pub io5: Disabled<'a, 5>,
     /// GPIO I/O 6.
-    pub io6: Disabled<GLB, 6>,
+    pub io6: Disabled<'a, 6>,
     /// GPIO I/O 7.
-    pub io7: Disabled<GLB, 7>,
+    pub io7: Disabled<'a, 7>,
     /// GPIO I/O 8.
-    pub io8: Disabled<GLB, 8>,
+    pub io8: Disabled<'a, 8>,
     /// GPIO I/O 9.
-    pub io9: Disabled<GLB, 9>,
+    pub io9: Disabled<'a, 9>,
     /// GPIO I/O 10.
-    pub io10: Disabled<GLB, 10>,
+    pub io10: Disabled<'a, 10>,
     /// GPIO I/O 11.
-    pub io11: Disabled<GLB, 11>,
+    pub io11: Disabled<'a, 11>,
     /// GPIO I/O 12.
-    pub io12: Disabled<GLB, 12>,
+    pub io12: Disabled<'a, 12>,
     /// GPIO I/O 13.
-    pub io13: Disabled<GLB, 13>,
+    pub io13: Disabled<'a, 13>,
     /// GPIO I/O 14.
-    pub io14: Disabled<GLB, 14>,
+    pub io14: Disabled<'a, 14>,
     /// GPIO I/O 15.
-    pub io15: Disabled<GLB, 15>,
+    pub io15: Disabled<'a, 15>,
     /// GPIO I/O 16.
-    pub io16: Disabled<GLB, 16>,
+    pub io16: Disabled<'a, 16>,
     /// GPIO I/O 17.
-    pub io17: Disabled<GLB, 17>,
+    pub io17: Disabled<'a, 17>,
     /// GPIO I/O 18.
-    pub io18: Disabled<GLB, 18>,
+    pub io18: Disabled<'a, 18>,
     /// GPIO I/O 19.
-    pub io19: Disabled<GLB, 19>,
+    pub io19: Disabled<'a, 19>,
     /// GPIO I/O 20.
-    pub io20: Disabled<GLB, 20>,
+    pub io20: Disabled<'a, 20>,
     /// GPIO I/O 21.
-    pub io21: Disabled<GLB, 21>,
+    pub io21: Disabled<'a, 21>,
     /// GPIO I/O 22.
-    pub io22: Disabled<GLB, 22>,
+    pub io22: Disabled<'a, 22>,
     /// GPIO I/O 23.
-    pub io23: Disabled<GLB, 23>,
+    pub io23: Disabled<'a, 23>,
     /// GPIO I/O 24.
-    pub io24: Disabled<GLB, 24>,
+    pub io24: Disabled<'a, 24>,
     /// GPIO I/O 25.
-    pub io25: Disabled<GLB, 25>,
+    pub io25: Disabled<'a, 25>,
     /// GPIO I/O 26.
-    pub io26: Disabled<GLB, 26>,
+    pub io26: Disabled<'a, 26>,
     /// GPIO I/O 27.
-    pub io27: Disabled<GLB, 27>,
+    pub io27: Disabled<'a, 27>,
     /// GPIO I/O 28.
-    pub io28: Disabled<GLB, 28>,
+    pub io28: Disabled<'a, 28>,
     /// GPIO I/O 29.
-    pub io29: Disabled<GLB, 29>,
+    pub io29: Disabled<'a, 29>,
     /// GPIO I/O 30.
-    pub io30: Disabled<GLB, 30>,
+    pub io30: Disabled<'a, 30>,
     /// GPIO I/O 31.
-    pub io31: Disabled<GLB, 31>,
+    pub io31: Disabled<'a, 31>,
     /// GPIO I/O 32.
-    pub io32: Disabled<GLB, 32>,
+    pub io32: Disabled<'a, 32>,
     /// GPIO I/O 33.
-    pub io33: Disabled<GLB, 33>,
+    pub io33: Disabled<'a, 33>,
     /// GPIO I/O 34.
-    pub io34: Disabled<GLB, 34>,
+    pub io34: Disabled<'a, 34>,
     /// GPIO I/O 35.
-    pub io35: Disabled<GLB, 35>,
+    pub io35: Disabled<'a, 35>,
     /// GPIO I/O 36.
-    pub io36: Disabled<GLB, 36>,
+    pub io36: Disabled<'a, 36>,
     /// GPIO I/O 37.
-    pub io37: Disabled<GLB, 37>,
+    pub io37: Disabled<'a, 37>,
     /// GPIO I/O 38.
-    pub io38: Disabled<GLB, 38>,
+    pub io38: Disabled<'a, 38>,
     /// GPIO I/O 39.
-    pub io39: Disabled<GLB, 39>,
+    pub io39: Disabled<'a, 39>,
     /// GPIO I/O 40.
-    pub io40: Disabled<GLB, 40>,
+    pub io40: Disabled<'a, 40>,
     /// GPIO I/O 41.
-    pub io41: Disabled<GLB, 41>,
+    pub io41: Disabled<'a, 41>,
     /// GPIO I/O 42.
-    pub io42: Disabled<GLB, 42>,
+    pub io42: Disabled<'a, 42>,
     /// GPIO I/O 43.
-    pub io43: Disabled<GLB, 43>,
+    pub io43: Disabled<'a, 43>,
     /// GPIO I/O 44.
-    pub io44: Disabled<GLB, 44>,
+    pub io44: Disabled<'a, 44>,
     /// GPIO I/O 45.
-    pub io45: Disabled<GLB, 45>,
+    pub io45: Disabled<'a, 45>,
+}
+
+// Internal function for macros, do not use.
+impl<'a> Pads<'a> {
+    #[doc(hidden)]
+    #[inline]
+    pub fn __pads_from_glb(base: &'a crate::glb::RegisterBlock) -> Self {
+        Pads {
+            io0: super::Inner::__from_glb(base).into(),
+            io1: super::Inner::__from_glb(base).into(),
+            io2: super::Inner::__from_glb(base).into(),
+            io3: super::Inner::__from_glb(base).into(),
+            io4: super::Inner::__from_glb(base).into(),
+            io5: super::Inner::__from_glb(base).into(),
+            io6: super::Inner::__from_glb(base).into(),
+            io7: super::Inner::__from_glb(base).into(),
+            io8: super::Inner::__from_glb(base).into(),
+            io9: super::Inner::__from_glb(base).into(),
+            io10: super::Inner::__from_glb(base).into(),
+            io11: super::Inner::__from_glb(base).into(),
+            io12: super::Inner::__from_glb(base).into(),
+            io13: super::Inner::__from_glb(base).into(),
+            io14: super::Inner::__from_glb(base).into(),
+            io15: super::Inner::__from_glb(base).into(),
+            io16: super::Inner::__from_glb(base).into(),
+            io17: super::Inner::__from_glb(base).into(),
+            io18: super::Inner::__from_glb(base).into(),
+            io19: super::Inner::__from_glb(base).into(),
+            io20: super::Inner::__from_glb(base).into(),
+            io21: super::Inner::__from_glb(base).into(),
+            io22: super::Inner::__from_glb(base).into(),
+            io23: super::Inner::__from_glb(base).into(),
+            io24: super::Inner::__from_glb(base).into(),
+            io25: super::Inner::__from_glb(base).into(),
+            io26: super::Inner::__from_glb(base).into(),
+            io27: super::Inner::__from_glb(base).into(),
+            io28: super::Inner::__from_glb(base).into(),
+            io29: super::Inner::__from_glb(base).into(),
+            io30: super::Inner::__from_glb(base).into(),
+            io31: super::Inner::__from_glb(base).into(),
+            io32: super::Inner::__from_glb(base).into(),
+            io33: super::Inner::__from_glb(base).into(),
+            io34: super::Inner::__from_glb(base).into(),
+            io35: super::Inner::__from_glb(base).into(),
+            io36: super::Inner::__from_glb(base).into(),
+            io37: super::Inner::__from_glb(base).into(),
+            io38: super::Inner::__from_glb(base).into(),
+            io39: super::Inner::__from_glb(base).into(),
+            io40: super::Inner::__from_glb(base).into(),
+            io41: super::Inner::__from_glb(base).into(),
+            io42: super::Inner::__from_glb(base).into(),
+            io43: super::Inner::__from_glb(base).into(),
+            io44: super::Inner::__from_glb(base).into(),
+            io45: super::Inner::__from_glb(base).into(),
+        }
+    }
 }
diff --git a/bouffalo-hal/src/gpio/input.rs b/bouffalo-hal/src/gpio/input.rs
index f57d49b..38d275f 100644
--- a/bouffalo-hal/src/gpio/input.rs
+++ b/bouffalo-hal/src/gpio/input.rs
@@ -1,19 +1,18 @@
+#[cfg(any(doc, feature = "glb-v2"))]
+use super::{alternate::Alternate, convert::IntoPadv2};
 use super::{
-    alternate::Alternate,
-    convert::{IntoPad, IntoPadv2},
+    convert::IntoPad,
     output::Output,
     typestate::{self, Floating, PullDown, PullUp},
 };
-use crate::glb::{self, RegisterBlock};
-use core::ops::Deref;
 use embedded_hal::digital::{ErrorType, InputPin};
 
 /// GPIO pad in input mode.
-pub struct Input<GLB, const N: usize, M> {
-    inner: super::Inner<GLB, N, typestate::Input<M>>,
+pub struct Input<'a, const N: usize, M> {
+    inner: super::Inner<'a, N, typestate::Input<M>>,
 }
 
-impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> Input<GLB, N, M> {
+impl<'a, const N: usize, M> Input<'a, N, M> {
     /// Enable schmitt trigger.
     #[inline]
     pub fn enable_schmitt(&mut self) {
@@ -46,86 +45,86 @@ impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> Input<GLB, N, M
     }
 }
 
-impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPad<GLB, N> for Input<GLB, N, M> {
+impl<'a, const N: usize, M> IntoPad<'a, N> for Input<'a, N, M> {
     #[inline]
-    fn into_pull_up_output(self) -> Output<GLB, N, PullUp> {
+    fn into_pull_up_output(self) -> Output<'a, N, PullUp> {
         self.inner.into_pull_up_output().into()
     }
     #[inline]
-    fn into_pull_down_output(self) -> Output<GLB, N, PullDown> {
+    fn into_pull_down_output(self) -> Output<'a, N, PullDown> {
         self.inner.into_pull_down_output().into()
     }
     #[inline]
-    fn into_floating_output(self) -> Output<GLB, N, Floating> {
+    fn into_floating_output(self) -> Output<'a, N, Floating> {
         self.inner.into_floating_output().into()
     }
     #[inline]
-    fn into_pull_up_input(self) -> Input<GLB, N, PullUp> {
+    fn into_pull_up_input(self) -> Input<'a, N, PullUp> {
         self.inner.into_pull_up_input().into()
     }
     #[inline]
-    fn into_pull_down_input(self) -> Input<GLB, N, PullDown> {
+    fn into_pull_down_input(self) -> Input<'a, N, PullDown> {
         self.inner.into_pull_down_input().into()
     }
     #[inline]
-    fn into_floating_input(self) -> Input<GLB, N, Floating> {
+    fn into_floating_input(self) -> Input<'a, N, Floating> {
         self.inner.into_floating_input().into()
     }
 }
 
 #[cfg(any(doc, feature = "glb-v2"))]
-impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPadv2<GLB, N> for Input<GLB, N, M> {
+impl<'a, const N: usize, M> IntoPadv2<'a, N> for Input<'a, N, M> {
     #[inline]
-    fn into_spi<const I: usize>(self) -> Alternate<GLB, N, typestate::Spi<I>> {
+    fn into_spi<const I: usize>(self) -> Alternate<'a, N, typestate::Spi<I>> {
         self.inner.into_spi().into()
     }
     #[inline]
-    fn into_sdh(self) -> Alternate<GLB, N, typestate::Sdh> {
+    fn into_sdh(self) -> Alternate<'a, N, typestate::Sdh> {
         self.inner.into_sdh().into()
     }
     #[inline]
-    fn into_uart(self) -> Alternate<GLB, N, typestate::Uart> {
+    fn into_uart(self) -> Alternate<'a, N, typestate::Uart> {
         self.inner.into_uart().into()
     }
     #[inline]
-    fn into_mm_uart(self) -> Alternate<GLB, N, typestate::MmUart> {
+    fn into_mm_uart(self) -> Alternate<'a, N, typestate::MmUart> {
         self.inner.into_mm_uart().into()
     }
     #[inline]
-    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_pull_up_pwm().into()
     }
     #[inline]
-    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_pull_down_pwm().into()
     }
     #[inline]
-    fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_floating_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_floating_pwm().into()
     }
     #[inline]
-    fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, typestate::I2c<I>> {
+    fn into_i2c<const I: usize>(self) -> Alternate<'a, N, typestate::I2c<I>> {
         self.inner.into_i2c().into()
     }
     #[inline]
-    fn into_jtag_d0(self) -> Alternate<GLB, N, typestate::JtagD0> {
+    fn into_jtag_d0(self) -> Alternate<'a, N, typestate::JtagD0> {
         self.inner.into_jtag_d0().into()
     }
     #[inline]
-    fn into_jtag_m0(self) -> Alternate<GLB, N, typestate::JtagM0> {
+    fn into_jtag_m0(self) -> Alternate<'a, N, typestate::JtagM0> {
         self.inner.into_jtag_m0().into()
     }
     #[inline]
-    fn into_jtag_lp(self) -> Alternate<GLB, N, typestate::JtagLp> {
+    fn into_jtag_lp(self) -> Alternate<'a, N, typestate::JtagLp> {
         self.inner.into_jtag_lp().into()
     }
 }
 
-impl<GLB, const N: usize, M> ErrorType for Input<GLB, N, M> {
+impl<'a, const N: usize, M> ErrorType for Input<'a, N, M> {
     type Error = core::convert::Infallible;
 }
 
-impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> InputPin for Input<GLB, N, M> {
+impl<'a, const N: usize, M> InputPin for Input<'a, N, M> {
     #[inline]
     fn is_high(&mut self) -> Result<bool, Self::Error> {
         self.inner.is_high()
@@ -136,9 +135,9 @@ impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> InputPin for In
     }
 }
 
-impl<GLB, const N: usize, M> From<super::Inner<GLB, N, typestate::Input<M>>> for Input<GLB, N, M> {
+impl<'a, const N: usize, M> From<super::Inner<'a, N, typestate::Input<M>>> for Input<'a, N, M> {
     #[inline]
-    fn from(inner: super::Inner<GLB, N, typestate::Input<M>>) -> Self {
+    fn from(inner: super::Inner<'a, N, typestate::Input<M>>) -> Self {
         Self { inner }
     }
 }
diff --git a/bouffalo-hal/src/gpio/output.rs b/bouffalo-hal/src/gpio/output.rs
index 8da4985..0610a0e 100644
--- a/bouffalo-hal/src/gpio/output.rs
+++ b/bouffalo-hal/src/gpio/output.rs
@@ -1,19 +1,19 @@
+#[cfg(any(doc, feature = "glb-v2"))]
+use super::{alternate::Alternate, convert::IntoPadv2};
 use super::{
-    alternate::Alternate,
-    convert::{IntoPad, IntoPadv2},
+    convert::IntoPad,
     input::Input,
     typestate::{self, Floating, PullDown, PullUp},
 };
-use crate::glb::{self, Drive, RegisterBlock};
-use core::ops::Deref;
+use crate::glb::Drive;
 use embedded_hal::digital::{ErrorType, OutputPin};
 
 /// GPIO pad in output mode.
-pub struct Output<GLB, const N: usize, M> {
-    inner: super::Inner<GLB, N, typestate::Output<M>>,
+pub struct Output<'a, const N: usize, M> {
+    inner: super::Inner<'a, N, typestate::Output<M>>,
 }
 
-impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> Output<GLB, N, M> {
+impl<'a, const N: usize, M> Output<'a, N, M> {
     /// Get drive strength of this pad.
     #[inline]
     pub fn drive(&self) -> Drive {
@@ -26,88 +26,86 @@ impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> Output<GLB, N,
     }
 }
 
-impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPad<GLB, N> for Output<GLB, N, M> {
+impl<'a, const N: usize, M> IntoPad<'a, N> for Output<'a, N, M> {
     #[inline]
-    fn into_pull_up_output(self) -> Output<GLB, N, PullUp> {
+    fn into_pull_up_output(self) -> Output<'a, N, PullUp> {
         self.inner.into_pull_up_output().into()
     }
     #[inline]
-    fn into_pull_down_output(self) -> Output<GLB, N, PullDown> {
+    fn into_pull_down_output(self) -> Output<'a, N, PullDown> {
         self.inner.into_pull_down_output().into()
     }
     #[inline]
-    fn into_floating_output(self) -> Output<GLB, N, Floating> {
+    fn into_floating_output(self) -> Output<'a, N, Floating> {
         self.inner.into_floating_output().into()
     }
     #[inline]
-    fn into_pull_up_input(self) -> Input<GLB, N, PullUp> {
+    fn into_pull_up_input(self) -> Input<'a, N, PullUp> {
         self.inner.into_pull_up_input().into()
     }
     #[inline]
-    fn into_pull_down_input(self) -> Input<GLB, N, PullDown> {
+    fn into_pull_down_input(self) -> Input<'a, N, PullDown> {
         self.inner.into_pull_down_input().into()
     }
     #[inline]
-    fn into_floating_input(self) -> Input<GLB, N, Floating> {
+    fn into_floating_input(self) -> Input<'a, N, Floating> {
         self.inner.into_floating_input().into()
     }
 }
 
 #[cfg(any(doc, feature = "glb-v2"))]
-impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPadv2<GLB, N>
-    for Output<GLB, N, M>
-{
+impl<'a, const N: usize, M> IntoPadv2<'a, N> for Output<'a, N, M> {
     #[inline]
-    fn into_spi<const I: usize>(self) -> Alternate<GLB, N, typestate::Spi<I>> {
+    fn into_spi<const I: usize>(self) -> Alternate<'a, N, typestate::Spi<I>> {
         self.inner.into_spi().into()
     }
     #[inline]
-    fn into_sdh(self) -> Alternate<GLB, N, typestate::Sdh> {
+    fn into_sdh(self) -> Alternate<'a, N, typestate::Sdh> {
         self.inner.into_sdh().into()
     }
     #[inline]
-    fn into_uart(self) -> Alternate<GLB, N, typestate::Uart> {
+    fn into_uart(self) -> Alternate<'a, N, typestate::Uart> {
         self.inner.into_uart().into()
     }
     #[inline]
-    fn into_mm_uart(self) -> Alternate<GLB, N, typestate::MmUart> {
+    fn into_mm_uart(self) -> Alternate<'a, N, typestate::MmUart> {
         self.inner.into_mm_uart().into()
     }
     #[inline]
-    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_pull_up_pwm().into()
     }
     #[inline]
-    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_pull_down_pwm().into()
     }
     #[inline]
-    fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+    fn into_floating_pwm<const I: usize>(self) -> Alternate<'a, N, typestate::Pwm<I>> {
         self.inner.into_floating_pwm().into()
     }
     #[inline]
-    fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, typestate::I2c<I>> {
+    fn into_i2c<const I: usize>(self) -> Alternate<'a, N, typestate::I2c<I>> {
         self.inner.into_i2c().into()
     }
     #[inline]
-    fn into_jtag_d0(self) -> Alternate<GLB, N, typestate::JtagD0> {
+    fn into_jtag_d0(self) -> Alternate<'a, N, typestate::JtagD0> {
         self.inner.into_jtag_d0().into()
     }
     #[inline]
-    fn into_jtag_m0(self) -> Alternate<GLB, N, typestate::JtagM0> {
+    fn into_jtag_m0(self) -> Alternate<'a, N, typestate::JtagM0> {
         self.inner.into_jtag_m0().into()
     }
     #[inline]
-    fn into_jtag_lp(self) -> Alternate<GLB, N, typestate::JtagLp> {
+    fn into_jtag_lp(self) -> Alternate<'a, N, typestate::JtagLp> {
         self.inner.into_jtag_lp().into()
     }
 }
 
-impl<GLB, const N: usize, M> ErrorType for Output<GLB, N, M> {
+impl<'a, const N: usize, M> ErrorType for Output<'a, N, M> {
     type Error = core::convert::Infallible;
 }
 
-impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> OutputPin for Output<GLB, N, M> {
+impl<'a, const N: usize, M> OutputPin for Output<'a, N, M> {
     #[inline]
     fn set_low(&mut self) -> Result<(), Self::Error> {
         self.inner.set_low()
@@ -122,9 +120,7 @@ impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> OutputPin for O
 // ecosystem crates, as some of them depends on embedded-hal v0.2.7 traits.
 // We encourage ecosystem developers to use embedded-hal v1.0.0 traits; after that, this part of code
 // would be removed in the future.
-impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M>
-    embedded_hal_027::digital::v2::OutputPin for Output<GLB, N, M>
-{
+impl<'a, const N: usize, M> embedded_hal_027::digital::v2::OutputPin for Output<'a, N, M> {
     type Error = core::convert::Infallible;
     #[inline]
     fn set_low(&mut self) -> Result<(), Self::Error> {
@@ -136,11 +132,9 @@ impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M>
     }
 }
 
-impl<GLB, const N: usize, M> From<super::Inner<GLB, N, typestate::Output<M>>>
-    for Output<GLB, N, M>
-{
+impl<'a, const N: usize, M> From<super::Inner<'a, N, typestate::Output<M>>> for Output<'a, N, M> {
     #[inline]
-    fn from(inner: super::Inner<GLB, N, typestate::Output<M>>) -> Self {
+    fn from(inner: super::Inner<'a, N, typestate::Output<M>>) -> Self {
         Self { inner }
     }
 }
diff --git a/bouffalo-hal/src/gpio/pad_dummy.rs b/bouffalo-hal/src/gpio/pad_dummy.rs
index 817a825..f24162b 100644
--- a/bouffalo-hal/src/gpio/pad_dummy.rs
+++ b/bouffalo-hal/src/gpio/pad_dummy.rs
@@ -4,11 +4,11 @@ use crate::glb::Drive;
 use core::marker::PhantomData;
 use embedded_hal::digital::{ErrorType, InputPin, OutputPin};
 
-pub struct PadDummy<GLB, const N: usize, M> {
-    _unused: PhantomData<(GLB, M)>,
+pub struct PadDummy<'a, const N: usize, M> {
+    _unused: PhantomData<(&'a (), M)>,
 }
 
-impl<GLB, const N: usize, M> PadDummy<GLB, N, Input<M>> {
+impl<'a, const N: usize, M> PadDummy<'a, N, Input<M>> {
     #[inline]
     pub fn enable_schmitt(&mut self) {
         unimplemented!()
@@ -35,7 +35,7 @@ impl<GLB, const N: usize, M> PadDummy<GLB, N, Input<M>> {
     }
 }
 
-impl<GLB, const N: usize, M> PadDummy<GLB, N, Output<M>> {
+impl<'a, const N: usize, M> PadDummy<'a, N, Output<M>> {
     #[inline]
     pub fn drive(&self) -> Drive {
         unimplemented!()
@@ -46,42 +46,42 @@ impl<GLB, const N: usize, M> PadDummy<GLB, N, Output<M>> {
     }
 }
 
-impl<GLB, const N: usize, M> PadDummy<GLB, N, M> {
+impl<'a, const N: usize, M> PadDummy<'a, N, M> {
     #[inline]
-    pub fn into_pull_up_output(self) -> PadDummy<GLB, N, Output<PullUp>> {
+    pub fn into_pull_up_output(self) -> PadDummy<'a, N, Output<PullUp>> {
         unimplemented!()
     }
     #[inline]
-    pub fn into_pull_down_output(self) -> PadDummy<GLB, N, Output<PullDown>> {
+    pub fn into_pull_down_output(self) -> PadDummy<'a, N, Output<PullDown>> {
         unimplemented!()
     }
     #[inline]
-    pub fn into_floating_output(self) -> PadDummy<GLB, N, Output<Floating>> {
+    pub fn into_floating_output(self) -> PadDummy<'a, N, Output<Floating>> {
         unimplemented!()
     }
     #[inline]
-    pub fn into_pull_up_input(self) -> PadDummy<GLB, N, Input<PullUp>> {
+    pub fn into_pull_up_input(self) -> PadDummy<'a, N, Input<PullUp>> {
         unimplemented!()
     }
     #[inline]
-    pub fn into_pull_down_input(self) -> PadDummy<GLB, N, Input<PullDown>> {
+    pub fn into_pull_down_input(self) -> PadDummy<'a, N, Input<PullDown>> {
         unimplemented!()
     }
     #[inline]
-    pub fn into_floating_input(self) -> PadDummy<GLB, N, Input<Floating>> {
+    pub fn into_floating_input(self) -> PadDummy<'a, N, Input<Floating>> {
         unimplemented!()
     }
 }
 
-impl<GLB, const N: usize, M> ErrorType for PadDummy<GLB, N, Input<M>> {
+impl<'a, const N: usize, M> ErrorType for PadDummy<'a, N, Input<M>> {
     type Error = core::convert::Infallible;
 }
 
-impl<GLB, const N: usize, M> ErrorType for PadDummy<GLB, N, Output<M>> {
+impl<'a, const N: usize, M> ErrorType for PadDummy<'a, N, Output<M>> {
     type Error = core::convert::Infallible;
 }
 
-impl<GLB, const N: usize, M> InputPin for PadDummy<GLB, N, Input<M>> {
+impl<'a, const N: usize, M> InputPin for PadDummy<'a, N, Input<M>> {
     #[inline]
     fn is_high(&mut self) -> Result<bool, Self::Error> {
         unimplemented!()
@@ -92,7 +92,7 @@ impl<GLB, const N: usize, M> InputPin for PadDummy<GLB, N, Input<M>> {
     }
 }
 
-impl<GLB, const N: usize, M> OutputPin for PadDummy<GLB, N, Output<M>> {
+impl<'a, const N: usize, M> OutputPin for PadDummy<'a, N, Output<M>> {
     #[inline]
     fn set_low(&mut self) -> Result<(), Self::Error> {
         unimplemented!()
@@ -102,3 +102,14 @@ impl<GLB, const N: usize, M> OutputPin for PadDummy<GLB, N, Output<M>> {
         unimplemented!()
     }
 }
+
+// Macro internal functions, do not use.
+impl<'a, const N: usize> PadDummy<'a, N, super::typestate::Disabled> {
+    #[doc(hidden)]
+    #[inline]
+    pub fn __from_glb(_: &'a crate::glb::RegisterBlock) -> Self {
+        Self {
+            _unused: PhantomData,
+        }
+    }
+}
diff --git a/bouffalo-hal/src/gpio/pad_v1.rs b/bouffalo-hal/src/gpio/pad_v1.rs
index 157c64f..39aa292 100644
--- a/bouffalo-hal/src/gpio/pad_v1.rs
+++ b/bouffalo-hal/src/gpio/pad_v1.rs
@@ -1,15 +1,15 @@
 use super::typestate::{Floating, Input, Output, PullDown, PullUp};
 use crate::glb::{v1, Drive, Pull};
-use core::{marker::PhantomData, ops::Deref};
+use core::marker::PhantomData;
 use embedded_hal::digital::{ErrorType, InputPin, OutputPin};
 
 /// Raw GPIO pad of BL602 and BL702.
-pub struct Padv1<GLB, const N: usize, M> {
-    base: GLB,
+pub struct Padv1<'a, const N: usize, M> {
+    base: &'a v1::RegisterBlock,
     _mode: PhantomData<M>,
 }
 
-impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, Input<M>> {
+impl<'a, const N: usize, M> Padv1<'a, N, Input<M>> {
     /// Enable schmitt trigger.
     #[inline]
     pub fn enable_schmitt(&mut self) {
@@ -48,7 +48,7 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, In
     }
 }
 
-impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, Output<M>> {
+impl<'a, const N: usize, M> Padv1<'a, N, Output<M>> {
     /// Get drive strength of this pin.
     #[inline]
     pub fn drive(&self) -> Drive {
@@ -62,7 +62,7 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, Ou
     }
 }
 
-impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, Input<M>> {
+impl<'a, const N: usize, M> Padv1<'a, N, Input<M>> {
     /// Get interrupt mode.
     #[inline]
     pub fn interrupt_mode(&self) -> v1::InterruptMode {
@@ -80,10 +80,10 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, In
     }
 }
 
-impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, M> {
+impl<'a, const N: usize, M> Padv1<'a, N, M> {
     /// Configures the pin to operate as a pull up output pin.
     #[inline]
-    pub fn into_pull_up_output(self) -> Padv1<GLB, N, Output<PullUp>> {
+    pub fn into_pull_up_output(self) -> Padv1<'a, N, Output<PullUp>> {
         let config = self.base.gpio_config[N >> 1]
             .read()
             .set_function(N & 0x1, v1::Function::Gpio)
@@ -99,7 +99,7 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, M>
     }
     /// Configures the pin to operate as a pull down output pin.
     #[inline]
-    pub fn into_pull_down_output(self) -> Padv1<GLB, N, Output<PullDown>> {
+    pub fn into_pull_down_output(self) -> Padv1<'a, N, Output<PullDown>> {
         let config = self.base.gpio_config[N >> 1]
             .read()
             .set_function(N & 0x1, v1::Function::Gpio)
@@ -115,7 +115,7 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, M>
     }
     /// Configures the pin to operate as a floating output pin.
     #[inline]
-    pub fn into_floating_output(self) -> Padv1<GLB, N, Output<Floating>> {
+    pub fn into_floating_output(self) -> Padv1<'a, N, Output<Floating>> {
         let config = self.base.gpio_config[N >> 1]
             .read()
             .set_function(N & 0x1, v1::Function::Gpio)
@@ -131,7 +131,7 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, M>
     }
     /// Configures the pin to operate as a pull up input pin.
     #[inline]
-    pub fn into_pull_up_input(self) -> Padv1<GLB, N, Input<PullUp>> {
+    pub fn into_pull_up_input(self) -> Padv1<'a, N, Input<PullUp>> {
         let config = self.base.gpio_config[N >> 1]
             .read()
             .set_function(N & 0x1, v1::Function::Gpio)
@@ -147,7 +147,7 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, M>
     }
     /// Configures the pin to operate as a pull down input pin.
     #[inline]
-    pub fn into_pull_down_input(self) -> Padv1<GLB, N, Input<PullDown>> {
+    pub fn into_pull_down_input(self) -> Padv1<'a, N, Input<PullDown>> {
         let config = self.base.gpio_config[N >> 1]
             .read()
             .set_function(N & 0x1, v1::Function::Gpio)
@@ -163,7 +163,7 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, M>
     }
     /// Configures the pin to operate as a floating input pin.
     #[inline]
-    pub fn into_floating_input(self) -> Padv1<GLB, N, Input<Floating>> {
+    pub fn into_floating_input(self) -> Padv1<'a, N, Input<Floating>> {
         let config = self.base.gpio_config[N >> 1]
             .read()
             .set_function(N & 0x1, v1::Function::Gpio)
@@ -179,21 +179,15 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> Padv1<GLB, N, M>
     }
 }
 
-impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> ErrorType
-    for Padv1<GLB, N, Input<M>>
-{
+impl<'a, const N: usize, M> ErrorType for Padv1<'a, N, Input<M>> {
     type Error = core::convert::Infallible;
 }
 
-impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> ErrorType
-    for Padv1<GLB, N, Output<M>>
-{
+impl<'a, const N: usize, M> ErrorType for Padv1<'a, N, Output<M>> {
     type Error = core::convert::Infallible;
 }
 
-impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> InputPin
-    for Padv1<GLB, N, Input<M>>
-{
+impl<'a, const N: usize, M> InputPin for Padv1<'a, N, Input<M>> {
     #[inline]
     fn is_high(&mut self) -> Result<bool, Self::Error> {
         Ok(self.base.gpio_input_value.read() & (1 << N) != 0)
@@ -204,9 +198,7 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> InputPin
     }
 }
 
-impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> OutputPin
-    for Padv1<GLB, N, Output<M>>
-{
+impl<'a, const N: usize, M> OutputPin for Padv1<'a, N, Output<M>> {
     #[inline]
     fn set_low(&mut self) -> Result<(), Self::Error> {
         let val = self.base.gpio_output_value.read();
@@ -220,3 +212,15 @@ impl<GLB: Deref<Target = v1::RegisterBlock>, const N: usize, M> OutputPin
         Ok(())
     }
 }
+
+// Macro internal functions, do not use.
+impl<'a, const N: usize> Padv1<'a, N, super::typestate::Disabled> {
+    #[doc(hidden)]
+    #[inline]
+    pub fn __from_glb(base: &'a v1::RegisterBlock) -> Self {
+        Self {
+            base,
+            _mode: PhantomData,
+        }
+    }
+}
diff --git a/bouffalo-hal/src/gpio/pad_v2.rs b/bouffalo-hal/src/gpio/pad_v2.rs
index 194f372..9c32f4f 100644
--- a/bouffalo-hal/src/gpio/pad_v2.rs
+++ b/bouffalo-hal/src/gpio/pad_v2.rs
@@ -6,16 +6,16 @@ use super::{
     Spi,
 };
 use crate::glb::{v2, Drive, Pull};
-use core::{marker::PhantomData, ops::Deref};
+use core::marker::PhantomData;
 use embedded_hal::digital::{ErrorType, InputPin, OutputPin};
 
 /// Raw GPIO pad of BL808 and BL616.
-pub struct Padv2<GLB, const N: usize, M> {
-    base: GLB,
+pub struct Padv2<'a, const N: usize, M> {
+    base: &'a v2::RegisterBlock,
     _mode: PhantomData<M>,
 }
 
-impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, Input<M>> {
+impl<'a, const N: usize, M> Padv2<'a, N, Input<M>> {
     /// Enable schmitt trigger.
     #[inline]
     pub fn enable_schmitt(&mut self) {
@@ -53,7 +53,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, In
     }
 }
 
-impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, Output<M>> {
+impl<'a, const N: usize, M> Padv2<'a, N, Output<M>> {
     /// Get drive strength of this pin.
     #[inline]
     pub fn drive(&self) -> Drive {
@@ -67,7 +67,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, Ou
     }
 }
 
-impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, Input<M>> {
+impl<'a, const N: usize, M> Padv2<'a, N, Input<M>> {
     /// Get interrupt mode.
     #[inline]
     pub fn interrupt_mode(&self) -> v2::InterruptMode {
@@ -81,10 +81,10 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, In
     }
 }
 
-impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M> {
+impl<'a, const N: usize, M> Padv2<'a, N, M> {
     /// Configures the pin to operate as a pull up output pin.
     #[inline]
-    pub fn into_pull_up_output(self) -> Padv2<GLB, N, Output<PullUp>> {
+    pub fn into_pull_up_output(self) -> Padv2<'a, N, Output<PullUp>> {
         let config = self.base.gpio_config[N]
             .read()
             .set_function(v2::Function::Gpio)
@@ -100,7 +100,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as a pull down output pin.
     #[inline]
-    pub fn into_pull_down_output(self) -> Padv2<GLB, N, Output<PullDown>> {
+    pub fn into_pull_down_output(self) -> Padv2<'a, N, Output<PullDown>> {
         let config = self.base.gpio_config[N]
             .read()
             .set_function(v2::Function::Gpio)
@@ -116,7 +116,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as a floating output pin.
     #[inline]
-    pub fn into_floating_output(self) -> Padv2<GLB, N, Output<Floating>> {
+    pub fn into_floating_output(self) -> Padv2<'a, N, Output<Floating>> {
         let config = self.base.gpio_config[N]
             .read()
             .set_function(v2::Function::Gpio)
@@ -132,7 +132,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as a pull up input pin.
     #[inline]
-    pub fn into_pull_up_input(self) -> Padv2<GLB, N, Input<PullUp>> {
+    pub fn into_pull_up_input(self) -> Padv2<'a, N, Input<PullUp>> {
         let config = self.base.gpio_config[N]
             .read()
             .set_function(v2::Function::Gpio)
@@ -148,7 +148,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as a pull down input pin.
     #[inline]
-    pub fn into_pull_down_input(self) -> Padv2<GLB, N, Input<PullDown>> {
+    pub fn into_pull_down_input(self) -> Padv2<'a, N, Input<PullDown>> {
         let config = self.base.gpio_config[N]
             .read()
             .set_function(v2::Function::Gpio)
@@ -164,7 +164,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as a floating input pin.
     #[inline]
-    pub fn into_floating_input(self) -> Padv2<GLB, N, Input<Floating>> {
+    pub fn into_floating_input(self) -> Padv2<'a, N, Input<Floating>> {
         let config = self.base.gpio_config[N]
             .read()
             .set_function(v2::Function::Gpio)
@@ -194,10 +194,10 @@ const JTAG_GPIO_CONFIG: v2::GpioConfig = v2::GpioConfig::RESET_VALUE
     .set_drive(Drive::Drive0)
     .set_pull(Pull::None);
 
-impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M> {
+impl<'a, const N: usize, M> Padv2<'a, N, M> {
     /// Configures the pin to operate as UART signal.
     #[inline]
-    pub fn into_uart(self) -> Padv2<GLB, N, Uart> {
+    pub fn into_uart(self) -> Padv2<'a, N, Uart> {
         unsafe { self.base.gpio_config[N].write(UART_GPIO_CONFIG) };
         Padv2 {
             base: self.base,
@@ -206,7 +206,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as multi-media cluster UART signal.
     #[inline]
-    pub fn into_mm_uart(self) -> Padv2<GLB, N, MmUart> {
+    pub fn into_mm_uart(self) -> Padv2<'a, N, MmUart> {
         unsafe {
             self.base.gpio_config[N].write(UART_GPIO_CONFIG.set_function(v2::Function::MmUart))
         };
@@ -217,7 +217,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as a pull up Pulse Width Modulation signal pin.
     #[inline]
-    pub fn into_pull_up_pwm<const I: usize>(self) -> Padv2<GLB, N, Pwm<I>> {
+    pub fn into_pull_up_pwm<const I: usize>(self) -> Padv2<'a, N, Pwm<I>> {
         let config = v2::GpioConfig::RESET_VALUE
             .disable_input()
             .enable_output()
@@ -233,7 +233,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as a pull down Pulse Width Modulation signal pin.
     #[inline]
-    pub fn into_pull_down_pwm<const I: usize>(self) -> Padv2<GLB, N, Pwm<I>> {
+    pub fn into_pull_down_pwm<const I: usize>(self) -> Padv2<'a, N, Pwm<I>> {
         let config = v2::GpioConfig::RESET_VALUE
             .disable_input()
             .enable_output()
@@ -249,7 +249,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as floating Pulse Width Modulation signal pin.
     #[inline]
-    pub fn into_floating_pwm<const I: usize>(self) -> Padv2<GLB, N, Pwm<I>> {
+    pub fn into_floating_pwm<const I: usize>(self) -> Padv2<'a, N, Pwm<I>> {
         let config = v2::GpioConfig::RESET_VALUE
             .disable_input()
             .enable_output()
@@ -264,7 +264,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
         }
     }
     #[inline]
-    pub fn into_i2c<const I: usize>(self) -> Padv2<GLB, N, I2c<I>> {
+    pub fn into_i2c<const I: usize>(self) -> Padv2<'a, N, I2c<I>> {
         let config = v2::GpioConfig::RESET_VALUE
             .enable_input()
             .enable_output()
@@ -282,7 +282,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as D0 core JTAG.
     #[inline]
-    pub fn into_jtag_d0(self) -> Padv2<GLB, N, JtagD0> {
+    pub fn into_jtag_d0(self) -> Padv2<'a, N, JtagD0> {
         let config = JTAG_GPIO_CONFIG.set_function(v2::Function::JtagD0);
         unsafe { self.base.gpio_config[N].write(config) };
         Padv2 {
@@ -292,7 +292,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as M0 core JTAG.
     #[inline]
-    pub fn into_jtag_m0(self) -> Padv2<GLB, N, JtagM0> {
+    pub fn into_jtag_m0(self) -> Padv2<'a, N, JtagM0> {
         let config = JTAG_GPIO_CONFIG.set_function(v2::Function::JtagM0);
         unsafe { self.base.gpio_config[N].write(config) };
         Padv2 {
@@ -302,7 +302,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as LP core JTAG.
     #[inline]
-    pub fn into_jtag_lp(self) -> Padv2<GLB, N, JtagLp> {
+    pub fn into_jtag_lp(self) -> Padv2<'a, N, JtagLp> {
         let config = JTAG_GPIO_CONFIG.set_function(v2::Function::JtagLp);
         unsafe { self.base.gpio_config[N].write(config) };
         Padv2 {
@@ -312,7 +312,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as a SPI pin.
     #[inline]
-    pub fn into_spi<const I: usize>(self) -> Padv2<GLB, N, Spi<I>> {
+    pub fn into_spi<const I: usize>(self) -> Padv2<'a, N, Spi<I>> {
         let config = v2::GpioConfig::RESET_VALUE
             .enable_input()
             .disable_output()
@@ -331,7 +331,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
     /// Configures the pin to operate as a SDH pin.
     #[inline]
-    pub fn into_sdh(self) -> Padv2<GLB, N, Sdh> {
+    pub fn into_sdh(self) -> Padv2<'a, N, Sdh> {
         let config = v2::GpioConfig::RESET_VALUE
             .enable_input()
             .disable_output()
@@ -350,21 +350,15 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> Padv2<GLB, N, M>
     }
 }
 
-impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> ErrorType
-    for Padv2<GLB, N, Input<M>>
-{
+impl<'a, const N: usize, M> ErrorType for Padv2<'a, N, Input<M>> {
     type Error = core::convert::Infallible;
 }
 
-impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> ErrorType
-    for Padv2<GLB, N, Output<M>>
-{
+impl<'a, const N: usize, M> ErrorType for Padv2<'a, N, Output<M>> {
     type Error = core::convert::Infallible;
 }
 
-impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> InputPin
-    for Padv2<GLB, N, Input<M>>
-{
+impl<'a, const N: usize, M> InputPin for Padv2<'a, N, Input<M>> {
     #[inline]
     fn is_high(&mut self) -> Result<bool, Self::Error> {
         Ok(self.base.gpio_input[N >> 5].read() & (1 << (N & 0x1F)) != 0)
@@ -375,9 +369,7 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> InputPin
     }
 }
 
-impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> OutputPin
-    for Padv2<GLB, N, Output<M>>
-{
+impl<'a, const N: usize, M> OutputPin for Padv2<'a, N, Output<M>> {
     #[inline]
     fn set_low(&mut self) -> Result<(), Self::Error> {
         unsafe { self.base.gpio_clear[N >> 5].write(1 << (N & 0x1F)) };
@@ -389,3 +381,15 @@ impl<GLB: Deref<Target = v2::RegisterBlock>, const N: usize, M> OutputPin
         Ok(())
     }
 }
+
+// Macro internal functions, do not use.
+impl<'a, const N: usize> Padv2<'a, N, super::typestate::Disabled> {
+    #[doc(hidden)]
+    #[inline]
+    pub fn __from_glb(base: &'a v2::RegisterBlock) -> Self {
+        Self {
+            base,
+            _mode: PhantomData,
+        }
+    }
+}
diff --git a/bouffalo-hal/src/i2c.rs b/bouffalo-hal/src/i2c.rs
index fe71b7d..334606b 100644
--- a/bouffalo-hal/src/i2c.rs
+++ b/bouffalo-hal/src/i2c.rs
@@ -662,36 +662,36 @@ mod i2c_impls {
     // 0, 2, 4, ..., 2n: SCL
     // 1, 3, 5, ..., 2n+1: SDA
     // TODO: support other pads if needed
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 0, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 1, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 2, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 3, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 4, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 5, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 6, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 7, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 8, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 9, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 10, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 11, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 12, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 13, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 14, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 15, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 16, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 17, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 18, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 19, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 20, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 21, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 22, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 23, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 24, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 25, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 26, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 27, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 28, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 29, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 0, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 1, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 2, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 3, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 4, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 5, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 6, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 7, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 8, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 9, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 10, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 11, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 12, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 13, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 14, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 15, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 16, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 17, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 18, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 19, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 20, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 21, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 22, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 23, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 24, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 25, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 26, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 27, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SclPin<I> for Alternate<'a, 28, gpio::I2c<I>> {}
+    impl<'a, const I: usize> SdaPin<I> for Alternate<'a, 29, gpio::I2c<I>> {}
 }
 
 #[cfg(test)]
diff --git a/bouffalo-hal/src/pwm.rs b/bouffalo-hal/src/pwm.rs
index 4e598b8..a87faef 100644
--- a/bouffalo-hal/src/pwm.rs
+++ b/bouffalo-hal/src/pwm.rs
@@ -770,13 +770,12 @@ impl<PWM: Deref<Target = RegisterBlock>, S, const I: usize, const J: usize> Chan
     /// This function statically checks if target GPIO pin mode matches current PWM channel.
     /// If won't match, it will raise compile error.
     #[inline]
-    pub fn positive_signal_pin<GLB, const N: usize, const F: usize>(
+    pub fn positive_signal_pin<'a, const N: usize, const F: usize>(
         self,
-        pin: Alternate<GLB, N, gpio::Pwm<F>>,
-    ) -> PwmPin<Self, Alternate<GLB, N, gpio::Pwm<F>>, Positive>
+        pin: Alternate<'a, N, gpio::Pwm<F>>,
+    ) -> PwmPin<Self, Alternate<'a, N, gpio::Pwm<F>>, Positive>
     where
-        GLB: Deref<Target = glb::v2::RegisterBlock>,
-        Alternate<GLB, N, gpio::Pwm<F>>: HasPwmSignal<S, I, J, Positive>,
+        Alternate<'a, N, gpio::Pwm<F>>: HasPwmSignal<S, I, J, Positive>,
     {
         PwmPin {
             channel: self,
@@ -789,13 +788,12 @@ impl<PWM: Deref<Target = RegisterBlock>, S, const I: usize, const J: usize> Chan
     /// This function statically checks if target GPIO pin mode matches current PWM channel.
     /// If won't match, it will raise compile error.
     #[inline]
-    pub fn negative_signal_pin<GLB, const N: usize, const F: usize>(
+    pub fn negative_signal_pin<'a, const N: usize, const F: usize>(
         self,
-        pin: Alternate<GLB, N, gpio::Pwm<F>>,
-    ) -> PwmPin<Self, Alternate<GLB, N, gpio::Pwm<F>>, Negative>
+        pin: Alternate<'a, N, gpio::Pwm<F>>,
+    ) -> PwmPin<Self, Alternate<'a, N, gpio::Pwm<F>>, Negative>
     where
-        GLB: Deref<Target = glb::v2::RegisterBlock>,
-        Alternate<GLB, N, gpio::Pwm<F>>: HasPwmSignal<S, I, J, Negative>,
+        Alternate<'a, N, gpio::Pwm<F>>: HasPwmSignal<S, I, J, Negative>,
     {
         PwmPin {
             channel: self,
@@ -816,13 +814,12 @@ impl<S, const I: usize> ExternalBreak<S, I> {
     /// This function statically checks if target GPIO pin mode matches the external
     /// break signal of current PWM group. If won't match, it will raise compile error.
     #[inline]
-    pub fn external_break_pin<GLB, const N: usize, const F: usize>(
+    pub fn external_break_pin<'a, const N: usize, const F: usize>(
         self,
-        pin: Alternate<GLB, N, gpio::Pwm<F>>,
-    ) -> PwmPin<Self, Alternate<GLB, N, gpio::Pwm<F>>, ()>
+        pin: Alternate<'a, N, gpio::Pwm<F>>,
+    ) -> PwmPin<Self, Alternate<'a, N, gpio::Pwm<F>>, ()>
     where
-        GLB: Deref<Target = glb::v2::RegisterBlock>,
-        Alternate<GLB, N, gpio::Pwm<F>>: HasPwmExternalBreak<I>,
+        Alternate<'a, N, gpio::Pwm<F>>: HasPwmExternalBreak<I>,
     {
         PwmPin {
             channel: self,
@@ -997,193 +994,193 @@ impl<PWM: Deref<Target = RegisterBlock>, S, const I: usize, const J: usize, PIN,
 mod gpio_impls {
     use super::*;
 
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 0, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 1, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 2, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 3, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 4, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 5, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 6, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 7, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 8, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 9, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 10, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 11, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 12, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 13, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 14, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 15, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 16, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 17, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 18, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 19, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 20, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 21, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 22, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 23, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 24, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 25, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 26, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 27, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 28, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 29, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 30, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 31, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 32, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 33, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 34, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 35, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 36, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 37, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 38, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 39, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 40, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 41, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 42, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 43, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 44, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 45, gpio::Pwm<0>> {}
-
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 0, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 1, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 2, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 3, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 4, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 5, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<GLB, 6, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<GLB, 7, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 8, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 9, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 10, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 11, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 12, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 13, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<GLB, 14, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<GLB, 15, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 16, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 17, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 18, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 19, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 20, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 21, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<GLB, 22, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<GLB, 23, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 24, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 25, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 26, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 27, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 28, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 29, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<GLB, 30, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<GLB, 31, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 32, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 33, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 34, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 35, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 36, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 37, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<GLB, 38, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<GLB, 39, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 40, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 41, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 42, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 43, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 44, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 45, gpio::Pwm<0>> {}
-
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 0, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 1, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 2, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 3, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 4, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 5, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 6, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 7, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 8, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 9, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 10, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 11, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 12, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 13, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 14, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 15, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 16, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 17, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 18, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 19, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 20, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 21, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 22, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 23, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 24, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 25, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 26, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 27, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 28, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 29, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 30, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 31, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 32, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 33, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 34, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 35, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 36, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 37, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 38, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 39, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 40, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 41, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 42, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 43, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 44, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 45, gpio::Pwm<1>> {}
-
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 0, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 1, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 2, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 3, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 4, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 5, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 6, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 7, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 8, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 9, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 10, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 11, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 12, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 13, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 14, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 15, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 16, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 17, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 18, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 19, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 20, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 21, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 22, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 23, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 24, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 25, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 26, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 27, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 28, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 29, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 30, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 31, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 32, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 33, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 34, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 35, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 36, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 37, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 38, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 39, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 40, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 41, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 42, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 43, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 44, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 45, gpio::Pwm<1>> {}    
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 0, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 1, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 2, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 3, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 4, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 5, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 6, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 7, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 8, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 9, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 10, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 11, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 12, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 13, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 14, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 15, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 16, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 17, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 18, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 19, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 20, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 21, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 22, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 23, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 24, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 25, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 26, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 27, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 28, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 29, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 30, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 31, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 32, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 33, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 34, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 35, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 36, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 37, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 38, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 39, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 40, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 41, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<'a, 42, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<'a, 43, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<'a, 44, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<'a, 45, gpio::Pwm<0>> {}
+
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<'a, 0, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<'a, 1, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<'a, 2, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<'a, 3, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<'a, 4, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<'a, 5, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<'a, 6, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<'a, 7, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<'a, 8, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<'a, 9, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<'a, 10, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<'a, 11, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<'a, 12, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<'a, 13, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<'a, 14, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<'a, 15, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<'a, 16, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<'a, 17, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<'a, 18, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<'a, 19, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<'a, 20, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<'a, 21, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<'a, 22, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<'a, 23, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<'a, 24, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<'a, 25, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<'a, 26, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<'a, 27, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<'a, 28, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<'a, 29, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<'a, 30, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<'a, 31, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<'a, 32, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<'a, 33, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<'a, 34, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<'a, 35, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<'a, 36, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<'a, 37, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<'a, 38, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<'a, 39, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<'a, 40, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<'a, 41, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<'a, 42, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<'a, 43, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<'a, 44, gpio::Pwm<0>> {}
+    impl<'a, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<'a, 45, gpio::Pwm<0>> {}
+
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 0, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 1, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 2, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 3, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 4, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 5, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 6, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 7, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 8, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 9, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 10, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 11, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 12, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 13, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 14, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 15, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 16, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 17, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 18, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 19, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 20, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 21, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 22, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 23, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 24, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 25, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 26, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 27, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 28, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 29, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 30, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 31, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 32, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 33, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 34, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 35, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 36, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 37, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 38, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 39, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 40, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 41, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<'a, 42, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<'a, 43, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<'a, 44, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<'a, 45, gpio::Pwm<1>> {}
+
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 0, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 1, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 2, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 3, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 4, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 5, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 6, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 7, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 8, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 9, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 10, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 11, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 12, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 13, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 14, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 15, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 16, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 17, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 18, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 19, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 20, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 21, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 22, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 23, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 24, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 25, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 26, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 27, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 28, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 29, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 30, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 31, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 32, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 33, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 34, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 35, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 36, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 37, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 38, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 39, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 40, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 41, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<'a, 42, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<'a, 43, gpio::Pwm<1>> {}
+    impl<'a> HasPwmExternalBreak<0> for Alternate<'a, 44, gpio::Pwm<1>> {}
+    impl<'a, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<'a, 45, gpio::Pwm<1>> {}    
 }
 
 #[cfg(test)]
diff --git a/bouffalo-hal/src/spi.rs b/bouffalo-hal/src/spi.rs
index 45232f3..ca63045 100644
--- a/bouffalo-hal/src/spi.rs
+++ b/bouffalo-hal/src/spi.rs
@@ -880,102 +880,95 @@ impl<SPI: Deref<Target = RegisterBlock>, PINS, const I: usize>
 /// Valid SPI pads.
 pub trait Pads<const I: usize> {}
 
-impl<A1, A2, A3, const N1: usize, const N2: usize, const N3: usize> Pads<1>
+impl<'a, 'b, 'c, const N1: usize, const N2: usize, const N3: usize> Pads<1>
     for (
-        Alternate<A1, N1, gpio::Spi<1>>,
-        Alternate<A2, N2, gpio::Spi<1>>,
-        Alternate<A3, N3, gpio::Spi<1>>,
+        Alternate<'a, N1, gpio::Spi<1>>,
+        Alternate<'b, N2, gpio::Spi<1>>,
+        Alternate<'c, N3, gpio::Spi<1>>,
     )
 where
-    A1: Deref<Target = glb::v2::RegisterBlock>,
-    A2: Deref<Target = glb::v2::RegisterBlock>,
-    A3: Deref<Target = glb::v2::RegisterBlock>,
-    Alternate<A1, N1, gpio::Spi<1>>: HasClkSignal,
-    Alternate<A2, N2, gpio::Spi<1>>: HasMosiSignal,
-    Alternate<A3, N3, gpio::Spi<1>>: HasCsSignal,
+    Alternate<'a, N1, gpio::Spi<1>>: HasClkSignal,
+    Alternate<'b, N2, gpio::Spi<1>>: HasMosiSignal,
+    Alternate<'c, N3, gpio::Spi<1>>: HasCsSignal,
 {
 }
 
-impl<A1, A2, A3, A4, const N1: usize, const N2: usize, const N3: usize, const N4: usize> Pads<1>
+impl<'a, 'b, 'c, 'd, const N1: usize, const N2: usize, const N3: usize, const N4: usize> Pads<1>
     for (
-        Alternate<A1, N1, gpio::Spi<1>>,
-        Alternate<A2, N2, gpio::Spi<1>>,
-        Alternate<A3, N3, gpio::Spi<1>>,
-        Alternate<A4, N4, gpio::Spi<1>>,
+        Alternate<'a, N1, gpio::Spi<1>>,
+        Alternate<'b, N2, gpio::Spi<1>>,
+        Alternate<'c, N3, gpio::Spi<1>>,
+        Alternate<'d, N4, gpio::Spi<1>>,
     )
 where
-    A1: Deref<Target = glb::v2::RegisterBlock>,
-    A2: Deref<Target = glb::v2::RegisterBlock>,
-    A3: Deref<Target = glb::v2::RegisterBlock>,
-    A4: Deref<Target = glb::v2::RegisterBlock>,
-    Alternate<A1, N1, gpio::Spi<1>>: HasClkSignal,
-    Alternate<A2, N2, gpio::Spi<1>>: HasMosiSignal,
-    Alternate<A3, N3, gpio::Spi<1>>: HasMisoSignal,
-    Alternate<A4, N4, gpio::Spi<1>>: HasCsSignal,
+    Alternate<'a, N1, gpio::Spi<1>>: HasClkSignal,
+    Alternate<'b, N2, gpio::Spi<1>>: HasMosiSignal,
+    Alternate<'c, N3, gpio::Spi<1>>: HasMisoSignal,
+    Alternate<'d, N4, gpio::Spi<1>>: HasCsSignal,
 {
 }
 
 /// Check if target gpio `Pin` is internally connected to SPI clock signal.
 pub trait HasClkSignal {}
 
-impl<GLB> HasClkSignal for Alternate<GLB, 3, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Alternate<GLB, 7, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Alternate<GLB, 11, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Alternate<GLB, 15, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Alternate<GLB, 19, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Alternate<GLB, 23, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Alternate<GLB, 27, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Alternate<GLB, 31, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Alternate<GLB, 35, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Alternate<GLB, 39, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Alternate<GLB, 43, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 3, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 7, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 11, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 15, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 19, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 23, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 27, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 31, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 35, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 39, gpio::Spi<1>> {}
+impl<'a> HasClkSignal for Alternate<'a, 43, gpio::Spi<1>> {}
 
 /// Check if target gpio `Pin` is internally connected to SPI MISO signal.
 pub trait HasMisoSignal {}
 
-impl<GLB> HasMisoSignal for Alternate<GLB, 2, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Alternate<GLB, 6, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Alternate<GLB, 10, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Alternate<GLB, 14, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Alternate<GLB, 18, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Alternate<GLB, 22, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Alternate<GLB, 26, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Alternate<GLB, 30, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Alternate<GLB, 34, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Alternate<GLB, 38, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Alternate<GLB, 42, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 2, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 6, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 10, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 14, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 18, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 22, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 26, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 30, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 34, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 38, gpio::Spi<1>> {}
+impl<'a> HasMisoSignal for Alternate<'a, 42, gpio::Spi<1>> {}
 
 /// Check if target gpio `Pin` is internally connected to SPI MOSI signal.
 pub trait HasMosiSignal {}
 
-impl<GLB> HasMosiSignal for Alternate<GLB, 1, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 5, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 9, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 13, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 17, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 21, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 25, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 29, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 33, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 37, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 41, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Alternate<GLB, 45, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 1, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 5, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 9, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 13, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 17, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 21, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 25, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 29, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 33, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 37, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 41, gpio::Spi<1>> {}
+impl<'a> HasMosiSignal for Alternate<'a, 45, gpio::Spi<1>> {}
 
 /// Check if target gpio `Pin` is internally connected to SPI CS signal.
 pub trait HasCsSignal {}
 
-impl<GLB> HasCsSignal for Alternate<GLB, 0, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 4, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 8, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 12, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 16, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 20, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 24, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 28, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 32, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 36, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 40, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Alternate<GLB, 44, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 0, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 4, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 8, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 12, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 16, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 20, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 24, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 28, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 32, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 36, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 40, gpio::Spi<1>> {}
+impl<'a> HasCsSignal for Alternate<'a, 44, gpio::Spi<1>> {}
 
 #[cfg(test)]
 mod tests {
diff --git a/bouffalo-hal/src/uart/mux.rs b/bouffalo-hal/src/uart/mux.rs
index 469b600..c423994 100644
--- a/bouffalo-hal/src/uart/mux.rs
+++ b/bouffalo-hal/src/uart/mux.rs
@@ -1,5 +1,5 @@
 use crate::glb::{self, v2::UartSignal};
-use core::{marker::PhantomData, ops::Deref};
+use core::marker::PhantomData;
 
 /// Multiplex to Request-to-Send (type state).
 pub struct MuxRts<const I: usize>;
@@ -63,16 +63,16 @@ impl<const I: usize> MuxRxd<I> {
 
 /// Global peripheral UART signal multiplexer.
 ///
-/// This structure only owns the GLB signal multiplexer for signal number `N`.
-pub struct UartMux<GLB, const N: usize, M> {
-    base: GLB,
+/// This structure only owns the 'a signal multiplexer for signal number `N`.
+pub struct UartMux<'a, const N: usize, M> {
+    base: &'a glb::v2::RegisterBlock,
     _mode: PhantomData<M>,
 }
 
-impl<GLB: Deref<Target = glb::v2::RegisterBlock>, const N: usize, M> UartMux<GLB, N, M> {
+impl<'a, const N: usize, M> UartMux<'a, N, M> {
     /// Configure the internal UART signal to Request-to-Send (RTS).
     #[inline]
-    pub fn into_request_to_send<const U: usize>(self) -> UartMux<GLB, N, MuxRts<U>> {
+    pub fn into_request_to_send<const U: usize>(self) -> UartMux<'a, N, MuxRts<U>> {
         let config = self.base.uart_mux_group[N >> 3]
             .read()
             .set_signal(N & 0x7, MuxRts::<U>::signal());
@@ -84,7 +84,7 @@ impl<GLB: Deref<Target = glb::v2::RegisterBlock>, const N: usize, M> UartMux<GLB
     }
     /// Configure the internal UART signal to Transmit (TXD).
     #[inline]
-    pub fn into_transmit<const U: usize>(self) -> UartMux<GLB, N, MuxTxd<U>> {
+    pub fn into_transmit<const U: usize>(self) -> UartMux<'a, N, MuxTxd<U>> {
         let config = self.base.uart_mux_group[N >> 3]
             .read()
             .set_signal(N & 0x7, MuxTxd::<U>::signal());
@@ -96,7 +96,7 @@ impl<GLB: Deref<Target = glb::v2::RegisterBlock>, const N: usize, M> UartMux<GLB
     }
     /// Configure the internal UART signal to Receive (RXD).
     #[inline]
-    pub fn into_receive<const U: usize>(self) -> UartMux<GLB, N, MuxRxd<U>> {
+    pub fn into_receive<const U: usize>(self) -> UartMux<'a, N, MuxRxd<U>> {
         let config = self.base.uart_mux_group[N >> 3]
             .read()
             .set_signal(N & 0x7, MuxRxd::<U>::signal());
@@ -108,7 +108,7 @@ impl<GLB: Deref<Target = glb::v2::RegisterBlock>, const N: usize, M> UartMux<GLB
     }
     /// Configure the internal UART signal to Clear-to-Send (CTS).
     #[inline]
-    pub fn into_clear_to_send<const U: usize>(self) -> UartMux<GLB, N, MuxCts<U>> {
+    pub fn into_clear_to_send<const U: usize>(self) -> UartMux<'a, N, MuxCts<U>> {
         let config = self.base.uart_mux_group[N >> 3]
             .read()
             .set_signal(N & 0x7, MuxCts::<U>::signal());
@@ -121,29 +121,62 @@ impl<GLB: Deref<Target = glb::v2::RegisterBlock>, const N: usize, M> UartMux<GLB
 }
 
 /// Available UART signal multiplexers.
-pub struct UartMuxes<GLB> {
+pub struct UartMuxes<'a> {
     /// Multiplexer of UART signal 0.
-    pub sig0: UartMux<GLB, 0, MuxRts<0>>,
+    pub sig0: UartMux<'a, 0, MuxRts<0>>,
     /// Multiplexer of UART signal 1.
-    pub sig1: UartMux<GLB, 1, MuxRts<0>>,
+    pub sig1: UartMux<'a, 1, MuxRts<0>>,
     /// Multiplexer of UART signal 2.
-    pub sig2: UartMux<GLB, 2, MuxRts<0>>,
+    pub sig2: UartMux<'a, 2, MuxRts<0>>,
     /// Multiplexer of UART signal 3.
-    pub sig3: UartMux<GLB, 3, MuxRts<0>>,
+    pub sig3: UartMux<'a, 3, MuxRts<0>>,
     /// Multiplexer of UART signal 4.
-    pub sig4: UartMux<GLB, 4, MuxRts<0>>,
+    pub sig4: UartMux<'a, 4, MuxRts<0>>,
     /// Multiplexer of UART signal 5.
-    pub sig5: UartMux<GLB, 5, MuxRts<0>>,
+    pub sig5: UartMux<'a, 5, MuxRts<0>>,
     /// Multiplexer of UART signal 6.
-    pub sig6: UartMux<GLB, 6, MuxRts<0>>,
+    pub sig6: UartMux<'a, 6, MuxRts<0>>,
     /// Multiplexer of UART signal 7.
-    pub sig7: UartMux<GLB, 7, MuxRts<0>>,
+    pub sig7: UartMux<'a, 7, MuxRts<0>>,
     /// Multiplexer of UART signal 8.
-    pub sig8: UartMux<GLB, 8, MuxRts<0>>,
+    pub sig8: UartMux<'a, 8, MuxRts<0>>,
     /// Multiplexer of UART signal 9.
-    pub sig9: UartMux<GLB, 9, MuxRts<0>>,
+    pub sig9: UartMux<'a, 9, MuxRts<0>>,
     /// Multiplexer of UART signal 10.
-    pub sig10: UartMux<GLB, 10, MuxRts<0>>,
+    pub sig10: UartMux<'a, 10, MuxRts<0>>,
     /// Multiplexer of UART signal 11.
-    pub sig11: UartMux<GLB, 11, MuxRts<0>>,
+    pub sig11: UartMux<'a, 11, MuxRts<0>>,
+}
+
+// Macro internal functions, do not use.
+
+impl<'a, const N: usize, M> UartMux<'a, N, M> {
+    #[doc(hidden)]
+    #[inline]
+    pub fn __from_glb(base: &'a glb::v2::RegisterBlock) -> Self {
+        Self {
+            base,
+            _mode: PhantomData,
+        }
+    }
+}
+impl<'a> UartMuxes<'a> {
+    #[doc(hidden)]
+    #[inline]
+    pub fn __uart_muxes_from_glb(base: &'a glb::v2::RegisterBlock) -> Self {
+        Self {
+            sig0: UartMux::__from_glb(base),
+            sig1: UartMux::__from_glb(base),
+            sig2: UartMux::__from_glb(base),
+            sig3: UartMux::__from_glb(base),
+            sig4: UartMux::__from_glb(base),
+            sig5: UartMux::__from_glb(base),
+            sig6: UartMux::__from_glb(base),
+            sig7: UartMux::__from_glb(base),
+            sig8: UartMux::__from_glb(base),
+            sig9: UartMux::__from_glb(base),
+            sig10: UartMux::__from_glb(base),
+            sig11: UartMux::__from_glb(base),
+        }
+    }
 }
diff --git a/bouffalo-hal/src/uart/pad.rs b/bouffalo-hal/src/uart/pad.rs
index 76d0ed3..900f040 100644
--- a/bouffalo-hal/src/uart/pad.rs
+++ b/bouffalo-hal/src/uart/pad.rs
@@ -1,62 +1,60 @@
 use super::{BlockingReceiveHalf, BlockingTransmitHalf, MuxCts, MuxRts, MuxRxd, MuxTxd, UartMux};
-use crate::glb;
 use crate::gpio::{Alternate, MmUart, Uart};
-use core::ops::Deref;
 
 /// Check if target gpio `Pin` is internally connected to UART signal index `I`.
 pub trait HasUartSignal<const I: usize> {}
 
-impl<GLB> HasUartSignal<0> for Alternate<GLB, 0, Uart> {}
-impl<GLB> HasUartSignal<1> for Alternate<GLB, 1, Uart> {}
-impl<GLB> HasUartSignal<2> for Alternate<GLB, 2, Uart> {}
-impl<GLB> HasUartSignal<3> for Alternate<GLB, 3, Uart> {}
-impl<GLB> HasUartSignal<4> for Alternate<GLB, 4, Uart> {}
-impl<GLB> HasUartSignal<5> for Alternate<GLB, 5, Uart> {}
-impl<GLB> HasUartSignal<6> for Alternate<GLB, 6, Uart> {}
-impl<GLB> HasUartSignal<7> for Alternate<GLB, 7, Uart> {}
-impl<GLB> HasUartSignal<8> for Alternate<GLB, 8, Uart> {}
-impl<GLB> HasUartSignal<9> for Alternate<GLB, 9, Uart> {}
-impl<GLB> HasUartSignal<10> for Alternate<GLB, 10, Uart> {}
-impl<GLB> HasUartSignal<11> for Alternate<GLB, 11, Uart> {}
-impl<GLB> HasUartSignal<0> for Alternate<GLB, 12, Uart> {}
-impl<GLB> HasUartSignal<1> for Alternate<GLB, 13, Uart> {}
-impl<GLB> HasUartSignal<2> for Alternate<GLB, 14, Uart> {}
-impl<GLB> HasUartSignal<3> for Alternate<GLB, 15, Uart> {}
-impl<GLB> HasUartSignal<4> for Alternate<GLB, 16, Uart> {}
-impl<GLB> HasUartSignal<5> for Alternate<GLB, 17, Uart> {}
-impl<GLB> HasUartSignal<6> for Alternate<GLB, 18, Uart> {}
-impl<GLB> HasUartSignal<7> for Alternate<GLB, 19, Uart> {}
-impl<GLB> HasUartSignal<8> for Alternate<GLB, 20, Uart> {}
-impl<GLB> HasUartSignal<9> for Alternate<GLB, 21, Uart> {}
-impl<GLB> HasUartSignal<10> for Alternate<GLB, 22, Uart> {}
-impl<GLB> HasUartSignal<11> for Alternate<GLB, 23, Uart> {}
-impl<GLB> HasUartSignal<0> for Alternate<GLB, 24, Uart> {}
-impl<GLB> HasUartSignal<1> for Alternate<GLB, 25, Uart> {}
-impl<GLB> HasUartSignal<2> for Alternate<GLB, 26, Uart> {}
-impl<GLB> HasUartSignal<3> for Alternate<GLB, 27, Uart> {}
-impl<GLB> HasUartSignal<4> for Alternate<GLB, 28, Uart> {}
-impl<GLB> HasUartSignal<5> for Alternate<GLB, 29, Uart> {}
-impl<GLB> HasUartSignal<6> for Alternate<GLB, 30, Uart> {}
-impl<GLB> HasUartSignal<7> for Alternate<GLB, 31, Uart> {}
-impl<GLB> HasUartSignal<8> for Alternate<GLB, 32, Uart> {}
-impl<GLB> HasUartSignal<9> for Alternate<GLB, 33, Uart> {}
-impl<GLB> HasUartSignal<10> for Alternate<GLB, 34, Uart> {}
-impl<GLB> HasUartSignal<11> for Alternate<GLB, 35, Uart> {}
-impl<GLB> HasUartSignal<0> for Alternate<GLB, 36, Uart> {}
-impl<GLB> HasUartSignal<1> for Alternate<GLB, 37, Uart> {}
-impl<GLB> HasUartSignal<2> for Alternate<GLB, 38, Uart> {}
-impl<GLB> HasUartSignal<3> for Alternate<GLB, 39, Uart> {}
-impl<GLB> HasUartSignal<4> for Alternate<GLB, 40, Uart> {}
-impl<GLB> HasUartSignal<5> for Alternate<GLB, 41, Uart> {}
-impl<GLB> HasUartSignal<6> for Alternate<GLB, 42, Uart> {}
-impl<GLB> HasUartSignal<7> for Alternate<GLB, 43, Uart> {}
-impl<GLB> HasUartSignal<8> for Alternate<GLB, 44, Uart> {}
-impl<GLB> HasUartSignal<9> for Alternate<GLB, 45, Uart> {}
+impl<'a> HasUartSignal<0> for Alternate<'a, 0, Uart> {}
+impl<'a> HasUartSignal<1> for Alternate<'a, 1, Uart> {}
+impl<'a> HasUartSignal<2> for Alternate<'a, 2, Uart> {}
+impl<'a> HasUartSignal<3> for Alternate<'a, 3, Uart> {}
+impl<'a> HasUartSignal<4> for Alternate<'a, 4, Uart> {}
+impl<'a> HasUartSignal<5> for Alternate<'a, 5, Uart> {}
+impl<'a> HasUartSignal<6> for Alternate<'a, 6, Uart> {}
+impl<'a> HasUartSignal<7> for Alternate<'a, 7, Uart> {}
+impl<'a> HasUartSignal<8> for Alternate<'a, 8, Uart> {}
+impl<'a> HasUartSignal<9> for Alternate<'a, 9, Uart> {}
+impl<'a> HasUartSignal<10> for Alternate<'a, 10, Uart> {}
+impl<'a> HasUartSignal<11> for Alternate<'a, 11, Uart> {}
+impl<'a> HasUartSignal<0> for Alternate<'a, 12, Uart> {}
+impl<'a> HasUartSignal<1> for Alternate<'a, 13, Uart> {}
+impl<'a> HasUartSignal<2> for Alternate<'a, 14, Uart> {}
+impl<'a> HasUartSignal<3> for Alternate<'a, 15, Uart> {}
+impl<'a> HasUartSignal<4> for Alternate<'a, 16, Uart> {}
+impl<'a> HasUartSignal<5> for Alternate<'a, 17, Uart> {}
+impl<'a> HasUartSignal<6> for Alternate<'a, 18, Uart> {}
+impl<'a> HasUartSignal<7> for Alternate<'a, 19, Uart> {}
+impl<'a> HasUartSignal<8> for Alternate<'a, 20, Uart> {}
+impl<'a> HasUartSignal<9> for Alternate<'a, 21, Uart> {}
+impl<'a> HasUartSignal<10> for Alternate<'a, 22, Uart> {}
+impl<'a> HasUartSignal<11> for Alternate<'a, 23, Uart> {}
+impl<'a> HasUartSignal<0> for Alternate<'a, 24, Uart> {}
+impl<'a> HasUartSignal<1> for Alternate<'a, 25, Uart> {}
+impl<'a> HasUartSignal<2> for Alternate<'a, 26, Uart> {}
+impl<'a> HasUartSignal<3> for Alternate<'a, 27, Uart> {}
+impl<'a> HasUartSignal<4> for Alternate<'a, 28, Uart> {}
+impl<'a> HasUartSignal<5> for Alternate<'a, 29, Uart> {}
+impl<'a> HasUartSignal<6> for Alternate<'a, 30, Uart> {}
+impl<'a> HasUartSignal<7> for Alternate<'a, 31, Uart> {}
+impl<'a> HasUartSignal<8> for Alternate<'a, 32, Uart> {}
+impl<'a> HasUartSignal<9> for Alternate<'a, 33, Uart> {}
+impl<'a> HasUartSignal<10> for Alternate<'a, 34, Uart> {}
+impl<'a> HasUartSignal<11> for Alternate<'a, 35, Uart> {}
+impl<'a> HasUartSignal<0> for Alternate<'a, 36, Uart> {}
+impl<'a> HasUartSignal<1> for Alternate<'a, 37, Uart> {}
+impl<'a> HasUartSignal<2> for Alternate<'a, 38, Uart> {}
+impl<'a> HasUartSignal<3> for Alternate<'a, 39, Uart> {}
+impl<'a> HasUartSignal<4> for Alternate<'a, 40, Uart> {}
+impl<'a> HasUartSignal<5> for Alternate<'a, 41, Uart> {}
+impl<'a> HasUartSignal<6> for Alternate<'a, 42, Uart> {}
+impl<'a> HasUartSignal<7> for Alternate<'a, 43, Uart> {}
+impl<'a> HasUartSignal<8> for Alternate<'a, 44, Uart> {}
+impl<'a> HasUartSignal<9> for Alternate<'a, 45, Uart> {}
 
 /// Check if an internal multi-media UART signal is connected to target gpio `Pin`.
 pub trait HasMmUartSignal {}
 
-impl<GLB, const N: usize> HasMmUartSignal for Alternate<GLB, N, MmUart> {}
+impl<'a, const N: usize> HasMmUartSignal for Alternate<'a, N, MmUart> {}
 
 /// Valid UART pads.
 #[diagnostic::on_unimplemented(
@@ -92,18 +90,17 @@ fn from_pads<T, TX, RX>(
     )
 }
 
-impl<A1, GLB2, const I: usize, const U: usize, const N: usize> Pads<U>
-    for (Alternate<A1, N, Uart>, UartMux<GLB2, I, MuxTxd<U>>)
+impl<'a, 'b, const I: usize, const U: usize, const N: usize> Pads<U>
+    for (Alternate<'a, N, Uart>, UartMux<'b, I, MuxTxd<U>>)
 where
-    A1: Deref<Target = glb::v2::RegisterBlock>,
-    Alternate<A1, N, Uart>: HasUartSignal<I>,
+    Alternate<'a, N, Uart>: HasUartSignal<I>,
 {
     const RTS: bool = false;
     const CTS: bool = false;
     const TXD: bool = true;
     const RXD: bool = false;
     type Split<T> = (
-        BlockingTransmitHalf<T, (Alternate<A1, N, Uart>, UartMux<GLB2, I, MuxTxd<U>>)>,
+        BlockingTransmitHalf<T, (Alternate<'a, N, Uart>, UartMux<'b, I, MuxTxd<U>>)>,
         BlockingReceiveHalf<T, ()>,
     );
     #[inline]
@@ -113,10 +110,10 @@ where
 }
 
 impl<
-        A1,
-        GLB2,
-        A3,
-        GLB4,
+        'a,
+        'b,
+        'c,
+        'd,
         const I1: usize,
         const I2: usize,
         const U: usize,
@@ -124,22 +121,20 @@ impl<
         const N2: usize,
     > Pads<U>
     for (
-        (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
-        (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>),
+        (Alternate<'a, N1, Uart>, UartMux<'b, I1, MuxTxd<U>>),
+        (Alternate<'c, N2, Uart>, UartMux<'d, I2, MuxRxd<U>>),
     )
 where
-    A1: Deref<Target = glb::v2::RegisterBlock>,
-    A3: Deref<Target = glb::v2::RegisterBlock>,
-    Alternate<A1, N1, Uart>: HasUartSignal<I1>,
-    Alternate<A3, N2, Uart>: HasUartSignal<I2>,
+    Alternate<'a, N1, Uart>: HasUartSignal<I1>,
+    Alternate<'c, N2, Uart>: HasUartSignal<I2>,
 {
     const RTS: bool = false;
     const CTS: bool = false;
     const TXD: bool = true;
     const RXD: bool = true;
     type Split<T> = (
-        BlockingTransmitHalf<T, (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>)>,
-        BlockingReceiveHalf<T, (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>)>,
+        BlockingTransmitHalf<T, (Alternate<'a, N1, Uart>, UartMux<'b, I1, MuxTxd<U>>)>,
+        BlockingReceiveHalf<T, (Alternate<'c, N2, Uart>, UartMux<'d, I2, MuxRxd<U>>)>,
     );
     #[inline]
     fn split<T>(self, uart: T) -> Self::Split<T> {
@@ -148,10 +143,10 @@ where
 }
 
 impl<
-        A1,
-        GLB2,
-        A3,
-        GLB4,
+        'a,
+        'b,
+        'c,
+        'd,
         const I1: usize,
         const I2: usize,
         const U: usize,
@@ -159,14 +154,12 @@ impl<
         const N2: usize,
     > Pads<U>
     for (
-        (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
-        (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxCts<U>>),
+        (Alternate<'a, N1, Uart>, UartMux<'b, I1, MuxTxd<U>>),
+        (Alternate<'c, N2, Uart>, UartMux<'d, I2, MuxCts<U>>),
     )
 where
-    A1: Deref<Target = glb::v2::RegisterBlock>,
-    A3: Deref<Target = glb::v2::RegisterBlock>,
-    Alternate<A1, N1, Uart>: HasUartSignal<I1>,
-    Alternate<A3, N2, Uart>: HasUartSignal<I2>,
+    Alternate<'a, N1, Uart>: HasUartSignal<I1>,
+    Alternate<'d, N2, Uart>: HasUartSignal<I2>,
 {
     const RTS: bool = false;
     const CTS: bool = true;
@@ -175,8 +168,8 @@ where
     type Split<T> = BlockingTransmitHalf<
         T,
         (
-            (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
-            (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxCts<U>>),
+            (Alternate<'a, N1, Uart>, UartMux<'b, I1, MuxTxd<U>>),
+            (Alternate<'c, N2, Uart>, UartMux<'d, I2, MuxCts<U>>),
         ),
     >;
     #[inline]
@@ -186,14 +179,14 @@ where
 }
 
 impl<
-        A1,
-        GLB2,
-        A3,
-        GLB4,
-        A5,
-        GLB6,
-        A7,
-        GLB8,
+        'a,
+        'b,
+        'c,
+        'd,
+        'e,
+        'f,
+        'g,
+        'h,
         const I1: usize,
         const I2: usize,
         const I3: usize,
@@ -205,20 +198,16 @@ impl<
         const N4: usize,
     > Pads<U>
     for (
-        (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
-        (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>),
-        (Alternate<A5, N3, Uart>, UartMux<GLB6, I3, MuxRts<U>>),
-        (Alternate<A7, N4, Uart>, UartMux<GLB8, I4, MuxCts<U>>),
+        (Alternate<'a, N1, Uart>, UartMux<'b, I1, MuxTxd<U>>),
+        (Alternate<'c, N2, Uart>, UartMux<'d, I2, MuxRxd<U>>),
+        (Alternate<'e, N3, Uart>, UartMux<'f, I3, MuxRts<U>>),
+        (Alternate<'g, N4, Uart>, UartMux<'h, I4, MuxCts<U>>),
     )
 where
-    A1: Deref<Target = glb::v2::RegisterBlock>,
-    A3: Deref<Target = glb::v2::RegisterBlock>,
-    A5: Deref<Target = glb::v2::RegisterBlock>,
-    A7: Deref<Target = glb::v2::RegisterBlock>,
-    Alternate<A1, N1, Uart>: HasUartSignal<I1>,
-    Alternate<A3, N2, Uart>: HasUartSignal<I2>,
-    Alternate<A5, N3, Uart>: HasUartSignal<I3>,
-    Alternate<A7, N4, Uart>: HasUartSignal<I4>,
+    Alternate<'a, N1, Uart>: HasUartSignal<I1>,
+    Alternate<'c, N2, Uart>: HasUartSignal<I2>,
+    Alternate<'e, N3, Uart>: HasUartSignal<I3>,
+    Alternate<'g, N4, Uart>: HasUartSignal<I4>,
 {
     const RTS: bool = false;
     const CTS: bool = true;
@@ -228,15 +217,15 @@ where
         BlockingTransmitHalf<
             T,
             (
-                (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
-                (Alternate<A7, N4, Uart>, UartMux<GLB8, I4, MuxCts<U>>),
+                (Alternate<'a, N1, Uart>, UartMux<'b, I1, MuxTxd<U>>),
+                (Alternate<'g, N4, Uart>, UartMux<'h, I4, MuxCts<U>>),
             ),
         >,
         BlockingReceiveHalf<
             T,
             (
-                (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>),
-                (Alternate<A5, N3, Uart>, UartMux<GLB6, I3, MuxRts<U>>),
+                (Alternate<'c, N2, Uart>, UartMux<'d, I2, MuxRxd<U>>),
+                (Alternate<'e, N3, Uart>, UartMux<'f, I3, MuxRts<U>>),
             ),
         >,
     );
@@ -250,10 +239,9 @@ where
 
 const MMUART_UART_ID: usize = 3;
 
-impl<A1, const N: usize> Pads<MMUART_UART_ID> for Alternate<A1, N, MmUart>
+impl<'a, const N: usize> Pads<MMUART_UART_ID> for Alternate<'a, N, MmUart>
 where
-    A1: Deref<Target = glb::v2::RegisterBlock>,
-    Alternate<A1, N, MmUart>: HasMmUartSignal,
+    Alternate<'a, N, MmUart>: HasMmUartSignal,
 {
     const RTS: bool = { N % 4 == 2 };
     const CTS: bool = { N % 4 == 3 };
@@ -267,13 +255,11 @@ where
     }
 }
 
-impl<A1, A2, const N1: usize, const N2: usize> Pads<MMUART_UART_ID>
-    for (Alternate<A1, N1, MmUart>, Alternate<A2, N2, MmUart>)
+impl<'a, 'b, const N1: usize, const N2: usize> Pads<MMUART_UART_ID>
+    for (Alternate<'a, N1, MmUart>, Alternate<'b, N2, MmUart>)
 where
-    A1: Deref<Target = glb::v2::RegisterBlock>,
-    A2: Deref<Target = glb::v2::RegisterBlock>,
-    Alternate<A1, N1, MmUart>: HasMmUartSignal,
-    Alternate<A2, N2, MmUart>: HasMmUartSignal,
+    Alternate<'a, N1, MmUart>: HasMmUartSignal,
+    Alternate<'b, N2, MmUart>: HasMmUartSignal,
 {
     const RTS: bool = { N1 % 4 == 2 || N2 % 4 == 2 };
     const CTS: bool = { N1 % 4 == 3 || N2 % 4 == 3 };
@@ -287,19 +273,16 @@ where
     }
 }
 
-impl<A1, A2, A3, const N1: usize, const N2: usize, const N3: usize> Pads<MMUART_UART_ID>
+impl<'a, 'b, 'c, const N1: usize, const N2: usize, const N3: usize> Pads<MMUART_UART_ID>
     for (
-        Alternate<A1, N1, MmUart>,
-        Alternate<A2, N2, MmUart>,
-        Alternate<A3, N3, MmUart>,
+        Alternate<'a, N1, MmUart>,
+        Alternate<'b, N2, MmUart>,
+        Alternate<'c, N3, MmUart>,
     )
 where
-    A1: Deref<Target = glb::v2::RegisterBlock>,
-    A2: Deref<Target = glb::v2::RegisterBlock>,
-    A3: Deref<Target = glb::v2::RegisterBlock>,
-    Alternate<A1, N1, MmUart>: HasMmUartSignal,
-    Alternate<A2, N2, MmUart>: HasMmUartSignal,
-    Alternate<A3, N3, MmUart>: HasMmUartSignal,
+    Alternate<'a, N1, MmUart>: HasMmUartSignal,
+    Alternate<'b, N2, MmUart>: HasMmUartSignal,
+    Alternate<'c, N3, MmUart>: HasMmUartSignal,
 {
     const RTS: bool = { N1 % 4 == 2 || N2 % 4 == 2 || N3 % 4 == 2 };
     const CTS: bool = { N1 % 4 == 3 || N2 % 4 == 3 || N3 % 4 == 3 };
@@ -313,23 +296,19 @@ where
     }
 }
 
-impl<A1, A2, A3, A4, const N1: usize, const N2: usize, const N3: usize, const N4: usize>
+impl<'a, 'b, 'c, 'd, const N1: usize, const N2: usize, const N3: usize, const N4: usize>
     Pads<MMUART_UART_ID>
     for (
-        Alternate<A1, N1, MmUart>,
-        Alternate<A2, N2, MmUart>,
-        Alternate<A3, N3, MmUart>,
-        Alternate<A4, N4, MmUart>,
+        Alternate<'a, N1, MmUart>,
+        Alternate<'b, N2, MmUart>,
+        Alternate<'c, N3, MmUart>,
+        Alternate<'d, N4, MmUart>,
     )
 where
-    A1: Deref<Target = glb::v2::RegisterBlock>,
-    A2: Deref<Target = glb::v2::RegisterBlock>,
-    A3: Deref<Target = glb::v2::RegisterBlock>,
-    A4: Deref<Target = glb::v2::RegisterBlock>,
-    Alternate<A1, N1, MmUart>: HasMmUartSignal,
-    Alternate<A2, N2, MmUart>: HasMmUartSignal,
-    Alternate<A3, N3, MmUart>: HasMmUartSignal,
-    Alternate<A4, N4, MmUart>: HasMmUartSignal,
+    Alternate<'a, N1, MmUart>: HasMmUartSignal,
+    Alternate<'b, N2, MmUart>: HasMmUartSignal,
+    Alternate<'c, N3, MmUart>: HasMmUartSignal,
+    Alternate<'d, N4, MmUart>: HasMmUartSignal,
 {
     const RTS: bool = { N1 % 4 == 2 || N2 % 4 == 2 || N3 % 4 == 2 || N4 % 4 == 2 };
     const CTS: bool = { N1 % 4 == 3 || N2 % 4 == 3 || N3 % 4 == 3 || N4 % 4 == 3 };
diff --git a/bouffalo-rt/build.rs b/bouffalo-rt/build.rs
index b5b4636..472cecc 100644
--- a/bouffalo-rt/build.rs
+++ b/bouffalo-rt/build.rs
@@ -1,5 +1,3 @@
-use std::{env, path::PathBuf};
-
 fn main() {
     #[cfg(any(
         feature = "bl616",
@@ -9,6 +7,7 @@ fn main() {
         feature = "bl702"
     ))]
     let (out, ld) = {
+        use std::{env, path::PathBuf};
         let out = PathBuf::from(env::var_os("OUT_DIR").unwrap());
         let ld = out.join("bouffalo-rt.ld");
         (out, ld)
diff --git a/bouffalo-rt/macros/src/lib.rs b/bouffalo-rt/macros/src/lib.rs
index 70125db..2a0412d 100644
--- a/bouffalo-rt/macros/src/lib.rs
+++ b/bouffalo-rt/macros/src/lib.rs
@@ -52,8 +52,7 @@ pub fn entry(args: TokenStream, input: TokenStream) -> TokenStream {
     quote!(
         #[export_name = "main"]
         pub extern "C" fn main() -> ! {
-            let p = unsafe { core::mem::transmute(()) };
-            let c = bouffalo_rt::__new_clocks(40_000_000);
+            let (p, c) = bouffalo_rt::__rom_init_params(40_000_000);
             unsafe { __bouffalo_rt_macros__main(p, c) }
         }
         #[allow(non_snake_case)]
diff --git a/bouffalo-rt/macros/src/soc.rs b/bouffalo-rt/macros/src/soc.rs
index 83a23cb..afd00c4 100644
--- a/bouffalo-rt/macros/src/soc.rs
+++ b/bouffalo-rt/macros/src/soc.rs
@@ -14,5 +14,8 @@ pub fn check_interrupt_name(ident: &Ident) -> Option<Error> {
             ),
         ));
     }
+    // TODO: support for other chips and contexts
+    #[cfg(not(feature = "bl808-dsp"))]
+    let _ = ident;
     None
 }
diff --git a/bouffalo-rt/src/lib.rs b/bouffalo-rt/src/lib.rs
index b948617..66b4181 100644
--- a/bouffalo-rt/src/lib.rs
+++ b/bouffalo-rt/src/lib.rs
@@ -18,15 +18,15 @@ cfg_if::cfg_if! {
     if #[cfg(any(feature = "bl808-mcu", feature = "bl808-dsp", feature = "bl808-lp"))] {
         pub use soc::bl808::{Peripherals, Clocks};
         #[doc(hidden)]
-        pub use soc::bl808::__new_clocks;
+        pub use soc::bl808::__rom_init_params;
     } else if #[cfg(feature = "bl702")] {
         pub use soc::bl702::{Peripherals, Clocks};
         #[doc(hidden)]
-        pub use soc::bl702::__new_clocks;
+        pub use soc::bl702::__rom_init_params;
     } else if #[cfg(feature = "bl616")] {
         pub use soc::bl616::{Peripherals, Clocks};
         #[doc(hidden)]
-        pub use soc::bl616::__new_clocks;
+        pub use soc::bl616::__rom_init_params;
     }
 }
 
diff --git a/bouffalo-rt/src/soc/bl616.rs b/bouffalo-rt/src/soc/bl616.rs
index 29d3f4b..9c1a874 100644
--- a/bouffalo-rt/src/soc/bl616.rs
+++ b/bouffalo-rt/src/soc/bl616.rs
@@ -213,13 +213,13 @@ pub struct HalCpuCfg {
 }
 
 /// Peripherals available on ROM start.
-pub struct Peripherals {
+pub struct Peripherals<'a> {
     /// Global configuration peripheral.
     pub glb: GLBv2,
     /// General Purpose Input/Output pads.
-    pub gpio: bouffalo_hal::gpio::Pads<GLBv2>,
+    pub gpio: bouffalo_hal::gpio::Pads<'a>,
     /// UART signal multiplexers.
-    pub uart_muxes: bouffalo_hal::uart::UartMuxes<GLBv2>,
+    pub uart_muxes: bouffalo_hal::uart::UartMuxes<'a>,
     /// Universal Asynchronous Receiver/Transmitter peripheral 0.
     pub uart0: UART0,
     /// Universal Asynchronous Receiver/Transmitter peripheral 1.
@@ -262,13 +262,33 @@ soc! {
 pub use bouffalo_hal::clocks::Clocks;
 
 // Used by macros only.
+#[allow(unused)]
 #[doc(hidden)]
 #[inline(always)]
-pub fn __new_clocks(xtal_hz: u32) -> Clocks {
+pub fn __rom_init_params(xtal_hz: u32) -> (Peripherals<'static>, Clocks) {
     use embedded_time::rate::Hertz;
-    Clocks {
+    let peripherals = Peripherals {
+        glb: GLBv2 { _private: () },
+        gpio: match () {
+            #[cfg(feature = "bl616")]
+            () => bouffalo_hal::gpio::Pads::__pads_from_glb(&GLBv2 { _private: () }),
+            #[cfg(not(feature = "bl616"))]
+            () => unimplemented!(),
+        },
+        uart_muxes: bouffalo_hal::uart::UartMuxes::__uart_muxes_from_glb(&GLBv2 { _private: () }),
+        uart0: UART0 { _private: () },
+        uart1: UART1 { _private: () },
+        spi: SPI { _private: () },
+        i2c0: I2C0 { _private: () },
+        pwm: PWM { _private: () },
+        i2c1: I2C1 { _private: () },
+        hbn: HBN { _private: () },
+        emac: EMAC { _private: () },
+    };
+    let clocks = Clocks {
         xtal: Hertz(xtal_hz),
-    }
+    };
+    (peripherals, clocks)
 }
 
 #[cfg(test)]
diff --git a/bouffalo-rt/src/soc/bl702.rs b/bouffalo-rt/src/soc/bl702.rs
index d791fbf..7843775 100644
--- a/bouffalo-rt/src/soc/bl702.rs
+++ b/bouffalo-rt/src/soc/bl702.rs
@@ -215,13 +215,26 @@ pub use bouffalo_hal::clocks::Clocks;
 
 // TODO: BL702 clock tree configuration.
 // Used by macros only.
+#[allow(unused)]
 #[doc(hidden)]
 #[inline(always)]
-pub fn __new_clocks(xtal_hz: u32) -> Clocks {
+pub fn __rom_init_params(xtal_hz: u32) -> (Peripherals, Clocks) {
     use embedded_time::rate::Hertz;
-    Clocks {
+    let peripherals = Peripherals {
+        glb: GLBv1 { _private: () },
+        uart0: UART0 { _private: () },
+        uart1: UART1 { _private: () },
+        spi: SPI { _private: () },
+        i2c: I2C { _private: () },
+        pwm: PWM { _private: () },
+        emac: EMAC { _private: () },
+        hbn: HBN { _private: () },
+        usb: USBv1 { _private: () },
+    };
+    let clocks = Clocks {
         xtal: Hertz(xtal_hz),
-    }
+    };
+    (peripherals, clocks)
 }
 
 #[cfg(test)]
diff --git a/bouffalo-rt/src/soc/bl808.rs b/bouffalo-rt/src/soc/bl808.rs
index cb1c431..8e7b505 100644
--- a/bouffalo-rt/src/soc/bl808.rs
+++ b/bouffalo-rt/src/soc/bl808.rs
@@ -794,13 +794,13 @@ impl HalCpuCfg {
 }
 
 /// Peripherals available on ROM start.
-pub struct Peripherals {
+pub struct Peripherals<'a> {
     /// Global configuration peripheral.
     pub glb: GLBv2,
     /// General Purpose Input/Output pads.
-    pub gpio: bouffalo_hal::gpio::Pads<GLBv2>,
+    pub gpio: bouffalo_hal::gpio::Pads<'a>,
     /// UART signal multiplexers.
-    pub uart_muxes: bouffalo_hal::uart::UartMuxes<GLBv2>,
+    pub uart_muxes: bouffalo_hal::uart::UartMuxes<'a>,
     /// Universal Asynchronous Receiver/Transmitter peripheral 0.
     pub uart0: UART0,
     /// Universal Asynchronous Receiver/Transmitter peripheral 1.
@@ -879,13 +879,42 @@ soc! {
 pub use bouffalo_hal::clocks::Clocks;
 
 // Used by macros only.
+#[allow(unused)]
 #[doc(hidden)]
 #[inline(always)]
-pub fn __new_clocks(xtal_hz: u32) -> Clocks {
+pub fn __rom_init_params(xtal_hz: u32) -> (Peripherals<'static>, Clocks) {
     use embedded_time::rate::Hertz;
-    Clocks {
+    let peripherals = Peripherals {
+        glb: GLBv2 { _private: () },
+        gpio: match () {
+            #[cfg(any(feature = "bl808-dsp", feature = "bl808-mcu", feature = "bl808-lp"))]
+            () => bouffalo_hal::gpio::Pads::__pads_from_glb(&GLBv2 { _private: () }),
+            #[cfg(not(any(feature = "bl808-dsp", feature = "bl808-mcu", feature = "bl808-lp")))]
+            () => unimplemented!(),
+        },
+        uart_muxes: bouffalo_hal::uart::UartMuxes::__uart_muxes_from_glb(&GLBv2 { _private: () }),
+        uart0: UART0 { _private: () },
+        uart1: UART1 { _private: () },
+        spi0: SPI0 { _private: () },
+        i2c0: I2C0 { _private: () },
+        pwm: PWM { _private: () },
+        i2c1: I2C1 { _private: () },
+        uart2: UART2 { _private: () },
+        lz4d: LZ4D { _private: () },
+        hbn: HBN { _private: () },
+        emac: EMAC { _private: () },
+        uart3: UART3 { _private: () },
+        i2c2: I2C2 { _private: () },
+        i2c3: I2C3 { _private: () },
+        spi1: SPI1 { _private: () },
+        plic: PLIC { _private: () },
+        mmglb: MMGLB { _private: () },
+        psram: PSRAM { _private: () },
+    };
+    let clocks = Clocks {
         xtal: Hertz(xtal_hz),
-    }
+    };
+    (peripherals, clocks)
 }
 
 #[cfg(test)]
diff --git a/examples/peripherals/sdcard-gpt-demo/src/main.rs b/examples/peripherals/sdcard-gpt-demo/src/main.rs
index 0679c96..5d55875 100644
--- a/examples/peripherals/sdcard-gpt-demo/src/main.rs
+++ b/examples/peripherals/sdcard-gpt-demo/src/main.rs
@@ -249,26 +249,10 @@ fn main(p: Peripherals, c: Clocks) -> ! {
             Spi<
                 bouffalo_rt::soc::bl808::SPI0,
                 (
-                    bouffalo_hal::gpio::Alternate<
-                        bouffalo_rt::soc::bl808::GLBv2,
-                        3,
-                        bouffalo_hal::gpio::Spi<1>,
-                    >,
-                    bouffalo_hal::gpio::Alternate<
-                        bouffalo_rt::soc::bl808::GLBv2,
-                        1,
-                        bouffalo_hal::gpio::Spi<1>,
-                    >,
-                    bouffalo_hal::gpio::Alternate<
-                        bouffalo_rt::soc::bl808::GLBv2,
-                        2,
-                        bouffalo_hal::gpio::Spi<1>,
-                    >,
-                    bouffalo_hal::gpio::Alternate<
-                        bouffalo_rt::soc::bl808::GLBv2,
-                        0,
-                        bouffalo_hal::gpio::Spi<1>,
-                    >,
+                    bouffalo_hal::gpio::Alternate<3, bouffalo_hal::gpio::Spi<1>>,
+                    bouffalo_hal::gpio::Alternate<1, bouffalo_hal::gpio::Spi<1>>,
+                    bouffalo_hal::gpio::Alternate<2, bouffalo_hal::gpio::Spi<1>>,
+                    bouffalo_hal::gpio::Alternate<0, bouffalo_hal::gpio::Spi<1>>,
                 ),
                 1,
             >,
diff --git a/examples/peripherals/uart-async-demo/src/main.rs b/examples/peripherals/uart-async-demo/src/main.rs
index e25b43f..6ad80f2 100644
--- a/examples/peripherals/uart-async-demo/src/main.rs
+++ b/examples/peripherals/uart-async-demo/src/main.rs
@@ -13,7 +13,7 @@ use bouffalo_rt::{
 use embedded_time::rate::*;
 use panic_halt as _;
 
-async fn async_main(p: Peripherals, c: Clocks) {
+async fn async_main(p: Peripherals<'_>, c: Clocks) {
     // enable jtag
     p.gpio.io0.into_jtag_d0();
     p.gpio.io1.into_jtag_d0();