From 3678333a74c60b672fa2e38b8fada65e3481a699 Mon Sep 17 00:00:00 2001
From: Zhouqi Jiang <luojia@hust.edu.cn>
Date: Thu, 19 Dec 2024 15:07:21 +0800
Subject: [PATCH] gpio: rearrange Pad into Alternate and other structures

Simplify inner structures into `Inner` struct.

Now struct Pad is split into Disabled, Input, Output and Alternate structures to make code clearer.

Signed-off-by: Zhouqi Jiang <luojia@hust.edu.cn>
---
 bouffalo-hal/src/gpio.rs                      | 103 +----
 bouffalo-hal/src/gpio/alternate.rs            |  99 +++++
 bouffalo-hal/src/gpio/convert.rs              |  23 +-
 bouffalo-hal/src/gpio/disabled.rs             |  81 ++--
 bouffalo-hal/src/gpio/input.rs                |  85 ++--
 bouffalo-hal/src/gpio/output.rs               |  85 ++--
 bouffalo-hal/src/i2c.rs                       |  88 ++--
 bouffalo-hal/src/pwm.rs                       | 398 +++++++++---------
 bouffalo-hal/src/spi.rs                       | 133 +++---
 bouffalo-hal/src/uart/pad.rs                  | 188 ++++-----
 .../peripherals/sdcard-gpt-demo/src/main.rs   |   8 +-
 11 files changed, 668 insertions(+), 623 deletions(-)
 create mode 100644 bouffalo-hal/src/gpio/alternate.rs

diff --git a/bouffalo-hal/src/gpio.rs b/bouffalo-hal/src/gpio.rs
index fce8e86..640e8a8 100644
--- a/bouffalo-hal/src/gpio.rs
+++ b/bouffalo-hal/src/gpio.rs
@@ -119,6 +119,7 @@
 //! # }
 //! ```
 
+mod alternate;
 mod convert;
 mod disabled;
 mod gpio_group;
@@ -129,6 +130,7 @@ mod pad_v1;
 mod pad_v2;
 mod typestate;
 
+pub use alternate::Alternate;
 pub use convert::{IntoPad, IntoPadv2};
 pub use disabled::Disabled;
 pub use gpio_group::Pads;
@@ -137,105 +139,12 @@ pub use output::Output;
 pub use typestate::*;
 pub use {pad_v1::Padv1, pad_v2::Padv2};
 
-use crate::glb;
-use core::ops::Deref;
-
 cfg_if::cfg_if! {
     if #[cfg(feature = "glb-v1")] {
-        pub use crate::glb::v1;
+        pub(crate) use pad_v1::Padv1 as Inner;
     } else if #[cfg(feature = "glb-v2")] {
-        pub use crate::glb::v2;
-    }
-}
-
-/// Individual GPIO pad.
-pub struct Pad<GLB, const N: usize, M> {
-    #[cfg(feature = "glb-v1")]
-    inner: pad_v1::Padv1<GLB, N, M>,
-    #[cfg(feature = "glb-v2")]
-    inner: pad_v2::Padv2<GLB, N, M>,
-    #[cfg(not(any(feature = "glb-v1", feature = "glb-v2")))]
-    inner: pad_dummy::PadDummy<GLB, N, M>,
-}
-
-// TODO: #[doc(cfg(feature = "glb-v2"))] once feature(doc_cfg) is stablized
-#[cfg(any(doc, feature = "glb-v2"))]
-impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> Pad<GLB, N, M> {
-    /// Configures the pin to operate as a SPI pin.
-    #[inline]
-    pub fn into_spi<const I: usize>(self) -> Pad<GLB, N, Spi<I>> {
-        Pad {
-            inner: self.inner.into_spi(),
-        }
-    }
-    /// Configures the pin to operate as a SDH pin.
-    #[inline]
-    pub fn into_sdh(self) -> Pad<GLB, N, Sdh> {
-        Pad {
-            inner: self.inner.into_sdh(),
-        }
-    }
-    /// Configures the pin to operate as UART signal.
-    #[inline]
-    pub fn into_uart(self) -> Pad<GLB, N, Uart> {
-        Pad {
-            inner: self.inner.into_uart(),
-        }
-    }
-    /// Configures the pin to operate as multi-media cluster UART signal.
-    #[inline]
-    pub fn into_mm_uart(self) -> Pad<GLB, N, MmUart> {
-        Pad {
-            inner: self.inner.into_mm_uart(),
-        }
-    }
-    /// Configures the pin to operate as a pull up Pulse Width Modulation signal pin.
-    #[inline]
-    pub fn into_pull_up_pwm<const I: usize>(self) -> Pad<GLB, N, Pwm<I>> {
-        Pad {
-            inner: self.inner.into_pull_up_pwm(),
-        }
-    }
-    /// Configures the pin to operate as a pull down Pulse Width Modulation signal pin.
-    #[inline]
-    pub fn into_pull_down_pwm<const I: usize>(self) -> Pad<GLB, N, Pwm<I>> {
-        Pad {
-            inner: self.inner.into_pull_down_pwm(),
-        }
-    }
-    /// Configures the pin to operate as floating Pulse Width Modulation signal pin.
-    #[inline]
-    pub fn into_floating_pwm<const I: usize>(self) -> Pad<GLB, N, Pwm<I>> {
-        Pad {
-            inner: self.inner.into_floating_pwm(),
-        }
-    }
-    /// Configures the pin to operate as an Inter-Integrated Circuit signal pin.
-    #[inline]
-    pub fn into_i2c<const I: usize>(self) -> Pad<GLB, N, I2c<I>> {
-        Pad {
-            inner: self.inner.into_i2c(),
-        }
-    }
-    /// Configures the pin to operate as D0 core JTAG.
-    #[inline]
-    pub fn into_jtag_d0(self) -> Pad<GLB, N, JtagD0> {
-        Pad {
-            inner: self.inner.into_jtag_d0(),
-        }
-    }
-    /// Configures the pin to operate as M0 core JTAG.
-    #[inline]
-    pub fn into_jtag_m0(self) -> Pad<GLB, N, JtagM0> {
-        Pad {
-            inner: self.inner.into_jtag_m0(),
-        }
-    }
-    /// Configures the pin to operate as LP core JTAG.
-    #[inline]
-    pub fn into_jtag_lp(self) -> Pad<GLB, N, JtagLp> {
-        Pad {
-            inner: self.inner.into_jtag_lp(),
-        }
+        pub(crate) use pad_v2::Padv2 as Inner;
+    } else {
+        pub(crate) use pad_dummy::PadDummy as Inner;
     }
 }
diff --git a/bouffalo-hal/src/gpio/alternate.rs b/bouffalo-hal/src/gpio/alternate.rs
new file mode 100644
index 0000000..51ee7e4
--- /dev/null
+++ b/bouffalo-hal/src/gpio/alternate.rs
@@ -0,0 +1,99 @@
+use super::{
+    convert::{IntoPad, IntoPadv2},
+    input::Input,
+    output::Output,
+    typestate::{self, Floating, PullDown, PullUp},
+};
+use crate::glb::RegisterBlock;
+use core::ops::Deref;
+
+/// GPIO pad with alternate mode.
+pub struct Alternate<GLB, const N: usize, M> {
+    inner: super::Inner<GLB, N, M>,
+}
+
+impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPad<GLB, N>
+    for Alternate<GLB, N, M>
+{
+    #[inline]
+    fn into_pull_up_output(self) -> Output<GLB, N, PullUp> {
+        self.inner.into_pull_up_output().into()
+    }
+    #[inline]
+    fn into_pull_down_output(self) -> Output<GLB, N, PullDown> {
+        self.inner.into_pull_down_output().into()
+    }
+    #[inline]
+    fn into_floating_output(self) -> Output<GLB, N, Floating> {
+        self.inner.into_floating_output().into()
+    }
+    #[inline]
+    fn into_pull_up_input(self) -> Input<GLB, N, PullUp> {
+        self.inner.into_pull_up_input().into()
+    }
+    #[inline]
+    fn into_pull_down_input(self) -> Input<GLB, N, PullDown> {
+        self.inner.into_pull_down_input().into()
+    }
+    #[inline]
+    fn into_floating_input(self) -> Input<GLB, N, Floating> {
+        self.inner.into_floating_input().into()
+    }
+}
+
+#[cfg(any(doc, feature = "glb-v2"))]
+impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPadv2<GLB, N>
+    for Alternate<GLB, N, M>
+{
+    #[inline]
+    fn into_spi<const I: usize>(self) -> Alternate<GLB, N, typestate::Spi<I>> {
+        self.inner.into_spi().into()
+    }
+    #[inline]
+    fn into_sdh(self) -> Alternate<GLB, N, typestate::Sdh> {
+        self.inner.into_sdh().into()
+    }
+    #[inline]
+    fn into_uart(self) -> Alternate<GLB, N, typestate::Uart> {
+        self.inner.into_uart().into()
+    }
+    #[inline]
+    fn into_mm_uart(self) -> Alternate<GLB, N, typestate::MmUart> {
+        self.inner.into_mm_uart().into()
+    }
+    #[inline]
+    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_pull_up_pwm().into()
+    }
+    #[inline]
+    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_pull_down_pwm().into()
+    }
+    #[inline]
+    fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_floating_pwm().into()
+    }
+    #[inline]
+    fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, typestate::I2c<I>> {
+        self.inner.into_i2c().into()
+    }
+    #[inline]
+    fn into_jtag_d0(self) -> Alternate<GLB, N, typestate::JtagD0> {
+        self.inner.into_jtag_d0().into()
+    }
+    #[inline]
+    fn into_jtag_m0(self) -> Alternate<GLB, N, typestate::JtagM0> {
+        self.inner.into_jtag_m0().into()
+    }
+    #[inline]
+    fn into_jtag_lp(self) -> Alternate<GLB, N, typestate::JtagLp> {
+        self.inner.into_jtag_lp().into()
+    }
+}
+
+impl<GLB, const N: usize, M> From<super::Inner<GLB, N, M>> for Alternate<GLB, N, M> {
+    #[inline]
+    fn from(inner: super::Inner<GLB, N, M>) -> Self {
+        Self { inner }
+    }
+}
diff --git a/bouffalo-hal/src/gpio/convert.rs b/bouffalo-hal/src/gpio/convert.rs
index 42af30e..ea029cb 100644
--- a/bouffalo-hal/src/gpio/convert.rs
+++ b/bouffalo-hal/src/gpio/convert.rs
@@ -1,4 +1,5 @@
 use super::{
+    alternate::Alternate,
     input::Input,
     output::Output,
     typestate::{Floating, PullDown, PullUp},
@@ -23,25 +24,25 @@ pub trait IntoPad<GLB, const N: usize> {
 /// Trait for GLBv2 pad mode conversations.
 pub trait IntoPadv2<GLB, const N: usize> {
     /// Configures the pin to operate as a SPI pin.
-    fn into_spi<const I: usize>(self) -> super::Pad<GLB, N, super::typestate::Spi<I>>;
+    fn into_spi<const I: usize>(self) -> Alternate<GLB, N, super::typestate::Spi<I>>;
     /// Configures the pin to operate as a SDH pin.
-    fn into_sdh(self) -> super::Pad<GLB, N, super::typestate::Sdh>;
+    fn into_sdh(self) -> Alternate<GLB, N, super::typestate::Sdh>;
     /// Configures the pin to operate as UART signal.
-    fn into_uart(self) -> super::Pad<GLB, N, super::typestate::Uart>;
+    fn into_uart(self) -> Alternate<GLB, N, super::typestate::Uart>;
     /// Configures the pin to operate as multi-media cluster UART signal.
-    fn into_mm_uart(self) -> super::Pad<GLB, N, super::typestate::MmUart>;
+    fn into_mm_uart(self) -> Alternate<GLB, N, super::typestate::MmUart>;
     /// Configures the pin to operate as a pull up Pulse Width Modulation signal pin.
-    fn into_pull_up_pwm<const I: usize>(self) -> super::Pad<GLB, N, super::typestate::Pwm<I>>;
+    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, super::typestate::Pwm<I>>;
     /// Configures the pin to operate as a pull down Pulse Width Modulation signal pin.
-    fn into_pull_down_pwm<const I: usize>(self) -> super::Pad<GLB, N, super::typestate::Pwm<I>>;
+    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, super::typestate::Pwm<I>>;
     /// Configures the pin to operate as floating Pulse Width Modulation signal pin.
-    fn into_floating_pwm<const I: usize>(self) -> super::Pad<GLB, N, super::typestate::Pwm<I>>;
+    fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, super::typestate::Pwm<I>>;
     /// Configures the pin to operate as an Inter-Integrated Circuit signal pin.
-    fn into_i2c<const I: usize>(self) -> super::Pad<GLB, N, super::typestate::I2c<I>>;
+    fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, super::typestate::I2c<I>>;
     /// Configures the pin to operate as D0 core JTAG.
-    fn into_jtag_d0(self) -> super::Pad<GLB, N, super::typestate::JtagD0>;
+    fn into_jtag_d0(self) -> Alternate<GLB, N, super::typestate::JtagD0>;
     /// Configures the pin to operate as M0 core JTAG.
-    fn into_jtag_m0(self) -> super::Pad<GLB, N, super::typestate::JtagM0>;
+    fn into_jtag_m0(self) -> Alternate<GLB, N, super::typestate::JtagM0>;
     /// Configures the pin to operate as LP core JTAG.
-    fn into_jtag_lp(self) -> super::Pad<GLB, N, super::typestate::JtagLp>;
+    fn into_jtag_lp(self) -> Alternate<GLB, N, super::typestate::JtagLp>;
 }
diff --git a/bouffalo-hal/src/gpio/disabled.rs b/bouffalo-hal/src/gpio/disabled.rs
index c4761b3..bcd6b3f 100644
--- a/bouffalo-hal/src/gpio/disabled.rs
+++ b/bouffalo-hal/src/gpio/disabled.rs
@@ -1,4 +1,5 @@
 use super::{
+    alternate::Alternate,
     convert::{IntoPad, IntoPadv2},
     input::Input,
     output::Output,
@@ -9,12 +10,7 @@ use core::ops::Deref;
 
 /// GPIO pad which is disabled.
 pub struct Disabled<GLB, const N: usize> {
-    #[cfg(feature = "glb-v1")]
-    inner: super::pad_v1::Padv1<GLB, N, typestate::Disabled>,
-    #[cfg(feature = "glb-v2")]
-    inner: super::pad_v2::Padv2<GLB, N, typestate::Disabled>,
-    #[cfg(not(any(feature = "glb-v1", feature = "glb-v2")))]
-    inner: super::pad_dummy::PadDummy<GLB, N, typestate::Disabled>,
+    inner: super::Inner<GLB, N, typestate::Disabled>,
 }
 
 impl<GLB: Deref<Target = RegisterBlock>, const N: usize> IntoPad<GLB, N> for Disabled<GLB, N> {
@@ -47,69 +43,54 @@ impl<GLB: Deref<Target = RegisterBlock>, const N: usize> IntoPad<GLB, N> for Dis
 #[cfg(any(doc, feature = "glb-v2"))]
 impl<GLB: Deref<Target = RegisterBlock>, const N: usize> IntoPadv2<GLB, N> for Disabled<GLB, N> {
     #[inline]
-    fn into_spi<const I: usize>(self) -> super::Pad<GLB, N, super::typestate::Spi<I>> {
-        super::Pad {
-            inner: self.inner.into_spi(),
-        }
+    fn into_spi<const I: usize>(self) -> Alternate<GLB, N, typestate::Spi<I>> {
+        self.inner.into_spi().into()
     }
     #[inline]
-    fn into_sdh(self) -> super::Pad<GLB, N, super::typestate::Sdh> {
-        super::Pad {
-            inner: self.inner.into_sdh(),
-        }
+    fn into_sdh(self) -> Alternate<GLB, N, typestate::Sdh> {
+        self.inner.into_sdh().into()
     }
     #[inline]
-    fn into_uart(self) -> super::Pad<GLB, N, super::typestate::Uart> {
-        super::Pad {
-            inner: self.inner.into_uart(),
-        }
+    fn into_uart(self) -> Alternate<GLB, N, typestate::Uart> {
+        self.inner.into_uart().into()
     }
     #[inline]
-    fn into_mm_uart(self) -> super::Pad<GLB, N, super::typestate::MmUart> {
-        super::Pad {
-            inner: self.inner.into_mm_uart(),
-        }
+    fn into_mm_uart(self) -> Alternate<GLB, N, typestate::MmUart> {
+        self.inner.into_mm_uart().into()
     }
     #[inline]
-    fn into_pull_up_pwm<const I: usize>(self) -> super::Pad<GLB, N, super::typestate::Pwm<I>> {
-        super::Pad {
-            inner: self.inner.into_pull_up_pwm(),
-        }
+    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_pull_up_pwm().into()
     }
     #[inline]
-    fn into_pull_down_pwm<const I: usize>(self) -> super::Pad<GLB, N, super::typestate::Pwm<I>> {
-        super::Pad {
-            inner: self.inner.into_pull_down_pwm(),
-        }
+    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_pull_down_pwm().into()
     }
     #[inline]
-    fn into_floating_pwm<const I: usize>(self) -> super::Pad<GLB, N, super::typestate::Pwm<I>> {
-        super::Pad {
-            inner: self.inner.into_floating_pwm(),
-        }
+    fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_floating_pwm().into()
     }
     #[inline]
-    fn into_i2c<const I: usize>(self) -> super::Pad<GLB, N, super::typestate::I2c<I>> {
-        super::Pad {
-            inner: self.inner.into_i2c(),
-        }
+    fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, typestate::I2c<I>> {
+        self.inner.into_i2c().into()
     }
     #[inline]
-    fn into_jtag_d0(self) -> super::Pad<GLB, N, super::typestate::JtagD0> {
-        super::Pad {
-            inner: self.inner.into_jtag_d0(),
-        }
+    fn into_jtag_d0(self) -> Alternate<GLB, N, typestate::JtagD0> {
+        self.inner.into_jtag_d0().into()
     }
     #[inline]
-    fn into_jtag_m0(self) -> super::Pad<GLB, N, super::typestate::JtagM0> {
-        super::Pad {
-            inner: self.inner.into_jtag_m0(),
-        }
+    fn into_jtag_m0(self) -> Alternate<GLB, N, typestate::JtagM0> {
+        self.inner.into_jtag_m0().into()
     }
     #[inline]
-    fn into_jtag_lp(self) -> super::Pad<GLB, N, super::typestate::JtagLp> {
-        super::Pad {
-            inner: self.inner.into_jtag_lp(),
-        }
+    fn into_jtag_lp(self) -> Alternate<GLB, N, typestate::JtagLp> {
+        self.inner.into_jtag_lp().into()
+    }
+}
+
+impl<GLB, const N: usize> From<super::Inner<GLB, N, typestate::Disabled>> for Disabled<GLB, N> {
+    #[inline]
+    fn from(inner: super::Inner<GLB, N, typestate::Disabled>) -> Self {
+        Self { inner }
     }
 }
diff --git a/bouffalo-hal/src/gpio/input.rs b/bouffalo-hal/src/gpio/input.rs
index 7783cf4..f57d49b 100644
--- a/bouffalo-hal/src/gpio/input.rs
+++ b/bouffalo-hal/src/gpio/input.rs
@@ -1,5 +1,6 @@
 use super::{
-    convert::IntoPad,
+    alternate::Alternate,
+    convert::{IntoPad, IntoPadv2},
     output::Output,
     typestate::{self, Floating, PullDown, PullUp},
 };
@@ -9,12 +10,7 @@ use embedded_hal::digital::{ErrorType, InputPin};
 
 /// GPIO pad in input mode.
 pub struct Input<GLB, const N: usize, M> {
-    #[cfg(feature = "glb-v1")]
-    inner: super::pad_v1::Padv1<GLB, N, typestate::Input<M>>,
-    #[cfg(feature = "glb-v2")]
-    inner: super::pad_v2::Padv2<GLB, N, typestate::Input<M>>,
-    #[cfg(not(any(feature = "glb-v1", feature = "glb-v2")))]
-    inner: super::pad_dummy::PadDummy<GLB, N, typestate::Input<M>>,
+    inner: super::Inner<GLB, N, typestate::Input<M>>,
 }
 
 impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> Input<GLB, N, M> {
@@ -77,6 +73,54 @@ impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPad<GLB, N> for
     }
 }
 
+#[cfg(any(doc, feature = "glb-v2"))]
+impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPadv2<GLB, N> for Input<GLB, N, M> {
+    #[inline]
+    fn into_spi<const I: usize>(self) -> Alternate<GLB, N, typestate::Spi<I>> {
+        self.inner.into_spi().into()
+    }
+    #[inline]
+    fn into_sdh(self) -> Alternate<GLB, N, typestate::Sdh> {
+        self.inner.into_sdh().into()
+    }
+    #[inline]
+    fn into_uart(self) -> Alternate<GLB, N, typestate::Uart> {
+        self.inner.into_uart().into()
+    }
+    #[inline]
+    fn into_mm_uart(self) -> Alternate<GLB, N, typestate::MmUart> {
+        self.inner.into_mm_uart().into()
+    }
+    #[inline]
+    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_pull_up_pwm().into()
+    }
+    #[inline]
+    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_pull_down_pwm().into()
+    }
+    #[inline]
+    fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_floating_pwm().into()
+    }
+    #[inline]
+    fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, typestate::I2c<I>> {
+        self.inner.into_i2c().into()
+    }
+    #[inline]
+    fn into_jtag_d0(self) -> Alternate<GLB, N, typestate::JtagD0> {
+        self.inner.into_jtag_d0().into()
+    }
+    #[inline]
+    fn into_jtag_m0(self) -> Alternate<GLB, N, typestate::JtagM0> {
+        self.inner.into_jtag_m0().into()
+    }
+    #[inline]
+    fn into_jtag_lp(self) -> Alternate<GLB, N, typestate::JtagLp> {
+        self.inner.into_jtag_lp().into()
+    }
+}
+
 impl<GLB, const N: usize, M> ErrorType for Input<GLB, N, M> {
     type Error = core::convert::Infallible;
 }
@@ -92,32 +136,9 @@ impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> InputPin for In
     }
 }
 
-#[cfg(feature = "glb-v1")]
-impl<GLB, const N: usize, M> From<super::pad_v1::Padv1<GLB, N, typestate::Input<M>>>
-    for Input<GLB, N, M>
-{
-    #[inline]
-    fn from(inner: super::pad_v1::Padv1<GLB, N, typestate::Input<M>>) -> Self {
-        Self { inner }
-    }
-}
-
-#[cfg(feature = "glb-v2")]
-impl<GLB, const N: usize, M> From<super::pad_v2::Padv2<GLB, N, typestate::Input<M>>>
-    for Input<GLB, N, M>
-{
-    #[inline]
-    fn from(inner: super::pad_v2::Padv2<GLB, N, typestate::Input<M>>) -> Self {
-        Self { inner }
-    }
-}
-
-#[cfg(not(any(feature = "glb-v1", feature = "glb-v2")))]
-impl<GLB, const N: usize, M> From<super::pad_dummy::PadDummy<GLB, N, typestate::Input<M>>>
-    for Input<GLB, N, M>
-{
+impl<GLB, const N: usize, M> From<super::Inner<GLB, N, typestate::Input<M>>> for Input<GLB, N, M> {
     #[inline]
-    fn from(inner: super::pad_dummy::PadDummy<GLB, N, typestate::Input<M>>) -> Self {
+    fn from(inner: super::Inner<GLB, N, typestate::Input<M>>) -> Self {
         Self { inner }
     }
 }
diff --git a/bouffalo-hal/src/gpio/output.rs b/bouffalo-hal/src/gpio/output.rs
index 40dc548..8da4985 100644
--- a/bouffalo-hal/src/gpio/output.rs
+++ b/bouffalo-hal/src/gpio/output.rs
@@ -1,5 +1,6 @@
 use super::{
-    convert::IntoPad,
+    alternate::Alternate,
+    convert::{IntoPad, IntoPadv2},
     input::Input,
     typestate::{self, Floating, PullDown, PullUp},
 };
@@ -9,12 +10,7 @@ use embedded_hal::digital::{ErrorType, OutputPin};
 
 /// GPIO pad in output mode.
 pub struct Output<GLB, const N: usize, M> {
-    #[cfg(feature = "glb-v1")]
-    inner: super::pad_v1::Padv1<GLB, N, typestate::Output<M>>,
-    #[cfg(feature = "glb-v2")]
-    inner: super::pad_v2::Padv2<GLB, N, typestate::Output<M>>,
-    #[cfg(not(any(feature = "glb-v1", feature = "glb-v2")))]
-    inner: super::pad_dummy::PadDummy<GLB, N, typestate::Output<M>>,
+    inner: super::Inner<GLB, N, typestate::Output<M>>,
 }
 
 impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M> Output<GLB, N, M> {
@@ -57,6 +53,56 @@ impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPad<GLB, N> for
     }
 }
 
+#[cfg(any(doc, feature = "glb-v2"))]
+impl<GLB: Deref<Target = RegisterBlock>, const N: usize, M> IntoPadv2<GLB, N>
+    for Output<GLB, N, M>
+{
+    #[inline]
+    fn into_spi<const I: usize>(self) -> Alternate<GLB, N, typestate::Spi<I>> {
+        self.inner.into_spi().into()
+    }
+    #[inline]
+    fn into_sdh(self) -> Alternate<GLB, N, typestate::Sdh> {
+        self.inner.into_sdh().into()
+    }
+    #[inline]
+    fn into_uart(self) -> Alternate<GLB, N, typestate::Uart> {
+        self.inner.into_uart().into()
+    }
+    #[inline]
+    fn into_mm_uart(self) -> Alternate<GLB, N, typestate::MmUart> {
+        self.inner.into_mm_uart().into()
+    }
+    #[inline]
+    fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_pull_up_pwm().into()
+    }
+    #[inline]
+    fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_pull_down_pwm().into()
+    }
+    #[inline]
+    fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>> {
+        self.inner.into_floating_pwm().into()
+    }
+    #[inline]
+    fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, typestate::I2c<I>> {
+        self.inner.into_i2c().into()
+    }
+    #[inline]
+    fn into_jtag_d0(self) -> Alternate<GLB, N, typestate::JtagD0> {
+        self.inner.into_jtag_d0().into()
+    }
+    #[inline]
+    fn into_jtag_m0(self) -> Alternate<GLB, N, typestate::JtagM0> {
+        self.inner.into_jtag_m0().into()
+    }
+    #[inline]
+    fn into_jtag_lp(self) -> Alternate<GLB, N, typestate::JtagLp> {
+        self.inner.into_jtag_lp().into()
+    }
+}
+
 impl<GLB, const N: usize, M> ErrorType for Output<GLB, N, M> {
     type Error = core::convert::Infallible;
 }
@@ -90,32 +136,11 @@ impl<GLB: Deref<Target = glb::RegisterBlock>, const N: usize, M>
     }
 }
 
-#[cfg(feature = "glb-v1")]
-impl<GLB, const N: usize, M> From<super::pad_v1::Padv1<GLB, N, typestate::Output<M>>>
-    for Output<GLB, N, M>
-{
-    #[inline]
-    fn from(inner: super::pad_v1::Padv1<GLB, N, typestate::Output<M>>) -> Self {
-        Self { inner }
-    }
-}
-
-#[cfg(feature = "glb-v2")]
-impl<GLB, const N: usize, M> From<super::pad_v2::Padv2<GLB, N, typestate::Output<M>>>
-    for Output<GLB, N, M>
-{
-    #[inline]
-    fn from(inner: super::pad_v2::Padv2<GLB, N, typestate::Output<M>>) -> Self {
-        Self { inner }
-    }
-}
-
-#[cfg(not(any(feature = "glb-v1", feature = "glb-v2")))]
-impl<GLB, const N: usize, M> From<super::pad_dummy::PadDummy<GLB, N, typestate::Output<M>>>
+impl<GLB, const N: usize, M> From<super::Inner<GLB, N, typestate::Output<M>>>
     for Output<GLB, N, M>
 {
     #[inline]
-    fn from(inner: super::pad_dummy::PadDummy<GLB, N, typestate::Output<M>>) -> Self {
+    fn from(inner: super::Inner<GLB, N, typestate::Output<M>>) -> Self {
         Self { inner }
     }
 }
diff --git a/bouffalo-hal/src/i2c.rs b/bouffalo-hal/src/i2c.rs
index fdd8607..1dcbf56 100644
--- a/bouffalo-hal/src/i2c.rs
+++ b/bouffalo-hal/src/i2c.rs
@@ -3,7 +3,7 @@ use core::ops::Deref;
 
 use crate::{
     glb::{self, v2::I2cClockSource},
-    gpio::{self, Pad},
+    gpio::{self, Alternate},
 };
 use volatile_register::{RO, RW, WO};
 
@@ -495,15 +495,19 @@ impl FifoConfig1 {
 }
 
 /// Managed Inter-Integrated Circuit peripheral.
-pub struct I2c<I2C, PADS> {
+pub struct I2c<I2C, AlternateS> {
     i2c: I2C,
-    pads: PADS,
+    Alternates: AlternateS,
 }
 
 impl<I2C: Deref<Target = RegisterBlock>, SCL, SDA> I2c<I2C, (SCL, SDA)> {
     /// Create a new Inter-Integrated Circuit instance.
     #[inline]
-    pub fn new<const I: usize>(i2c: I2C, pads: (SCL, SDA), glb: &glb::v2::RegisterBlock) -> Self
+    pub fn new<const I: usize>(
+        i2c: I2C,
+        Alternates: (SCL, SDA),
+        glb: &glb::v2::RegisterBlock,
+    ) -> Self
     where
         SCL: SclPin<I>,
         SDA: SdaPin<I>,
@@ -547,17 +551,17 @@ impl<I2C: Deref<Target = RegisterBlock>, SCL, SDA> I2c<I2C, (SCL, SDA)> {
             );
         }
 
-        Self { i2c, pads }
+        Self { i2c, Alternates }
     }
 
-    /// Release the I2C instance and return the pads.
+    /// Release the I2C instance and return the Alternates.
     #[inline]
     pub fn free(self, glb: &glb::v2::RegisterBlock) -> (I2C, (SCL, SDA)) {
         unsafe {
             glb.i2c_config.modify(|config| config.disable_clock());
             glb.clock_config_1.modify(|config| config.disable_i2c());
         }
-        (self.i2c, self.pads)
+        (self.i2c, self.Alternates)
     }
 
     /// Enable sub-address.
@@ -602,11 +606,15 @@ impl embedded_hal::i2c::Error for Error {
     }
 }
 
-impl<I2C: Deref<Target = RegisterBlock>, PADS> embedded_hal::i2c::ErrorType for I2c<I2C, PADS> {
+impl<I2C: Deref<Target = RegisterBlock>, AlternateS> embedded_hal::i2c::ErrorType
+    for I2c<I2C, AlternateS>
+{
     type Error = Error;
 }
 
-impl<I2C: Deref<Target = RegisterBlock>, PADS> embedded_hal::i2c::I2c for I2c<I2C, PADS> {
+impl<I2C: Deref<Target = RegisterBlock>, AlternateS> embedded_hal::i2c::I2c
+    for I2c<I2C, AlternateS>
+{
     #[inline]
     fn transaction(
         &mut self,
@@ -661,37 +669,37 @@ mod i2c_impls {
 
     // 0, 2, 4, ..., 2n: SCL
     // 1, 3, 5, ..., 2n+1: SDA
-    // TODO: support other pads if needed
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 0, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 1, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 2, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 3, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 4, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 5, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 6, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 7, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 8, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 9, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 10, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 11, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 12, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 13, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 14, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 15, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 16, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 17, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 18, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 19, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 20, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 21, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 22, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 23, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 24, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 25, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 26, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 27, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SclPin<I> for Pad<GLB, 28, gpio::I2c<I>> {}
-    impl<GLB, const I: usize> SdaPin<I> for Pad<GLB, 29, gpio::I2c<I>> {}
+    // TODO: support other Alternates if needed
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 0, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 1, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 2, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 3, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 4, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 5, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 6, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 7, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 8, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 9, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 10, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 11, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 12, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 13, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 14, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 15, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 16, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 17, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 18, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 19, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 20, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 21, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 22, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 23, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 24, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 25, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 26, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 27, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SclPin<I> for Alternate<GLB, 28, gpio::I2c<I>> {}
+    impl<GLB, const I: usize> SdaPin<I> for Alternate<GLB, 29, gpio::I2c<I>> {}
 }
 
 #[cfg(test)]
diff --git a/bouffalo-hal/src/pwm.rs b/bouffalo-hal/src/pwm.rs
index 31eca33..4e598b8 100644
--- a/bouffalo-hal/src/pwm.rs
+++ b/bouffalo-hal/src/pwm.rs
@@ -4,7 +4,7 @@ use crate::glb::{
     self,
     v2::{PwmSignal0, PwmSignal1},
 };
-use crate::gpio::{self, Pad};
+use crate::gpio::{self, Alternate};
 use core::marker::PhantomData;
 use core::ops::{Deref, DerefMut};
 use embedded_time::rate::Hertz;
@@ -772,11 +772,11 @@ impl<PWM: Deref<Target = RegisterBlock>, S, const I: usize, const J: usize> Chan
     #[inline]
     pub fn positive_signal_pin<GLB, const N: usize, const F: usize>(
         self,
-        pin: Pad<GLB, N, gpio::Pwm<F>>,
-    ) -> PwmPin<Self, Pad<GLB, N, gpio::Pwm<F>>, Positive>
+        pin: Alternate<GLB, N, gpio::Pwm<F>>,
+    ) -> PwmPin<Self, Alternate<GLB, N, gpio::Pwm<F>>, Positive>
     where
         GLB: Deref<Target = glb::v2::RegisterBlock>,
-        Pad<GLB, N, gpio::Pwm<F>>: HasPwmSignal<S, I, J, Positive>,
+        Alternate<GLB, N, gpio::Pwm<F>>: HasPwmSignal<S, I, J, Positive>,
     {
         PwmPin {
             channel: self,
@@ -791,11 +791,11 @@ impl<PWM: Deref<Target = RegisterBlock>, S, const I: usize, const J: usize> Chan
     #[inline]
     pub fn negative_signal_pin<GLB, const N: usize, const F: usize>(
         self,
-        pin: Pad<GLB, N, gpio::Pwm<F>>,
-    ) -> PwmPin<Self, Pad<GLB, N, gpio::Pwm<F>>, Negative>
+        pin: Alternate<GLB, N, gpio::Pwm<F>>,
+    ) -> PwmPin<Self, Alternate<GLB, N, gpio::Pwm<F>>, Negative>
     where
         GLB: Deref<Target = glb::v2::RegisterBlock>,
-        Pad<GLB, N, gpio::Pwm<F>>: HasPwmSignal<S, I, J, Negative>,
+        Alternate<GLB, N, gpio::Pwm<F>>: HasPwmSignal<S, I, J, Negative>,
     {
         PwmPin {
             channel: self,
@@ -818,11 +818,11 @@ impl<S, const I: usize> ExternalBreak<S, I> {
     #[inline]
     pub fn external_break_pin<GLB, const N: usize, const F: usize>(
         self,
-        pin: Pad<GLB, N, gpio::Pwm<F>>,
-    ) -> PwmPin<Self, Pad<GLB, N, gpio::Pwm<F>>, ()>
+        pin: Alternate<GLB, N, gpio::Pwm<F>>,
+    ) -> PwmPin<Self, Alternate<GLB, N, gpio::Pwm<F>>, ()>
     where
         GLB: Deref<Target = glb::v2::RegisterBlock>,
-        Pad<GLB, N, gpio::Pwm<F>>: HasPwmExternalBreak<I>,
+        Alternate<GLB, N, gpio::Pwm<F>>: HasPwmExternalBreak<I>,
     {
         PwmPin {
             channel: self,
@@ -842,7 +842,7 @@ pub struct Negative;
 ///
 /// It checks if it is connected to PWM group `I`, channel `J` and polarity `P` with signal settings `S`.
 #[diagnostic::on_unimplemented(
-    message = "this I/O pad has no hardware connection to '{P}' polarity signal of PWM group {I}, channel {J} with signal setting {S}"
+    message = "this I/O Alternate has no hardware connection to '{P}' polarity signal of PWM group {I}, channel {J} with signal setting {S}"
 )]
 pub trait HasPwmSignal<S, const I: usize, const J: usize, P> {}
 
@@ -850,7 +850,7 @@ pub trait HasPwmSignal<S, const I: usize, const J: usize, P> {}
 ///
 /// It checks if it is connected to external break signal of PWM group `I`.
 #[diagnostic::on_unimplemented(
-    message = "this I/O pad has no hardware connection to external break signal of PWM group {I}"
+    message = "this I/O Alternate has no hardware connection to external break signal of PWM group {I}"
 )]
 pub trait HasPwmExternalBreak<const I: usize> {}
 
@@ -997,193 +997,193 @@ impl<PWM: Deref<Target = RegisterBlock>, S, const I: usize, const J: usize, PIN,
 mod gpio_impls {
     use super::*;
 
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 0, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 1, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 2, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 3, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 4, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 5, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 6, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 7, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 8, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 9, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 10, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 11, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 12, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 13, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 14, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 15, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 16, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 17, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 18, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 19, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 20, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 21, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 22, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 23, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 24, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 25, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 26, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 27, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 28, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 29, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 30, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 31, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 32, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 33, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 34, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 35, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 36, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 37, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 38, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 39, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 40, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 41, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Pad<GLB, 42, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Pad<GLB, 43, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Pad<GLB, 44, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Pad<GLB, 45, gpio::Pwm<0>> {}
-
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Pad<GLB, 0, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Pad<GLB, 1, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Pad<GLB, 2, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Pad<GLB, 3, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Pad<GLB, 4, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Pad<GLB, 5, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Pad<GLB, 6, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Pad<GLB, 7, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Pad<GLB, 8, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Pad<GLB, 9, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Pad<GLB, 10, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Pad<GLB, 11, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Pad<GLB, 12, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Pad<GLB, 13, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Pad<GLB, 14, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Pad<GLB, 15, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Pad<GLB, 16, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Pad<GLB, 17, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Pad<GLB, 18, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Pad<GLB, 19, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Pad<GLB, 20, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Pad<GLB, 21, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Pad<GLB, 22, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Pad<GLB, 23, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Pad<GLB, 24, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Pad<GLB, 25, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Pad<GLB, 26, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Pad<GLB, 27, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Pad<GLB, 28, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Pad<GLB, 29, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Pad<GLB, 30, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Pad<GLB, 31, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Pad<GLB, 32, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Pad<GLB, 33, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Pad<GLB, 34, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Pad<GLB, 35, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Pad<GLB, 36, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Pad<GLB, 37, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Pad<GLB, 38, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Pad<GLB, 39, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Pad<GLB, 40, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Pad<GLB, 41, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Pad<GLB, 42, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Pad<GLB, 43, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Pad<GLB, 44, gpio::Pwm<0>> {}
-    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Pad<GLB, 45, gpio::Pwm<0>> {}
-
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 0, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 1, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 2, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 3, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 4, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 5, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 6, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 7, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 8, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 9, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 10, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 11, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 12, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 13, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 14, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 15, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 16, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 17, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 18, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 19, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 20, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 21, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 22, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 23, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 24, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 25, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 26, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 27, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 28, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 29, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 30, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 31, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 32, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 33, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 34, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 35, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 36, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 37, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 38, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 39, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 40, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 41, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Pad<GLB, 42, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Pad<GLB, 43, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Pad<GLB, 44, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Pad<GLB, 45, gpio::Pwm<1>> {}
-
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 0, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 1, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 2, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 3, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 4, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 5, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 6, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 7, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 8, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 9, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 10, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 11, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 12, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 13, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 14, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 15, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 16, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 17, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 18, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 19, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 20, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 21, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 22, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 23, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 24, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 25, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 26, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 27, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 28, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 29, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 30, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 31, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 32, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 33, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 34, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 35, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 36, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 37, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 38, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 39, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 40, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 41, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Pad<GLB, 42, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Pad<GLB, 43, gpio::Pwm<1>> {}
-    impl<GLB> HasPwmExternalBreak<0> for Pad<GLB, 44, gpio::Pwm<1>> {}
-    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Pad<GLB, 45, gpio::Pwm<1>> {}    
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 0, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 1, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 2, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 3, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 4, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 5, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 6, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 7, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 8, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 9, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 10, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 11, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 12, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 13, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 14, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 15, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 16, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 17, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 18, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 19, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 20, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 21, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 22, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 23, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 24, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 25, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 26, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 27, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 28, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 29, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 30, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 31, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 32, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 33, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 34, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 35, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 36, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 37, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 38, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 39, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 40, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 41, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 2, Positive> for Alternate<GLB, 42, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 3, Positive> for Alternate<GLB, 43, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 0, Positive> for Alternate<GLB, 44, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(SingleEnd, S2), 0, 1, Positive> for Alternate<GLB, 45, gpio::Pwm<0>> {}
+
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 0, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 1, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 2, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 3, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 4, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 5, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<GLB, 6, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<GLB, 7, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 8, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 9, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 10, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 11, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 12, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 13, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<GLB, 14, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<GLB, 15, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 16, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 17, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 18, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 19, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 20, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 21, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<GLB, 22, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<GLB, 23, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 24, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 25, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 26, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 27, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 28, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 29, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<GLB, 30, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<GLB, 31, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 32, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 33, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 34, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 35, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 36, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 37, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Positive> for Alternate<GLB, 38, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 3, Negative> for Alternate<GLB, 39, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Positive> for Alternate<GLB, 40, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 0, Negative> for Alternate<GLB, 41, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Positive> for Alternate<GLB, 42, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 1, Negative> for Alternate<GLB, 43, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Positive> for Alternate<GLB, 44, gpio::Pwm<0>> {}
+    impl<GLB, S2> HasPwmSignal<(DifferentialEnd, S2), 0, 2, Negative> for Alternate<GLB, 45, gpio::Pwm<0>> {}
+
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 0, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 1, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 2, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 3, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 4, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 5, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 6, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 7, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 8, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 9, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 10, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 11, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 12, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 13, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 14, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 15, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 16, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 17, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 18, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 19, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 20, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 21, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 22, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 23, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 24, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 25, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 26, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 27, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 28, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 29, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 30, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 31, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 32, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 33, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 34, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 35, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 36, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 37, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 38, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 39, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 40, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 41, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 2, Positive> for Alternate<GLB, 42, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 3, Positive> for Alternate<GLB, 43, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 0, Positive> for Alternate<GLB, 44, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, SingleEnd), 1, 1, Positive> for Alternate<GLB, 45, gpio::Pwm<1>> {}
+
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 0, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 1, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 2, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 3, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 4, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 5, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 6, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 7, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 8, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 9, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 10, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 11, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 12, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 13, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 14, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 15, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 16, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 17, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 18, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 19, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 20, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 21, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 22, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 23, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 24, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 25, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 26, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 27, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 28, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 29, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 30, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 31, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 32, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 33, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 34, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 35, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 36, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 37, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 38, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 39, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 40, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 41, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 1, Positive> for Alternate<GLB, 42, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 2, Positive> for Alternate<GLB, 43, gpio::Pwm<1>> {}
+    impl<GLB> HasPwmExternalBreak<0> for Alternate<GLB, 44, gpio::Pwm<1>> {}
+    impl<GLB, S1> HasPwmSignal<(S1, BrushlessDcMotor), 0, 0, Positive> for Alternate<GLB, 45, gpio::Pwm<1>> {}    
 }
 
 #[cfg(test)]
diff --git a/bouffalo-hal/src/spi.rs b/bouffalo-hal/src/spi.rs
index e59e454..3acf7e1 100644
--- a/bouffalo-hal/src/spi.rs
+++ b/bouffalo-hal/src/spi.rs
@@ -1,7 +1,7 @@
 //! Serial Peripheral Interface peripheral.
 
 use crate::glb::{self, v2::SpiMode};
-use crate::gpio::{self, Pad};
+use crate::gpio::{self, Alternate};
 use core::cmp::max;
 use core::ops::Deref;
 use embedded_hal::spi::Mode;
@@ -630,7 +630,7 @@ impl<SPI: Deref<Target = RegisterBlock>, PADS, const I: usize> Spi<SPI, PADS, I>
     #[inline]
     pub fn new<GLB>(spi: SPI, pads: PADS, mode: Mode, glb: &GLB) -> Self
     where
-        PADS: Pads<I>,
+        PADS: Alternates<I>,
         GLB: Deref<Target = glb::v2::RegisterBlock>,
     {
         let mut config = Config(0)
@@ -877,105 +877,106 @@ impl<SPI: Deref<Target = RegisterBlock>, PINS, const I: usize>
     }
 }
 
-/// Valid SPI pads.
-pub trait Pads<const I: usize> {}
+/// Valid SPI Alternates.
+pub trait Alternates<const I: usize> {}
 
-impl<A1, A2, A3, const N1: usize, const N2: usize, const N3: usize> Pads<1>
+impl<A1, A2, A3, const N1: usize, const N2: usize, const N3: usize> Alternates<1>
     for (
-        Pad<A1, N1, gpio::Spi<1>>,
-        Pad<A2, N2, gpio::Spi<1>>,
-        Pad<A3, N3, gpio::Spi<1>>,
+        Alternate<A1, N1, gpio::Spi<1>>,
+        Alternate<A2, N2, gpio::Spi<1>>,
+        Alternate<A3, N3, gpio::Spi<1>>,
     )
 where
     A1: Deref<Target = glb::v2::RegisterBlock>,
     A2: Deref<Target = glb::v2::RegisterBlock>,
     A3: Deref<Target = glb::v2::RegisterBlock>,
-    Pad<A1, N1, gpio::Spi<1>>: HasClkSignal,
-    Pad<A2, N2, gpio::Spi<1>>: HasMosiSignal,
-    Pad<A3, N3, gpio::Spi<1>>: HasCsSignal,
+    Alternate<A1, N1, gpio::Spi<1>>: HasClkSignal,
+    Alternate<A2, N2, gpio::Spi<1>>: HasMosiSignal,
+    Alternate<A3, N3, gpio::Spi<1>>: HasCsSignal,
 {
 }
 
-impl<A1, A2, A3, A4, const N1: usize, const N2: usize, const N3: usize, const N4: usize> Pads<1>
+impl<A1, A2, A3, A4, const N1: usize, const N2: usize, const N3: usize, const N4: usize>
+    Alternates<1>
     for (
-        Pad<A1, N1, gpio::Spi<1>>,
-        Pad<A2, N2, gpio::Spi<1>>,
-        Pad<A3, N3, gpio::Spi<1>>,
-        Pad<A4, N4, gpio::Spi<1>>,
+        Alternate<A1, N1, gpio::Spi<1>>,
+        Alternate<A2, N2, gpio::Spi<1>>,
+        Alternate<A3, N3, gpio::Spi<1>>,
+        Alternate<A4, N4, gpio::Spi<1>>,
     )
 where
     A1: Deref<Target = glb::v2::RegisterBlock>,
     A2: Deref<Target = glb::v2::RegisterBlock>,
     A3: Deref<Target = glb::v2::RegisterBlock>,
     A4: Deref<Target = glb::v2::RegisterBlock>,
-    Pad<A1, N1, gpio::Spi<1>>: HasClkSignal,
-    Pad<A2, N2, gpio::Spi<1>>: HasMosiSignal,
-    Pad<A3, N3, gpio::Spi<1>>: HasMisoSignal,
-    Pad<A4, N4, gpio::Spi<1>>: HasCsSignal,
+    Alternate<A1, N1, gpio::Spi<1>>: HasClkSignal,
+    Alternate<A2, N2, gpio::Spi<1>>: HasMosiSignal,
+    Alternate<A3, N3, gpio::Spi<1>>: HasMisoSignal,
+    Alternate<A4, N4, gpio::Spi<1>>: HasCsSignal,
 {
 }
 
 /// Check if target gpio `Pin` is internally connected to SPI clock signal.
 pub trait HasClkSignal {}
 
-impl<GLB> HasClkSignal for Pad<GLB, 3, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Pad<GLB, 7, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Pad<GLB, 11, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Pad<GLB, 15, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Pad<GLB, 19, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Pad<GLB, 23, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Pad<GLB, 27, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Pad<GLB, 31, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Pad<GLB, 35, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Pad<GLB, 39, gpio::Spi<1>> {}
-impl<GLB> HasClkSignal for Pad<GLB, 43, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 3, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 7, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 11, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 15, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 19, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 23, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 27, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 31, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 35, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 39, gpio::Spi<1>> {}
+impl<GLB> HasClkSignal for Alternate<GLB, 43, gpio::Spi<1>> {}
 
 /// Check if target gpio `Pin` is internally connected to SPI MISO signal.
 pub trait HasMisoSignal {}
 
-impl<GLB> HasMisoSignal for Pad<GLB, 2, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Pad<GLB, 6, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Pad<GLB, 10, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Pad<GLB, 14, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Pad<GLB, 18, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Pad<GLB, 22, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Pad<GLB, 26, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Pad<GLB, 30, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Pad<GLB, 34, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Pad<GLB, 38, gpio::Spi<1>> {}
-impl<GLB> HasMisoSignal for Pad<GLB, 42, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 2, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 6, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 10, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 14, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 18, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 22, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 26, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 30, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 34, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 38, gpio::Spi<1>> {}
+impl<GLB> HasMisoSignal for Alternate<GLB, 42, gpio::Spi<1>> {}
 
 /// Check if target gpio `Pin` is internally connected to SPI MOSI signal.
 pub trait HasMosiSignal {}
 
-impl<GLB> HasMosiSignal for Pad<GLB, 1, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 5, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 9, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 13, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 17, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 21, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 25, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 29, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 33, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 37, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 41, gpio::Spi<1>> {}
-impl<GLB> HasMosiSignal for Pad<GLB, 45, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 1, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 5, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 9, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 13, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 17, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 21, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 25, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 29, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 33, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 37, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 41, gpio::Spi<1>> {}
+impl<GLB> HasMosiSignal for Alternate<GLB, 45, gpio::Spi<1>> {}
 
 /// Check if target gpio `Pin` is internally connected to SPI CS signal.
 pub trait HasCsSignal {}
 
-impl<GLB> HasCsSignal for Pad<GLB, 0, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 4, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 8, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 12, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 16, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 20, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 24, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 28, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 32, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 36, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 40, gpio::Spi<1>> {}
-impl<GLB> HasCsSignal for Pad<GLB, 44, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 0, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 4, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 8, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 12, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 16, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 20, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 24, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 28, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 32, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 36, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 40, gpio::Spi<1>> {}
+impl<GLB> HasCsSignal for Alternate<GLB, 44, gpio::Spi<1>> {}
 
 #[cfg(test)]
 mod tests {
diff --git a/bouffalo-hal/src/uart/pad.rs b/bouffalo-hal/src/uart/pad.rs
index 4a6cf72..76d0ed3 100644
--- a/bouffalo-hal/src/uart/pad.rs
+++ b/bouffalo-hal/src/uart/pad.rs
@@ -1,62 +1,62 @@
 use super::{BlockingReceiveHalf, BlockingTransmitHalf, MuxCts, MuxRts, MuxRxd, MuxTxd, UartMux};
 use crate::glb;
-use crate::gpio::{MmUart, Pad, Uart};
+use crate::gpio::{Alternate, MmUart, Uart};
 use core::ops::Deref;
 
 /// Check if target gpio `Pin` is internally connected to UART signal index `I`.
 pub trait HasUartSignal<const I: usize> {}
 
-impl<GLB> HasUartSignal<0> for Pad<GLB, 0, Uart> {}
-impl<GLB> HasUartSignal<1> for Pad<GLB, 1, Uart> {}
-impl<GLB> HasUartSignal<2> for Pad<GLB, 2, Uart> {}
-impl<GLB> HasUartSignal<3> for Pad<GLB, 3, Uart> {}
-impl<GLB> HasUartSignal<4> for Pad<GLB, 4, Uart> {}
-impl<GLB> HasUartSignal<5> for Pad<GLB, 5, Uart> {}
-impl<GLB> HasUartSignal<6> for Pad<GLB, 6, Uart> {}
-impl<GLB> HasUartSignal<7> for Pad<GLB, 7, Uart> {}
-impl<GLB> HasUartSignal<8> for Pad<GLB, 8, Uart> {}
-impl<GLB> HasUartSignal<9> for Pad<GLB, 9, Uart> {}
-impl<GLB> HasUartSignal<10> for Pad<GLB, 10, Uart> {}
-impl<GLB> HasUartSignal<11> for Pad<GLB, 11, Uart> {}
-impl<GLB> HasUartSignal<0> for Pad<GLB, 12, Uart> {}
-impl<GLB> HasUartSignal<1> for Pad<GLB, 13, Uart> {}
-impl<GLB> HasUartSignal<2> for Pad<GLB, 14, Uart> {}
-impl<GLB> HasUartSignal<3> for Pad<GLB, 15, Uart> {}
-impl<GLB> HasUartSignal<4> for Pad<GLB, 16, Uart> {}
-impl<GLB> HasUartSignal<5> for Pad<GLB, 17, Uart> {}
-impl<GLB> HasUartSignal<6> for Pad<GLB, 18, Uart> {}
-impl<GLB> HasUartSignal<7> for Pad<GLB, 19, Uart> {}
-impl<GLB> HasUartSignal<8> for Pad<GLB, 20, Uart> {}
-impl<GLB> HasUartSignal<9> for Pad<GLB, 21, Uart> {}
-impl<GLB> HasUartSignal<10> for Pad<GLB, 22, Uart> {}
-impl<GLB> HasUartSignal<11> for Pad<GLB, 23, Uart> {}
-impl<GLB> HasUartSignal<0> for Pad<GLB, 24, Uart> {}
-impl<GLB> HasUartSignal<1> for Pad<GLB, 25, Uart> {}
-impl<GLB> HasUartSignal<2> for Pad<GLB, 26, Uart> {}
-impl<GLB> HasUartSignal<3> for Pad<GLB, 27, Uart> {}
-impl<GLB> HasUartSignal<4> for Pad<GLB, 28, Uart> {}
-impl<GLB> HasUartSignal<5> for Pad<GLB, 29, Uart> {}
-impl<GLB> HasUartSignal<6> for Pad<GLB, 30, Uart> {}
-impl<GLB> HasUartSignal<7> for Pad<GLB, 31, Uart> {}
-impl<GLB> HasUartSignal<8> for Pad<GLB, 32, Uart> {}
-impl<GLB> HasUartSignal<9> for Pad<GLB, 33, Uart> {}
-impl<GLB> HasUartSignal<10> for Pad<GLB, 34, Uart> {}
-impl<GLB> HasUartSignal<11> for Pad<GLB, 35, Uart> {}
-impl<GLB> HasUartSignal<0> for Pad<GLB, 36, Uart> {}
-impl<GLB> HasUartSignal<1> for Pad<GLB, 37, Uart> {}
-impl<GLB> HasUartSignal<2> for Pad<GLB, 38, Uart> {}
-impl<GLB> HasUartSignal<3> for Pad<GLB, 39, Uart> {}
-impl<GLB> HasUartSignal<4> for Pad<GLB, 40, Uart> {}
-impl<GLB> HasUartSignal<5> for Pad<GLB, 41, Uart> {}
-impl<GLB> HasUartSignal<6> for Pad<GLB, 42, Uart> {}
-impl<GLB> HasUartSignal<7> for Pad<GLB, 43, Uart> {}
-impl<GLB> HasUartSignal<8> for Pad<GLB, 44, Uart> {}
-impl<GLB> HasUartSignal<9> for Pad<GLB, 45, Uart> {}
+impl<GLB> HasUartSignal<0> for Alternate<GLB, 0, Uart> {}
+impl<GLB> HasUartSignal<1> for Alternate<GLB, 1, Uart> {}
+impl<GLB> HasUartSignal<2> for Alternate<GLB, 2, Uart> {}
+impl<GLB> HasUartSignal<3> for Alternate<GLB, 3, Uart> {}
+impl<GLB> HasUartSignal<4> for Alternate<GLB, 4, Uart> {}
+impl<GLB> HasUartSignal<5> for Alternate<GLB, 5, Uart> {}
+impl<GLB> HasUartSignal<6> for Alternate<GLB, 6, Uart> {}
+impl<GLB> HasUartSignal<7> for Alternate<GLB, 7, Uart> {}
+impl<GLB> HasUartSignal<8> for Alternate<GLB, 8, Uart> {}
+impl<GLB> HasUartSignal<9> for Alternate<GLB, 9, Uart> {}
+impl<GLB> HasUartSignal<10> for Alternate<GLB, 10, Uart> {}
+impl<GLB> HasUartSignal<11> for Alternate<GLB, 11, Uart> {}
+impl<GLB> HasUartSignal<0> for Alternate<GLB, 12, Uart> {}
+impl<GLB> HasUartSignal<1> for Alternate<GLB, 13, Uart> {}
+impl<GLB> HasUartSignal<2> for Alternate<GLB, 14, Uart> {}
+impl<GLB> HasUartSignal<3> for Alternate<GLB, 15, Uart> {}
+impl<GLB> HasUartSignal<4> for Alternate<GLB, 16, Uart> {}
+impl<GLB> HasUartSignal<5> for Alternate<GLB, 17, Uart> {}
+impl<GLB> HasUartSignal<6> for Alternate<GLB, 18, Uart> {}
+impl<GLB> HasUartSignal<7> for Alternate<GLB, 19, Uart> {}
+impl<GLB> HasUartSignal<8> for Alternate<GLB, 20, Uart> {}
+impl<GLB> HasUartSignal<9> for Alternate<GLB, 21, Uart> {}
+impl<GLB> HasUartSignal<10> for Alternate<GLB, 22, Uart> {}
+impl<GLB> HasUartSignal<11> for Alternate<GLB, 23, Uart> {}
+impl<GLB> HasUartSignal<0> for Alternate<GLB, 24, Uart> {}
+impl<GLB> HasUartSignal<1> for Alternate<GLB, 25, Uart> {}
+impl<GLB> HasUartSignal<2> for Alternate<GLB, 26, Uart> {}
+impl<GLB> HasUartSignal<3> for Alternate<GLB, 27, Uart> {}
+impl<GLB> HasUartSignal<4> for Alternate<GLB, 28, Uart> {}
+impl<GLB> HasUartSignal<5> for Alternate<GLB, 29, Uart> {}
+impl<GLB> HasUartSignal<6> for Alternate<GLB, 30, Uart> {}
+impl<GLB> HasUartSignal<7> for Alternate<GLB, 31, Uart> {}
+impl<GLB> HasUartSignal<8> for Alternate<GLB, 32, Uart> {}
+impl<GLB> HasUartSignal<9> for Alternate<GLB, 33, Uart> {}
+impl<GLB> HasUartSignal<10> for Alternate<GLB, 34, Uart> {}
+impl<GLB> HasUartSignal<11> for Alternate<GLB, 35, Uart> {}
+impl<GLB> HasUartSignal<0> for Alternate<GLB, 36, Uart> {}
+impl<GLB> HasUartSignal<1> for Alternate<GLB, 37, Uart> {}
+impl<GLB> HasUartSignal<2> for Alternate<GLB, 38, Uart> {}
+impl<GLB> HasUartSignal<3> for Alternate<GLB, 39, Uart> {}
+impl<GLB> HasUartSignal<4> for Alternate<GLB, 40, Uart> {}
+impl<GLB> HasUartSignal<5> for Alternate<GLB, 41, Uart> {}
+impl<GLB> HasUartSignal<6> for Alternate<GLB, 42, Uart> {}
+impl<GLB> HasUartSignal<7> for Alternate<GLB, 43, Uart> {}
+impl<GLB> HasUartSignal<8> for Alternate<GLB, 44, Uart> {}
+impl<GLB> HasUartSignal<9> for Alternate<GLB, 45, Uart> {}
 
 /// Check if an internal multi-media UART signal is connected to target gpio `Pin`.
 pub trait HasMmUartSignal {}
 
-impl<GLB, const N: usize> HasMmUartSignal for Pad<GLB, N, MmUart> {}
+impl<GLB, const N: usize> HasMmUartSignal for Alternate<GLB, N, MmUart> {}
 
 /// Valid UART pads.
 #[diagnostic::on_unimplemented(
@@ -93,17 +93,17 @@ fn from_pads<T, TX, RX>(
 }
 
 impl<A1, GLB2, const I: usize, const U: usize, const N: usize> Pads<U>
-    for (Pad<A1, N, Uart>, UartMux<GLB2, I, MuxTxd<U>>)
+    for (Alternate<A1, N, Uart>, UartMux<GLB2, I, MuxTxd<U>>)
 where
     A1: Deref<Target = glb::v2::RegisterBlock>,
-    Pad<A1, N, Uart>: HasUartSignal<I>,
+    Alternate<A1, N, Uart>: HasUartSignal<I>,
 {
     const RTS: bool = false;
     const CTS: bool = false;
     const TXD: bool = true;
     const RXD: bool = false;
     type Split<T> = (
-        BlockingTransmitHalf<T, (Pad<A1, N, Uart>, UartMux<GLB2, I, MuxTxd<U>>)>,
+        BlockingTransmitHalf<T, (Alternate<A1, N, Uart>, UartMux<GLB2, I, MuxTxd<U>>)>,
         BlockingReceiveHalf<T, ()>,
     );
     #[inline]
@@ -124,22 +124,22 @@ impl<
         const N2: usize,
     > Pads<U>
     for (
-        (Pad<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
-        (Pad<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>),
+        (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
+        (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>),
     )
 where
     A1: Deref<Target = glb::v2::RegisterBlock>,
     A3: Deref<Target = glb::v2::RegisterBlock>,
-    Pad<A1, N1, Uart>: HasUartSignal<I1>,
-    Pad<A3, N2, Uart>: HasUartSignal<I2>,
+    Alternate<A1, N1, Uart>: HasUartSignal<I1>,
+    Alternate<A3, N2, Uart>: HasUartSignal<I2>,
 {
     const RTS: bool = false;
     const CTS: bool = false;
     const TXD: bool = true;
     const RXD: bool = true;
     type Split<T> = (
-        BlockingTransmitHalf<T, (Pad<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>)>,
-        BlockingReceiveHalf<T, (Pad<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>)>,
+        BlockingTransmitHalf<T, (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>)>,
+        BlockingReceiveHalf<T, (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>)>,
     );
     #[inline]
     fn split<T>(self, uart: T) -> Self::Split<T> {
@@ -159,14 +159,14 @@ impl<
         const N2: usize,
     > Pads<U>
     for (
-        (Pad<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
-        (Pad<A3, N2, Uart>, UartMux<GLB4, I2, MuxCts<U>>),
+        (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
+        (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxCts<U>>),
     )
 where
     A1: Deref<Target = glb::v2::RegisterBlock>,
     A3: Deref<Target = glb::v2::RegisterBlock>,
-    Pad<A1, N1, Uart>: HasUartSignal<I1>,
-    Pad<A3, N2, Uart>: HasUartSignal<I2>,
+    Alternate<A1, N1, Uart>: HasUartSignal<I1>,
+    Alternate<A3, N2, Uart>: HasUartSignal<I2>,
 {
     const RTS: bool = false;
     const CTS: bool = true;
@@ -175,8 +175,8 @@ where
     type Split<T> = BlockingTransmitHalf<
         T,
         (
-            (Pad<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
-            (Pad<A3, N2, Uart>, UartMux<GLB4, I2, MuxCts<U>>),
+            (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
+            (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxCts<U>>),
         ),
     >;
     #[inline]
@@ -205,20 +205,20 @@ impl<
         const N4: usize,
     > Pads<U>
     for (
-        (Pad<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
-        (Pad<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>),
-        (Pad<A5, N3, Uart>, UartMux<GLB6, I3, MuxRts<U>>),
-        (Pad<A7, N4, Uart>, UartMux<GLB8, I4, MuxCts<U>>),
+        (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
+        (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>),
+        (Alternate<A5, N3, Uart>, UartMux<GLB6, I3, MuxRts<U>>),
+        (Alternate<A7, N4, Uart>, UartMux<GLB8, I4, MuxCts<U>>),
     )
 where
     A1: Deref<Target = glb::v2::RegisterBlock>,
     A3: Deref<Target = glb::v2::RegisterBlock>,
     A5: Deref<Target = glb::v2::RegisterBlock>,
     A7: Deref<Target = glb::v2::RegisterBlock>,
-    Pad<A1, N1, Uart>: HasUartSignal<I1>,
-    Pad<A3, N2, Uart>: HasUartSignal<I2>,
-    Pad<A5, N3, Uart>: HasUartSignal<I3>,
-    Pad<A7, N4, Uart>: HasUartSignal<I4>,
+    Alternate<A1, N1, Uart>: HasUartSignal<I1>,
+    Alternate<A3, N2, Uart>: HasUartSignal<I2>,
+    Alternate<A5, N3, Uart>: HasUartSignal<I3>,
+    Alternate<A7, N4, Uart>: HasUartSignal<I4>,
 {
     const RTS: bool = false;
     const CTS: bool = true;
@@ -228,15 +228,15 @@ where
         BlockingTransmitHalf<
             T,
             (
-                (Pad<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
-                (Pad<A7, N4, Uart>, UartMux<GLB8, I4, MuxCts<U>>),
+                (Alternate<A1, N1, Uart>, UartMux<GLB2, I1, MuxTxd<U>>),
+                (Alternate<A7, N4, Uart>, UartMux<GLB8, I4, MuxCts<U>>),
             ),
         >,
         BlockingReceiveHalf<
             T,
             (
-                (Pad<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>),
-                (Pad<A5, N3, Uart>, UartMux<GLB6, I3, MuxRts<U>>),
+                (Alternate<A3, N2, Uart>, UartMux<GLB4, I2, MuxRxd<U>>),
+                (Alternate<A5, N3, Uart>, UartMux<GLB6, I3, MuxRts<U>>),
             ),
         >,
     );
@@ -250,10 +250,10 @@ where
 
 const MMUART_UART_ID: usize = 3;
 
-impl<A1, const N: usize> Pads<MMUART_UART_ID> for Pad<A1, N, MmUart>
+impl<A1, const N: usize> Pads<MMUART_UART_ID> for Alternate<A1, N, MmUart>
 where
     A1: Deref<Target = glb::v2::RegisterBlock>,
-    Pad<A1, N, MmUart>: HasMmUartSignal,
+    Alternate<A1, N, MmUart>: HasMmUartSignal,
 {
     const RTS: bool = { N % 4 == 2 };
     const CTS: bool = { N % 4 == 3 };
@@ -268,12 +268,12 @@ where
 }
 
 impl<A1, A2, const N1: usize, const N2: usize> Pads<MMUART_UART_ID>
-    for (Pad<A1, N1, MmUart>, Pad<A2, N2, MmUart>)
+    for (Alternate<A1, N1, MmUart>, Alternate<A2, N2, MmUart>)
 where
     A1: Deref<Target = glb::v2::RegisterBlock>,
     A2: Deref<Target = glb::v2::RegisterBlock>,
-    Pad<A1, N1, MmUart>: HasMmUartSignal,
-    Pad<A2, N2, MmUart>: HasMmUartSignal,
+    Alternate<A1, N1, MmUart>: HasMmUartSignal,
+    Alternate<A2, N2, MmUart>: HasMmUartSignal,
 {
     const RTS: bool = { N1 % 4 == 2 || N2 % 4 == 2 };
     const CTS: bool = { N1 % 4 == 3 || N2 % 4 == 3 };
@@ -289,17 +289,17 @@ where
 
 impl<A1, A2, A3, const N1: usize, const N2: usize, const N3: usize> Pads<MMUART_UART_ID>
     for (
-        Pad<A1, N1, MmUart>,
-        Pad<A2, N2, MmUart>,
-        Pad<A3, N3, MmUart>,
+        Alternate<A1, N1, MmUart>,
+        Alternate<A2, N2, MmUart>,
+        Alternate<A3, N3, MmUart>,
     )
 where
     A1: Deref<Target = glb::v2::RegisterBlock>,
     A2: Deref<Target = glb::v2::RegisterBlock>,
     A3: Deref<Target = glb::v2::RegisterBlock>,
-    Pad<A1, N1, MmUart>: HasMmUartSignal,
-    Pad<A2, N2, MmUart>: HasMmUartSignal,
-    Pad<A3, N3, MmUart>: HasMmUartSignal,
+    Alternate<A1, N1, MmUart>: HasMmUartSignal,
+    Alternate<A2, N2, MmUart>: HasMmUartSignal,
+    Alternate<A3, N3, MmUart>: HasMmUartSignal,
 {
     const RTS: bool = { N1 % 4 == 2 || N2 % 4 == 2 || N3 % 4 == 2 };
     const CTS: bool = { N1 % 4 == 3 || N2 % 4 == 3 || N3 % 4 == 3 };
@@ -316,20 +316,20 @@ where
 impl<A1, A2, A3, A4, const N1: usize, const N2: usize, const N3: usize, const N4: usize>
     Pads<MMUART_UART_ID>
     for (
-        Pad<A1, N1, MmUart>,
-        Pad<A2, N2, MmUart>,
-        Pad<A3, N3, MmUart>,
-        Pad<A4, N4, MmUart>,
+        Alternate<A1, N1, MmUart>,
+        Alternate<A2, N2, MmUart>,
+        Alternate<A3, N3, MmUart>,
+        Alternate<A4, N4, MmUart>,
     )
 where
     A1: Deref<Target = glb::v2::RegisterBlock>,
     A2: Deref<Target = glb::v2::RegisterBlock>,
     A3: Deref<Target = glb::v2::RegisterBlock>,
     A4: Deref<Target = glb::v2::RegisterBlock>,
-    Pad<A1, N1, MmUart>: HasMmUartSignal,
-    Pad<A2, N2, MmUart>: HasMmUartSignal,
-    Pad<A3, N3, MmUart>: HasMmUartSignal,
-    Pad<A4, N4, MmUart>: HasMmUartSignal,
+    Alternate<A1, N1, MmUart>: HasMmUartSignal,
+    Alternate<A2, N2, MmUart>: HasMmUartSignal,
+    Alternate<A3, N3, MmUart>: HasMmUartSignal,
+    Alternate<A4, N4, MmUart>: HasMmUartSignal,
 {
     const RTS: bool = { N1 % 4 == 2 || N2 % 4 == 2 || N3 % 4 == 2 || N4 % 4 == 2 };
     const CTS: bool = { N1 % 4 == 3 || N2 % 4 == 3 || N3 % 4 == 3 || N4 % 4 == 3 };
diff --git a/examples/peripherals/sdcard-gpt-demo/src/main.rs b/examples/peripherals/sdcard-gpt-demo/src/main.rs
index 038662d..0679c96 100644
--- a/examples/peripherals/sdcard-gpt-demo/src/main.rs
+++ b/examples/peripherals/sdcard-gpt-demo/src/main.rs
@@ -249,22 +249,22 @@ fn main(p: Peripherals, c: Clocks) -> ! {
             Spi<
                 bouffalo_rt::soc::bl808::SPI0,
                 (
-                    bouffalo_hal::gpio::Pad<
+                    bouffalo_hal::gpio::Alternate<
                         bouffalo_rt::soc::bl808::GLBv2,
                         3,
                         bouffalo_hal::gpio::Spi<1>,
                     >,
-                    bouffalo_hal::gpio::Pad<
+                    bouffalo_hal::gpio::Alternate<
                         bouffalo_rt::soc::bl808::GLBv2,
                         1,
                         bouffalo_hal::gpio::Spi<1>,
                     >,
-                    bouffalo_hal::gpio::Pad<
+                    bouffalo_hal::gpio::Alternate<
                         bouffalo_rt::soc::bl808::GLBv2,
                         2,
                         bouffalo_hal::gpio::Spi<1>,
                     >,
-                    bouffalo_hal::gpio::Pad<
+                    bouffalo_hal::gpio::Alternate<
                         bouffalo_rt::soc::bl808::GLBv2,
                         0,
                         bouffalo_hal::gpio::Spi<1>,