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    185 repositories

    • hammer

      Public
      Hammer: Highly Agile Masks Made Effortlessly from RTL
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •60•259•203•19•Updated Dec 23, 2024Dec 23, 2024

    • chipyard-cs152-sp24

      Public
      C
      •
      BSD 3-Clause "New" or "Revised" License
      •1•3•0•43•Updated Dec 23, 2024Dec 23, 2024

    • chipyard

      Public
      An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
      boomrocketrocket-chipchip-generatorchiselrtlperipheralssocout-of-ordersuperscalar
      Scala
      •
      BSD 3-Clause "New" or "Revised" License
      •663•1.7k•186•31•Updated Dec 23, 2024Dec 23, 2024

    • MaDa

      Public
      Verilog
      •
      MIT License
      •0•0•0•0•Updated Dec 22, 2024Dec 22, 2024

    • sp24-Baremetal-IDE

      Public
      A submodule of Chipyard https://github.com/ucb-bar/chipyard
      HTML
      •10•1•0•2•Updated Dec 21, 2024Dec 21, 2024

    • IsaacLab

      Public
      Unified framework for robot learning built on NVIDIA Isaac Sim
      Python
      •
      Other
      •1k•0•0•0•Updated Dec 21, 2024Dec 21, 2024

    • Baremetal-IDE

      Public
      A submodule of Chipyard https://github.com/ucb-bar/chipyard
      HTML
      •10•9•3•2•Updated Dec 20, 2024Dec 20, 2024

    • saturn-vectors

      Public
      Chisel RISC-V Vector 1.0 Implementation
      cpuchiselvectorsrisc-vmicroarchitecturervv
      Assembly
      •
      BSD 3-Clause "New" or "Revised" License
      •7•63•2•0•Updated Dec 15, 2024Dec 15, 2024

    • Baremetal-NN

      Public
      Tool for converting PyTorch models into raw C codes with minimal dependency and some performance optimizations.
      cneural-networkpytorchrisc-v
      C
      •4•25•1•1•Updated Dec 14, 2024Dec 14, 2024

    • gemmini

      Public
      Berkeley's Spatial Array Generator
      asicacceleratordnn
      Scala
      •
      Other
      •177•832•82•11•Updated Dec 13, 2024Dec 13, 2024

    • pyuartsi

      Public
      A standalone implementation of the Tethered Serial Interface (TSI) in Python.
      Python
      •0•5•0•0•Updated Dec 13, 2024Dec 13, 2024

    • SuperNoVA

      Public
      su su su supernova
      C
      •
      BSD 3-Clause "New" or "Revised" License
      •0•5•0•0•Updated Dec 13, 2024Dec 13, 2024

    • gemmini-rocc-tests

      Public
      Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator
      C
      •
      Other
      •41•54•6•8•Updated Dec 13, 2024Dec 13, 2024

    • ra-isam2

      Public
      Fork of GTSAM. Implements resource-aware ISAM2 for SuperNoVA
      C++
      •
      Other
      •0•0•0•0•Updated Dec 12, 2024Dec 12, 2024

    • testchipip

      Public
      Scala
      •
      BSD 3-Clause "New" or "Revised" License
      •59•80•15•4•Updated Dec 9, 2024Dec 9, 2024

    • spike-devices

      Public
      Collection of device models for spike
      C++
      •6•7•1•3•Updated Dec 5, 2024Dec 5, 2024

    • radiance

      Public
      Rocket Chip Generator
      SystemVerilog
      •
      Other
      •1.1k•1•0•0•Updated Dec 5, 2024Dec 5, 2024

    • riscv-tools-feedstock

      Public
      Shell
      •
      BSD 3-Clause "New" or "Revised" License
      •7•4•0•2•Updated Dec 2, 2024Dec 2, 2024

    • kicad-parts

      Public
      Symbol and footprint part libraries for KiCad
      0•0•0•0•Updated Nov 27, 2024Nov 27, 2024

    • riscv-gnu-toolchain

      Public
      GNU toolchain for RISC-V, including GCC
      C
      •
      Other
      •1.2k•0•0•0•Updated Nov 27, 2024Nov 27, 2024

    • iris-event-utils

      Public
      iris-event-utils provides a flexible API for extracting microarchitecture events and data in RTL
      Python
      •0•1•0•0•Updated Nov 25, 2024Nov 25, 2024

    • IsaacLabG1Extension

      Public template
      External extenstion template based on Isaac Lab
      Python
      •
      MIT License
      •50•0•0•0•Updated Nov 25, 2024Nov 25, 2024

    • constellation

      Public
      A Chisel RTL generator for network-on-chip interconnects
      hardwarechiselrtlsocnocinterconnectnetwork-on-chip
      Scala
      •
      BSD 3-Clause "New" or "Revised" License
      •27•178•19•3•Updated Nov 19, 2024Nov 19, 2024

    • G1-Demos

      Public
      Python
      •
      MIT License
      •1•1•0•0•Updated Nov 18, 2024Nov 18, 2024

    • stac-top

      Public
      The SRAM timing analysis chip for verifying SRAMs generated by SRAM22
      Scala
      •
      BSD 3-Clause "New" or "Revised" License
      •0•4•0•0•Updated Nov 18, 2024Nov 18, 2024

    • AuRORA

      Public
      Virtualized Accelerator Orchestration for Multi-Tenant Workloads
      C
      •1•9•2•0•Updated Nov 17, 2024Nov 17, 2024

    • sky130-chipyard

      Public
      A SKY 130 tapeout harness built with Chipyard.
      C
      •
      BSD 3-Clause "New" or "Revised" License
      •663•0•0•0•Updated Nov 13, 2024Nov 13, 2024

    • caliptra-aes-acc

      Public
      SystemVerilog
      •
      BSD 3-Clause "New" or "Revised" License
      •1•2•0•0•Updated Nov 13, 2024Nov 13, 2024

    • shuttle

      Public
      A Rocket-based RISC-V superscalar in-order core
      Scala
      •2•28•1•0•Updated Oct 29, 2024Oct 29, 2024

    • matlib

      Public
      Matrix Library for RISC-V Accelerators
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •3•1•0•0•Updated Oct 28, 2024Oct 28, 2024