FPGAServo.v.bak

module FPGAServo(
		input  wire	CLK_50,
		inout  wire	[38:1] GPIO,
		input  wire M0_ENC_A,
		input  wire M0_ENC_B,
		input  wire M0_ENC_Z,
		input  wire M0_LEDB,
		input  wire M0_LEDG,
		input  wire M0_LEDR,
		input  wire M0_PWM_AH,
		input  wire M0_PWM_AL,
		input  wire M0_PWM_BH,
		input  wire M0_PWM_BL,
		input  wire M0_PWM_CH,
		input  wire M0_PWM_CL,
		input  wire M1_ENC_A,
		input  wire M1_ENC_B,
		input  wire M1_ENC_Z,
		input  wire M1_LEDB,
		input  wire M1_LEDG,
		input  wire M1_LEDR,
		input  wire M1_PWM_AH,
		input  wire M1_PWM_AL,
		input  wire M1_PWM_BH,
		input  wire M1_PWM_BL,
		input  wire M1_PWM_CH,
		input  wire M1_PWM_CL,
		input  wire M2_ENC_A,
		input  wire M2_ENC_B,
		input  wire M2_ENC_Z,
		input  wire M2_LEDB,
		input  wire M2_LEDG,
		input  wire M2_LEDR,
		input  wire M2_PWM_AH,
		input  wire M2_PWM_AL,
		input  wire M2_PWM_BH,
		input  wire M2_PWM_BL,
		input  wire M2_PWM_CH,
		input  wire M2_PWM_CL,
		input  wire STATUSLED_B,
		input  wire STATUSLED_R
	);
	
	qsystem u0 (
		.clk_clk               (CLOCK_50),               //             clk.clk
		.reset_reset_n         (1),         //           reset.reset_n
		.pwm_0_pwmout_ldrive   (GPIO_0[2:0]),   //                .ldrive
		.pwm_0_pwmout_udrive   (GPIO_0[5:3]),   //    pwm_0_pwmout.udrive
		.qei_0_encoderin_encab (GPIO_0[7:6]), // qei_0_encoderin.encab
		.pwm_1_pwmout_ldrive   (GPIO_1[2:0]),   //                .ldrive
		.pwm_1_pwmout_udrive   (GPIO_1[5:3]),   //    pwm_1_pwmout.udrive
		.qei_1_encoderin_encab (GPIO_1[7:6])  // qei_1_encoderin.encab
	);

endmodule