diff --git a/doc/user_guide/_docs/A02-logical_signals.md b/doc/user_guide/_docs/A02-logical_signals.md
index ce0b77432..93997fd8e 100644
--- a/doc/user_guide/_docs/A02-logical_signals.md
+++ b/doc/user_guide/_docs/A02-logical_signals.md
@@ -22,7 +22,7 @@ var bus = Logic(name: 'b', width: 8)
 
 You can access the current value of a signal using `value`.  You cannot access this as part of synthesizable ROHD code.  ROHD supports X and Z values and propogation.  If the signal is valid (no X or Z in it), you can also convert it to an `int` with `value.toInt()` (ROHD will throw an exception otherwise).  If the signal has more bits than a dart `int` (64 bits, usually), you need to use `value.toBigInt()` to get a `BigInt` (again, ROHD will throw an exception otherwise).
 
-The value of a `Logic` is of type [`LogicValue`](https://intel.github.io/rohd/rohd/LogicValue-class.html), with pre-defined constant bit values `x`, `z`, `one`, and `zero`.  `LogicValue` has a number of built-in logical operations (like &, |, ^, +, -, etc.).
+The value of a `Logic` is of type [`LogicValue`](https://intel.github.io/rohd/rohd/LogicValue-class.html), with pre-defined constant bit values `x`, `z`, `one`, and `zero`.  `LogicValue` has a number of built-in logical operations (like `&`, `|`, `^`, `+`, `-`, etc.).
 
 ```dart
 var x = Logic(width:2);
diff --git a/doc/user_guide/_docs/A20-logic-arrays.md b/doc/user_guide/_docs/A20-logic-arrays.md
index f0857e291..67632d0f2 100644
--- a/doc/user_guide/_docs/A20-logic-arrays.md
+++ b/doc/user_guide/_docs/A20-logic-arrays.md
@@ -42,3 +42,7 @@ LogicArray(
 You can declare ports of `Module`s as being arrays (including with some dimensions "unpacked") using `addInputArray` and `addOutputArray`. Note that these do _not_ automatically do validation that the dimensions, element width, number of unpacked dimensions, etc. are equal between the port and the original signal. As long as the overall width matches, the assignment will be clean.
 
 Array ports in generated SystemVerilog will match dimensions (including unpacked) as specified when the port is created.
+
+## Elements of arrays
+
+To iterate through or access elements of a `LogicArray` (or bits of a simple `Logic`), use [`elements`](https://intel.github.io/rohd/rohd/Logic/elements.html).  Using the normal `[n]` accessors will return the `n`th bit regardless for `LogicArray` and `Logic` to maintain API consistency.
diff --git a/tool/generate_coverage.sh b/tool/generate_coverage.sh
index 8e53627bf..d217179cb 100755
--- a/tool/generate_coverage.sh
+++ b/tool/generate_coverage.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-# Copyright (C) 2022 Intel Corporation
+# Copyright (C) 2022-2023 Intel Corporation
 # SPDX-License-Identifier: BSD-3-Clause
 #
 # generate_coverage.sh
@@ -8,7 +8,6 @@
 #
 # 2022 May 5
 # Author: Max Korbel <max.korbel@intel.com>
-#
 
 ### WARNING ###
 # The "x" option outputs all script commands. This allows you to track
diff --git a/tool/gh_actions/analyze_source.sh b/tool/gh_actions/analyze_source.sh
index 79652314d..8fc260b6b 100755
--- a/tool/gh_actions/analyze_source.sh
+++ b/tool/gh_actions/analyze_source.sh
@@ -8,7 +8,6 @@
 #
 # 2022 October 9
 # Author: Chykon
-#
 
 set -euo pipefail
 
diff --git a/tool/gh_actions/check_documentation.sh b/tool/gh_actions/check_documentation.sh
index f2d177d4f..085ea518b 100755
--- a/tool/gh_actions/check_documentation.sh
+++ b/tool/gh_actions/check_documentation.sh
@@ -8,7 +8,6 @@
 #
 # 2022 October 9
 # Author: Chykon
-#
 
 set -euo pipefail
 
diff --git a/tool/gh_actions/check_folder_tmp_test.sh b/tool/gh_actions/check_folder_tmp_test.sh
index e33dca179..cbbb78f4f 100755
--- a/tool/gh_actions/check_folder_tmp_test.sh
+++ b/tool/gh_actions/check_folder_tmp_test.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-# Copyright (C) 2022 Intel Corporation
+# Copyright (C) 2022-2023 Intel Corporation
 # SPDX-License-Identifier: BSD-3-Clause
 #
 # check_folder_tmp_test.sh
@@ -8,7 +8,6 @@
 #
 # 2022 October 12
 # Author: Chykon
-#
 
 set -euo pipefail
 
diff --git a/tool/gh_actions/generate_documentation.sh b/tool/gh_actions/generate_documentation.sh
index 4550f4a68..9cecffa74 100755
--- a/tool/gh_actions/generate_documentation.sh
+++ b/tool/gh_actions/generate_documentation.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-# Copyright (C) 2022 Intel Corporation
+# Copyright (C) 2022-2023 Intel Corporation
 # SPDX-License-Identifier: BSD-3-Clause
 #
 # generate_documentation.sh
@@ -8,7 +8,6 @@
 #
 # 2022 October 10
 # Author: Chykon
-#
 
 set -euo pipefail
 
diff --git a/tool/gh_actions/install_dependencies.sh b/tool/gh_actions/install_dependencies.sh
index 8a9f4654d..7aef34082 100755
--- a/tool/gh_actions/install_dependencies.sh
+++ b/tool/gh_actions/install_dependencies.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-# Copyright (C) 2022 Intel Corporation
+# Copyright (C) 2022-2023 Intel Corporation
 # SPDX-License-Identifier: BSD-3-Clause
 #
 # install_dependencies.sh
@@ -8,7 +8,6 @@
 #
 # 2022 October 7
 # Author: Chykon
-#
 
 set -euo pipefail
 
diff --git a/tool/gh_actions/install_iverilog.sh b/tool/gh_actions/install_iverilog.sh
index 807891c7f..652e5b869 100755
--- a/tool/gh_actions/install_iverilog.sh
+++ b/tool/gh_actions/install_iverilog.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-# Copyright (C) 2022 Intel Corporation
+# Copyright (C) 2022-2023 Intel Corporation
 # SPDX-License-Identifier: BSD-3-Clause
 #
 # install_iverilog.sh
@@ -8,7 +8,6 @@
 #
 # 2022 October 9
 # Author: Chykon
-#
 
 set -euo pipefail
 
diff --git a/tool/gh_actions/run_tests.sh b/tool/gh_actions/run_tests.sh
index 2c6fdebef..e34354891 100755
--- a/tool/gh_actions/run_tests.sh
+++ b/tool/gh_actions/run_tests.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-# Copyright (C) 2022 Intel Corporation
+# Copyright (C) 2022-2023 Intel Corporation
 # SPDX-License-Identifier: BSD-3-Clause
 #
 # run_tests.sh
@@ -8,7 +8,6 @@
 #
 # 2022 October 10
 # Author: Chykon
-#
 
 set -euo pipefail
 
diff --git a/tool/gh_actions/verify_formatting.sh b/tool/gh_actions/verify_formatting.sh
index 117225ecf..e69c52248 100755
--- a/tool/gh_actions/verify_formatting.sh
+++ b/tool/gh_actions/verify_formatting.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-# Copyright (C) 2022 Intel Corporation
+# Copyright (C) 2022-2023 Intel Corporation
 # SPDX-License-Identifier: BSD-3-Clause
 #
 # verify_formatting.sh
@@ -8,7 +8,6 @@
 #
 # 2022 October 9
 # Author: Chykon
-#
 
 set -euo pipefail
 
diff --git a/tool/gh_codespaces/install_dart.sh b/tool/gh_codespaces/install_dart.sh
index f7a105f8f..abbe39a0c 100755
--- a/tool/gh_codespaces/install_dart.sh
+++ b/tool/gh_codespaces/install_dart.sh
@@ -8,7 +8,6 @@
 #
 # 2023 February 5
 # Author: Chykon
-#
 
 set -euo pipefail
 
diff --git a/tool/gh_codespaces/run_setup.sh b/tool/gh_codespaces/run_setup.sh
index f5b565a90..f32d372c7 100755
--- a/tool/gh_codespaces/run_setup.sh
+++ b/tool/gh_codespaces/run_setup.sh
@@ -8,7 +8,6 @@
 #
 # 2023 February 5
 # Author: Chykon
-#
 
 set -euo pipefail
 
diff --git a/tool/run_checks.sh b/tool/run_checks.sh
index 5643e5296..de6acd12f 100755
--- a/tool/run_checks.sh
+++ b/tool/run_checks.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-# Copyright (C) 2022 Intel Corporation
+# Copyright (C) 2022-2023 Intel Corporation
 # SPDX-License-Identifier: BSD-3-Clause
 #
 # run_checks.sh
@@ -8,7 +8,6 @@
 #
 # 2022 October 11
 # Author: Chykon
-#
 
 set -euo pipefail