From 23054adc4cd519aca76ff549c0f742ffd2533e9d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C5=A0pa=C4=8Dek?= Date: Sat, 29 Jun 2024 14:35:47 +0200 Subject: [PATCH] Refactor timer taxonomy --- data/registers/timer_l0.yaml | 16 +++++--------- data/registers/timer_v1.yaml | 15 ++++++++----- data/registers/timer_v2.yaml | 39 +++++++++++++++++++-------------- stm32-data-gen/src/registers.rs | 4 +--- 4 files changed, 39 insertions(+), 35 deletions(-) diff --git a/data/registers/timer_l0.yaml b/data/registers/timer_l0.yaml index 04dd3b51e..1d7969e1c 100644 --- a/data/registers/timer_l0.yaml +++ b/data/registers/timer_l0.yaml @@ -197,10 +197,6 @@ fieldset/CR1_CORE: description: Auto-reload preload enable bit_offset: 7 bit_size: 1 - - name: UIFREMAP - description: UIF status bit remapping enable - bit_offset: 11 - bit_size: 1 fieldset/CR1_1CH: extends: CR1_CORE description: control register 1 @@ -241,12 +237,7 @@ fieldset/CR2_MMS: fieldset/CR2_2CH: extends: CR2_MMS description: control register 2 - fields: - - name: TI1S - description: TI1 selection - bit_offset: 7 - bit_size: 1 - enum: TI1S + fields: [] fieldset/CR2_CCDMA: description: control register 2 fields: @@ -259,6 +250,11 @@ fieldset/CR2_TRIGDMA: extends: CR2_CCDMA description: control register 2 fields: + - name: MMS + description: Master mode selection + bit_offset: 4 + bit_size: 3 + enum: MMS - name: TI1S description: TI1 selection bit_offset: 7 diff --git a/data/registers/timer_v1.yaml b/data/registers/timer_v1.yaml index bf3918f06..9dad99bb5 100644 --- a/data/registers/timer_v1.yaml +++ b/data/registers/timer_v1.yaml @@ -415,14 +415,14 @@ fieldset/CR2_CCDMA: bit_size: 1 enum: CCDS fieldset/CR2_TRIGDMA: - extends: CR2_CCDMA + extends: CR2_2CH description: control register 2 fields: - - name: TI1S - description: TI1 selection - bit_offset: 7 + - name: CCDS + description: Capture/compare DMA selection + bit_offset: 3 bit_size: 1 - enum: TI1S + enum: CCDS fieldset/CR2_ADV1CH: extends: CR2_CCDMA description: control register 2 @@ -453,6 +453,11 @@ fieldset/CR2_ADV2CH: extends: CR2_ADV1CH description: control register 2 fields: + - name: MMS + description: Master mode selection + bit_offset: 4 + bit_size: 3 + enum: MMS - name: TI1S description: TI1 selection bit_offset: 7 diff --git a/data/registers/timer_v2.yaml b/data/registers/timer_v2.yaml index 2324d1325..899f01fa8 100644 --- a/data/registers/timer_v2.yaml +++ b/data/registers/timer_v2.yaml @@ -113,7 +113,7 @@ block/TIM_1CH: description: |- Option register 1 Note: Check Reference Manual to parse this register content - byte_offset: 80 + byte_offset: 104 block/TIM_2CH: extends: TIM_1CH @@ -181,11 +181,11 @@ block/TIM_4CH: fieldset: CCMR_Output_4CH - name: DCR description: DMA control register - byte_offset: 72 + byte_offset: 988 fieldset: DCR_CCDMA - name: DMAR description: DMA address for full transfer - byte_offset: 76 + byte_offset: 992 - name: ECR description: encoder control register byte_offset: 88 @@ -477,14 +477,14 @@ fieldset/CR2_CCDMA: bit_size: 1 enum: CCDS fieldset/CR2_TRIGDMA: - extends: CR2_CCDMA + extends: CR2_2CH description: control register 2 fields: - - name: TI1S - description: TI1 selection - bit_offset: 7 + - name: CCDS + description: Capture/compare DMA selection + bit_offset: 3 bit_size: 1 - enum: TI1S + enum: CCDS fieldset/CR2_ADV1CH: extends: CR2_CCDMA description: control register 2 @@ -515,6 +515,15 @@ fieldset/CR2_ADV2CH: extends: CR2_ADV1CH description: control register 2 fields: + - name: MMS + description: Master mode selection + bit_offset: + - start: 4 + end: 6 + - start: 25 + end: 25 + bit_size: 4 + enum: MMS - name: TI1S description: TI1 selection bit_offset: 7 @@ -1138,7 +1147,7 @@ fieldset/CCR5_ADV4CH: stride: 1 enum: GC5C fieldset/CCR_DITHER_1CH: - description: capture/compare register x (x=1-4,6) + description: capture/compare register x (x=1-4,6) (Dither mode enabled) fields: - name: DITHER description: capture/compare x (x=1-4,6) value @@ -1331,27 +1340,23 @@ fieldset/AF1_ADV1CH: bit_offset: 0 bit_size: 1 - name: BKCMPE - description: TIM_BRK_CMPx (x=1-2) enable + description: TIM_BRK_CMPx (x=1-8) enable bit_offset: 1 bit_size: 1 array: - len: 2 + len: 8 stride: 1 - - name: BKDF1BKE - description: BRK DFSDM1_BREAKx enable (x=0 if TIM15, x=1 if TIM16, x=2 if TIM17) - bit_offset: 8 - bit_size: 1 - name: BKINP description: TIMx_BKIN input polarity bit_offset: 9 bit_size: 1 enum: BKINP - name: BKCMPP - description: TIM_BRK_CMPx (x=1-2) input polarity + description: TIM_BRK_CMPx (x=1-3) input polarity bit_offset: 10 bit_size: 1 array: - len: 2 + len: 4 stride: 1 enum: BKINP fieldset/AF1_ADV4CH: diff --git a/stm32-data-gen/src/registers.rs b/stm32-data-gen/src/registers.rs index 738f3de4f..cd1ed0ddb 100644 --- a/stm32-data-gen/src/registers.rs +++ b/stm32-data-gen/src/registers.rs @@ -15,9 +15,7 @@ impl Registers { for f in glob::glob("data/registers/*")? { let f = f?; let ff = f.file_name().unwrap().to_string_lossy(); - let Some(ff) = ff.strip_suffix(".yaml") else { - continue - }; + let Some(ff) = ff.strip_suffix(".yaml") else { continue }; let ff = ff.to_string(); let ir: IR = serde_yaml::from_str(&std::fs::read_to_string(&f)?)