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STM32: Unexpected ADC read buffer data ordering #3666

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Knaifhogg opened this issue Dec 19, 2024 · 0 comments
Open

STM32: Unexpected ADC read buffer data ordering #3666

Knaifhogg opened this issue Dec 19, 2024 · 0 comments

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@Knaifhogg
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I ran into an issue with ADC data being wrong. It turned out to be due to not understanding how the data is read.

I added a print in the read method to show the sequence channel ordering.

Example code:

adc.read(
    &mut r.dma1_ch1,
    [
        (&mut input_i, SampleTime::CYCLES160_5),
        (&mut input_v, SampleTime::CYCLES160_5),
        (&mut temp_channel, SampleTime::CYCLES160_5),
        (&mut vrefint_channel, SampleTime::CYCLES160_5),

    ]
    .into_iter(),
    &mut read_buffer,
)
.await;

defmt::info!("{}", read_buffer);

Issue summarized:

Channel order: 0, 1, 12, 13
Output: [2035, 1962, 930, 1499]

Then I changed order in the adc.read sequence.
Channel order: 12, 13, 0, 1
Output: [2035, 1962, 930, 1499] (same output ordering as before)

Expected behaviour by me was that read_buffer indexes would match sequence order, since I don't really know the channel order. I.e read_buffer[2] would give channel 0 data in the last example.

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