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'make verify' does not work #40

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RTimothyEdwards opened this issue Sep 15, 2022 · 1 comment
Open

'make verify' does not work #40

RTimothyEdwards opened this issue Sep 15, 2022 · 1 comment
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error Something isn't working simulation Verilog testbenches and simulation

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@RTimothyEdwards
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The Makefile contains a recipe

verify:
        cd $(CARAVEL_ROOT)/verilog/dv/caravel/mgmt_soc/ && \
                $(MAKE) -j$(THREADS) all
        cd $(CARAVEL_ROOT)/verilog/dv/wb_utests/ && \
                $(MAKE) -j$(THREADS) all

This recipe points to directories that do not exist in the repository. The recipe should be either corrected or removed.

@azwefabless
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This should be cleaned up as it has been replaced by cocotb. If they follow instructions they would not run makeverify from caravel respository itself.

@azwefabless azwefabless added the simulation Verilog testbenches and simulation label Oct 14, 2022
@jeffdi jeffdi removed this from Caravel Redesign Nov 1, 2022
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Labels
error Something isn't working simulation Verilog testbenches and simulation
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