Make sure design is able to boot on a Digilent Arty A7 board

[mithro]

The Digilent Arty A7 board is an reasonable cheap, fairly large, modern and extremely common FPGA development board.

[jeffdi]

Currently supported on CMOD7. Will share repo publically.

[proppy]

@jeffdi is there any public documentation on how to get the design working on a CMOD/A7 board?

[tmichalak]

@proppy @jeffdi we have a WIP branch from which you can build a bitstream for Arty A7. Simply run make install_mcw to get an updated caravel_mgmt_soc_litex and then make vivado to build the bitstream.
For the CMOD A7 it should be just a matter of replacing the XDC file.

[jeffdi]

Thanks for this. We will have a look.

…

On Tue, Dec 13, 2022 at 8:34 AM Tomasz Michalak ***@***.***> wrote: @proppy <https://github.com/proppy> @jeffdi <https://github.com/jeffdi> we have a WIP branch <https://github.com/antmicro/caravel-lite/commits/arty> from which you can build a bitstream for Arty A7. Simply run make install_mcw to get an updated caravel_mgmt_soc_litex <https://github.com/antmicro/caravel_mgmt_soc_litex/tree/litex-lock> and then make vivado to build the bitstream. For the CMOD A7 it should be just a matter of replacing the XDC file. — Reply to this email directly, view it on GitHub <#1 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AKAZZ5JIVILRUUL354ZID23WNCQSPANCNFSM5HANGBPQ> . You are receiving this because you were mentioned.Message ID: ***@***.***>