From 7beff35302efa023ab1b84dbede5b09031fa3665 Mon Sep 17 00:00:00 2001 From: marwaneltoukhy Date: Thu, 1 Jun 2023 17:29:34 +0000 Subject: [PATCH 001/138] Apply automatic changes to Manifest and README.rst --- manifest | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/manifest b/manifest index c0dfd50d..76524268 100644 --- a/manifest +++ b/manifest @@ -5,8 +5,10 @@ 5f8e2d6670ce912bc209201d23430f62730e2627 verilog/rtl/__user_project_la_example.v cc82a78753f5f5d0a1519bd81adbcff8a4296d91 verilog/rtl/__user_project_wrapper.v 3c8c04f53b2848dc46132cda82c614e06e56571b verilog/rtl/buff_flash_clkrst.v -8a23782a7870d50eb281d72bebf13320cd009813 verilog/rtl/caravan.v +14064261ec18d633a5d72b45b2347c388f2f446f verilog/rtl/caravan.v 120661aaee20d83948e5e419a88ca9b63531ec95 verilog/rtl/caravan_core.v +e68fd2e085679d0f61040115fdd1d50651705d3a verilog/rtl/caravan_logo.v +d265ea6bf861e3f5c1b1b984ae057dbaed995008 verilog/rtl/caravan_motto.v d36e539fad7563a03974cb7d18489e6a0ccfe80d verilog/rtl/caravan_netlists.v a3d12a2d2d3596800bec47d1266dce2399a2fcc6 verilog/rtl/caravan_openframe.v b532b4c6315c29fd19fe38ac221b6fc41e6f5ecb verilog/rtl/caravan_power_routing.v @@ -22,6 +24,7 @@ f2242e1f295ee5efeacea51698f706a2cfd97c28 verilog/rtl/chip_io_alt.v 126aff02aa229dc346301c552d785dec76a4d68e verilog/rtl/clock_div.v 941bd7636e7558b045faa3d8c6ba2d91b4c4b798 verilog/rtl/constant_block.v 58fd210a64e502fb231d843eada4052f923d788d verilog/rtl/copyright_block.v +c254b1c442ca54e018d548d96d2ad0bb122a1203 verilog/rtl/copyright_block_a.v 653b230c7cbf092a6210ba7820bc942f312e53f3 verilog/rtl/debug_regs.v 2a7b5d508735fd485f8adcb3f8766ea3830091c2 verilog/rtl/digital_pll.v ce49f9af199b5f16d2c39c417d58e5890bc7bab2 verilog/rtl/digital_pll_controller.v From 1b93c22966298683c136a8a3f0ab7ef76e3240fe Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:25:05 -0700 Subject: [PATCH 002/138] Makefile add openframe target --- Makefile | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/Makefile b/Makefile index 03c90d20..84d3b5a3 100644 --- a/Makefile +++ b/Makefile @@ -194,6 +194,47 @@ __truck: @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_truck.out ### @rm $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl +.PHONY: ship +openframe: check-env uncompress uncompress-caravel +ifeq ($(FOREGROUND),1) + @echo "Running make openframe in the foreground..." + $(MAKE) -f $(CARAVEL_ROOT)/Makefile __openframe + @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out +else + @echo "Running make openframe in the background..." + nohup $(MAKE) -f $(CARAVEL_ROOT)/Makefile __ship >/dev/null 2>&1 & + tail -f signoff/build/make_openframe.out + @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out +endif + +__openframe: + @echo "###############################################" + @echo "Generating Caravel GDS (sources are in the 'gds' directory)" + @sleep 1 +#### Runs from the CARAVEL_ROOT mag directory + @echo "\ + drc off; \ + crashbackups stop; \ + addpath hexdigits; \ + addpath $(UPRJ_ROOT)/mag; \ + load openframe_project_wrapper; \ + property LEFview true; \ + property GDS_FILE $(UPRJ_ROOT)/gds/openframe_project_wrapper.gds; \ + property GDS_START 0; \ + load $(CARAVEL_ROOT)/maglef/simple_por; \ + load caravel -dereference; \ + select top cell; \ + expand; \ + cif *hier write disable; \ + cif *array write disable; \ + gds write $(UPRJ_ROOT)/gds/caravel.gds; \ + quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl +### Runs from CARAVEL_ROOT + @mkdir -p ./signoff/build + #@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out + @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out +### @rm $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl + .PHONY: clean clean: cd $(CARAVEL_ROOT)/verilog/dv/caravel/mgmt_soc/ && \ From bf4325dc16e4e93c46625e4b5edf72d69a1f68c9 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:29:04 -0700 Subject: [PATCH 003/138] Makefile add openframe target --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 84d3b5a3..02a750a5 100644 --- a/Makefile +++ b/Makefile @@ -194,7 +194,7 @@ __truck: @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_truck.out ### @rm $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl -.PHONY: ship +.PHONY: openframe openframe: check-env uncompress uncompress-caravel ifeq ($(FOREGROUND),1) @echo "Running make openframe in the foreground..." @@ -202,7 +202,7 @@ ifeq ($(FOREGROUND),1) @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out else @echo "Running make openframe in the background..." - nohup $(MAKE) -f $(CARAVEL_ROOT)/Makefile __ship >/dev/null 2>&1 & + nohup $(MAKE) -f $(CARAVEL_ROOT)/Makefile __openframe >/dev/null 2>&1 & tail -f signoff/build/make_openframe.out @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out endif From ecad21b327d5d3298f69125a21d2143de27f4fb5 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:31:14 -0700 Subject: [PATCH 004/138] Makefile add openframe target --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 02a750a5..20472cf0 100644 --- a/Makefile +++ b/Makefile @@ -222,7 +222,7 @@ __openframe: property GDS_FILE $(UPRJ_ROOT)/gds/openframe_project_wrapper.gds; \ property GDS_START 0; \ load $(CARAVEL_ROOT)/maglef/simple_por; \ - load caravel -dereference; \ + load caravel_openframe -dereference; \ select top cell; \ expand; \ cif *hier write disable; \ From c8beae7fe7b19308fd0a9290ccc25c49d2779a0b Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:45:03 -0700 Subject: [PATCH 005/138] disable dist for fill gen --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 20472cf0..8076e835 100644 --- a/Makefile +++ b/Makefile @@ -1145,8 +1145,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From 28c9ef91c44635d6be3d63844ffc012125d60e15 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 15:32:29 -0700 Subject: [PATCH 006/138] change .magicrc to use from pdk --- Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index 8076e835..1efb3bb5 100644 --- a/Makefile +++ b/Makefile @@ -231,8 +231,8 @@ __openframe: quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl ### Runs from CARAVEL_ROOT @mkdir -p ./signoff/build - #@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out - @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out + @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out + #@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out ### @rm $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl .PHONY: clean @@ -1145,8 +1145,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From eb4edd3db35a946d42b422ae3c696ddf8d5e4c8a Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 16:58:08 -0700 Subject: [PATCH 007/138] change .magicrc to use from pdk --- scripts/compositor.py | 6 +++--- scripts/generate_fill.py | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/scripts/compositor.py b/scripts/compositor.py index 999038f7..df05b215 100755 --- a/scripts/compositor.py +++ b/scripts/compositor.py @@ -147,9 +147,9 @@ def usage(): keepmode = True magpath = mag_dir_path - rcfile = magpath + '/.magicrc' - # pdk_root = os.getenv("PDK_ROOT") - # rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' + # rcfile = magpath + '/.magicrc' + pdk_root = os.getenv("PDK_ROOT") + rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' gdspath = gds_dir_path diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 2b0db8ef..964a6a87 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -153,9 +153,9 @@ def makegds(file): distmode = True magpath = user_project_path + '/mag' - rcfile = magpath + '/.magicrc' - # pdk_root = os.getenv("PDK_ROOT") - # rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' + # rcfile = magpath + '/.magicrc' + pdk_root = os.getenv("PDK_ROOT") + rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' if not os.path.isfile(rcfile): rcfile = None From da285b949e521e4e170a15ba9c815c293fe59d42 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:08:10 -0700 Subject: [PATCH 008/138] add user_id back --- Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Makefile b/Makefile index 1efb3bb5..7b678c9a 100644 --- a/Makefile +++ b/Makefile @@ -221,6 +221,8 @@ __openframe: property LEFview true; \ property GDS_FILE $(UPRJ_ROOT)/gds/openframe_project_wrapper.gds; \ property GDS_START 0; \ + load $(UPRJ_ROOT)/mag/user_id_programming; \ + load $(UPRJ_ROOT)/mag/user_id_textblock; \ load $(CARAVEL_ROOT)/maglef/simple_por; \ load caravel_openframe -dereference; \ select top cell; \ From 475368a304621d4645606127f64bed810e7dbfc4 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 00:21:17 +0000 Subject: [PATCH 009/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index 96d619cf..d22992e7 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py -9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py +50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From d71763f6c3ac2f1ed50eaa26c8ccad57ee79e130 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:25:50 -0700 Subject: [PATCH 010/138] add user_id back --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 7b678c9a..d7b7964e 100644 --- a/Makefile +++ b/Makefile @@ -1147,7 +1147,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From d265ffa318052cb6b6e1b436c5013765ccd9cd5a Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:30:10 -0700 Subject: [PATCH 011/138] rename top to caravel --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index d7b7964e..1ad411e6 100644 --- a/Makefile +++ b/Makefile @@ -229,6 +229,7 @@ __openframe: expand; \ cif *hier write disable; \ cif *array write disable; \ + save caravel; \ gds write $(UPRJ_ROOT)/gds/caravel.gds; \ quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl ### Runs from CARAVEL_ROOT From a2fb17282c287f222b14b75f02653a52be6c7dd4 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:25:22 -0700 Subject: [PATCH 012/138] change bbox for gen fill --- Makefile | 4 ++-- scripts/generate_fill.py | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index 1ad411e6..8ee1240e 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 964a6a87..098a590a 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -192,7 +192,8 @@ def makegds(file): if not distmode: print('cif ostyle wafflefill(tiled)', file=ofile) print('', file=ofile) - print('set fullbox [box values]', file=ofile) + # print('set fullbox [box values]', file=ofile) + print('set fullbox { 0 0 3588um 5188um }', file=ofile) print('set xmax [lindex $fullbox 2]', file=ofile) print('set xmin [lindex $fullbox 0]', file=ofile) print('set fullwidth [expr {$xmax - $xmin}]', file=ofile) From 6f7ac1fcfb051d10f3e32775df3760af7f0fce45 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:28:54 -0700 Subject: [PATCH 013/138] change bbox for gen fill --- scripts/generate_fill.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 098a590a..5a0646f8 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -193,7 +193,7 @@ def makegds(file): print('cif ostyle wafflefill(tiled)', file=ofile) print('', file=ofile) # print('set fullbox [box values]', file=ofile) - print('set fullbox { 0 0 3588um 5188um }', file=ofile) + print('set fullbox { 0 0 717600 1037600 }', file=ofile) print('set xmax [lindex $fullbox 2]', file=ofile) print('set xmin [lindex $fullbox 0]', file=ofile) print('set fullwidth [expr {$xmax - $xmin}]', file=ofile) From 83d06e23e9ef75ce14806c3f8d3e613c7f7b5162 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:37:32 -0700 Subject: [PATCH 014/138] change bbox for gen fill --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 8ee1240e..1ad411e6 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From 2852f5de6fe70663dffa0891e934410e975f04ac Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 14:58:47 +0000 Subject: [PATCH 015/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index d22992e7..e11ff1a5 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From ec5a034274f90a81a47b9807ac02dda264bf4514 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 09:48:04 -0700 Subject: [PATCH 016/138] remove -keep for gen fill --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 1ad411e6..2d5607bb 100644 --- a/Makefile +++ b/Makefile @@ -1148,7 +1148,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 05a7fe0024f7a7190c1d9a4d0d94fdc173c65637 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 10:37:10 -0700 Subject: [PATCH 017/138] add -keep --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 2d5607bb..1a48ec3e 100644 --- a/Makefile +++ b/Makefile @@ -1148,7 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 361e51f3d0fbc53903aece2774a884be094c72ca Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 12:40:54 -0700 Subject: [PATCH 018/138] correct load issue with gen fill --- scripts/generate_fill.py | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 5a0646f8..9d9a90ca 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -187,6 +187,7 @@ def makegds(file): print('gds readonly true', file=ofile) print('gds rescale false', file=ofile) print('gds read ../gds/' + project, file=ofile) + print('load ' + project, file=ofile) print('select top cell', file=ofile) print('expand', file=ofile) if not distmode: From 60f4b17dccfa7c9b352e3bb9b5a14d64a1b0fd9e Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 19:54:30 +0000 Subject: [PATCH 019/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index e11ff1a5..be1adde3 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py +c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From 436066bafc925ba4f4d17bdff000682fcefdd32f Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 23:25:59 -0700 Subject: [PATCH 020/138] remove -keep --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 1a48ec3e..ae7181db 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 1e6dc8992b169b309f10c7ee1fa50617cec78d6e Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 00:21:17 +0000 Subject: [PATCH 021/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index 96d619cf..d22992e7 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py -9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py +50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From f3cd9e09eb8502ef3fe56472c3a9bfc39723fb15 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:30:10 -0700 Subject: [PATCH 022/138] rename top to caravel --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index d7b7964e..1ad411e6 100644 --- a/Makefile +++ b/Makefile @@ -229,6 +229,7 @@ __openframe: expand; \ cif *hier write disable; \ cif *array write disable; \ + save caravel; \ gds write $(UPRJ_ROOT)/gds/caravel.gds; \ quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl ### Runs from CARAVEL_ROOT From 6d06bd9fa46cfb53c85fb4301fe40bfb71dd408f Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:25:22 -0700 Subject: [PATCH 023/138] change bbox for gen fill --- Makefile | 4 ++-- scripts/generate_fill.py | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index 1ad411e6..8ee1240e 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 964a6a87..098a590a 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -192,7 +192,8 @@ def makegds(file): if not distmode: print('cif ostyle wafflefill(tiled)', file=ofile) print('', file=ofile) - print('set fullbox [box values]', file=ofile) + # print('set fullbox [box values]', file=ofile) + print('set fullbox { 0 0 3588um 5188um }', file=ofile) print('set xmax [lindex $fullbox 2]', file=ofile) print('set xmin [lindex $fullbox 0]', file=ofile) print('set fullwidth [expr {$xmax - $xmin}]', file=ofile) From f3250ea8eebfe3e0ceeb56574f5639b100d7f65e Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:28:54 -0700 Subject: [PATCH 024/138] change bbox for gen fill --- scripts/generate_fill.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 098a590a..5a0646f8 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -193,7 +193,7 @@ def makegds(file): print('cif ostyle wafflefill(tiled)', file=ofile) print('', file=ofile) # print('set fullbox [box values]', file=ofile) - print('set fullbox { 0 0 3588um 5188um }', file=ofile) + print('set fullbox { 0 0 717600 1037600 }', file=ofile) print('set xmax [lindex $fullbox 2]', file=ofile) print('set xmin [lindex $fullbox 0]', file=ofile) print('set fullwidth [expr {$xmax - $xmin}]', file=ofile) From 485ecd03e691fb075bfc31709a337703a4713dcc Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:37:32 -0700 Subject: [PATCH 025/138] change bbox for gen fill --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 8ee1240e..1ad411e6 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From 8b7f4a42988d239901fb8f4b9f23137d4759de99 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 09:48:04 -0700 Subject: [PATCH 026/138] remove -keep for gen fill --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 1ad411e6..2d5607bb 100644 --- a/Makefile +++ b/Makefile @@ -1148,7 +1148,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 63c229190bcd8e00f2eb1209b0bd9cfedd5ff548 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 14:58:47 +0000 Subject: [PATCH 027/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index d22992e7..e11ff1a5 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From 6a67c25d122fb2560443bb162c1689427e1fb167 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 10:37:10 -0700 Subject: [PATCH 028/138] add -keep --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 2d5607bb..1a48ec3e 100644 --- a/Makefile +++ b/Makefile @@ -1148,7 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 547e09de776efe632754e8bfedfe57694699969a Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 12:40:54 -0700 Subject: [PATCH 029/138] correct load issue with gen fill --- scripts/generate_fill.py | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 5a0646f8..9d9a90ca 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -187,6 +187,7 @@ def makegds(file): print('gds readonly true', file=ofile) print('gds rescale false', file=ofile) print('gds read ../gds/' + project, file=ofile) + print('load ' + project, file=ofile) print('select top cell', file=ofile) print('expand', file=ofile) if not distmode: From 7a66e0910d36b3e73ee4a32b416275bc9e011e47 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 23:25:59 -0700 Subject: [PATCH 030/138] remove -keep --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 1a48ec3e..ae7181db 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 34cdf348d514a31de9d45171e132286fc4ca9b60 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 19:54:30 +0000 Subject: [PATCH 031/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index e11ff1a5..be1adde3 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py +c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From f7202896d2c29d28b9c763026c47d2075513b13d Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:25:05 -0700 Subject: [PATCH 032/138] Makefile add openframe target --- Makefile | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/Makefile b/Makefile index 03c90d20..84d3b5a3 100644 --- a/Makefile +++ b/Makefile @@ -194,6 +194,47 @@ __truck: @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_truck.out ### @rm $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl +.PHONY: ship +openframe: check-env uncompress uncompress-caravel +ifeq ($(FOREGROUND),1) + @echo "Running make openframe in the foreground..." + $(MAKE) -f $(CARAVEL_ROOT)/Makefile __openframe + @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out +else + @echo "Running make openframe in the background..." + nohup $(MAKE) -f $(CARAVEL_ROOT)/Makefile __ship >/dev/null 2>&1 & + tail -f signoff/build/make_openframe.out + @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out +endif + +__openframe: + @echo "###############################################" + @echo "Generating Caravel GDS (sources are in the 'gds' directory)" + @sleep 1 +#### Runs from the CARAVEL_ROOT mag directory + @echo "\ + drc off; \ + crashbackups stop; \ + addpath hexdigits; \ + addpath $(UPRJ_ROOT)/mag; \ + load openframe_project_wrapper; \ + property LEFview true; \ + property GDS_FILE $(UPRJ_ROOT)/gds/openframe_project_wrapper.gds; \ + property GDS_START 0; \ + load $(CARAVEL_ROOT)/maglef/simple_por; \ + load caravel -dereference; \ + select top cell; \ + expand; \ + cif *hier write disable; \ + cif *array write disable; \ + gds write $(UPRJ_ROOT)/gds/caravel.gds; \ + quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl +### Runs from CARAVEL_ROOT + @mkdir -p ./signoff/build + #@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out + @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out +### @rm $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl + .PHONY: clean clean: cd $(CARAVEL_ROOT)/verilog/dv/caravel/mgmt_soc/ && \ From d2e5396e4290d1c03367e9c6c2b393dd1465f509 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:29:04 -0700 Subject: [PATCH 033/138] Makefile add openframe target --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 84d3b5a3..02a750a5 100644 --- a/Makefile +++ b/Makefile @@ -194,7 +194,7 @@ __truck: @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_truck.out ### @rm $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl -.PHONY: ship +.PHONY: openframe openframe: check-env uncompress uncompress-caravel ifeq ($(FOREGROUND),1) @echo "Running make openframe in the foreground..." @@ -202,7 +202,7 @@ ifeq ($(FOREGROUND),1) @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out else @echo "Running make openframe in the background..." - nohup $(MAKE) -f $(CARAVEL_ROOT)/Makefile __ship >/dev/null 2>&1 & + nohup $(MAKE) -f $(CARAVEL_ROOT)/Makefile __openframe >/dev/null 2>&1 & tail -f signoff/build/make_openframe.out @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out endif From 8fcb1bcc1d5e60709e83eb0a34e150108db95fd9 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:31:14 -0700 Subject: [PATCH 034/138] Makefile add openframe target --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 02a750a5..20472cf0 100644 --- a/Makefile +++ b/Makefile @@ -222,7 +222,7 @@ __openframe: property GDS_FILE $(UPRJ_ROOT)/gds/openframe_project_wrapper.gds; \ property GDS_START 0; \ load $(CARAVEL_ROOT)/maglef/simple_por; \ - load caravel -dereference; \ + load caravel_openframe -dereference; \ select top cell; \ expand; \ cif *hier write disable; \ From 91317e6de13be0ef9581d395df7aac061f02bc04 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:45:03 -0700 Subject: [PATCH 035/138] disable dist for fill gen --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 20472cf0..8076e835 100644 --- a/Makefile +++ b/Makefile @@ -1145,8 +1145,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From 950d74d4ee4175264e8509c626b099061813fed9 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 15:32:29 -0700 Subject: [PATCH 036/138] change .magicrc to use from pdk --- Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index 8076e835..1efb3bb5 100644 --- a/Makefile +++ b/Makefile @@ -231,8 +231,8 @@ __openframe: quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl ### Runs from CARAVEL_ROOT @mkdir -p ./signoff/build - #@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out - @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out + @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out + #@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out ### @rm $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl .PHONY: clean @@ -1145,8 +1145,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From b022bdf8b951f5b47972d45be39eb6c6855f8822 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 16:58:08 -0700 Subject: [PATCH 037/138] change .magicrc to use from pdk --- scripts/compositor.py | 6 +++--- scripts/generate_fill.py | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/scripts/compositor.py b/scripts/compositor.py index 999038f7..df05b215 100755 --- a/scripts/compositor.py +++ b/scripts/compositor.py @@ -147,9 +147,9 @@ def usage(): keepmode = True magpath = mag_dir_path - rcfile = magpath + '/.magicrc' - # pdk_root = os.getenv("PDK_ROOT") - # rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' + # rcfile = magpath + '/.magicrc' + pdk_root = os.getenv("PDK_ROOT") + rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' gdspath = gds_dir_path diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 2b0db8ef..964a6a87 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -153,9 +153,9 @@ def makegds(file): distmode = True magpath = user_project_path + '/mag' - rcfile = magpath + '/.magicrc' - # pdk_root = os.getenv("PDK_ROOT") - # rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' + # rcfile = magpath + '/.magicrc' + pdk_root = os.getenv("PDK_ROOT") + rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' if not os.path.isfile(rcfile): rcfile = None From e64f948e7d07677241ae5921a87bd366a83ec2c8 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:08:10 -0700 Subject: [PATCH 038/138] add user_id back --- Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Makefile b/Makefile index 1efb3bb5..7b678c9a 100644 --- a/Makefile +++ b/Makefile @@ -221,6 +221,8 @@ __openframe: property LEFview true; \ property GDS_FILE $(UPRJ_ROOT)/gds/openframe_project_wrapper.gds; \ property GDS_START 0; \ + load $(UPRJ_ROOT)/mag/user_id_programming; \ + load $(UPRJ_ROOT)/mag/user_id_textblock; \ load $(CARAVEL_ROOT)/maglef/simple_por; \ load caravel_openframe -dereference; \ select top cell; \ From 8c9b8c231e3751a6aa08d153dcba850a6f1398eb Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:25:50 -0700 Subject: [PATCH 039/138] add user_id back --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 7b678c9a..d7b7964e 100644 --- a/Makefile +++ b/Makefile @@ -1147,7 +1147,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 45f92fd7f3b457557714e01fb627754ea64e8ecf Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 00:21:17 +0000 Subject: [PATCH 040/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index 96d619cf..d22992e7 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py -9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py +50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From 43d3652d55d0faeb47bb7b3e01d2814c68145df0 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:30:10 -0700 Subject: [PATCH 041/138] rename top to caravel --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index d7b7964e..1ad411e6 100644 --- a/Makefile +++ b/Makefile @@ -229,6 +229,7 @@ __openframe: expand; \ cif *hier write disable; \ cif *array write disable; \ + save caravel; \ gds write $(UPRJ_ROOT)/gds/caravel.gds; \ quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl ### Runs from CARAVEL_ROOT From 52b946ac90620502e9cfdb9de6c7190e9387c933 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:25:22 -0700 Subject: [PATCH 042/138] change bbox for gen fill --- Makefile | 4 ++-- scripts/generate_fill.py | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index 1ad411e6..8ee1240e 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 964a6a87..098a590a 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -192,7 +192,8 @@ def makegds(file): if not distmode: print('cif ostyle wafflefill(tiled)', file=ofile) print('', file=ofile) - print('set fullbox [box values]', file=ofile) + # print('set fullbox [box values]', file=ofile) + print('set fullbox { 0 0 3588um 5188um }', file=ofile) print('set xmax [lindex $fullbox 2]', file=ofile) print('set xmin [lindex $fullbox 0]', file=ofile) print('set fullwidth [expr {$xmax - $xmin}]', file=ofile) From f6acdbaa64cae510a4925778b657505adbb16d81 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:28:54 -0700 Subject: [PATCH 043/138] change bbox for gen fill --- scripts/generate_fill.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 098a590a..5a0646f8 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -193,7 +193,7 @@ def makegds(file): print('cif ostyle wafflefill(tiled)', file=ofile) print('', file=ofile) # print('set fullbox [box values]', file=ofile) - print('set fullbox { 0 0 3588um 5188um }', file=ofile) + print('set fullbox { 0 0 717600 1037600 }', file=ofile) print('set xmax [lindex $fullbox 2]', file=ofile) print('set xmin [lindex $fullbox 0]', file=ofile) print('set fullwidth [expr {$xmax - $xmin}]', file=ofile) From c95ac23ba29d3623d8eb2d7cf99908a4e3d71b0a Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:37:32 -0700 Subject: [PATCH 044/138] change bbox for gen fill --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 8ee1240e..1ad411e6 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From 195a607f93035fa14713669d0d8b1e3fc74b59b1 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 09:48:04 -0700 Subject: [PATCH 045/138] remove -keep for gen fill --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 1ad411e6..2d5607bb 100644 --- a/Makefile +++ b/Makefile @@ -1148,7 +1148,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 774d22c93ac89ad19ce79f13e5109718a0cc1bbf Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 14:58:47 +0000 Subject: [PATCH 046/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index d22992e7..e11ff1a5 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From 310183148bf013ee75d7e639e408d3fca4758966 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 10:37:10 -0700 Subject: [PATCH 047/138] add -keep --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 2d5607bb..1a48ec3e 100644 --- a/Makefile +++ b/Makefile @@ -1148,7 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From a98115f9d9a76cbaa1ec3e95de970416e59a002c Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 12:40:54 -0700 Subject: [PATCH 048/138] correct load issue with gen fill --- scripts/generate_fill.py | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 5a0646f8..9d9a90ca 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -187,6 +187,7 @@ def makegds(file): print('gds readonly true', file=ofile) print('gds rescale false', file=ofile) print('gds read ../gds/' + project, file=ofile) + print('load ' + project, file=ofile) print('select top cell', file=ofile) print('expand', file=ofile) if not distmode: From 8678cd0b9bc32130fa0e983156bc9ee7925f5d1c Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 23:25:59 -0700 Subject: [PATCH 049/138] remove -keep --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 1a48ec3e..ae7181db 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 441c0b71d7ad2a8a260fd90e856df09d1566acc5 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 19:54:30 +0000 Subject: [PATCH 050/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index e11ff1a5..be1adde3 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py +c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From 5dad9098876b8874ccbdf183b6a78fc5029b29c1 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 00:21:17 +0000 Subject: [PATCH 051/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index be1adde3..96d619cf 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py -844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py +98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py +9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py From 52ada8c3bc1648203087b55655e92a2428d0ffc1 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:25:22 -0700 Subject: [PATCH 052/138] change bbox for gen fill --- Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Makefile b/Makefile index ae7181db..1ad411e6 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 6b41297db70b1797d0053de7c25eb86468ddfce5 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 09:48:04 -0700 Subject: [PATCH 053/138] remove -keep for gen fill --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 1ad411e6..2d5607bb 100644 --- a/Makefile +++ b/Makefile @@ -1148,7 +1148,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From b971154e68afe8932c9d635b7d85b615f512b3db Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 14:58:47 +0000 Subject: [PATCH 054/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index 96d619cf..d22992e7 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py -9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py +50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From 0d8fa516379d004ecf5a3fa0fd6a80a45e586388 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 10:37:10 -0700 Subject: [PATCH 055/138] add -keep --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 2d5607bb..1a48ec3e 100644 --- a/Makefile +++ b/Makefile @@ -1148,7 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 1d61ee627195b88a7fbdc0fc57a739aa20e797da Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 23:25:59 -0700 Subject: [PATCH 056/138] remove -keep --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 1a48ec3e..ae7181db 100644 --- a/Makefile +++ b/Makefile @@ -1148,8 +1148,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 4543161cfe1bb95b594b56ad02cbd542fc4a2eab Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 19:54:30 +0000 Subject: [PATCH 057/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index d22992e7..e11ff1a5 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From ec9242ff7be15a9acb1d36feb667d83cd01c0f85 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Fri, 9 Jun 2023 17:20:02 +0000 Subject: [PATCH 058/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index 96d619cf..be1adde3 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py -9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py +c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py +844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From 082e52c41d9370413c09ec5ac372dc2aa9381f00 Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Mon, 12 Jun 2023 09:28:56 -0700 Subject: [PATCH 059/138] Fix power guards --- verilog/rtl/chip_io.v | 2 ++ verilog/rtl/pads.v | 4 ++-- verilog/rtl/simple_por.v | 15 +++++++++++---- 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/verilog/rtl/chip_io.v b/verilog/rtl/chip_io.v index a9626868..34b4c3e8 100644 --- a/verilog/rtl/chip_io.v +++ b/verilog/rtl/chip_io.v @@ -276,8 +276,10 @@ module chip_io( wire [6:0] vssd_const_zero; // Constant value for management pins constant_block constant_value_inst [6:0] ( + `ifdef USE_POWER_PINS .vccd(vccd), .vssd(vssd), + `endif // USE_POWER_PINS .one(vccd_const_one), .zero(vssd_const_zero) ); diff --git a/verilog/rtl/pads.v b/verilog/rtl/pads.v index 623fc818..aad49243 100644 --- a/verilog/rtl/pads.v +++ b/verilog/rtl/pads.v @@ -45,7 +45,7 @@ `define MGMT_ABUTMENT_PINS \ .AMUXBUS_A(analog_a),\ - .AMUXBUS_B(analog_b),\ + .AMUXBUS_B(analog_b), `ifdef USE_POWER_PINS \ .VSSA(vssa),\ .VDDA(vdda),\ .VSWITCH(vddio),\ @@ -55,7 +55,7 @@ .VCCD(vccd),\ .VSSIO(vssio),\ .VSSD(vssd),\ - .VSSIO_Q(vssio_q), + .VSSIO_Q(vssio_q), `endif `else `define USER1_ABUTMENT_PINS `define USER2_ABUTMENT_PINS diff --git a/verilog/rtl/simple_por.v b/verilog/rtl/simple_por.v index 0521c656..67f12b36 100644 --- a/verilog/rtl/simple_por.v +++ b/verilog/rtl/simple_por.v @@ -44,12 +44,19 @@ module simple_por( // down. Note that this is sped way up for verilog simulation; the // actual circuit is set to a 15ms delay. - always @(posedge vdd3v3) begin + `ifdef USE_POWER_PINS + always @(posedge vdd3v3) begin + `else + initial begin + `endif #500 inode <= 1'b1; end - always @(negedge vdd3v3) begin - #500 inode <= 1'b0; - end + + `ifdef USE_POWER_PINS + always @(negedge vdd3v3) begin + #500 inode <= 1'b0; + end + `endif // Instantiate two shmitt trigger buffers in series From cd9fbc8aadcfca66307d06502e3eba4d27acc55e Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Mon, 12 Jun 2023 16:43:17 +0000 Subject: [PATCH 060/138] Apply automatic changes to Manifest and README.rst --- manifest | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/manifest b/manifest index 96d619cf..e86384de 100644 --- a/manifest +++ b/manifest @@ -20,7 +20,7 @@ fa26aa34b4b382aacad9b7ac07a36b17172a401f verilog/rtl/caravel.v 1bbaa93405d4cb51429eacea4da40014231b11ed verilog/rtl/caravel_motto.v ae07f0d87e69f4dd2026ed841e3a962facac847b verilog/rtl/caravel_openframe.v d97cb60c8d125d6098111d4f0aa00410515770eb verilog/rtl/caravel_power_routing.v -bc1e961e41d1d3a383a018279a08bf4108911f53 verilog/rtl/chip_io.v +66cd4cc70097aa0a0666d0105712affa140a3977 verilog/rtl/chip_io.v f2242e1f295ee5efeacea51698f706a2cfd97c28 verilog/rtl/chip_io_alt.v 09740344da1a9bb76438165247c49b4795b94b9b verilog/rtl/chip_io_openframe.v 126aff02aa229dc346301c552d785dec76a4d68e verilog/rtl/clock_div.v @@ -48,9 +48,9 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v 3baffde4788f01e2ff0e5cd83020a76bd63ef7d7 verilog/rtl/mprj_logic_high.v 5287821a0ed1994850a978ef0cd024fac51fb6e8 verilog/rtl/open_source.v 33c8fc54298e5425875aaab8c139074ec7d0e9e9 verilog/rtl/openframe_netlists.v -4edbfd0ad80b69a799a399ffc717b560fcae615b verilog/rtl/pads.v +51f7c21d36076958a145a1ff8f4947b147e54fd4 verilog/rtl/pads.v 669d16642d5dd5f6824812754db20db98c9fe17b verilog/rtl/ring_osc2x13.v -739ca5ed63a513d2e4c9bf3ecfad32d9fa527518 verilog/rtl/simple_por.v +83937790b8f5dbcdd7e9a804b5e9bdf475c0ab7d verilog/rtl/simple_por.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py From 7414a481877f10c8303623f013de00b97c4cb9cc Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Tue, 13 Jun 2023 00:09:17 -0700 Subject: [PATCH 061/138] Fix power guards for caravan and openframe --- verilog/rtl/chip_io_alt.v | 2 ++ verilog/rtl/chip_io_openframe.v | 12 ++++++++---- verilog/rtl/pads.v | 8 ++++---- 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/verilog/rtl/chip_io_alt.v b/verilog/rtl/chip_io_alt.v index dde702f4..ff58ff21 100644 --- a/verilog/rtl/chip_io_alt.v +++ b/verilog/rtl/chip_io_alt.v @@ -345,8 +345,10 @@ module chip_io_alt #( wire [6:0] vssd_const_zero; // Constant value for management pins constant_block constant_value_inst [6:0] ( + `ifdef USE_POWER_PINS .vccd(vccd), .vssd(vssd), + `endif // USE_POWER_PINS .one(vccd_const_one), .zero(vssd_const_zero) ); diff --git a/verilog/rtl/chip_io_openframe.v b/verilog/rtl/chip_io_openframe.v index 9b5b5a3b..b689a114 100644 --- a/verilog/rtl/chip_io_openframe.v +++ b/verilog/rtl/chip_io_openframe.v @@ -262,8 +262,10 @@ module chip_io_openframe #( // These are exported to the user project for direct loopback if needed. constant_block constant_value_inst [`OPENFRAME_IO_PADS-1:0] ( - .vccd(vccd), - .vssd(vssd), + `ifdef USE_POWER_PINS + .vccd(vccd), + .vssd(vssd), + `endif // USE_POWER_PINS .one(gpio_loopback_one), .zero(gpio_loopback_zero) ); @@ -275,8 +277,10 @@ module chip_io_openframe #( wire xres_loopback_zero; constant_block constant_value_xres_inst ( - .vccd(vccd), - .vssd(vssd), + `ifdef USE_POWER_PINS + .vccd(vccd), + .vssd(vssd), + `endif // USE_POWER_PINS .one(xres_loopback_one), .zero(xres_loopback_zero) // (unused) ); diff --git a/verilog/rtl/pads.v b/verilog/rtl/pads.v index aad49243..a7f813ea 100644 --- a/verilog/rtl/pads.v +++ b/verilog/rtl/pads.v @@ -17,7 +17,7 @@ `ifndef TOP_ROUTING `define USER1_ABUTMENT_PINS \ .AMUXBUS_A(analog_a),\ - .AMUXBUS_B(analog_b),\ + .AMUXBUS_B(analog_b),`ifdef USE_POWER_PINS\ .VSSA(vssa1),\ .VDDA(vdda1),\ .VSWITCH(vddio),\ @@ -27,11 +27,11 @@ .VCCD(vccd),\ .VSSIO(vssio),\ .VSSD(vssd),\ - .VSSIO_Q(vssio_q), + .VSSIO_Q(vssio_q),`endif `define USER2_ABUTMENT_PINS \ .AMUXBUS_A(analog_a),\ - .AMUXBUS_B(analog_b),\ + .AMUXBUS_B(analog_b),`ifdef USE_POWER_PINS\ .VSSA(vssa2),\ .VDDA(vdda2),\ .VSWITCH(vddio),\ @@ -41,7 +41,7 @@ .VCCD(vccd),\ .VSSIO(vssio),\ .VSSD(vssd),\ - .VSSIO_Q(vssio_q), + .VSSIO_Q(vssio_q),`endif `define MGMT_ABUTMENT_PINS \ .AMUXBUS_A(analog_a),\ From e90895bca60888505cd671654a05d8c296728563 Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Tue, 13 Jun 2023 00:11:33 -0700 Subject: [PATCH 062/138] fix indentation --- verilog/rtl/chip_io.v | 4 ++-- verilog/rtl/chip_io_alt.v | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/verilog/rtl/chip_io.v b/verilog/rtl/chip_io.v index 34b4c3e8..f5f80649 100644 --- a/verilog/rtl/chip_io.v +++ b/verilog/rtl/chip_io.v @@ -277,8 +277,8 @@ module chip_io( constant_block constant_value_inst [6:0] ( `ifdef USE_POWER_PINS - .vccd(vccd), - .vssd(vssd), + .vccd(vccd), + .vssd(vssd), `endif // USE_POWER_PINS .one(vccd_const_one), .zero(vssd_const_zero) diff --git a/verilog/rtl/chip_io_alt.v b/verilog/rtl/chip_io_alt.v index ff58ff21..18350b2b 100644 --- a/verilog/rtl/chip_io_alt.v +++ b/verilog/rtl/chip_io_alt.v @@ -346,11 +346,11 @@ module chip_io_alt #( constant_block constant_value_inst [6:0] ( `ifdef USE_POWER_PINS - .vccd(vccd), - .vssd(vssd), + .vccd(vccd), + .vssd(vssd), `endif // USE_POWER_PINS - .one(vccd_const_one), - .zero(vssd_const_zero) + .one(vccd_const_one), + .zero(vssd_const_zero) ); // Management clock input pad From 5e12ca04ba7cd042a7b10fe56b5b22da86f3d6d2 Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Tue, 13 Jun 2023 07:24:45 +0000 Subject: [PATCH 063/138] Apply automatic changes to Manifest and README.rst --- manifest | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/manifest b/manifest index e86384de..3095103d 100644 --- a/manifest +++ b/manifest @@ -20,9 +20,9 @@ fa26aa34b4b382aacad9b7ac07a36b17172a401f verilog/rtl/caravel.v 1bbaa93405d4cb51429eacea4da40014231b11ed verilog/rtl/caravel_motto.v ae07f0d87e69f4dd2026ed841e3a962facac847b verilog/rtl/caravel_openframe.v d97cb60c8d125d6098111d4f0aa00410515770eb verilog/rtl/caravel_power_routing.v -66cd4cc70097aa0a0666d0105712affa140a3977 verilog/rtl/chip_io.v -f2242e1f295ee5efeacea51698f706a2cfd97c28 verilog/rtl/chip_io_alt.v -09740344da1a9bb76438165247c49b4795b94b9b verilog/rtl/chip_io_openframe.v +e54c181033aa019f0edcaed5ffc71e54c3888970 verilog/rtl/chip_io.v +1088531d6a69d82b976d4aca7ae923423680a715 verilog/rtl/chip_io_alt.v +e293e138c6e6f5df76db78bdaa34a35003f6ba5f verilog/rtl/chip_io_openframe.v 126aff02aa229dc346301c552d785dec76a4d68e verilog/rtl/clock_div.v 941bd7636e7558b045faa3d8c6ba2d91b4c4b798 verilog/rtl/constant_block.v 58fd210a64e502fb231d843eada4052f923d788d verilog/rtl/copyright_block.v @@ -48,7 +48,7 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v 3baffde4788f01e2ff0e5cd83020a76bd63ef7d7 verilog/rtl/mprj_logic_high.v 5287821a0ed1994850a978ef0cd024fac51fb6e8 verilog/rtl/open_source.v 33c8fc54298e5425875aaab8c139074ec7d0e9e9 verilog/rtl/openframe_netlists.v -51f7c21d36076958a145a1ff8f4947b147e54fd4 verilog/rtl/pads.v +b53c154e6acaf44e858c936c8027d0229608676e verilog/rtl/pads.v 669d16642d5dd5f6824812754db20db98c9fe17b verilog/rtl/ring_osc2x13.v 83937790b8f5dbcdd7e9a804b5e9bdf475c0ab7d verilog/rtl/simple_por.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v From 58a568c4fe95ae3d437a7552778f272c62a765df Mon Sep 17 00:00:00 2001 From: M0stafaRady <107422726+M0stafaRady@users.noreply.github.com> Date: Wed, 23 Aug 2023 11:35:05 +0300 Subject: [PATCH 064/138] remove duplicate declaration from caravan_core.v --- verilog/rtl/caravan_core.v | 50 +++++++++++++++++++------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/verilog/rtl/caravan_core.v b/verilog/rtl/caravan_core.v index c3a2714d..6dc303f6 100644 --- a/verilog/rtl/caravan_core.v +++ b/verilog/rtl/caravan_core.v @@ -180,28 +180,28 @@ module caravan_core ( */ // One-bit GPIO dedicated to management SoC (outside of user control) - wire gpio_out_core; - wire gpio_in_core; - wire gpio_mode0_core; - wire gpio_mode1_core; - wire gpio_outenb_core; - wire gpio_inenb_core; + // wire gpio_out_core; + // wire gpio_in_core; + // wire gpio_mode0_core; + // wire gpio_mode1_core; + // wire gpio_outenb_core; + // wire gpio_inenb_core; // 27 GPIO pads with full controls - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_inp_dis; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_oeb; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_ib_mode_sel; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_vtrip_sel; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_slow_sel; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_holdover; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_en; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_sel; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_pol; - wire [(`MPRJ_IO_PADS-`ANALOG_PADS)*3-1:0] mprj_io_dm; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_in; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_in_3v3; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_out; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_one; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_inp_dis; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_oeb; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_ib_mode_sel; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_vtrip_sel; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_slow_sel; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_holdover; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_en; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_sel; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_analog_pol; + // wire [(`MPRJ_IO_PADS-`ANALOG_PADS)*3-1:0] mprj_io_dm; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_in; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_in_3v3; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_out; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] mprj_io_one; wire [7:0] mprj_io_zero; // User Project Control (user-facing) @@ -212,15 +212,15 @@ module caravan_core ( wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] user_io_in_3v3; // 18 direct connections to GPIO for low-frequency, low-voltage analog - wire [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_analog; - wire [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_noesd; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_analog; + // wire [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] user_gpio_noesd; // 3 power supply ESD clamps for user applications - wire [2:0] user_clamp_high; - wire [2:0] user_clamp_low; + // wire [2:0] user_clamp_high; + // wire [2:0] user_clamp_low; // 11 core connections to the analog pads - wire [`ANALOG_PADS-1:0] user_analog; + // wire [`ANALOG_PADS-1:0] user_analog; /* Padframe control signals */ wire [`MPRJ_IO_PADS_1-`ANALOG_PADS_1-1:0] gpio_serial_link_1; From acda91ac91c9a58d52bb53be39e2fe765b226198 Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Wed, 23 Aug 2023 08:51:02 +0000 Subject: [PATCH 065/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index d8669400..fafdee99 100644 --- a/manifest +++ b/manifest @@ -7,7 +7,7 @@ cc82a78753f5f5d0a1519bd81adbcff8a4296d91 verilog/rtl/__user_project_wrapper.v 3c8c04f53b2848dc46132cda82c614e06e56571b verilog/rtl/buff_flash_clkrst.v 14064261ec18d633a5d72b45b2347c388f2f446f verilog/rtl/caravan.v -502219ed86a5c1707bd0cf636f3b61de78f159d8 verilog/rtl/caravan_core.v +864365067a3fbb8fe3354d94d94c7b8469999850 verilog/rtl/caravan_core.v e68fd2e085679d0f61040115fdd1d50651705d3a verilog/rtl/caravan_logo.v d265ea6bf861e3f5c1b1b984ae057dbaed995008 verilog/rtl/caravan_motto.v baf7cf0e8a8a712621aed75aff98198a663db43b verilog/rtl/caravan_netlists.v From 4a84427ec8ca99f79580bf89b5f3ed0de8716fa7 Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Tue, 29 Aug 2023 20:54:36 -0400 Subject: [PATCH 066/138] Modified the verilog/rtl/openframe_netlists.v. This file indicates which verilog files to include for openframe simulations. Noted that there were references in the file to GL versions of user_id_programming.v, chip_io_openframe.v, and caravel_openframe.v. All three of these are already structural verilog and do not have versions in the gl/ directory. --- verilog/rtl/openframe_netlists.v | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/verilog/rtl/openframe_netlists.v b/verilog/rtl/openframe_netlists.v index 95247d5e..3752d0d4 100644 --- a/verilog/rtl/openframe_netlists.v +++ b/verilog/rtl/openframe_netlists.v @@ -45,11 +45,11 @@ `endif `ifdef GL - `include "gl/user_id_programming.v" - `include "gl/chip_io_openframe.v" + `include "user_id_programming.v" + `include "chip_io_openframe.v" `include "gl/constant_block.v" `include "gl/xres_buf.v" - `include "gl/caravel_openframe.v" + `include "caravel_openframe.v" `else `include "user_id_programming.v" `include "chip_io_openframe.v" From 1dcb74d5bb148332654e60ad8ce86af0c4bdfc6b Mon Sep 17 00:00:00 2001 From: RTimothyEdwards Date: Wed, 30 Aug 2023 01:10:29 +0000 Subject: [PATCH 067/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index d8669400..b9182af3 100644 --- a/manifest +++ b/manifest @@ -47,7 +47,7 @@ c96ba94e5779ea6afe452d89632eaada73e26aab verilog/rtl/mprj_io.v e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v 3baffde4788f01e2ff0e5cd83020a76bd63ef7d7 verilog/rtl/mprj_logic_high.v 5287821a0ed1994850a978ef0cd024fac51fb6e8 verilog/rtl/open_source.v -33c8fc54298e5425875aaab8c139074ec7d0e9e9 verilog/rtl/openframe_netlists.v +189532aff9e5e2ebbd99befd05cbf50e948b14af verilog/rtl/openframe_netlists.v 4edbfd0ad80b69a799a399ffc717b560fcae615b verilog/rtl/pads.v 669d16642d5dd5f6824812754db20db98c9fe17b verilog/rtl/ring_osc2x13.v 739ca5ed63a513d2e4c9bf3ecfad32d9fa527518 verilog/rtl/simple_por.v From a1eb03bd33af181a1e76c854a1cf9226afbd35e7 Mon Sep 17 00:00:00 2001 From: Jeff DiCorpo <42048757+jeffdi@users.noreply.github.com> Date: Wed, 6 Sep 2023 09:31:29 -0700 Subject: [PATCH 068/138] Update tag to mpw-9e --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 5f25b862..e83e78dd 100644 --- a/Makefile +++ b/Makefile @@ -50,7 +50,7 @@ LARGE_FILES_GZ_SPLIT += $(addsuffix .00.split, $(ARCHIVES)) MCW_ROOT?=$(PWD)/mgmt_core_wrapper MCW ?=LITEX_VEXRISCV -MPW_TAG ?= mpw-9c +MPW_TAG ?= mpw-9e PYTHON_BIN ?= python3 From 11533adefec98b1159704e24d18d95d196d8c983 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:25:05 -0700 Subject: [PATCH 069/138] Makefile add openframe target --- Makefile | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/Makefile b/Makefile index e83e78dd..b76f38c9 100644 --- a/Makefile +++ b/Makefile @@ -200,6 +200,47 @@ __truck: @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_truck.out ### @rm $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl +.PHONY: ship +openframe: check-env uncompress uncompress-caravel +ifeq ($(FOREGROUND),1) + @echo "Running make openframe in the foreground..." + $(MAKE) -f $(CARAVEL_ROOT)/Makefile __openframe + @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out +else + @echo "Running make openframe in the background..." + nohup $(MAKE) -f $(CARAVEL_ROOT)/Makefile __ship >/dev/null 2>&1 & + tail -f signoff/build/make_openframe.out + @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out +endif + +__openframe: + @echo "###############################################" + @echo "Generating Caravel GDS (sources are in the 'gds' directory)" + @sleep 1 +#### Runs from the CARAVEL_ROOT mag directory + @echo "\ + drc off; \ + crashbackups stop; \ + addpath hexdigits; \ + addpath $(UPRJ_ROOT)/mag; \ + load openframe_project_wrapper; \ + property LEFview true; \ + property GDS_FILE $(UPRJ_ROOT)/gds/openframe_project_wrapper.gds; \ + property GDS_START 0; \ + load $(CARAVEL_ROOT)/maglef/simple_por; \ + load caravel -dereference; \ + select top cell; \ + expand; \ + cif *hier write disable; \ + cif *array write disable; \ + gds write $(UPRJ_ROOT)/gds/caravel.gds; \ + quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl +### Runs from CARAVEL_ROOT + @mkdir -p ./signoff/build + #@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out + @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out +### @rm $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl + .PHONY: clean clean: cd $(CARAVEL_ROOT)/verilog/dv/caravel/mgmt_soc/ && \ From ae229a537f09553f704b2cc9532a29188e43b2e6 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:29:04 -0700 Subject: [PATCH 070/138] Makefile add openframe target --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index b76f38c9..b0309f88 100644 --- a/Makefile +++ b/Makefile @@ -200,7 +200,7 @@ __truck: @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_truck.out ### @rm $(UPRJ_ROOT)/mag/mag2gds_caravan.tcl -.PHONY: ship +.PHONY: openframe openframe: check-env uncompress uncompress-caravel ifeq ($(FOREGROUND),1) @echo "Running make openframe in the foreground..." @@ -208,7 +208,7 @@ ifeq ($(FOREGROUND),1) @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out else @echo "Running make openframe in the background..." - nohup $(MAKE) -f $(CARAVEL_ROOT)/Makefile __ship >/dev/null 2>&1 & + nohup $(MAKE) -f $(CARAVEL_ROOT)/Makefile __openframe >/dev/null 2>&1 & tail -f signoff/build/make_openframe.out @echo "Make openframe completed." 2>&1 | tee -a ./signoff/build/make_openframe.out endif From 6de354519ae564bfec8ecc2c07f247a8f97d9c8e Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:31:14 -0700 Subject: [PATCH 071/138] Makefile add openframe target --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index b0309f88..bdf27825 100644 --- a/Makefile +++ b/Makefile @@ -228,7 +228,7 @@ __openframe: property GDS_FILE $(UPRJ_ROOT)/gds/openframe_project_wrapper.gds; \ property GDS_START 0; \ load $(CARAVEL_ROOT)/maglef/simple_por; \ - load caravel -dereference; \ + load caravel_openframe -dereference; \ select top cell; \ expand; \ cif *hier write disable; \ From 1e07b854684547bf87fe895f9510b5b5413c4334 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:45:03 -0700 Subject: [PATCH 072/138] disable dist for fill gen --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index bdf27825..ab29c649 100644 --- a/Makefile +++ b/Makefile @@ -1151,8 +1151,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From e52732df01ab29afccfe5cb7c267a67a5e4203de Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 15:32:29 -0700 Subject: [PATCH 073/138] change .magicrc to use from pdk --- Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index ab29c649..060af0a0 100644 --- a/Makefile +++ b/Makefile @@ -237,8 +237,8 @@ __openframe: quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl ### Runs from CARAVEL_ROOT @mkdir -p ./signoff/build - #@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out - @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out + @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out + #@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out ### @rm $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl .PHONY: clean @@ -1151,8 +1151,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From 556277b8475d2c8001ff6fd1c341ea7fbf318432 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 16:58:08 -0700 Subject: [PATCH 074/138] change .magicrc to use from pdk --- scripts/compositor.py | 6 +++--- scripts/generate_fill.py | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/scripts/compositor.py b/scripts/compositor.py index 999038f7..df05b215 100755 --- a/scripts/compositor.py +++ b/scripts/compositor.py @@ -147,9 +147,9 @@ def usage(): keepmode = True magpath = mag_dir_path - rcfile = magpath + '/.magicrc' - # pdk_root = os.getenv("PDK_ROOT") - # rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' + # rcfile = magpath + '/.magicrc' + pdk_root = os.getenv("PDK_ROOT") + rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' gdspath = gds_dir_path diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 2b0db8ef..964a6a87 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -153,9 +153,9 @@ def makegds(file): distmode = True magpath = user_project_path + '/mag' - rcfile = magpath + '/.magicrc' - # pdk_root = os.getenv("PDK_ROOT") - # rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' + # rcfile = magpath + '/.magicrc' + pdk_root = os.getenv("PDK_ROOT") + rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' if not os.path.isfile(rcfile): rcfile = None From b08bb5a1ec48493d24899dee976237eb541847a8 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:08:10 -0700 Subject: [PATCH 075/138] add user_id back --- Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Makefile b/Makefile index 060af0a0..57a4fcbf 100644 --- a/Makefile +++ b/Makefile @@ -227,6 +227,8 @@ __openframe: property LEFview true; \ property GDS_FILE $(UPRJ_ROOT)/gds/openframe_project_wrapper.gds; \ property GDS_START 0; \ + load $(UPRJ_ROOT)/mag/user_id_programming; \ + load $(UPRJ_ROOT)/mag/user_id_textblock; \ load $(CARAVEL_ROOT)/maglef/simple_por; \ load caravel_openframe -dereference; \ select top cell; \ From 0d5c5191ff6ca27ea78c4dab8cd768204b7abd51 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:25:50 -0700 Subject: [PATCH 076/138] add user_id back --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 57a4fcbf..4181de11 100644 --- a/Makefile +++ b/Makefile @@ -1153,7 +1153,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From b21a7a26f114b21b6dc15cf7fbf60620e40dec81 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 00:21:17 +0000 Subject: [PATCH 077/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index d8669400..4b7b6aef 100644 --- a/manifest +++ b/manifest @@ -55,5 +55,5 @@ b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py -9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py +50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From 4c6cc4ff64afd18996ab8ed495a7d1dc59c8fd31 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:30:10 -0700 Subject: [PATCH 078/138] rename top to caravel --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 4181de11..7558b799 100644 --- a/Makefile +++ b/Makefile @@ -235,6 +235,7 @@ __openframe: expand; \ cif *hier write disable; \ cif *array write disable; \ + save caravel; \ gds write $(UPRJ_ROOT)/gds/caravel.gds; \ quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl ### Runs from CARAVEL_ROOT From 9c8611ac33feb2d8404cf9e7d330f9406f066601 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:25:22 -0700 Subject: [PATCH 079/138] change bbox for gen fill --- Makefile | 4 ++-- scripts/generate_fill.py | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index 7558b799..e10ae5b4 100644 --- a/Makefile +++ b/Makefile @@ -1154,8 +1154,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 964a6a87..098a590a 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -192,7 +192,8 @@ def makegds(file): if not distmode: print('cif ostyle wafflefill(tiled)', file=ofile) print('', file=ofile) - print('set fullbox [box values]', file=ofile) + # print('set fullbox [box values]', file=ofile) + print('set fullbox { 0 0 3588um 5188um }', file=ofile) print('set xmax [lindex $fullbox 2]', file=ofile) print('set xmin [lindex $fullbox 0]', file=ofile) print('set fullwidth [expr {$xmax - $xmin}]', file=ofile) From b5faa21e1eca0ad18ccfa7ff12d0c19114ee6fc4 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:28:54 -0700 Subject: [PATCH 080/138] change bbox for gen fill --- scripts/generate_fill.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 098a590a..5a0646f8 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -193,7 +193,7 @@ def makegds(file): print('cif ostyle wafflefill(tiled)', file=ofile) print('', file=ofile) # print('set fullbox [box values]', file=ofile) - print('set fullbox { 0 0 3588um 5188um }', file=ofile) + print('set fullbox { 0 0 717600 1037600 }', file=ofile) print('set xmax [lindex $fullbox 2]', file=ofile) print('set xmin [lindex $fullbox 0]', file=ofile) print('set fullwidth [expr {$xmax - $xmin}]', file=ofile) From d335ed562c1afdf23a6df6636718be664446c28d Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:37:32 -0700 Subject: [PATCH 081/138] change bbox for gen fill --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index e10ae5b4..7558b799 100644 --- a/Makefile +++ b/Makefile @@ -1154,8 +1154,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From f92ef031ce3b3cfb573f74fc3a2d25e350569606 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 09:48:04 -0700 Subject: [PATCH 082/138] remove -keep for gen fill --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 7558b799..877f3f0c 100644 --- a/Makefile +++ b/Makefile @@ -1154,7 +1154,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 2d0183c33d1f4b0e17deaca99d5b4e0af1e2b727 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 14:58:47 +0000 Subject: [PATCH 083/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index 4b7b6aef..5edfdbb8 100644 --- a/manifest +++ b/manifest @@ -55,5 +55,5 @@ b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From 4b2d7af1884bf5da5c7b9e7cbc319620e63d521d Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 10:37:10 -0700 Subject: [PATCH 084/138] add -keep --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 877f3f0c..0596da09 100644 --- a/Makefile +++ b/Makefile @@ -1154,7 +1154,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 0f9e9309d8872b74926db2fd59f07ca10a993d5a Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 12:40:54 -0700 Subject: [PATCH 085/138] correct load issue with gen fill --- scripts/generate_fill.py | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 5a0646f8..9d9a90ca 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -187,6 +187,7 @@ def makegds(file): print('gds readonly true', file=ofile) print('gds rescale false', file=ofile) print('gds read ../gds/' + project, file=ofile) + print('load ' + project, file=ofile) print('select top cell', file=ofile) print('expand', file=ofile) if not distmode: From 68e2b87ea52c3afdacba9a696b03ba4c034d818e Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 23:25:59 -0700 Subject: [PATCH 086/138] remove -keep --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 0596da09..9c9202a4 100644 --- a/Makefile +++ b/Makefile @@ -1154,8 +1154,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From a8c0cf902760bb5e9c70f6fad3b1907cebfc2458 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 19:54:30 +0000 Subject: [PATCH 087/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index 5edfdbb8..49d6ce3a 100644 --- a/manifest +++ b/manifest @@ -55,5 +55,5 @@ b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py +c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From a14a4fa563874c067f065eb3c14d53ce66772c0e Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 00:21:17 +0000 Subject: [PATCH 088/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index 49d6ce3a..d8669400 100644 --- a/manifest +++ b/manifest @@ -55,5 +55,5 @@ b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py -844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py +98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py +9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py From 40f5d9476c5e238bd70cd137bf5fc67dad4b678c Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:25:22 -0700 Subject: [PATCH 089/138] change bbox for gen fill --- Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 9c9202a4..7558b799 100644 --- a/Makefile +++ b/Makefile @@ -1154,8 +1154,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 42d186015ceb1596ee2f2060c46d0a9624f8a250 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 09:48:04 -0700 Subject: [PATCH 090/138] remove -keep for gen fill --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 7558b799..877f3f0c 100644 --- a/Makefile +++ b/Makefile @@ -1154,7 +1154,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 238982d1ee7e4f3999a32d13715ca111812a4a4f Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 14:58:47 +0000 Subject: [PATCH 091/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index d8669400..4b7b6aef 100644 --- a/manifest +++ b/manifest @@ -55,5 +55,5 @@ b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py -9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py +50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From ed2b6ad39eb15a5894f614727646a987cb1d65df Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 10:37:10 -0700 Subject: [PATCH 092/138] add -keep --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 877f3f0c..0596da09 100644 --- a/Makefile +++ b/Makefile @@ -1154,7 +1154,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 0e65bfabea66f561691594de80ccb13eec2c0464 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 23:25:59 -0700 Subject: [PATCH 093/138] remove -keep --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 0596da09..9c9202a4 100644 --- a/Makefile +++ b/Makefile @@ -1154,8 +1154,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 1562d1af3032f2c37f10802eb8cea36d9528b469 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 19:54:30 +0000 Subject: [PATCH 094/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index 4b7b6aef..5edfdbb8 100644 --- a/manifest +++ b/manifest @@ -55,5 +55,5 @@ b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -50837d9dc036802fd2b3d2ad07275e3a0e6ca522 scripts/generate_fill.py +548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From c95834d22eccb351c8c1149e55f72a207b9a927b Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:25:05 -0700 Subject: [PATCH 095/138] Makefile add openframe target --- Makefile | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/Makefile b/Makefile index 9c9202a4..037b1c7a 100644 --- a/Makefile +++ b/Makefile @@ -235,8 +235,7 @@ __openframe: expand; \ cif *hier write disable; \ cif *array write disable; \ - save caravel; \ - gds write $(UPRJ_ROOT)/gds/caravel.gds; \ + gds write $(UPRJ_ROOT)/gds/caravel_openframe.gds; \ quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl ### Runs from CARAVEL_ROOT @mkdir -p ./signoff/build @@ -1155,7 +1154,6 @@ __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out @@ -1224,7 +1222,7 @@ update_caravel: .PHONY: install_mcw install_mcw: if [ -d "$(MCW_ROOT)" ]; then \ - echo "Deleting existing $(MCW_ROOT)" && \ + echo "Deleting exisiting $(MCW_ROOT)" && \ rm -rf $(MCW_ROOT) && sleep 2;\ fi ifeq ($(SUBMODULE),1) @@ -1301,7 +1299,7 @@ clean-pdk: .PHONY: skywater-pdk skywater-pdk: if [ -d "$(PDK_ROOT)/skywater-pdk" ]; then\ - echo "Deleting existing $(PDK_ROOT)/skywater-pdk" && \ + echo "Deleting exisiting $(PDK_ROOT)/skywater-pdk" && \ rm -rf $(PDK_ROOT)/skywater-pdk && sleep 2;\ fi git clone https://github.com/google/skywater-pdk.git $(PDK_ROOT)/skywater-pdk @@ -1318,7 +1316,7 @@ skywater-pdk: .PHONY: open-pdks open-pdks: if [ -d "$(PDK_ROOT)/open_pdks" ]; then \ - echo "Deleting existing $(PDK_ROOT)/open_pdks" && \ + echo "Deleting exisiting $(PDK_ROOT)/open_pdks" && \ rm -rf $(PDK_ROOT)/open_pdks && sleep 2; \ fi git clone git://opencircuitdesign.com/open_pdks $(PDK_ROOT)/open_pdks @@ -1329,7 +1327,7 @@ open-pdks: .PHONY: sky130 sky130: if [ -d "$(PDK_ROOT)/$(PDK)" ]; then \ - echo "Deleting existing $(PDK_ROOT)/$(PDK)" && \ + echo "Deleting exisiting $(PDK_ROOT)/$(PDK)" && \ rm -rf $(PDK_ROOT)/$(PDK) && sleep 2;\ fi docker run --rm\ From 39846c84a1d602c5e3f2d827e30f69b7cb8fedcf Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 12:45:03 -0700 Subject: [PATCH 096/138] disable dist for fill gen --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 037b1c7a..806b6e03 100644 --- a/Makefile +++ b/Makefile @@ -1153,8 +1153,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From 921e4e21156951fa681ff43862fa0e18c7e9a7cd Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 15:32:29 -0700 Subject: [PATCH 097/138] change .magicrc to use from pdk --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 806b6e03..037b1c7a 100644 --- a/Makefile +++ b/Makefile @@ -1153,8 +1153,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From df3eca2eb574bf51b22d3390f471b4dab3210115 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:25:50 -0700 Subject: [PATCH 098/138] add user_id back --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 037b1c7a..315abb9b 100644 --- a/Makefile +++ b/Makefile @@ -1153,7 +1153,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 4691b2c32dad4089e4c0672266aafcb267c9fbe5 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:25:22 -0700 Subject: [PATCH 099/138] change bbox for gen fill --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 315abb9b..e53bb51a 100644 --- a/Makefile +++ b/Makefile @@ -1153,8 +1153,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From 3985e19a80f7cdc1647c75d89c391c96d616b15b Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 07:37:32 -0700 Subject: [PATCH 100/138] change bbox for gen fill --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index e53bb51a..315abb9b 100644 --- a/Makefile +++ b/Makefile @@ -1153,8 +1153,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out .PHONY: final From 144e9b21924de9a0daa8345f3dce2b6e8672008a Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 09:48:04 -0700 Subject: [PATCH 101/138] remove -keep for gen fill --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 315abb9b..037b1c7a 100644 --- a/Makefile +++ b/Makefile @@ -1153,7 +1153,7 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From b709ac0bfe7577c84ed2dccd3839352041e2b795 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 10:37:10 -0700 Subject: [PATCH 102/138] add -keep --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 037b1c7a..427cef26 100644 --- a/Makefile +++ b/Makefile @@ -1153,7 +1153,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 40b141bb5ad4743eb3f4fc8b8b9decb04fb71803 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 23:25:59 -0700 Subject: [PATCH 103/138] remove -keep --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 427cef26..00b4567f 100644 --- a/Makefile +++ b/Makefile @@ -1153,8 +1153,8 @@ endif __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out + python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out + #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From d2c500fa0fd615432a3aedac660802cdbacc6237 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 19:54:30 +0000 Subject: [PATCH 104/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index 5edfdbb8..49d6ce3a 100644 --- a/manifest +++ b/manifest @@ -55,5 +55,5 @@ b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -548bcf2c67867cd6bb0107352409710d64ee1350 scripts/generate_fill.py +c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py 844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From 8c0f2f58aae01508b9458495a6fcbf70394ff68d Mon Sep 17 00:00:00 2001 From: jeffdi Date: Thu, 8 Jun 2023 00:21:17 +0000 Subject: [PATCH 105/138] Apply automatic changes to Manifest and README.rst --- manifest | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/manifest b/manifest index 49d6ce3a..0819f51a 100644 --- a/manifest +++ b/manifest @@ -52,8 +52,7 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v 669d16642d5dd5f6824812754db20db98c9fe17b verilog/rtl/ring_osc2x13.v 739ca5ed63a513d2e4c9bf3ecfad32d9fa527518 verilog/rtl/simple_por.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v -036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py -844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py +98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py +9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py From e2f41e2c7914cd40876272b32bcd2e14cb2001ec Mon Sep 17 00:00:00 2001 From: jeffdi Date: Wed, 7 Jun 2023 17:30:10 -0700 Subject: [PATCH 106/138] rename top to caravel --- Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index 00b4567f..8ef77c9f 100644 --- a/Makefile +++ b/Makefile @@ -62,12 +62,12 @@ MCW_LITE?=1 ifeq ($(MCW),LITEX_VEXRISCV) MCW_NAME := mcw-litex-vexriscv - MCW_REPO ?= https://github.com/efabless/caravel_mgmt_soc_litex - MCW_TAG ?= $(MPW_TAG) + MCW_REPO := https://github.com/efabless/caravel_mgmt_soc_litex + MCW_TAG := $(MPW_TAG) else MCW_NAME := mcw-pico - MCW_REPO ?= https://github.com/efabless/caravel_pico - MCW_TAG ?= $(MPW_TAG) + MCW_REPO := https://github.com/efabless/caravel_pico + MCW_TAG := $(MPW_TAG) endif # Install caravel as submodule, (1): submodule, (0): clone From 2103b5951706bdafab18f49b62a026f4e3ce678f Mon Sep 17 00:00:00 2001 From: jeffdi Date: Fri, 9 Jun 2023 17:20:02 +0000 Subject: [PATCH 107/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index 0819f51a..2c943feb 100644 --- a/manifest +++ b/manifest @@ -54,5 +54,5 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py -9e31b1bbbb03024d02d54f9da8d42b3837abc5e5 scripts/compositor.py +c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py +844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py From c55d4f640a9edf0f8a175bb0bdd1dd40d2830998 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Mon, 11 Sep 2023 10:46:18 -0700 Subject: [PATCH 108/138] update openframe make target --- Makefile | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index 8ef77c9f..d9f306cf 100644 --- a/Makefile +++ b/Makefile @@ -236,12 +236,10 @@ __openframe: cif *hier write disable; \ cif *array write disable; \ gds write $(UPRJ_ROOT)/gds/caravel_openframe.gds; \ - quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl + quit -noprompt;" > $(UPRJ_ROOT)/mag/mag2gds_caravel_openframe.tcl ### Runs from CARAVEL_ROOT @mkdir -p ./signoff/build - @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out - #@cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ./.magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_ship.out -### @rm $(UPRJ_ROOT)/mag/mag2gds_caravel.tcl + @cd $(CARAVEL_ROOT)/mag && PDKPATH=${PDK_ROOT}/$(PDK) MAGTYPE=mag magic -noc -dnull -rcfile ${PDK_ROOT}/$(PDK)/libs.tech/magic/$(PDK).magicrc $(UPRJ_ROOT)/mag/mag2gds_caravel_openframe.tcl 2>&1 | tee $(UPRJ_ROOT)/signoff/build/make_openframe.out .PHONY: clean clean: From 8bdf48732253f9fe882595c1774a9a1e511238e8 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Mon, 11 Sep 2023 18:00:47 +0000 Subject: [PATCH 109/138] Apply automatic changes to Manifest and README.rst --- manifest | 1 + 1 file changed, 1 insertion(+) diff --git a/manifest b/manifest index 2c943feb..49d6ce3a 100644 --- a/manifest +++ b/manifest @@ -52,6 +52,7 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v 669d16642d5dd5f6824812754db20db98c9fe17b verilog/rtl/ring_osc2x13.v 739ca5ed63a513d2e4c9bf3ecfad32d9fa527518 verilog/rtl/simple_por.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v +036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py From 78a5f2a4a217fa719b05cfe610098a80d08c8dfc Mon Sep 17 00:00:00 2001 From: jeffdi Date: Mon, 11 Sep 2023 11:01:40 -0700 Subject: [PATCH 110/138] correct typos --- Makefile | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/Makefile b/Makefile index d9f306cf..640740ac 100644 --- a/Makefile +++ b/Makefile @@ -62,12 +62,12 @@ MCW_LITE?=1 ifeq ($(MCW),LITEX_VEXRISCV) MCW_NAME := mcw-litex-vexriscv - MCW_REPO := https://github.com/efabless/caravel_mgmt_soc_litex - MCW_TAG := $(MPW_TAG) + MCW_REPO ?= https://github.com/efabless/caravel_mgmt_soc_litex + MCW_TAG ?= $(MPW_TAG) else MCW_NAME := mcw-pico - MCW_REPO := https://github.com/efabless/caravel_pico - MCW_TAG := $(MPW_TAG) + MCW_REPO ?= https://github.com/efabless/caravel_pico + MCW_TAG ?= $(MPW_TAG) endif # Install caravel as submodule, (1): submodule, (0): clone @@ -1221,7 +1221,7 @@ update_caravel: .PHONY: install_mcw install_mcw: if [ -d "$(MCW_ROOT)" ]; then \ - echo "Deleting exisiting $(MCW_ROOT)" && \ + echo "Deleting existing $(MCW_ROOT)" && \ rm -rf $(MCW_ROOT) && sleep 2;\ fi ifeq ($(SUBMODULE),1) @@ -1298,7 +1298,7 @@ clean-pdk: .PHONY: skywater-pdk skywater-pdk: if [ -d "$(PDK_ROOT)/skywater-pdk" ]; then\ - echo "Deleting exisiting $(PDK_ROOT)/skywater-pdk" && \ + echo "Deleting existing $(PDK_ROOT)/skywater-pdk" && \ rm -rf $(PDK_ROOT)/skywater-pdk && sleep 2;\ fi git clone https://github.com/google/skywater-pdk.git $(PDK_ROOT)/skywater-pdk @@ -1315,7 +1315,7 @@ skywater-pdk: .PHONY: open-pdks open-pdks: if [ -d "$(PDK_ROOT)/open_pdks" ]; then \ - echo "Deleting exisiting $(PDK_ROOT)/open_pdks" && \ + echo "Deleting existing $(PDK_ROOT)/open_pdks" && \ rm -rf $(PDK_ROOT)/open_pdks && sleep 2; \ fi git clone git://opencircuitdesign.com/open_pdks $(PDK_ROOT)/open_pdks @@ -1326,7 +1326,7 @@ open-pdks: .PHONY: sky130 sky130: if [ -d "$(PDK_ROOT)/$(PDK)" ]; then \ - echo "Deleting exisiting $(PDK_ROOT)/$(PDK)" && \ + echo "Deleting existing $(PDK_ROOT)/$(PDK)" && \ rm -rf $(PDK_ROOT)/$(PDK) && sleep 2;\ fi docker run --rm\ From 909998bb9d4d2f75c962c94262dfd23191295d4f Mon Sep 17 00:00:00 2001 From: jeffdi Date: Mon, 11 Sep 2023 11:02:57 -0700 Subject: [PATCH 111/138] correct typos --- Makefile | 1 - 1 file changed, 1 deletion(-) diff --git a/Makefile b/Makefile index 640740ac..6042efd5 100644 --- a/Makefile +++ b/Makefile @@ -1152,7 +1152,6 @@ __generate_fill: @mkdir -p ./signoff/build @cp -r $(CARAVEL_ROOT)/mag/.magicrc $(shell pwd)/mag python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist 2>&1 | tee ./signoff/build/generate_fill.out - #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -dist -keep 2>&1 | tee ./signoff/build/generate_fill.out #python3 $(CARAVEL_ROOT)/scripts/generate_fill.py $(USER_ID) $(PROJECT) $(shell pwd) -keep 2>&1 | tee ./signoff/build/generate_fill.out From 19ce6de3cccd23cbfe70bb94c76b3f95d462677b Mon Sep 17 00:00:00 2001 From: jeffdi Date: Tue, 12 Sep 2023 07:23:34 -0700 Subject: [PATCH 112/138] remove hard-coded sky130A in rcfile path from scripts --- scripts/compositor.py | 3 ++- scripts/generate_fill.py | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/scripts/compositor.py b/scripts/compositor.py index df05b215..a17d962c 100755 --- a/scripts/compositor.py +++ b/scripts/compositor.py @@ -149,7 +149,8 @@ def usage(): magpath = mag_dir_path # rcfile = magpath + '/.magicrc' pdk_root = os.getenv("PDK_ROOT") - rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' + pdk = os.getenv("PDK") + rcfile = pdk_root + '/' + pdk + '/libs.tech/magic/' + pdk + '.magicrc' gdspath = gds_dir_path diff --git a/scripts/generate_fill.py b/scripts/generate_fill.py index 9d9a90ca..eb25814f 100755 --- a/scripts/generate_fill.py +++ b/scripts/generate_fill.py @@ -155,7 +155,8 @@ def makegds(file): magpath = user_project_path + '/mag' # rcfile = magpath + '/.magicrc' pdk_root = os.getenv("PDK_ROOT") - rcfile = pdk_root + '/sky130A/libs.tech/magic/sky130A.magicrc' + pdk = os.getenv("PDK") + rcfile = pdk_root + '/' + pdk + '/libs.tech/magic/' + pdk + '.magicrc' if not os.path.isfile(rcfile): rcfile = None From a4ff88b778709702e0fa672024b45db423faf985 Mon Sep 17 00:00:00 2001 From: jeffdi Date: Tue, 12 Sep 2023 14:38:18 +0000 Subject: [PATCH 113/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index 49d6ce3a..63ad1ed6 100644 --- a/manifest +++ b/manifest @@ -55,5 +55,5 @@ b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v 036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py -c19309aec5f7aad1ae1a90f8453218223a189dea scripts/generate_fill.py -844f897f586a5cdcf95be3dbfdd04201c9ed14ca scripts/compositor.py +731116709a44d13225170acc83cd34ff9e00fa39 scripts/generate_fill.py +dff8adfb05bedf96f86e16a18ce3cd5818d6fb78 scripts/compositor.py From 0848d6b8f5f56cffb75005b8958b21534d025355 Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Wed, 13 Sep 2023 06:20:15 -0700 Subject: [PATCH 114/138] Remove includes and add define macro to make it possible for new project to add logic --- verilog/rtl/toplevel_cocotb.v | 33 ++++++--------------------------- 1 file changed, 6 insertions(+), 27 deletions(-) diff --git a/verilog/rtl/toplevel_cocotb.v b/verilog/rtl/toplevel_cocotb.v index e3e86060..a56754c5 100644 --- a/verilog/rtl/toplevel_cocotb.v +++ b/verilog/rtl/toplevel_cocotb.v @@ -1,31 +1,6 @@ `timescale 1 ns / 1 ps `include "includes.v" // in case of RTL coverage is needed and it doesn't work correctly without include files by this way -`ifdef VCS -`ifdef sky130 -`ifndef ENABLE_SDF - `include "libs.ref/sky130_fd_io/verilog/sky130_fd_io.v" - `include "libs.ref/sky130_fd_io/verilog/sky130_ef_io.v" - `include "libs.ref/sky130_fd_sc_hd/verilog/primitives.v" - `include "libs.ref/sky130_fd_sc_hd/verilog/sky130_fd_sc_hd.v" - `include "libs.ref/sky130_fd_sc_hvl/verilog/primitives.v" - `include "libs.ref/sky130_fd_sc_hvl/verilog/sky130_fd_sc_hvl.v" -`else - `include "cvc-pdk/sky130_ef_io.v" - `include "cvc-pdk/sky130_fd_io.v" - `include "cvc-pdk/primitives_hd.v" - `include "cvc-pdk/sky130_fd_sc_hd.v" - `include "cvc-pdk/primitives_hvl.v" - `include "cvc-pdk/sky130_fd_sc_hvl.v" -`endif // ~ ENABLE_SDF -`elsif gf180 // sky180 - `include "libs.ref/gf180mcu_fd_io/verilog/gf180mcu_fd_io.v" - // `include "libs.ref/gf180mcu_fd_sc_mcu7t5v0/verilog/GF018hv5v_mcu_sc7_udp.v" - `include "libs.ref/gf180mcu_fd_sc_mcu7t5v0/verilog/primitives.v" - `include "libs.ref/gf180mcu_fd_sc_mcu7t5v0/verilog/gf180mcu_fd_sc_mcu7t5v0.v" - // `include "libs.ref/gf180mcu_sc7_hv/verilog/GF018hv5v_mcu_sc7.v" - `include "libs.ref/gf180mcu_fd_ip_sram/verilog/gf180mcu_fd_ip_sram__sram512x8m8wm1.v" -`endif //sky180 -`endif //VCS + module caravel_top ; @@ -39,10 +14,12 @@ initial begin `else $vcdplusfile("waves.vpd"); `endif + // $vcdplusmemorydump(); $vcdpluson(); `else $dumpfile ({"waves.vcd"}); $dumpvars (0, caravel_top); + `endif end `endif // WAVE_GEN @@ -216,7 +193,9 @@ caravel uut ( `endif // ! openframe - +`ifdef USE_USER_VIP + `USER_VIP +`endif // USE_USER_VIP // make speical variables for the mprj input to assign the input without writing to the output gpios // cocotb limitation #2587: iverilog deal with array as 1 object not multiple of objects so can't write to only 1 element From 312dbaea9096bb16a6e1e84c5fd464591584b3b9 Mon Sep 17 00:00:00 2001 From: M0stafaRady Date: Wed, 13 Sep 2023 13:31:26 +0000 Subject: [PATCH 115/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index d8669400..82ce2289 100644 --- a/manifest +++ b/manifest @@ -52,7 +52,7 @@ e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v 669d16642d5dd5f6824812754db20db98c9fe17b verilog/rtl/ring_osc2x13.v 739ca5ed63a513d2e4c9bf3ecfad32d9fa527518 verilog/rtl/simple_por.v b9d6114a5067a04dd59cdd46fb988591c16743ce verilog/rtl/spare_logic_block.v -036dc8e9066082b2e133dc7b72fd3ad5a52f254b verilog/rtl/toplevel_cocotb.v +9178c87e3d5196fd3e6abae6fc310e1b663ade0e verilog/rtl/toplevel_cocotb.v 8f0bec01c914efe790a09ffe62bbfe0781069e35 verilog/rtl/xres_buf.v 256190717faa72005cf7656d8443c4c0693b3f78 scripts/set_user_id.py 98168b1fb6f80b196f9a05e725ec6ad99bc57ac6 scripts/generate_fill.py From cee0f31d9135cc626c18fb889a47b1c6c1e9536e Mon Sep 17 00:00:00 2001 From: mo-hosni Date: Mon, 18 Sep 2023 16:59:55 +0300 Subject: [PATCH 116/138] add gate-level netlist for `caravel_openframe` --- verilog/gl/caravel_openframe-example.v | 1021 +++++++++++++++++++++++ verilog/gl/caravel_openframe.v | 1031 ++++++++++++++++++++++++ 2 files changed, 2052 insertions(+) create mode 100644 verilog/gl/caravel_openframe-example.v create mode 100644 verilog/gl/caravel_openframe.v diff --git a/verilog/gl/caravel_openframe-example.v b/verilog/gl/caravel_openframe-example.v new file mode 100644 index 00000000..ee3fc728 --- /dev/null +++ b/verilog/gl/caravel_openframe-example.v @@ -0,0 +1,1021 @@ +/* Generated by Yosys 0.30+48 (git sha1 14d50a176d5, gcc 8.3.1 -fPIC -Os) */ + +module caravel_openframe(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vdda1_2, vdda2, vssa1, vssa1_2, vssa2, vccd1, vccd2, vssd1, vssd2, gpio, resetb); + wire \analog_io[0] ; + wire \analog_io[10] ; + wire \analog_io[11] ; + wire \analog_io[12] ; + wire \analog_io[13] ; + wire \analog_io[14] ; + wire \analog_io[15] ; + wire \analog_io[16] ; + wire \analog_io[17] ; + wire \analog_io[18] ; + wire \analog_io[19] ; + wire \analog_io[1] ; + wire \analog_io[20] ; + wire \analog_io[21] ; + wire \analog_io[22] ; + wire \analog_io[23] ; + wire \analog_io[24] ; + wire \analog_io[25] ; + wire \analog_io[26] ; + wire \analog_io[27] ; + wire \analog_io[28] ; + wire \analog_io[29] ; + wire \analog_io[2] ; + wire \analog_io[30] ; + wire \analog_io[31] ; + wire \analog_io[32] ; + wire \analog_io[33] ; + wire \analog_io[34] ; + wire \analog_io[35] ; + wire \analog_io[36] ; + wire \analog_io[37] ; + wire \analog_io[38] ; + wire \analog_io[39] ; + wire \analog_io[3] ; + wire \analog_io[40] ; + wire \analog_io[41] ; + wire \analog_io[42] ; + wire \analog_io[43] ; + wire \analog_io[4] ; + wire \analog_io[5] ; + wire \analog_io[6] ; + wire \analog_io[7] ; + wire \analog_io[8] ; + wire \analog_io[9] ; + wire \analog_noesd_io[0] ; + wire \analog_noesd_io[10] ; + wire \analog_noesd_io[11] ; + wire \analog_noesd_io[12] ; + wire \analog_noesd_io[13] ; + wire \analog_noesd_io[14] ; + wire \analog_noesd_io[15] ; + wire \analog_noesd_io[16] ; + wire \analog_noesd_io[17] ; + wire \analog_noesd_io[18] ; + wire \analog_noesd_io[19] ; + wire \analog_noesd_io[1] ; + wire \analog_noesd_io[20] ; + wire \analog_noesd_io[21] ; + wire \analog_noesd_io[22] ; + wire \analog_noesd_io[23] ; + wire \analog_noesd_io[24] ; + wire \analog_noesd_io[25] ; + wire \analog_noesd_io[26] ; + wire \analog_noesd_io[27] ; + wire \analog_noesd_io[28] ; + wire \analog_noesd_io[29] ; + wire \analog_noesd_io[2] ; + wire \analog_noesd_io[30] ; + wire \analog_noesd_io[31] ; + wire \analog_noesd_io[32] ; + wire \analog_noesd_io[33] ; + wire \analog_noesd_io[34] ; + wire \analog_noesd_io[35] ; + wire \analog_noesd_io[36] ; + wire \analog_noesd_io[37] ; + wire \analog_noesd_io[38] ; + wire \analog_noesd_io[39] ; + wire \analog_noesd_io[3] ; + wire \analog_noesd_io[40] ; + wire \analog_noesd_io[41] ; + wire \analog_noesd_io[42] ; + wire \analog_noesd_io[43] ; + wire \analog_noesd_io[4] ; + wire \analog_noesd_io[5] ; + wire \analog_noesd_io[6] ; + wire \analog_noesd_io[7] ; + wire \analog_noesd_io[8] ; + wire \analog_noesd_io[9] ; + inout [43:0] gpio; + wire [43:0] gpio; + wire \gpio_analog_en[0] ; + wire \gpio_analog_en[10] ; + wire \gpio_analog_en[11] ; + wire \gpio_analog_en[12] ; + wire \gpio_analog_en[13] ; + wire \gpio_analog_en[14] ; + wire \gpio_analog_en[15] ; + wire \gpio_analog_en[16] ; + wire \gpio_analog_en[17] ; + wire \gpio_analog_en[18] ; + wire \gpio_analog_en[19] ; + wire \gpio_analog_en[1] ; + wire \gpio_analog_en[20] ; + wire \gpio_analog_en[21] ; + wire \gpio_analog_en[22] ; + wire \gpio_analog_en[23] ; + wire \gpio_analog_en[24] ; + wire \gpio_analog_en[25] ; + wire \gpio_analog_en[26] ; + wire \gpio_analog_en[27] ; + wire \gpio_analog_en[28] ; + wire \gpio_analog_en[29] ; + wire \gpio_analog_en[2] ; + wire \gpio_analog_en[30] ; + wire \gpio_analog_en[31] ; + wire \gpio_analog_en[32] ; + wire \gpio_analog_en[33] ; + wire \gpio_analog_en[34] ; + wire \gpio_analog_en[35] ; + wire \gpio_analog_en[36] ; + wire \gpio_analog_en[37] ; + wire \gpio_analog_en[38] ; + wire \gpio_analog_en[39] ; + wire \gpio_analog_en[3] ; + wire \gpio_analog_en[40] ; + wire \gpio_analog_en[41] ; + wire \gpio_analog_en[42] ; + wire \gpio_analog_en[43] ; + wire \gpio_analog_en[4] ; + wire \gpio_analog_en[5] ; + wire \gpio_analog_en[6] ; + wire \gpio_analog_en[7] ; + wire \gpio_analog_en[8] ; + wire \gpio_analog_en[9] ; + wire \gpio_analog_pol[0] ; + wire \gpio_analog_pol[10] ; + wire \gpio_analog_pol[11] ; + wire \gpio_analog_pol[12] ; + wire \gpio_analog_pol[13] ; + wire \gpio_analog_pol[14] ; + wire \gpio_analog_pol[15] ; + wire \gpio_analog_pol[16] ; + wire \gpio_analog_pol[17] ; + wire \gpio_analog_pol[18] ; + wire \gpio_analog_pol[19] ; + wire \gpio_analog_pol[1] ; + wire \gpio_analog_pol[20] ; + wire \gpio_analog_pol[21] ; + wire \gpio_analog_pol[22] ; + wire \gpio_analog_pol[23] ; + wire \gpio_analog_pol[24] ; + wire \gpio_analog_pol[25] ; + wire \gpio_analog_pol[26] ; + wire \gpio_analog_pol[27] ; + wire \gpio_analog_pol[28] ; + wire \gpio_analog_pol[29] ; + wire \gpio_analog_pol[2] ; + wire \gpio_analog_pol[30] ; + wire \gpio_analog_pol[31] ; + wire \gpio_analog_pol[32] ; + wire \gpio_analog_pol[33] ; + wire \gpio_analog_pol[34] ; + wire \gpio_analog_pol[35] ; + wire \gpio_analog_pol[36] ; + wire \gpio_analog_pol[37] ; + wire \gpio_analog_pol[38] ; + wire \gpio_analog_pol[39] ; + wire \gpio_analog_pol[3] ; + wire \gpio_analog_pol[40] ; + wire \gpio_analog_pol[41] ; + wire \gpio_analog_pol[42] ; + wire \gpio_analog_pol[43] ; + wire \gpio_analog_pol[4] ; + wire \gpio_analog_pol[5] ; + wire \gpio_analog_pol[6] ; + wire \gpio_analog_pol[7] ; + wire \gpio_analog_pol[8] ; + wire \gpio_analog_pol[9] ; + wire \gpio_analog_sel[0] ; + wire \gpio_analog_sel[10] ; + wire \gpio_analog_sel[11] ; + wire \gpio_analog_sel[12] ; + wire \gpio_analog_sel[13] ; + wire \gpio_analog_sel[14] ; + wire \gpio_analog_sel[15] ; + wire \gpio_analog_sel[16] ; + wire \gpio_analog_sel[17] ; + wire \gpio_analog_sel[18] ; + wire \gpio_analog_sel[19] ; + wire \gpio_analog_sel[1] ; + wire \gpio_analog_sel[20] ; + wire \gpio_analog_sel[21] ; + wire \gpio_analog_sel[22] ; + wire \gpio_analog_sel[23] ; + wire \gpio_analog_sel[24] ; + wire \gpio_analog_sel[25] ; + wire \gpio_analog_sel[26] ; + wire \gpio_analog_sel[27] ; + wire \gpio_analog_sel[28] ; + wire \gpio_analog_sel[29] ; + wire \gpio_analog_sel[2] ; + wire \gpio_analog_sel[30] ; + wire \gpio_analog_sel[31] ; + wire \gpio_analog_sel[32] ; + wire \gpio_analog_sel[33] ; + wire \gpio_analog_sel[34] ; + wire \gpio_analog_sel[35] ; + wire \gpio_analog_sel[36] ; + wire \gpio_analog_sel[37] ; + wire \gpio_analog_sel[38] ; + wire \gpio_analog_sel[39] ; + wire \gpio_analog_sel[3] ; + wire \gpio_analog_sel[40] ; + wire \gpio_analog_sel[41] ; + wire \gpio_analog_sel[42] ; + wire \gpio_analog_sel[43] ; + wire \gpio_analog_sel[4] ; + wire \gpio_analog_sel[5] ; + wire \gpio_analog_sel[6] ; + wire \gpio_analog_sel[7] ; + wire \gpio_analog_sel[8] ; + wire \gpio_analog_sel[9] ; + wire \gpio_dm0[0] ; + wire \gpio_dm0[10] ; + wire \gpio_dm0[11] ; + wire \gpio_dm0[12] ; + wire \gpio_dm0[13] ; + wire \gpio_dm0[14] ; + wire \gpio_dm0[15] ; + wire \gpio_dm0[16] ; + wire \gpio_dm0[17] ; + wire \gpio_dm0[18] ; + wire \gpio_dm0[19] ; + wire \gpio_dm0[1] ; + wire \gpio_dm0[20] ; + wire \gpio_dm0[21] ; + wire \gpio_dm0[22] ; + wire \gpio_dm0[23] ; + wire \gpio_dm0[24] ; + wire \gpio_dm0[25] ; + wire \gpio_dm0[26] ; + wire \gpio_dm0[27] ; + wire \gpio_dm0[28] ; + wire \gpio_dm0[29] ; + wire \gpio_dm0[2] ; + wire \gpio_dm0[30] ; + wire \gpio_dm0[31] ; + wire \gpio_dm0[32] ; + wire \gpio_dm0[33] ; + wire \gpio_dm0[34] ; + wire \gpio_dm0[35] ; + wire \gpio_dm0[36] ; + wire \gpio_dm0[37] ; + wire \gpio_dm0[38] ; + wire \gpio_dm0[39] ; + wire \gpio_dm0[3] ; + wire \gpio_dm0[40] ; + wire \gpio_dm0[41] ; + wire \gpio_dm0[42] ; + wire \gpio_dm0[43] ; + wire \gpio_dm0[4] ; + wire \gpio_dm0[5] ; + wire \gpio_dm0[6] ; + wire \gpio_dm0[7] ; + wire \gpio_dm0[8] ; + wire \gpio_dm0[9] ; + wire \gpio_dm1[0] ; + wire \gpio_dm1[10] ; + wire \gpio_dm1[11] ; + wire \gpio_dm1[12] ; + wire \gpio_dm1[13] ; + wire \gpio_dm1[14] ; + wire \gpio_dm1[15] ; + wire \gpio_dm1[16] ; + wire \gpio_dm1[17] ; + wire \gpio_dm1[18] ; + wire \gpio_dm1[19] ; + wire \gpio_dm1[1] ; + wire \gpio_dm1[20] ; + wire \gpio_dm1[21] ; + wire \gpio_dm1[22] ; + wire \gpio_dm1[23] ; + wire \gpio_dm1[24] ; + wire \gpio_dm1[25] ; + wire \gpio_dm1[26] ; + wire \gpio_dm1[27] ; + wire \gpio_dm1[28] ; + wire \gpio_dm1[29] ; + wire \gpio_dm1[2] ; + wire \gpio_dm1[30] ; + wire \gpio_dm1[31] ; + wire \gpio_dm1[32] ; + wire \gpio_dm1[33] ; + wire \gpio_dm1[34] ; + wire \gpio_dm1[35] ; + wire \gpio_dm1[36] ; + wire \gpio_dm1[37] ; + wire \gpio_dm1[38] ; + wire \gpio_dm1[39] ; + wire \gpio_dm1[3] ; + wire \gpio_dm1[40] ; + wire \gpio_dm1[41] ; + wire \gpio_dm1[42] ; + wire \gpio_dm1[43] ; + wire \gpio_dm1[4] ; + wire \gpio_dm1[5] ; + wire \gpio_dm1[6] ; + wire \gpio_dm1[7] ; + wire \gpio_dm1[8] ; + wire \gpio_dm1[9] ; + wire \gpio_dm2[0] ; + wire \gpio_dm2[10] ; + wire \gpio_dm2[11] ; + wire \gpio_dm2[12] ; + wire \gpio_dm2[13] ; + wire \gpio_dm2[14] ; + wire \gpio_dm2[15] ; + wire \gpio_dm2[16] ; + wire \gpio_dm2[17] ; + wire \gpio_dm2[18] ; + wire \gpio_dm2[19] ; + wire \gpio_dm2[1] ; + wire \gpio_dm2[20] ; + wire \gpio_dm2[21] ; + wire \gpio_dm2[22] ; + wire \gpio_dm2[23] ; + wire \gpio_dm2[24] ; + wire \gpio_dm2[25] ; + wire \gpio_dm2[26] ; + wire \gpio_dm2[27] ; + wire \gpio_dm2[28] ; + wire \gpio_dm2[29] ; + wire \gpio_dm2[2] ; + wire \gpio_dm2[30] ; + wire \gpio_dm2[31] ; + wire \gpio_dm2[32] ; + wire \gpio_dm2[33] ; + wire \gpio_dm2[34] ; + wire \gpio_dm2[35] ; + wire \gpio_dm2[36] ; + wire \gpio_dm2[37] ; + wire \gpio_dm2[38] ; + wire \gpio_dm2[39] ; + wire \gpio_dm2[3] ; + wire \gpio_dm2[40] ; + wire \gpio_dm2[41] ; + wire \gpio_dm2[42] ; + wire \gpio_dm2[43] ; + wire \gpio_dm2[4] ; + wire \gpio_dm2[5] ; + wire \gpio_dm2[6] ; + wire \gpio_dm2[7] ; + wire \gpio_dm2[8] ; + wire \gpio_dm2[9] ; + wire \gpio_holdover[0] ; + wire \gpio_holdover[10] ; + wire \gpio_holdover[11] ; + wire \gpio_holdover[12] ; + wire \gpio_holdover[13] ; + wire \gpio_holdover[14] ; + wire \gpio_holdover[15] ; + wire \gpio_holdover[16] ; + wire \gpio_holdover[17] ; + wire \gpio_holdover[18] ; + wire \gpio_holdover[19] ; + wire \gpio_holdover[1] ; + wire \gpio_holdover[20] ; + wire \gpio_holdover[21] ; + wire \gpio_holdover[22] ; + wire \gpio_holdover[23] ; + wire \gpio_holdover[24] ; + wire \gpio_holdover[25] ; + wire \gpio_holdover[26] ; + wire \gpio_holdover[27] ; + wire \gpio_holdover[28] ; + wire \gpio_holdover[29] ; + wire \gpio_holdover[2] ; + wire \gpio_holdover[30] ; + wire \gpio_holdover[31] ; + wire \gpio_holdover[32] ; + wire \gpio_holdover[33] ; + wire \gpio_holdover[34] ; + wire \gpio_holdover[35] ; + wire \gpio_holdover[36] ; + wire \gpio_holdover[37] ; + wire \gpio_holdover[38] ; + wire \gpio_holdover[39] ; + wire \gpio_holdover[3] ; + wire \gpio_holdover[40] ; + wire \gpio_holdover[41] ; + wire \gpio_holdover[42] ; + wire \gpio_holdover[43] ; + wire \gpio_holdover[4] ; + wire \gpio_holdover[5] ; + wire \gpio_holdover[6] ; + wire \gpio_holdover[7] ; + wire \gpio_holdover[8] ; + wire \gpio_holdover[9] ; + wire \gpio_ib_mode_sel[0] ; + wire \gpio_ib_mode_sel[10] ; + wire \gpio_ib_mode_sel[11] ; + wire \gpio_ib_mode_sel[12] ; + wire \gpio_ib_mode_sel[13] ; + wire \gpio_ib_mode_sel[14] ; + wire \gpio_ib_mode_sel[15] ; + wire \gpio_ib_mode_sel[16] ; + wire \gpio_ib_mode_sel[17] ; + wire \gpio_ib_mode_sel[18] ; + wire \gpio_ib_mode_sel[19] ; + wire \gpio_ib_mode_sel[1] ; + wire \gpio_ib_mode_sel[20] ; + wire \gpio_ib_mode_sel[21] ; + wire \gpio_ib_mode_sel[22] ; + wire \gpio_ib_mode_sel[23] ; + wire \gpio_ib_mode_sel[24] ; + wire \gpio_ib_mode_sel[25] ; + wire \gpio_ib_mode_sel[26] ; + wire \gpio_ib_mode_sel[27] ; + wire \gpio_ib_mode_sel[28] ; + wire \gpio_ib_mode_sel[29] ; + wire \gpio_ib_mode_sel[2] ; + wire \gpio_ib_mode_sel[30] ; + wire \gpio_ib_mode_sel[31] ; + wire \gpio_ib_mode_sel[32] ; + wire \gpio_ib_mode_sel[33] ; + wire \gpio_ib_mode_sel[34] ; + wire \gpio_ib_mode_sel[35] ; + wire \gpio_ib_mode_sel[36] ; + wire \gpio_ib_mode_sel[37] ; + wire \gpio_ib_mode_sel[38] ; + wire \gpio_ib_mode_sel[39] ; + wire \gpio_ib_mode_sel[3] ; + wire \gpio_ib_mode_sel[40] ; + wire \gpio_ib_mode_sel[41] ; + wire \gpio_ib_mode_sel[42] ; + wire \gpio_ib_mode_sel[43] ; + wire \gpio_ib_mode_sel[4] ; + wire \gpio_ib_mode_sel[5] ; + wire \gpio_ib_mode_sel[6] ; + wire \gpio_ib_mode_sel[7] ; + wire \gpio_ib_mode_sel[8] ; + wire \gpio_ib_mode_sel[9] ; + wire \gpio_in[0] ; + wire \gpio_in[10] ; + wire \gpio_in[11] ; + wire \gpio_in[12] ; + wire \gpio_in[13] ; + wire \gpio_in[14] ; + wire \gpio_in[15] ; + wire \gpio_in[16] ; + wire \gpio_in[17] ; + wire \gpio_in[18] ; + wire \gpio_in[19] ; + wire \gpio_in[1] ; + wire \gpio_in[20] ; + wire \gpio_in[21] ; + wire \gpio_in[22] ; + wire \gpio_in[23] ; + wire \gpio_in[24] ; + wire \gpio_in[25] ; + wire \gpio_in[26] ; + wire \gpio_in[27] ; + wire \gpio_in[28] ; + wire \gpio_in[29] ; + wire \gpio_in[2] ; + wire \gpio_in[30] ; + wire \gpio_in[31] ; + wire \gpio_in[32] ; + wire \gpio_in[33] ; + wire \gpio_in[34] ; + wire \gpio_in[35] ; + wire \gpio_in[36] ; + wire \gpio_in[37] ; + wire \gpio_in[38] ; + wire \gpio_in[39] ; + wire \gpio_in[3] ; + wire \gpio_in[40] ; + wire \gpio_in[41] ; + wire \gpio_in[42] ; + wire \gpio_in[43] ; + wire \gpio_in[4] ; + wire \gpio_in[5] ; + wire \gpio_in[6] ; + wire \gpio_in[7] ; + wire \gpio_in[8] ; + wire \gpio_in[9] ; + wire \gpio_in_h[0] ; + wire \gpio_in_h[10] ; + wire \gpio_in_h[11] ; + wire \gpio_in_h[12] ; + wire \gpio_in_h[13] ; + wire \gpio_in_h[14] ; + wire \gpio_in_h[15] ; + wire \gpio_in_h[16] ; + wire \gpio_in_h[17] ; + wire \gpio_in_h[18] ; + wire \gpio_in_h[19] ; + wire \gpio_in_h[1] ; + wire \gpio_in_h[20] ; + wire \gpio_in_h[21] ; + wire \gpio_in_h[22] ; + wire \gpio_in_h[23] ; + wire \gpio_in_h[24] ; + wire \gpio_in_h[25] ; + wire \gpio_in_h[26] ; + wire \gpio_in_h[27] ; + wire \gpio_in_h[28] ; + wire \gpio_in_h[29] ; + wire \gpio_in_h[2] ; + wire \gpio_in_h[30] ; + wire \gpio_in_h[31] ; + wire \gpio_in_h[32] ; + wire \gpio_in_h[33] ; + wire \gpio_in_h[34] ; + wire \gpio_in_h[35] ; + wire \gpio_in_h[36] ; + wire \gpio_in_h[37] ; + wire \gpio_in_h[38] ; + wire \gpio_in_h[39] ; + wire \gpio_in_h[3] ; + wire \gpio_in_h[40] ; + wire \gpio_in_h[41] ; + wire \gpio_in_h[42] ; + wire \gpio_in_h[43] ; + wire \gpio_in_h[4] ; + wire \gpio_in_h[5] ; + wire \gpio_in_h[6] ; + wire \gpio_in_h[7] ; + wire \gpio_in_h[8] ; + wire \gpio_in_h[9] ; + wire \gpio_inp_dis[0] ; + wire \gpio_inp_dis[10] ; + wire \gpio_inp_dis[11] ; + wire \gpio_inp_dis[12] ; + wire \gpio_inp_dis[13] ; + wire \gpio_inp_dis[14] ; + wire \gpio_inp_dis[15] ; + wire \gpio_inp_dis[16] ; + wire \gpio_inp_dis[17] ; + wire \gpio_inp_dis[18] ; + wire \gpio_inp_dis[19] ; + wire \gpio_inp_dis[1] ; + wire \gpio_inp_dis[20] ; + wire \gpio_inp_dis[21] ; + wire \gpio_inp_dis[22] ; + wire \gpio_inp_dis[23] ; + wire \gpio_inp_dis[24] ; + wire \gpio_inp_dis[25] ; + wire \gpio_inp_dis[26] ; + wire \gpio_inp_dis[27] ; + wire \gpio_inp_dis[28] ; + wire \gpio_inp_dis[29] ; + wire \gpio_inp_dis[2] ; + wire \gpio_inp_dis[30] ; + wire \gpio_inp_dis[31] ; + wire \gpio_inp_dis[32] ; + wire \gpio_inp_dis[33] ; + wire \gpio_inp_dis[34] ; + wire \gpio_inp_dis[35] ; + wire \gpio_inp_dis[36] ; + wire \gpio_inp_dis[37] ; + wire \gpio_inp_dis[38] ; + wire \gpio_inp_dis[39] ; + wire \gpio_inp_dis[3] ; + wire \gpio_inp_dis[40] ; + wire \gpio_inp_dis[41] ; + wire \gpio_inp_dis[42] ; + wire \gpio_inp_dis[43] ; + wire \gpio_inp_dis[4] ; + wire \gpio_inp_dis[5] ; + wire \gpio_inp_dis[6] ; + wire \gpio_inp_dis[7] ; + wire \gpio_inp_dis[8] ; + wire \gpio_inp_dis[9] ; + wire \gpio_loopback_one[0] ; + wire \gpio_loopback_one[10] ; + wire \gpio_loopback_one[11] ; + wire \gpio_loopback_one[12] ; + wire \gpio_loopback_one[13] ; + wire \gpio_loopback_one[14] ; + wire \gpio_loopback_one[15] ; + wire \gpio_loopback_one[16] ; + wire \gpio_loopback_one[17] ; + wire \gpio_loopback_one[18] ; + wire \gpio_loopback_one[19] ; + wire \gpio_loopback_one[1] ; + wire \gpio_loopback_one[20] ; + wire \gpio_loopback_one[21] ; + wire \gpio_loopback_one[22] ; + wire \gpio_loopback_one[23] ; + wire \gpio_loopback_one[24] ; + wire \gpio_loopback_one[25] ; + wire \gpio_loopback_one[26] ; + wire \gpio_loopback_one[27] ; + wire \gpio_loopback_one[28] ; + wire \gpio_loopback_one[29] ; + wire \gpio_loopback_one[2] ; + wire \gpio_loopback_one[30] ; + wire \gpio_loopback_one[31] ; + wire \gpio_loopback_one[32] ; + wire \gpio_loopback_one[33] ; + wire \gpio_loopback_one[34] ; + wire \gpio_loopback_one[35] ; + wire \gpio_loopback_one[36] ; + wire \gpio_loopback_one[37] ; + wire \gpio_loopback_one[38] ; + wire \gpio_loopback_one[39] ; + wire \gpio_loopback_one[3] ; + wire \gpio_loopback_one[40] ; + wire \gpio_loopback_one[41] ; + wire \gpio_loopback_one[42] ; + wire \gpio_loopback_one[43] ; + wire \gpio_loopback_one[4] ; + wire \gpio_loopback_one[5] ; + wire \gpio_loopback_one[6] ; + wire \gpio_loopback_one[7] ; + wire \gpio_loopback_one[8] ; + wire \gpio_loopback_one[9] ; + wire \gpio_loopback_zero[0] ; + wire \gpio_loopback_zero[10] ; + wire \gpio_loopback_zero[11] ; + wire \gpio_loopback_zero[12] ; + wire \gpio_loopback_zero[13] ; + wire \gpio_loopback_zero[14] ; + wire \gpio_loopback_zero[15] ; + wire \gpio_loopback_zero[16] ; + wire \gpio_loopback_zero[17] ; + wire \gpio_loopback_zero[18] ; + wire \gpio_loopback_zero[19] ; + wire \gpio_loopback_zero[1] ; + wire \gpio_loopback_zero[20] ; + wire \gpio_loopback_zero[21] ; + wire \gpio_loopback_zero[22] ; + wire \gpio_loopback_zero[23] ; + wire \gpio_loopback_zero[24] ; + wire \gpio_loopback_zero[25] ; + wire \gpio_loopback_zero[26] ; + wire \gpio_loopback_zero[27] ; + wire \gpio_loopback_zero[28] ; + wire \gpio_loopback_zero[29] ; + wire \gpio_loopback_zero[2] ; + wire \gpio_loopback_zero[30] ; + wire \gpio_loopback_zero[31] ; + wire \gpio_loopback_zero[32] ; + wire \gpio_loopback_zero[33] ; + wire \gpio_loopback_zero[34] ; + wire \gpio_loopback_zero[35] ; + wire \gpio_loopback_zero[36] ; + wire \gpio_loopback_zero[37] ; + wire \gpio_loopback_zero[38] ; + wire \gpio_loopback_zero[39] ; + wire \gpio_loopback_zero[3] ; + wire \gpio_loopback_zero[40] ; + wire \gpio_loopback_zero[41] ; + wire \gpio_loopback_zero[42] ; + wire \gpio_loopback_zero[43] ; + wire \gpio_loopback_zero[4] ; + wire \gpio_loopback_zero[5] ; + wire \gpio_loopback_zero[6] ; + wire \gpio_loopback_zero[7] ; + wire \gpio_loopback_zero[8] ; + wire \gpio_loopback_zero[9] ; + wire \gpio_oeb[0] ; + wire \gpio_oeb[10] ; + wire \gpio_oeb[11] ; + wire \gpio_oeb[12] ; + wire \gpio_oeb[13] ; + wire \gpio_oeb[14] ; + wire \gpio_oeb[15] ; + wire \gpio_oeb[16] ; + wire \gpio_oeb[17] ; + wire \gpio_oeb[18] ; + wire \gpio_oeb[19] ; + wire \gpio_oeb[1] ; + wire \gpio_oeb[20] ; + wire \gpio_oeb[21] ; + wire \gpio_oeb[22] ; + wire \gpio_oeb[23] ; + wire \gpio_oeb[24] ; + wire \gpio_oeb[25] ; + wire \gpio_oeb[26] ; + wire \gpio_oeb[27] ; + wire \gpio_oeb[28] ; + wire \gpio_oeb[29] ; + wire \gpio_oeb[2] ; + wire \gpio_oeb[30] ; + wire \gpio_oeb[31] ; + wire \gpio_oeb[32] ; + wire \gpio_oeb[33] ; + wire \gpio_oeb[34] ; + wire \gpio_oeb[35] ; + wire \gpio_oeb[36] ; + wire \gpio_oeb[37] ; + wire \gpio_oeb[38] ; + wire \gpio_oeb[39] ; + wire \gpio_oeb[3] ; + wire \gpio_oeb[40] ; + wire \gpio_oeb[41] ; + wire \gpio_oeb[42] ; + wire \gpio_oeb[43] ; + wire \gpio_oeb[4] ; + wire \gpio_oeb[5] ; + wire \gpio_oeb[6] ; + wire \gpio_oeb[7] ; + wire \gpio_oeb[8] ; + wire \gpio_oeb[9] ; + wire \gpio_out[0] ; + wire \gpio_out[10] ; + wire \gpio_out[11] ; + wire \gpio_out[12] ; + wire \gpio_out[13] ; + wire \gpio_out[14] ; + wire \gpio_out[15] ; + wire \gpio_out[16] ; + wire \gpio_out[17] ; + wire \gpio_out[18] ; + wire \gpio_out[19] ; + wire \gpio_out[1] ; + wire \gpio_out[20] ; + wire \gpio_out[21] ; + wire \gpio_out[22] ; + wire \gpio_out[23] ; + wire \gpio_out[24] ; + wire \gpio_out[25] ; + wire \gpio_out[26] ; + wire \gpio_out[27] ; + wire \gpio_out[28] ; + wire \gpio_out[29] ; + wire \gpio_out[2] ; + wire \gpio_out[30] ; + wire \gpio_out[31] ; + wire \gpio_out[32] ; + wire \gpio_out[33] ; + wire \gpio_out[34] ; + wire \gpio_out[35] ; + wire \gpio_out[36] ; + wire \gpio_out[37] ; + wire \gpio_out[38] ; + wire \gpio_out[39] ; + wire \gpio_out[3] ; + wire \gpio_out[40] ; + wire \gpio_out[41] ; + wire \gpio_out[42] ; + wire \gpio_out[43] ; + wire \gpio_out[4] ; + wire \gpio_out[5] ; + wire \gpio_out[6] ; + wire \gpio_out[7] ; + wire \gpio_out[8] ; + wire \gpio_out[9] ; + wire \gpio_slow_sel[0] ; + wire \gpio_slow_sel[10] ; + wire \gpio_slow_sel[11] ; + wire \gpio_slow_sel[12] ; + wire \gpio_slow_sel[13] ; + wire \gpio_slow_sel[14] ; + wire \gpio_slow_sel[15] ; + wire \gpio_slow_sel[16] ; + wire \gpio_slow_sel[17] ; + wire \gpio_slow_sel[18] ; + wire \gpio_slow_sel[19] ; + wire \gpio_slow_sel[1] ; + wire \gpio_slow_sel[20] ; + wire \gpio_slow_sel[21] ; + wire \gpio_slow_sel[22] ; + wire \gpio_slow_sel[23] ; + wire \gpio_slow_sel[24] ; + wire \gpio_slow_sel[25] ; + wire \gpio_slow_sel[26] ; + wire \gpio_slow_sel[27] ; + wire \gpio_slow_sel[28] ; + wire \gpio_slow_sel[29] ; + wire \gpio_slow_sel[2] ; + wire \gpio_slow_sel[30] ; + wire \gpio_slow_sel[31] ; + wire \gpio_slow_sel[32] ; + wire \gpio_slow_sel[33] ; + wire \gpio_slow_sel[34] ; + wire \gpio_slow_sel[35] ; + wire \gpio_slow_sel[36] ; + wire \gpio_slow_sel[37] ; + wire \gpio_slow_sel[38] ; + wire \gpio_slow_sel[39] ; + wire \gpio_slow_sel[3] ; + wire \gpio_slow_sel[40] ; + wire \gpio_slow_sel[41] ; + wire \gpio_slow_sel[42] ; + wire \gpio_slow_sel[43] ; + wire \gpio_slow_sel[4] ; + wire \gpio_slow_sel[5] ; + wire \gpio_slow_sel[6] ; + wire \gpio_slow_sel[7] ; + wire \gpio_slow_sel[8] ; + wire \gpio_slow_sel[9] ; + wire \gpio_vtrip_sel[0] ; + wire \gpio_vtrip_sel[10] ; + wire \gpio_vtrip_sel[11] ; + wire \gpio_vtrip_sel[12] ; + wire \gpio_vtrip_sel[13] ; + wire \gpio_vtrip_sel[14] ; + wire \gpio_vtrip_sel[15] ; + wire \gpio_vtrip_sel[16] ; + wire \gpio_vtrip_sel[17] ; + wire \gpio_vtrip_sel[18] ; + wire \gpio_vtrip_sel[19] ; + wire \gpio_vtrip_sel[1] ; + wire \gpio_vtrip_sel[20] ; + wire \gpio_vtrip_sel[21] ; + wire \gpio_vtrip_sel[22] ; + wire \gpio_vtrip_sel[23] ; + wire \gpio_vtrip_sel[24] ; + wire \gpio_vtrip_sel[25] ; + wire \gpio_vtrip_sel[26] ; + wire \gpio_vtrip_sel[27] ; + wire \gpio_vtrip_sel[28] ; + wire \gpio_vtrip_sel[29] ; + wire \gpio_vtrip_sel[2] ; + wire \gpio_vtrip_sel[30] ; + wire \gpio_vtrip_sel[31] ; + wire \gpio_vtrip_sel[32] ; + wire \gpio_vtrip_sel[33] ; + wire \gpio_vtrip_sel[34] ; + wire \gpio_vtrip_sel[35] ; + wire \gpio_vtrip_sel[36] ; + wire \gpio_vtrip_sel[37] ; + wire \gpio_vtrip_sel[38] ; + wire \gpio_vtrip_sel[39] ; + wire \gpio_vtrip_sel[3] ; + wire \gpio_vtrip_sel[40] ; + wire \gpio_vtrip_sel[41] ; + wire \gpio_vtrip_sel[42] ; + wire \gpio_vtrip_sel[43] ; + wire \gpio_vtrip_sel[4] ; + wire \gpio_vtrip_sel[5] ; + wire \gpio_vtrip_sel[6] ; + wire \gpio_vtrip_sel[7] ; + wire \gpio_vtrip_sel[8] ; + wire \gpio_vtrip_sel[9] ; + wire \mask_rev[0] ; + wire \mask_rev[10] ; + wire \mask_rev[11] ; + wire \mask_rev[12] ; + wire \mask_rev[13] ; + wire \mask_rev[14] ; + wire \mask_rev[15] ; + wire \mask_rev[16] ; + wire \mask_rev[17] ; + wire \mask_rev[18] ; + wire \mask_rev[19] ; + wire \mask_rev[1] ; + wire \mask_rev[20] ; + wire \mask_rev[21] ; + wire \mask_rev[22] ; + wire \mask_rev[23] ; + wire \mask_rev[24] ; + wire \mask_rev[25] ; + wire \mask_rev[26] ; + wire \mask_rev[27] ; + wire \mask_rev[28] ; + wire \mask_rev[29] ; + wire \mask_rev[2] ; + wire \mask_rev[30] ; + wire \mask_rev[31] ; + wire \mask_rev[3] ; + wire \mask_rev[4] ; + wire \mask_rev[5] ; + wire \mask_rev[6] ; + wire \mask_rev[7] ; + wire \mask_rev[8] ; + wire \mask_rev[9] ; + wire por_l; + wire porb_h; + wire porb_l; + input resetb; + wire resetb; + wire rstb_h; + wire rstb_l; + inout vccd; + wire vccd; + inout vccd1; + wire vccd1; + wire vccd1_core; + inout vccd2; + wire vccd2; + wire vccd2_core; + wire vccd_core; + inout vdda; + wire vdda; + inout vdda1; + wire vdda1; + inout vdda1_2; + wire vdda1_2; + wire vdda1_core; + inout vdda2; + wire vdda2; + wire vdda2_core; + wire vdda_core; + inout vddio; + wire vddio; + inout vddio_2; + wire vddio_2; + wire vddio_core; + inout vssa; + wire vssa; + inout vssa1; + wire vssa1; + inout vssa1_2; + wire vssa1_2; + wire vssa1_core; + inout vssa2; + wire vssa2; + wire vssa2_core; + wire vssa_core; + inout vssd; + wire vssd; + inout vssd1; + wire vssd1; + wire vssd1_core; + inout vssd2; + wire vssd2; + wire vssd2_core; + wire vssd_core; + inout vssio; + wire vssio; + inout vssio_2; + wire vssio_2; + wire vssio_core; + chip_io_openframe padframe ( + .analog_io({ \analog_io[43] , \analog_io[42] , \analog_io[41] , \analog_io[40] , \analog_io[39] , \analog_io[38] , \analog_io[37] , \analog_io[36] , \analog_io[35] , \analog_io[34] , \analog_io[33] , \analog_io[32] , \analog_io[31] , \analog_io[30] , \analog_io[29] , \analog_io[28] , \analog_io[27] , \analog_io[26] , \analog_io[25] , \analog_io[24] , \analog_io[23] , \analog_io[22] , \analog_io[21] , \analog_io[20] , \analog_io[19] , \analog_io[18] , \analog_io[17] , \analog_io[16] , \analog_io[15] , \analog_io[14] , \analog_io[13] , \analog_io[12] , \analog_io[11] , \analog_io[10] , \analog_io[9] , \analog_io[8] , \analog_io[7] , \analog_io[6] , \analog_io[5] , \analog_io[4] , \analog_io[3] , \analog_io[2] , \analog_io[1] , \analog_io[0] }), + .analog_noesd_io({ \analog_noesd_io[43] , \analog_noesd_io[42] , \analog_noesd_io[41] , \analog_noesd_io[40] , \analog_noesd_io[39] , \analog_noesd_io[38] , \analog_noesd_io[37] , \analog_noesd_io[36] , \analog_noesd_io[35] , \analog_noesd_io[34] , \analog_noesd_io[33] , \analog_noesd_io[32] , \analog_noesd_io[31] , \analog_noesd_io[30] , \analog_noesd_io[29] , \analog_noesd_io[28] , \analog_noesd_io[27] , \analog_noesd_io[26] , \analog_noesd_io[25] , \analog_noesd_io[24] , \analog_noesd_io[23] , \analog_noesd_io[22] , \analog_noesd_io[21] , \analog_noesd_io[20] , \analog_noesd_io[19] , \analog_noesd_io[18] , \analog_noesd_io[17] , \analog_noesd_io[16] , \analog_noesd_io[15] , \analog_noesd_io[14] , \analog_noesd_io[13] , \analog_noesd_io[12] , \analog_noesd_io[11] , \analog_noesd_io[10] , \analog_noesd_io[9] , \analog_noesd_io[8] , \analog_noesd_io[7] , \analog_noesd_io[6] , \analog_noesd_io[5] , \analog_noesd_io[4] , \analog_noesd_io[3] , \analog_noesd_io[2] , \analog_noesd_io[1] , \analog_noesd_io[0] }), + .gpio(gpio), + .gpio_analog_en({ \gpio_analog_en[43] , \gpio_analog_en[42] , \gpio_analog_en[41] , \gpio_analog_en[40] , \gpio_analog_en[39] , \gpio_analog_en[38] , \gpio_analog_en[37] , \gpio_analog_en[36] , \gpio_analog_en[35] , \gpio_analog_en[34] , \gpio_analog_en[33] , \gpio_analog_en[32] , \gpio_analog_en[31] , \gpio_analog_en[30] , \gpio_analog_en[29] , \gpio_analog_en[28] , \gpio_analog_en[27] , \gpio_analog_en[26] , \gpio_analog_en[25] , \gpio_analog_en[24] , \gpio_analog_en[23] , \gpio_analog_en[22] , \gpio_analog_en[21] , \gpio_analog_en[20] , \gpio_analog_en[19] , \gpio_analog_en[18] , \gpio_analog_en[17] , \gpio_analog_en[16] , \gpio_analog_en[15] , \gpio_analog_en[14] , \gpio_analog_en[13] , \gpio_analog_en[12] , \gpio_analog_en[11] , \gpio_analog_en[10] , \gpio_analog_en[9] , \gpio_analog_en[8] , \gpio_analog_en[7] , \gpio_analog_en[6] , \gpio_analog_en[5] , \gpio_analog_en[4] , \gpio_analog_en[3] , \gpio_analog_en[2] , \gpio_analog_en[1] , \gpio_analog_en[0] }), + .gpio_analog_pol({ \gpio_analog_pol[43] , \gpio_analog_pol[42] , \gpio_analog_pol[41] , \gpio_analog_pol[40] , \gpio_analog_pol[39] , \gpio_analog_pol[38] , \gpio_analog_pol[37] , \gpio_analog_pol[36] , \gpio_analog_pol[35] , \gpio_analog_pol[34] , \gpio_analog_pol[33] , \gpio_analog_pol[32] , \gpio_analog_pol[31] , \gpio_analog_pol[30] , \gpio_analog_pol[29] , \gpio_analog_pol[28] , \gpio_analog_pol[27] , \gpio_analog_pol[26] , \gpio_analog_pol[25] , \gpio_analog_pol[24] , \gpio_analog_pol[23] , \gpio_analog_pol[22] , \gpio_analog_pol[21] , \gpio_analog_pol[20] , \gpio_analog_pol[19] , \gpio_analog_pol[18] , \gpio_analog_pol[17] , \gpio_analog_pol[16] , \gpio_analog_pol[15] , \gpio_analog_pol[14] , \gpio_analog_pol[13] , \gpio_analog_pol[12] , \gpio_analog_pol[11] , \gpio_analog_pol[10] , \gpio_analog_pol[9] , \gpio_analog_pol[8] , \gpio_analog_pol[7] , \gpio_analog_pol[6] , \gpio_analog_pol[5] , \gpio_analog_pol[4] , \gpio_analog_pol[3] , \gpio_analog_pol[2] , \gpio_analog_pol[1] , \gpio_analog_pol[0] }), + .gpio_analog_sel({ \gpio_analog_sel[43] , \gpio_analog_sel[42] , \gpio_analog_sel[41] , \gpio_analog_sel[40] , \gpio_analog_sel[39] , \gpio_analog_sel[38] , \gpio_analog_sel[37] , \gpio_analog_sel[36] , \gpio_analog_sel[35] , \gpio_analog_sel[34] , \gpio_analog_sel[33] , \gpio_analog_sel[32] , \gpio_analog_sel[31] , \gpio_analog_sel[30] , \gpio_analog_sel[29] , \gpio_analog_sel[28] , \gpio_analog_sel[27] , \gpio_analog_sel[26] , \gpio_analog_sel[25] , \gpio_analog_sel[24] , \gpio_analog_sel[23] , \gpio_analog_sel[22] , \gpio_analog_sel[21] , \gpio_analog_sel[20] , \gpio_analog_sel[19] , \gpio_analog_sel[18] , \gpio_analog_sel[17] , \gpio_analog_sel[16] , \gpio_analog_sel[15] , \gpio_analog_sel[14] , \gpio_analog_sel[13] , \gpio_analog_sel[12] , \gpio_analog_sel[11] , \gpio_analog_sel[10] , \gpio_analog_sel[9] , \gpio_analog_sel[8] , \gpio_analog_sel[7] , \gpio_analog_sel[6] , \gpio_analog_sel[5] , \gpio_analog_sel[4] , \gpio_analog_sel[3] , \gpio_analog_sel[2] , \gpio_analog_sel[1] , \gpio_analog_sel[0] }), + .gpio_dm0({ \gpio_dm0[43] , \gpio_dm0[42] , \gpio_dm0[41] , \gpio_dm0[40] , \gpio_dm0[39] , \gpio_dm0[38] , \gpio_dm0[37] , \gpio_dm0[36] , \gpio_dm0[35] , \gpio_dm0[34] , \gpio_dm0[33] , \gpio_dm0[32] , \gpio_dm0[31] , \gpio_dm0[30] , \gpio_dm0[29] , \gpio_dm0[28] , \gpio_dm0[27] , \gpio_dm0[26] , \gpio_dm0[25] , \gpio_dm0[24] , \gpio_dm0[23] , \gpio_dm0[22] , \gpio_dm0[21] , \gpio_dm0[20] , \gpio_dm0[19] , \gpio_dm0[18] , \gpio_dm0[17] , \gpio_dm0[16] , \gpio_dm0[15] , \gpio_dm0[14] , \gpio_dm0[13] , \gpio_dm0[12] , \gpio_dm0[11] , \gpio_dm0[10] , \gpio_dm0[9] , \gpio_dm0[8] , \gpio_dm0[7] , \gpio_dm0[6] , \gpio_dm0[5] , \gpio_dm0[4] , \gpio_dm0[3] , \gpio_dm0[2] , \gpio_dm0[1] , \gpio_dm0[0] }), + .gpio_dm1({ \gpio_dm1[43] , \gpio_dm1[42] , \gpio_dm1[41] , \gpio_dm1[40] , \gpio_dm1[39] , \gpio_dm1[38] , \gpio_dm1[37] , \gpio_dm1[36] , \gpio_dm1[35] , \gpio_dm1[34] , \gpio_dm1[33] , \gpio_dm1[32] , \gpio_dm1[31] , \gpio_dm1[30] , \gpio_dm1[29] , \gpio_dm1[28] , \gpio_dm1[27] , \gpio_dm1[26] , \gpio_dm1[25] , \gpio_dm1[24] , \gpio_dm1[23] , \gpio_dm1[22] , \gpio_dm1[21] , \gpio_dm1[20] , \gpio_dm1[19] , \gpio_dm1[18] , \gpio_dm1[17] , \gpio_dm1[16] , \gpio_dm1[15] , \gpio_dm1[14] , \gpio_dm1[13] , \gpio_dm1[12] , \gpio_dm1[11] , \gpio_dm1[10] , \gpio_dm1[9] , \gpio_dm1[8] , \gpio_dm1[7] , \gpio_dm1[6] , \gpio_dm1[5] , \gpio_dm1[4] , \gpio_dm1[3] , \gpio_dm1[2] , \gpio_dm1[1] , \gpio_dm1[0] }), + .gpio_dm2({ \gpio_dm2[43] , \gpio_dm2[42] , \gpio_dm2[41] , \gpio_dm2[40] , \gpio_dm2[39] , \gpio_dm2[38] , \gpio_dm2[37] , \gpio_dm2[36] , \gpio_dm2[35] , \gpio_dm2[34] , \gpio_dm2[33] , \gpio_dm2[32] , \gpio_dm2[31] , \gpio_dm2[30] , \gpio_dm2[29] , \gpio_dm2[28] , \gpio_dm2[27] , \gpio_dm2[26] , \gpio_dm2[25] , \gpio_dm2[24] , \gpio_dm2[23] , \gpio_dm2[22] , \gpio_dm2[21] , \gpio_dm2[20] , \gpio_dm2[19] , \gpio_dm2[18] , \gpio_dm2[17] , \gpio_dm2[16] , \gpio_dm2[15] , \gpio_dm2[14] , \gpio_dm2[13] , \gpio_dm2[12] , \gpio_dm2[11] , \gpio_dm2[10] , \gpio_dm2[9] , \gpio_dm2[8] , \gpio_dm2[7] , \gpio_dm2[6] , \gpio_dm2[5] , \gpio_dm2[4] , \gpio_dm2[3] , \gpio_dm2[2] , \gpio_dm2[1] , \gpio_dm2[0] }), + .gpio_holdover({ \gpio_holdover[43] , \gpio_holdover[42] , \gpio_holdover[41] , \gpio_holdover[40] , \gpio_holdover[39] , \gpio_holdover[38] , \gpio_holdover[37] , \gpio_holdover[36] , \gpio_holdover[35] , \gpio_holdover[34] , \gpio_holdover[33] , \gpio_holdover[32] , \gpio_holdover[31] , \gpio_holdover[30] , \gpio_holdover[29] , \gpio_holdover[28] , \gpio_holdover[27] , \gpio_holdover[26] , \gpio_holdover[25] , \gpio_holdover[24] , \gpio_holdover[23] , \gpio_holdover[22] , \gpio_holdover[21] , \gpio_holdover[20] , \gpio_holdover[19] , \gpio_holdover[18] , \gpio_holdover[17] , \gpio_holdover[16] , \gpio_holdover[15] , \gpio_holdover[14] , \gpio_holdover[13] , \gpio_holdover[12] , \gpio_holdover[11] , \gpio_holdover[10] , \gpio_holdover[9] , \gpio_holdover[8] , \gpio_holdover[7] , \gpio_holdover[6] , \gpio_holdover[5] , \gpio_holdover[4] , \gpio_holdover[3] , \gpio_holdover[2] , \gpio_holdover[1] , \gpio_holdover[0] }), + .gpio_ib_mode_sel({ \gpio_ib_mode_sel[43] , \gpio_ib_mode_sel[42] , \gpio_ib_mode_sel[41] , \gpio_ib_mode_sel[40] , \gpio_ib_mode_sel[39] , \gpio_ib_mode_sel[38] , \gpio_ib_mode_sel[37] , \gpio_ib_mode_sel[36] , \gpio_ib_mode_sel[35] , \gpio_ib_mode_sel[34] , \gpio_ib_mode_sel[33] , \gpio_ib_mode_sel[32] , \gpio_ib_mode_sel[31] , \gpio_ib_mode_sel[30] , \gpio_ib_mode_sel[29] , \gpio_ib_mode_sel[28] , \gpio_ib_mode_sel[27] , \gpio_ib_mode_sel[26] , \gpio_ib_mode_sel[25] , \gpio_ib_mode_sel[24] , \gpio_ib_mode_sel[23] , \gpio_ib_mode_sel[22] , \gpio_ib_mode_sel[21] , \gpio_ib_mode_sel[20] , \gpio_ib_mode_sel[19] , \gpio_ib_mode_sel[18] , \gpio_ib_mode_sel[17] , \gpio_ib_mode_sel[16] , \gpio_ib_mode_sel[15] , \gpio_ib_mode_sel[14] , \gpio_ib_mode_sel[13] , \gpio_ib_mode_sel[12] , \gpio_ib_mode_sel[11] , \gpio_ib_mode_sel[10] , \gpio_ib_mode_sel[9] , \gpio_ib_mode_sel[8] , \gpio_ib_mode_sel[7] , \gpio_ib_mode_sel[6] , \gpio_ib_mode_sel[5] , \gpio_ib_mode_sel[4] , \gpio_ib_mode_sel[3] , \gpio_ib_mode_sel[2] , \gpio_ib_mode_sel[1] , \gpio_ib_mode_sel[0] }), + .gpio_in({ \gpio_in[43] , \gpio_in[42] , \gpio_in[41] , \gpio_in[40] , \gpio_in[39] , \gpio_in[38] , \gpio_in[37] , \gpio_in[36] , \gpio_in[35] , \gpio_in[34] , \gpio_in[33] , \gpio_in[32] , \gpio_in[31] , \gpio_in[30] , \gpio_in[29] , \gpio_in[28] , \gpio_in[27] , \gpio_in[26] , \gpio_in[25] , \gpio_in[24] , \gpio_in[23] , \gpio_in[22] , \gpio_in[21] , \gpio_in[20] , \gpio_in[19] , \gpio_in[18] , \gpio_in[17] , \gpio_in[16] , \gpio_in[15] , \gpio_in[14] , \gpio_in[13] , \gpio_in[12] , \gpio_in[11] , \gpio_in[10] , \gpio_in[9] , \gpio_in[8] , \gpio_in[7] , \gpio_in[6] , \gpio_in[5] , \gpio_in[4] , \gpio_in[3] , \gpio_in[2] , \gpio_in[1] , \gpio_in[0] }), + .gpio_in_h({ \gpio_in_h[43] , \gpio_in_h[42] , \gpio_in_h[41] , \gpio_in_h[40] , \gpio_in_h[39] , \gpio_in_h[38] , \gpio_in_h[37] , \gpio_in_h[36] , \gpio_in_h[35] , \gpio_in_h[34] , \gpio_in_h[33] , \gpio_in_h[32] , \gpio_in_h[31] , \gpio_in_h[30] , \gpio_in_h[29] , \gpio_in_h[28] , \gpio_in_h[27] , \gpio_in_h[26] , \gpio_in_h[25] , \gpio_in_h[24] , \gpio_in_h[23] , \gpio_in_h[22] , \gpio_in_h[21] , \gpio_in_h[20] , \gpio_in_h[19] , \gpio_in_h[18] , \gpio_in_h[17] , \gpio_in_h[16] , \gpio_in_h[15] , \gpio_in_h[14] , \gpio_in_h[13] , \gpio_in_h[12] , \gpio_in_h[11] , \gpio_in_h[10] , \gpio_in_h[9] , \gpio_in_h[8] , \gpio_in_h[7] , \gpio_in_h[6] , \gpio_in_h[5] , \gpio_in_h[4] , \gpio_in_h[3] , \gpio_in_h[2] , \gpio_in_h[1] , \gpio_in_h[0] }), + .gpio_inp_dis({ \gpio_inp_dis[43] , \gpio_inp_dis[42] , \gpio_inp_dis[41] , \gpio_inp_dis[40] , \gpio_inp_dis[39] , \gpio_inp_dis[38] , \gpio_inp_dis[37] , \gpio_inp_dis[36] , \gpio_inp_dis[35] , \gpio_inp_dis[34] , \gpio_inp_dis[33] , \gpio_inp_dis[32] , \gpio_inp_dis[31] , \gpio_inp_dis[30] , \gpio_inp_dis[29] , \gpio_inp_dis[28] , \gpio_inp_dis[27] , \gpio_inp_dis[26] , \gpio_inp_dis[25] , \gpio_inp_dis[24] , \gpio_inp_dis[23] , \gpio_inp_dis[22] , \gpio_inp_dis[21] , \gpio_inp_dis[20] , \gpio_inp_dis[19] , \gpio_inp_dis[18] , \gpio_inp_dis[17] , \gpio_inp_dis[16] , \gpio_inp_dis[15] , \gpio_inp_dis[14] , \gpio_inp_dis[13] , \gpio_inp_dis[12] , \gpio_inp_dis[11] , \gpio_inp_dis[10] , \gpio_inp_dis[9] , \gpio_inp_dis[8] , \gpio_inp_dis[7] , \gpio_inp_dis[6] , \gpio_inp_dis[5] , \gpio_inp_dis[4] , \gpio_inp_dis[3] , \gpio_inp_dis[2] , \gpio_inp_dis[1] , \gpio_inp_dis[0] }), + .gpio_loopback_one({ \gpio_loopback_one[43] , \gpio_loopback_one[42] , \gpio_loopback_one[41] , \gpio_loopback_one[40] , \gpio_loopback_one[39] , \gpio_loopback_one[38] , \gpio_loopback_one[37] , \gpio_loopback_one[36] , \gpio_loopback_one[35] , \gpio_loopback_one[34] , \gpio_loopback_one[33] , \gpio_loopback_one[32] , \gpio_loopback_one[31] , \gpio_loopback_one[30] , \gpio_loopback_one[29] , \gpio_loopback_one[28] , \gpio_loopback_one[27] , \gpio_loopback_one[26] , \gpio_loopback_one[25] , \gpio_loopback_one[24] , \gpio_loopback_one[23] , \gpio_loopback_one[22] , \gpio_loopback_one[21] , \gpio_loopback_one[20] , \gpio_loopback_one[19] , \gpio_loopback_one[18] , \gpio_loopback_one[17] , \gpio_loopback_one[16] , \gpio_loopback_one[15] , \gpio_loopback_one[14] , \gpio_loopback_one[13] , \gpio_loopback_one[12] , \gpio_loopback_one[11] , \gpio_loopback_one[10] , \gpio_loopback_one[9] , \gpio_loopback_one[8] , \gpio_loopback_one[7] , \gpio_loopback_one[6] , \gpio_loopback_one[5] , \gpio_loopback_one[4] , \gpio_loopback_one[3] , \gpio_loopback_one[2] , \gpio_loopback_one[1] , \gpio_loopback_one[0] }), + .gpio_loopback_zero({ \gpio_loopback_zero[43] , \gpio_loopback_zero[42] , \gpio_loopback_zero[41] , \gpio_loopback_zero[40] , \gpio_loopback_zero[39] , \gpio_loopback_zero[38] , \gpio_loopback_zero[37] , \gpio_loopback_zero[36] , \gpio_loopback_zero[35] , \gpio_loopback_zero[34] , \gpio_loopback_zero[33] , \gpio_loopback_zero[32] , \gpio_loopback_zero[31] , \gpio_loopback_zero[30] , \gpio_loopback_zero[29] , \gpio_loopback_zero[28] , \gpio_loopback_zero[27] , \gpio_loopback_zero[26] , \gpio_loopback_zero[25] , \gpio_loopback_zero[24] , \gpio_loopback_zero[23] , \gpio_loopback_zero[22] , \gpio_loopback_zero[21] , \gpio_loopback_zero[20] , \gpio_loopback_zero[19] , \gpio_loopback_zero[18] , \gpio_loopback_zero[17] , \gpio_loopback_zero[16] , \gpio_loopback_zero[15] , \gpio_loopback_zero[14] , \gpio_loopback_zero[13] , \gpio_loopback_zero[12] , \gpio_loopback_zero[11] , \gpio_loopback_zero[10] , \gpio_loopback_zero[9] , \gpio_loopback_zero[8] , \gpio_loopback_zero[7] , \gpio_loopback_zero[6] , \gpio_loopback_zero[5] , \gpio_loopback_zero[4] , \gpio_loopback_zero[3] , \gpio_loopback_zero[2] , \gpio_loopback_zero[1] , \gpio_loopback_zero[0] }), + .gpio_oeb({ \gpio_oeb[43] , \gpio_oeb[42] , \gpio_oeb[41] , \gpio_oeb[40] , \gpio_oeb[39] , \gpio_oeb[38] , \gpio_oeb[37] , \gpio_oeb[36] , \gpio_oeb[35] , \gpio_oeb[34] , \gpio_oeb[33] , \gpio_oeb[32] , \gpio_oeb[31] , \gpio_oeb[30] , \gpio_oeb[29] , \gpio_oeb[28] , \gpio_oeb[27] , \gpio_oeb[26] , \gpio_oeb[25] , \gpio_oeb[24] , \gpio_oeb[23] , \gpio_oeb[22] , \gpio_oeb[21] , \gpio_oeb[20] , \gpio_oeb[19] , \gpio_oeb[18] , \gpio_oeb[17] , \gpio_oeb[16] , \gpio_oeb[15] , \gpio_oeb[14] , \gpio_oeb[13] , \gpio_oeb[12] , \gpio_oeb[11] , \gpio_oeb[10] , \gpio_oeb[9] , \gpio_oeb[8] , \gpio_oeb[7] , \gpio_oeb[6] , \gpio_oeb[5] , \gpio_oeb[4] , \gpio_oeb[3] , \gpio_oeb[2] , \gpio_oeb[1] , \gpio_oeb[0] }), + .gpio_out({ \gpio_out[43] , \gpio_out[42] , \gpio_out[41] , \gpio_out[40] , \gpio_out[39] , \gpio_out[38] , \gpio_out[37] , \gpio_out[36] , \gpio_out[35] , \gpio_out[34] , \gpio_out[33] , \gpio_out[32] , \gpio_out[31] , \gpio_out[30] , \gpio_out[29] , \gpio_out[28] , \gpio_out[27] , \gpio_out[26] , \gpio_out[25] , \gpio_out[24] , \gpio_out[23] , \gpio_out[22] , \gpio_out[21] , \gpio_out[20] , \gpio_out[19] , \gpio_out[18] , \gpio_out[17] , \gpio_out[16] , \gpio_out[15] , \gpio_out[14] , \gpio_out[13] , \gpio_out[12] , \gpio_out[11] , \gpio_out[10] , \gpio_out[9] , \gpio_out[8] , \gpio_out[7] , \gpio_out[6] , \gpio_out[5] , \gpio_out[4] , \gpio_out[3] , \gpio_out[2] , \gpio_out[1] , \gpio_out[0] }), + .gpio_slow_sel({ \gpio_slow_sel[43] , \gpio_slow_sel[42] , \gpio_slow_sel[41] , \gpio_slow_sel[40] , \gpio_slow_sel[39] , \gpio_slow_sel[38] , \gpio_slow_sel[37] , \gpio_slow_sel[36] , \gpio_slow_sel[35] , \gpio_slow_sel[34] , \gpio_slow_sel[33] , \gpio_slow_sel[32] , \gpio_slow_sel[31] , \gpio_slow_sel[30] , \gpio_slow_sel[29] , \gpio_slow_sel[28] , \gpio_slow_sel[27] , \gpio_slow_sel[26] , \gpio_slow_sel[25] , \gpio_slow_sel[24] , \gpio_slow_sel[23] , \gpio_slow_sel[22] , \gpio_slow_sel[21] , \gpio_slow_sel[20] , \gpio_slow_sel[19] , \gpio_slow_sel[18] , \gpio_slow_sel[17] , \gpio_slow_sel[16] , \gpio_slow_sel[15] , \gpio_slow_sel[14] , \gpio_slow_sel[13] , \gpio_slow_sel[12] , \gpio_slow_sel[11] , \gpio_slow_sel[10] , \gpio_slow_sel[9] , \gpio_slow_sel[8] , \gpio_slow_sel[7] , \gpio_slow_sel[6] , \gpio_slow_sel[5] , \gpio_slow_sel[4] , \gpio_slow_sel[3] , \gpio_slow_sel[2] , \gpio_slow_sel[1] , \gpio_slow_sel[0] }), + .gpio_vtrip_sel({ \gpio_vtrip_sel[43] , \gpio_vtrip_sel[42] , \gpio_vtrip_sel[41] , \gpio_vtrip_sel[40] , \gpio_vtrip_sel[39] , \gpio_vtrip_sel[38] , \gpio_vtrip_sel[37] , \gpio_vtrip_sel[36] , \gpio_vtrip_sel[35] , \gpio_vtrip_sel[34] , \gpio_vtrip_sel[33] , \gpio_vtrip_sel[32] , \gpio_vtrip_sel[31] , \gpio_vtrip_sel[30] , \gpio_vtrip_sel[29] , \gpio_vtrip_sel[28] , \gpio_vtrip_sel[27] , \gpio_vtrip_sel[26] , \gpio_vtrip_sel[25] , \gpio_vtrip_sel[24] , \gpio_vtrip_sel[23] , \gpio_vtrip_sel[22] , \gpio_vtrip_sel[21] , \gpio_vtrip_sel[20] , \gpio_vtrip_sel[19] , \gpio_vtrip_sel[18] , \gpio_vtrip_sel[17] , \gpio_vtrip_sel[16] , \gpio_vtrip_sel[15] , \gpio_vtrip_sel[14] , \gpio_vtrip_sel[13] , \gpio_vtrip_sel[12] , \gpio_vtrip_sel[11] , \gpio_vtrip_sel[10] , \gpio_vtrip_sel[9] , \gpio_vtrip_sel[8] , \gpio_vtrip_sel[7] , \gpio_vtrip_sel[6] , \gpio_vtrip_sel[5] , \gpio_vtrip_sel[4] , \gpio_vtrip_sel[3] , \gpio_vtrip_sel[2] , \gpio_vtrip_sel[1] , \gpio_vtrip_sel[0] }), + .mask_rev({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0] }), + .por_l(por_l), + .porb_h(porb_h), + .porb_l(porb_l), + .resetb_h(rstb_h), + .resetb_l(rstb_l), + .resetb_pad(resetb), + .vccd(vccd_core), + .vccd1(vccd1_core), + .vccd1_pad(vccd1), + .vccd2(vccd2_core), + .vccd2_pad(vccd2), + .vccd_pad(vccd), + .vdda(vdda_core), + .vdda1(vdda1_core), + .vdda1_pad(vdda1), + .vdda1_pad2(vdda1_2), + .vdda2(vdda2_core), + .vdda2_pad(vdda2), + .vdda_pad(vdda), + .vddio(vddio_core), + .vddio_pad(vddio), + .vddio_pad2(vddio_2), + .vssa(vssa_core), + .vssa1(vssa1_core), + .vssa1_pad(vssa1), + .vssa1_pad2(vssa1_2), + .vssa2(vssa2_core), + .vssa2_pad(vssa2), + .vssa_pad(vssa), + .vssd(vssd_core), + .vssd1(vssd1_core), + .vssd1_pad(vssd1), + .vssd2(vssd2_core), + .vssd2_pad(vssd2), + .vssd_pad(vssd), + .vssio(vssio_core), + .vssio_pad(vssio), + .vssio_pad2(vssio_2) + ); + openframe_project_wrapper user_project ( + .analog_io({ \analog_io[43] , \analog_io[42] , \analog_io[41] , \analog_io[40] , \analog_io[39] , \analog_io[38] , \analog_io[37] , \analog_io[36] , \analog_io[35] , \analog_io[34] , \analog_io[33] , \analog_io[32] , \analog_io[31] , \analog_io[30] , \analog_io[29] , \analog_io[28] , \analog_io[27] , \analog_io[26] , \analog_io[25] , \analog_io[24] , \analog_io[23] , \analog_io[22] , \analog_io[21] , \analog_io[20] , \analog_io[19] , \analog_io[18] , \analog_io[17] , \analog_io[16] , \analog_io[15] , \analog_io[14] , \analog_io[13] , \analog_io[12] , \analog_io[11] , \analog_io[10] , \analog_io[9] , \analog_io[8] , \analog_io[7] , \analog_io[6] , \analog_io[5] , \analog_io[4] , \analog_io[3] , \analog_io[2] , \analog_io[1] , \analog_io[0] }), + .analog_noesd_io({ \analog_noesd_io[43] , \analog_noesd_io[42] , \analog_noesd_io[41] , \analog_noesd_io[40] , \analog_noesd_io[39] , \analog_noesd_io[38] , \analog_noesd_io[37] , \analog_noesd_io[36] , \analog_noesd_io[35] , \analog_noesd_io[34] , \analog_noesd_io[33] , \analog_noesd_io[32] , \analog_noesd_io[31] , \analog_noesd_io[30] , \analog_noesd_io[29] , \analog_noesd_io[28] , \analog_noesd_io[27] , \analog_noesd_io[26] , \analog_noesd_io[25] , \analog_noesd_io[24] , \analog_noesd_io[23] , \analog_noesd_io[22] , \analog_noesd_io[21] , \analog_noesd_io[20] , \analog_noesd_io[19] , \analog_noesd_io[18] , \analog_noesd_io[17] , \analog_noesd_io[16] , \analog_noesd_io[15] , \analog_noesd_io[14] , \analog_noesd_io[13] , \analog_noesd_io[12] , \analog_noesd_io[11] , \analog_noesd_io[10] , \analog_noesd_io[9] , \analog_noesd_io[8] , \analog_noesd_io[7] , \analog_noesd_io[6] , \analog_noesd_io[5] , \analog_noesd_io[4] , \analog_noesd_io[3] , \analog_noesd_io[2] , \analog_noesd_io[1] , \analog_noesd_io[0] }), + .gpio_analog_en({ \gpio_analog_en[43] , \gpio_analog_en[42] , \gpio_analog_en[41] , \gpio_analog_en[40] , \gpio_analog_en[39] , \gpio_analog_en[38] , \gpio_analog_en[37] , \gpio_analog_en[36] , \gpio_analog_en[35] , \gpio_analog_en[34] , \gpio_analog_en[33] , \gpio_analog_en[32] , \gpio_analog_en[31] , \gpio_analog_en[30] , \gpio_analog_en[29] , \gpio_analog_en[28] , \gpio_analog_en[27] , \gpio_analog_en[26] , \gpio_analog_en[25] , \gpio_analog_en[24] , \gpio_analog_en[23] , \gpio_analog_en[22] , \gpio_analog_en[21] , \gpio_analog_en[20] , \gpio_analog_en[19] , \gpio_analog_en[18] , \gpio_analog_en[17] , \gpio_analog_en[16] , \gpio_analog_en[15] , \gpio_analog_en[14] , \gpio_analog_en[13] , \gpio_analog_en[12] , \gpio_analog_en[11] , \gpio_analog_en[10] , \gpio_analog_en[9] , \gpio_analog_en[8] , \gpio_analog_en[7] , \gpio_analog_en[6] , \gpio_analog_en[5] , \gpio_analog_en[4] , \gpio_analog_en[3] , \gpio_analog_en[2] , \gpio_analog_en[1] , \gpio_analog_en[0] }), + .gpio_analog_pol({ \gpio_analog_pol[43] , \gpio_analog_pol[42] , \gpio_analog_pol[41] , \gpio_analog_pol[40] , \gpio_analog_pol[39] , \gpio_analog_pol[38] , \gpio_analog_pol[37] , \gpio_analog_pol[36] , \gpio_analog_pol[35] , \gpio_analog_pol[34] , \gpio_analog_pol[33] , \gpio_analog_pol[32] , \gpio_analog_pol[31] , \gpio_analog_pol[30] , \gpio_analog_pol[29] , \gpio_analog_pol[28] , \gpio_analog_pol[27] , \gpio_analog_pol[26] , \gpio_analog_pol[25] , \gpio_analog_pol[24] , \gpio_analog_pol[23] , \gpio_analog_pol[22] , \gpio_analog_pol[21] , \gpio_analog_pol[20] , \gpio_analog_pol[19] , \gpio_analog_pol[18] , \gpio_analog_pol[17] , \gpio_analog_pol[16] , \gpio_analog_pol[15] , \gpio_analog_pol[14] , \gpio_analog_pol[13] , \gpio_analog_pol[12] , \gpio_analog_pol[11] , \gpio_analog_pol[10] , \gpio_analog_pol[9] , \gpio_analog_pol[8] , \gpio_analog_pol[7] , \gpio_analog_pol[6] , \gpio_analog_pol[5] , \gpio_analog_pol[4] , \gpio_analog_pol[3] , \gpio_analog_pol[2] , \gpio_analog_pol[1] , \gpio_analog_pol[0] }), + .gpio_analog_sel({ \gpio_analog_sel[43] , \gpio_analog_sel[42] , \gpio_analog_sel[41] , \gpio_analog_sel[40] , \gpio_analog_sel[39] , \gpio_analog_sel[38] , \gpio_analog_sel[37] , \gpio_analog_sel[36] , \gpio_analog_sel[35] , \gpio_analog_sel[34] , \gpio_analog_sel[33] , \gpio_analog_sel[32] , \gpio_analog_sel[31] , \gpio_analog_sel[30] , \gpio_analog_sel[29] , \gpio_analog_sel[28] , \gpio_analog_sel[27] , \gpio_analog_sel[26] , \gpio_analog_sel[25] , \gpio_analog_sel[24] , \gpio_analog_sel[23] , \gpio_analog_sel[22] , \gpio_analog_sel[21] , \gpio_analog_sel[20] , \gpio_analog_sel[19] , \gpio_analog_sel[18] , \gpio_analog_sel[17] , \gpio_analog_sel[16] , \gpio_analog_sel[15] , \gpio_analog_sel[14] , \gpio_analog_sel[13] , \gpio_analog_sel[12] , \gpio_analog_sel[11] , \gpio_analog_sel[10] , \gpio_analog_sel[9] , \gpio_analog_sel[8] , \gpio_analog_sel[7] , \gpio_analog_sel[6] , \gpio_analog_sel[5] , \gpio_analog_sel[4] , \gpio_analog_sel[3] , \gpio_analog_sel[2] , \gpio_analog_sel[1] , \gpio_analog_sel[0] }), + .gpio_dm0({ \gpio_dm0[43] , \gpio_dm0[42] , \gpio_dm0[41] , \gpio_dm0[40] , \gpio_dm0[39] , \gpio_dm0[38] , \gpio_dm0[37] , \gpio_dm0[36] , \gpio_dm0[35] , \gpio_dm0[34] , \gpio_dm0[33] , \gpio_dm0[32] , \gpio_dm0[31] , \gpio_dm0[30] , \gpio_dm0[29] , \gpio_dm0[28] , \gpio_dm0[27] , \gpio_dm0[26] , \gpio_dm0[25] , \gpio_dm0[24] , \gpio_dm0[23] , \gpio_dm0[22] , \gpio_dm0[21] , \gpio_dm0[20] , \gpio_dm0[19] , \gpio_dm0[18] , \gpio_dm0[17] , \gpio_dm0[16] , \gpio_dm0[15] , \gpio_dm0[14] , \gpio_dm0[13] , \gpio_dm0[12] , \gpio_dm0[11] , \gpio_dm0[10] , \gpio_dm0[9] , \gpio_dm0[8] , \gpio_dm0[7] , \gpio_dm0[6] , \gpio_dm0[5] , \gpio_dm0[4] , \gpio_dm0[3] , \gpio_dm0[2] , \gpio_dm0[1] , \gpio_dm0[0] }), + .gpio_dm1({ \gpio_dm1[43] , \gpio_dm1[42] , \gpio_dm1[41] , \gpio_dm1[40] , \gpio_dm1[39] , \gpio_dm1[38] , \gpio_dm1[37] , \gpio_dm1[36] , \gpio_dm1[35] , \gpio_dm1[34] , \gpio_dm1[33] , \gpio_dm1[32] , \gpio_dm1[31] , \gpio_dm1[30] , \gpio_dm1[29] , \gpio_dm1[28] , \gpio_dm1[27] , \gpio_dm1[26] , \gpio_dm1[25] , \gpio_dm1[24] , \gpio_dm1[23] , \gpio_dm1[22] , \gpio_dm1[21] , \gpio_dm1[20] , \gpio_dm1[19] , \gpio_dm1[18] , \gpio_dm1[17] , \gpio_dm1[16] , \gpio_dm1[15] , \gpio_dm1[14] , \gpio_dm1[13] , \gpio_dm1[12] , \gpio_dm1[11] , \gpio_dm1[10] , \gpio_dm1[9] , \gpio_dm1[8] , \gpio_dm1[7] , \gpio_dm1[6] , \gpio_dm1[5] , \gpio_dm1[4] , \gpio_dm1[3] , \gpio_dm1[2] , \gpio_dm1[1] , \gpio_dm1[0] }), + .gpio_dm2({ \gpio_dm2[43] , \gpio_dm2[42] , \gpio_dm2[41] , \gpio_dm2[40] , \gpio_dm2[39] , \gpio_dm2[38] , \gpio_dm2[37] , \gpio_dm2[36] , \gpio_dm2[35] , \gpio_dm2[34] , \gpio_dm2[33] , \gpio_dm2[32] , \gpio_dm2[31] , \gpio_dm2[30] , \gpio_dm2[29] , \gpio_dm2[28] , \gpio_dm2[27] , \gpio_dm2[26] , \gpio_dm2[25] , \gpio_dm2[24] , \gpio_dm2[23] , \gpio_dm2[22] , \gpio_dm2[21] , \gpio_dm2[20] , \gpio_dm2[19] , \gpio_dm2[18] , \gpio_dm2[17] , \gpio_dm2[16] , \gpio_dm2[15] , \gpio_dm2[14] , \gpio_dm2[13] , \gpio_dm2[12] , \gpio_dm2[11] , \gpio_dm2[10] , \gpio_dm2[9] , \gpio_dm2[8] , \gpio_dm2[7] , \gpio_dm2[6] , \gpio_dm2[5] , \gpio_dm2[4] , \gpio_dm2[3] , \gpio_dm2[2] , \gpio_dm2[1] , \gpio_dm2[0] }), + .gpio_holdover({ \gpio_holdover[43] , \gpio_holdover[42] , \gpio_holdover[41] , \gpio_holdover[40] , \gpio_holdover[39] , \gpio_holdover[38] , \gpio_holdover[37] , \gpio_holdover[36] , \gpio_holdover[35] , \gpio_holdover[34] , \gpio_holdover[33] , \gpio_holdover[32] , \gpio_holdover[31] , \gpio_holdover[30] , \gpio_holdover[29] , \gpio_holdover[28] , \gpio_holdover[27] , \gpio_holdover[26] , \gpio_holdover[25] , \gpio_holdover[24] , \gpio_holdover[23] , \gpio_holdover[22] , \gpio_holdover[21] , \gpio_holdover[20] , \gpio_holdover[19] , \gpio_holdover[18] , \gpio_holdover[17] , \gpio_holdover[16] , \gpio_holdover[15] , \gpio_holdover[14] , \gpio_holdover[13] , \gpio_holdover[12] , \gpio_holdover[11] , \gpio_holdover[10] , \gpio_holdover[9] , \gpio_holdover[8] , \gpio_holdover[7] , \gpio_holdover[6] , \gpio_holdover[5] , \gpio_holdover[4] , \gpio_holdover[3] , \gpio_holdover[2] , \gpio_holdover[1] , \gpio_holdover[0] }), + .gpio_ib_mode_sel({ \gpio_ib_mode_sel[43] , \gpio_ib_mode_sel[42] , \gpio_ib_mode_sel[41] , \gpio_ib_mode_sel[40] , \gpio_ib_mode_sel[39] , \gpio_ib_mode_sel[38] , \gpio_ib_mode_sel[37] , \gpio_ib_mode_sel[36] , \gpio_ib_mode_sel[35] , \gpio_ib_mode_sel[34] , \gpio_ib_mode_sel[33] , \gpio_ib_mode_sel[32] , \gpio_ib_mode_sel[31] , \gpio_ib_mode_sel[30] , \gpio_ib_mode_sel[29] , \gpio_ib_mode_sel[28] , \gpio_ib_mode_sel[27] , \gpio_ib_mode_sel[26] , \gpio_ib_mode_sel[25] , \gpio_ib_mode_sel[24] , \gpio_ib_mode_sel[23] , \gpio_ib_mode_sel[22] , \gpio_ib_mode_sel[21] , \gpio_ib_mode_sel[20] , \gpio_ib_mode_sel[19] , \gpio_ib_mode_sel[18] , \gpio_ib_mode_sel[17] , \gpio_ib_mode_sel[16] , \gpio_ib_mode_sel[15] , \gpio_ib_mode_sel[14] , \gpio_ib_mode_sel[13] , \gpio_ib_mode_sel[12] , \gpio_ib_mode_sel[11] , \gpio_ib_mode_sel[10] , \gpio_ib_mode_sel[9] , \gpio_ib_mode_sel[8] , \gpio_ib_mode_sel[7] , \gpio_ib_mode_sel[6] , \gpio_ib_mode_sel[5] , \gpio_ib_mode_sel[4] , \gpio_ib_mode_sel[3] , \gpio_ib_mode_sel[2] , \gpio_ib_mode_sel[1] , \gpio_ib_mode_sel[0] }), + .gpio_in({ \gpio_in[43] , \gpio_in[42] , \gpio_in[41] , \gpio_in[40] , \gpio_in[39] , \gpio_in[38] , \gpio_in[37] , \gpio_in[36] , \gpio_in[35] , \gpio_in[34] , \gpio_in[33] , \gpio_in[32] , \gpio_in[31] , \gpio_in[30] , \gpio_in[29] , \gpio_in[28] , \gpio_in[27] , \gpio_in[26] , \gpio_in[25] , \gpio_in[24] , \gpio_in[23] , \gpio_in[22] , \gpio_in[21] , \gpio_in[20] , \gpio_in[19] , \gpio_in[18] , \gpio_in[17] , \gpio_in[16] , \gpio_in[15] , \gpio_in[14] , \gpio_in[13] , \gpio_in[12] , \gpio_in[11] , \gpio_in[10] , \gpio_in[9] , \gpio_in[8] , \gpio_in[7] , \gpio_in[6] , \gpio_in[5] , \gpio_in[4] , \gpio_in[3] , \gpio_in[2] , \gpio_in[1] , \gpio_in[0] }), + .gpio_in_h({ \gpio_in_h[43] , \gpio_in_h[42] , \gpio_in_h[41] , \gpio_in_h[40] , \gpio_in_h[39] , \gpio_in_h[38] , \gpio_in_h[37] , \gpio_in_h[36] , \gpio_in_h[35] , \gpio_in_h[34] , \gpio_in_h[33] , \gpio_in_h[32] , \gpio_in_h[31] , \gpio_in_h[30] , \gpio_in_h[29] , \gpio_in_h[28] , \gpio_in_h[27] , \gpio_in_h[26] , \gpio_in_h[25] , \gpio_in_h[24] , \gpio_in_h[23] , \gpio_in_h[22] , \gpio_in_h[21] , \gpio_in_h[20] , \gpio_in_h[19] , \gpio_in_h[18] , \gpio_in_h[17] , \gpio_in_h[16] , \gpio_in_h[15] , \gpio_in_h[14] , \gpio_in_h[13] , \gpio_in_h[12] , \gpio_in_h[11] , \gpio_in_h[10] , \gpio_in_h[9] , \gpio_in_h[8] , \gpio_in_h[7] , \gpio_in_h[6] , \gpio_in_h[5] , \gpio_in_h[4] , \gpio_in_h[3] , \gpio_in_h[2] , \gpio_in_h[1] , \gpio_in_h[0] }), + .gpio_inp_dis({ \gpio_inp_dis[43] , \gpio_inp_dis[42] , \gpio_inp_dis[41] , \gpio_inp_dis[40] , \gpio_inp_dis[39] , \gpio_inp_dis[38] , \gpio_inp_dis[37] , \gpio_inp_dis[36] , \gpio_inp_dis[35] , \gpio_inp_dis[34] , \gpio_inp_dis[33] , \gpio_inp_dis[32] , \gpio_inp_dis[31] , \gpio_inp_dis[30] , \gpio_inp_dis[29] , \gpio_inp_dis[28] , \gpio_inp_dis[27] , \gpio_inp_dis[26] , \gpio_inp_dis[25] , \gpio_inp_dis[24] , \gpio_inp_dis[23] , \gpio_inp_dis[22] , \gpio_inp_dis[21] , \gpio_inp_dis[20] , \gpio_inp_dis[19] , \gpio_inp_dis[18] , \gpio_inp_dis[17] , \gpio_inp_dis[16] , \gpio_inp_dis[15] , \gpio_inp_dis[14] , \gpio_inp_dis[13] , \gpio_inp_dis[12] , \gpio_inp_dis[11] , \gpio_inp_dis[10] , \gpio_inp_dis[9] , \gpio_inp_dis[8] , \gpio_inp_dis[7] , \gpio_inp_dis[6] , \gpio_inp_dis[5] , \gpio_inp_dis[4] , \gpio_inp_dis[3] , \gpio_inp_dis[2] , \gpio_inp_dis[1] , \gpio_inp_dis[0] }), + .gpio_loopback_one({ \gpio_loopback_one[43] , \gpio_loopback_one[42] , \gpio_loopback_one[41] , \gpio_loopback_one[40] , \gpio_loopback_one[39] , \gpio_loopback_one[38] , \gpio_loopback_one[37] , \gpio_loopback_one[36] , \gpio_loopback_one[35] , \gpio_loopback_one[34] , \gpio_loopback_one[33] , \gpio_loopback_one[32] , \gpio_loopback_one[31] , \gpio_loopback_one[30] , \gpio_loopback_one[29] , \gpio_loopback_one[28] , \gpio_loopback_one[27] , \gpio_loopback_one[26] , \gpio_loopback_one[25] , \gpio_loopback_one[24] , \gpio_loopback_one[23] , \gpio_loopback_one[22] , \gpio_loopback_one[21] , \gpio_loopback_one[20] , \gpio_loopback_one[19] , \gpio_loopback_one[18] , \gpio_loopback_one[17] , \gpio_loopback_one[16] , \gpio_loopback_one[15] , \gpio_loopback_one[14] , \gpio_loopback_one[13] , \gpio_loopback_one[12] , \gpio_loopback_one[11] , \gpio_loopback_one[10] , \gpio_loopback_one[9] , \gpio_loopback_one[8] , \gpio_loopback_one[7] , \gpio_loopback_one[6] , \gpio_loopback_one[5] , \gpio_loopback_one[4] , \gpio_loopback_one[3] , \gpio_loopback_one[2] , \gpio_loopback_one[1] , \gpio_loopback_one[0] }), + .gpio_loopback_zero({ \gpio_loopback_zero[43] , \gpio_loopback_zero[42] , \gpio_loopback_zero[41] , \gpio_loopback_zero[40] , \gpio_loopback_zero[39] , \gpio_loopback_zero[38] , \gpio_loopback_zero[37] , \gpio_loopback_zero[36] , \gpio_loopback_zero[35] , \gpio_loopback_zero[34] , \gpio_loopback_zero[33] , \gpio_loopback_zero[32] , \gpio_loopback_zero[31] , \gpio_loopback_zero[30] , \gpio_loopback_zero[29] , \gpio_loopback_zero[28] , \gpio_loopback_zero[27] , \gpio_loopback_zero[26] , \gpio_loopback_zero[25] , \gpio_loopback_zero[24] , \gpio_loopback_zero[23] , \gpio_loopback_zero[22] , \gpio_loopback_zero[21] , \gpio_loopback_zero[20] , \gpio_loopback_zero[19] , \gpio_loopback_zero[18] , \gpio_loopback_zero[17] , \gpio_loopback_zero[16] , \gpio_loopback_zero[15] , \gpio_loopback_zero[14] , \gpio_loopback_zero[13] , \gpio_loopback_zero[12] , \gpio_loopback_zero[11] , \gpio_loopback_zero[10] , \gpio_loopback_zero[9] , \gpio_loopback_zero[8] , \gpio_loopback_zero[7] , \gpio_loopback_zero[6] , \gpio_loopback_zero[5] , \gpio_loopback_zero[4] , \gpio_loopback_zero[3] , \gpio_loopback_zero[2] , \gpio_loopback_zero[1] , \gpio_loopback_zero[0] }), + .gpio_oeb({ \gpio_oeb[43] , \gpio_oeb[42] , \gpio_oeb[41] , \gpio_oeb[40] , \gpio_oeb[39] , \gpio_oeb[38] , \gpio_oeb[37] , \gpio_oeb[36] , \gpio_oeb[35] , \gpio_oeb[34] , \gpio_oeb[33] , \gpio_oeb[32] , \gpio_oeb[31] , \gpio_oeb[30] , \gpio_oeb[29] , \gpio_oeb[28] , \gpio_oeb[27] , \gpio_oeb[26] , \gpio_oeb[25] , \gpio_oeb[24] , \gpio_oeb[23] , \gpio_oeb[22] , \gpio_oeb[21] , \gpio_oeb[20] , \gpio_oeb[19] , \gpio_oeb[18] , \gpio_oeb[17] , \gpio_oeb[16] , \gpio_oeb[15] , \gpio_oeb[14] , \gpio_oeb[13] , \gpio_oeb[12] , \gpio_oeb[11] , \gpio_oeb[10] , \gpio_oeb[9] , \gpio_oeb[8] , \gpio_oeb[7] , \gpio_oeb[6] , \gpio_oeb[5] , \gpio_oeb[4] , \gpio_oeb[3] , \gpio_oeb[2] , \gpio_oeb[1] , \gpio_oeb[0] }), + .gpio_out({ \gpio_out[43] , \gpio_out[42] , \gpio_out[41] , \gpio_out[40] , \gpio_out[39] , \gpio_out[38] , \gpio_out[37] , \gpio_out[36] , \gpio_out[35] , \gpio_out[34] , \gpio_out[33] , \gpio_out[32] , \gpio_out[31] , \gpio_out[30] , \gpio_out[29] , \gpio_out[28] , \gpio_out[27] , \gpio_out[26] , \gpio_out[25] , \gpio_out[24] , \gpio_out[23] , \gpio_out[22] , \gpio_out[21] , \gpio_out[20] , \gpio_out[19] , \gpio_out[18] , \gpio_out[17] , \gpio_out[16] , \gpio_out[15] , \gpio_out[14] , \gpio_out[13] , \gpio_out[12] , \gpio_out[11] , \gpio_out[10] , \gpio_out[9] , \gpio_out[8] , \gpio_out[7] , \gpio_out[6] , \gpio_out[5] , \gpio_out[4] , \gpio_out[3] , \gpio_out[2] , \gpio_out[1] , \gpio_out[0] }), + .gpio_slow_sel({ \gpio_slow_sel[43] , \gpio_slow_sel[42] , \gpio_slow_sel[41] , \gpio_slow_sel[40] , \gpio_slow_sel[39] , \gpio_slow_sel[38] , \gpio_slow_sel[37] , \gpio_slow_sel[36] , \gpio_slow_sel[35] , \gpio_slow_sel[34] , \gpio_slow_sel[33] , \gpio_slow_sel[32] , \gpio_slow_sel[31] , \gpio_slow_sel[30] , \gpio_slow_sel[29] , \gpio_slow_sel[28] , \gpio_slow_sel[27] , \gpio_slow_sel[26] , \gpio_slow_sel[25] , \gpio_slow_sel[24] , \gpio_slow_sel[23] , \gpio_slow_sel[22] , \gpio_slow_sel[21] , \gpio_slow_sel[20] , \gpio_slow_sel[19] , \gpio_slow_sel[18] , \gpio_slow_sel[17] , \gpio_slow_sel[16] , \gpio_slow_sel[15] , \gpio_slow_sel[14] , \gpio_slow_sel[13] , \gpio_slow_sel[12] , \gpio_slow_sel[11] , \gpio_slow_sel[10] , \gpio_slow_sel[9] , \gpio_slow_sel[8] , \gpio_slow_sel[7] , \gpio_slow_sel[6] , \gpio_slow_sel[5] , \gpio_slow_sel[4] , \gpio_slow_sel[3] , \gpio_slow_sel[2] , \gpio_slow_sel[1] , \gpio_slow_sel[0] }), + .gpio_vtrip_sel({ \gpio_vtrip_sel[43] , \gpio_vtrip_sel[42] , \gpio_vtrip_sel[41] , \gpio_vtrip_sel[40] , \gpio_vtrip_sel[39] , \gpio_vtrip_sel[38] , \gpio_vtrip_sel[37] , \gpio_vtrip_sel[36] , \gpio_vtrip_sel[35] , \gpio_vtrip_sel[34] , \gpio_vtrip_sel[33] , \gpio_vtrip_sel[32] , \gpio_vtrip_sel[31] , \gpio_vtrip_sel[30] , \gpio_vtrip_sel[29] , \gpio_vtrip_sel[28] , \gpio_vtrip_sel[27] , \gpio_vtrip_sel[26] , \gpio_vtrip_sel[25] , \gpio_vtrip_sel[24] , \gpio_vtrip_sel[23] , \gpio_vtrip_sel[22] , \gpio_vtrip_sel[21] , \gpio_vtrip_sel[20] , \gpio_vtrip_sel[19] , \gpio_vtrip_sel[18] , \gpio_vtrip_sel[17] , \gpio_vtrip_sel[16] , \gpio_vtrip_sel[15] , \gpio_vtrip_sel[14] , \gpio_vtrip_sel[13] , \gpio_vtrip_sel[12] , \gpio_vtrip_sel[11] , \gpio_vtrip_sel[10] , \gpio_vtrip_sel[9] , \gpio_vtrip_sel[8] , \gpio_vtrip_sel[7] , \gpio_vtrip_sel[6] , \gpio_vtrip_sel[5] , \gpio_vtrip_sel[4] , \gpio_vtrip_sel[3] , \gpio_vtrip_sel[2] , \gpio_vtrip_sel[1] , \gpio_vtrip_sel[0] }), + .mask_rev({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0] }), + .por_l(por_l), + .porb_h(porb_h), + .porb_l(porb_l), + .resetb_h(rstb_h), + .resetb_l(rstb_l), + .vccd1(vccd1_core), + .vssd1(vssd1_core) + ); +endmodule diff --git a/verilog/gl/caravel_openframe.v b/verilog/gl/caravel_openframe.v new file mode 100644 index 00000000..ffbbc634 --- /dev/null +++ b/verilog/gl/caravel_openframe.v @@ -0,0 +1,1031 @@ +/* Generated by Yosys 0.30+48 (git sha1 14d50a176d5, gcc 8.3.1 -fPIC -Os) */ + +module caravel_openframe(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vdda1_2, vdda2, vssa1, vssa1_2, vssa2, vccd1, vccd2, vssd1, vssd2, gpio, resetb); + wire \analog_io[0] ; + wire \analog_io[10] ; + wire \analog_io[11] ; + wire \analog_io[12] ; + wire \analog_io[13] ; + wire \analog_io[14] ; + wire \analog_io[15] ; + wire \analog_io[16] ; + wire \analog_io[17] ; + wire \analog_io[18] ; + wire \analog_io[19] ; + wire \analog_io[1] ; + wire \analog_io[20] ; + wire \analog_io[21] ; + wire \analog_io[22] ; + wire \analog_io[23] ; + wire \analog_io[24] ; + wire \analog_io[25] ; + wire \analog_io[26] ; + wire \analog_io[27] ; + wire \analog_io[28] ; + wire \analog_io[29] ; + wire \analog_io[2] ; + wire \analog_io[30] ; + wire \analog_io[31] ; + wire \analog_io[32] ; + wire \analog_io[33] ; + wire \analog_io[34] ; + wire \analog_io[35] ; + wire \analog_io[36] ; + wire \analog_io[37] ; + wire \analog_io[38] ; + wire \analog_io[39] ; + wire \analog_io[3] ; + wire \analog_io[40] ; + wire \analog_io[41] ; + wire \analog_io[42] ; + wire \analog_io[43] ; + wire \analog_io[4] ; + wire \analog_io[5] ; + wire \analog_io[6] ; + wire \analog_io[7] ; + wire \analog_io[8] ; + wire \analog_io[9] ; + wire \analog_noesd_io[0] ; + wire \analog_noesd_io[10] ; + wire \analog_noesd_io[11] ; + wire \analog_noesd_io[12] ; + wire \analog_noesd_io[13] ; + wire \analog_noesd_io[14] ; + wire \analog_noesd_io[15] ; + wire \analog_noesd_io[16] ; + wire \analog_noesd_io[17] ; + wire \analog_noesd_io[18] ; + wire \analog_noesd_io[19] ; + wire \analog_noesd_io[1] ; + wire \analog_noesd_io[20] ; + wire \analog_noesd_io[21] ; + wire \analog_noesd_io[22] ; + wire \analog_noesd_io[23] ; + wire \analog_noesd_io[24] ; + wire \analog_noesd_io[25] ; + wire \analog_noesd_io[26] ; + wire \analog_noesd_io[27] ; + wire \analog_noesd_io[28] ; + wire \analog_noesd_io[29] ; + wire \analog_noesd_io[2] ; + wire \analog_noesd_io[30] ; + wire \analog_noesd_io[31] ; + wire \analog_noesd_io[32] ; + wire \analog_noesd_io[33] ; + wire \analog_noesd_io[34] ; + wire \analog_noesd_io[35] ; + wire \analog_noesd_io[36] ; + wire \analog_noesd_io[37] ; + wire \analog_noesd_io[38] ; + wire \analog_noesd_io[39] ; + wire \analog_noesd_io[3] ; + wire \analog_noesd_io[40] ; + wire \analog_noesd_io[41] ; + wire \analog_noesd_io[42] ; + wire \analog_noesd_io[43] ; + wire \analog_noesd_io[4] ; + wire \analog_noesd_io[5] ; + wire \analog_noesd_io[6] ; + wire \analog_noesd_io[7] ; + wire \analog_noesd_io[8] ; + wire \analog_noesd_io[9] ; + inout [43:0] gpio; + wire [43:0] gpio; + wire \gpio_analog_en[0] ; + wire \gpio_analog_en[10] ; + wire \gpio_analog_en[11] ; + wire \gpio_analog_en[12] ; + wire \gpio_analog_en[13] ; + wire \gpio_analog_en[14] ; + wire \gpio_analog_en[15] ; + wire \gpio_analog_en[16] ; + wire \gpio_analog_en[17] ; + wire \gpio_analog_en[18] ; + wire \gpio_analog_en[19] ; + wire \gpio_analog_en[1] ; + wire \gpio_analog_en[20] ; + wire \gpio_analog_en[21] ; + wire \gpio_analog_en[22] ; + wire \gpio_analog_en[23] ; + wire \gpio_analog_en[24] ; + wire \gpio_analog_en[25] ; + wire \gpio_analog_en[26] ; + wire \gpio_analog_en[27] ; + wire \gpio_analog_en[28] ; + wire \gpio_analog_en[29] ; + wire \gpio_analog_en[2] ; + wire \gpio_analog_en[30] ; + wire \gpio_analog_en[31] ; + wire \gpio_analog_en[32] ; + wire \gpio_analog_en[33] ; + wire \gpio_analog_en[34] ; + wire \gpio_analog_en[35] ; + wire \gpio_analog_en[36] ; + wire \gpio_analog_en[37] ; + wire \gpio_analog_en[38] ; + wire \gpio_analog_en[39] ; + wire \gpio_analog_en[3] ; + wire \gpio_analog_en[40] ; + wire \gpio_analog_en[41] ; + wire \gpio_analog_en[42] ; + wire \gpio_analog_en[43] ; + wire \gpio_analog_en[4] ; + wire \gpio_analog_en[5] ; + wire \gpio_analog_en[6] ; + wire \gpio_analog_en[7] ; + wire \gpio_analog_en[8] ; + wire \gpio_analog_en[9] ; + wire \gpio_analog_pol[0] ; + wire \gpio_analog_pol[10] ; + wire \gpio_analog_pol[11] ; + wire \gpio_analog_pol[12] ; + wire \gpio_analog_pol[13] ; + wire \gpio_analog_pol[14] ; + wire \gpio_analog_pol[15] ; + wire \gpio_analog_pol[16] ; + wire \gpio_analog_pol[17] ; + wire \gpio_analog_pol[18] ; + wire \gpio_analog_pol[19] ; + wire \gpio_analog_pol[1] ; + wire \gpio_analog_pol[20] ; + wire \gpio_analog_pol[21] ; + wire \gpio_analog_pol[22] ; + wire \gpio_analog_pol[23] ; + wire \gpio_analog_pol[24] ; + wire \gpio_analog_pol[25] ; + wire \gpio_analog_pol[26] ; + wire \gpio_analog_pol[27] ; + wire \gpio_analog_pol[28] ; + wire \gpio_analog_pol[29] ; + wire \gpio_analog_pol[2] ; + wire \gpio_analog_pol[30] ; + wire \gpio_analog_pol[31] ; + wire \gpio_analog_pol[32] ; + wire \gpio_analog_pol[33] ; + wire \gpio_analog_pol[34] ; + wire \gpio_analog_pol[35] ; + wire \gpio_analog_pol[36] ; + wire \gpio_analog_pol[37] ; + wire \gpio_analog_pol[38] ; + wire \gpio_analog_pol[39] ; + wire \gpio_analog_pol[3] ; + wire \gpio_analog_pol[40] ; + wire \gpio_analog_pol[41] ; + wire \gpio_analog_pol[42] ; + wire \gpio_analog_pol[43] ; + wire \gpio_analog_pol[4] ; + wire \gpio_analog_pol[5] ; + wire \gpio_analog_pol[6] ; + wire \gpio_analog_pol[7] ; + wire \gpio_analog_pol[8] ; + wire \gpio_analog_pol[9] ; + wire \gpio_analog_sel[0] ; + wire \gpio_analog_sel[10] ; + wire \gpio_analog_sel[11] ; + wire \gpio_analog_sel[12] ; + wire \gpio_analog_sel[13] ; + wire \gpio_analog_sel[14] ; + wire \gpio_analog_sel[15] ; + wire \gpio_analog_sel[16] ; + wire \gpio_analog_sel[17] ; + wire \gpio_analog_sel[18] ; + wire \gpio_analog_sel[19] ; + wire \gpio_analog_sel[1] ; + wire \gpio_analog_sel[20] ; + wire \gpio_analog_sel[21] ; + wire \gpio_analog_sel[22] ; + wire \gpio_analog_sel[23] ; + wire \gpio_analog_sel[24] ; + wire \gpio_analog_sel[25] ; + wire \gpio_analog_sel[26] ; + wire \gpio_analog_sel[27] ; + wire \gpio_analog_sel[28] ; + wire \gpio_analog_sel[29] ; + wire \gpio_analog_sel[2] ; + wire \gpio_analog_sel[30] ; + wire \gpio_analog_sel[31] ; + wire \gpio_analog_sel[32] ; + wire \gpio_analog_sel[33] ; + wire \gpio_analog_sel[34] ; + wire \gpio_analog_sel[35] ; + wire \gpio_analog_sel[36] ; + wire \gpio_analog_sel[37] ; + wire \gpio_analog_sel[38] ; + wire \gpio_analog_sel[39] ; + wire \gpio_analog_sel[3] ; + wire \gpio_analog_sel[40] ; + wire \gpio_analog_sel[41] ; + wire \gpio_analog_sel[42] ; + wire \gpio_analog_sel[43] ; + wire \gpio_analog_sel[4] ; + wire \gpio_analog_sel[5] ; + wire \gpio_analog_sel[6] ; + wire \gpio_analog_sel[7] ; + wire \gpio_analog_sel[8] ; + wire \gpio_analog_sel[9] ; + wire \gpio_dm0[0] ; + wire \gpio_dm0[10] ; + wire \gpio_dm0[11] ; + wire \gpio_dm0[12] ; + wire \gpio_dm0[13] ; + wire \gpio_dm0[14] ; + wire \gpio_dm0[15] ; + wire \gpio_dm0[16] ; + wire \gpio_dm0[17] ; + wire \gpio_dm0[18] ; + wire \gpio_dm0[19] ; + wire \gpio_dm0[1] ; + wire \gpio_dm0[20] ; + wire \gpio_dm0[21] ; + wire \gpio_dm0[22] ; + wire \gpio_dm0[23] ; + wire \gpio_dm0[24] ; + wire \gpio_dm0[25] ; + wire \gpio_dm0[26] ; + wire \gpio_dm0[27] ; + wire \gpio_dm0[28] ; + wire \gpio_dm0[29] ; + wire \gpio_dm0[2] ; + wire \gpio_dm0[30] ; + wire \gpio_dm0[31] ; + wire \gpio_dm0[32] ; + wire \gpio_dm0[33] ; + wire \gpio_dm0[34] ; + wire \gpio_dm0[35] ; + wire \gpio_dm0[36] ; + wire \gpio_dm0[37] ; + wire \gpio_dm0[38] ; + wire \gpio_dm0[39] ; + wire \gpio_dm0[3] ; + wire \gpio_dm0[40] ; + wire \gpio_dm0[41] ; + wire \gpio_dm0[42] ; + wire \gpio_dm0[43] ; + wire \gpio_dm0[4] ; + wire \gpio_dm0[5] ; + wire \gpio_dm0[6] ; + wire \gpio_dm0[7] ; + wire \gpio_dm0[8] ; + wire \gpio_dm0[9] ; + wire \gpio_dm1[0] ; + wire \gpio_dm1[10] ; + wire \gpio_dm1[11] ; + wire \gpio_dm1[12] ; + wire \gpio_dm1[13] ; + wire \gpio_dm1[14] ; + wire \gpio_dm1[15] ; + wire \gpio_dm1[16] ; + wire \gpio_dm1[17] ; + wire \gpio_dm1[18] ; + wire \gpio_dm1[19] ; + wire \gpio_dm1[1] ; + wire \gpio_dm1[20] ; + wire \gpio_dm1[21] ; + wire \gpio_dm1[22] ; + wire \gpio_dm1[23] ; + wire \gpio_dm1[24] ; + wire \gpio_dm1[25] ; + wire \gpio_dm1[26] ; + wire \gpio_dm1[27] ; + wire \gpio_dm1[28] ; + wire \gpio_dm1[29] ; + wire \gpio_dm1[2] ; + wire \gpio_dm1[30] ; + wire \gpio_dm1[31] ; + wire \gpio_dm1[32] ; + wire \gpio_dm1[33] ; + wire \gpio_dm1[34] ; + wire \gpio_dm1[35] ; + wire \gpio_dm1[36] ; + wire \gpio_dm1[37] ; + wire \gpio_dm1[38] ; + wire \gpio_dm1[39] ; + wire \gpio_dm1[3] ; + wire \gpio_dm1[40] ; + wire \gpio_dm1[41] ; + wire \gpio_dm1[42] ; + wire \gpio_dm1[43] ; + wire \gpio_dm1[4] ; + wire \gpio_dm1[5] ; + wire \gpio_dm1[6] ; + wire \gpio_dm1[7] ; + wire \gpio_dm1[8] ; + wire \gpio_dm1[9] ; + wire \gpio_dm2[0] ; + wire \gpio_dm2[10] ; + wire \gpio_dm2[11] ; + wire \gpio_dm2[12] ; + wire \gpio_dm2[13] ; + wire \gpio_dm2[14] ; + wire \gpio_dm2[15] ; + wire \gpio_dm2[16] ; + wire \gpio_dm2[17] ; + wire \gpio_dm2[18] ; + wire \gpio_dm2[19] ; + wire \gpio_dm2[1] ; + wire \gpio_dm2[20] ; + wire \gpio_dm2[21] ; + wire \gpio_dm2[22] ; + wire \gpio_dm2[23] ; + wire \gpio_dm2[24] ; + wire \gpio_dm2[25] ; + wire \gpio_dm2[26] ; + wire \gpio_dm2[27] ; + wire \gpio_dm2[28] ; + wire \gpio_dm2[29] ; + wire \gpio_dm2[2] ; + wire \gpio_dm2[30] ; + wire \gpio_dm2[31] ; + wire \gpio_dm2[32] ; + wire \gpio_dm2[33] ; + wire \gpio_dm2[34] ; + wire \gpio_dm2[35] ; + wire \gpio_dm2[36] ; + wire \gpio_dm2[37] ; + wire \gpio_dm2[38] ; + wire \gpio_dm2[39] ; + wire \gpio_dm2[3] ; + wire \gpio_dm2[40] ; + wire \gpio_dm2[41] ; + wire \gpio_dm2[42] ; + wire \gpio_dm2[43] ; + wire \gpio_dm2[4] ; + wire \gpio_dm2[5] ; + wire \gpio_dm2[6] ; + wire \gpio_dm2[7] ; + wire \gpio_dm2[8] ; + wire \gpio_dm2[9] ; + wire \gpio_holdover[0] ; + wire \gpio_holdover[10] ; + wire \gpio_holdover[11] ; + wire \gpio_holdover[12] ; + wire \gpio_holdover[13] ; + wire \gpio_holdover[14] ; + wire \gpio_holdover[15] ; + wire \gpio_holdover[16] ; + wire \gpio_holdover[17] ; + wire \gpio_holdover[18] ; + wire \gpio_holdover[19] ; + wire \gpio_holdover[1] ; + wire \gpio_holdover[20] ; + wire \gpio_holdover[21] ; + wire \gpio_holdover[22] ; + wire \gpio_holdover[23] ; + wire \gpio_holdover[24] ; + wire \gpio_holdover[25] ; + wire \gpio_holdover[26] ; + wire \gpio_holdover[27] ; + wire \gpio_holdover[28] ; + wire \gpio_holdover[29] ; + wire \gpio_holdover[2] ; + wire \gpio_holdover[30] ; + wire \gpio_holdover[31] ; + wire \gpio_holdover[32] ; + wire \gpio_holdover[33] ; + wire \gpio_holdover[34] ; + wire \gpio_holdover[35] ; + wire \gpio_holdover[36] ; + wire \gpio_holdover[37] ; + wire \gpio_holdover[38] ; + wire \gpio_holdover[39] ; + wire \gpio_holdover[3] ; + wire \gpio_holdover[40] ; + wire \gpio_holdover[41] ; + wire \gpio_holdover[42] ; + wire \gpio_holdover[43] ; + wire \gpio_holdover[4] ; + wire \gpio_holdover[5] ; + wire \gpio_holdover[6] ; + wire \gpio_holdover[7] ; + wire \gpio_holdover[8] ; + wire \gpio_holdover[9] ; + wire \gpio_ib_mode_sel[0] ; + wire \gpio_ib_mode_sel[10] ; + wire \gpio_ib_mode_sel[11] ; + wire \gpio_ib_mode_sel[12] ; + wire \gpio_ib_mode_sel[13] ; + wire \gpio_ib_mode_sel[14] ; + wire \gpio_ib_mode_sel[15] ; + wire \gpio_ib_mode_sel[16] ; + wire \gpio_ib_mode_sel[17] ; + wire \gpio_ib_mode_sel[18] ; + wire \gpio_ib_mode_sel[19] ; + wire \gpio_ib_mode_sel[1] ; + wire \gpio_ib_mode_sel[20] ; + wire \gpio_ib_mode_sel[21] ; + wire \gpio_ib_mode_sel[22] ; + wire \gpio_ib_mode_sel[23] ; + wire \gpio_ib_mode_sel[24] ; + wire \gpio_ib_mode_sel[25] ; + wire \gpio_ib_mode_sel[26] ; + wire \gpio_ib_mode_sel[27] ; + wire \gpio_ib_mode_sel[28] ; + wire \gpio_ib_mode_sel[29] ; + wire \gpio_ib_mode_sel[2] ; + wire \gpio_ib_mode_sel[30] ; + wire \gpio_ib_mode_sel[31] ; + wire \gpio_ib_mode_sel[32] ; + wire \gpio_ib_mode_sel[33] ; + wire \gpio_ib_mode_sel[34] ; + wire \gpio_ib_mode_sel[35] ; + wire \gpio_ib_mode_sel[36] ; + wire \gpio_ib_mode_sel[37] ; + wire \gpio_ib_mode_sel[38] ; + wire \gpio_ib_mode_sel[39] ; + wire \gpio_ib_mode_sel[3] ; + wire \gpio_ib_mode_sel[40] ; + wire \gpio_ib_mode_sel[41] ; + wire \gpio_ib_mode_sel[42] ; + wire \gpio_ib_mode_sel[43] ; + wire \gpio_ib_mode_sel[4] ; + wire \gpio_ib_mode_sel[5] ; + wire \gpio_ib_mode_sel[6] ; + wire \gpio_ib_mode_sel[7] ; + wire \gpio_ib_mode_sel[8] ; + wire \gpio_ib_mode_sel[9] ; + wire \gpio_in[0] ; + wire \gpio_in[10] ; + wire \gpio_in[11] ; + wire \gpio_in[12] ; + wire \gpio_in[13] ; + wire \gpio_in[14] ; + wire \gpio_in[15] ; + wire \gpio_in[16] ; + wire \gpio_in[17] ; + wire \gpio_in[18] ; + wire \gpio_in[19] ; + wire \gpio_in[1] ; + wire \gpio_in[20] ; + wire \gpio_in[21] ; + wire \gpio_in[22] ; + wire \gpio_in[23] ; + wire \gpio_in[24] ; + wire \gpio_in[25] ; + wire \gpio_in[26] ; + wire \gpio_in[27] ; + wire \gpio_in[28] ; + wire \gpio_in[29] ; + wire \gpio_in[2] ; + wire \gpio_in[30] ; + wire \gpio_in[31] ; + wire \gpio_in[32] ; + wire \gpio_in[33] ; + wire \gpio_in[34] ; + wire \gpio_in[35] ; + wire \gpio_in[36] ; + wire \gpio_in[37] ; + wire \gpio_in[38] ; + wire \gpio_in[39] ; + wire \gpio_in[3] ; + wire \gpio_in[40] ; + wire \gpio_in[41] ; + wire \gpio_in[42] ; + wire \gpio_in[43] ; + wire \gpio_in[4] ; + wire \gpio_in[5] ; + wire \gpio_in[6] ; + wire \gpio_in[7] ; + wire \gpio_in[8] ; + wire \gpio_in[9] ; + wire \gpio_in_h[0] ; + wire \gpio_in_h[10] ; + wire \gpio_in_h[11] ; + wire \gpio_in_h[12] ; + wire \gpio_in_h[13] ; + wire \gpio_in_h[14] ; + wire \gpio_in_h[15] ; + wire \gpio_in_h[16] ; + wire \gpio_in_h[17] ; + wire \gpio_in_h[18] ; + wire \gpio_in_h[19] ; + wire \gpio_in_h[1] ; + wire \gpio_in_h[20] ; + wire \gpio_in_h[21] ; + wire \gpio_in_h[22] ; + wire \gpio_in_h[23] ; + wire \gpio_in_h[24] ; + wire \gpio_in_h[25] ; + wire \gpio_in_h[26] ; + wire \gpio_in_h[27] ; + wire \gpio_in_h[28] ; + wire \gpio_in_h[29] ; + wire \gpio_in_h[2] ; + wire \gpio_in_h[30] ; + wire \gpio_in_h[31] ; + wire \gpio_in_h[32] ; + wire \gpio_in_h[33] ; + wire \gpio_in_h[34] ; + wire \gpio_in_h[35] ; + wire \gpio_in_h[36] ; + wire \gpio_in_h[37] ; + wire \gpio_in_h[38] ; + wire \gpio_in_h[39] ; + wire \gpio_in_h[3] ; + wire \gpio_in_h[40] ; + wire \gpio_in_h[41] ; + wire \gpio_in_h[42] ; + wire \gpio_in_h[43] ; + wire \gpio_in_h[4] ; + wire \gpio_in_h[5] ; + wire \gpio_in_h[6] ; + wire \gpio_in_h[7] ; + wire \gpio_in_h[8] ; + wire \gpio_in_h[9] ; + wire \gpio_inp_dis[0] ; + wire \gpio_inp_dis[10] ; + wire \gpio_inp_dis[11] ; + wire \gpio_inp_dis[12] ; + wire \gpio_inp_dis[13] ; + wire \gpio_inp_dis[14] ; + wire \gpio_inp_dis[15] ; + wire \gpio_inp_dis[16] ; + wire \gpio_inp_dis[17] ; + wire \gpio_inp_dis[18] ; + wire \gpio_inp_dis[19] ; + wire \gpio_inp_dis[1] ; + wire \gpio_inp_dis[20] ; + wire \gpio_inp_dis[21] ; + wire \gpio_inp_dis[22] ; + wire \gpio_inp_dis[23] ; + wire \gpio_inp_dis[24] ; + wire \gpio_inp_dis[25] ; + wire \gpio_inp_dis[26] ; + wire \gpio_inp_dis[27] ; + wire \gpio_inp_dis[28] ; + wire \gpio_inp_dis[29] ; + wire \gpio_inp_dis[2] ; + wire \gpio_inp_dis[30] ; + wire \gpio_inp_dis[31] ; + wire \gpio_inp_dis[32] ; + wire \gpio_inp_dis[33] ; + wire \gpio_inp_dis[34] ; + wire \gpio_inp_dis[35] ; + wire \gpio_inp_dis[36] ; + wire \gpio_inp_dis[37] ; + wire \gpio_inp_dis[38] ; + wire \gpio_inp_dis[39] ; + wire \gpio_inp_dis[3] ; + wire \gpio_inp_dis[40] ; + wire \gpio_inp_dis[41] ; + wire \gpio_inp_dis[42] ; + wire \gpio_inp_dis[43] ; + wire \gpio_inp_dis[4] ; + wire \gpio_inp_dis[5] ; + wire \gpio_inp_dis[6] ; + wire \gpio_inp_dis[7] ; + wire \gpio_inp_dis[8] ; + wire \gpio_inp_dis[9] ; + wire \gpio_loopback_one[0] ; + wire \gpio_loopback_one[10] ; + wire \gpio_loopback_one[11] ; + wire \gpio_loopback_one[12] ; + wire \gpio_loopback_one[13] ; + wire \gpio_loopback_one[14] ; + wire \gpio_loopback_one[15] ; + wire \gpio_loopback_one[16] ; + wire \gpio_loopback_one[17] ; + wire \gpio_loopback_one[18] ; + wire \gpio_loopback_one[19] ; + wire \gpio_loopback_one[1] ; + wire \gpio_loopback_one[20] ; + wire \gpio_loopback_one[21] ; + wire \gpio_loopback_one[22] ; + wire \gpio_loopback_one[23] ; + wire \gpio_loopback_one[24] ; + wire \gpio_loopback_one[25] ; + wire \gpio_loopback_one[26] ; + wire \gpio_loopback_one[27] ; + wire \gpio_loopback_one[28] ; + wire \gpio_loopback_one[29] ; + wire \gpio_loopback_one[2] ; + wire \gpio_loopback_one[30] ; + wire \gpio_loopback_one[31] ; + wire \gpio_loopback_one[32] ; + wire \gpio_loopback_one[33] ; + wire \gpio_loopback_one[34] ; + wire \gpio_loopback_one[35] ; + wire \gpio_loopback_one[36] ; + wire \gpio_loopback_one[37] ; + wire \gpio_loopback_one[38] ; + wire \gpio_loopback_one[39] ; + wire \gpio_loopback_one[3] ; + wire \gpio_loopback_one[40] ; + wire \gpio_loopback_one[41] ; + wire \gpio_loopback_one[42] ; + wire \gpio_loopback_one[43] ; + wire \gpio_loopback_one[4] ; + wire \gpio_loopback_one[5] ; + wire \gpio_loopback_one[6] ; + wire \gpio_loopback_one[7] ; + wire \gpio_loopback_one[8] ; + wire \gpio_loopback_one[9] ; + wire \gpio_loopback_zero[0] ; + wire \gpio_loopback_zero[10] ; + wire \gpio_loopback_zero[11] ; + wire \gpio_loopback_zero[12] ; + wire \gpio_loopback_zero[13] ; + wire \gpio_loopback_zero[14] ; + wire \gpio_loopback_zero[15] ; + wire \gpio_loopback_zero[16] ; + wire \gpio_loopback_zero[17] ; + wire \gpio_loopback_zero[18] ; + wire \gpio_loopback_zero[19] ; + wire \gpio_loopback_zero[1] ; + wire \gpio_loopback_zero[20] ; + wire \gpio_loopback_zero[21] ; + wire \gpio_loopback_zero[22] ; + wire \gpio_loopback_zero[23] ; + wire \gpio_loopback_zero[24] ; + wire \gpio_loopback_zero[25] ; + wire \gpio_loopback_zero[26] ; + wire \gpio_loopback_zero[27] ; + wire \gpio_loopback_zero[28] ; + wire \gpio_loopback_zero[29] ; + wire \gpio_loopback_zero[2] ; + wire \gpio_loopback_zero[30] ; + wire \gpio_loopback_zero[31] ; + wire \gpio_loopback_zero[32] ; + wire \gpio_loopback_zero[33] ; + wire \gpio_loopback_zero[34] ; + wire \gpio_loopback_zero[35] ; + wire \gpio_loopback_zero[36] ; + wire \gpio_loopback_zero[37] ; + wire \gpio_loopback_zero[38] ; + wire \gpio_loopback_zero[39] ; + wire \gpio_loopback_zero[3] ; + wire \gpio_loopback_zero[40] ; + wire \gpio_loopback_zero[41] ; + wire \gpio_loopback_zero[42] ; + wire \gpio_loopback_zero[43] ; + wire \gpio_loopback_zero[4] ; + wire \gpio_loopback_zero[5] ; + wire \gpio_loopback_zero[6] ; + wire \gpio_loopback_zero[7] ; + wire \gpio_loopback_zero[8] ; + wire \gpio_loopback_zero[9] ; + wire \gpio_oeb[0] ; + wire \gpio_oeb[10] ; + wire \gpio_oeb[11] ; + wire \gpio_oeb[12] ; + wire \gpio_oeb[13] ; + wire \gpio_oeb[14] ; + wire \gpio_oeb[15] ; + wire \gpio_oeb[16] ; + wire \gpio_oeb[17] ; + wire \gpio_oeb[18] ; + wire \gpio_oeb[19] ; + wire \gpio_oeb[1] ; + wire \gpio_oeb[20] ; + wire \gpio_oeb[21] ; + wire \gpio_oeb[22] ; + wire \gpio_oeb[23] ; + wire \gpio_oeb[24] ; + wire \gpio_oeb[25] ; + wire \gpio_oeb[26] ; + wire \gpio_oeb[27] ; + wire \gpio_oeb[28] ; + wire \gpio_oeb[29] ; + wire \gpio_oeb[2] ; + wire \gpio_oeb[30] ; + wire \gpio_oeb[31] ; + wire \gpio_oeb[32] ; + wire \gpio_oeb[33] ; + wire \gpio_oeb[34] ; + wire \gpio_oeb[35] ; + wire \gpio_oeb[36] ; + wire \gpio_oeb[37] ; + wire \gpio_oeb[38] ; + wire \gpio_oeb[39] ; + wire \gpio_oeb[3] ; + wire \gpio_oeb[40] ; + wire \gpio_oeb[41] ; + wire \gpio_oeb[42] ; + wire \gpio_oeb[43] ; + wire \gpio_oeb[4] ; + wire \gpio_oeb[5] ; + wire \gpio_oeb[6] ; + wire \gpio_oeb[7] ; + wire \gpio_oeb[8] ; + wire \gpio_oeb[9] ; + wire \gpio_out[0] ; + wire \gpio_out[10] ; + wire \gpio_out[11] ; + wire \gpio_out[12] ; + wire \gpio_out[13] ; + wire \gpio_out[14] ; + wire \gpio_out[15] ; + wire \gpio_out[16] ; + wire \gpio_out[17] ; + wire \gpio_out[18] ; + wire \gpio_out[19] ; + wire \gpio_out[1] ; + wire \gpio_out[20] ; + wire \gpio_out[21] ; + wire \gpio_out[22] ; + wire \gpio_out[23] ; + wire \gpio_out[24] ; + wire \gpio_out[25] ; + wire \gpio_out[26] ; + wire \gpio_out[27] ; + wire \gpio_out[28] ; + wire \gpio_out[29] ; + wire \gpio_out[2] ; + wire \gpio_out[30] ; + wire \gpio_out[31] ; + wire \gpio_out[32] ; + wire \gpio_out[33] ; + wire \gpio_out[34] ; + wire \gpio_out[35] ; + wire \gpio_out[36] ; + wire \gpio_out[37] ; + wire \gpio_out[38] ; + wire \gpio_out[39] ; + wire \gpio_out[3] ; + wire \gpio_out[40] ; + wire \gpio_out[41] ; + wire \gpio_out[42] ; + wire \gpio_out[43] ; + wire \gpio_out[4] ; + wire \gpio_out[5] ; + wire \gpio_out[6] ; + wire \gpio_out[7] ; + wire \gpio_out[8] ; + wire \gpio_out[9] ; + wire \gpio_slow_sel[0] ; + wire \gpio_slow_sel[10] ; + wire \gpio_slow_sel[11] ; + wire \gpio_slow_sel[12] ; + wire \gpio_slow_sel[13] ; + wire \gpio_slow_sel[14] ; + wire \gpio_slow_sel[15] ; + wire \gpio_slow_sel[16] ; + wire \gpio_slow_sel[17] ; + wire \gpio_slow_sel[18] ; + wire \gpio_slow_sel[19] ; + wire \gpio_slow_sel[1] ; + wire \gpio_slow_sel[20] ; + wire \gpio_slow_sel[21] ; + wire \gpio_slow_sel[22] ; + wire \gpio_slow_sel[23] ; + wire \gpio_slow_sel[24] ; + wire \gpio_slow_sel[25] ; + wire \gpio_slow_sel[26] ; + wire \gpio_slow_sel[27] ; + wire \gpio_slow_sel[28] ; + wire \gpio_slow_sel[29] ; + wire \gpio_slow_sel[2] ; + wire \gpio_slow_sel[30] ; + wire \gpio_slow_sel[31] ; + wire \gpio_slow_sel[32] ; + wire \gpio_slow_sel[33] ; + wire \gpio_slow_sel[34] ; + wire \gpio_slow_sel[35] ; + wire \gpio_slow_sel[36] ; + wire \gpio_slow_sel[37] ; + wire \gpio_slow_sel[38] ; + wire \gpio_slow_sel[39] ; + wire \gpio_slow_sel[3] ; + wire \gpio_slow_sel[40] ; + wire \gpio_slow_sel[41] ; + wire \gpio_slow_sel[42] ; + wire \gpio_slow_sel[43] ; + wire \gpio_slow_sel[4] ; + wire \gpio_slow_sel[5] ; + wire \gpio_slow_sel[6] ; + wire \gpio_slow_sel[7] ; + wire \gpio_slow_sel[8] ; + wire \gpio_slow_sel[9] ; + wire \gpio_vtrip_sel[0] ; + wire \gpio_vtrip_sel[10] ; + wire \gpio_vtrip_sel[11] ; + wire \gpio_vtrip_sel[12] ; + wire \gpio_vtrip_sel[13] ; + wire \gpio_vtrip_sel[14] ; + wire \gpio_vtrip_sel[15] ; + wire \gpio_vtrip_sel[16] ; + wire \gpio_vtrip_sel[17] ; + wire \gpio_vtrip_sel[18] ; + wire \gpio_vtrip_sel[19] ; + wire \gpio_vtrip_sel[1] ; + wire \gpio_vtrip_sel[20] ; + wire \gpio_vtrip_sel[21] ; + wire \gpio_vtrip_sel[22] ; + wire \gpio_vtrip_sel[23] ; + wire \gpio_vtrip_sel[24] ; + wire \gpio_vtrip_sel[25] ; + wire \gpio_vtrip_sel[26] ; + wire \gpio_vtrip_sel[27] ; + wire \gpio_vtrip_sel[28] ; + wire \gpio_vtrip_sel[29] ; + wire \gpio_vtrip_sel[2] ; + wire \gpio_vtrip_sel[30] ; + wire \gpio_vtrip_sel[31] ; + wire \gpio_vtrip_sel[32] ; + wire \gpio_vtrip_sel[33] ; + wire \gpio_vtrip_sel[34] ; + wire \gpio_vtrip_sel[35] ; + wire \gpio_vtrip_sel[36] ; + wire \gpio_vtrip_sel[37] ; + wire \gpio_vtrip_sel[38] ; + wire \gpio_vtrip_sel[39] ; + wire \gpio_vtrip_sel[3] ; + wire \gpio_vtrip_sel[40] ; + wire \gpio_vtrip_sel[41] ; + wire \gpio_vtrip_sel[42] ; + wire \gpio_vtrip_sel[43] ; + wire \gpio_vtrip_sel[4] ; + wire \gpio_vtrip_sel[5] ; + wire \gpio_vtrip_sel[6] ; + wire \gpio_vtrip_sel[7] ; + wire \gpio_vtrip_sel[8] ; + wire \gpio_vtrip_sel[9] ; + wire \mask_rev[0] ; + wire \mask_rev[10] ; + wire \mask_rev[11] ; + wire \mask_rev[12] ; + wire \mask_rev[13] ; + wire \mask_rev[14] ; + wire \mask_rev[15] ; + wire \mask_rev[16] ; + wire \mask_rev[17] ; + wire \mask_rev[18] ; + wire \mask_rev[19] ; + wire \mask_rev[1] ; + wire \mask_rev[20] ; + wire \mask_rev[21] ; + wire \mask_rev[22] ; + wire \mask_rev[23] ; + wire \mask_rev[24] ; + wire \mask_rev[25] ; + wire \mask_rev[26] ; + wire \mask_rev[27] ; + wire \mask_rev[28] ; + wire \mask_rev[29] ; + wire \mask_rev[2] ; + wire \mask_rev[30] ; + wire \mask_rev[31] ; + wire \mask_rev[3] ; + wire \mask_rev[4] ; + wire \mask_rev[5] ; + wire \mask_rev[6] ; + wire \mask_rev[7] ; + wire \mask_rev[8] ; + wire \mask_rev[9] ; + wire por_l; + wire porb_h; + wire porb_l; + input resetb; + wire resetb; + wire rstb_h; + wire rstb_l; + inout vccd; + wire vccd; + inout vccd1; + wire vccd1; + wire vccd1_core; + inout vccd2; + wire vccd2; + wire vccd2_core; + wire vccd_core; + inout vdda; + wire vdda; + inout vdda1; + wire vdda1; + inout vdda1_2; + wire vdda1_2; + wire vdda1_core; + inout vdda2; + wire vdda2; + wire vdda2_core; + wire vdda_core; + inout vddio; + wire vddio; + inout vddio_2; + wire vddio_2; + wire vddio_core; + inout vssa; + wire vssa; + inout vssa1; + wire vssa1; + inout vssa1_2; + wire vssa1_2; + wire vssa1_core; + inout vssa2; + wire vssa2; + wire vssa2_core; + wire vssa_core; + inout vssd; + wire vssd; + inout vssd1; + wire vssd1; + wire vssd1_core; + inout vssd2; + wire vssd2; + wire vssd2_core; + wire vssd_core; + inout vssio; + wire vssio; + inout vssio_2; + wire vssio_2; + wire vssio_core; + chip_io_openframe padframe ( + .analog_io({ \analog_io[43] , \analog_io[42] , \analog_io[41] , \analog_io[40] , \analog_io[39] , \analog_io[38] , \analog_io[37] , \analog_io[36] , \analog_io[35] , \analog_io[34] , \analog_io[33] , \analog_io[32] , \analog_io[31] , \analog_io[30] , \analog_io[29] , \analog_io[28] , \analog_io[27] , \analog_io[26] , \analog_io[25] , \analog_io[24] , \analog_io[23] , \analog_io[22] , \analog_io[21] , \analog_io[20] , \analog_io[19] , \analog_io[18] , \analog_io[17] , \analog_io[16] , \analog_io[15] , \analog_io[14] , \analog_io[13] , \analog_io[12] , \analog_io[11] , \analog_io[10] , \analog_io[9] , \analog_io[8] , \analog_io[7] , \analog_io[6] , \analog_io[5] , \analog_io[4] , \analog_io[3] , \analog_io[2] , \analog_io[1] , \analog_io[0] }), + .analog_noesd_io({ \analog_noesd_io[43] , \analog_noesd_io[42] , \analog_noesd_io[41] , \analog_noesd_io[40] , \analog_noesd_io[39] , \analog_noesd_io[38] , \analog_noesd_io[37] , \analog_noesd_io[36] , \analog_noesd_io[35] , \analog_noesd_io[34] , \analog_noesd_io[33] , \analog_noesd_io[32] , \analog_noesd_io[31] , \analog_noesd_io[30] , \analog_noesd_io[29] , \analog_noesd_io[28] , \analog_noesd_io[27] , \analog_noesd_io[26] , \analog_noesd_io[25] , \analog_noesd_io[24] , \analog_noesd_io[23] , \analog_noesd_io[22] , \analog_noesd_io[21] , \analog_noesd_io[20] , \analog_noesd_io[19] , \analog_noesd_io[18] , \analog_noesd_io[17] , \analog_noesd_io[16] , \analog_noesd_io[15] , \analog_noesd_io[14] , \analog_noesd_io[13] , \analog_noesd_io[12] , \analog_noesd_io[11] , \analog_noesd_io[10] , \analog_noesd_io[9] , \analog_noesd_io[8] , \analog_noesd_io[7] , \analog_noesd_io[6] , \analog_noesd_io[5] , \analog_noesd_io[4] , \analog_noesd_io[3] , \analog_noesd_io[2] , \analog_noesd_io[1] , \analog_noesd_io[0] }), + .gpio(gpio), + .gpio_analog_en({ \gpio_analog_en[43] , \gpio_analog_en[42] , \gpio_analog_en[41] , \gpio_analog_en[40] , \gpio_analog_en[39] , \gpio_analog_en[38] , \gpio_analog_en[37] , \gpio_analog_en[36] , \gpio_analog_en[35] , \gpio_analog_en[34] , \gpio_analog_en[33] , \gpio_analog_en[32] , \gpio_analog_en[31] , \gpio_analog_en[30] , \gpio_analog_en[29] , \gpio_analog_en[28] , \gpio_analog_en[27] , \gpio_analog_en[26] , \gpio_analog_en[25] , \gpio_analog_en[24] , \gpio_analog_en[23] , \gpio_analog_en[22] , \gpio_analog_en[21] , \gpio_analog_en[20] , \gpio_analog_en[19] , \gpio_analog_en[18] , \gpio_analog_en[17] , \gpio_analog_en[16] , \gpio_analog_en[15] , \gpio_analog_en[14] , \gpio_analog_en[13] , \gpio_analog_en[12] , \gpio_analog_en[11] , \gpio_analog_en[10] , \gpio_analog_en[9] , \gpio_analog_en[8] , \gpio_analog_en[7] , \gpio_analog_en[6] , \gpio_analog_en[5] , \gpio_analog_en[4] , \gpio_analog_en[3] , \gpio_analog_en[2] , \gpio_analog_en[1] , \gpio_analog_en[0] }), + .gpio_analog_pol({ \gpio_analog_pol[43] , \gpio_analog_pol[42] , \gpio_analog_pol[41] , \gpio_analog_pol[40] , \gpio_analog_pol[39] , \gpio_analog_pol[38] , \gpio_analog_pol[37] , \gpio_analog_pol[36] , \gpio_analog_pol[35] , \gpio_analog_pol[34] , \gpio_analog_pol[33] , \gpio_analog_pol[32] , \gpio_analog_pol[31] , \gpio_analog_pol[30] , \gpio_analog_pol[29] , \gpio_analog_pol[28] , \gpio_analog_pol[27] , \gpio_analog_pol[26] , \gpio_analog_pol[25] , \gpio_analog_pol[24] , \gpio_analog_pol[23] , \gpio_analog_pol[22] , \gpio_analog_pol[21] , \gpio_analog_pol[20] , \gpio_analog_pol[19] , \gpio_analog_pol[18] , \gpio_analog_pol[17] , \gpio_analog_pol[16] , \gpio_analog_pol[15] , \gpio_analog_pol[14] , \gpio_analog_pol[13] , \gpio_analog_pol[12] , \gpio_analog_pol[11] , \gpio_analog_pol[10] , \gpio_analog_pol[9] , \gpio_analog_pol[8] , \gpio_analog_pol[7] , \gpio_analog_pol[6] , \gpio_analog_pol[5] , \gpio_analog_pol[4] , \gpio_analog_pol[3] , \gpio_analog_pol[2] , \gpio_analog_pol[1] , \gpio_analog_pol[0] }), + .gpio_analog_sel({ \gpio_analog_sel[43] , \gpio_analog_sel[42] , \gpio_analog_sel[41] , \gpio_analog_sel[40] , \gpio_analog_sel[39] , \gpio_analog_sel[38] , \gpio_analog_sel[37] , \gpio_analog_sel[36] , \gpio_analog_sel[35] , \gpio_analog_sel[34] , \gpio_analog_sel[33] , \gpio_analog_sel[32] , \gpio_analog_sel[31] , \gpio_analog_sel[30] , \gpio_analog_sel[29] , \gpio_analog_sel[28] , \gpio_analog_sel[27] , \gpio_analog_sel[26] , \gpio_analog_sel[25] , \gpio_analog_sel[24] , \gpio_analog_sel[23] , \gpio_analog_sel[22] , \gpio_analog_sel[21] , \gpio_analog_sel[20] , \gpio_analog_sel[19] , \gpio_analog_sel[18] , \gpio_analog_sel[17] , \gpio_analog_sel[16] , \gpio_analog_sel[15] , \gpio_analog_sel[14] , \gpio_analog_sel[13] , \gpio_analog_sel[12] , \gpio_analog_sel[11] , \gpio_analog_sel[10] , \gpio_analog_sel[9] , \gpio_analog_sel[8] , \gpio_analog_sel[7] , \gpio_analog_sel[6] , \gpio_analog_sel[5] , \gpio_analog_sel[4] , \gpio_analog_sel[3] , \gpio_analog_sel[2] , \gpio_analog_sel[1] , \gpio_analog_sel[0] }), + .gpio_dm0({ \gpio_dm0[43] , \gpio_dm0[42] , \gpio_dm0[41] , \gpio_dm0[40] , \gpio_dm0[39] , \gpio_dm0[38] , \gpio_dm0[37] , \gpio_dm0[36] , \gpio_dm0[35] , \gpio_dm0[34] , \gpio_dm0[33] , \gpio_dm0[32] , \gpio_dm0[31] , \gpio_dm0[30] , \gpio_dm0[29] , \gpio_dm0[28] , \gpio_dm0[27] , \gpio_dm0[26] , \gpio_dm0[25] , \gpio_dm0[24] , \gpio_dm0[23] , \gpio_dm0[22] , \gpio_dm0[21] , \gpio_dm0[20] , \gpio_dm0[19] , \gpio_dm0[18] , \gpio_dm0[17] , \gpio_dm0[16] , \gpio_dm0[15] , \gpio_dm0[14] , \gpio_dm0[13] , \gpio_dm0[12] , \gpio_dm0[11] , \gpio_dm0[10] , \gpio_dm0[9] , \gpio_dm0[8] , \gpio_dm0[7] , \gpio_dm0[6] , \gpio_dm0[5] , \gpio_dm0[4] , \gpio_dm0[3] , \gpio_dm0[2] , \gpio_dm0[1] , \gpio_dm0[0] }), + .gpio_dm1({ \gpio_dm1[43] , \gpio_dm1[42] , \gpio_dm1[41] , \gpio_dm1[40] , \gpio_dm1[39] , \gpio_dm1[38] , \gpio_dm1[37] , \gpio_dm1[36] , \gpio_dm1[35] , \gpio_dm1[34] , \gpio_dm1[33] , \gpio_dm1[32] , \gpio_dm1[31] , \gpio_dm1[30] , \gpio_dm1[29] , \gpio_dm1[28] , \gpio_dm1[27] , \gpio_dm1[26] , \gpio_dm1[25] , \gpio_dm1[24] , \gpio_dm1[23] , \gpio_dm1[22] , \gpio_dm1[21] , \gpio_dm1[20] , \gpio_dm1[19] , \gpio_dm1[18] , \gpio_dm1[17] , \gpio_dm1[16] , \gpio_dm1[15] , \gpio_dm1[14] , \gpio_dm1[13] , \gpio_dm1[12] , \gpio_dm1[11] , \gpio_dm1[10] , \gpio_dm1[9] , \gpio_dm1[8] , \gpio_dm1[7] , \gpio_dm1[6] , \gpio_dm1[5] , \gpio_dm1[4] , \gpio_dm1[3] , \gpio_dm1[2] , \gpio_dm1[1] , \gpio_dm1[0] }), + .gpio_dm2({ \gpio_dm2[43] , \gpio_dm2[42] , \gpio_dm2[41] , \gpio_dm2[40] , \gpio_dm2[39] , \gpio_dm2[38] , \gpio_dm2[37] , \gpio_dm2[36] , \gpio_dm2[35] , \gpio_dm2[34] , \gpio_dm2[33] , \gpio_dm2[32] , \gpio_dm2[31] , \gpio_dm2[30] , \gpio_dm2[29] , \gpio_dm2[28] , \gpio_dm2[27] , \gpio_dm2[26] , \gpio_dm2[25] , \gpio_dm2[24] , \gpio_dm2[23] , \gpio_dm2[22] , \gpio_dm2[21] , \gpio_dm2[20] , \gpio_dm2[19] , \gpio_dm2[18] , \gpio_dm2[17] , \gpio_dm2[16] , \gpio_dm2[15] , \gpio_dm2[14] , \gpio_dm2[13] , \gpio_dm2[12] , \gpio_dm2[11] , \gpio_dm2[10] , \gpio_dm2[9] , \gpio_dm2[8] , \gpio_dm2[7] , \gpio_dm2[6] , \gpio_dm2[5] , \gpio_dm2[4] , \gpio_dm2[3] , \gpio_dm2[2] , \gpio_dm2[1] , \gpio_dm2[0] }), + .gpio_holdover({ \gpio_holdover[43] , \gpio_holdover[42] , \gpio_holdover[41] , \gpio_holdover[40] , \gpio_holdover[39] , \gpio_holdover[38] , \gpio_holdover[37] , \gpio_holdover[36] , \gpio_holdover[35] , \gpio_holdover[34] , \gpio_holdover[33] , \gpio_holdover[32] , \gpio_holdover[31] , \gpio_holdover[30] , \gpio_holdover[29] , \gpio_holdover[28] , \gpio_holdover[27] , \gpio_holdover[26] , \gpio_holdover[25] , \gpio_holdover[24] , \gpio_holdover[23] , \gpio_holdover[22] , \gpio_holdover[21] , \gpio_holdover[20] , \gpio_holdover[19] , \gpio_holdover[18] , \gpio_holdover[17] , \gpio_holdover[16] , \gpio_holdover[15] , \gpio_holdover[14] , \gpio_holdover[13] , \gpio_holdover[12] , \gpio_holdover[11] , \gpio_holdover[10] , \gpio_holdover[9] , \gpio_holdover[8] , \gpio_holdover[7] , \gpio_holdover[6] , \gpio_holdover[5] , \gpio_holdover[4] , \gpio_holdover[3] , \gpio_holdover[2] , \gpio_holdover[1] , \gpio_holdover[0] }), + .gpio_ib_mode_sel({ \gpio_ib_mode_sel[43] , \gpio_ib_mode_sel[42] , \gpio_ib_mode_sel[41] , \gpio_ib_mode_sel[40] , \gpio_ib_mode_sel[39] , \gpio_ib_mode_sel[38] , \gpio_ib_mode_sel[37] , \gpio_ib_mode_sel[36] , \gpio_ib_mode_sel[35] , \gpio_ib_mode_sel[34] , \gpio_ib_mode_sel[33] , \gpio_ib_mode_sel[32] , \gpio_ib_mode_sel[31] , \gpio_ib_mode_sel[30] , \gpio_ib_mode_sel[29] , \gpio_ib_mode_sel[28] , \gpio_ib_mode_sel[27] , \gpio_ib_mode_sel[26] , \gpio_ib_mode_sel[25] , \gpio_ib_mode_sel[24] , \gpio_ib_mode_sel[23] , \gpio_ib_mode_sel[22] , \gpio_ib_mode_sel[21] , \gpio_ib_mode_sel[20] , \gpio_ib_mode_sel[19] , \gpio_ib_mode_sel[18] , \gpio_ib_mode_sel[17] , \gpio_ib_mode_sel[16] , \gpio_ib_mode_sel[15] , \gpio_ib_mode_sel[14] , \gpio_ib_mode_sel[13] , \gpio_ib_mode_sel[12] , \gpio_ib_mode_sel[11] , \gpio_ib_mode_sel[10] , \gpio_ib_mode_sel[9] , \gpio_ib_mode_sel[8] , \gpio_ib_mode_sel[7] , \gpio_ib_mode_sel[6] , \gpio_ib_mode_sel[5] , \gpio_ib_mode_sel[4] , \gpio_ib_mode_sel[3] , \gpio_ib_mode_sel[2] , \gpio_ib_mode_sel[1] , \gpio_ib_mode_sel[0] }), + .gpio_in({ \gpio_in[43] , \gpio_in[42] , \gpio_in[41] , \gpio_in[40] , \gpio_in[39] , \gpio_in[38] , \gpio_in[37] , \gpio_in[36] , \gpio_in[35] , \gpio_in[34] , \gpio_in[33] , \gpio_in[32] , \gpio_in[31] , \gpio_in[30] , \gpio_in[29] , \gpio_in[28] , \gpio_in[27] , \gpio_in[26] , \gpio_in[25] , \gpio_in[24] , \gpio_in[23] , \gpio_in[22] , \gpio_in[21] , \gpio_in[20] , \gpio_in[19] , \gpio_in[18] , \gpio_in[17] , \gpio_in[16] , \gpio_in[15] , \gpio_in[14] , \gpio_in[13] , \gpio_in[12] , \gpio_in[11] , \gpio_in[10] , \gpio_in[9] , \gpio_in[8] , \gpio_in[7] , \gpio_in[6] , \gpio_in[5] , \gpio_in[4] , \gpio_in[3] , \gpio_in[2] , \gpio_in[1] , \gpio_in[0] }), + .gpio_in_h({ \gpio_in_h[43] , \gpio_in_h[42] , \gpio_in_h[41] , \gpio_in_h[40] , \gpio_in_h[39] , \gpio_in_h[38] , \gpio_in_h[37] , \gpio_in_h[36] , \gpio_in_h[35] , \gpio_in_h[34] , \gpio_in_h[33] , \gpio_in_h[32] , \gpio_in_h[31] , \gpio_in_h[30] , \gpio_in_h[29] , \gpio_in_h[28] , \gpio_in_h[27] , \gpio_in_h[26] , \gpio_in_h[25] , \gpio_in_h[24] , \gpio_in_h[23] , \gpio_in_h[22] , \gpio_in_h[21] , \gpio_in_h[20] , \gpio_in_h[19] , \gpio_in_h[18] , \gpio_in_h[17] , \gpio_in_h[16] , \gpio_in_h[15] , \gpio_in_h[14] , \gpio_in_h[13] , \gpio_in_h[12] , \gpio_in_h[11] , \gpio_in_h[10] , \gpio_in_h[9] , \gpio_in_h[8] , \gpio_in_h[7] , \gpio_in_h[6] , \gpio_in_h[5] , \gpio_in_h[4] , \gpio_in_h[3] , \gpio_in_h[2] , \gpio_in_h[1] , \gpio_in_h[0] }), + .gpio_inp_dis({ \gpio_inp_dis[43] , \gpio_inp_dis[42] , \gpio_inp_dis[41] , \gpio_inp_dis[40] , \gpio_inp_dis[39] , \gpio_inp_dis[38] , \gpio_inp_dis[37] , \gpio_inp_dis[36] , \gpio_inp_dis[35] , \gpio_inp_dis[34] , \gpio_inp_dis[33] , \gpio_inp_dis[32] , \gpio_inp_dis[31] , \gpio_inp_dis[30] , \gpio_inp_dis[29] , \gpio_inp_dis[28] , \gpio_inp_dis[27] , \gpio_inp_dis[26] , \gpio_inp_dis[25] , \gpio_inp_dis[24] , \gpio_inp_dis[23] , \gpio_inp_dis[22] , \gpio_inp_dis[21] , \gpio_inp_dis[20] , \gpio_inp_dis[19] , \gpio_inp_dis[18] , \gpio_inp_dis[17] , \gpio_inp_dis[16] , \gpio_inp_dis[15] , \gpio_inp_dis[14] , \gpio_inp_dis[13] , \gpio_inp_dis[12] , \gpio_inp_dis[11] , \gpio_inp_dis[10] , \gpio_inp_dis[9] , \gpio_inp_dis[8] , \gpio_inp_dis[7] , \gpio_inp_dis[6] , \gpio_inp_dis[5] , \gpio_inp_dis[4] , \gpio_inp_dis[3] , \gpio_inp_dis[2] , \gpio_inp_dis[1] , \gpio_inp_dis[0] }), + .gpio_loopback_one({ \gpio_loopback_one[43] , \gpio_loopback_one[42] , \gpio_loopback_one[41] , \gpio_loopback_one[40] , \gpio_loopback_one[39] , \gpio_loopback_one[38] , \gpio_loopback_one[37] , \gpio_loopback_one[36] , \gpio_loopback_one[35] , \gpio_loopback_one[34] , \gpio_loopback_one[33] , \gpio_loopback_one[32] , \gpio_loopback_one[31] , \gpio_loopback_one[30] , \gpio_loopback_one[29] , \gpio_loopback_one[28] , \gpio_loopback_one[27] , \gpio_loopback_one[26] , \gpio_loopback_one[25] , \gpio_loopback_one[24] , \gpio_loopback_one[23] , \gpio_loopback_one[22] , \gpio_loopback_one[21] , \gpio_loopback_one[20] , \gpio_loopback_one[19] , \gpio_loopback_one[18] , \gpio_loopback_one[17] , \gpio_loopback_one[16] , \gpio_loopback_one[15] , \gpio_loopback_one[14] , \gpio_loopback_one[13] , \gpio_loopback_one[12] , \gpio_loopback_one[11] , \gpio_loopback_one[10] , \gpio_loopback_one[9] , \gpio_loopback_one[8] , \gpio_loopback_one[7] , \gpio_loopback_one[6] , \gpio_loopback_one[5] , \gpio_loopback_one[4] , \gpio_loopback_one[3] , \gpio_loopback_one[2] , \gpio_loopback_one[1] , \gpio_loopback_one[0] }), + .gpio_loopback_zero({ \gpio_loopback_zero[43] , \gpio_loopback_zero[42] , \gpio_loopback_zero[41] , \gpio_loopback_zero[40] , \gpio_loopback_zero[39] , \gpio_loopback_zero[38] , \gpio_loopback_zero[37] , \gpio_loopback_zero[36] , \gpio_loopback_zero[35] , \gpio_loopback_zero[34] , \gpio_loopback_zero[33] , \gpio_loopback_zero[32] , \gpio_loopback_zero[31] , \gpio_loopback_zero[30] , \gpio_loopback_zero[29] , \gpio_loopback_zero[28] , \gpio_loopback_zero[27] , \gpio_loopback_zero[26] , \gpio_loopback_zero[25] , \gpio_loopback_zero[24] , \gpio_loopback_zero[23] , \gpio_loopback_zero[22] , \gpio_loopback_zero[21] , \gpio_loopback_zero[20] , \gpio_loopback_zero[19] , \gpio_loopback_zero[18] , \gpio_loopback_zero[17] , \gpio_loopback_zero[16] , \gpio_loopback_zero[15] , \gpio_loopback_zero[14] , \gpio_loopback_zero[13] , \gpio_loopback_zero[12] , \gpio_loopback_zero[11] , \gpio_loopback_zero[10] , \gpio_loopback_zero[9] , \gpio_loopback_zero[8] , \gpio_loopback_zero[7] , \gpio_loopback_zero[6] , \gpio_loopback_zero[5] , \gpio_loopback_zero[4] , \gpio_loopback_zero[3] , \gpio_loopback_zero[2] , \gpio_loopback_zero[1] , \gpio_loopback_zero[0] }), + .gpio_oeb({ \gpio_oeb[43] , \gpio_oeb[42] , \gpio_oeb[41] , \gpio_oeb[40] , \gpio_oeb[39] , \gpio_oeb[38] , \gpio_oeb[37] , \gpio_oeb[36] , \gpio_oeb[35] , \gpio_oeb[34] , \gpio_oeb[33] , \gpio_oeb[32] , \gpio_oeb[31] , \gpio_oeb[30] , \gpio_oeb[29] , \gpio_oeb[28] , \gpio_oeb[27] , \gpio_oeb[26] , \gpio_oeb[25] , \gpio_oeb[24] , \gpio_oeb[23] , \gpio_oeb[22] , \gpio_oeb[21] , \gpio_oeb[20] , \gpio_oeb[19] , \gpio_oeb[18] , \gpio_oeb[17] , \gpio_oeb[16] , \gpio_oeb[15] , \gpio_oeb[14] , \gpio_oeb[13] , \gpio_oeb[12] , \gpio_oeb[11] , \gpio_oeb[10] , \gpio_oeb[9] , \gpio_oeb[8] , \gpio_oeb[7] , \gpio_oeb[6] , \gpio_oeb[5] , \gpio_oeb[4] , \gpio_oeb[3] , \gpio_oeb[2] , \gpio_oeb[1] , \gpio_oeb[0] }), + .gpio_out({ \gpio_out[43] , \gpio_out[42] , \gpio_out[41] , \gpio_out[40] , \gpio_out[39] , \gpio_out[38] , \gpio_out[37] , \gpio_out[36] , \gpio_out[35] , \gpio_out[34] , \gpio_out[33] , \gpio_out[32] , \gpio_out[31] , \gpio_out[30] , \gpio_out[29] , \gpio_out[28] , \gpio_out[27] , \gpio_out[26] , \gpio_out[25] , \gpio_out[24] , \gpio_out[23] , \gpio_out[22] , \gpio_out[21] , \gpio_out[20] , \gpio_out[19] , \gpio_out[18] , \gpio_out[17] , \gpio_out[16] , \gpio_out[15] , \gpio_out[14] , \gpio_out[13] , \gpio_out[12] , \gpio_out[11] , \gpio_out[10] , \gpio_out[9] , \gpio_out[8] , \gpio_out[7] , \gpio_out[6] , \gpio_out[5] , \gpio_out[4] , \gpio_out[3] , \gpio_out[2] , \gpio_out[1] , \gpio_out[0] }), + .gpio_slow_sel({ \gpio_slow_sel[43] , \gpio_slow_sel[42] , \gpio_slow_sel[41] , \gpio_slow_sel[40] , \gpio_slow_sel[39] , \gpio_slow_sel[38] , \gpio_slow_sel[37] , \gpio_slow_sel[36] , \gpio_slow_sel[35] , \gpio_slow_sel[34] , \gpio_slow_sel[33] , \gpio_slow_sel[32] , \gpio_slow_sel[31] , \gpio_slow_sel[30] , \gpio_slow_sel[29] , \gpio_slow_sel[28] , \gpio_slow_sel[27] , \gpio_slow_sel[26] , \gpio_slow_sel[25] , \gpio_slow_sel[24] , \gpio_slow_sel[23] , \gpio_slow_sel[22] , \gpio_slow_sel[21] , \gpio_slow_sel[20] , \gpio_slow_sel[19] , \gpio_slow_sel[18] , \gpio_slow_sel[17] , \gpio_slow_sel[16] , \gpio_slow_sel[15] , \gpio_slow_sel[14] , \gpio_slow_sel[13] , \gpio_slow_sel[12] , \gpio_slow_sel[11] , \gpio_slow_sel[10] , \gpio_slow_sel[9] , \gpio_slow_sel[8] , \gpio_slow_sel[7] , \gpio_slow_sel[6] , \gpio_slow_sel[5] , \gpio_slow_sel[4] , \gpio_slow_sel[3] , \gpio_slow_sel[2] , \gpio_slow_sel[1] , \gpio_slow_sel[0] }), + .gpio_vtrip_sel({ \gpio_vtrip_sel[43] , \gpio_vtrip_sel[42] , \gpio_vtrip_sel[41] , \gpio_vtrip_sel[40] , \gpio_vtrip_sel[39] , \gpio_vtrip_sel[38] , \gpio_vtrip_sel[37] , \gpio_vtrip_sel[36] , \gpio_vtrip_sel[35] , \gpio_vtrip_sel[34] , \gpio_vtrip_sel[33] , \gpio_vtrip_sel[32] , \gpio_vtrip_sel[31] , \gpio_vtrip_sel[30] , \gpio_vtrip_sel[29] , \gpio_vtrip_sel[28] , \gpio_vtrip_sel[27] , \gpio_vtrip_sel[26] , \gpio_vtrip_sel[25] , \gpio_vtrip_sel[24] , \gpio_vtrip_sel[23] , \gpio_vtrip_sel[22] , \gpio_vtrip_sel[21] , \gpio_vtrip_sel[20] , \gpio_vtrip_sel[19] , \gpio_vtrip_sel[18] , \gpio_vtrip_sel[17] , \gpio_vtrip_sel[16] , \gpio_vtrip_sel[15] , \gpio_vtrip_sel[14] , \gpio_vtrip_sel[13] , \gpio_vtrip_sel[12] , \gpio_vtrip_sel[11] , \gpio_vtrip_sel[10] , \gpio_vtrip_sel[9] , \gpio_vtrip_sel[8] , \gpio_vtrip_sel[7] , \gpio_vtrip_sel[6] , \gpio_vtrip_sel[5] , \gpio_vtrip_sel[4] , \gpio_vtrip_sel[3] , \gpio_vtrip_sel[2] , \gpio_vtrip_sel[1] , \gpio_vtrip_sel[0] }), + .mask_rev({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0] }), + .por_l(por_l), + .porb_h(porb_h), + .porb_l(porb_l), + .resetb_h(rstb_h), + .resetb_l(rstb_l), + .resetb_pad(resetb), + .vccd(vccd_core), + .vccd1(vccd1_core), + .vccd1_pad(vccd1), + .vccd2(vccd2_core), + .vccd2_pad(vccd2), + .vccd_pad(vccd), + .vdda(vdda_core), + .vdda1(vdda1_core), + .vdda1_pad(vdda1), + .vdda1_pad2(vdda1_2), + .vdda2(vdda2_core), + .vdda2_pad(vdda2), + .vdda_pad(vdda), + .vddio(vddio_core), + .vddio_pad(vddio), + .vddio_pad2(vddio_2), + .vssa(vssa_core), + .vssa1(vssa1_core), + .vssa1_pad(vssa1), + .vssa1_pad2(vssa1_2), + .vssa2(vssa2_core), + .vssa2_pad(vssa2), + .vssa_pad(vssa), + .vssd(vssd_core), + .vssd1(vssd1_core), + .vssd1_pad(vssd1), + .vssd2(vssd2_core), + .vssd2_pad(vssd2), + .vssd_pad(vssd), + .vssio(vssio_core), + .vssio_pad(vssio), + .vssio_pad2(vssio_2) + ); + openframe_project_wrapper user_project ( + .analog_io({ \analog_io[43] , \analog_io[42] , \analog_io[41] , \analog_io[40] , \analog_io[39] , \analog_io[38] , \analog_io[37] , \analog_io[36] , \analog_io[35] , \analog_io[34] , \analog_io[33] , \analog_io[32] , \analog_io[31] , \analog_io[30] , \analog_io[29] , \analog_io[28] , \analog_io[27] , \analog_io[26] , \analog_io[25] , \analog_io[24] , \analog_io[23] , \analog_io[22] , \analog_io[21] , \analog_io[20] , \analog_io[19] , \analog_io[18] , \analog_io[17] , \analog_io[16] , \analog_io[15] , \analog_io[14] , \analog_io[13] , \analog_io[12] , \analog_io[11] , \analog_io[10] , \analog_io[9] , \analog_io[8] , \analog_io[7] , \analog_io[6] , \analog_io[5] , \analog_io[4] , \analog_io[3] , \analog_io[2] , \analog_io[1] , \analog_io[0] }), + .analog_noesd_io({ \analog_noesd_io[43] , \analog_noesd_io[42] , \analog_noesd_io[41] , \analog_noesd_io[40] , \analog_noesd_io[39] , \analog_noesd_io[38] , \analog_noesd_io[37] , \analog_noesd_io[36] , \analog_noesd_io[35] , \analog_noesd_io[34] , \analog_noesd_io[33] , \analog_noesd_io[32] , \analog_noesd_io[31] , \analog_noesd_io[30] , \analog_noesd_io[29] , \analog_noesd_io[28] , \analog_noesd_io[27] , \analog_noesd_io[26] , \analog_noesd_io[25] , \analog_noesd_io[24] , \analog_noesd_io[23] , \analog_noesd_io[22] , \analog_noesd_io[21] , \analog_noesd_io[20] , \analog_noesd_io[19] , \analog_noesd_io[18] , \analog_noesd_io[17] , \analog_noesd_io[16] , \analog_noesd_io[15] , \analog_noesd_io[14] , \analog_noesd_io[13] , \analog_noesd_io[12] , \analog_noesd_io[11] , \analog_noesd_io[10] , \analog_noesd_io[9] , \analog_noesd_io[8] , \analog_noesd_io[7] , \analog_noesd_io[6] , \analog_noesd_io[5] , \analog_noesd_io[4] , \analog_noesd_io[3] , \analog_noesd_io[2] , \analog_noesd_io[1] , \analog_noesd_io[0] }), + .gpio_analog_en({ \gpio_analog_en[43] , \gpio_analog_en[42] , \gpio_analog_en[41] , \gpio_analog_en[40] , \gpio_analog_en[39] , \gpio_analog_en[38] , \gpio_analog_en[37] , \gpio_analog_en[36] , \gpio_analog_en[35] , \gpio_analog_en[34] , \gpio_analog_en[33] , \gpio_analog_en[32] , \gpio_analog_en[31] , \gpio_analog_en[30] , \gpio_analog_en[29] , \gpio_analog_en[28] , \gpio_analog_en[27] , \gpio_analog_en[26] , \gpio_analog_en[25] , \gpio_analog_en[24] , \gpio_analog_en[23] , \gpio_analog_en[22] , \gpio_analog_en[21] , \gpio_analog_en[20] , \gpio_analog_en[19] , \gpio_analog_en[18] , \gpio_analog_en[17] , \gpio_analog_en[16] , \gpio_analog_en[15] , \gpio_analog_en[14] , \gpio_analog_en[13] , \gpio_analog_en[12] , \gpio_analog_en[11] , \gpio_analog_en[10] , \gpio_analog_en[9] , \gpio_analog_en[8] , \gpio_analog_en[7] , \gpio_analog_en[6] , \gpio_analog_en[5] , \gpio_analog_en[4] , \gpio_analog_en[3] , \gpio_analog_en[2] , \gpio_analog_en[1] , \gpio_analog_en[0] }), + .gpio_analog_pol({ \gpio_analog_pol[43] , \gpio_analog_pol[42] , \gpio_analog_pol[41] , \gpio_analog_pol[40] , \gpio_analog_pol[39] , \gpio_analog_pol[38] , \gpio_analog_pol[37] , \gpio_analog_pol[36] , \gpio_analog_pol[35] , \gpio_analog_pol[34] , \gpio_analog_pol[33] , \gpio_analog_pol[32] , \gpio_analog_pol[31] , \gpio_analog_pol[30] , \gpio_analog_pol[29] , \gpio_analog_pol[28] , \gpio_analog_pol[27] , \gpio_analog_pol[26] , \gpio_analog_pol[25] , \gpio_analog_pol[24] , \gpio_analog_pol[23] , \gpio_analog_pol[22] , \gpio_analog_pol[21] , \gpio_analog_pol[20] , \gpio_analog_pol[19] , \gpio_analog_pol[18] , \gpio_analog_pol[17] , \gpio_analog_pol[16] , \gpio_analog_pol[15] , \gpio_analog_pol[14] , \gpio_analog_pol[13] , \gpio_analog_pol[12] , \gpio_analog_pol[11] , \gpio_analog_pol[10] , \gpio_analog_pol[9] , \gpio_analog_pol[8] , \gpio_analog_pol[7] , \gpio_analog_pol[6] , \gpio_analog_pol[5] , \gpio_analog_pol[4] , \gpio_analog_pol[3] , \gpio_analog_pol[2] , \gpio_analog_pol[1] , \gpio_analog_pol[0] }), + .gpio_analog_sel({ \gpio_analog_sel[43] , \gpio_analog_sel[42] , \gpio_analog_sel[41] , \gpio_analog_sel[40] , \gpio_analog_sel[39] , \gpio_analog_sel[38] , \gpio_analog_sel[37] , \gpio_analog_sel[36] , \gpio_analog_sel[35] , \gpio_analog_sel[34] , \gpio_analog_sel[33] , \gpio_analog_sel[32] , \gpio_analog_sel[31] , \gpio_analog_sel[30] , \gpio_analog_sel[29] , \gpio_analog_sel[28] , \gpio_analog_sel[27] , \gpio_analog_sel[26] , \gpio_analog_sel[25] , \gpio_analog_sel[24] , \gpio_analog_sel[23] , \gpio_analog_sel[22] , \gpio_analog_sel[21] , \gpio_analog_sel[20] , \gpio_analog_sel[19] , \gpio_analog_sel[18] , \gpio_analog_sel[17] , \gpio_analog_sel[16] , \gpio_analog_sel[15] , \gpio_analog_sel[14] , \gpio_analog_sel[13] , \gpio_analog_sel[12] , \gpio_analog_sel[11] , \gpio_analog_sel[10] , \gpio_analog_sel[9] , \gpio_analog_sel[8] , \gpio_analog_sel[7] , \gpio_analog_sel[6] , \gpio_analog_sel[5] , \gpio_analog_sel[4] , \gpio_analog_sel[3] , \gpio_analog_sel[2] , \gpio_analog_sel[1] , \gpio_analog_sel[0] }), + .gpio_dm0({ \gpio_dm0[43] , \gpio_dm0[42] , \gpio_dm0[41] , \gpio_dm0[40] , \gpio_dm0[39] , \gpio_dm0[38] , \gpio_dm0[37] , \gpio_dm0[36] , \gpio_dm0[35] , \gpio_dm0[34] , \gpio_dm0[33] , \gpio_dm0[32] , \gpio_dm0[31] , \gpio_dm0[30] , \gpio_dm0[29] , \gpio_dm0[28] , \gpio_dm0[27] , \gpio_dm0[26] , \gpio_dm0[25] , \gpio_dm0[24] , \gpio_dm0[23] , \gpio_dm0[22] , \gpio_dm0[21] , \gpio_dm0[20] , \gpio_dm0[19] , \gpio_dm0[18] , \gpio_dm0[17] , \gpio_dm0[16] , \gpio_dm0[15] , \gpio_dm0[14] , \gpio_dm0[13] , \gpio_dm0[12] , \gpio_dm0[11] , \gpio_dm0[10] , \gpio_dm0[9] , \gpio_dm0[8] , \gpio_dm0[7] , \gpio_dm0[6] , \gpio_dm0[5] , \gpio_dm0[4] , \gpio_dm0[3] , \gpio_dm0[2] , \gpio_dm0[1] , \gpio_dm0[0] }), + .gpio_dm1({ \gpio_dm1[43] , \gpio_dm1[42] , \gpio_dm1[41] , \gpio_dm1[40] , \gpio_dm1[39] , \gpio_dm1[38] , \gpio_dm1[37] , \gpio_dm1[36] , \gpio_dm1[35] , \gpio_dm1[34] , \gpio_dm1[33] , \gpio_dm1[32] , \gpio_dm1[31] , \gpio_dm1[30] , \gpio_dm1[29] , \gpio_dm1[28] , \gpio_dm1[27] , \gpio_dm1[26] , \gpio_dm1[25] , \gpio_dm1[24] , \gpio_dm1[23] , \gpio_dm1[22] , \gpio_dm1[21] , \gpio_dm1[20] , \gpio_dm1[19] , \gpio_dm1[18] , \gpio_dm1[17] , \gpio_dm1[16] , \gpio_dm1[15] , \gpio_dm1[14] , \gpio_dm1[13] , \gpio_dm1[12] , \gpio_dm1[11] , \gpio_dm1[10] , \gpio_dm1[9] , \gpio_dm1[8] , \gpio_dm1[7] , \gpio_dm1[6] , \gpio_dm1[5] , \gpio_dm1[4] , \gpio_dm1[3] , \gpio_dm1[2] , \gpio_dm1[1] , \gpio_dm1[0] }), + .gpio_dm2({ \gpio_dm2[43] , \gpio_dm2[42] , \gpio_dm2[41] , \gpio_dm2[40] , \gpio_dm2[39] , \gpio_dm2[38] , \gpio_dm2[37] , \gpio_dm2[36] , \gpio_dm2[35] , \gpio_dm2[34] , \gpio_dm2[33] , \gpio_dm2[32] , \gpio_dm2[31] , \gpio_dm2[30] , \gpio_dm2[29] , \gpio_dm2[28] , \gpio_dm2[27] , \gpio_dm2[26] , \gpio_dm2[25] , \gpio_dm2[24] , \gpio_dm2[23] , \gpio_dm2[22] , \gpio_dm2[21] , \gpio_dm2[20] , \gpio_dm2[19] , \gpio_dm2[18] , \gpio_dm2[17] , \gpio_dm2[16] , \gpio_dm2[15] , \gpio_dm2[14] , \gpio_dm2[13] , \gpio_dm2[12] , \gpio_dm2[11] , \gpio_dm2[10] , \gpio_dm2[9] , \gpio_dm2[8] , \gpio_dm2[7] , \gpio_dm2[6] , \gpio_dm2[5] , \gpio_dm2[4] , \gpio_dm2[3] , \gpio_dm2[2] , \gpio_dm2[1] , \gpio_dm2[0] }), + .gpio_holdover({ \gpio_holdover[43] , \gpio_holdover[42] , \gpio_holdover[41] , \gpio_holdover[40] , \gpio_holdover[39] , \gpio_holdover[38] , \gpio_holdover[37] , \gpio_holdover[36] , \gpio_holdover[35] , \gpio_holdover[34] , \gpio_holdover[33] , \gpio_holdover[32] , \gpio_holdover[31] , \gpio_holdover[30] , \gpio_holdover[29] , \gpio_holdover[28] , \gpio_holdover[27] , \gpio_holdover[26] , \gpio_holdover[25] , \gpio_holdover[24] , \gpio_holdover[23] , \gpio_holdover[22] , \gpio_holdover[21] , \gpio_holdover[20] , \gpio_holdover[19] , \gpio_holdover[18] , \gpio_holdover[17] , \gpio_holdover[16] , \gpio_holdover[15] , \gpio_holdover[14] , \gpio_holdover[13] , \gpio_holdover[12] , \gpio_holdover[11] , \gpio_holdover[10] , \gpio_holdover[9] , \gpio_holdover[8] , \gpio_holdover[7] , \gpio_holdover[6] , \gpio_holdover[5] , \gpio_holdover[4] , \gpio_holdover[3] , \gpio_holdover[2] , \gpio_holdover[1] , \gpio_holdover[0] }), + .gpio_ib_mode_sel({ \gpio_ib_mode_sel[43] , \gpio_ib_mode_sel[42] , \gpio_ib_mode_sel[41] , \gpio_ib_mode_sel[40] , \gpio_ib_mode_sel[39] , \gpio_ib_mode_sel[38] , \gpio_ib_mode_sel[37] , \gpio_ib_mode_sel[36] , \gpio_ib_mode_sel[35] , \gpio_ib_mode_sel[34] , \gpio_ib_mode_sel[33] , \gpio_ib_mode_sel[32] , \gpio_ib_mode_sel[31] , \gpio_ib_mode_sel[30] , \gpio_ib_mode_sel[29] , \gpio_ib_mode_sel[28] , \gpio_ib_mode_sel[27] , \gpio_ib_mode_sel[26] , \gpio_ib_mode_sel[25] , \gpio_ib_mode_sel[24] , \gpio_ib_mode_sel[23] , \gpio_ib_mode_sel[22] , \gpio_ib_mode_sel[21] , \gpio_ib_mode_sel[20] , \gpio_ib_mode_sel[19] , \gpio_ib_mode_sel[18] , \gpio_ib_mode_sel[17] , \gpio_ib_mode_sel[16] , \gpio_ib_mode_sel[15] , \gpio_ib_mode_sel[14] , \gpio_ib_mode_sel[13] , \gpio_ib_mode_sel[12] , \gpio_ib_mode_sel[11] , \gpio_ib_mode_sel[10] , \gpio_ib_mode_sel[9] , \gpio_ib_mode_sel[8] , \gpio_ib_mode_sel[7] , \gpio_ib_mode_sel[6] , \gpio_ib_mode_sel[5] , \gpio_ib_mode_sel[4] , \gpio_ib_mode_sel[3] , \gpio_ib_mode_sel[2] , \gpio_ib_mode_sel[1] , \gpio_ib_mode_sel[0] }), + .gpio_in({ \gpio_in[43] , \gpio_in[42] , \gpio_in[41] , \gpio_in[40] , \gpio_in[39] , \gpio_in[38] , \gpio_in[37] , \gpio_in[36] , \gpio_in[35] , \gpio_in[34] , \gpio_in[33] , \gpio_in[32] , \gpio_in[31] , \gpio_in[30] , \gpio_in[29] , \gpio_in[28] , \gpio_in[27] , \gpio_in[26] , \gpio_in[25] , \gpio_in[24] , \gpio_in[23] , \gpio_in[22] , \gpio_in[21] , \gpio_in[20] , \gpio_in[19] , \gpio_in[18] , \gpio_in[17] , \gpio_in[16] , \gpio_in[15] , \gpio_in[14] , \gpio_in[13] , \gpio_in[12] , \gpio_in[11] , \gpio_in[10] , \gpio_in[9] , \gpio_in[8] , \gpio_in[7] , \gpio_in[6] , \gpio_in[5] , \gpio_in[4] , \gpio_in[3] , \gpio_in[2] , \gpio_in[1] , \gpio_in[0] }), + .gpio_in_h({ \gpio_in_h[43] , \gpio_in_h[42] , \gpio_in_h[41] , \gpio_in_h[40] , \gpio_in_h[39] , \gpio_in_h[38] , \gpio_in_h[37] , \gpio_in_h[36] , \gpio_in_h[35] , \gpio_in_h[34] , \gpio_in_h[33] , \gpio_in_h[32] , \gpio_in_h[31] , \gpio_in_h[30] , \gpio_in_h[29] , \gpio_in_h[28] , \gpio_in_h[27] , \gpio_in_h[26] , \gpio_in_h[25] , \gpio_in_h[24] , \gpio_in_h[23] , \gpio_in_h[22] , \gpio_in_h[21] , \gpio_in_h[20] , \gpio_in_h[19] , \gpio_in_h[18] , \gpio_in_h[17] , \gpio_in_h[16] , \gpio_in_h[15] , \gpio_in_h[14] , \gpio_in_h[13] , \gpio_in_h[12] , \gpio_in_h[11] , \gpio_in_h[10] , \gpio_in_h[9] , \gpio_in_h[8] , \gpio_in_h[7] , \gpio_in_h[6] , \gpio_in_h[5] , \gpio_in_h[4] , \gpio_in_h[3] , \gpio_in_h[2] , \gpio_in_h[1] , \gpio_in_h[0] }), + .gpio_inp_dis({ \gpio_inp_dis[43] , \gpio_inp_dis[42] , \gpio_inp_dis[41] , \gpio_inp_dis[40] , \gpio_inp_dis[39] , \gpio_inp_dis[38] , \gpio_inp_dis[37] , \gpio_inp_dis[36] , \gpio_inp_dis[35] , \gpio_inp_dis[34] , \gpio_inp_dis[33] , \gpio_inp_dis[32] , \gpio_inp_dis[31] , \gpio_inp_dis[30] , \gpio_inp_dis[29] , \gpio_inp_dis[28] , \gpio_inp_dis[27] , \gpio_inp_dis[26] , \gpio_inp_dis[25] , \gpio_inp_dis[24] , \gpio_inp_dis[23] , \gpio_inp_dis[22] , \gpio_inp_dis[21] , \gpio_inp_dis[20] , \gpio_inp_dis[19] , \gpio_inp_dis[18] , \gpio_inp_dis[17] , \gpio_inp_dis[16] , \gpio_inp_dis[15] , \gpio_inp_dis[14] , \gpio_inp_dis[13] , \gpio_inp_dis[12] , \gpio_inp_dis[11] , \gpio_inp_dis[10] , \gpio_inp_dis[9] , \gpio_inp_dis[8] , \gpio_inp_dis[7] , \gpio_inp_dis[6] , \gpio_inp_dis[5] , \gpio_inp_dis[4] , \gpio_inp_dis[3] , \gpio_inp_dis[2] , \gpio_inp_dis[1] , \gpio_inp_dis[0] }), + .gpio_loopback_one({ \gpio_loopback_one[43] , \gpio_loopback_one[42] , \gpio_loopback_one[41] , \gpio_loopback_one[40] , \gpio_loopback_one[39] , \gpio_loopback_one[38] , \gpio_loopback_one[37] , \gpio_loopback_one[36] , \gpio_loopback_one[35] , \gpio_loopback_one[34] , \gpio_loopback_one[33] , \gpio_loopback_one[32] , \gpio_loopback_one[31] , \gpio_loopback_one[30] , \gpio_loopback_one[29] , \gpio_loopback_one[28] , \gpio_loopback_one[27] , \gpio_loopback_one[26] , \gpio_loopback_one[25] , \gpio_loopback_one[24] , \gpio_loopback_one[23] , \gpio_loopback_one[22] , \gpio_loopback_one[21] , \gpio_loopback_one[20] , \gpio_loopback_one[19] , \gpio_loopback_one[18] , \gpio_loopback_one[17] , \gpio_loopback_one[16] , \gpio_loopback_one[15] , \gpio_loopback_one[14] , \gpio_loopback_one[13] , \gpio_loopback_one[12] , \gpio_loopback_one[11] , \gpio_loopback_one[10] , \gpio_loopback_one[9] , \gpio_loopback_one[8] , \gpio_loopback_one[7] , \gpio_loopback_one[6] , \gpio_loopback_one[5] , \gpio_loopback_one[4] , \gpio_loopback_one[3] , \gpio_loopback_one[2] , \gpio_loopback_one[1] , \gpio_loopback_one[0] }), + .gpio_loopback_zero({ \gpio_loopback_zero[43] , \gpio_loopback_zero[42] , \gpio_loopback_zero[41] , \gpio_loopback_zero[40] , \gpio_loopback_zero[39] , \gpio_loopback_zero[38] , \gpio_loopback_zero[37] , \gpio_loopback_zero[36] , \gpio_loopback_zero[35] , \gpio_loopback_zero[34] , \gpio_loopback_zero[33] , \gpio_loopback_zero[32] , \gpio_loopback_zero[31] , \gpio_loopback_zero[30] , \gpio_loopback_zero[29] , \gpio_loopback_zero[28] , \gpio_loopback_zero[27] , \gpio_loopback_zero[26] , \gpio_loopback_zero[25] , \gpio_loopback_zero[24] , \gpio_loopback_zero[23] , \gpio_loopback_zero[22] , \gpio_loopback_zero[21] , \gpio_loopback_zero[20] , \gpio_loopback_zero[19] , \gpio_loopback_zero[18] , \gpio_loopback_zero[17] , \gpio_loopback_zero[16] , \gpio_loopback_zero[15] , \gpio_loopback_zero[14] , \gpio_loopback_zero[13] , \gpio_loopback_zero[12] , \gpio_loopback_zero[11] , \gpio_loopback_zero[10] , \gpio_loopback_zero[9] , \gpio_loopback_zero[8] , \gpio_loopback_zero[7] , \gpio_loopback_zero[6] , \gpio_loopback_zero[5] , \gpio_loopback_zero[4] , \gpio_loopback_zero[3] , \gpio_loopback_zero[2] , \gpio_loopback_zero[1] , \gpio_loopback_zero[0] }), + .gpio_oeb({ \gpio_oeb[43] , \gpio_oeb[42] , \gpio_oeb[41] , \gpio_oeb[40] , \gpio_oeb[39] , \gpio_oeb[38] , \gpio_oeb[37] , \gpio_oeb[36] , \gpio_oeb[35] , \gpio_oeb[34] , \gpio_oeb[33] , \gpio_oeb[32] , \gpio_oeb[31] , \gpio_oeb[30] , \gpio_oeb[29] , \gpio_oeb[28] , \gpio_oeb[27] , \gpio_oeb[26] , \gpio_oeb[25] , \gpio_oeb[24] , \gpio_oeb[23] , \gpio_oeb[22] , \gpio_oeb[21] , \gpio_oeb[20] , \gpio_oeb[19] , \gpio_oeb[18] , \gpio_oeb[17] , \gpio_oeb[16] , \gpio_oeb[15] , \gpio_oeb[14] , \gpio_oeb[13] , \gpio_oeb[12] , \gpio_oeb[11] , \gpio_oeb[10] , \gpio_oeb[9] , \gpio_oeb[8] , \gpio_oeb[7] , \gpio_oeb[6] , \gpio_oeb[5] , \gpio_oeb[4] , \gpio_oeb[3] , \gpio_oeb[2] , \gpio_oeb[1] , \gpio_oeb[0] }), + .gpio_out({ \gpio_out[43] , \gpio_out[42] , \gpio_out[41] , \gpio_out[40] , \gpio_out[39] , \gpio_out[38] , \gpio_out[37] , \gpio_out[36] , \gpio_out[35] , \gpio_out[34] , \gpio_out[33] , \gpio_out[32] , \gpio_out[31] , \gpio_out[30] , \gpio_out[29] , \gpio_out[28] , \gpio_out[27] , \gpio_out[26] , \gpio_out[25] , \gpio_out[24] , \gpio_out[23] , \gpio_out[22] , \gpio_out[21] , \gpio_out[20] , \gpio_out[19] , \gpio_out[18] , \gpio_out[17] , \gpio_out[16] , \gpio_out[15] , \gpio_out[14] , \gpio_out[13] , \gpio_out[12] , \gpio_out[11] , \gpio_out[10] , \gpio_out[9] , \gpio_out[8] , \gpio_out[7] , \gpio_out[6] , \gpio_out[5] , \gpio_out[4] , \gpio_out[3] , \gpio_out[2] , \gpio_out[1] , \gpio_out[0] }), + .gpio_slow_sel({ \gpio_slow_sel[43] , \gpio_slow_sel[42] , \gpio_slow_sel[41] , \gpio_slow_sel[40] , \gpio_slow_sel[39] , \gpio_slow_sel[38] , \gpio_slow_sel[37] , \gpio_slow_sel[36] , \gpio_slow_sel[35] , \gpio_slow_sel[34] , \gpio_slow_sel[33] , \gpio_slow_sel[32] , \gpio_slow_sel[31] , \gpio_slow_sel[30] , \gpio_slow_sel[29] , \gpio_slow_sel[28] , \gpio_slow_sel[27] , \gpio_slow_sel[26] , \gpio_slow_sel[25] , \gpio_slow_sel[24] , \gpio_slow_sel[23] , \gpio_slow_sel[22] , \gpio_slow_sel[21] , \gpio_slow_sel[20] , \gpio_slow_sel[19] , \gpio_slow_sel[18] , \gpio_slow_sel[17] , \gpio_slow_sel[16] , \gpio_slow_sel[15] , \gpio_slow_sel[14] , \gpio_slow_sel[13] , \gpio_slow_sel[12] , \gpio_slow_sel[11] , \gpio_slow_sel[10] , \gpio_slow_sel[9] , \gpio_slow_sel[8] , \gpio_slow_sel[7] , \gpio_slow_sel[6] , \gpio_slow_sel[5] , \gpio_slow_sel[4] , \gpio_slow_sel[3] , \gpio_slow_sel[2] , \gpio_slow_sel[1] , \gpio_slow_sel[0] }), + .gpio_vtrip_sel({ \gpio_vtrip_sel[43] , \gpio_vtrip_sel[42] , \gpio_vtrip_sel[41] , \gpio_vtrip_sel[40] , \gpio_vtrip_sel[39] , \gpio_vtrip_sel[38] , \gpio_vtrip_sel[37] , \gpio_vtrip_sel[36] , \gpio_vtrip_sel[35] , \gpio_vtrip_sel[34] , \gpio_vtrip_sel[33] , \gpio_vtrip_sel[32] , \gpio_vtrip_sel[31] , \gpio_vtrip_sel[30] , \gpio_vtrip_sel[29] , \gpio_vtrip_sel[28] , \gpio_vtrip_sel[27] , \gpio_vtrip_sel[26] , \gpio_vtrip_sel[25] , \gpio_vtrip_sel[24] , \gpio_vtrip_sel[23] , \gpio_vtrip_sel[22] , \gpio_vtrip_sel[21] , \gpio_vtrip_sel[20] , \gpio_vtrip_sel[19] , \gpio_vtrip_sel[18] , \gpio_vtrip_sel[17] , \gpio_vtrip_sel[16] , \gpio_vtrip_sel[15] , \gpio_vtrip_sel[14] , \gpio_vtrip_sel[13] , \gpio_vtrip_sel[12] , \gpio_vtrip_sel[11] , \gpio_vtrip_sel[10] , \gpio_vtrip_sel[9] , \gpio_vtrip_sel[8] , \gpio_vtrip_sel[7] , \gpio_vtrip_sel[6] , \gpio_vtrip_sel[5] , \gpio_vtrip_sel[4] , \gpio_vtrip_sel[3] , \gpio_vtrip_sel[2] , \gpio_vtrip_sel[1] , \gpio_vtrip_sel[0] }), + .mask_rev({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0] }), + .por_l(por_l), + .porb_h(porb_h), + .porb_l(porb_l), + .resetb_h(rstb_h), + .resetb_l(rstb_l), + .vccd(vccd_core), + .vccd1(vccd1_core), + .vccd2(vccd2_core), + .vdda(vdda_core), + .vdda1(vdda1_core), + .vdda2(vdda2_core), + .vssa(vssa_core), + .vssa1(vssa1_core), + .vssa2(vssa2_core), + .vssd(vssd_core), + .vssd1(vssd1_core), + .vssd2(vssd2_core) + ); +endmodule From 0e3b9dded8769873e1ecb11749f9324bd06ce6c6 Mon Sep 17 00:00:00 2001 From: M0stafaRady <107422726+M0stafaRady@users.noreply.github.com> Date: Tue, 19 Sep 2023 23:08:03 +0300 Subject: [PATCH 117/138] remove cocotb directory since it is moved under other repos --- verilog/dv/cocotb/.gitignore | 12 - verilog/dv/cocotb/README.md | 89 --- verilog/dv/cocotb/caravel.py | 432 --------------- verilog/dv/cocotb/caravel_tests.py | 207 ------- verilog/dv/cocotb/caravel_top.sv | 380 ------------- verilog/dv/cocotb/cpu.py | 232 -------- verilog/dv/cocotb/doc/CTN.png | Bin 45943 -> 0 bytes verilog/dv/cocotb/doc/README.md | 1 - .../dv/cocotb/doc/commands_example/README.md | 22 - verilog/dv/cocotb/doc/tests/README.md | 105 ---- verilog/dv/cocotb/doc/tests/update_tests.py | 52 -- verilog/dv/cocotb/interfaces/caravel.py | 437 --------------- verilog/dv/cocotb/interfaces/common.py | 80 --- verilog/dv/cocotb/interfaces/cpu.py | 238 -------- verilog/dv/cocotb/interfaces/defsParser.py | 87 --- .../dv/cocotb/interfaces/logic_analyzer.py | 84 --- verilog/dv/cocotb/pli.tab | 1 - verilog/dv/cocotb/sdf_includes.v | 7 - verilog/dv/cocotb/tests.json | 355 ------------ .../tests/bitbang/bitbang_cpu_all_0011.c | 62 --- .../cocotb/tests/bitbang/bitbang_cpu_all_01.c | 60 -- .../cocotb/tests/bitbang/bitbang_cpu_all_10.c | 60 -- .../tests/bitbang/bitbang_cpu_all_1100.c | 62 --- .../cocotb/tests/bitbang/bitbang_cpu_all_i.c | 91 ---- .../cocotb/tests/bitbang/bitbang_cpu_all_o.c | 99 ---- .../cocotb/tests/bitbang/bitbang_functions.c | 325 ----------- .../cocotb/tests/bitbang/bitbang_functions.py | 355 ------------ .../dv/cocotb/tests/bitbang/bitbang_no_cpu.c | 10 - .../tests/bitbang/bitbang_no_cpu_all_i.c | 10 - .../tests/bitbang/bitbang_no_cpu_all_o.c | 9 - .../dv/cocotb/tests/bitbang/bitbang_spi_i.c | 72 --- .../dv/cocotb/tests/bitbang/bitbang_spi_o.c | 79 --- .../dv/cocotb/tests/bitbang/bitbang_tests.py | 259 --------- .../cocotb/tests/bitbang/bitbang_tests_cpu.py | 415 -------------- .../cocotb/tests/common_functions/Timeout.py | 32 -- .../tests/common_functions/test_functions.py | 95 ---- verilog/dv/cocotb/tests/cpu/cpu_reset.c | 18 - verilog/dv/cocotb/tests/cpu/cpu_reset.py | 67 --- verilog/dv/cocotb/tests/cpu/cpu_stress.c | 156 ------ verilog/dv/cocotb/tests/cpu/cpu_stress.py | 43 -- verilog/dv/cocotb/tests/debug/debug.c | 50 -- verilog/dv/cocotb/tests/debug/debug.py | 110 ---- verilog/dv/cocotb/tests/gpio/gpio.py | 458 ---------------- verilog/dv/cocotb/tests/gpio/gpio_all_bidir.c | 98 ---- .../cocotb/tests/gpio/gpio_all_bidir_user.c | 115 ---- verilog/dv/cocotb/tests/gpio/gpio_all_i.c | 86 --- verilog/dv/cocotb/tests/gpio/gpio_all_i_pd.c | 58 -- .../dv/cocotb/tests/gpio/gpio_all_i_pd_user.c | 58 -- verilog/dv/cocotb/tests/gpio/gpio_all_i_pu.c | 57 -- .../dv/cocotb/tests/gpio/gpio_all_i_pu_user.c | 64 --- .../dv/cocotb/tests/gpio/gpio_all_i_user.c | 88 --- verilog/dv/cocotb/tests/gpio/gpio_all_o.c | 90 --- .../dv/cocotb/tests/gpio/gpio_all_o_user.c | 95 ---- verilog/dv/cocotb/tests/gpio/gpio_user.py | 468 ---------------- .../tests/gpio_caravan/gpio_all_i_caravan.c | 87 --- .../gpio_caravan/gpio_all_i_pd_caravan.c | 58 -- .../gpio_caravan/gpio_all_i_pu_caravan.c | 57 -- .../tests/gpio_caravan/gpio_all_o_caravan.c | 81 --- .../cocotb/tests/gpio_caravan/gpio_caravan.py | 500 ----------------- .../dv/cocotb/tests/gpio_caravan/gpio_user.py | 468 ---------------- .../dv/cocotb/tests/hello_world/helloWorld.c | 5 - .../dv/cocotb/tests/hello_world/helloWorld.py | 11 - .../housekeeping/general/clock_redirect.c | 20 - .../tests/housekeeping/general/hk_disable.c | 15 - .../cocotb/tests/housekeeping/general/pll.c | 152 ------ .../cocotb/tests/housekeeping/general/pll.py | 86 --- .../tests/housekeeping/general/sys_ctrl.py | 148 ----- .../housekeeping_regs/hk_regs_rst_spi.c | 11 - .../housekeeping_regs/hk_regs_wr_spi.c | 11 - .../housekeeping_regs/hk_regs_wr_wb.c | 11 - .../housekeeping_regs/hk_regs_wr_wb_cpu.c | 333 ------------ .../housekeeping_regs_tests.py | 213 -------- .../housekeeping/housekeeping_spi/spi.py | 42 -- .../housekeeping_spi/spi_access_functions.py | 58 -- .../housekeeping_spi/spi_rd_wr_nbyte.c | 10 - .../housekeeping/housekeeping_spi/test_data | 3 - .../housekeeping_spi/user_pass_thru.py | 50 -- .../housekeeping_spi/user_pass_thru_rd.c | 62 --- verilog/dv/cocotb/tests/irq/IRQ_external.c | 103 ---- verilog/dv/cocotb/tests/irq/IRQ_external.py | 69 --- verilog/dv/cocotb/tests/irq/IRQ_timer.c | 88 --- verilog/dv/cocotb/tests/irq/IRQ_timer.py | 51 -- verilog/dv/cocotb/tests/irq/IRQ_uart.c | 88 --- verilog/dv/cocotb/tests/irq/IRQ_uart.py | 64 --- .../.vscode/c_cpp_properties.json | 16 - verilog/dv/cocotb/tests/logicAnalyzer/la.c | 112 ---- verilog/dv/cocotb/tests/logicAnalyzer/la.py | 48 -- verilog/dv/cocotb/tests/mem/mem_dff.c | 33 -- verilog/dv/cocotb/tests/mem/mem_dff2.c | 33 -- verilog/dv/cocotb/tests/mem/mem_stress.py | 60 -- .../dv/cocotb/tests/mgmt_gpio/mgmt_gpio.py | 166 ------ .../cocotb/tests/mgmt_gpio/mgmt_gpio_bidir.c | 63 --- .../dv/cocotb/tests/mgmt_gpio/mgmt_gpio_in.c | 67 --- .../dv/cocotb/tests/mgmt_gpio/mgmt_gpio_out.c | 59 -- .../session.bitbang_spi_i.vpd.tcl | 389 ------------- verilog/dv/cocotb/tests/spi_master/SPI_VIP.py | 86 --- .../dv/cocotb/tests/spi_master/spi_master.py | 106 ---- .../cocotb/tests/spi_master/spi_master_rd.c | 182 ------- .../cocotb/tests/spi_master/spi_master_temp.c | 113 ---- verilog/dv/cocotb/tests/spi_master/test_data | 3 - .../cocotb/tests/temp_partial_test/partial.py | 47 -- verilog/dv/cocotb/tests/timer/timer.py | 103 ---- .../dv/cocotb/tests/timer/timer0_oneshot.c | 70 --- .../dv/cocotb/tests/timer/timer0_periodic.c | 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-includes.v \ No newline at end of file diff --git a/verilog/dv/cocotb/README.md b/verilog/dv/cocotb/README.md deleted file mode 100644 index 1dcec1ad..00000000 --- a/verilog/dv/cocotb/README.md +++ /dev/null @@ -1,89 +0,0 @@ -Overview -======== -Cocotb environment (CTN) is a dynamic simulation testing environment. It's purpose is to speed testing simulation time and get coverage data. The environment is developed using cocotb, an open source coroutine-based co simulation testbench environment for verifying VHDL and SystemVerilog RTL using Python. CTN has 2 main layers: tests and whitebox models. Tests layer contain multiple tests and sequences that can communicate with the caravel (dut) through drivers shown in read at fig 1. Whitebox models layer contain multiple models that should mimic the behavior of each main block inside caravel see fig1. Model is supposed to check if the model is working as expected, if its registers contain the expected values all the time and report coverage of features provided by this block if it’s tested or not. - - - Alt text - -fig1. caravel testbench environment (read lines are drivers ) - -Prerequisites -============================= - -- Docker: [Linux](https://hub.docker.com/search?q=&type=edition&offering=community&operating_system=linux&utm_source=docker&utm_medium=webreferral&utm_campaign=dd-smartbutton&utm_location=header) || [Windows](https://desktop.docker.com/win/main/amd64/Docker%20Desktop%20Installer.exe?utm_source=docker&utm_medium=webreferral&utm_campaign=dd-smartbutton&utm_location=header) || [Mac with Intel Chip](https://desktop.docker.com/mac/main/amd64/Docker.dmg?utm_source=docker&utm_medium=webreferral&utm_campaign=dd-smartbutton&utm_location=header) || [Mac with M1 Chip](https://desktop.docker.com/mac/main/arm64/Docker.dmg?utm_source=docker&utm_medium=webreferral&utm_campaign=dd-smartbutton&utm_location=header) -- Python 3.6+ with PIP -- ```docker pull efabless/dv:cocotb``` -- iverilog or vcs -- export CARAVEL_ROOT= \ -- export MCW_ROOT= \ -- export PDK_ROOT= \ -- export PDK= \ - -run a test -============================= - - Use script verify_cocotb.py - -``` - -h, --help show this help message and exit - -regression REGRESSION, -r REGRESSION - name of regression can found in tests.json - - -test TEST [TEST ...], -t TEST [TEST ...] - name of test if no --sim provided RTL will be run - - - -sim SIM [SIM ...] Simulation type to be run RTL,GL&GL_SDF provided only - when run -test - - -testlist TESTLIST, -tl TESTLIST - path of testlist to be run - - -tag TAG provide tag of the run default would be regression - name and if no regression is provided would be - run___ - - -maxerr MAXERR max number of errors for every test before simulation - breaks default = 3 - - -vcs, -v use vcs as compiler if not used iverilog would be used - - -cov enable code coverage - - -corner CORNER [CORNER ...], -c CORNER [CORNER ...] - Corner type in case of GL_SDF run has to be provided - - -keep_pass_unzip Normally the waves and logs of passed tests would be - zipped. Using this option they wouldn't be zipped - -``` -Refer to [examples](doc/commands_example/README.md) - -Tests -=============== - -Refer to [tests doc](doc/tests/README.md) for tests list - - -cocotb directory tree -=============== -``` -├── caravel.py -> contains driving and mentoring functions for caravel interface -├── caravel_top.sv -> testbench top level -├── cpu.py -> contains driving and mentoring functions for wishbone when disable the cpu -├── hex_files -> folder that contains hex files -├── verify_cocotb.py -> script that run tests and regressions -├── sim -> directory get generate when run a test -│   └── -> tag of the run -│   ├── - -> test result directory contain all logs and wave related to the test -│   ├── command.log -> command use for this run -│   └── runs.log -> contains status of the run fails and passes tests -├── tests -> directory contains all the tests -├── tests.json -> test list have all the tests, regressions and contain small description about every test -└── wb_models -> contains checkers and models for some caravel blocks - -``` - -How to debug -=============== -` TO BE ADDED` \ No newline at end of file diff --git a/verilog/dv/cocotb/caravel.py b/verilog/dv/cocotb/caravel.py deleted file mode 100644 index c759ccc1..00000000 --- a/verilog/dv/cocotb/caravel.py +++ /dev/null @@ -1,432 +0,0 @@ -import random -import cocotb -from cocotb.clock import Clock -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -import cocotb.simulator -from cocotb.handle import SimHandleBase -from cocotb.handle import Force -from cocotb_coverage.coverage import * -from cocotb.binary import BinaryValue -import enum -from cocotb.handle import ( - ConstantObject, - HierarchyArrayObject, - HierarchyObject, - ModifiableObject, - NonHierarchyIndexableObject, - SimHandle, -) - -from itertools import groupby, product - -import interfaces.common as common -from common import GPIO_MODE -from common import MASK_GPIO_CTRL -from common import Macros - -def gpio_mode(gpios_values:list): - gpios=[] - for array in gpios_values: - gpio_value = GPIO_MODE(array[1]).name - for gpio in array[0]: - gpios.append((gpio,gpio_value)) - cocotb.log.info(f'[caravel][gpio_mode] gpios {gpios}') - return gpios - -Carvel_Coverage = coverage_section ( - - CoverPoint("top.caravel.gpio", vname="gpios mode", xf = lambda gpio ,gpio_mode: (gpio,gpio_mode) , - bins = list(product(range(38),[e.name for e in GPIO_MODE]))) - -) - -class Caravel_env: - def __init__(self,dut:SimHandleBase): - self.dut = dut - self.clk = dut.clock_tb - self.caravel_hdl = dut.uut - self.hk_hdl = dut.uut.housekeeping - - """start carvel by insert power then reset""" - async def start_up(self): - await self.power_up() - # await self.disable_csb() # no need for this anymore as default for gpio3 is now pullup - await self.reset() - await self.disable_bins() - common.fill_macros(self.dut.macros) # get macros value - - async def disable_bins(self): - for i in range(38): - common.drive_hdl(self.dut._id(f"bin{i}_en",False),(0,0),0) - - """setup the vdd and vcc power bins""" - async def power_up(self): - cocotb.log.info(f' [caravel] start powering up') - self.set_vdd(0) - self.set_vcc(0) - await ClockCycles(self.clk, 10) - cocotb.log.info(f' [caravel] power up -> connect vdd' ) - self.set_vdd(1) - # await ClockCycles(self.clk, 10) - cocotb.log.info(f' [caravel] power up -> connect vcc' ) - self.set_vcc(1) - await ClockCycles(self.clk, 10) - - """"reset caravel""" - async def reset(self): - cocotb.log.info(f' [caravel] start resetting') - self.dut.resetb_tb.value = 0 - await ClockCycles(self.clk, 20) - self.dut.resetb_tb.value = 1 - await ClockCycles(self.clk, 1) - cocotb.log.info(f' [caravel] finish resetting') - - - def set_vdd(self,value:bool): - self.dut.vddio_tb.value = value - self.dut.vssio_tb.value = 0 - self.dut.vddio_2_tb.value = value - self.dut.vssio_2_tb.value = 0 - self.dut.vdda_tb.value = value - self.dut.vssa_tb.value = 0 - self.dut.vdda1_tb.value = value - self.dut.vssa1_tb.value = 0 - self.dut.vdda1_2_tb.value = value - self.dut.vssa1_2_tb.value = 0 - self.dut.vdda2_tb.value = value - self.dut.vssa2_tb.value = 0 - - def set_vcc(self , value:bool): - self.dut.vccd_tb.value = value - self.dut.vssd_tb.value = 0 - self.dut.vccd1_tb.value = value - self.dut.vssd1_tb.value = 0 - self.dut.vccd2_tb.value = value - self.dut.vssd2_tb.value = 0 - - """drive csb signal bin E8 mprj[3]""" - async def drive_csb(self,bit): - self.drive_gpio_in((3,3),bit) - self.drive_gpio_in((2,2),0) - await ClockCycles(self.clk, 1) - - - """set the spi vsb signal high to disable housekeeping spi transmission bin E8 mprj[3]""" - async def disable_csb(self ): - cocotb.log.info(f' [caravel] disable housekeeping spi transmission') - await self.drive_csb(1) - - """set the spi vsb signal high impedance """ - async def release_csb(self ): - cocotb.log.info(f' [caravel] release housekeeping spi transmission') - self.release_gpio(3) - self.release_gpio(2) - await ClockCycles(self.clk, 1) - - """set the spi vsb signal low to enable housekeeping spi transmission bin E8 mprj[3]""" - async def enable_csb(self ): - cocotb.log.info(f' [caravel] enable housekeeping spi transmission') - await self.drive_csb(0) - - - """return the value of mprj in bits used tp monitor the output gpios value""" - def monitor_gpio(self,bits:tuple): - mprj = self.dut.mprj_io_tb.value - size =mprj.n_bits -1 #size of bins array - mprj_out= self.dut.mprj_io_tb.value[size - bits[0]:size - bits[1]] - if(mprj_out.is_resolvable): - cocotb.log.debug(f' [caravel] Monitor : mprj[{bits[0]}:{bits[1]}] = {hex(mprj_out)}') - else: - cocotb.log.debug(f' [caravel] Monitor : mprj[{bits[0]}:{bits[1]}] = {mprj_out}') - return mprj_out - - """return the value of management gpio""" - def monitor_mgmt_gpio(self): - data = self.dut.gpio_tb.value - cocotb.log.debug(f' [caravel] Monitor mgmt gpio = {data}') - return data - - """change the configration of the gpios by overwrite their defaults value then reset - need to take at least 1 cycle for reset """ - ### dont use back door accessing - async def configure_gpio_defaults(self,gpios_values: list): - gpio_defaults = self.caravel_hdl.gpio_defaults.value - cocotb.log.info(f' [caravel] start cofigure gpio gpios ') - size = gpio_defaults.n_bits -1 #number of bins in gpio_defaults - # list example [[(gpios),value],[(gpios),value],[(gpios),value]] - for array in gpios_values: - gpio_value = array[1] - for gpio in array[0]: - self.cov_configure_gpios(gpio,gpio_value.name) - gpio_defaults[size - (gpio*13 + 12): size -gpio*13] = gpio_value.value - #cocotb.log.info(f' [caravel] gpio_defaults[{size - (gpio*13 + 12)}:{size -gpio*13}] = {gpio_value.value} ') - self.caravel_hdl.gpio_defaults.value = gpio_defaults - #reset - self.caravel_hdl.gpio_resetn_1_shifted.value = 0 - self.caravel_hdl.gpio_resetn_2_shifted.value = 0 - await ClockCycles(self.clk, 1) - self.caravel_hdl.gpio_resetn_1_shifted.value = 1 - self.caravel_hdl.gpio_resetn_2_shifted.value = 1 - cocotb.log.info(f' [caravel] finish configuring gpios, the curret gpios value: ') - self.print_gpios_ctrl_val() - - """change the configration of the gpios by overwrite the register value - in control registers and housekeeping regs, don't consume simulation cycles""" - ### dont use back door accessing - def configure_gpios_regs(self,gpios_values: list): - cocotb.log.info(f' [caravel] start cofigure gpio gpios ') - control_modules = self.control_blocks_paths() - # list example [[(gpios),value],[(gpios),value],[(gpios),value]] - for array in gpios_values: - gpio_value = array[1] - for gpio in array[0]: - self.cov_configure_gpios(gpio,gpio_value.name) - self.gpio_control_reg_write(control_modules[gpio],gpio_value.value) # for control blocks regs - self.caravel_hdl.housekeeping.gpio_configure[gpio].value = gpio_value.value # for house keeping regs - cocotb.log.info(f' [caravel] finish configuring gpios, the curret gpios value: ') - self.print_gpios_ctrl_val() - self.print_gpios_HW_val() - - """dummy function for coverage sampling""" - @Carvel_Coverage - def cov_configure_gpios(self,gpio,gpio_mode): - cocotb.log.debug(f' [caravel] gpio [{gpio}] = {gpio_mode} ') - pass - - def print_gpios_default_val(self,print=1): - gpio_defaults = self.caravel_hdl.gpio_defaults.value - size = gpio_defaults.n_bits -1 #number of bins in gpio_defaults - gpios = [] - for gpio in range(Macros['MPRJ_IO_PADS']): - gpio_value = gpio_defaults[size - (gpio*13 + 12): size -gpio*13] - gpio_enum = GPIO_MODE(gpio_value.integer) - gpios.append((gpio,gpio_enum)) - group_bins = groupby(gpios,key=lambda x: x[1]) - for key,value in group_bins: - gpios=[] - for gpio in list(value): - gpios.append(gpio[0]) - if (print): - cocotb.log.info(f' [caravel] gpios[{gpios}] are {key} ') - return gpios - - """print the values return in the gpio of control block mode in GPIO Mode format""" - def print_gpios_ctrl_val(self, print=1): - control_modules = self.control_blocks_paths() - gpios = [] - for i , gpio in enumerate(control_modules): - gpios.append((i,self.gpio_control_reg_read(gpio))) - group_bins = groupby(gpios,key=lambda x: x[1]) - for key,value in group_bins: - gpios=[] - for gpio in list(value): - gpios.append(gpio[0]) - if (print): - cocotb.log.info(f' [caravel] gpios[{gpios}] are {key} ') - return gpios - - def _check_gpio_ctrl_eq_HW(self): - assert self.print_gpios_ctrl_val(1) == self.print_gpios_HW_val(1), f'there is an issue while configuration the control block register value isn\'t the same as the house keeping gpio register' - - """print the values return in the gpio of housekeeping block mode in GPIO Mode format""" - def print_gpios_HW_val(self,print=1): - gpios = [] - for pin in range(Macros['MPRJ_IO_PADS']): - gpios.append((pin,GPIO_MODE(self.caravel_hdl.housekeeping.gpio_configure[pin].value))) - group_bins = groupby(gpios,key=lambda x: x[1]) - for key,value in group_bins: - gpios=[] - for gpio in list(value): - gpios.append(gpio[0]) - if (print): - cocotb.log.info(f' [caravel] gpios[{gpios}] are {key} ') - return gpios - - - """return the paths of the control blocks""" - def control_blocks_paths(self)-> list: - car = self.caravel_hdl - control_modules =[car._id("gpio_control_bidir_1[0]",False),car._id("gpio_control_bidir_1[1]",False)] - #add gpio_control_in_1a (GPIO 2 to 7) - for i in range(6): - control_modules.append(car._id(f'gpio_control_in_1a[{i}]',False)) - #add gpio_control_in_1 (GPIO 8 to 18) - for i in range(Macros['MPRJ_IO_PADS_1']-9+1): - control_modules.append(car._id(f'gpio_control_in_1[{i}]',False)) - #add gpio_control_in_2 (GPIO 19 to 34) - for i in range(Macros['MPRJ_IO_PADS_2']-4+1): - control_modules.append(car._id(f'gpio_control_in_2[{i}]',False)) - # Last three GPIOs (spi_sdo, flash_io2, and flash_io3) gpio_control_bidir_2 - for i in range(3): - control_modules.append(car._id(f'gpio_control_bidir_2[{i}]',False)) - return control_modules - - """read the control register and return a GPIO Mode it takes the path to the control reg""" - def gpio_control_reg_read(self,path:SimHandleBase) -> GPIO_MODE: - gpio_mgmt_en = path.mgmt_ena.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_MGMT_EN.value - gpio_out_dis = path.gpio_outenb.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_OUT_DIS.value - gpio_holdover = path.gpio_holdover.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_OVERRIDE.value - gpio_in_dis = path.gpio_inenb.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_INP_DIS.value - gpio_mode_sel = path.gpio_ib_mode_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_MOD_SEL.value - gpio_anlg_en = path.gpio_ana_en.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_EN.value - gpio_anlg_sel = path.gpio_ana_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_SEL.value - gpio_anlg_pol = path.gpio_ana_pol.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_POL.value - gpio_slow_sel = path.gpio_slow_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_SLOW.value - gpio_vtrip_sel = path.gpio_vtrip_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_TRIP.value - gpio_dgtl_mode = path.gpio_dm.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_DGTL_MODE.value - control_reg = (gpio_mgmt_en | gpio_out_dis | gpio_holdover| gpio_in_dis | gpio_mode_sel | gpio_anlg_en - |gpio_anlg_sel|gpio_anlg_pol|gpio_slow_sel|gpio_vtrip_sel|gpio_dgtl_mode) - return(GPIO_MODE(control_reg)) - - """read the control register and return a GPIO Mode it takes the path to the control reg""" - def gpio_control_reg_write(self,path:SimHandleBase,data) : - bits =common.int_to_bin_list(data,14) - path.mgmt_ena.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_MGMT_EN.value] - path.gpio_outenb.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_OUT_DIS.value] - path.gpio_holdover.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_OVERRIDE.value] - path.gpio_inenb.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_INP_DIS.value] - path.gpio_ib_mode_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_MOD_SEL.value] - path.gpio_ana_en.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_EN.value] - path.gpio_ana_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_SEL.value] - path.gpio_ana_pol.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_POL.value] - path.gpio_slow_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_SLOW.value] - path.gpio_vtrip_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_TRIP.value] - gpio_dm =bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_DGTL_MODE.value:MASK_GPIO_CTRL.MASK_GPIO_CTRL_DGTL_MODE.value+3] - gpio_dm =sum(d * 2**i for i, d in enumerate(gpio_dm)) # convert list to binary int - path.gpio_dm.value = gpio_dm - - # """drive the value of mprj bits with spicific data from input pad at the top""" - # def release_gpio(self): - # io = self.caravel_hdl.padframe.mprj_pads.io - # mprj , n_bits = common.signal_valueZ_size(io) - # io.value = mprj - # cocotb.log.info(f' [caravel] drive_gpio_in pad mprj with {mprj}') - - """drive the value of mprj bits with spicific data from input pad at the top""" - def drive_gpio_in(self,bits,data): - # io = self.caravel_hdl.padframe.mprj_pads.io - # mprj , n_bits = common.signal_value_size(io) - # cocotb.log.debug(f' [caravel] before mprj with {mprj} and data = {data} bit [{n_bits-1-bits[0]}]:[{n_bits-1-bits[1]}]') - # mprj[n_bits-1-bits[0]:n_bits-1-bits[1]] = data - # io.value = mprj - # cocotb.log.info(f' [caravel] drive_gpio_in pad mprj with {mprj}') - data_bits = [] - is_list = isinstance(bits, (list,tuple)) - if is_list : - cocotb.log.debug(f'[caravel] [drive_gpio_in] start bits[1] = {bits[1]} bits[0]= {bits[0]}') - data_bits = BinaryValue(value = data, n_bits =bits[0]-bits[1]+1 ,bigEndian=(bits[0] {data}') - await FallingEdge(self.dut.wb_ack_o) # wait for acknowledge - self.hk_hdl.wb_stb_i.value = 0 - self.hk_hdl.wb_cyc_i.value = 0 - cocotb.log.info(f'Monitor: End writing {hex(addr)} -> {data}') - - - """read from the house keeping registers by back door no need for commands and waiting for the data to show on mprj""" - async def hk_read_backdoor(self,addr): - await RisingEdge(self.clk) - self.hk_hdl.wb_stb_i.value = 1 - self.hk_hdl.wb_cyc_i.value = 1 - self.hk_hdl.wb_sel_i.value = 0 - self.hk_hdl.wb_we_i.value = 0 - self.hk_hdl.wb_adr_i.value = addr - cocotb.log.info(f' [housekeeping] Monitor: Start reading from {hex(addr)}') - await FallingEdge(self.hk_hdl.wb_ack_o) - self.hk_hdl.wb_stb_i.value = 0 - self.hk_hdl.wb_cyc_i.value = 0 - cocotb.log.info(f' [housekeeping] Monitor: read from {hex(addr)} value {(self.hk_hdl.wb_dat_o.value)}') - return self.hk_hdl.wb_dat_o.value - - - diff --git a/verilog/dv/cocotb/caravel_tests.py b/verilog/dv/cocotb/caravel_tests.py deleted file mode 100644 index 51c2f85f..00000000 --- a/verilog/dv/cocotb/caravel_tests.py +++ /dev/null @@ -1,207 +0,0 @@ -from cgitb import handler -import random -import cocotb -from cocotb.clock import Clock -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -import cocotb.simulator -from cocotb_coverage.coverage import * -from cocotb.binary import BinaryValue -import interfaces.caravel -from interfaces.logic_analyzer import LA -from interfaces.caravel import GPIO_MODE, Caravel_env -from wb_models.housekeepingWB.housekeepingWB import HK_whiteBox -import interfaces.common as common -import logging -from interfaces.cpu import RiskV -from cocotb.log import SimTimeContextFilter -from cocotb.log import SimLogFormatter -from interfaces.defsParser import Regs -from tests.common_functions.Timeout import Timeout -from cocotb.result import TestSuccess -import inspect -import os -# tests -from tests.bitbang.bitbang_tests import * -from tests.bitbang.bitbang_tests_cpu import * -from tests.housekeeping.housekeeping_regs.housekeeping_regs_tests import * -from tests.housekeeping.housekeeping_spi.user_pass_thru import * -from tests.housekeeping.housekeeping_spi.spi import * -from tests.housekeeping.general.pll import * -from tests.housekeeping.general.sys_ctrl import * -from tests.temp_partial_test.partial import * -from tests.hello_world.helloWorld import * -from tests.cpu.cpu_stress import * -from tests.mem.mem_stress import * -from tests.irq.IRQ_external import * -from tests.irq.IRQ_timer import * -from tests.irq.IRQ_uart import * -from tests.gpio.gpio import * -from tests.gpio_caravan.gpio_caravan import * -from tests.gpio.gpio_user import * -from tests.mgmt_gpio.mgmt_gpio import * -from tests.timer.timer import * -from tests.uart.uart import * -from tests.spi_master.spi_master import * -from tests.logicAnalyzer.la import * -from tests.debug.debug import * -from tests.cpu.cpu_reset import * - -# archive tests -@cocotb.test() -async def cpu_drive(dut): - TestName = inspect.stack()[0][3] - if not os.path.exists(f'sim/{TestName}'): - os.mkdir(f'sim/{TestName}') # create test folder - cocotb.log.setLevel(logging.INFO) - handler = logging.FileHandler(f"sim/{TestName}/{TestName}.log",mode='w') - handler.addFilter(SimTimeContextFilter()) - handler.setFormatter(SimLogFormatter()) - cocotb.log.addHandler(handler) - caravelEnv = caravel.Caravel_env(dut) - Timeout(caravelEnv.clk,1000000,0.1) - la = LA(dut) - clock = Clock(caravelEnv.clk, 12.5, units="ns") # Create a 10ns period clock on port clk - cpu = RiskV(dut) - cpu.cpu_force_reset() - - cocotb.start_soon(clock.start()) # Start the clock - - await caravelEnv.start_up() - hk = HK_whiteBox(dut) - - reg = Regs() - time_out_count =0 - - await ClockCycles(caravelEnv.clk, 100) - address = reg.get_addr('reg_wb_enable') - await cpu.drive_data2address(address,1) - address = reg.get_addr('reg_debug_2') - await cpu.drive_data2address(address,0xdFF0) - await ClockCycles(caravelEnv.clk, 10) - cpu.cpu_release_reset() - await ClockCycles(caravelEnv.clk, 10) - - raise TestSuccess(f" TEST {TestName} passed") - - while True: - await ClockCycles(caravelEnv.clk, 1) - if (cpu.read_debug_reg1() == 0xFFF0): - break - cocotb.log.info(f"[TEST][cpu_drive] debug reg1 = 0xFFF0") - await ClockCycles(caravelEnv.clk, 10) - address = reg.get_addr('reg_debug_2') - await cpu.drive_data2address(address,0xdFF0) - await ClockCycles(caravelEnv.clk, 50) - # address = reg.get_addr('reg_mprj_io_0') - # await cpu.drive_data2address(address,0x0c03) - cocotb.log.info(f"[TEST][cpu_drive] wait debug reg1 = 0xddd0") - while True: - await ClockCycles(caravelEnv.clk, 1) - if (cpu.read_debug_reg1() == 0xddd0): - break - cocotb.log.info(f"[TEST][cpu_drive] debug reg1 = 0xddd0") - - await ClockCycles(caravelEnv.clk, 10) - - caravelEnv.print_gpios_HW_val() - coverage_db.export_to_yaml(filename="coverage.yalm") - - -@cocotb.test() -async def spi_drive(dut): - cocotb.log.setLevel(logging.INFO) - handler = logging.FileHandler(f"test.log",mode='w') - handler.addFilter(SimTimeContextFilter()) - handler.setFormatter(SimLogFormatter()) - cocotb.log.addHandler(handler) - caravelEnv = caravel.Caravel_env(dut) - - - la = LA(dut) - clock = Clock(caravelEnv.clk, 12.5, units="ns") # Create a 10ns period clock on port clk - cocotb.start_soon(clock.start()) # Start the clock - await caravelEnv.start_up() - hk = HK_whiteBox(dut,True) - - caravelEnv.enable_csb() - await ClockCycles(caravelEnv.clk,1) - # caravelEnv.configure_gpios_regs([[tuple(range(0,6)),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT]]) - await ClockCycles(caravelEnv.clk,1) - await caravelEnv.hk_write_byte(0x40) # read command - # await caravelEnv.hk_write_byte(0x80) # command write - await caravelEnv.hk_write_byte(0x0) # address - # await caravelEnv.hk_write_byte(0x03) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - - read_data = await caravelEnv.hk_read_byte() # read value - print(read_data) - read_data = await caravelEnv.hk_read_byte() # read value - print(read_data) - read_data = await caravelEnv.hk_read_byte() # read value - print(read_data) - read_data = await caravelEnv.hk_read_byte() # read value - print(read_data) - read_data = await caravelEnv.hk_read_byte() # read value - print(read_data) - read_data = await caravelEnv.hk_read_byte() # read value - print(read_data) - read_data = await caravelEnv.hk_read_byte() # read value - print(read_data) - read_data = await caravelEnv.hk_read_byte(True) # read value - caravelEnv.disable_csb() - await ClockCycles(caravelEnv.clk,1) - caravelEnv.enable_csb() - await ClockCycles(caravelEnv.clk,1) - # caravelEnv.configure_gpios_regs([[tuple(range(0,6)),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT]]) - await ClockCycles(caravelEnv.clk,1) - await caravelEnv.hk_write_byte(0x40) # read command - # await caravelEnv.hk_write_byte(0x80) # command write - await caravelEnv.hk_write_byte(0x8) # address - # await caravelEnv.hk_write_byte(0x03) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - # await caravelEnv.hk_write_byte(0xaa) # data - - read_data = await caravelEnv.hk_read_byte() # read value - read_data = await caravelEnv.hk_read_byte() # read value - read_data = await caravelEnv.hk_read_byte() # read value - read_data = await caravelEnv.hk_read_byte() # read value - read_data = await caravelEnv.hk_read_byte() # read value - read_data = await caravelEnv.hk_read_byte() # read value - read_data = await caravelEnv.hk_read_byte() # read value - read_data = await caravelEnv.hk_read_byte() # read value - - # caravelEnv.drive_gpio_in([5,5],1) - await ClockCycles(caravelEnv.clk,40) - coverage_db.export_to_yaml(filename="coverage.yml") - coverage_db.export_to_xml(filename="coverage.xml") - return - - diff --git a/verilog/dv/cocotb/caravel_top.sv b/verilog/dv/cocotb/caravel_top.sv deleted file mode 100644 index 3587852f..00000000 --- a/verilog/dv/cocotb/caravel_top.sv +++ /dev/null @@ -1,380 +0,0 @@ -`timescale 1 ns / 1 ps -`ifdef VCS -`ifndef GL - `include "includes.v" // in case of RTL coverage is needed and it doesn't work correctly without include files by this way -`endif // ~ GL - -`ifndef ENABLE_SDF - `include "libs.ref/sky130_fd_io/verilog/sky130_fd_io.v" - `include "libs.ref/sky130_fd_io/verilog/sky130_ef_io.v" - `include "libs.ref/sky130_fd_sc_hd/verilog/primitives.v" - `include "libs.ref/sky130_fd_sc_hd/verilog/sky130_fd_sc_hd.v" - `include "libs.ref/sky130_fd_sc_hvl/verilog/primitives.v" - `include "libs.ref/sky130_fd_sc_hvl/verilog/sky130_fd_sc_hvl.v" -`else - `include "cvc-pdk/sky130_ef_io.v" - `include "cvc-pdk/sky130_fd_io.v" - `include "cvc-pdk/primitives_hd.v" - `include "cvc-pdk/sky130_fd_sc_hd.v" - `include "cvc-pdk/primitives_hvl.v" - `include "cvc-pdk/sky130_fd_sc_hvl.v" -`endif // ~ ENABLE_SDF -`endif // VCS - -module caravel_top ; - -// parameter FILENAME = {"hex_files/",`TESTNAME,".hex"}; -parameter FILENAME={"hex_files/",`TESTNAME,".hex"}; -initial begin - `ifdef VCS - `ifdef ENABLE_SDF - $vcdplusfile({`MAIN_PATH,"/sim/",`TAG,"/",`FTESTNAME,"/",`TESTNAME , `CORNER,"-",`SDF_POSTFIX, ".vpd"}); - `else - $vcdplusfile({`MAIN_PATH,"/sim/",`TAG,"/",`FTESTNAME,"/",`TESTNAME ,".vpd"}); - `endif - $vcdpluson(); - `else - $dumpfile ({"sim/",`TAG,"/",`SIM,"-",`TESTNAME,"/",`SIM,"-",`TESTNAME,".vcd"}); - $dumpvars (0, caravel_top); - `endif -end - `ifdef VCS - `ifdef ENABLE_SDF - `include "sdf_includes.v" - `endif - `endif // VCS - wire vddio_tb; // Common 3.3V padframe/ESD power - wire vddio_2_tb; // Common 3.3V padframe/ESD power - wire vssio_tb; // Common padframe/ESD ground - wire vssio_2_tb; // Common padframe/ESD ground - wire vdda_tb; // Management 3.3V power - wire vssa_tb; // Common analog ground - wire vccd_tb; // Management/Common 1.8V power - wire vssd_tb; // Common digital ground - wire vdda1_tb; // User area 1 3.3V power - wire vdda1_2_tb; // User area 1 3.3V power - wire vdda2_tb; // User area 2 3.3V power - wire vssa1_tb; // User area 1 analog ground - wire vssa1_2_tb; // User area 1 analog ground - wire vssa2_tb; // User area 2 analog ground - wire vccd1_tb; // User area 1 1.8V power - wire vccd2_tb; // User area 2 1.8V power - wire vssd1_tb; // User area 1 digital ground - wire vssd2_tb; // User area 2 digital ground - - wire gpio_tb; // Used for external LDO control - wire [38-1:0] mprj_io_tb; - reg clock_tb; // CMOS core clock input; not a crystal - wire resetb_tb; // Reset input (sense inverted) - - // Note that only two flash data pins are dedicated to the - // management SoC wrapper. The management SoC exports the - // quad SPI mode status to make use of the top two mprj_io - // pins for io2 and io3. - - wire flash_csb_tb; - wire flash_clk_tb; - wire flash_io0_tb; - wire flash_io1_tb; - - -`ifdef CARAVAN -caravan uut ( -`else -caravel uut ( -`endif - .vddio (vddio_tb), - .vddio_2 (vddio_2_tb), - .vssio (vssio_tb), - .vssio_2 (vssio_2_tb), - .vdda (vdda_tb), - .vssa (vssa_tb), - .vccd (vccd_tb), - .vssd (vssd_tb), - .vdda1 (vdda1_tb), - .vdda1_2 (vdda1_2_tb), - .vdda2 (vdda2_tb), - .vssa1 (vssa1_tb), - .vssa1_2 (vssa1_2_tb), - .vssa2 (vssa2_tb), - .vccd1 (vccd1_tb), - .vccd2 (vccd2_tb), - .vssd1 (vssd1_tb), - .vssd2 (vssd2_tb), - .clock (clock_tb), - .gpio (gpio_tb), - .mprj_io (mprj_io_tb), - .flash_csb(flash_csb_tb), - .flash_clk(flash_clk_tb), - .flash_io0(flash_io0_tb), - .flash_io1(flash_io1_tb), - .resetb (resetb_tb) - ); - - spiflash #( - FILENAME - ) spiflash ( - .csb(flash_csb_tb), - .clk(flash_clk_tb), - .io0(flash_io0_tb), - .io1(flash_io1_tb), - .io2(), // not used - .io3() // not used - ); - - mac macros(); - - - // make speical variables for the mprj input to assign the input without writing to the output gpios - // cocotb limitation #2587: iverilog deal with array as 1 object not multiple of objects so can't write to only 1 element - wire bin0; - wire bin0_en; - wire bin1; - wire bin1_en; - wire bin2; - wire bin2_en; - wire bin3; - wire bin3_en; - wire bin4; - wire bin4_en; - wire bin5; - wire bin5_en; - wire bin6; - wire bin6_en; - wire bin7; - wire bin7_en; - wire bin8; - wire bin8_en; - wire bin9; - wire bin9_en; - wire bin10; - wire bin10_en; - wire bin11; - wire bin11_en; - wire bin12; - wire bin12_en; - wire bin13; - wire bin13_en; - wire bin14; - wire bin14_en; - wire bin15; - wire bin15_en; - wire bin16; - wire bin16_en; - wire bin17; - wire bin17_en; - wire bin18; - wire bin18_en; - wire bin19; - wire bin19_en; - wire bin20; - wire bin20_en; - wire bin21; - wire bin21_en; - wire bin22; - wire bin22_en; - wire bin23; - wire bin23_en; - wire bin24; - wire bin24_en; - wire bin25; - wire bin25_en; - wire bin26; - wire bin26_en; - wire bin27; - wire bin27_en; - wire bin28; - wire bin28_en; - wire bin29; - wire bin29_en; - wire bin30; - wire bin30_en; - wire bin31; - wire bin31_en; - wire bin32; - wire bin32_en; - wire bin33; - wire bin33_en; - wire bin34; - wire bin34_en; - wire bin35; - wire bin35_en; - wire bin36; - wire bin36_en; - wire bin37; - wire bin37_en; - - - assign mprj_io_tb[0] = (bin0_en) ? bin0 : 1'bz; - assign mprj_io_tb[1] = (bin1_en) ? bin1 : 1'bz; - assign mprj_io_tb[2] = (bin2_en) ? bin2 : 1'bz; - assign mprj_io_tb[3] = (bin3_en) ? bin3 : 1'bz; - assign mprj_io_tb[4] = (bin4_en) ? bin4 : 1'bz; - - assign mprj_io_tb[5] = (bin5_en) ? bin5 : 1'bz; - assign mprj_io_tb[6] = (bin6_en) ? bin6 : 1'bz; - assign mprj_io_tb[7] = (bin7_en) ? bin7 : 1'bz; - assign mprj_io_tb[8] = (bin8_en) ? bin8 : 1'bz; - assign mprj_io_tb[9] = (bin9_en) ? bin9 : 1'bz; - - assign mprj_io_tb[10] = (bin10_en) ? bin10 : 1'bz; - assign mprj_io_tb[11] = (bin11_en) ? bin11 : 1'bz; - assign mprj_io_tb[12] = (bin12_en) ? bin12 : 1'bz; - assign mprj_io_tb[13] = (bin13_en) ? bin13 : 1'bz; - assign mprj_io_tb[14] = (bin14_en) ? bin14 : 1'bz; - - assign mprj_io_tb[15] = (bin15_en) ? bin15 : 1'bz; - assign mprj_io_tb[16] = (bin16_en) ? bin16 : 1'bz; - assign mprj_io_tb[17] = (bin17_en) ? bin17 : 1'bz; - assign mprj_io_tb[18] = (bin18_en) ? bin18 : 1'bz; - assign mprj_io_tb[19] = (bin19_en) ? bin19 : 1'bz; - - assign mprj_io_tb[20] = (bin20_en) ? bin20 : 1'bz; - assign mprj_io_tb[21] = (bin21_en) ? bin21 : 1'bz; - assign mprj_io_tb[22] = (bin22_en) ? bin22 : 1'bz; - assign mprj_io_tb[23] = (bin23_en) ? bin23 : 1'bz; - assign mprj_io_tb[24] = (bin24_en) ? bin24 : 1'bz; - - assign mprj_io_tb[25] = (bin25_en) ? bin25 : 1'bz; - assign mprj_io_tb[26] = (bin26_en) ? bin26 : 1'bz; - assign mprj_io_tb[27] = (bin27_en) ? bin27 : 1'bz; - assign mprj_io_tb[28] = (bin28_en) ? bin28 : 1'bz; - assign mprj_io_tb[29] = (bin29_en) ? bin29 : 1'bz; - - assign mprj_io_tb[30] = (bin30_en) ? bin30 : 1'bz; - assign mprj_io_tb[31] = (bin31_en) ? bin31 : 1'bz; - assign mprj_io_tb[32] = (bin32_en) ? bin32 : 1'bz; - assign mprj_io_tb[33] = (bin33_en) ? bin33 : 1'bz; - assign mprj_io_tb[34] = (bin34_en) ? bin34 : 1'bz; - - assign mprj_io_tb[35] = (bin35_en) ? bin35 : 1'bz; - assign mprj_io_tb[36] = (bin36_en) ? bin36 : 1'bz; - assign mprj_io_tb[37] = (bin37_en) ? bin37 : 1'bz; - - - - // to read from mprj array with iverilog - wire bin0_monitor; - wire bin1_monitor; - wire bin2_monitor; - wire bin3_monitor; - wire bin4_monitor; - wire bin5_monitor; - wire bin6_monitor; - wire bin7_monitor; - wire bin8_monitor; - wire bin9_monitor; - wire bin10_monitor; - wire bin11_monitor; - wire bin12_monitor; - wire bin13_monitor; - wire bin14_monitor; - wire bin15_monitor; - wire bin16_monitor; - wire bin17_monitor; - wire bin18_monitor; - wire bin19_monitor; - wire bin20_monitor; - wire bin21_monitor; - wire bin22_monitor; - wire bin23_monitor; - wire bin24_monitor; - wire bin25_monitor; - wire bin26_monitor; - wire bin27_monitor; - wire bin28_monitor; - wire bin29_monitor; - wire bin30_monitor; - wire bin31_monitor; - wire bin32_monitor; - wire bin33_monitor; - wire bin34_monitor; - wire bin35_monitor; - wire bin36_monitor; - wire bin37_monitor; - - assign bin0_monitor = mprj_io_tb[0]; - assign bin1_monitor = mprj_io_tb[1]; - assign bin2_monitor = mprj_io_tb[2]; - assign bin3_monitor = mprj_io_tb[3]; - assign bin4_monitor = mprj_io_tb[4]; - assign bin5_monitor = mprj_io_tb[5]; - assign bin6_monitor = mprj_io_tb[6]; - assign bin7_monitor = mprj_io_tb[7]; - assign bin8_monitor = mprj_io_tb[8]; - assign bin9_monitor = mprj_io_tb[9]; - assign bin10_monitor = mprj_io_tb[10]; - assign bin11_monitor = mprj_io_tb[11]; - assign bin12_monitor = mprj_io_tb[12]; - assign bin13_monitor = mprj_io_tb[13]; - assign bin14_monitor = mprj_io_tb[14]; - assign bin15_monitor = mprj_io_tb[15]; - assign bin16_monitor = mprj_io_tb[16]; - assign bin17_monitor = mprj_io_tb[17]; - assign bin18_monitor = mprj_io_tb[18]; - assign bin19_monitor = mprj_io_tb[19]; - assign bin20_monitor = mprj_io_tb[20]; - assign bin21_monitor = mprj_io_tb[21]; - assign bin22_monitor = mprj_io_tb[22]; - assign bin23_monitor = mprj_io_tb[23]; - assign bin24_monitor = mprj_io_tb[24]; - assign bin25_monitor = mprj_io_tb[25]; - assign bin26_monitor = mprj_io_tb[26]; - assign bin27_monitor = mprj_io_tb[27]; - assign bin28_monitor = mprj_io_tb[28]; - assign bin29_monitor = mprj_io_tb[29]; - assign bin30_monitor = mprj_io_tb[30]; - assign bin31_monitor = mprj_io_tb[31]; - assign bin32_monitor = mprj_io_tb[32]; - assign bin33_monitor = mprj_io_tb[33]; - assign bin34_monitor = mprj_io_tb[34]; - assign bin35_monitor = mprj_io_tb[35]; - assign bin36_monitor = mprj_io_tb[36]; - assign bin37_monitor = mprj_io_tb[37]; - -endmodule - -// module that has all needed macros by cocotb -module mac; - -reg [7:0] MPRJ_IO_PADS_1 = `ifdef MPRJ_IO_PADS_1 `MPRJ_IO_PADS_1 `else 0 `endif; /* number of user GPIO pads on user1 side */ -reg [7:0] MPRJ_IO_PADS_2 = `ifdef MPRJ_IO_PADS_2 `MPRJ_IO_PADS_2 `else 0 `endif; /* number of user GPIO pads on user2 side */ -reg [7:0] MPRJ_IO_PADS = `ifdef MPRJ_IO_PADS `MPRJ_IO_PADS `else 0 `endif; -reg [7:0] MPRJ_PWR_PADS_1 =`ifdef MPRJ_PWR_PADS_1 `MPRJ_PWR_PADS_1 `else 0 `endif; /* vdda1, vccd1 enable/disable control */ -reg [7:0] MPRJ_PWR_PADS_2 = `ifdef MPRJ_PWR_PADS_2 `MPRJ_PWR_PADS_2 `else 0 `endif; /* vdda2, vccd2 enable/disable control */ -reg [7:0] MPRJ_PWR_PADS =`ifdef MPRJ_PWR_PADS `MPRJ_PWR_PADS `else 0 `endif; -// Analog pads are only used by the "caravan" module and associated -// modules such as user_analog_project_wrapper and chip_io_alt. -reg [7:0] ANALOG_PADS_1 = `ifdef ANALOG_PADS_1 `ANALOG_PADS_1 `else 0 `endif; -reg [7:0] ANALOG_PADS_2 = `ifdef ANALOG_PADS_2 `ANALOG_PADS_2 `else 0 `endif; -reg [7:0] ANALOG_PADS = `ifdef ANALOG_PADS `ANALOG_PADS `else 0 `endif; - -// Type and size of soc_mem -reg USE_CUSTOM_DFFRAM = `ifdef USE_CUSTOM_DFFRAM 1 `else 0 `endif; -// don't change the following without double checking addr widths -reg [7:0] MEM_WORDS = `ifdef MEM_WORDS `MEM_WORDS `else 0 `endif; -// Number of columns in the custom memory; takes one of three values: -// 1 column : 1 KB, 2 column: 2 KB, 4 column: 4KB -reg [7:0] DFFRAM_WSIZE = `ifdef DFFRAM_WSIZE `DFFRAM_WSIZE `else 0 `endif; -reg [7:0] DFFRAM_USE_LATCH = `ifdef DFFRAM_USE_LATCH `DFFRAM_USE_LATCH `else 0 `endif; - -// not really parameterized but just to easily keep track of the number -// of ram_block across different modules -reg [7:0] RAM_BLOCKS = `ifdef RAM_BLOCKS `RAM_BLOCKS `else 0 `endif; - -// Clock divisor default value -reg [7:0] CLK_DIV = `ifdef CLK_DIV `CLK_DIV `else 0 `endif; - -// GPIO control default mode and enable for most I/Os -// Most I/Os set to be user bidirectional pins on power-up. -reg [7:0] MGMT_INIT = `ifdef MGMT_INIT `MGMT_INIT `else 0 `endif; -reg [7:0] OENB_INIT = `ifdef OENB_INIT `OENB_INIT `else 0 `endif; -reg [7:0] DM_INIT = `ifdef DM_INIT `DM_INIT `else 0 `endif; - -// GL - -reg GL = `ifdef GL 1 `else 0 `endif; - -reg CARAVAN = `ifdef CARAVAN 1 `else 0 `endif; - -endmodule \ No newline at end of file diff --git a/verilog/dv/cocotb/cpu.py b/verilog/dv/cocotb/cpu.py deleted file mode 100644 index 0cb121cd..00000000 --- a/verilog/dv/cocotb/cpu.py +++ /dev/null @@ -1,232 +0,0 @@ -from operator import add -import random -import cocotb -from cocotb.clock import Clock -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -import cocotb.simulator -from cocotb.handle import SimHandleBase -from cocotb.handle import Force -from cocotb_coverage.coverage import * -from cocotb.binary import BinaryValue -import enum -from cocotb.handle import ( - ConstantObject, - HierarchyArrayObject, - HierarchyObject, - ModifiableObject, - NonHierarchyIndexableObject, - SimHandle, -) - -from itertools import groupby, product - -import interfaces.common as common -from common import GPIO_MODE -from common import MASK_GPIO_CTRL -from common import Macros - -class RiskV: - def __init__(self,dut:SimHandleBase): - self.dut = dut - self.clk = dut.clock_tb - if not Macros['GL']: - self.cpu_hdl = dut.uut.soc.core.VexRiscv - else: - self.cpu_hdl = dut.uut.soc.core - self.debug_hdl = dut.uut.mprj.debug - self.force_reset = 0 - cocotb.scheduler.add(self.force_reset_fun()) - - - """ """ - async def drive_data_with_address(self,address,data,SEL=0xF): - self.cpu_hdl.dBusWishbone_CYC.value = 1 - self.cpu_hdl.iBusWishbone_CYC.value = 0 - self.cpu_hdl.dBusWishbone_STB.value = 1 - self.cpu_hdl.dBusWishbone_WE.value = 1 - self.cpu_hdl.dBusWishbone_SEL.value = SEL - self.cpu_hdl.dBusWishbone_ADR.value = address >> 2 - self.cpu_hdl.dBusWishbone_DAT_MOSI.value = data - await RisingEdge(self.cpu_hdl.dBusWishbone_ACK) - await ClockCycles(self.clk, 1) - self.cpu_hdl.dBusWishbone_CYC.value = BinaryValue(value = 'z') - self.cpu_hdl.iBusWishbone_CYC.value = BinaryValue(value = 'z') - self.cpu_hdl.dBusWishbone_STB.value = BinaryValue(value = 'z') - self.cpu_hdl.dBusWishbone_WE.value = BinaryValue(value = 'z') - self.cpu_hdl.dBusWishbone_SEL.value = BinaryValue(value = 'zzzz') - self.cpu_hdl.dBusWishbone_ADR.value = common.signal_valueZ_size(self.cpu_hdl.dBusWishbone_ADR)[0] - self.cpu_hdl.dBusWishbone_DAT_MOSI.value = common.signal_valueZ_size(self.cpu_hdl.dBusWishbone_DAT_MOSI)[0] - - """ """ - async def drive_data2address(self,address,data,SEL=0xF): - cocotb.log.info(f"[RiskV][drive_data2address] start driving address {hex(address)} with {hex(data)}") - # print(dir(self.cpu_hdl)) - dBusWishbone_CYC = self.cpu_hdl.dBusWishbone_CYC.value - if not Macros['GL']: - iBusWishbone_CYC = self.cpu_hdl.iBusWishbone_CYC.value - dBusWishbone_STB = self.cpu_hdl.dBusWishbone_STB.value - dBusWishbone_WE = self.cpu_hdl.dBusWishbone_WE.value - if not Macros['GL']: - dBusWishbone_SEL = self.cpu_hdl.dBusWishbone_SEL.value - else: - dBusWishbone_SEL0 = self.cpu_hdl.net2121.value - dBusWishbone_SEL1 = self.cpu_hdl.net1979.value - dBusWishbone_SEL2 = self.cpu_hdl.net848.value - dBusWishbone_SEL3 = self.cpu_hdl.net1956.value - if not Macros['GL']: - dBusWishbone_ADR = self.cpu_hdl.dBusWishbone_ADR.value - dBusWishbone_DAT_MOSI = self.cpu_hdl.dBusWishbone_DAT_MOSI.value - self.cpu_hdl.dBusWishbone_CYC.value = 1 - - if not Macros['GL']: - self.cpu_hdl.iBusWishbone_CYC.value = 0 - self.cpu_hdl.dBusWishbone_STB.value = 1 - self.cpu_hdl.dBusWishbone_WE.value = 1 - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_SEL.value = SEL - else: - self.cpu_hdl.net2121.value = (SEL >>0 ) &1 - self.cpu_hdl.net1979.value = (SEL >>1 ) &1 - self.cpu_hdl.net848.value = (SEL >>2 ) &1 - self.cpu_hdl.net1956.value = (SEL >>3 ) &1 - - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_ADR.value = address >> 2 - else: - address_temp = address >> 2 - for i in range(30): - self.cpu_hdl._id(f'dBusWishbone_ADR[{i}]',False).value = (address_temp >> i) & 1 - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_DAT_MOSI.value = data - else: - for i in range(32): - self.cpu_hdl._id(f'dBusWishbone_DAT_MOSI[{i}]',False).value = (data >> i) & 1 - - if not Macros['GL']: - await RisingEdge(self.cpu_hdl.dBusWishbone_ACK) - else: - # await RisingEdge(self.cpu_hdl._id("_07019_",False) & (self.cpu_hdl._id("grant[0]",False))) - await RisingEdge(self.cpu_hdl._id("_07019_",False) ) - - await ClockCycles(self.clk, 1) - self.cpu_hdl.dBusWishbone_CYC.value = dBusWishbone_CYC - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_ADR.value = dBusWishbone_ADR - self.cpu_hdl.dBusWishbone_DAT_MOSI.value = dBusWishbone_DAT_MOSI - self.cpu_hdl.iBusWishbone_CYC.value = iBusWishbone_CYC - self.cpu_hdl.dBusWishbone_STB.value = dBusWishbone_STB - self.cpu_hdl.dBusWishbone_WE.value = dBusWishbone_WE - self.cpu_hdl.dBusWishbone_SEL.value = dBusWishbone_SEL - - await ClockCycles(self.clk, 1) - cocotb.log.info(f"[RiskV][drive_data2address] finish driving address {hex(address)} with {hex(data)}") - - """ """ - async def read_address(self,address,SEL=0xF): - cocotb.log.info(f"[RiskV][read_address] start reading address {hex(address)}") - # print(dir(self.cpu_hdl)) - dBusWishbone_CYC = self.cpu_hdl.dBusWishbone_CYC.value - if not Macros['GL']: - iBusWishbone_CYC = self.cpu_hdl.iBusWishbone_CYC.value - dBusWishbone_STB = self.cpu_hdl.dBusWishbone_STB.value - dBusWishbone_WE = self.cpu_hdl.dBusWishbone_WE.value - if not Macros['GL']: - dBusWishbone_SEL = self.cpu_hdl.dBusWishbone_SEL.value - else: - dBusWishbone_SEL0 = self.cpu_hdl.net2121.value - dBusWishbone_SEL1 = self.cpu_hdl.net1979.value - dBusWishbone_SEL2 = self.cpu_hdl.net848.value - dBusWishbone_SEL3 = self.cpu_hdl.net1956.value - if not Macros['GL']: - dBusWishbone_ADR = self.cpu_hdl.dBusWishbone_ADR.value - dBusWishbone_DAT_MOSI = self.cpu_hdl.dBusWishbone_DAT_MOSI.value - self.cpu_hdl.dBusWishbone_CYC.value = 1 - - if not Macros['GL']: - self.cpu_hdl.iBusWishbone_CYC.value = 0 - self.cpu_hdl.dBusWishbone_STB.value = 1 - self.cpu_hdl.dBusWishbone_WE.value = 0 - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_SEL.value = SEL - else: - self.cpu_hdl.net2121.value = (SEL >>0 ) &1 - self.cpu_hdl.net1979.value = (SEL >>1 ) &1 - self.cpu_hdl.net848.value = (SEL >>2 ) &1 - self.cpu_hdl.net1956.value = (SEL >>3 ) &1 - - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_ADR.value = address >> 2 - else: - address_temp = address >> 2 - for i in range(30): - self.cpu_hdl._id(f'dBusWishbone_ADR[{i}]',False).value = (address_temp >> i) & 1 - - - if not Macros['GL']: - await RisingEdge(self.cpu_hdl.dBusWishbone_ACK) - else: - # await RisingEdge(self.cpu_hdl._id("_07019_",False) & (self.cpu_hdl._id("grant[0]",False))) - await RisingEdge(self.cpu_hdl._id("_07019_",False) ) - - await ClockCycles(self.clk, 1) - self.cpu_hdl.dBusWishbone_CYC.value = dBusWishbone_CYC - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_ADR.value = dBusWishbone_ADR - self.cpu_hdl.dBusWishbone_DAT_MOSI.value = dBusWishbone_DAT_MOSI - self.cpu_hdl.iBusWishbone_CYC.value = iBusWishbone_CYC - self.cpu_hdl.dBusWishbone_STB.value = dBusWishbone_STB - self.cpu_hdl.dBusWishbone_WE.value = dBusWishbone_WE - self.cpu_hdl.dBusWishbone_SEL.value = dBusWishbone_SEL - data = self.cpu_hdl.dBusWishbone_DAT_MISO.value - await ClockCycles(self.clk, 1) - cocotb.log.info(f"[RiskV][read_address] finish reading address {hex(address)} data = {data}") - - # return data - return int(str(bin(data.integer)[2:]).zfill(32),2) - # return int(str(bin(data.integer)[2:]).zfill(32)[::-1],2) - - - def read_debug_reg1(self): - return self.debug_hdl.debug_reg_1.value.integer - def read_debug_reg2(self): - return self.debug_hdl.debug_reg_2.value.integer - - # writing debug registers using backdoor because in GL cpu can't be disabled for now because of different netlist names - def write_debug_reg1_backdoor(self,data): - self.debug_hdl.debug_reg_1.value = data - def write_debug_reg2_backdoor(self,data): - self.debug_hdl.debug_reg_2.value = data - - async def force_reset_fun(self): - first_time_force = True - first_time_release = True - while True: - if self.force_reset: - if first_time_force: - cocotb.log.info(f"[RiskV][force_reset_fun] Force CPU reset") - first_time_force = False - first_time_release = True - self.cpu_hdl.reset.value =1 - if not Macros['GL']: - common.drive_hdl(self.cpu_hdl.reset,(0,0),1) - else: - common.drive_hdl(self.cpu_hdl.mgmtsoc_vexriscv_debug_reset,(0,0),1) - else: - if first_time_release: - first_time_force = True - first_time_release = False - - if not Macros['GL']: - common.drive_hdl(self.cpu_hdl.reset,(0,0),0) - else: - common.drive_hdl(self.cpu_hdl.mgmtsoc_vexriscv_debug_reset,(0,0),0) - cocotb.log.info(f"[RiskV][force_reset_fun] release CPU reset") - - await ClockCycles(self.clk, 1) - def cpu_force_reset(self): - self.force_reset = True - - def cpu_release_reset(self): - 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z3E&lNy$1TsNSk?1pMZCecfbr85V&0uX+$xoi;HQ=Iemifs%tA$S41ESl@m=w`2Rza z{8IeQ8+RTWJM%O&tB6dYl-K9xHu!^fHUTqnBw^j1W5*Hdb0kN2R{rib1OdM3wd;O)iD=6@76tJcJd(+ZqDOHc!aZWF}{`~KX z)_yyz4*!1Knq%rAYtA(kU@e8kz7@ze2W&imZI^X)w?Yv&GJP>=R$gWvQ0)GDjplwc zV}#Nm+3jNAQ_2=FQ`8R$P4`)0m&fnT9)Hqk_g_z#mNJyo`+0c||GN^ClPMRAl5- connect vdd' ) - self.set_vdd(1) - # await ClockCycles(self.clk, 10) - cocotb.log.info(f' [caravel] power up -> connect vcc' ) - self.set_vcc(1) - await ClockCycles(self.clk, 10) - - """"reset caravel""" - async def reset(self): - cocotb.log.info(f' [caravel] start resetting') - self.dut.resetb_tb.value = 0 - await ClockCycles(self.clk, 20) - self.dut.resetb_tb.value = 1 - await ClockCycles(self.clk, 1) - cocotb.log.info(f' [caravel] finish resetting') - - - def set_vdd(self,value:bool): - self.dut.vddio_tb.value = value - self.dut.vssio_tb.value = 0 - self.dut.vddio_2_tb.value = value - self.dut.vssio_2_tb.value = 0 - self.dut.vdda_tb.value = value - self.dut.vssa_tb.value = 0 - self.dut.vdda1_tb.value = value - self.dut.vssa1_tb.value = 0 - self.dut.vdda1_2_tb.value = value - self.dut.vssa1_2_tb.value = 0 - self.dut.vdda2_tb.value = value - self.dut.vssa2_tb.value = 0 - - def set_vcc(self , value:bool): - self.dut.vccd_tb.value = value - self.dut.vssd_tb.value = 0 - self.dut.vccd1_tb.value = value - self.dut.vssd1_tb.value = 0 - self.dut.vccd2_tb.value = value - self.dut.vssd2_tb.value = 0 - - """drive csb signal bin E8 mprj[3]""" - async def drive_csb(self,bit): - self.drive_gpio_in((3,3),bit) - self.drive_gpio_in((4,4),0) - await ClockCycles(self.clk, 1) - - - """set the spi vsb signal high to disable housekeeping spi transmission bin E8 mprj[3]""" - async def disable_csb(self ): - cocotb.log.info(f' [caravel] disable housekeeping spi transmission') - await self.drive_csb(1) - - """set the spi vsb signal high impedance """ - async def release_csb(self ): - cocotb.log.info(f' [caravel] release housekeeping spi transmission') - self.release_gpio(3) - self.release_gpio(4) - await ClockCycles(self.clk, 1) - - """set the spi vsb signal low to enable housekeeping spi transmission bin E8 mprj[3]""" - async def enable_csb(self ): - cocotb.log.info(f' [caravel] enable housekeeping spi transmission') - await self.drive_csb(0) - - - """return the value of mprj in bits used tp monitor the output gpios value""" - def monitor_gpio(self,bits:tuple): - mprj = self.dut.mprj_io_tb.value - size =mprj.n_bits -1 #size of bins array - mprj_out= self.dut.mprj_io_tb.value[size - bits[0]:size - bits[1]] - if(mprj_out.is_resolvable): - cocotb.log.debug(f' [caravel] Monitor : mprj[{bits[0]}:{bits[1]}] = {hex(mprj_out)}') - else: - cocotb.log.debug(f' [caravel] Monitor : mprj[{bits[0]}:{bits[1]}] = {mprj_out}') - return mprj_out - - """return the value of management gpio""" - def monitor_mgmt_gpio(self): - data = self.dut.gpio_tb.value - cocotb.log.debug(f' [caravel] Monitor mgmt gpio = {data}') - return data - - """change the configration of the gpios by overwrite their defaults value then reset - need to take at least 1 cycle for reset """ - ### dont use back door accessing - async def configure_gpio_defaults(self,gpios_values: list): - gpio_defaults = self.caravel_hdl.gpio_defaults.value - cocotb.log.info(f' [caravel] start cofigure gpio gpios ') - size = gpio_defaults.n_bits -1 #number of bins in gpio_defaults - # list example [[(gpios),value],[(gpios),value],[(gpios),value]] - for array in gpios_values: - gpio_value = array[1] - for gpio in array[0]: - self.cov_configure_gpios(gpio,gpio_value.name) - gpio_defaults[size - (gpio*13 + 12): size -gpio*13] = gpio_value.value - #cocotb.log.info(f' [caravel] gpio_defaults[{size - (gpio*13 + 12)}:{size -gpio*13}] = {gpio_value.value} ') - self.caravel_hdl.gpio_defaults.value = gpio_defaults - #reset - self.caravel_hdl.gpio_resetn_1_shifted.value = 0 - self.caravel_hdl.gpio_resetn_2_shifted.value = 0 - await ClockCycles(self.clk, 1) - self.caravel_hdl.gpio_resetn_1_shifted.value = 1 - self.caravel_hdl.gpio_resetn_2_shifted.value = 1 - cocotb.log.info(f' [caravel] finish configuring gpios, the curret gpios value: ') - self.print_gpios_ctrl_val() - - """change the configration of the gpios by overwrite the register value - in control registers and housekeeping regs, don't consume simulation cycles""" - ### dont use back door accessing - def configure_gpios_regs(self,gpios_values: list): - cocotb.log.info(f' [caravel] start cofigure gpio gpios ') - control_modules = self.control_blocks_paths() - # list example [[(gpios),value],[(gpios),value],[(gpios),value]] - for array in gpios_values: - gpio_value = array[1] - for gpio in array[0]: - self.cov_configure_gpios(gpio,gpio_value.name) - self.gpio_control_reg_write(control_modules[gpio],gpio_value.value) # for control blocks regs - self.caravel_hdl.housekeeping.gpio_configure[gpio].value = gpio_value.value # for house keeping regs - cocotb.log.info(f' [caravel] finish configuring gpios, the curret gpios value: ') - self.print_gpios_ctrl_val() - self.print_gpios_HW_val() - - """dummy function for coverage sampling""" - @Carvel_Coverage - def cov_configure_gpios(self,gpio,gpio_mode): - cocotb.log.debug(f' [caravel] gpio [{gpio}] = {gpio_mode} ') - pass - - def print_gpios_default_val(self,print=1): - gpio_defaults = self.caravel_hdl.gpio_defaults.value - size = gpio_defaults.n_bits -1 #number of bins in gpio_defaults - gpios = [] - for gpio in range(Macros['MPRJ_IO_PADS']): - gpio_value = gpio_defaults[size - (gpio*13 + 12): size -gpio*13] - gpio_enum = GPIO_MODE(gpio_value.integer) - gpios.append((gpio,gpio_enum)) - group_bins = groupby(gpios,key=lambda x: x[1]) - for key,value in group_bins: - gpios=[] - for gpio in list(value): - gpios.append(gpio[0]) - if (print): - cocotb.log.info(f' [caravel] gpios[{gpios}] are {key} ') - return gpios - - """print the values return in the gpio of control block mode in GPIO Mode format""" - def print_gpios_ctrl_val(self, print=1): - control_modules = self.control_blocks_paths() - gpios = [] - for i , gpio in enumerate(control_modules): - gpios.append((i,self.gpio_control_reg_read(gpio))) - group_bins = groupby(gpios,key=lambda x: x[1]) - for key,value in group_bins: - gpios=[] - for gpio in list(value): - gpios.append(gpio[0]) - if (print): - cocotb.log.info(f' [caravel] gpios[{gpios}] are {key} ') - return gpios - - def _check_gpio_ctrl_eq_HW(self): - assert self.print_gpios_ctrl_val(1) == self.print_gpios_HW_val(1), f'there is an issue while configuration the control block register value isn\'t the same as the house keeping gpio register' - - """print the values return in the gpio of housekeeping block mode in GPIO Mode format""" - def print_gpios_HW_val(self,print=1): - gpios = [] - for pin in range(Macros['MPRJ_IO_PADS']): - gpios.append((pin,GPIO_MODE(self.caravel_hdl.housekeeping.gpio_configure[pin].value))) - group_bins = groupby(gpios,key=lambda x: x[1]) - for key,value in group_bins: - gpios=[] - for gpio in list(value): - gpios.append(gpio[0]) - if (print): - cocotb.log.info(f' [caravel] gpios[{gpios}] are {key} ') - return gpios - - - """return the paths of the control blocks""" - def control_blocks_paths(self)-> list: - car = self.caravel_hdl - control_modules =[car._id("gpio_control_bidir_1[0]",False),car._id("gpio_control_bidir_1[1]",False)] - #add gpio_control_in_1a (GPIO 2 to 7) - for i in range(6): - control_modules.append(car._id(f'gpio_control_in_1a[{i}]',False)) - #add gpio_control_in_1 (GPIO 8 to 18) - for i in range(Macros['MPRJ_IO_PADS_1']-9+1): - control_modules.append(car._id(f'gpio_control_in_1[{i}]',False)) - #add gpio_control_in_2 (GPIO 19 to 34) - for i in range(Macros['MPRJ_IO_PADS_2']-4+1): - control_modules.append(car._id(f'gpio_control_in_2[{i}]',False)) - # Last three GPIOs (spi_sdo, flash_io2, and flash_io3) gpio_control_bidir_2 - for i in range(3): - control_modules.append(car._id(f'gpio_control_bidir_2[{i}]',False)) - return control_modules - - """read the control register and return a GPIO Mode it takes the path to the control reg""" - def gpio_control_reg_read(self,path:SimHandleBase) -> GPIO_MODE: - gpio_mgmt_en = path.mgmt_ena.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_MGMT_EN.value - gpio_out_dis = path.gpio_outenb.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_OUT_DIS.value - gpio_holdover = path.gpio_holdover.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_OVERRIDE.value - gpio_in_dis = path.gpio_inenb.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_INP_DIS.value - gpio_mode_sel = path.gpio_ib_mode_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_MOD_SEL.value - gpio_anlg_en = path.gpio_ana_en.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_EN.value - gpio_anlg_sel = path.gpio_ana_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_SEL.value - gpio_anlg_pol = path.gpio_ana_pol.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_POL.value - gpio_slow_sel = path.gpio_slow_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_SLOW.value - gpio_vtrip_sel = path.gpio_vtrip_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_TRIP.value - gpio_dgtl_mode = path.gpio_dm.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_DGTL_MODE.value - control_reg = (gpio_mgmt_en | gpio_out_dis | gpio_holdover| gpio_in_dis | gpio_mode_sel | gpio_anlg_en - |gpio_anlg_sel|gpio_anlg_pol|gpio_slow_sel|gpio_vtrip_sel|gpio_dgtl_mode) - return(GPIO_MODE(control_reg)) - - """read the control register and return a GPIO Mode it takes the path to the control reg""" - def gpio_control_reg_write(self,path:SimHandleBase,data) : - bits =common.int_to_bin_list(data,14) - path.mgmt_ena.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_MGMT_EN.value] - path.gpio_outenb.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_OUT_DIS.value] - path.gpio_holdover.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_OVERRIDE.value] - path.gpio_inenb.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_INP_DIS.value] - path.gpio_ib_mode_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_MOD_SEL.value] - path.gpio_ana_en.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_EN.value] - path.gpio_ana_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_SEL.value] - path.gpio_ana_pol.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_POL.value] - path.gpio_slow_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_SLOW.value] - path.gpio_vtrip_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_TRIP.value] - gpio_dm =bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_DGTL_MODE.value:MASK_GPIO_CTRL.MASK_GPIO_CTRL_DGTL_MODE.value+3] - gpio_dm =sum(d * 2**i for i, d in enumerate(gpio_dm)) # convert list to binary int - path.gpio_dm.value = gpio_dm - - # """drive the value of mprj bits with spicific data from input pad at the top""" - # def release_gpio(self): - # io = self.caravel_hdl.padframe.mprj_pads.io - # mprj , n_bits = common.signal_valueZ_size(io) - # io.value = mprj - # cocotb.log.info(f' [caravel] drive_gpio_in pad mprj with {mprj}') - - """drive the value of mprj bits with spicific data from input pad at the top""" - def drive_gpio_in(self,bits,data): - # io = self.caravel_hdl.padframe.mprj_pads.io - # mprj , n_bits = common.signal_value_size(io) - # cocotb.log.debug(f' [caravel] before mprj with {mprj} and data = {data} bit [{n_bits-1-bits[0]}]:[{n_bits-1-bits[1]}]') - # mprj[n_bits-1-bits[0]:n_bits-1-bits[1]] = data - # io.value = mprj - # cocotb.log.info(f' [caravel] drive_gpio_in pad mprj with {mprj}') - data_bits = [] - is_list = isinstance(bits, (list,tuple)) - if is_list : - cocotb.log.debug(f'[caravel] [drive_gpio_in] start bits[1] = {bits[1]} bits[0]= {bits[0]}') - data_bits = BinaryValue(value = data, n_bits =bits[0]-bits[1]+1 ,bigEndian=(bits[0] {data}') - await FallingEdge(self.dut.wb_ack_o) # wait for acknowledge - self.hk_hdl.wb_stb_i.value = 0 - self.hk_hdl.wb_cyc_i.value = 0 - cocotb.log.info(f'Monitor: End writing {hex(addr)} -> {data}') - - - """read from the house keeping registers by back door no need for commands and waiting for the data to show on mprj""" - async def hk_read_backdoor(self,addr): - await RisingEdge(self.clk) - self.hk_hdl.wb_stb_i.value = 1 - self.hk_hdl.wb_cyc_i.value = 1 - self.hk_hdl.wb_sel_i.value = 0 - self.hk_hdl.wb_we_i.value = 0 - self.hk_hdl.wb_adr_i.value = addr - cocotb.log.info(f' [housekeeping] Monitor: Start reading from {hex(addr)}') - await FallingEdge(self.hk_hdl.wb_ack_o) - self.hk_hdl.wb_stb_i.value = 0 - self.hk_hdl.wb_cyc_i.value = 0 - cocotb.log.info(f' [housekeeping] Monitor: read from {hex(addr)} value {(self.hk_hdl.wb_dat_o.value)}') - return self.hk_hdl.wb_dat_o.value - - - diff --git a/verilog/dv/cocotb/interfaces/common.py b/verilog/dv/cocotb/interfaces/common.py deleted file mode 100644 index b5d98414..00000000 --- a/verilog/dv/cocotb/interfaces/common.py +++ /dev/null @@ -1,80 +0,0 @@ -from cocotb.handle import SimHandleBase -from cocotb.binary import BinaryValue -from enum import Enum -import cocotb -"""return the value and the size of the signal""" -def signal_value_size(path:SimHandleBase): - value = path.value - size = value.n_bits - return value, size - - -""" -Create a binaryValue object with all Z that helps when drive to drive only the bits needed -return value with all z and the size -""" -def signal_valueZ_size(path:SimHandleBase): - value = path.value - size = value.n_bits - value = BinaryValue(value = int(size) * 'z',n_bits=size) - return value, size - -def int_to_bin_list(number:bin,number_of_bits)-> list: - data = bin(number) - data = data[2:].zfill(number_of_bits)[::-1] - bits = [int(bit) for bit in data] - return bits - -def drive_hdl(path,bits,data): - hdl , n_bits = signal_value_size(path) - is_list_of_lists = all(isinstance(x, list) for x in bits) - is_list_of_tuples = all(isinstance(x, tuple) for x in bits) - if is_list_of_lists | is_list_of_tuples: - for i,bits2 in enumerate(bits): - hdl[n_bits-1-bits2[0]:n_bits-1-bits2[1]] = data[i] - else: - hdl[n_bits-1-bits[0]:n_bits-1-bits[1]] = data - path.value = hdl - cocotb.log.debug(f' [common] drive { path._path } with {hdl}') - -"""Enum for GPIO modes valus used to configured the pins""" -class GPIO_MODE(Enum): - GPIO_MODE_MGMT_STD_INPUT_NOPULL = 0x0403 - GPIO_MODE_MGMT_STD_INPUT_PULLDOWN = 0x0803 - GPIO_MODE_MGMT_STD_INPUT_PULLUP = 0x0c03 - GPIO_MODE_MGMT_STD_OUTPUT = 0x1809 - GPIO_MODE_MGMT_STD_INPUT = 0x1803 # TODO: ask if this legal the default value for first 2 bin is like that - GPIO_MODE_MGMT_STD_BIDIRECTIONAL = 0x1801 - GPIO_MODE_MGMT_STD_ANALOG = 0x000b - GPIO_MODE_USER_STD_INPUT_NOPULL = 0x0402 - GPIO_MODE_USER_STD_INPUT_PULLDOWN = 0x0802 - GPIO_MODE_USER_STD_INPUT_PULLUP = 0x0c02 - GPIO_MODE_USER_STD_OUTPUT = 0x1808 - GPIO_MODE_USER_STD_BIDIRECTIONAL = 0x1800 - GPIO_MODE_USER_STD_OUT_MONITORED = 0x1802 - GPIO_MODE_USER_STD_ANALOG = 0x000a - -class MASK_GPIO_CTRL(Enum): - MASK_GPIO_CTRL_MGMT_EN = 0 - MASK_GPIO_CTRL_OUT_DIS = 1 - MASK_GPIO_CTRL_OVERRIDE = 2 - MASK_GPIO_CTRL_INP_DIS = 3 - MASK_GPIO_CTRL_MOD_SEL = 4 - MASK_GPIO_CTRL_ANLG_EN = 5 - MASK_GPIO_CTRL_ANLG_SEL = 6 - MASK_GPIO_CTRL_ANLG_POL = 7 - MASK_GPIO_CTRL_SLOW = 8 - MASK_GPIO_CTRL_TRIP = 9 - MASK_GPIO_CTRL_DGTL_MODE = 10 - -Macros= {} - -def fill_macros(macros_hdl): - Macros['MPRJ_IO_PADS_1'] = macros_hdl.MPRJ_IO_PADS_1.value.integer - Macros['MPRJ_IO_PADS_2'] = macros_hdl.MPRJ_IO_PADS_2.value.integer - Macros['MPRJ_IO_PADS'] = macros_hdl.MPRJ_IO_PADS.value.integer - Macros['GL'] = macros_hdl.GL.value.integer - Macros['CARAVAN'] = macros_hdl.CARAVAN.value.integer - - - diff --git a/verilog/dv/cocotb/interfaces/cpu.py b/verilog/dv/cocotb/interfaces/cpu.py deleted file mode 100644 index 1f925370..00000000 --- a/verilog/dv/cocotb/interfaces/cpu.py +++ /dev/null @@ -1,238 +0,0 @@ -from operator import add -import random -import cocotb -from cocotb.clock import Clock -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -import cocotb.simulator -from cocotb.handle import SimHandleBase -from cocotb.handle import Force -from cocotb_coverage.coverage import * -from cocotb.binary import BinaryValue -import enum -from cocotb.handle import ( - ConstantObject, - HierarchyArrayObject, - HierarchyObject, - ModifiableObject, - NonHierarchyIndexableObject, - SimHandle, -) - -from itertools import groupby, product - -import interfaces.common as common -from interfaces.common import GPIO_MODE -from interfaces.common import MASK_GPIO_CTRL -from interfaces.common import Macros - -class RiskV: - def __init__(self,dut:SimHandleBase): - self.dut = dut - self.clk = dut.clock_tb - if not Macros['GL']: - self.cpu_hdl = dut.uut.soc.core.VexRiscv - else: - self.cpu_hdl = dut.uut.soc - self.debug_hdl = dut.uut.mprj.debug - self.force_reset = 0 - if not Macros['GL']: - cocotb.scheduler.add(self.force_reset_fun()) - - - """ """ - async def drive_data_with_address(self,address,data,SEL=0xF): - self.cpu_hdl.dBusWishbone_CYC.value = 1 - self.cpu_hdl.iBusWishbone_CYC.value = 0 - self.cpu_hdl.dBusWishbone_STB.value = 1 - self.cpu_hdl.dBusWishbone_WE.value = 1 - self.cpu_hdl.dBusWishbone_SEL.value = SEL - self.cpu_hdl.dBusWishbone_ADR.value = address >> 2 - self.cpu_hdl.dBusWishbone_DAT_MOSI.value = data - await RisingEdge(self.cpu_hdl.dBusWishbone_ACK) - await ClockCycles(self.clk, 1) - self.cpu_hdl.dBusWishbone_CYC.value = BinaryValue(value = 'z') - self.cpu_hdl.iBusWishbone_CYC.value = BinaryValue(value = 'z') - self.cpu_hdl.dBusWishbone_STB.value = BinaryValue(value = 'z') - self.cpu_hdl.dBusWishbone_WE.value = BinaryValue(value = 'z') - self.cpu_hdl.dBusWishbone_SEL.value = BinaryValue(value = 'zzzz') - self.cpu_hdl.dBusWishbone_ADR.value = common.signal_valueZ_size(self.cpu_hdl.dBusWishbone_ADR)[0] - self.cpu_hdl.dBusWishbone_DAT_MOSI.value = common.signal_valueZ_size(self.cpu_hdl.dBusWishbone_DAT_MOSI)[0] - - """ """ - async def drive_data2address(self,address,data,SEL=0xF): - cocotb.log.info(f"[RiskV][drive_data2address] start driving address {hex(address)} with {hex(data)}") - # print(dir(self.cpu_hdl)) - dBusWishbone_CYC = self.cpu_hdl.dBusWishbone_CYC.value - if not Macros['GL']: - iBusWishbone_CYC = self.cpu_hdl.iBusWishbone_CYC.value - dBusWishbone_STB = self.cpu_hdl.dBusWishbone_STB.value - dBusWishbone_WE = self.cpu_hdl.dBusWishbone_WE.value - if not Macros['GL']: - dBusWishbone_SEL = self.cpu_hdl.dBusWishbone_SEL.value - else: - dBusWishbone_SEL0 = self.cpu_hdl.net2121.value - dBusWishbone_SEL1 = self.cpu_hdl.net1979.value - dBusWishbone_SEL2 = self.cpu_hdl.net848.value - dBusWishbone_SEL3 = self.cpu_hdl.net1956.value - if not Macros['GL']: - dBusWishbone_ADR = self.cpu_hdl.dBusWishbone_ADR.value - dBusWishbone_DAT_MOSI = self.cpu_hdl.dBusWishbone_DAT_MOSI.value - self.cpu_hdl.dBusWishbone_CYC.value = 1 - - if not Macros['GL']: - self.cpu_hdl.iBusWishbone_CYC.value = 0 - self.cpu_hdl.dBusWishbone_STB.value = 1 - self.cpu_hdl.dBusWishbone_WE.value = 1 - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_SEL.value = SEL - else: - self.cpu_hdl.net2121.value = (SEL >>0 ) &1 - self.cpu_hdl.net1979.value = (SEL >>1 ) &1 - self.cpu_hdl.net848.value = (SEL >>2 ) &1 - self.cpu_hdl.net1956.value = (SEL >>3 ) &1 - - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_ADR.value = address >> 2 - else: - address_temp = address >> 2 - for i in range(30): - self.cpu_hdl._id(f'dBusWishbone_ADR[{i}]',False).value = (address_temp >> i) & 1 - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_DAT_MOSI.value = data - else: - for i in range(32): - self.cpu_hdl._id(f'dBusWishbone_DAT_MOSI[{i}]',False).value = (data >> i) & 1 - - if not Macros['GL']: - await RisingEdge(self.cpu_hdl.dBusWishbone_ACK) - else: - # await RisingEdge(self.cpu_hdl._id("_07019_",False) & (self.cpu_hdl._id("grant[0]",False))) - await RisingEdge(self.cpu_hdl._id("_07019_",False) ) - - await ClockCycles(self.clk, 1) - self.cpu_hdl.dBusWishbone_CYC.value = dBusWishbone_CYC - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_ADR.value = dBusWishbone_ADR - self.cpu_hdl.dBusWishbone_DAT_MOSI.value = dBusWishbone_DAT_MOSI - self.cpu_hdl.iBusWishbone_CYC.value = iBusWishbone_CYC - self.cpu_hdl.dBusWishbone_STB.value = dBusWishbone_STB - self.cpu_hdl.dBusWishbone_WE.value = dBusWishbone_WE - self.cpu_hdl.dBusWishbone_SEL.value = dBusWishbone_SEL - - await ClockCycles(self.clk, 1) - cocotb.log.info(f"[RiskV][drive_data2address] finish driving address {hex(address)} with {hex(data)}") - - """ """ - async def read_address(self,address,SEL=0xF): - cocotb.log.info(f"[RiskV][read_address] start reading address {hex(address)}") - # print(dir(self.cpu_hdl)) - dBusWishbone_CYC = self.cpu_hdl.dBusWishbone_CYC.value - if not Macros['GL']: - iBusWishbone_CYC = self.cpu_hdl.iBusWishbone_CYC.value - dBusWishbone_STB = self.cpu_hdl.dBusWishbone_STB.value - dBusWishbone_WE = self.cpu_hdl.dBusWishbone_WE.value - if not Macros['GL']: - dBusWishbone_SEL = self.cpu_hdl.dBusWishbone_SEL.value - else: - dBusWishbone_SEL0 = self.cpu_hdl.net2121.value - dBusWishbone_SEL1 = self.cpu_hdl.net1979.value - dBusWishbone_SEL2 = self.cpu_hdl.net848.value - dBusWishbone_SEL3 = self.cpu_hdl.net1956.value - if not Macros['GL']: - dBusWishbone_ADR = self.cpu_hdl.dBusWishbone_ADR.value - dBusWishbone_DAT_MOSI = self.cpu_hdl.dBusWishbone_DAT_MOSI.value - self.cpu_hdl.dBusWishbone_CYC.value = 1 - - if not Macros['GL']: - self.cpu_hdl.iBusWishbone_CYC.value = 0 - self.cpu_hdl.dBusWishbone_STB.value = 1 - self.cpu_hdl.dBusWishbone_WE.value = 0 - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_SEL.value = SEL - else: - self.cpu_hdl.net2121.value = (SEL >>0 ) &1 - self.cpu_hdl.net1979.value = (SEL >>1 ) &1 - self.cpu_hdl.net848.value = (SEL >>2 ) &1 - self.cpu_hdl.net1956.value = (SEL >>3 ) &1 - - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_ADR.value = address >> 2 - else: - address_temp = address >> 2 - for i in range(30): - self.cpu_hdl._id(f'dBusWishbone_ADR[{i}]',False).value = (address_temp >> i) & 1 - - - if not Macros['GL']: - await RisingEdge(self.cpu_hdl.dBusWishbone_ACK) - else: - # await RisingEdge(self.cpu_hdl._id("_07019_",False) & (self.cpu_hdl._id("grant[0]",False))) - await RisingEdge(self.cpu_hdl._id("_07019_",False) ) - - await ClockCycles(self.clk, 1) - self.cpu_hdl.dBusWishbone_CYC.value = dBusWishbone_CYC - if not Macros['GL']: - self.cpu_hdl.dBusWishbone_ADR.value = dBusWishbone_ADR - self.cpu_hdl.dBusWishbone_DAT_MOSI.value = dBusWishbone_DAT_MOSI - self.cpu_hdl.iBusWishbone_CYC.value = iBusWishbone_CYC - self.cpu_hdl.dBusWishbone_STB.value = dBusWishbone_STB - self.cpu_hdl.dBusWishbone_WE.value = dBusWishbone_WE - self.cpu_hdl.dBusWishbone_SEL.value = dBusWishbone_SEL - data = self.cpu_hdl.dBusWishbone_DAT_MISO.value - await ClockCycles(self.clk, 1) - cocotb.log.info(f"[RiskV][read_address] finish reading address {hex(address)} data = {data}") - - # return data - return int(str(bin(data.integer)[2:]).zfill(32),2) - # return int(str(bin(data.integer)[2:]).zfill(32)[::-1],2) - - - def read_debug_reg1(self): - return self.debug_hdl.debug_reg_1.value.integer - def read_debug_reg2(self): - return self.debug_hdl.debug_reg_2.value.integer - - def read_debug_reg1_str(self): - return self.debug_hdl.debug_reg_1.value.binstr - def read_debug_reg2_str(self): - return self.debug_hdl.debug_reg_2.value.binstr - - # writing debug registers using backdoor because in GL cpu can't be disabled for now because of different netlist names - def write_debug_reg1_backdoor(self,data): - self.debug_hdl.debug_reg_1.value = data - def write_debug_reg2_backdoor(self,data): - self.debug_hdl.debug_reg_2.value = data - - async def force_reset_fun(self): - first_time_force = True - first_time_release = True - while True: - if self.force_reset: - if first_time_force: - cocotb.log.info(f"[RiskV][force_reset_fun] Force CPU reset") - first_time_force = False - first_time_release = True - self.cpu_hdl.reset.value =1 - if not Macros['GL']: - common.drive_hdl(self.cpu_hdl.reset,(0,0),1) - else: - common.drive_hdl(self.cpu_hdl.mgmtsoc_vexriscv_debug_reset,(0,0),1) - else: - if first_time_release: - first_time_force = True - first_time_release = False - - if not Macros['GL']: - common.drive_hdl(self.cpu_hdl.reset,(0,0),0) - else: - common.drive_hdl(self.cpu_hdl.mgmtsoc_vexriscv_debug_reset,(0,0),0) - cocotb.log.info(f"[RiskV][force_reset_fun] release CPU reset") - - await ClockCycles(self.clk, 1) - def cpu_force_reset(self): - self.force_reset = True - - def cpu_release_reset(self): - self.force_reset = False - \ No newline at end of file diff --git a/verilog/dv/cocotb/interfaces/defsParser.py b/verilog/dv/cocotb/interfaces/defsParser.py deleted file mode 100644 index 6a0f9f4b..00000000 --- a/verilog/dv/cocotb/interfaces/defsParser.py +++ /dev/null @@ -1,87 +0,0 @@ -import re -import sys -from tokenize import group -from unittest.util import _MIN_COMMON_LEN -import string -import cocotb -import os -class Regs: - def __init__(self): - pass - - def get_addr(self,reg): - search1 = self.get_add_defs(reg) - # if all(c in string.hexdigits for c in search1[2:]): - return int(search1,16) - # return hex(self.get_hexa(search1)) - - - """get address from defs.h""" - def get_add_defs(self,reg): - pattern = re.compile(rf'#define {reg}\s*\(\*\(volatile uint32_t\*\)\s*(.*)\s*\)') - with open(f'{os.getenv("FIRMWARE_PATH")}/defs.h') as f: - for line in f: - m= re.search(pattern,line) - if m: - break - if m: - if not all(c in string.hexdigits for c in m.group(1)): - return hex(self.get_hexa(m.group(1))) - else: - return m.group(1) - else: - cocotb.log.info(f" [defsParser] can't find {reg} inside defs") - sys.exit() - - """get address from defs.h""" - def get_add_csr(self,reg): - pattern1 = re.compile(rf'#define {reg}\s*\(\*\(volatile uint32_t\*\)\s*(.*)\s*\)') - pattern2 = re.compile(rf'#define {reg}\s*(.*)') - m = False - with open(f'{os.getenv("FIRMWARE_PATH")}/../generated/csr.h') as f: - for line in f: - m1= re.search(pattern1,line) - m2= re.search(pattern2,line) - if m1: - m = m1 - break - if m2: - m=m2 - break - if m: - matched_str= m.group(1) - if matched_str[-1] == "L" and matched_str[-2].isnumeric: - matched_str = matched_str[:-1] - if not all(c in string.hexdigits for c in matched_str[2:]): - matched_str= hex(self.get_hexa(matched_str)) - - return matched_str - else: - cocotb.log.info(f" [defsParser] can't find {reg} inside csr") - sys.exit() - - - def get_hexa(self,s:string): - pattern2 = re.compile(r'\((.*)\s*\+\s*(.*)\)') - search_match = re.search(pattern2,s) - if search_match : - matches = [search_match.group(1),search_match.group(2)] - else: - matches = [s] - nothex = 1 - while nothex: - nothex = 0 - for i,match in enumerate(matches): - if not all(c in string.hexdigits for c in match[2:-1]): - matches[i]=self.get_add_csr(match) - nothex = 0 - else: - if match[-1] == "L" and match[-2].isnumeric: - matches[i]=matches[i][:-1] - - if len(matches) ==2: - return int(matches[0],16) + int(matches[1],16) - else: - return int(matches[0],16) - - diff --git a/verilog/dv/cocotb/interfaces/logic_analyzer.py b/verilog/dv/cocotb/interfaces/logic_analyzer.py deleted file mode 100644 index 04b3dc23..00000000 --- a/verilog/dv/cocotb/interfaces/logic_analyzer.py +++ /dev/null @@ -1,84 +0,0 @@ -import random -import cocotb -from cocotb.clock import Clock -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -import cocotb.simulator -from cocotb.handle import SimHandleBase -from cocotb.handle import Force -from cocotb_coverage.coverage import * -from cocotb.binary import BinaryValue -import enum -from cocotb.handle import ( - ConstantObject, - HierarchyArrayObject, - HierarchyObject, - ModifiableObject, - NonHierarchyIndexableObject, - SimHandle, -) - -from itertools import groupby, product - -import interfaces.common as common -from interfaces.common import GPIO_MODE -from interfaces.common import MASK_GPIO_CTRL -from interfaces.common import Macros - -class LA: - def __init__(self,dut:SimHandleBase): - self.dut = dut - self.clk = dut.clock_tb - self.core_hdl = dut.uut.soc.core - - - """ Configure the value of LA probes [0:127] - writing 1 to any bit means bit acts as outputs from the cpu - writing 0 to any bit means bit acts as inputs to the cpu """ - async def configure_la_en(self, bits,data): - self.__drive_la_iena(bits,data) - self.__drive_la_oenb(bits,data) - await ClockCycles(self.clk, 1) - - - - def __drive_la_iena(self, bits,data): - iena , n_bits = common.signal_value_size(self.core_hdl.la_ien_storage) - cocotb.log.debug(f' [LA] before change iena with {iena} and data = {data} bit [{n_bits-1-bits[0]}]:[{n_bits-1-bits[1]}]') - iena[n_bits-1-bits[0]:n_bits-1-bits[1]] = data - self.core_hdl.la_ien_storage.value = iena - cocotb.log.info(f' [LA] drive reg_la_iena with {hex(iena)}') - - def __drive_la_oenb(self, bits,data): - oenb , n_bits = common.signal_value_size(self.core_hdl.la_oe_storage) - cocotb.log.debug(f' [LA] before change oenb with {oenb} and data = {data} bit [{n_bits-1-bits[0]}]:[{n_bits-1-bits[1]}]') - oenb[n_bits-1-bits[0]:n_bits-1-bits[1]] = data - self.core_hdl.la_oe_storage.value = oenb - cocotb.log.info(f' [LA] drive reg_la_oenb with {hex(oenb)}') - - """ update the value of LA data input from cpu to user project """ - def drive_la_data_to_user(self,bits,data): - la , n_bits = common.signal_value_size(self.core_hdl.la_out_storage) - cocotb.log.debug(f' [LA] before la data update with LA ={la} and data = {data} bit [{n_bits-1-bits[0]}]:[{n_bits-1-bits[1]}]') - la[n_bits-1-bits[0]:n_bits-1-bits[1]] = data - self.core_hdl.la_out_storage.value = la - cocotb.log.info(f' [LA] drive_la_data_to_user: drive data {hex(la)} to user project') - - """return the value of LA data output from user project tp cpu""" - def check_la_user_out(self): - LA_out = self.core_hdl.la_input.value - if(LA_out.is_resolvable): - cocotb.log.info(f' [LA] Monitor : reg_la_data_out from user = {hex(LA_out)}') - else: - cocotb.log.info(f' [LA] Monitor : reg_la_data_out from user = {LA_out}') - return LA_out - - - """return the value of LA data output from user project tp cpu""" - def check_la_ctrl_reg(self): - LA_out = self.dut.uut.la_oenb_mprj.value - if(LA_out.is_resolvable): - cocotb.log.info(f' [LA] Monitor : reg_la_data_out from user = {hex(LA_out)}') - else: - cocotb.log.info(f' [LA] Monitor : reg_la_data_out from user = {LA_out}') - return LA_out \ No newline at end of file diff --git a/verilog/dv/cocotb/pli.tab b/verilog/dv/cocotb/pli.tab deleted file mode 100644 index 5ac9e794..00000000 --- a/verilog/dv/cocotb/pli.tab +++ /dev/null @@ -1 +0,0 @@ -acc+=rw,wn:* \ No newline at end of file diff --git a/verilog/dv/cocotb/sdf_includes.v b/verilog/dv/cocotb/sdf_includes.v deleted file mode 100644 index 67ef9399..00000000 --- a/verilog/dv/cocotb/sdf_includes.v +++ /dev/null @@ -1,7 +0,0 @@ -initial begin - `ifndef CARAVAN - $sdf_annotate({`MAIN_PATH,"/../../../signoff/caravel/primetime-signoff/sdf/",`CORNER,"/caravel.", `SDF_POSTFIX,".sdf"}, uut,,{`MAIN_PATH,"/sim/",`TAG,"/",`FTESTNAME,"/caravel_sdf.log"},"MINIMUM"); - `else - $sdf_annotate({`MAIN_PATH,"/../../../signoff/caravan/primetime-signoff/sdf/",`CORNER,"/caravan.", `SDF_POSTFIX,".sdf"}, uut,,{`MAIN_PATH,"/sim/",`TAG,"/",`FTESTNAME,"/caravan_sdf.log"},"MINIMUM"); - `endif -end diff --git a/verilog/dv/cocotb/tests.json b/verilog/dv/cocotb/tests.json deleted file mode 100644 index 44999bdc..00000000 --- a/verilog/dv/cocotb/tests.json +++ /dev/null @@ -1,355 +0,0 @@ -{ - "Tests": { - "_comment0" :"level is priorty of the test low is better, SW spcify if the test uses SW, RTL regressions run this test in RTL ", - "_comment1" :"GL regressions run this test in gatelevel, GL_SDF regression run this test with SDF included" - ,"gpio_all_i" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"configure all gpios as mgmt input using automatic approach firmware and check them"} - ,"gpio_all_i_caravan" :{"level":0, - "SW":true, - "RTL":["r_caravan_rtl"], - "GL":["r_caravan_gl"], - "GL_SDF":["r_caravan_sdf"], - "description":"configure all gpios as mgmt input using automatic approach firmware and check them for caravan"} - - ,"hk_disable" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"check Housekeeping SPI disable register is working"} - ,"uart_rx" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"test uart reception"} - ,"hk_regs_rst_spi" :{"level":0, - "SW":false, - "RTL":["r_rtl","r_caravan_rtl","setup","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","push_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"check reset value of house keeping registers by reading them trough the spi housekeeping"} - - ,"gpio_all_i_user" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"configure all gpios as user input using automatic approach firmware and check them"} - - ,"gpio_all_i_pu" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"configure all gpios as mgmt input pull up using automatic approach firmware and check them"} - - - ,"gpio_all_i_pu_caravan" :{"level":0, - "SW":true, - "RTL":["r_caravan_rtl"], - "GL":["r_caravan_gl"], - "GL_SDF":["r_caravan_sdf"], - "description":"configure all gpios as mgmt input pull up using automatic approach firmware and check them for caravan"} - - ,"gpio_all_i_pu_user" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"configure all gpios as user input pull up using automatic approach firmware and check them"} - - ,"gpio_all_i_pd" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"configure all gpios as mgmt input pull down using automatic approach firmware and check them"} - ,"gpio_all_i_pd_caravan" :{"level":0, - "SW":true, - "RTL":["r_caravan_rtl"], - "GL":["r_caravan_gl"], - "GL_SDF":["r_caravan_sdf"], - "description":"configure all gpios as mgmt input pull down using automatic approach firmware and check them for caravan"} - - ,"gpio_all_i_pd_user" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"configure all gpios as user input pull down using automatic approach firmware and check them"} - - ,"gpio_all_bidir_user" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"configure all gpios as user bidir using automatic approach firmware and check them"} - - ,"gpio_all_o" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"configure all gpios as mgmt output using automatic approach firmware and check them"} - - ,"gpio_all_o_caravan" :{"level":0, - "SW":true, - "RTL":["r_caravan_rtl"], - "GL":["r_caravan_gl"], - "GL_SDF":["r_caravan_sdf"], - "description":"configure all gpios as mgmt output using automatic approach firmware and check them for caravan"} - - ,"gpio_all_o_user" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"configure all gpios as user output using automatic approach firmware and check them"} - ,"hk_regs_wr_wb_cpu" :{"level":0, - "SW":false, - "RTL":["r_rtl","r_caravan_rtl","setup","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","push_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"bit bash test for housekeeping registers"} - ,"IRQ_timer" :{"level":2, - "SW":true, - "RTL":["r_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"test timer0 interrupt"} - - ,"bitbang_cpu_all_i" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":" configure gpio[0:37] as mgmt input using bitbang and check them"} - - ,"bitbang_spi_o" :{"level":0, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "SW":true, - "description":"Same as bitbang_cpu_all but configure the gpio using the SPI not the firmware"} - - ,"mgmt_gpio_out" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"tests blinking of mgmt gpio bit as an output"} - - ,"bitbang_spi_i" :{"level":0, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "SW":true, - "description":"Same as bitbang_cpu_all_i but configure the gpio using the SPI not the firmware"} - ,"hk_regs_wr_spi" :{"level":0, - "SW":false, - "RTL":["r_rtl","r_caravan_rtl","setup","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","push_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"write then read(the written value) from random housekeeping registers through the SPI housekeeping"} - - ,"IRQ_external" :{"level":2, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"test external interrupt by mprj 7"} - - ,"IRQ_uart" :{"level":2, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"test timer0 interrupt"} - - ,"mgmt_gpio_in" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"tests blinking of mgmt gpio bit as an output"} - - ,"timer0_oneshot" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"check timer0 oneshot mode"} - - ,"uart_loopback" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"test uart in loopback mode input and output is shorted"} - - ,"timer0_periodic" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"check timer0 periodic mode"} - - ,"uart_tx" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"test uart transmit"} - ,"debug" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"use caravel in debug mode and check reading and writing from dff2 RAM"} - ,"spi_master_rd" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"using SPI master for reading from external memory"} - - ,"user_pass_thru_rd" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"use the housekeeping spi in user pass thru mode to read from external mem"} - - ,"clock_redirect" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"check clock redirect is working as expected"} - - ,"mgmt_gpio_bidir" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"send random number of blinks through mgmt_gpio and expect to recieve the same number back "} - - ,"la" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"check logic analyzer input and output enable"} - - ,"pll" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"Check pll diffrent configuration"} - - ,"spi_master_temp" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","nightly","weekly","tape_out"], - "GL":["r_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"To be deleted"} - - ,"bitbang_cpu_all_o" :{"level":0, - "SW":true, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","push_gl","gpio_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"configure all gpios as mgmt output using bitbang and check them"} - - ,"mem_dff" :{"level":2, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"Memory stress for all space of dff"} - - ,"bitbang_cpu_all_01" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","push_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"shift all the register with 01"} - - ,"mem_dff2" :{"level":2, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"Memory stress for all space of dff2"} - - ,"bitbang_cpu_all_10" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","push_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"shift all the register with 10"} - - ,"bitbang_cpu_all_1100" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","push_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"shift all the register with 1100"} - - ,"bitbang_cpu_all_0011" :{"level":0, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","setup","push","push_gl","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","push_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"shift all the register with 0011"} - ,"cpu_stress" :{"level":2, - "SW":true, - "RTL":["r_rtl","r_caravan_rtl","nightly","weekly","tape_out"], - "GL":["r_gl","r_caravan_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","r_caravan_sdf","weekly","tape_out"], - "description":"stress the cpu with heavy processing"} - ,"bitbang_no_cpu_all_o" :{"level":0, - "SW":false, - "RTL":["r_rtl","setup","gpio_rtl","push","push_gl","nightly","weekly","tape_out"], - "GL":[], - "GL_SDF":[], - "description":"test disable CPU and control the wishbone to configure gpio[4:37] as mgmt output using bitbang and check them"} - ,"bitbang_no_cpu_all_i" :{"level":0, - "SW":false, - "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], - "GL":[], - "GL_SDF":[], - "description":"test disable CPU and control the wishbone to configure gpio[0:31] as mgmt input using bitbang and check them"} - ,"hk_regs_wr_wb" :{"level":0, - "SW":false, - "RTL":["r_rtl","setup","push","push_gl","nightly","weekly","tape_out"], - "GL":[], - "GL_SDF":[], - "description":"write then read (the written value) from random housekeeping registers through the firmware but without using CPU, the SPI and system regs can't be read using firmware so the test only GPIO regs inside housekeeping "} - ,"helloWorld" :{"level":3, - "SW":false, - "RTL":[], - "GL":[], - "GL_SDF":[], - "description":"hello world test"} - ,"spi_rd_wr_nbyte" :{"level":3, - "SW":false, - "RTL":[], - "GL":[], - "GL_SDF":[], - "description":"try housekeeping spi Write and Read in n-byte mode "} - ,"cpu_reset" :{"level":3, - "SW":true, - "RTL":["r_rtl","nightly","weekly","tape_out"], - "GL":["r_gl","nightly","weekly","tape_out"], - "GL_SDF":["r_sdf","weekly","tape_out"], - "description":"test cpu reset register inside the housekeeping "} - - } -} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_0011.c b/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_0011.c deleted file mode 100644 index 404b99c3..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_0011.c +++ /dev/null @@ -1,62 +0,0 @@ -#include -#include -#include "bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_3 = 0x1803 ; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - - // bitbang - for(int i =0;i<62;i++){ - clock00(); - clock00(); - clock11(); - clock11(); - } - reg_debug_1 = 0xFF; // finish configuration - - -} - diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_01.c b/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_01.c deleted file mode 100644 index 4a884dc9..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_01.c +++ /dev/null @@ -1,60 +0,0 @@ -#include -#include -#include "bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_3 = 0x1803 ; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - - // bitbang - for(int i =0;i<124;i++){ - clock00(); - clock11(); - } - reg_debug_1 = 0xFF; // finish configuration - - -} - diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_10.c b/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_10.c deleted file mode 100644 index 4065d921..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_10.c +++ /dev/null @@ -1,60 +0,0 @@ -#include -#include -#include "bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_3 = 0x1803 ; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - - // bitbang - for(int i =0;i<124;i++){ - clock11(); - clock00(); - } - reg_debug_1 = 0xFF; // finish configuration - - -} - diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_1100.c b/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_1100.c deleted file mode 100644 index 7211cd58..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_1100.c +++ /dev/null @@ -1,62 +0,0 @@ -#include -#include -#include "bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_3 = 0x1803 ; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - - // bitbang - for(int i =0;i<62;i++){ - clock11(); - clock11(); - clock00(); - clock00(); - } - reg_debug_1 = 0xFF; // finish configuration - - -} - diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_i.c b/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_i.c deleted file mode 100644 index 7164b5f3..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_i.c +++ /dev/null @@ -1,91 +0,0 @@ -#include -#include -#include "bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_mprj_io_37 = 0x1803; - reg_mprj_io_36 = 0x1803; - reg_mprj_io_35 = 0x1803; - reg_mprj_io_34 = 0x1803; - reg_mprj_io_33 = 0x1803; - reg_mprj_io_32 = 0x1803; - reg_mprj_io_31 = 0x1803; - reg_mprj_io_30 = 0x1803; - reg_mprj_io_29 = 0x1803; - reg_mprj_io_28 = 0x1803; - reg_mprj_io_27 = 0x1803; - reg_mprj_io_26 = 0x1803; - reg_mprj_io_25 = 0x1803; - reg_mprj_io_24 = 0x1803; - reg_mprj_io_23 = 0x1803; - reg_mprj_io_22 = 0x1803; - reg_mprj_io_21 = 0x1803; - reg_mprj_io_20 = 0x1803; - reg_mprj_io_19 = 0x1803; - reg_mprj_io_18 = 0x1803; - reg_mprj_io_17 = 0x1803; - reg_mprj_io_16 = 0x1803; - reg_mprj_io_15 = 0x1803; - reg_mprj_io_14 = 0x1803; - reg_mprj_io_13 = 0x1803; - reg_mprj_io_12 = 0x1803; - reg_mprj_io_11 = 0x1803; - reg_mprj_io_10 = 0x1803; - reg_mprj_io_9 = 0x1803; - reg_mprj_io_8 = 0x1803; - reg_mprj_io_7 = 0x1803; - reg_mprj_io_6 = 0x1803; - reg_mprj_io_5 = 0x1803; - reg_mprj_io_4 = 0x1803; - reg_mprj_io_3 = 0x1803; - reg_mprj_io_2 = 0x1803; - reg_mprj_io_1 = 0x1803; - reg_mprj_io_0 = 0x1803; - reg_mprj_io_0 = 0x1803; - - // bitbang - //Configure all as input except reg_mprj_io_3 - clock_in_right_i_left_i_standard(0); // 18 and 19 - clock_in_right_i_left_i_standard(0); // 17 and 20 - clock_in_right_i_left_i_standard(0); // 16 and 21 - clock_in_right_i_left_i_standard(0); // 15 and 22 - clock_in_right_i_left_i_standard(0); // 14 and 23 - clock_in_right_i_left_i_standard(0); // 13 and 24 - clock_in_right_i_left_i_standard(0); // 12 and 25 - clock_in_right_i_left_i_standard(0); // 11 and 26 - clock_in_right_i_left_i_standard(0); // 10 and 27 - clock_in_right_i_left_i_standard(0); // 9 and 28 - clock_in_right_i_left_i_standard(0); // 8 and 29 - clock_in_right_i_left_i_standard(0); // 7 and 30 - clock_in_right_i_left_i_standard(0); // 6 and 31 - clock_in_right_i_left_i_standard(0); // 5 and 32 - clock_in_right_i_left_i_standard(0); // 4 and 33 - clock_in_right_i_left_i_standard(0); // 3 and 34 - clock_in_right_i_left_i_standard(0); // 2 and 35 - clock_in_right_i_left_i_standard(0); // 1 and 36 - clock_in_right_i_left_i_standard(0); // 0 and 37 - load(); // load - reg_debug_1 = 0XAA; // configuration done wait environment to send 0x8F66FD7B to reg_mprj_datal - while (reg_mprj_datal != 0x8F66FD7B); - reg_debug_1 = 0XBB; // configuration done wait environment to send 0xFFA88C5A to reg_mprj_datal - while (reg_mprj_datal != 0xFFA88C5A); - reg_debug_1 = 0XCC; // configuration done wait environment to send 0xC9536346 to reg_mprj_datal - while (reg_mprj_datal != 0xC9536346); - reg_debug_1 = 0XD1; - while (reg_mprj_datah != 0x3F); - reg_debug_1 = 0XD2; - while (reg_mprj_datah != 0x0); - reg_debug_1 = 0XD3; - while (reg_mprj_datah != 0x15); - reg_debug_1 = 0XD4; - while (reg_mprj_datah != 0x2A); - - reg_debug_2 = 0xFF; - -} - diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_o.c b/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_o.c deleted file mode 100644 index 53db0acc..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_cpu_all_o.c +++ /dev/null @@ -1,99 +0,0 @@ -#include -#include -#include "bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_OUTPUT ; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - - // bitbang - // Configure all as output except reg_mprj_io_3 - clock_in_right_o_left_o_standard(0); // 18 and 19 - clock_in_right_o_left_o_standard(0); // 17 and 20 - clock_in_right_o_left_o_standard(0); // 16 and 21 - clock_in_right_o_left_o_standard(0); // 15 and 22 - clock_in_right_o_left_o_standard(0); // 14 and 23 - clock_in_right_o_left_o_standard(0); // 13 and 24 - clock_in_right_o_left_o_standard(0); // 12 and 25 - clock_in_right_o_left_o_standard(0); // 11 and 26 - clock_in_right_o_left_o_standard(0); // 10 and 27 - clock_in_right_o_left_o_standard(0); // 9 and 28 - clock_in_right_o_left_o_standard(0); // 8 and 29 - clock_in_right_o_left_o_standard(0); // 7 and 30 - clock_in_right_o_left_o_standard(0); // 6 and 31 - clock_in_right_o_left_o_standard(0); // 5 and 32 - clock_in_right_o_left_o_standard(0); // 4 and 33 - clock_in_right_o_left_o_standard(0); // 3 and 34 - clock_in_right_o_left_o_standard(0); // 2 and 35 - clock_in_right_o_left_o_standard(0); // 1 and 36 - clock_in_right_o_left_o_standard(0); // 0 and 37 - load(); - reg_debug_1 = 0xFF; // finish configuration - reg_mprj_datal = 0x0; - reg_mprj_datah = 0x0; - i = 0x20; - for (j = 0; j < 5; j++) { - reg_mprj_datah = i; - reg_debug_2 = 37-j; - reg_mprj_datah = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x20; - } - i = 0x80000000; - for (j = 0; j < 32; j++) { - reg_mprj_datah = 0x3f; - reg_mprj_datal = i; - reg_debug_2 = 32-j; - reg_mprj_datah = 0x00; - reg_mprj_datal = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x80000000; - } - -} - - diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_functions.c b/verilog/dv/cocotb/tests/bitbang/bitbang_functions.c deleted file mode 100644 index 53c2f936..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_functions.c +++ /dev/null @@ -1,325 +0,0 @@ - - -void clock11() -{ - reg_mprj_xfer = 0x66; reg_mprj_xfer = 0x76; -} - -void clock00() -{ - reg_mprj_xfer = 0x06; reg_mprj_xfer = 0x16; -} - -// -------------------------------------------------------- - -void clock10() -{ - reg_mprj_xfer = 0x46; reg_mprj_xfer = 0x56; -} - -void clock01() -{ - reg_mprj_xfer = 0x26; reg_mprj_xfer = 0x36; -} - -// -------------------------------------------------------- -// Load registers -// -------------------------------------------------------- - -void load() -{ - reg_mprj_xfer = 0x06; - reg_mprj_xfer = 0x0e; reg_mprj_xfer = 0x06; // Apply load -} - -// -------------------------------------------------------- -// Enable bit-bang mode and clear registers -// -------------------------------------------------------- - -void clear_registers() -{ - reg_mprj_xfer = 0x06; // Enable bit-bang mode - reg_mprj_xfer = 0x04; reg_mprj_xfer = 0x06; // Pulse reset -} - -// -------------------------------------------------------- -// Clock in an input + output configuration. The value -// passed in "ddhold" is the number of data-dependent hold -// violations up to this point. -// -------------------------------------------------------- - -/* Clock in data on the left side. Assume standard hold - * violation, so clock in12 times and assume that the - * next data to be clocked will start with "1", enforced - * by the code. - * - * Left side = GPIOs 37 to19 - */ - -void clock_in_left_short(uint32_t ddhold) -{ - uint32_t count; - uint32_t holds = ddhold; - - clock10(); - clock10(); - - for (count = 0; count < 9; count++) { - if (holds != 0) { - clock10(); - holds--; - } - else - clock00(); - } - - clock00(); -} - -/* Clock in data on the right side. Assume standard hold - * violation, so clock in12 times and assume that the - * next data to be clocked will start with "1", enforced - * by the code. - * - * Right side = GPIOs 0 to18 - */ - -void clock_in_right_short(uint32_t ddhold) -{ - uint32_t count; - uint32_t holds = ddhold; - - clock01(); - clock01(); - - for (count = 0; count < 9; count++) { - if (holds != 0) { - clock01(); - holds--; - } - else - clock00(); - } - - clock00(); -} - -/* Clock in data on the left side. Clock the normal13 times, - * which is correct for no hold violation or for a data- - * dependent hold violation (for the latter, ddhold must be - * incremented before calling the subroutine). - * - * Left side = GPIOs 37 to19 - */ - -void clock_in_left_standard(uint32_t ddhold){ - uint32_t count; - uint32_t holds = ddhold; - - clock10(); - clock10(); - - for (count = 0; count < 7; count++) { - if (holds != 0) { - clock10(); - holds--; - } - else - clock00(); - } - - clock10(); - clock00(); - clock00(); - clock10(); -} -void clock_in_right_o_left_o_standard(uint32_t ddhold){ - uint32_t count; - uint32_t holds = ddhold; - - clock11(); - clock11(); - - for (count = 0; count < 7; count++) { - if (holds != 0) { - clock11(); - holds--; - } - else - clock00(); - } - - clock11(); - clock00(); - clock00(); - clock11(); -} - -void clock_in_right_o_left_i_standard(uint32_t ddhold){ - uint32_t count; - uint32_t holds = ddhold; - - clock11(); - clock11(); - - for (count = 0; count < 7; count++) { - if (holds != 0) { - clock11(); - holds--; - } - else - clock00(); - } - - clock10(); - clock00(); - clock01(); - clock11(); -} - -void clock_in_right_i_left_o_standard(uint32_t ddhold){ - uint32_t count; - uint32_t holds = ddhold; - - clock11(); - clock11(); - - for (count = 0; count < 7; count++) { - if (holds != 0) { - clock11(); - holds--; - } - else - clock00(); - } - - clock01(); - clock00(); - clock10(); - clock11(); -} - -void clock_in_right_i_left_i_standard(uint32_t ddhold){ - uint32_t count; - uint32_t holds = ddhold; - - clock11(); - clock11(); - - for (count = 0; count < 7; count++) { - if (holds != 0) { - clock11(); - holds--; - } - else - clock00(); - } - - clock00(); - clock00(); - clock11(); - clock11(); -} - -/* Clock in data on the right side. Clock the normal13 times, - * which is correct for no hold violation or for a data- - * dependent hold violation (for the latter, ddhold must be - * incremented before calling the subroutine). - * - * Right side = GPIOs 0 to18 - */ - -void clock_in_right_standard(uint32_t ddhold){ - uint32_t count; - uint32_t holds = ddhold; - - clock11(); - clock11(); - - for (count = 0; count < 7; count++) { - if (holds != 0) { - clock01(); - holds--; - } - else - clock00(); - } - - clock10(); - clock00(); - clock01(); - clock11(); -} - -void clock_in_right_i_left_io_standard(uint32_t ddhold){ - uint32_t count; - uint32_t holds = ddhold; - - clock11(); - clock11(); - - for (count = 0; count < 7; count++) { - if (holds != 0) { - clock11(); - holds--; - } - else - clock00(); - } - - clock01(); - clock00(); - clock11(); - clock11(); -} -// -------------------------------------------------------- -// Clock in data for GPIO 0 and 37 (fixed) and apply load. -// -------------------------------------------------------- - -void clock_in_end(){ - // Right side: GPIO 0 configured disabled - // Left side: GPIO 37 configured as input - clock11(); - clock10(); - clock00(); - clock00(); - clock00(); - clock00(); - clock00(); - clock00(); - clock00(); - clock01(); - clock00(); - clock11(); - clock11(); - - load(); -} - -// -------------------------------------------------------- -// Same as above, except that GPIO is configured as an -// output for a quick sanity check. -// -------------------------------------------------------- - -void clock_in_end_output() -{ - // Right side: GPIO 0 configured disabled - // Left side: GPIO 37 configured as output - clock11(); - clock10(); - clock00(); - clock00(); - clock00(); - clock00(); - clock00(); - clock00(); - clock00(); - clock01(); - clock00(); - clock01(); - clock11(); - - load(); - - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT; -} diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_functions.py b/verilog/dv/cocotb/tests/bitbang/bitbang_functions.py deleted file mode 100644 index bc2ced7b..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_functions.py +++ /dev/null @@ -1,355 +0,0 @@ -from interfaces.defsParser import Regs - -reg = Regs() - - -""" -reg_mprj_xfer contain -bit 0 : busy -bit 1 : bitbang enable -bit 2 : bitbang reset active low -bit 3 : bitbang load registers -bit 4 : bitbang clock -bit 5 : serial data 1 -bit 6 : serial data 2 -""" - -"""shift the 2 registers with 2 ones""" -async def clock11(cpu): - reg_mprj_xfer_addr = reg.get_addr('reg_mprj_xfer') - await cpu.drive_data2address(reg_mprj_xfer_addr,0x66) # 0110_0110 - await cpu.drive_data2address(reg_mprj_xfer_addr,0x76) # 0111_0110 - -"""shift the 2 registers with 2 zeros""" -async def clock00(cpu): - reg_mprj_xfer_addr = reg.get_addr('reg_mprj_xfer') - await cpu.drive_data2address(reg_mprj_xfer_addr,0x06) # 0000_0110 - await cpu.drive_data2address(reg_mprj_xfer_addr,0x16) # 0001_0110 - -"""shift the 2 registers with 1 in the left side and zero in right side""" -async def clock01(cpu): - reg_mprj_xfer_addr = reg.get_addr('reg_mprj_xfer') - await cpu.drive_data2address(reg_mprj_xfer_addr,0x26) # 0010_0110 - await cpu.drive_data2address(reg_mprj_xfer_addr,0x36) # 0011_0110 - -"""shift the 2 registers with 1 in the left side and zero in right side""" -async def clock10(cpu): - reg_mprj_xfer_addr = reg.get_addr('reg_mprj_xfer') - await cpu.drive_data2address(reg_mprj_xfer_addr,0x46) # 0100_0110 - await cpu.drive_data2address(reg_mprj_xfer_addr,0x56) # 0101_0110 - -"""enable the serial loader bit to load registers""" -async def load(cpu): - reg_mprj_xfer_addr = reg.get_addr('reg_mprj_xfer') - await cpu.drive_data2address(reg_mprj_xfer_addr,0x06) # enable bit bang - await cpu.drive_data2address(reg_mprj_xfer_addr,0x0e) # enable loader - await cpu.drive_data2address(reg_mprj_xfer_addr,0x06) # enable bit bang - -"""Enable bit-bang mode and clear registers""" -async def clear_registers(cpu): - reg_mprj_xfer_addr = reg.get_addr('reg_mprj_xfer') - await cpu.drive_data2address(reg_mprj_xfer_addr,0x06) # enable bit bang - await cpu.drive_data2address(reg_mprj_xfer_addr,0x04) # reset - await cpu.drive_data2address(reg_mprj_xfer_addr,0x06) # enable bit bang - -""" --------------------------------------------------------- -Clock in an input + output configuration. The value -passed in "ddhold" is the number of data-dependent hold -violations up to this point. --------------------------------------------------------- - - * Clock in data on the left side. Assume standard hold - * violation, so clock in 12 times and assume that the - * next data to be clocked will start with "1", enforced - * by the code. - * - * Left side = GPIOs 37 to 19 - - """ -async def clock_in_left_short(cpu,ddhold): - await clock10(cpu) - await clock10(cpu) - - for i in range(9): - if ddhold != 0: - await clock10(cpu) - ddhold -=1 - else: - await clock00(cpu) - - await clock00(cpu) - -async def clock_in_right_short(cpu,ddhold): - await clock01(cpu) - await clock01(cpu) - - for i in range(9): - if ddhold != 0: - await clock01(cpu) - ddhold -=1 - else: - await clock00(cpu) - - await clock00(cpu) - -async def clock_in_left_standard(cpu,ddhold): - await clock10(cpu) - await clock10(cpu) - - for i in range(7): - if ddhold != 0: - await clock10(cpu) - ddhold -=1 - else: - await clock00(cpu) - - await clock10(cpu) - await clock00(cpu) - await clock00(cpu) - await clock10(cpu) - -"""right output left input""" -async def clock_in_right_o_left_i_standard(cpu,ddhold): - await clock11(cpu) - await clock11(cpu) - - for i in range(7): - if ddhold != 0: - await clock01(cpu) - ddhold -=1 - else: - await clock00(cpu) - - await clock10(cpu) - await clock00(cpu) - await clock01(cpu) - await clock11(cpu) - -"""right input left output""" -async def clock_in_right_i_left_o_standard(cpu,ddhold): - await clock11(cpu) - await clock11(cpu) - - for i in range(7): - if ddhold != 0: - await clock10(cpu) - ddhold -=1 - else: - await clock00(cpu) - - await clock01(cpu) - await clock00(cpu) - await clock10(cpu) - await clock11(cpu) - -"""right input left output""" -async def clock_in_right_i_left_i_standard(cpu,ddhold): - await clock11(cpu) - await clock11(cpu) - - for i in range(7): - if ddhold != 0: - await clock01(cpu) - ddhold -=1 - else: - await clock00(cpu) - - await clock00(cpu) - await clock00(cpu) - await clock11(cpu) - await clock11(cpu) - -"""right output left output""" -async def clock_in_right_o_left_o_standard(cpu,ddhold): - await clock11(cpu) - await clock11(cpu) - - for i in range(7): - if ddhold != 0: - await clock01(cpu) - ddhold -=1 - else: - await clock00(cpu) - - await clock11(cpu) - await clock00(cpu) - await clock00(cpu) - await clock11(cpu) - -async def clock_in_end_output(cpu): - # Right side: GPIO 0 configured disabled - # /Left side: GPIO 37 configured as output - await clock11(cpu) - await clock11(cpu) - await clock00(cpu) - await clock00(cpu) - await clock00(cpu) - await clock00(cpu) - await clock00(cpu) - await clock00(cpu) - await clock00(cpu) - await clock00(cpu) - await clock00(cpu) - await clock01(cpu) - await clock11(cpu) - await load(cpu) - reg_mprj_io_37_addr = reg.get_addr('reg_mprj_io_37') - await cpu.drive_data2address(reg_mprj_io_37_addr,0x1809) - - -async def clock11_spi(caravelEnv): - - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(0x13) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(0x66) # Data = 0x01 (enable bit-bang mode) - await caravelEnv.disable_csb() - - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(0x13) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(0x76) # 11 - await caravelEnv.disable_csb() - -async def clock00_spi(caravelEnv): - - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(0x13) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(0x06) # Data = 0x01 (enable bit-bang mode) - await caravelEnv.disable_csb() - - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(0x13) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(0x16) # 00 - await caravelEnv.disable_csb() - -async def clock01_spi(caravelEnv): - - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(0x13) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(0x26) # Data = 0x01 (enable bit-bang mode) - await caravelEnv.disable_csb() - - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(0x13) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(0x36) # 01 - await caravelEnv.disable_csb() - -async def clock10_spi(caravelEnv): - - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(0x13) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(0x46) # Data = 0x01 (enable bit-bang mode) - await caravelEnv.disable_csb() - - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(0x13) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(0x56) # 10 - await caravelEnv.disable_csb() - -async def load_spi(caravelEnv): - - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(0x13) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(0x0e) # load enable - await caravelEnv.disable_csb() - - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(0x13) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(0x16) # 00 - await caravelEnv.disable_csb() - -"""right output left input""" -async def clock_in_right_o_left_i_standard_spi(caravelEnv,ddhold): - await clock11_spi(caravelEnv) - await clock11_spi(caravelEnv) - - for i in range(7): - if ddhold != 0: - await clock01_spi(caravelEnv) - ddhold -=1 - else: - await clock00_spi(caravelEnv) - - await clock10_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock01_spi(caravelEnv) - await clock11_spi(caravelEnv) - -"""right input left output""" -async def clock_in_right_i_left_o_standard_spi(caravelEnv,ddhold): - await clock11_spi(caravelEnv) - await clock11_spi(caravelEnv) - - for i in range(7): - if ddhold != 0: - await clock10_spi(caravelEnv) - ddhold -=1 - else: - await clock00_spi(caravelEnv) - - await clock01_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock10_spi(caravelEnv) - await clock11_spi(caravelEnv) - -"""right input left output""" -async def clock_in_right_i_left_i_standard_spi(caravelEnv,ddhold): - await clock11_spi(caravelEnv) - await clock11_spi(caravelEnv) - - for i in range(7): - if ddhold != 0: - await clock01_spi(caravelEnv) - ddhold -=1 - else: - await clock00_spi(caravelEnv) - - await clock00_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock11_spi(caravelEnv) - await clock11_spi(caravelEnv) - -"""right output left output""" -async def clock_in_right_o_left_o_standard_spi(caravelEnv,ddhold): - await clock11_spi(caravelEnv) - await clock11_spi(caravelEnv) - - for i in range(7): - if ddhold != 0: - await clock01_spi(caravelEnv) - ddhold -=1 - else: - await clock00_spi(caravelEnv) - - await clock11_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock11_spi(caravelEnv) - -async def clock_in_end_output_spi(caravelEnv): - # Right side: GPIO 0 configured disabled - # /Left side: GPIO 37 configured as output - await clock11_spi(caravelEnv) - await clock11_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock00_spi(caravelEnv) - await clock01_spi(caravelEnv) - await clock11_spi(caravelEnv) - await load_spi(caravelEnv) diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_no_cpu.c b/verilog/dv/cocotb/tests/bitbang/bitbang_no_cpu.c deleted file mode 100644 index 1aa21f5b..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_no_cpu.c +++ /dev/null @@ -1,10 +0,0 @@ -#include -#include - -// Empty C code - -void main() -{ - return; -} - diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_no_cpu_all_i.c b/verilog/dv/cocotb/tests/bitbang/bitbang_no_cpu_all_i.c deleted file mode 100644 index 1aa21f5b..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_no_cpu_all_i.c +++ /dev/null @@ -1,10 +0,0 @@ -#include -#include - -// Empty C code - -void main() -{ - return; -} - diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_no_cpu_all_o.c b/verilog/dv/cocotb/tests/bitbang/bitbang_no_cpu_all_o.c deleted file mode 100644 index 59a806fe..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_no_cpu_all_o.c +++ /dev/null @@ -1,9 +0,0 @@ -#include -#include - -// Empty C code - -void main() -{ - return; -} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_spi_i.c b/verilog/dv/cocotb/tests/bitbang/bitbang_spi_i.c deleted file mode 100644 index b3be10c0..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_spi_i.c +++ /dev/null @@ -1,72 +0,0 @@ -#include -#include - -// Empty C code - -void main() -{ - int i,j; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - - reg_debug_1 = 0xFF; // finish configuration - while (reg_debug_2 != 0xDD); - reg_debug_1 = 0XAA; // configuration done wait environment to send 0x8F66FD7B to reg_mprj_datal - while (reg_mprj_datal != 0x8F66FD7B); - reg_debug_1 = 0XBB; // configuration done wait environment to send 0xFFA88C5A to reg_mprj_datal - while (reg_mprj_datal != 0xFFA88C5A); - reg_debug_1 = 0XCC; // configuration done wait environment to send 0xC9536346 to reg_mprj_datal - while (reg_mprj_datal != 0xC9536346); - reg_debug_1 = 0XD1; - while (reg_mprj_datah != 0x3F); - reg_debug_1 = 0XD2; - while (reg_mprj_datah != 0x0); - reg_debug_1 = 0XD3; - while (reg_mprj_datah != 0x15); - reg_debug_1 = 0XD4; - while (reg_mprj_datah != 0x2A); - - reg_debug_2 = 0xFF; - -} - diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_spi_o.c b/verilog/dv/cocotb/tests/bitbang/bitbang_spi_o.c deleted file mode 100644 index e85dff5b..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_spi_o.c +++ /dev/null @@ -1,79 +0,0 @@ -#include -#include - -// Empty C code - -void main() -{ - int i,j; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 0; - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_OUTPUT; - // reg_mprj_io_4 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - // reg_mprj_io_3 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - // reg_mprj_io_2 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - // reg_mprj_io_1 = GPIO_MODE_MGMT_STD_OUTPUT; - // reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - - reg_debug_1 = 0xFF; // finish configuration - while (reg_debug_2 != 0xFF); // finish bit bang - reg_hkspi_disable = 1; - reg_mprj_datal = 0x0; - reg_mprj_datah = 0x0; - i = 0x20; - for (j = 0; j < 5; j++) { - reg_mprj_datah = i; - reg_debug_2 = 37-j; - reg_mprj_datah = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x20; - } - i = 0x80000000; - for (j = 0; j < 32; j++) { - reg_mprj_datah = 0x3f; - reg_mprj_datal = i; - reg_debug_2 = 32-j; - reg_mprj_datah = 0x00; - reg_mprj_datal = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x80000000; - } - -} - diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_tests.py b/verilog/dv/cocotb/tests/bitbang/bitbang_tests.py deleted file mode 100644 index b3a261fe..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_tests.py +++ /dev/null @@ -1,259 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE - -reg = Regs() - -@cocotb.test() -@repot_test -async def bitbang_no_cpu_all_o(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=9373) - cpu = RiskV(dut) - cpu.cpu_force_reset() - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_37'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_36'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_35'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_34'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_33'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_32'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_31'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_30'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_29'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_28'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_27'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_26'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_25'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_24'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_23'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_22'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_21'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_20'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_19'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_18'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_17'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_16'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_15'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_14'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_13'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_12'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_11'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_10'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_9'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_8'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_7'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_6'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_5'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_4'),GPIO_MODE.GPIO_MODE_MGMT_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_3'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_2'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_1'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_0'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_0'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - - - #Configure all as output except reg_mprj_io_3 - await clear_registers(cpu) - await clock_in_right_o_left_o_standard(cpu,0) # 18 and 19 - await clock_in_right_o_left_o_standard(cpu,0) # 17 and 20 - await clock_in_right_o_left_o_standard(cpu,0) # 16 and 21 - await clock_in_right_o_left_o_standard(cpu,0) # 15 and 22 - await clock_in_right_o_left_o_standard(cpu,0) # 14 and 23 - await clock_in_right_o_left_o_standard(cpu,0) # 13 and 24 - await clock_in_right_o_left_o_standard(cpu,0) # 12 and 25 - await clock_in_right_o_left_o_standard(cpu,0) # 11 and 26 - await clock_in_right_o_left_o_standard(cpu,0) # 10 and 27 - await clock_in_right_o_left_o_standard(cpu,0) # 9 and 28 - await clock_in_right_o_left_o_standard(cpu,0) # 8 and 29 - await clock_in_right_o_left_o_standard(cpu,0) # 7 and 30 - await clock_in_right_o_left_o_standard(cpu,0) # 6 and 31 - await clock_in_right_o_left_o_standard(cpu,0) # 5 and 32 - await clock_in_right_o_left_o_standard(cpu,0) # 4 and 33 - await clock_in_right_o_left_i_standard(cpu,0) # 3 and 34 - await clock_in_right_o_left_i_standard(cpu,0) # 2 and 35 - await clock_in_right_o_left_i_standard(cpu,0) # 1 and 36 - await clock_in_end_output(cpu) # 0 and 37 and load - - await caravelEnv.release_csb() - await cpu.drive_data2address(reg.get_addr('reg_mprj_datal'),0x0) - await cpu.drive_data2address(reg.get_addr('reg_mprj_datah'),0x0) - - i= 0x20 - for j in range(5): - await cpu.drive_data2address(reg.get_addr('reg_mprj_datah'),i) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,4))} int {caravelEnv.monitor_gpio((37,4)).integer} i = {i}') - if caravelEnv.monitor_gpio((37,4)).integer != i << 28: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,4))} instead of {bin(i << 28)}') - # for k in range(250): - await cpu.drive_data2address(reg.get_addr('reg_mprj_datah'),0) - if caravelEnv.monitor_gpio((37,4)).integer != 0: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,4))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x20 - await ClockCycles(caravelEnv.clk, 1) - - i= 0x80000000 - for j in range(32): - await cpu.drive_data2address(reg.get_addr('reg_mprj_datah'),0x3f) - await cpu.drive_data2address(reg.get_addr('reg_mprj_datal'),i) - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)}') - if caravelEnv.monitor_gpio((31,4)).integer != i>>4 : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,4))} instead of {i>>4}') - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,4))} type {int(caravelEnv.monitor_gpio((37,4)))} i = {i}') - await ClockCycles(caravelEnv.clk, 1) - - # await cpu.drive_data2address(reg.get_addr('reg_mprj_datah'),0x0) - await cpu.drive_data2address(reg.get_addr('reg_mprj_datah'),0x0) - await cpu.drive_data2address(reg.get_addr('reg_mprj_datal'),0x0) - await ClockCycles(caravelEnv.clk, 1) - - if caravelEnv.monitor_gpio((37,4)).integer != 0: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,4))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x80000000 - - - await ClockCycles(caravelEnv.clk, 1000) - - - -@cocotb.test() -@repot_test -async def bitbang_no_cpu_all_i(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=7351) - cpu = RiskV(dut) - cpu.cpu_force_reset() - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_37'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_36'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_35'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_34'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_33'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_32'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_31'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_30'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_29'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_28'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_27'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_26'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_25'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_24'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_23'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_22'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_21'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_20'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_19'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_18'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_17'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_16'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_15'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_14'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_13'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_12'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_11'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_10'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_9'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_8'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_7'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_6'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_5'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_4'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_3'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_2'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_1'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_0'),GPIO_MODE.GPIO_MODE_MGMT_STD_INPUT.value) - - - #Configure all as input except reg_mprj_io_3 - await clear_registers(cpu) - await clock_in_right_i_left_i_standard(cpu,0) # 18 and 19 - await clock_in_right_i_left_i_standard(cpu,0) # 17 and 20 - await clock_in_right_i_left_i_standard(cpu,0) # 16 and 21 - await clock_in_right_i_left_i_standard(cpu,0) # 15 and 22 - await clock_in_right_i_left_i_standard(cpu,0) # 14 and 23 - await clock_in_right_i_left_i_standard(cpu,0) # 13 and 24 - await clock_in_right_i_left_i_standard(cpu,0) # 12 and 25 - await clock_in_right_i_left_i_standard(cpu,0) # 11 and 26 - await clock_in_right_i_left_i_standard(cpu,0) # 10 and 27 - await clock_in_right_i_left_i_standard(cpu,0) # 9 and 28 - await clock_in_right_i_left_i_standard(cpu,0) # 8 and 29 - await clock_in_right_i_left_i_standard(cpu,0) # 7 and 30 - await clock_in_right_i_left_i_standard(cpu,0) # 6 and 31 - await clock_in_right_i_left_i_standard(cpu,0) # 5 and 32 - await clock_in_right_i_left_i_standard(cpu,0) # 4 and 33 - await clock_in_right_i_left_i_standard(cpu,0) # 3 and 34 - await clock_in_right_i_left_i_standard(cpu,0) # 2 and 35 - await clock_in_right_i_left_i_standard(cpu,0) # 1 and 36 - await clock_in_right_i_left_i_standard(cpu,0) # 0 and 37 - await load(cpu) # load - - caravelEnv.drive_gpio_in((31,0),0x8F66FD7B) - await ClockCycles(caravelEnv.clk, 100) - reg_mprj_datal = await cpu.read_address(reg.get_addr('reg_mprj_datal')) - # value_masked = reg_mprj_datal & mask_input - if reg_mprj_datal == 0x8F66FD7B: - cocotb.log.info(f'[TEST] Passed with value 0x8F66FD7B') - else: - cocotb.log.error(f'[TEST] fail with value mprj = {bin(reg_mprj_datal)} instead of {bin(0x8F66FD7B)}') - await ClockCycles(caravelEnv.clk, 100) - await cpu.drive_data2address(reg.get_addr('reg_mprj_datah'),0x1B) - x = caravelEnv.monitor_gpio((37,32)) - print(f"xxxxxxxx {x}") - await ClockCycles(caravelEnv.clk, 100) - - caravelEnv.drive_gpio_in((31,0),0xFFA88C5A) - await ClockCycles(caravelEnv.clk, 100) - reg_mprj_datal = await cpu.read_address(reg.get_addr('reg_mprj_datal')) - # value_masked = reg_mprj_datal & mask_input - if reg_mprj_datal == 0xFFA88C5A: - cocotb.log.info(f'[TEST] Passed with value 0xFFA88C5A') - else: - cocotb.log.error(f'[TEST] fail with value mprj = {bin(reg_mprj_datal)} instead of {bin(0xFFA88C5A)}') - - await cpu.drive_data2address(reg.get_addr('reg_mprj_datah'),0x2B) - await ClockCycles(caravelEnv.clk, 100) - - caravelEnv.drive_gpio_in((31,0),0xC9536346) - await ClockCycles(caravelEnv.clk, 100) - reg_mprj_datal = await cpu.read_address(reg.get_addr('reg_mprj_datal')) - # value_masked = reg_mprj_datal & mask_input - if reg_mprj_datal == 0xC9536346: - cocotb.log.info(f'[TEST] Passed with value 0xC9536346') - else: - cocotb.log.error(f'[TEST] fail with value mprj = {bin(reg_mprj_datal)} instead of {bin(0xC9536346)}') - await cpu.drive_data2address(reg.get_addr('reg_mprj_datah'),0x3B) - await ClockCycles(caravelEnv.clk, 100) - - - - -"""Testbench of GPIO configuration through bit-bang method using the housekeeping SPI.""" -@cocotb.test() -@repot_test -async def io_ports(dut): - caravelEnv,clock = await test_configure(dut) - cpu = RiskV(dut) - cpu.cpu_force_reset() - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_0'),GPIO_MODE.GPIO_MODE_USER_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_1'),GPIO_MODE.GPIO_MODE_USER_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_2'),GPIO_MODE.GPIO_MODE_USER_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_3'),GPIO_MODE.GPIO_MODE_USER_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_4'),GPIO_MODE.GPIO_MODE_USER_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_5'),GPIO_MODE.GPIO_MODE_USER_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_6'),GPIO_MODE.GPIO_MODE_USER_STD_OUTPUT.value) - await cpu.drive_data2address(reg.get_addr('reg_mprj_io_7'),GPIO_MODE.GPIO_MODE_USER_STD_OUTPUT.value) - - # Apply configuration - await cpu.drive_data2address(reg.get_addr('reg_mprj_xfer'),1) - - while True: - if await cpu.read_address(reg.get_addr('reg_mprj_xfer')) != 1 : - break diff --git a/verilog/dv/cocotb/tests/bitbang/bitbang_tests_cpu.py b/verilog/dv/cocotb/tests/bitbang/bitbang_tests_cpu.py deleted file mode 100644 index a0b1b6b7..00000000 --- a/verilog/dv/cocotb/tests/bitbang/bitbang_tests_cpu.py +++ /dev/null @@ -1,415 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from interfaces.common import Macros - -reg = Regs() - -@cocotb.test() -@repot_test -async def bitbang_cpu_all_o(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1842534) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - - await wait_reg1(cpu,caravelEnv,0xFF) - await caravelEnv.release_csb() - cocotb.log.info("[TEST] finish configuring using bitbang") - i= 0x20 - for j in range(5): - await wait_reg2(cpu,caravelEnv,37-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,0)).integer != i<<32: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {bin(i<<32)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - i = i >> 1 - i |= 0x20 - - i= 0x80000000 - for j in range(32): - await wait_reg2(cpu,caravelEnv,32-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') - if caravelEnv.monitor_gpio((31,0)).integer != i : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {bin(i)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x80000000 - - - await ClockCycles(caravelEnv.clk, 10) - - -@cocotb.test() -@repot_test -async def bitbang_cpu_all_10(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1452270) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - await wait_reg1(cpu,caravelEnv,0xFF) - gpios_l = ("gpio_control_bidir_1[0]","gpio_control_bidir_1[1]","gpio_control_in_1a[0]","gpio_control_in_1a[1]","gpio_control_in_1a[2]","gpio_control_in_1a[3]","gpio_control_in_1a[4]","gpio_control_in_1a[5]","gpio_control_in_1[0]","gpio_control_in_1[1]","gpio_control_in_1[2]","gpio_control_in_1[3]","gpio_control_in_1[4]","gpio_control_in_1[5]","gpio_control_in_1[6]","gpio_control_in_1[7]","gpio_control_in_1[8]","gpio_control_in_1[9]","gpio_control_in_1[10]") - if Macros['CARAVAN']: - gpios_l = ("gpio_control_bidir_1[0]","gpio_control_bidir_1[1]","gpio_control_in_1a[0]","gpio_control_in_1a[1]","gpio_control_in_1a[2]","gpio_control_in_1a[3]","gpio_control_in_1a[4]","gpio_control_in_1a[5]","gpio_control_in_1[0]","gpio_control_in_1[1]","gpio_control_in_1[2]","gpio_control_in_1[3]","gpio_control_in_1[4]","gpio_control_in_1[5]") - - gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_in_2[10]","gpio_control_in_2[11]","gpio_control_in_2[12]","gpio_control_in_2[13]","gpio_control_in_2[14]","gpio_control_in_2[15]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]") - if Macros['CARAVAN']: - gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]") - - type = True # type of shifting 01 or 10 - for gpio in gpios_l: - if not Macros['GL']: - shift(uut._id(gpio,False),type) - else: - shift(uut._id(f'\\{gpio} ',False),type) - type = not type - type = True # type of shifting 01 or 10 - for gpio in reversed(gpios_h): - if not Macros['GL']: - shift(uut._id(gpio,False),type) - else: - shift(uut._id(f'\\{gpio} ',False),type) - type = not type - - -def shift(gpio,shift_type): - if shift_type: - bits = "0101010101010" - else: - bits = "1010101010101" - fail = False - if not Macros['GL']: - cocotb.log.info(f"[TEST] gpio {gpio} shift {gpio._id(f'shift_register',False).value} expected {bits}") - for i in range(13): - if not Macros['GL']: - shift_register = gpio._id(f"shift_register",False).value.binstr[i] - else: - shift_register = gpio._id(f"\\shift_register[{i}] ",False).value.binstr - if shift_register != bits[i]: - fail = True - cocotb.log.error(f"[TEST] wrong shift register {i} in {gpio}") - if not fail: - cocotb.log.info(f"[TEST] gpio {gpio} passed") - -@cocotb.test() -@repot_test -async def bitbang_cpu_all_01(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1452269) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - await wait_reg1(cpu,caravelEnv,0xFF) - gpios_l = ("gpio_control_bidir_1[0]","gpio_control_bidir_1[1]","gpio_control_in_1a[0]","gpio_control_in_1a[1]","gpio_control_in_1a[2]","gpio_control_in_1a[3]","gpio_control_in_1a[4]","gpio_control_in_1a[5]","gpio_control_in_1[0]","gpio_control_in_1[1]","gpio_control_in_1[2]","gpio_control_in_1[3]","gpio_control_in_1[4]","gpio_control_in_1[5]","gpio_control_in_1[6]","gpio_control_in_1[7]","gpio_control_in_1[8]","gpio_control_in_1[9]","gpio_control_in_1[10]") - if Macros['CARAVAN']: - gpios_l = ("gpio_control_bidir_1[0]","gpio_control_bidir_1[1]","gpio_control_in_1a[0]","gpio_control_in_1a[1]","gpio_control_in_1a[2]","gpio_control_in_1a[3]","gpio_control_in_1a[4]","gpio_control_in_1a[5]","gpio_control_in_1[0]","gpio_control_in_1[1]","gpio_control_in_1[2]","gpio_control_in_1[3]","gpio_control_in_1[4]","gpio_control_in_1[5]") - - gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_in_2[10]","gpio_control_in_2[11]","gpio_control_in_2[12]","gpio_control_in_2[13]","gpio_control_in_2[14]","gpio_control_in_2[15]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]") - if Macros['CARAVAN']: - gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]") - - type = False # type of shifting 01 or 10 - for gpio in gpios_l: - if not Macros['GL']: - shift(uut._id(gpio,False),type) - else: - shift(uut._id(f'\\{gpio} ',False),type) - type = not type - type = False # type of shifting 01 or 10 - for gpio in reversed(gpios_h): - if not Macros['GL']: - shift(uut._id(gpio,False),type) - else: - shift(uut._id(f'\\{gpio} ',False),type) - type = not type - -@cocotb.test() -@repot_test -async def bitbang_cpu_all_0011(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1402860) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - await wait_reg1(cpu,caravelEnv,0xFF) - gpios_l = ("gpio_control_bidir_1[0]","gpio_control_bidir_1[1]","gpio_control_in_1a[0]","gpio_control_in_1a[1]","gpio_control_in_1a[2]","gpio_control_in_1a[3]","gpio_control_in_1a[4]","gpio_control_in_1a[5]","gpio_control_in_1[0]","gpio_control_in_1[1]","gpio_control_in_1[2]","gpio_control_in_1[3]","gpio_control_in_1[4]","gpio_control_in_1[5]","gpio_control_in_1[6]","gpio_control_in_1[7]","gpio_control_in_1[8]","gpio_control_in_1[9]","gpio_control_in_1[10]") - if Macros['CARAVAN']: - gpios_l = ("gpio_control_bidir_1[0]","gpio_control_bidir_1[1]","gpio_control_in_1a[0]","gpio_control_in_1a[1]","gpio_control_in_1a[2]","gpio_control_in_1a[3]","gpio_control_in_1a[4]","gpio_control_in_1a[5]","gpio_control_in_1[0]","gpio_control_in_1[1]","gpio_control_in_1[2]","gpio_control_in_1[3]","gpio_control_in_1[4]","gpio_control_in_1[5]") - - gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_in_2[10]","gpio_control_in_2[11]","gpio_control_in_2[12]","gpio_control_in_2[13]","gpio_control_in_2[14]","gpio_control_in_2[15]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]") - if Macros['CARAVAN']: - gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]") - - type = 2 # type of shifting 01 or 10 - for gpio in gpios_l: - if not Macros['GL']: - shift_2(uut._id(gpio,False),type) - else: - shift_2(uut._id(f'\\{gpio} ',False),type) - type = (type + 1) %4 - type = 2 # type of shifting 01 or 10 - for gpio in reversed(gpios_h): - if not Macros['GL']: - shift_2(uut._id(gpio,False),type) - else: - shift_2(uut._id(f'\\{gpio} ',False),type) - type = (type + 1) %4 - -@cocotb.test() -@repot_test -async def bitbang_cpu_all_1100(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1402426) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - await wait_reg1(cpu,caravelEnv,0xFF) - gpios_l = ("gpio_control_bidir_1[0]","gpio_control_bidir_1[1]","gpio_control_in_1a[0]","gpio_control_in_1a[1]","gpio_control_in_1a[2]","gpio_control_in_1a[3]","gpio_control_in_1a[4]","gpio_control_in_1a[5]","gpio_control_in_1[0]","gpio_control_in_1[1]","gpio_control_in_1[2]","gpio_control_in_1[3]","gpio_control_in_1[4]","gpio_control_in_1[5]","gpio_control_in_1[6]","gpio_control_in_1[7]","gpio_control_in_1[8]","gpio_control_in_1[9]","gpio_control_in_1[10]") - if Macros['CARAVAN']: - gpios_l = ("gpio_control_bidir_1[0]","gpio_control_bidir_1[1]","gpio_control_in_1a[0]","gpio_control_in_1a[1]","gpio_control_in_1a[2]","gpio_control_in_1a[3]","gpio_control_in_1a[4]","gpio_control_in_1a[5]","gpio_control_in_1[0]","gpio_control_in_1[1]","gpio_control_in_1[2]","gpio_control_in_1[3]","gpio_control_in_1[4]","gpio_control_in_1[5]") - - gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_in_2[10]","gpio_control_in_2[11]","gpio_control_in_2[12]","gpio_control_in_2[13]","gpio_control_in_2[14]","gpio_control_in_2[15]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]") - if Macros['CARAVAN']: - gpios_h= ("gpio_control_in_2[0]","gpio_control_in_2[1]","gpio_control_in_2[2]","gpio_control_in_2[3]","gpio_control_in_2[4]","gpio_control_in_2[5]","gpio_control_in_2[6]","gpio_control_in_2[7]","gpio_control_in_2[8]","gpio_control_in_2[9]","gpio_control_bidir_2[0]","gpio_control_bidir_2[1]","gpio_control_bidir_2[2]") - type = 0 # type of shifting 01 or 10 - for gpio in gpios_l: - if not Macros['GL']: - shift_2(uut._id(gpio,False),type) - else: - shift_2(uut._id(f'\\{gpio} ',False),type) - type = (type + 1) %4 - type = 0 # type of shifting 01 or 10 - for gpio in reversed(gpios_h): - if not Macros['GL']: - shift_2(uut._id(gpio,False),type) - else: - shift_2(uut._id(f'\\{gpio} ',False),type) - type = (type + 1) %4 - -def shift_2(gpio,shift_type): - if shift_type == 0: - bits = "0011001100110" - elif shift_type == 1: - bits = "0110011001100" - elif shift_type == 2: - bits = "1100110011001" - elif shift_type == 3: - bits = "1001100110011" - fail = False - if not Macros['GL']: - cocotb.log.info(f"[TEST] gpio {gpio} shift {gpio._id(f'shift_register',False).value.binstr[::-1]} expected {bits}") - else : - shift_reg ='' - for i in range(13): - shift_reg += gpio._id(f"\\shift_register[{i}] ",False).value.binstr - cocotb.log.info(f"[TEST] gpio {gpio} shift {shift_reg} expected {bits}") - for i in range(13): - if not Macros['GL']: - shift_register = gpio._id(f"shift_register",False).value.binstr[12-i] - else: - shift_register = gpio._id(f"\\shift_register[{i}] ",False).value.binstr - if shift_register != bits[i]: - fail = True - cocotb.log.error(f"[TEST] wrong shift register {i} in {gpio}") - if not fail: - cocotb.log.info(f"[TEST] gpio {gpio} passed") - - -@cocotb.test() -@repot_test -async def bitbang_cpu_all_i(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1641382) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - await wait_reg1(cpu,caravelEnv,0xAA) - cocotb.log.info(f"[TEST] configuration finished") - data_in = 0x8F66FD7B - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xBB) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") - data_in = 0xFFA88C5A - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xCC) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") - data_in = 0xC9536346 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xD1) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") - data_in = 0x3F - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD2) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[37:32]") - data_in = 0x0 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD3) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[37:32]") - data_in = 0x15 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD4) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[37:32]") - data_in = 0x2A - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - - await wait_reg2(cpu,caravelEnv,0xFF) - cocotb.log.info(f"[TEST] finish") - - - -"""Testbench of GPIO configuration through bit-bang method using the housekeeping SPI configure all gpio as output.""" -@cocotb.test() -@repot_test -async def bitbang_spi_o(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=294252) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - - await wait_reg1(cpu,caravelEnv,0xFF) # wait for housekeeping registers configured - #Configure all as output except reg_mprj_io_3 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 18 and 19 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 17 and 20 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 16 and 21 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 15 and 22 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 14 and 23 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 13 and 24 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 12 and 25 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 11 and 26 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 10 and 27 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 9 and 28 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 8 and 29 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 7 and 30 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 6 and 31 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 5 and 32 - await clock_in_right_o_left_i_standard_spi(caravelEnv,0) # 4 and 33 - await clock_in_right_o_left_i_standard_spi(caravelEnv,0) # 3 and 34 - await clock_in_right_o_left_i_standard_spi(caravelEnv,0) # 2 and 35 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 1 and 36 - await clock_in_right_o_left_o_standard_spi(caravelEnv,0) # 0 and 37 - await load_spi(caravelEnv) # load - - cpu.write_debug_reg2_backdoor(0xFF) - cocotb.log.info("[TEST] finish configuring using bitbang") - i= 0x20 - for j in range(5): - await wait_reg2(cpu,caravelEnv,37-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,5))} j = {j}') - if caravelEnv.monitor_gpio((37,5)).integer != i << 27: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,5))} instead of {bin(i << 28)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,5)).integer != 0: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,5))} instead of {bin(0x00000)}') - i = i >> 1 - i |= 0x20 - - i= 0x80000000 - for j in range(32): - await wait_reg2(cpu,caravelEnv,32-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,5))} j = {j}') - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') - if caravelEnv.monitor_gpio((31,5)).integer != i>>5 : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,4))} instead of {bin(i>>4)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,5)).integer != 0: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,5))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x80000000 - - - await ClockCycles(caravelEnv.clk, 10) - - -"""Testbench of GPIO configuration through bit-bang method using the housekeeping SPI configure all gpio as input.""" -@cocotb.test() -@repot_test -async def bitbang_spi_i(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=55417) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - - await wait_reg1(cpu,caravelEnv,0xFF) # wait for housekeeping registers configured - #Configure all as output except reg_mprj_io_3 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 18 and 19 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 17 and 20 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 16 and 21 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 15 and 22 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 14 and 23 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 13 and 24 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 12 and 25 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 11 and 26 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 10 and 27 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 9 and 28 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 8 and 29 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 7 and 30 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 6 and 31 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 5 and 32 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 4 and 33 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 3 and 34 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 2 and 35 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 1 and 36 - await clock_in_right_i_left_i_standard_spi(caravelEnv,0) # 0 and 37 - await load_spi(caravelEnv) # load - cpu.write_debug_reg2_backdoor(0xDD) - await wait_reg1(cpu,caravelEnv,0xAA) - cocotb.log.info(f"[TEST] configuration finished") - data_in = 0x8F66FD7B - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xBB) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") - data_in = 0xFFA88C5A - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xCC) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") - data_in = 0xC9536346 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xD1) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[31:0]") - data_in = 0x3F - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD2) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[37:32]") - data_in = 0x0 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD3) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[37:32]") - data_in = 0x15 - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD4) - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully to gpio[37:32]") - data_in = 0x2A - cocotb.log.info(f"[TEST] send {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg2(cpu,caravelEnv,0xFF) - cocotb.log.info(f"[TEST] finish") \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/common_functions/Timeout.py b/verilog/dv/cocotb/tests/common_functions/Timeout.py deleted file mode 100644 index beea7307..00000000 --- a/verilog/dv/cocotb/tests/common_functions/Timeout.py +++ /dev/null @@ -1,32 +0,0 @@ - -# from turtle import st -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from cocotb.result import SimTimeoutError -import cocotb -import time -"""class to handle timeout inside the tests. after the provided number of cycles (cycle_num) are exceeded test would fail - precision would determine when to log timeout warning for example if cycle_num=1000 and percision = 10% so after each 1000*10% = 100 cycle log would be printed -""" -class Timeout: - def __init__(self,clk,cycle_num,precision=0.20): - self.clk = clk - self.cycle_num = cycle_num - self.cycle_precision = precision * cycle_num - cocotb.scheduler.add(self._timeout_check()) - - - async def _timeout_check(self): - number_of_cycles = 0 - for i in range(0,self.cycle_num): - await ClockCycles(self.clk,1) - number_of_cycles +=1 - if number_of_cycles %self.cycle_precision ==0: - cocotb.log.warning(f"simulation are only {self.cycle_num-number_of_cycles} cycles away from TIMEOUT ") - - raise SimTimeoutError(f"simulation exceeds the max number of cycles {self.cycle_num}") - - pass - - - diff --git a/verilog/dv/cocotb/tests/common_functions/test_functions.py b/verilog/dv/cocotb/tests/common_functions/test_functions.py deleted file mode 100644 index 8fcdb40c..00000000 --- a/verilog/dv/cocotb/tests/common_functions/test_functions.py +++ /dev/null @@ -1,95 +0,0 @@ - -import random -import cocotb -from cocotb.clock import Clock -import cocotb.log -import interfaces.caravel as caravel -from interfaces.logic_analyzer import LA -from wb_models.housekeepingWB.housekeepingWB import HK_whiteBox -import interfaces.common as common -import logging -from interfaces.cpu import RiskV -from cocotb.log import SimTimeContextFilter -from cocotb.log import SimLogFormatter -from tests.common_functions.Timeout import Timeout -import os -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles - -"""configure the test log file location and log verbosity - configure the test clock - configure the test timeout - configure whitbox models - start up the test connecting power vdd to the design then reset and disable the CSB bit - return the caravel environmnet with clock and start up -""" -async def test_configure(dut,timeout_cycles=1000000,clk=25,timeout_precision=0.2,num_error=3): - caravelEnv = caravel.Caravel_env(dut) - Timeout(caravelEnv.clk,timeout_cycles,timeout_precision) - if os.getenv('ERRORMAX') != 'None': - num_error = int(os.getenv('ERRORMAX')) - cocotb.scheduler.add(max_num_error(num_error,caravelEnv.clk)) - clock = Clock(caravelEnv.clk, clk, units="ns") # Create a 10ns period clock on port clk - cocotb.start_soon(clock.start()) # Start the clock - await caravelEnv.start_up() - await ClockCycles(caravelEnv.clk, 10) - # HK_whiteBox(dut) - return caravelEnv,clock - -class CallCounted: - """Decorator to determine number of calls for a method""" - - def __init__(self,method): - self.method=method - self.counter=0 - - def __call__(self,*args,**kwargs): - self.counter+=1 - return self.method(*args,**kwargs) - - -def repot_test(func): - async def wrapper_func(*args, **kwargs): - ## configure logging - COCOTB_ANSI_OUTPUT=0 - - TestName = func.__name__ - cocotb.log.setLevel(logging.INFO) - cocotb.log.error = CallCounted(cocotb.log.error) - cocotb.log.critical = CallCounted(cocotb.log.critical) - cocotb.log.warning = CallCounted(cocotb.log.warning) - handler = logging.FileHandler(f"sim/{os.getenv('RUNTAG')}/{os.getenv('TESTFULLNAME')}/{TestName}.log",mode='w') - handler.addFilter(SimTimeContextFilter()) - handler.setFormatter(SimLogFormatter()) - cocotb.log.addHandler(handler) - ## call test - await func(*args, **kwargs) - ## report after finish simulation - msg = f'with ({cocotb.log.critical.counter})criticals ({cocotb.log.error.counter})errors ({cocotb.log.warning.counter})warnings ' - if cocotb.log.error.counter > 0 or cocotb.log.critical.counter >0: - raise cocotb.result.TestComplete(f'Test failed {msg}') - else: - raise cocotb.result.TestComplete(f'Test passed {msg}') - return retval - return wrapper_func - -async def max_num_error(num_error,clk): - while True: - await ClockCycles(clk,1) - if cocotb.log.error.counter + cocotb.log.critical.counter > num_error: - msg = f'Test failed with max number of errors {num_error} ({cocotb.log.critical.counter})criticals ({cocotb.log.error.counter})errors ({cocotb.log.warning.counter})warnings ' - raise cocotb.result.TestFailure(msg) - - -async def wait_reg1(cpu,caravelEnv,data): - while (True): - if cpu.read_debug_reg1() == data: - return - await ClockCycles(caravelEnv.clk,10) - - -async def wait_reg2(cpu,caravelEnv,data): - while (True): - if cpu.read_debug_reg2() == data: - return - await ClockCycles(caravelEnv.clk,10) - \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/cpu/cpu_reset.c b/verilog/dv/cocotb/tests/cpu/cpu_reset.c deleted file mode 100644 index cd6279c1..00000000 --- a/verilog/dv/cocotb/tests/cpu/cpu_reset.c +++ /dev/null @@ -1,18 +0,0 @@ -#include -#include - -// Empty C code - -void main() -{ - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_1 = 0x1; - reg_debug_1 = 0x2; - reg_debug_1 = 0x3; - reg_debug_1 = 0x4; - reg_debug_1 = 0x5; - while(reg_debug_2 == 0x0); - reg_hkspi_reset = 1; - -} diff --git a/verilog/dv/cocotb/tests/cpu/cpu_reset.py b/verilog/dv/cocotb/tests/cpu/cpu_reset.py deleted file mode 100644 index fbcb59a1..00000000 --- a/verilog/dv/cocotb/tests/cpu/cpu_reset.py +++ /dev/null @@ -1,67 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from tests.housekeeping.housekeeping_spi.spi_access_functions import * - -reg = Regs() -@cocotb.test() -@repot_test -async def cpu_reset(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=34823) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start cpu_reset test") - # wait for CPU to write 5 at debug_reg1 - while True: - if cpu.read_debug_reg1() == 5: - cocotb.log.info("[TEST] debug reg 1 = 5" ) - break - await ClockCycles(caravelEnv.clk,1) - - # put the cpu under reset using spi - cocotb.log.info("[TEST] asserting cpu reset register using SPI") - await write_reg_spi(caravelEnv,0xb,1) - - await ClockCycles(caravelEnv.clk,1000) - if cpu.read_debug_reg1() == 0: - cocotb.log.info("[TEST] asserting cpu reset register using SPI successfully rest the cpu") - else: - cocotb.log.error("[TEST] asserting cpu reset register using SPI successfully doesn't rest the cpu") - - cocotb.log.info("[TEST] deasserting cpu reset register using SPI") - await write_reg_spi(caravelEnv,0xb,0) - watchdog = 12000 - while True: - if cpu.read_debug_reg1() == 5: - cocotb.log.info("[TEST] deasserting cpu reset register using SPI wakes the cpu up" ) - break - watchdog -=1 - if watchdog <0: - cocotb.log.error("[TEST] deasserting cpu reset register using SPI doesn't wake the cpu up" ) - break - - await ClockCycles(caravelEnv.clk,1) - - cocotb.log.info("[TEST] asserting cpu reset register using firmware") - cpu.write_debug_reg2_backdoor(0xAA) - await ClockCycles(caravelEnv.clk,10000) - - watchdog = 8000 - while True: - if cpu.read_debug_reg1() == 0: - cocotb.log.info("[TEST] asserting cpu reset register using firmware successfully rest the cpu" ) - break - watchdog -=1 - if watchdog <0: - cocotb.log.error("[TEST] asserting cpu reset register using firmware successfully doesn't rest the cpu" ) - break - - await ClockCycles(caravelEnv.clk,100) diff --git a/verilog/dv/cocotb/tests/cpu/cpu_stress.c b/verilog/dv/cocotb/tests/cpu/cpu_stress.c deleted file mode 100644 index c7cc56b9..00000000 --- a/verilog/dv/cocotb/tests/cpu/cpu_stress.c +++ /dev/null @@ -1,156 +0,0 @@ -#include - -int A[]={1, 40, 2, 5, 22, 11, 90, 200, 10, 20, 25}; - -// int factorial(int n) { -// int fac=1; -// for(int i=1; i<=n;++i){ -// fac = fac * i; -// } -// return fac; -// } - -int fibbonacci(int n) { - if(n == 0){ - return 0; - } else if(n == 1) { - return 1; - } else { - return (fibbonacci(n-1) + fibbonacci(n-2)); - } -} - -void recursiveInsertionSort(int arr[], int n){ - if (n <= 1) - return; - recursiveInsertionSort( arr, n-1 ); - int nth = arr[n-1]; - int j = n-2; - while (j >= 0 && arr[j] > nth){ - arr[j+1] = arr[j]; - j--; - } - arr[j+1] = nth; -} - - -void quick_sort(int number[],int first,int last){ - int i, j, pivot, temp; - - if(firstnumber[pivot]) - j--; - if(i 0: - cocotb.log.error(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - else: - cocotb.log.info(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") diff --git a/verilog/dv/cocotb/tests/debug/debug.c b/verilog/dv/cocotb/tests/debug/debug.c deleted file mode 100644 index 33ed397e..00000000 --- a/verilog/dv/cocotb/tests/debug/debug.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include - -// -------------------------------------------------------- - -void main() -{ - int j; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - - // Now, apply the configuration - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - (*(volatile uint32_t*) CSR_DEBUG_MODE_OUT_ADDR ) = 1; // enable debug mode - - // start of the test - reg_debug_1 = 0xAA; - - // very long wait - for (j = 0; j < 1600; j++); - for (j = 0; j < 1600; j++); - for (j = 0; j < 1600; j++); - - -} diff --git a/verilog/dv/cocotb/tests/debug/debug.py b/verilog/dv/cocotb/tests/debug/debug.py deleted file mode 100644 index 32d25158..00000000 --- a/verilog/dv/cocotb/tests/debug/debug.py +++ /dev/null @@ -1,110 +0,0 @@ -from curses import baudrate -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles,Timer,Edge -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from interfaces.common import Macros - - -bit_time_ns = 0 -reg = Regs() - - -@cocotb.test() -@repot_test -async def debug(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=31011) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - # calculate bit time - clk = clock.period/1000 - global bit_time_ns - bit_time_ns = round(10**5 * clk / (1152)) - cocotb.log.info(f"[TEST] bit time in nano second = {bit_time_ns}") - caravelEnv.drive_gpio_in((0,0),1) # IO[0] affects the uart selecting btw system and debug - caravelEnv.drive_gpio_in((5,5),1) - # wait for start of sending - await wait_reg1(cpu,caravelEnv,0XAA) - # caravelEnv.drive_gpio_in((0,0),1) # IO[0] affects the uart selecting btw system and debug - cocotb.log.info(f"[TEST] Start debug test") - # send random data to address 30'h00400024 and expect to recieve the same data back it back - dff_address = random.randint(0x00000400, 0x00000600) & 0xFFFFFFFC - data = random.getrandbits(32) - address = dff_address >>2 # address has to be shifted - # data = 0xFFFFFFF0 - cocotb.log.info (f"[TEST] Executing DFF2 write address={hex(dff_address)} data = {hex(data)}") - await wb_write(caravelEnv,address,data) - receieved_data = await wb_read(caravelEnv,address) - if data != receieved_data: - cocotb.log.error(f"[TEST] DFF2 reading failed from address {hex(address)} expected data = {hex(data)} recieved data = {hex(receieved_data)}") - else: - cocotb.log.info(f"[TEST] PASS: DFF2 reading right value {hex(data)} from {hex(address)} ") - - -async def start_of_tx(caravelEnv): - while (True): # wait for the start of the transimission it 1 then 0 - if (caravelEnv.monitor_gpio((6,6)).integer == 0): - break - await Timer(bit_time_ns, units='ns') - await Timer(bit_time_ns, units='ns') - -async def uart_send_char(caravelEnv,char): - cocotb.log.info (f"[uart_send_char] start sending on uart {char}") - #send start bit - caravelEnv.drive_gpio_in((5,5),0) - await Timer(bit_time_ns, units='ns') - #send bits - for i in range(8): - caravelEnv.drive_gpio_in((5,5),char[i]) - await Timer(bit_time_ns, units='ns') - - # stop of frame - caravelEnv.drive_gpio_in((5,5),1) - await Timer(bit_time_ns, units='ns') - -async def uart_get_char(caravelEnv): - await start_of_tx(caravelEnv) - char = '' - for i in range (8): - char = caravelEnv.monitor_gpio((6,6)).binstr + char - await Timer(bit_time_ns, units='ns') - cocotb.log.info (f"[uart_get_char] recieving {char} from uart") - - return char - -async def wb_write(caravelEnv,addr,data): - addr_bits = bin(addr)[2:].zfill(32)[::-1] - data_bits = bin(data)[2:].zfill(32)[::-1] - cocotb.log.debug(f"[TEST] address bits = {addr_bits} {type(addr_bits)}") - await uart_send_char(caravelEnv, '10000000') # write cmd - await uart_send_char(caravelEnv, '10000000') # size - await uart_send_char(caravelEnv, addr_bits[24:32]) - await uart_send_char(caravelEnv, addr_bits[16:24]) - await uart_send_char(caravelEnv, addr_bits[8:16]) - await uart_send_char(caravelEnv, addr_bits[0:8]) - await uart_send_char(caravelEnv, data_bits[24:32]) - await uart_send_char(caravelEnv, data_bits[16:24]) - await uart_send_char(caravelEnv, data_bits[8:16]) - await uart_send_char(caravelEnv, data_bits[0:8]) - - -async def wb_read(caravelEnv,addr): - addr_bits = bin(addr)[2:].zfill(32)[::-1] - await uart_send_char(caravelEnv, '01000000') # read cmd - await uart_send_char(caravelEnv, '10000000') # size - await uart_send_char(caravelEnv, addr_bits[24:32]) - await uart_send_char(caravelEnv, addr_bits[16:24]) - await uart_send_char(caravelEnv, addr_bits[8:16]) - await uart_send_char(caravelEnv, addr_bits[0:8]) - data_bits = await uart_get_char(caravelEnv) - data_bits += await uart_get_char(caravelEnv) - data_bits += await uart_get_char(caravelEnv) - data_bits += await uart_get_char(caravelEnv) - return int(data_bits,2) diff --git a/verilog/dv/cocotb/tests/gpio/gpio.py b/verilog/dv/cocotb/tests/gpio/gpio.py deleted file mode 100644 index 73eb0f88..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio.py +++ /dev/null @@ -1,458 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from cocotb.binary import BinaryValue - -reg = Regs() - -@cocotb.test() -@repot_test -async def gpio_all_o(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=538624) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - cocotb.log.info("[TEST] finish configuring ") - i= 0x20 - for j in range(5): - await wait_reg2(cpu,caravelEnv,37-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,0)).integer != i<<32: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {bin(i<<32)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - i = i >> 1 - i |= 0x20 - - i= 0x80000000 - for j in range(32): - await wait_reg2(cpu,caravelEnv,32-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') - if caravelEnv.monitor_gpio((31,0)).integer != i : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {bin(i)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x80000000 - - await wait_reg1(cpu,caravelEnv,0XBB) - data_in = 0x8F66FD7B - cocotb.log.info(f"[TEST] try drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - reg2 =0 - await wait_reg1(cpu,caravelEnv,0XFF) - try: - reg2 =cpu.read_debug_reg2() - if reg2 == data_in: - cocotb.log.error(f"[TEST] Error: data {hex(data_in)} driven on gpio[31:0] is seen by firmware while gpios are configured as output") - else: - cocotb.log.info(f"[TEST] driven data {hex(data_in)} sent can't be sent to gpio[31:0] when it configure as output it can see {reg2}") - except Exception as e: - cocotb.log.info(f"[TEST] driven data {hex(data_in)} sent can't be sent to gpio[31:0] when it configure as output") - return - - - await ClockCycles(caravelEnv.clk, 10) - - - -@cocotb.test() -@repot_test -async def gpio_all_i(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=56837) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - await wait_reg1(cpu,caravelEnv,0xAA) - cocotb.log.info(f"[TEST] configuration finished") - data_in = 0xFFFFFFFF - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xBB) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xAAAAAAAA - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xCC) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x55555555 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xDD) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xD1) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x3F - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD2) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD3) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x15 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD4) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x2A - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0XD5) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - caravelEnv.release_gpio((37,0)) - await wait_reg2(cpu,caravelEnv,0XFF) - if caravelEnv.monitor_gpio((37,0)).binstr != "zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz": - cocotb.log.error(f"[TEST] ERROR: firmware can write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") - else: - cocotb.log.info(f"[TEST] [TEST] PASS: firmware cannot write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") - cocotb.log.info(f"[TEST] finish") - - -@cocotb.test() -@repot_test -async def gpio_all_i_pu(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=54138,num_error=2000) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - # monitor the output of padframe module it suppose to be all ones when no input is applied - await ClockCycles(caravelEnv.clk,100) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and float") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with zero - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with ones - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with 1") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with zeros and float other half - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==1: #odd - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 0") - else: - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with odd half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==1: #odd - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with even half with 0") - else: - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with ones and float other half - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 1") - - await ClockCycles(caravelEnv.clk,1000) - - # drive with zeros then release all gpio - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - caravelEnv.release_gpio((37,0)) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and all released") - await ClockCycles(caravelEnv.clk,1000) - - -@cocotb.test() -@repot_test -async def gpio_all_i_pd(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=54138,num_error=2000) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - # monitor the output of padframe module it suppose to be all ones when no input is applied - await ClockCycles(caravelEnv.clk,100) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and float") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with zero - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with ones - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with 1") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with zeros and float other half - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i]!="0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 0") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i]!="0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with even half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with ones and float other half - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==0: #even - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1") - else: - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==1: #odd - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1") - else: - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - - # drive with ones then release all gpio - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - caravelEnv.release_gpio((37,0)) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and all released") - await ClockCycles(caravelEnv.clk,1000) - -@cocotb.test() -@repot_test -async def gpio_all_bidir(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1144980) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - await wait_reg1(cpu,caravelEnv,0x1A) - await caravelEnv.release_csb() - cocotb.log.info("[TEST] finish configuring ") - i= 0x20 - for j in range(5): - await wait_reg2(cpu,caravelEnv,37-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,0)).integer != i << 32: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {bin(i << 32)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - i = i >> 1 - i |= 0x20 - - i= 0x80000000 - for j in range(32): - await wait_reg2(cpu,caravelEnv,32-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') - if caravelEnv.monitor_gpio((31,0)).integer != i : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {bin(i)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x80000000 - - await wait_reg1(cpu,caravelEnv,0x2A) - cocotb.log.info(f"[TEST] configuration finished") - data_in = 0x8F66FD7B - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xBB) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xFFA88C5A - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xCC) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xC9536346 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xD1) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xC9536346 - data_in = 0x3F - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD2) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xC9536346 - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD3) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xC9536346 - data_in = 0x15 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD4) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xC9536346 - data_in = 0x2A - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg2(cpu,caravelEnv,0xFF) - cocotb.log.info(f"[TEST] finish") - - await ClockCycles(caravelEnv.clk, 10) diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_bidir.c b/verilog/dv/cocotb/tests/gpio/gpio_all_bidir.c deleted file mode 100644 index a6280785..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_bidir.c +++ /dev/null @@ -1,98 +0,0 @@ -#include -#include - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - reg_debug_1 = 0x1A; // try the gpios as output - reg_mprj_datal = 0x0; - reg_mprj_datah = 0x0; - i = 0x20; - for (j = 0; j < 5; j++) { - reg_mprj_datah = i; - reg_debug_2 = 37-j; - reg_mprj_datah = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x20; - } - i = 0x80000000; - for (j = 0; j < 32; j++) { - reg_mprj_datah = 0x3f; - reg_mprj_datal = i; - reg_debug_2 = 32-j; - reg_mprj_datah = 0x00; - reg_mprj_datal = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x80000000; - } - // test input - reg_debug_1 = 0X2A; // configuration done wait environment to send 0x8F66FD7B to reg_mprj_datal - while (reg_mprj_datal != 0x8F66FD7B); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XBB; // configuration done wait environment to send 0xFFA88C5A to reg_mprj_datal - while (reg_mprj_datal != 0xFFA88C5A); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XCC; // configuration done wait environment to send 0xC9536346 to reg_mprj_datal - while (reg_mprj_datal != 0xC9536346); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XD1; - while (reg_mprj_datah != 0x3F); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XD2; - while (reg_mprj_datah != 0x0); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XD3; - while (reg_mprj_datah != 0x15); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XD4; - while (reg_mprj_datah != 0x2A); - - reg_debug_2=0xFF; -} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_bidir_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_bidir_user.c deleted file mode 100644 index 19c85ad3..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_bidir_user.c +++ /dev/null @@ -1,115 +0,0 @@ -#include -#include - -#define reg_mprj_userl (*(volatile uint32_t*)0x300FFFF0) -#define reg_mprj_userh (*(volatile uint32_t*)0x300FFFF4) -#define reg_oeb_userl (*(volatile uint32_t*)0x300FFFEC) -#define reg_oeb_userh (*(volatile uint32_t*)0x300FFFE8) - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - - reg_mprj_io_37 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_36 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_35 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_34 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_33 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_32 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_31 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_30 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_29 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_28 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_27 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_26 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_25 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_24 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_23 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_22 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_21 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_20 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_19 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_18 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_17 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_16 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_15 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_14 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_13 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_12 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_11 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_10 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_9 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_8 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_7 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_6 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_5 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_4 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_3 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_2 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_1 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - reg_mprj_io_0 = GPIO_MODE_USER_STD_BIDIRECTIONAL; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - reg_oeb_userl = 0x0; - reg_oeb_userh = 0x0; - reg_debug_1 = 0x1A; // try the gpios as output - reg_mprj_userl = 0x0; - reg_mprj_userh = 0x0; - i = 0x20; - for (j = 0; j < 5; j++) { - reg_mprj_userh = i; - reg_debug_2 = 37-j; - reg_mprj_userh = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x20; - } - i = 0x80000000; - for (j = 0; j < 32; j++) { - reg_mprj_userh = 0x3f; - reg_mprj_userl = i; - reg_debug_2 = 32-j; - reg_mprj_userh = 0x00; - reg_mprj_userl = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x80000000; - } - reg_oeb_userl = 0xFFFFFFFF; - reg_oeb_userh = 0x3F; - reg_mprj_userl =0; - reg_mprj_userh =0; - // test input - reg_debug_1 = 0XAA; // configuration done wait environment to send 0xFFFFFFFF to reg_mprj_userl - while (reg_mprj_userl != 0xFFFFFFFF); - reg_debug_2 = reg_mprj_userl; - reg_debug_1 = 0XBB; // configuration done wait environment to send 0xAAAAAAAA to reg_mprj_userl - while (reg_mprj_userl != 0xAAAAAAAA); - reg_debug_2 = reg_mprj_userl; - reg_debug_1 = 0XCC; // configuration done wait environment to send 0x55555555 to reg_mprj_userl - while (reg_mprj_userl != 0x55555555); - reg_debug_2 = reg_mprj_userl; - reg_debug_1 = 0XDD; // configuration done wait environment to send 0x0 to reg_mprj_userl - while (reg_mprj_userl != 0x0); - reg_debug_2 = reg_mprj_userl; - reg_debug_1 = 0XD1; - while (reg_mprj_userh != 0x3F); - reg_debug_2 = reg_mprj_userh; - reg_debug_1 = 0XD2; - while (reg_mprj_userh != 0x0); - reg_debug_2 = reg_mprj_userh; - reg_debug_1 = 0XD3; - while (reg_mprj_userh != 0x15); - reg_debug_2 = reg_mprj_userh; - reg_debug_1 = 0XD4; - while (reg_mprj_userh != 0x2A); - reg_debug_2 = reg_mprj_userh; - reg_debug_1 = 0XD5; - - - reg_debug_2=0xFF; -} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i.c deleted file mode 100644 index dadfaf80..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_i.c +++ /dev/null @@ -1,86 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0XAA; // configuration done wait environment to send 0xFFFFFFFF to reg_mprj_datal - while (reg_mprj_datal != 0xFFFFFFFF); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XBB; // configuration done wait environment to send 0xAAAAAAAA to reg_mprj_datal - while (reg_mprj_datal != 0xAAAAAAAA); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XCC; // configuration done wait environment to send 0x55555555 to reg_mprj_datal - while (reg_mprj_datal != 0x55555555); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XDD; // configuration done wait environment to send 0x0 to reg_mprj_datal - while (reg_mprj_datal != 0x0); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XD1; - while (reg_mprj_datah != 0x3F); - reg_debug_2 = reg_mprj_datah; - reg_debug_1 = 0XD2; - while (reg_mprj_datah != 0x0); - reg_debug_2 = reg_mprj_datah; - reg_debug_1 = 0XD3; - while (reg_mprj_datah != 0x15); - reg_debug_2 = reg_mprj_datah; - reg_debug_1 = 0XD4; - while (reg_mprj_datah != 0x2A); - reg_debug_2 = reg_mprj_datah; - reg_debug_1 = 0XD5; - reg_debug_1 = 0XD5; // for delay insertion for release - // trying to inject error by sending data to gpio by firmware where gpios configured as input - reg_mprj_datal = 0x5AE1FFB8; // random number - reg_mprj_datah = 0x1E; // random number - - reg_debug_2 = 0xFF; -} - diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i_pd.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i_pd.c deleted file mode 100644 index e7dccc76..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_i_pd.c +++ /dev/null @@ -1,58 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0XAA; // configuration done - - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - while (true); -} diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i_pd_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i_pd_user.c deleted file mode 100644 index 010328ee..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_i_pd_user.c +++ /dev/null @@ -1,58 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_36 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_35 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_34 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_33 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_32 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_31 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_30 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_29 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_28 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_27 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_26 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_25 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_24 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_23 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_22 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_19 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_18 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_17 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_14 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_13 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_12 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_11 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_10 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_9 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_8 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_7 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_6 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_4 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_3 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_2 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLDOWN; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0XAA; // configuration done - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - - while (true); -} diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i_pu.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i_pu.c deleted file mode 100644 index d7f71d6c..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_i_pu.c +++ /dev/null @@ -1,57 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0XAA; // configuration done - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - while (true); -} diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i_pu_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i_pu_user.c deleted file mode 100644 index 3ca6ccf3..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_i_pu_user.c +++ /dev/null @@ -1,64 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" -#define reg_mprj_userl (*(volatile uint32_t*)0x300FFFF0) -#define reg_mprj_userh (*(volatile uint32_t*)0x300FFFF4) -#define reg_oeb_userl (*(volatile uint32_t*)0x300FFFEC) -#define reg_oeb_userh (*(volatile uint32_t*)0x300FFFE8) -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_36 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_35 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_34 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_33 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_32 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_31 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_30 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_29 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_28 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_27 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_26 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_25 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_24 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_23 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_22 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_19 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_18 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_17 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_14 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_13 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_12 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_11 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_10 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_9 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_8 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_7 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_6 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_4 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_3 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_2 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_PULLUP; - reg_mprj_userl = 0xFFFFFFFF; - reg_mprj_userh = 0x3F; - reg_oeb_userl = 0x0; - reg_oeb_userh = 0x0; - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0XAA; // configuration done - - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - while (true); -} diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c deleted file mode 100644 index f69acd0c..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_i_user.c +++ /dev/null @@ -1,88 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" - -#define reg_mprj_userl (*(volatile uint32_t*)0x300FFFF0) -#define reg_mprj_userh (*(volatile uint32_t*)0x300FFFF4) - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_36 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_35 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_34 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_33 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_32 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_31 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_30 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_29 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_28 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_27 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_26 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_25 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_24 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_23 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_22 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_21 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_20 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_19 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_18 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_17 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_16 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_15 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_14 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_13 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_12 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_11 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_10 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_9 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_8 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_7 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_6 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_5 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_4 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_3 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_2 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_1 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_NOPULL; - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0XAA; // configuration done wait environment to send 0xFFFFFFFF to reg_mprj_userl - while (reg_mprj_userl != 0xFFFFFFFF); - reg_debug_2 = reg_mprj_userl; - reg_debug_1 = 0XBB; // configuration done wait environment to send 0xAAAAAAAA to reg_mprj_userl - while (reg_mprj_userl != 0xAAAAAAAA); - reg_debug_2 = reg_mprj_userl; - reg_debug_1 = 0XCC; // configuration done wait environment to send 0x55555555 to reg_mprj_userl - while (reg_mprj_userl != 0x55555555); - reg_debug_2 = reg_mprj_userl; - reg_debug_1 = 0XDD; // configuration done wait environment to send 0x0 to reg_mprj_userl - while (reg_mprj_userl != 0x0); - reg_debug_2 = reg_mprj_userl; - reg_debug_1 = 0XD1; - while (reg_mprj_userh != 0x3F); - reg_debug_2 = reg_mprj_userh; - reg_debug_1 = 0XD2; - while (reg_mprj_userh != 0x0); - reg_debug_2 = reg_mprj_userh; - reg_debug_1 = 0XD3; - while (reg_mprj_userh != 0x15); - reg_debug_2 = reg_mprj_userh; - reg_debug_1 = 0XD4; - while (reg_mprj_userh != 0x2A); - reg_debug_2 = reg_mprj_userh; - reg_debug_1 = 0XD5; - reg_debug_1 = 0XD5; // for delay insertion for release - // trying to inject error by sending data to gpio by firmware where gpios configured as input - reg_mprj_userl = 0x5AE1FFB8; // random number - reg_mprj_userh = 0x1E; // random number - - reg_debug_2 = 0xFF; -} - diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_o.c b/verilog/dv/cocotb/tests/gpio/gpio_all_o.c deleted file mode 100644 index f1db9d93..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_o.c +++ /dev/null @@ -1,90 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0xAA; // finish configuration - reg_mprj_datal = 0x0; - reg_mprj_datah = 0x0; - i = 0x20; - for (j = 0; j < 5; j++) { - reg_mprj_datah = i; - reg_debug_2 = 37-j; - reg_mprj_datah = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x20; - } - i = 0x80000000; - for (j = 0; j < 32; j++) { - reg_mprj_datah = 0x3f; - reg_mprj_datal = i; - reg_debug_2 = 32-j; - reg_mprj_datah = 0x00; - reg_mprj_datal = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x80000000; - } - - // try to give input - reg_debug_1 = 0XBB; // configuration done wait environment to send 0x8F66FD7B to reg_mprj_datal - int timeout = 100; - while (reg_mprj_datal != 0x8F66FD7B){ - timeout--; - if (timeout==0){ - break; - } - } - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XFF; // configuration done wait environment to send 0xFFA88C5A to reg_mprj_datal -} - diff --git a/verilog/dv/cocotb/tests/gpio/gpio_all_o_user.c b/verilog/dv/cocotb/tests/gpio/gpio_all_o_user.c deleted file mode 100644 index 604b87ed..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_all_o_user.c +++ /dev/null @@ -1,95 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" -// Debug reg DEBUG_ON -#define reg_mprj_userl (*(volatile uint32_t*)0x300FFFF0) -#define reg_mprj_userh (*(volatile uint32_t*)0x300FFFF4) -#define reg_oeb_userl (*(volatile uint32_t*)0x300FFFEC) -#define reg_oeb_userh (*(volatile uint32_t*)0x300FFFE8) -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_36 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_35 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_34 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_33 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_32 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_31 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_30 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_29 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_28 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_27 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_26 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_25 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_24 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_23 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_22 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_21 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_20 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_19 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_18 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_17 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_16 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_15 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_13 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_12 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_11 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_10 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_9 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_8 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_7 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_6 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_4 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_3 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_2 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_1 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_USER_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_USER_STD_OUTPUT; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - reg_oeb_userl = 0x0; - reg_oeb_userh = 0x0; - reg_debug_1 = 0xAA; // finish configuration - reg_mprj_userl = 0x0; - reg_mprj_userh = 0x0; - i = 0x20; - for (j = 0; j < 5; j++) { - reg_mprj_userh = i; - reg_debug_2 = 37-j; - reg_mprj_userh = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x20; - } - i = 0x80000000; - for (j = 0; j < 32; j++) { - reg_mprj_userh = 0x3f; - reg_mprj_userl = i; - reg_debug_2 = 32-j; - reg_mprj_userh = 0x00; - reg_mprj_userl = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x80000000; - } - - // try to give input - reg_debug_1 = 0XBB; // configuration done wait environment to send 0x8F66FD7B to reg_mprj_userl - int timeout = 100; - while (reg_mprj_userl != 0x8F66FD7B){ - timeout--; - if (timeout==0){ - break; - } - } - reg_debug_2 = reg_mprj_userl; - reg_debug_1 = 0XFF; // configuration done wait environment to send 0xFFA88C5A to reg_mprj_userl -} - diff --git a/verilog/dv/cocotb/tests/gpio/gpio_user.py b/verilog/dv/cocotb/tests/gpio/gpio_user.py deleted file mode 100644 index 19a9c5e0..00000000 --- a/verilog/dv/cocotb/tests/gpio/gpio_user.py +++ /dev/null @@ -1,468 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from cocotb.binary import BinaryValue - -reg = Regs() - -@cocotb.test() -@repot_test -async def gpio_all_o_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=542674) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - cocotb.log.info("[TEST] finish configuring as user output") - i= 0x20 - for j in range(5): - await wait_reg2(cpu,caravelEnv,37-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,0)).integer != i<<32: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {bin(i<<32)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - i = i >> 1 - i |= 0x20 - - i= 0x80000000 - for j in range(32): - await wait_reg2(cpu,caravelEnv,32-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') - if caravelEnv.monitor_gpio((31,0)).integer != i : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {bin(i)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x80000000 - - await wait_reg1(cpu,caravelEnv,0XBB) - data_in = 0x8F66FD7B - cocotb.log.info(f"[TEST] try send {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - reg2 =0 - await wait_reg1(cpu,caravelEnv,0XFF) - try: - reg2 =cpu.read_debug_reg2() - if reg2 == data_in: - cocotb.log.error(f"[TEST] Error: data {hex(data_in)} driven on gpio[31:0] is seen by firmware while gpios are configured as output") - else: - cocotb.log.info(f"[TEST] driven data {hex(data_in)} sent can't be sent to gpio[31:0] when it configure as output it can see {reg2}") - except Exception as e: - cocotb.log.info(f"[TEST] driven data {hex(data_in)} sent can't be sent to gpio[31:0] when it configure as output") - return - - - await ClockCycles(caravelEnv.clk, 10) - - -@cocotb.test() -@repot_test -async def gpio_all_i_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=498255) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - await wait_reg1(cpu,caravelEnv,0xAA) - cocotb.log.info(f"[TEST] configuration finished") - data_in = 0xFFFFFFFF - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xBB) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xAAAAAAAA - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xCC) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x55555555 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xDD) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xD1) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x3F - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD2) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD3) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x15 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD4) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x2A - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0XD5) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - caravelEnv.release_gpio((37,0)) - await wait_reg2(cpu,caravelEnv,0XFF) - if caravelEnv.monitor_gpio((37,0)).binstr != "zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz": - cocotb.log.error(f"[TEST] ERROR: firmware can write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") - else: - cocotb.log.info(f"[TEST] [TEST] PASS: firmware cannot write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") - cocotb.log.info(f"[TEST] finish") - - -@cocotb.test() -@repot_test -async def gpio_all_i_pu_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=56875,num_error=2000) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - # monitor the output of padframe module it suppose to be all ones when no input is applied - await ClockCycles(caravelEnv.clk,100) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and float") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with zero - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with ones - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with 1") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with zeros and float other half - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==1: #odd - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 0") - else: - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with odd half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==1: #odd - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with even half with 0") - else: - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with ones and float other half - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 1") - - await ClockCycles(caravelEnv.clk,1000) - - # drive with zeros then release all gpio - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - caravelEnv.release_gpio((37,0)) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and all released") - await ClockCycles(caravelEnv.clk,1000) - - -@cocotb.test() -@repot_test -async def gpio_all_i_pd_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=54138,num_error=2000) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - # monitor the output of padframe module it suppose to be all ones when no input is applied - await ClockCycles(caravelEnv.clk,100) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and float") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with zero - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with ones - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with 1") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with zeros and float other half - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i]!="0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 0") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i]!="0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with even half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with ones and float other half - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==0: #even - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1") - else: - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==1: #odd - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1") - else: - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - - # drive with ones then release all gpio - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - caravelEnv.release_gpio((37,0)) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and all released") - await ClockCycles(caravelEnv.clk,1000) - - - -@cocotb.test() -@repot_test -async def gpio_all_bidir_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=266662) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - await wait_reg1(cpu,caravelEnv,0x1A) - await caravelEnv.release_csb() - cocotb.log.info("[TEST] finish configuring ") - i= 0x20 - for j in range(5): - await wait_reg2(cpu,caravelEnv,37-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,0)).integer != i << 32: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {bin(i << 32)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - i = i >> 1 - i |= 0x20 - - i= 0x80000000 - for j in range(32): - await wait_reg2(cpu,caravelEnv,32-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') - if caravelEnv.monitor_gpio((31,0)).integer != i : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {bin(i)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x80000000 - caravelEnv.release_gpio((37,0)) - await ClockCycles(caravelEnv.clk, 10) - caravelEnv.drive_gpio_in((31,0),0) - await ClockCycles(caravelEnv.clk, 10) - await wait_reg1(cpu,caravelEnv,0xAA) - cocotb.log.info(f"[TEST] configuration finished") - data_in = 0xFFFFFFFF - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xBB) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xAAAAAAAA - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xCC) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x55555555 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xDD) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xD1) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x3F - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD2) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD3) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x15 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD4) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x2A - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0XD5) - - await wait_reg2(cpu,caravelEnv,0XFF) - - cocotb.log.info(f"[TEST] finish") - await ClockCycles(caravelEnv.clk, 10) diff --git a/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_i_caravan.c b/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_i_caravan.c deleted file mode 100644 index 4fa59722..00000000 --- a/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_i_caravan.c +++ /dev/null @@ -1,87 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0XAA; // configuration done wait environment to send 0xFFFFFFFF to reg_mprj_datal - while (reg_mprj_datal != 0xfe003fff); // gpios 14 to 25 has to be 0 - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XBB; // configuration done wait environment to send 0xAAAAAAAA to reg_mprj_datal - while (reg_mprj_datal != 0xaa002aaa); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XCC; // configuration done wait environment to send 0x55555555 to reg_mprj_datal - while (reg_mprj_datal != 0x54001555); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XDD; // configuration done wait environment to send 0x0 to reg_mprj_datal - while (reg_mprj_datal != 0x0); - reg_debug_2 = reg_mprj_datal; - reg_debug_1 = 0XD1; - while (reg_mprj_datah != 0x3F); - reg_debug_2 = reg_mprj_datah; - reg_debug_1 = 0XD2; - while (reg_mprj_datah != 0x0); - reg_debug_2 = reg_mprj_datah; - reg_debug_1 = 0XD3; - while (reg_mprj_datah != 0x15); - reg_debug_2 = reg_mprj_datah; - reg_debug_1 = 0XD4; - while (reg_mprj_datah != 0x2A); - reg_debug_2 = reg_mprj_datah; - reg_debug_1 = 0XD5; - reg_debug_1 = 0XD5; // for delay insertion for release - // trying to inject error by sending data to gpio by firmware where gpios configured as input - reg_mprj_datal = 0x5AE1FFB8; // random number - reg_mprj_datah = 0x1E; // random number - - reg_debug_2 = 0xFF; -} - - diff --git a/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_i_pd_caravan.c b/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_i_pd_caravan.c deleted file mode 100644 index e7dccc76..00000000 --- a/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_i_pd_caravan.c +++ /dev/null @@ -1,58 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_PULLDOWN; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0XAA; // configuration done - - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - while (true); -} diff --git a/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_i_pu_caravan.c b/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_i_pu_caravan.c deleted file mode 100644 index d7f71d6c..00000000 --- a/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_i_pu_caravan.c +++ /dev/null @@ -1,57 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_INPUT_PULLUP; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0XAA; // configuration done - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - while (true); -} diff --git a/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_o_caravan.c b/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_o_caravan.c deleted file mode 100644 index 8ea9111c..00000000 --- a/verilog/dv/cocotb/tests/gpio_caravan/gpio_all_o_caravan.c +++ /dev/null @@ -1,81 +0,0 @@ -#include -#include -#include "../bitbang/bitbang_functions.c" - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - reg_mprj_io_37 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_36 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_31 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_30 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_29 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_28 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_27 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_26 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_25 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_24 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_23 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_22 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_21 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_20 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_19 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_18 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_17 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_16 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_13 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_12 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_4 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_3 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_2 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_1 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_0 = GPIO_MODE_MGMT_STD_OUTPUT; - - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_1 = 0xAA; // finish configuration - reg_mprj_datal = 0x0; - reg_mprj_datah = 0x0; - i = 0x20; - for (j = 0; j < 5; j++) { - reg_mprj_datah = i; - reg_debug_2 = 37-j; - reg_mprj_datah = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x20; - } - i = 0x80000000; - for (j = 0; j < 32; j++) { - reg_mprj_datah = 0x3f; - reg_mprj_datal = i; - reg_debug_2 = 32-j; - reg_mprj_datah = 0x00; - reg_mprj_datal = 0x00000000; - reg_debug_2 = 0; - i >>=1; - i |= 0x80000000; - } - - - reg_debug_1 = 0XFF; // configuration done wait environment to send 0xFFA88C5A to reg_mprj_datal -} - diff --git a/verilog/dv/cocotb/tests/gpio_caravan/gpio_caravan.py b/verilog/dv/cocotb/tests/gpio_caravan/gpio_caravan.py deleted file mode 100644 index 554cd400..00000000 --- a/verilog/dv/cocotb/tests/gpio_caravan/gpio_caravan.py +++ /dev/null @@ -1,500 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from interfaces.common import Macros -from cocotb.binary import BinaryValue - -reg = Regs() - -@cocotb.test() -@repot_test -async def gpio_all_o_caravan(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=586652) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - cocotb.log.info("[TEST] finish configuring ") - i= 0x20 - for j in range(5): - await wait_reg2(cpu,caravelEnv,37-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - expected_data = bin(i<<32)[2:].zfill(38)[:13] +"zzzzzzzzzzz" + bin(i<<32)[2:].zfill(38)[24:] - if caravelEnv.monitor_gpio((37,0)).binstr != expected_data: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {expected_data}') - await wait_reg2(cpu,caravelEnv,0) - expected_data = bin(0)[2:].zfill(38)[:13] +"zzzzzzzzzzz" + bin(0)[2:].zfill(38)[24:] - if caravelEnv.monitor_gpio((37,0)).binstr != expected_data: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {expected_data}') - i = i >> 1 - i |= 0x20 - - i= 0x80000000 - for j in range(32): - await wait_reg2(cpu,caravelEnv,32-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') - expected_data = bin(i)[2:].zfill(32)[:7] +"zzzzzzzzzzz" + bin(i)[2:].zfill(32)[18:] - if caravelEnv.monitor_gpio((31,0)).binstr != expected_data : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {expected_data}') - await wait_reg2(cpu,caravelEnv,0) - expected_data = bin(0)[2:].zfill(38)[:13] +"zzzzzzzzzzz" + bin(0)[2:].zfill(38)[24:] - if caravelEnv.monitor_gpio((37,0)).binstr != expected_data: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {expected_data}') - - i = i >> 1 - i |= 0x80000000 - - - await wait_reg1(cpu,caravelEnv,0XFF) - await ClockCycles(caravelEnv.clk, 10) - -@cocotb.test() -@repot_test -async def gpio_all_i_caravan(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=56837) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - await wait_reg1(cpu,caravelEnv,0xAA) - cocotb.log.info(f"[TEST] configuration finished") - data_in = 0xFFFFFFFF - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xBB) - mask = 0xfe003fff - data_expected = data_in & mask - if cpu.read_debug_reg2() == data_expected: - cocotb.log.info(f"[TEST] data {bin(data_in)} sent successfully through gpio[31:0] and seen as {bin(data_expected)}") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {bin(cpu.read_debug_reg2())} instead of {bin(data_expected)}") - data_in = 0xAAAAAAAA - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xCC) - data_expected = data_in & mask - if cpu.read_debug_reg2() == data_expected: - cocotb.log.info(f"[TEST] data {bin(data_in)} sent successfully through gpio[31:0] and seen as {bin(data_expected)}") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {bin(cpu.read_debug_reg2())} instead of {bin(data_expected)}") - data_in = 0x55555555 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xDD) - data_expected = data_in & mask - if cpu.read_debug_reg2() == data_expected: - cocotb.log.info(f"[TEST] data {bin(data_in)} sent successfully through gpio[31:0] and seen as {bin(data_expected)}") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {bin(cpu.read_debug_reg2())} instead of {bin(data_expected)}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xD1) - data_expected = data_in & mask - if cpu.read_debug_reg2() == data_expected: - cocotb.log.info(f"[TEST] data {bin(data_in)} sent successfully through gpio[31:0] and seen as {bin(data_expected)}") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {bin(cpu.read_debug_reg2())} instead of {bin(data_expected)}") - data_in = 0x3F - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD2) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD3) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x15 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD4) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x2A - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0XD5) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - caravelEnv.release_gpio((37,0)) - await wait_reg2(cpu,caravelEnv,0XFF) - if caravelEnv.monitor_gpio((37,0)).binstr != "zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz": - cocotb.log.error(f"[TEST] ERROR: firmware can write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") - else: - cocotb.log.info(f"[TEST] [TEST] PASS: firmware cannot write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") - cocotb.log.info(f"[TEST] finish") - - -@cocotb.test() -@repot_test -async def gpio_all_i_pu_caravan(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=58961,num_error=2000) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - # monitor the output of padframe module it suppose to be all ones when no input is applied - await ClockCycles(caravelEnv.clk,100) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i in range(14,25,1): - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pullup and float and {i} gpio must be z in caravan") - continue - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and float") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with zero - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with ones - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with 1") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with zeros and float other half - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - - if i%2 ==0: #even - if i in range(14,25,1): - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pullup and drived with odd half with 0 and {i} gpio must be z in caravan") - continue - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 0") - else: - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with odd half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i%2 ==0: #odd - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with even half with 0") - else: - if i in range(14,25,1): - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pullup and drived with even half with 0 and {i} gpio must be z in caravan") - continue - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with ones and float other half - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i in range(14,25,1) and i%2==0: - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pullup and drived with odd half with 1 and {i} gpio must be z in caravan") - continue - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i in range(14,25,1) and i%2==1: - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pullup and drived with even half with 1 and {i} gpio must be z in caravan") - continue - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 1") - - await ClockCycles(caravelEnv.clk,1000) - - # drive with zeros then release all gpio - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - caravelEnv.release_gpio((37,0)) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i in range(14,25,1): - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pullup and all released and {i} gpio must be z in caravan") - continue - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and all released") - await ClockCycles(caravelEnv.clk,1000) - - -@cocotb.test() -@repot_test -async def gpio_all_i_pd_caravan(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=58961,num_error=2000) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - # monitor the output of padframe module it suppose to be all ones when no input is applied - await ClockCycles(caravelEnv.clk,100) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i in range(14,25,1): - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pulldown and float and {i} gpio must be z in caravan") - continue - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and float") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with zero - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with ones - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with 1") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with zeros and float other half - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i in range(14,25,1) and i%2==0: - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pulldown and drived with odd half with 0 and {i} gpio must be z in caravan") - continue - if gpio[i]!="0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 0") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i in range(14,25,1) and i%2==1: - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pulldown and drived with even half with 0 and {i} gpio must be z in caravan") - continue - if gpio[i]!="0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with even half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with ones and float other half - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i%2 ==1: #odd - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1") - else: - if i in range(14,25,1): - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pulldown and drived with odd half with 1 and {i} gpio must be z in caravan") - continue - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i%2 ==0: #even - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1") - else: - if i in range(14,25,1): - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while configured as input pulldown and drived with odd half with 1 and {i} gpio must be z in caravan") - continue - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - - # drive with ones then release all gpio - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - caravelEnv.release_gpio((37,0)) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.mprj_io.value.binstr[::-1] - for i in range(38): - if i in range(14,25,1): - if gpio[i] != "z": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of z while while configured as input pulldown and all released and {i} gpio must be z in caravan") - continue - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and all released") - await ClockCycles(caravelEnv.clk,1000) - -@cocotb.test() -@repot_test -async def gpio_all_bidir(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1144980) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - await wait_reg1(cpu,caravelEnv,0x1A) - await caravelEnv.release_csb() - cocotb.log.info("[TEST] finish configuring ") - i= 0x20 - for j in range(5): - await wait_reg2(cpu,caravelEnv,37-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,0)).integer != i << 32: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {bin(i << 32)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - i = i >> 1 - i |= 0x20 - - i= 0x80000000 - for j in range(32): - await wait_reg2(cpu,caravelEnv,32-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') - if caravelEnv.monitor_gpio((31,0)).integer != i : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {bin(i)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x80000000 - - await wait_reg1(cpu,caravelEnv,0x2A) - cocotb.log.info(f"[TEST] configuration finished") - data_in = 0x8F66FD7B - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xBB) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xFFA88C5A - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xCC) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xC9536346 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xD1) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xC9536346 - data_in = 0x3F - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD2) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xC9536346 - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD3) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xC9536346 - data_in = 0x15 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD4) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xC9536346 - data_in = 0x2A - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg2(cpu,caravelEnv,0xFF) - cocotb.log.info(f"[TEST] finish") - - await ClockCycles(caravelEnv.clk, 10) diff --git a/verilog/dv/cocotb/tests/gpio_caravan/gpio_user.py b/verilog/dv/cocotb/tests/gpio_caravan/gpio_user.py deleted file mode 100644 index 9b7ccee7..00000000 --- a/verilog/dv/cocotb/tests/gpio_caravan/gpio_user.py +++ /dev/null @@ -1,468 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from cocotb.binary import BinaryValue - -reg = Regs() - -@cocotb.test() -@repot_test -async def gpio_all_o_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=542674) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - cocotb.log.info("[TEST] finish configuring as user output") - i= 0x20 - for j in range(5): - await wait_reg2(cpu,caravelEnv,37-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,0)).integer != i<<32: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {bin(i<<32)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - i = i >> 1 - i |= 0x20 - - i= 0x80000000 - for j in range(32): - await wait_reg2(cpu,caravelEnv,32-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') - if caravelEnv.monitor_gpio((31,0)).integer != i : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {bin(i)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x80000000 - - await wait_reg1(cpu,caravelEnv,0XBB) - data_in = 0x8F66FD7B - cocotb.log.info(f"[TEST] try send {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - reg2 =0 - await wait_reg1(cpu,caravelEnv,0XFF) - try: - reg2 =cpu.read_debug_reg2() - if reg2 == data_in: - cocotb.log.error(f"[TEST] Error: data {hex(data_in)} driven on gpio[31:0] is seen by firmware while gpios are configured as output") - else: - cocotb.log.info(f"[TEST] driven data {hex(data_in)} sent can't be sent to gpio[31:0] when it configure as output it can see {reg2}") - except Exception as e: - cocotb.log.info(f"[TEST] driven data {hex(data_in)} sent can't be sent to gpio[31:0] when it configure as output") - return - - - await ClockCycles(caravelEnv.clk, 10) - - -@cocotb.test() -@repot_test -async def gpio_all_i_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=56694) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - await wait_reg1(cpu,caravelEnv,0xAA) - cocotb.log.info(f"[TEST] configuration finished") - data_in = 0xFFFFFFFF - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xBB) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xAAAAAAAA - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xCC) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x55555555 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xDD) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xD1) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x3F - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD2) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD3) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x15 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD4) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x2A - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0XD5) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - caravelEnv.release_gpio((37,0)) - await wait_reg2(cpu,caravelEnv,0XFF) - if caravelEnv.monitor_gpio((37,0)).binstr != "zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz": - cocotb.log.error(f"[TEST] ERROR: firmware can write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") - else: - cocotb.log.info(f"[TEST] [TEST] PASS: firmware cannot write to the gpios while they are configured as input_nopull gpio= {caravelEnv.monitor_gpio((37,0))}") - cocotb.log.info(f"[TEST] finish") - - -@cocotb.test() -@repot_test -async def gpio_all_i_pu_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=58961,num_error=2000) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - # monitor the output of padframe module it suppose to be all ones when no input is applied - await ClockCycles(caravelEnv.clk,100) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and float") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with zero - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with ones - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with 1") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with zeros and float other half - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==1: #odd - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 0") - else: - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with odd half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==1: #odd - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pullup and drived with even half with 0") - else: - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with ones and float other half - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and drived with even half with 1") - - await ClockCycles(caravelEnv.clk,1000) - - # drive with zeros then release all gpio - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - caravelEnv.release_gpio((37,0)) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pullup and all released") - await ClockCycles(caravelEnv.clk,1000) - - -@cocotb.test() -@repot_test -async def gpio_all_i_pd_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=58961,num_error=2000) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - - await wait_reg1(cpu,caravelEnv,0xAA) - await caravelEnv.release_csb() - # monitor the output of padframe module it suppose to be all ones when no input is applied - await ClockCycles(caravelEnv.clk,100) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and float") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with zero - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive gpios with ones - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with 1") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with zeros and float other half - data_in = 0x0 - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i]!="0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 0") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i]!="0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with even half with 0") - await ClockCycles(caravelEnv.clk,1000) - # drive odd half gpios with ones and float other half - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(0,38,2): - caravelEnv.release_gpio(i) # release even gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==0: #even - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1") - else: - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - # drive even half gpios with zeros and float other half - caravelEnv.drive_gpio_in((37,0),data_in) - for i in range(1,38,2): - caravelEnv.release_gpio(i) # release odd gpios - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if i%2 ==1: #odd - if gpio[i]!="1": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 1 while configured as input pulldown and drived with odd half with 1") - else: - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and drived with odd half with 1") - - await ClockCycles(caravelEnv.clk,1000) - - # drive with ones then release all gpio - data_in = 0x3FFFFFFFFF - caravelEnv.drive_gpio_in((37,0),data_in) - await ClockCycles(caravelEnv.clk,1000) - caravelEnv.release_gpio((37,0)) - await ClockCycles(caravelEnv.clk,1000) - gpio = dut.uut.padframe.mprj_io_in.value.binstr - for i in range(38): - if gpio[i] != "0": - cocotb.log.error(f"[TEST] gpio[{i}] is having wrong value {gpio[i]} instead of 0 while configured as input pulldown and all released") - await ClockCycles(caravelEnv.clk,1000) - - - -@cocotb.test() -@repot_test -async def gpio_all_bidir_user(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=290455) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - uut = dut.uut - await wait_reg1(cpu,caravelEnv,0x1A) - await caravelEnv.release_csb() - cocotb.log.info("[TEST] finish configuring ") - i= 0x20 - for j in range(5): - await wait_reg2(cpu,caravelEnv,37-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,0)).integer != i << 32: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,0))} instead of {bin(i << 32)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'[TEST] Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - i = i >> 1 - i |= 0x20 - - i= 0x80000000 - for j in range(32): - await wait_reg2(cpu,caravelEnv,32-j) - cocotb.log.info(f'[Test] gpio out = {caravelEnv.monitor_gpio((37,0))} j = {j}') - if caravelEnv.monitor_gpio((37,32)).integer != 0x3f: - cocotb.log.error(f'[TEST] Wrong gpio high bits output {caravelEnv.monitor_gpio((37,32))} instead of {bin(0x3f)} ') - if caravelEnv.monitor_gpio((31,0)).integer != i : - cocotb.log.error(f'[TEST] Wrong gpio low bits output {caravelEnv.monitor_gpio((31,0))} instead of {bin(i)}') - await wait_reg2(cpu,caravelEnv,0) - if caravelEnv.monitor_gpio((37,0)).integer != 0: - cocotb.log.error(f'Wrong gpio output {caravelEnv.monitor_gpio((37,0))} instead of {bin(0x00000)}') - - i = i >> 1 - i |= 0x80000000 - caravelEnv.release_gpio((37,0)) - await ClockCycles(caravelEnv.clk, 10) - caravelEnv.drive_gpio_in((31,0),0) - await ClockCycles(caravelEnv.clk, 10) - await wait_reg1(cpu,caravelEnv,0xAA) - cocotb.log.info(f"[TEST] configuration finished") - data_in = 0xFFFFFFFF - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xBB) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0xAAAAAAAA - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xCC) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x55555555 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xDD) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[31:0]") - caravelEnv.drive_gpio_in((31,0),data_in) - await wait_reg1(cpu,caravelEnv,0xD1) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[31:0]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datal has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x3F - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD2) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x0 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD3) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x15 - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0xD4) - if cpu.read_debug_reg2() == data_in: - cocotb.log.info(f"[TEST] data {hex(data_in)} sent successfully through gpio[37:32]") - else: - cocotb.log.error(f"[TEST] Error: reg_mprj_datah has recieved wrong data {cpu.read_debug_reg2()} instead of {data_in}") - data_in = 0x2A - cocotb.log.info(f"[TEST] drive {hex(data_in)} to gpio[37:32]") - caravelEnv.drive_gpio_in((37,32),data_in) - await wait_reg1(cpu,caravelEnv,0XD5) - - await wait_reg2(cpu,caravelEnv,0XFF) - - cocotb.log.info(f"[TEST] finish") - await ClockCycles(caravelEnv.clk, 10) diff --git a/verilog/dv/cocotb/tests/hello_world/helloWorld.c b/verilog/dv/cocotb/tests/hello_world/helloWorld.c deleted file mode 100644 index ad547c3c..00000000 --- a/verilog/dv/cocotb/tests/hello_world/helloWorld.c +++ /dev/null @@ -1,5 +0,0 @@ - -int main(){ - // do nothing - return 0; -} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/hello_world/helloWorld.py b/verilog/dv/cocotb/tests/hello_world/helloWorld.py deleted file mode 100644 index f3aefbc3..00000000 --- a/verilog/dv/cocotb/tests/hello_world/helloWorld.py +++ /dev/null @@ -1,11 +0,0 @@ -import cocotb -from tests.common_functions.test_functions import * - -@cocotb.test() -@repot_test - -async def helloWorld(dut): - caravelEnv,clock = await test_configure(dut) - cocotb.log.info("[Test] Hello world") - caravelEnv.print_gpios_ctrl_val() - caravelEnv.print_gpios_HW_val() \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/housekeeping/general/clock_redirect.c b/verilog/dv/cocotb/tests/housekeeping/general/clock_redirect.c deleted file mode 100644 index 6f2578f8..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/general/clock_redirect.c +++ /dev/null @@ -1,20 +0,0 @@ -#include -#include -// -------------------------------------------------------- - -void main(){ - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - /* Monitor pins must be set to output */ - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_OUTPUT; - /* Apply configuration */ - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - reg_debug_1 =0xAA; - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - - return; -} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/housekeeping/general/hk_disable.c b/verilog/dv/cocotb/tests/housekeeping/general/hk_disable.c deleted file mode 100644 index df6f3ed9..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/general/hk_disable.c +++ /dev/null @@ -1,15 +0,0 @@ -#include -#include -// -------------------------------------------------------- - -void main(){ - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0xBB; - - while (reg_debug_1 != 0xAA); - reg_hkspi_disable = 0; - reg_hkspi_pll_ena =0; - reg_debug_1 =0xBB; - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); -} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/housekeeping/general/pll.c b/verilog/dv/cocotb/tests/housekeeping/general/pll.c deleted file mode 100644 index a30629f6..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/general/pll.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -// -------------------------------------------------------- - -/* - * PLL Test (self-switching) - * - Switches PLL bypass in housekeeping - * - Changes PLL divider in housekeeping - * - */ -void main() -{ - int i; - - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - /* Monitor pins must be set to output */ - reg_mprj_io_15 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_14 = GPIO_MODE_MGMT_STD_OUTPUT; - /* Apply configuration */ - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - // Start test - - /* - *------------------------------------------------------------- - * Register 2610_000c reg_hkspi_pll_ena - * SPI address 0x08 = PLL enables - * bit 0 = PLL enable, bit 1 = DCO enable - * - * Register 2610_0010 reg_hkspi_pll_bypass - * SPI address 0x09 = PLL bypass - * bit 0 = PLL bypass - * - * Register 2610_0020 reg_hkspi_pll_source - * SPI address 0x11 = PLL source - * bits 0-2 = phase 0 divider, bits 3-5 = phase 90 divider - * - * Register 2610_0024 reg_hkspi_pll_divider - * SPI address 0x12 = PLL divider - * bits 0-4 = feedback divider - * - * Register 2620_0004 reg_clk_out_dest - * SPI address 0x1b = Output redirect - * bit 0 = trap to mprj_io[13] - * bit 1 = clk to mprj_io[14] - * bit 2 = clk2 to mprj_io[15] - *------------------------------------------------------------- - */ - - // Monitor the core clock and user clock on mprj_io[14] and mprj_io[15] - // reg_clk_out_dest = 0x6 to turn on, 0x0 to turn off - - // Write checkpoint for clock counting (PLL bypassed) - reg_debug_1 = 0xA1; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x0; - reg_debug_1 = 0xA2; - - // Set PLL enable, no DCO mode - reg_hkspi_pll_ena = 0x1; - - // Set PLL output divider to 0x03 - reg_hkspi_pll_source = 0x3; - - // Write checkpoint for clock counting (PLL bypassed) - reg_debug_1 = 0xA3; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x0; - reg_debug_1 = 0xA4; - - // Disable PLL bypass - reg_hkspi_pll_bypass = 0x0; - - // Write checkpoint for clock counting - reg_debug_1 = 0xA5; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x0; - reg_debug_1 = 0xA6; - - // Write 0x03 to feedback divider (was 0x04) - reg_hkspi_pll_divider = 0x3; - - // Write checkpoint - reg_debug_1 = 0xA7; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x0; - reg_debug_1 = 0xA8; - - // Write 0x04 to PLL output divider - reg_hkspi_pll_source = 0x4; - - // Write checkpoint - reg_debug_1 = 0xA9; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x6; - reg_clk_out_dest = 0x0; - reg_debug_1 = 0xAa; - - // End test - reg_mprj_datal = 0xA0900000; -} - diff --git a/verilog/dv/cocotb/tests/housekeeping/general/pll.py b/verilog/dv/cocotb/tests/housekeeping/general/pll.py deleted file mode 100644 index e69cdec9..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/general/pll.py +++ /dev/null @@ -1,86 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from cocotb.binary import BinaryValue - -reg = Regs() -caravel_clock = 0 -user_clock = 0 -@cocotb.test() -@repot_test -async def pll(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=47279) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - error_margin = 0.1 - - await wait_reg1(cpu,caravelEnv,0xA1) - - await cocotb.start(calculate_clk_period(dut.bin14_monitor,"caravel clock")) - await cocotb.start(calculate_clk_period(dut.bin15_monitor,"user clock")) - await wait_reg1(cpu,caravelEnv,0xA3) - if abs(caravel_clock - user_clock) > error_margin*caravel_clock: - cocotb.log.error(f"[TEST] Error: clocks should be equal in phase 1 but caravel clock = {round(1000000/caravel_clock,2)} MHz user clock = {round(1000000/user_clock,2)} MHz") - else: - cocotb.log.info(f"[TEST] pass phase 1 caravel clock = {round(1000000/caravel_clock,2)} MHz user clock = {round(1000000/user_clock,2)} MHz") - await cocotb.start(calculate_clk_period(dut.bin14_monitor,"caravel clock")) - await cocotb.start(calculate_clk_period(dut.bin15_monitor,"user clock")) - await wait_reg1(cpu,caravelEnv,0xA5) - if abs(caravel_clock - user_clock) > error_margin*caravel_clock: - cocotb.log.error(f"[TEST] Error: clocks should be equal in phase 2 but caravel clock = {round(1000000/caravel_clock,2)} MHz user clock = {round(1000000/user_clock,2)} MHz") - else: - cocotb.log.info(f"[TEST] pass phase 2 caravel clock = {round(1000000/caravel_clock,2)} MHz user clock = {round(1000000/user_clock,2)} MHz") - await cocotb.start(calculate_clk_period(dut.bin14_monitor,"caravel clock")) - await cocotb.start(calculate_clk_period(dut.bin15_monitor,"user clock")) - await wait_reg1(cpu,caravelEnv,0xA7) - if abs(caravel_clock - user_clock*3) > error_margin*caravel_clock: - cocotb.log.error(f"[TEST] Error: user clock shoud be 3 times caravel clock in phase 3 but caravel clock = {round(1000000/caravel_clock,2)} MHz user clock = {round(1000000/user_clock,2)} MHz") - else: - cocotb.log.info(f"[TEST] pass phase 3 caravel clock = {round(1000000/caravel_clock,2)} MHz user clock = {round(1000000/user_clock,2)} MHz") - await cocotb.start(calculate_clk_period(dut.bin14_monitor,"caravel clock")) - await cocotb.start(calculate_clk_period(dut.bin15_monitor,"user clock ")) - await wait_reg1(cpu,caravelEnv,0xA9) - if abs(caravel_clock - user_clock*3) > error_margin*caravel_clock: - cocotb.log.error(f"[TEST] Error: user clock shoud be 3 times caravel clock in phase 4 but caravel clock = {round(1000000/caravel_clock,2)} MHz user clock = {round(1000000/user_clock,2)} MHz") - else: - cocotb.log.info(f"[TEST] pass phase 4 caravel clock = {round(1000000/caravel_clock,2)} MHz user clock = {round(1000000/user_clock,2)} MHz") - await cocotb.start(calculate_clk_period(dut.bin14_monitor,"caravel clock")) - await cocotb.start(calculate_clk_period(dut.bin15_monitor,"user clock")) - await wait_reg1(cpu,caravelEnv,0xAa) - if abs(caravel_clock - user_clock*4) > error_margin*caravel_clock: - cocotb.log.error(f"[TEST] Error: user clock shoud be 4 times caravel clock in phase 5 but caravel clock = {round(1000000/caravel_clock,2)} MHz user clock = {round(1000000/user_clock,2)} MHz") - else: - cocotb.log.info(f"[TEST] pass phase 5 caravel clock = {round(1000000/caravel_clock,2)} MHz user clock = {round(1000000/user_clock,2)} MHz") - await ClockCycles(caravelEnv.clk,10000) - - # for i in range(1000): - # await ClockCycles(caravelEnv.clk,10000) - # cocotb.log.info(f"time = {cocotb.simulator.get_sim_time()}") - -async def calculate_clk_period(clk,name): - await RisingEdge(clk) - initial_time = cocotb.simulator.get_sim_time() - initial_time = (initial_time[0] <<32) | (initial_time[1]) - for i in range(100): - await RisingEdge(clk) - end_time = cocotb.simulator.get_sim_time() - end_time = (end_time[0] <<32) | (end_time[1]) - val = (end_time - initial_time) / 100 - cocotb.log.debug(f"[TEST] clock of {name} is {val}") - if name == "caravel clock": - global caravel_clock - caravel_clock = val - elif name == "user clock": - global user_clock - user_clock = val - - val = str(val) - return val \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/housekeeping/general/sys_ctrl.py b/verilog/dv/cocotb/tests/housekeeping/general/sys_ctrl.py deleted file mode 100644 index 43ed164e..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/general/sys_ctrl.py +++ /dev/null @@ -1,148 +0,0 @@ -from faulthandler import disable -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from cocotb.binary import BinaryValue -from tests.housekeeping.housekeeping_spi.spi_access_functions import * - -reg = Regs() -caravel_clock = 0 -user_clock = 0 -core_clock = 0 -@cocotb.test() -@repot_test -async def clock_redirect(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=13052) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - error_margin = 0.1 - # calculate core clock - await cocotb.start(calculate_clk_period(dut.uut.clock,"core clock")) - await ClockCycles(caravelEnv.clk,110) - cocotb.log.info(f"[TEST] core clock requency = {round(1000000/core_clock,2)} MHz period = {core_clock}ps") - await wait_reg1(cpu,caravelEnv,0xAa) - # check clk redirect working - #user clock - clock_name = "user clock" - await write_reg_spi(caravelEnv,0x1b,0x0) # disable user clock output redirect - await cocotb.start(calculate_clk_period(dut.bin14_monitor,clock_name)) - await ClockCycles(caravelEnv.clk,110) - if user_clock != 0: - cocotb.log.error(f"[TEST] Error: {clock_name} is directed while clk2_output_dest is disabled") - else: - cocotb.log.info(f"[TEST] Pass: {clock_name} has not directed when reg clk2_output_dest is disabled") - - await write_reg_spi(caravelEnv,0x1b,0x4) # enable user clock output redirect - await cocotb.start(calculate_clk_period(dut.bin14_monitor,clock_name)) - await ClockCycles(caravelEnv.clk,110) - if abs(user_clock - core_clock) > (error_margin*core_clock): - cocotb.log.error(f"[TEST] Error: {clock_name} is directed with wrong value {clock_name} period = {user_clock} and core clock = {core_clock}") - else: - cocotb.log.info(f"[TEST] Pass: {clock_name} has directed successfully") - - #caravel clock - clock_name = "caravel clock" - await write_reg_spi(caravelEnv,0x1b,0x0) # disable caravel clock output redirect - await cocotb.start(calculate_clk_period(dut.bin14_monitor,clock_name)) - await ClockCycles(caravelEnv.clk,110) - if caravel_clock != 0: - cocotb.log.error(f"[TEST] Error: {clock_name} is directed while clk2_output_dest is disabled") - else: - cocotb.log.info(f"[TEST] Pass: {clock_name} has not directed when reg clk2_output_dest is disabled") - - await write_reg_spi(caravelEnv,0x1b,0x4) # enable caravel clock output redirect - await cocotb.start(calculate_clk_period(dut.bin15_monitor,clock_name)) - await ClockCycles(caravelEnv.clk,110) - if abs(caravel_clock - core_clock) > error_margin*core_clock: - cocotb.log.error(f"[TEST] Error: {clock_name} is directed with wrong value {clock_name} period = {caravel_clock} and core clock = {core_clock}") - else: - cocotb.log.info(f"[TEST] Pass: {clock_name} has directed successfully") - - -async def calculate_clk_period(clk,name): - await RisingEdge(clk) - initial_time = cocotb.simulator.get_sim_time() - initial_time = (initial_time[0] <<32) | (initial_time[1]) - for i in range(100): - await RisingEdge(clk) - end_time = cocotb.simulator.get_sim_time() - end_time = (end_time[0] <<32) | (end_time[1]) - val = (end_time - initial_time) / 100 - cocotb.log.debug(f"[TEST] clock of {name} is {val}") - if name == "caravel clock": - global caravel_clock - caravel_clock = val - elif name == "user clock": - global user_clock - user_clock = val - elif name == "core clock": - global core_clock - core_clock = val - return val - - -@cocotb.test() -@repot_test -async def hk_disable(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=11393) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - - # check spi working by writing to PLL enables - old_pll_enable = dut.uut.housekeeping.pll_ena.value.integer - cocotb.log.debug(f"[TEST] pll_enable = {old_pll_enable}") - await write_reg_spi(caravelEnv,0x8,1-old_pll_enable) - pll_enable = dut.uut.housekeeping.pll_ena.value.integer - cocotb.log.debug(f"[TEST] pll_enable = {pll_enable}") - if pll_enable == 1-old_pll_enable: - cocotb.log.info(f"[TEST] Pass: SPI swap pll_enable value from {old_pll_enable} to {pll_enable}") - else: - cocotb.log.error(f"[TEST] Error: SPI isn't working correctly it cant change pll from {old_pll_enable} to {1-old_pll_enable}") - old_pll_enable = dut.uut.housekeeping.pll_ena.value.integer - cocotb.log.debug(f"[TEST] pll_enable = {old_pll_enable}") - await write_reg_spi(caravelEnv,0x8,1-old_pll_enable) - pll_enable = dut.uut.housekeeping.pll_ena.value.integer - cocotb.log.debug(f"[TEST] pll_enable = {pll_enable}") - if pll_enable == 1-old_pll_enable: - cocotb.log.info(f"[TEST] Pass: SPI swap pll_enable value from {old_pll_enable} to {pll_enable}") - else: - cocotb.log.error(f"[TEST] Error: SPI isn't working correctly it cant change pll from {old_pll_enable} to {1-old_pll_enable}") - - # disable Housekeeping SPIca - await write_reg_spi(caravelEnv,0x6f,0x1) - - # try to change pll_en - old_pll_enable = dut.uut.housekeeping.pll_ena.value.integer - cocotb.log.debug(f"[TEST] pll_enable = {old_pll_enable}") - await write_reg_spi(caravelEnv,0x8,1-old_pll_enable) - pll_enable = dut.uut.housekeeping.pll_ena.value.integer - cocotb.log.debug(f"[TEST] pll_enable = {pll_enable}") - if pll_enable == 1-old_pll_enable: - cocotb.log.error(f"[TEST] Error: SPI swap pll_enable value from {old_pll_enable} to {pll_enable} while housekeeping spi is disabled") - else: - cocotb.log.info(f"[TEST] pass: SPI isn't working when SPI housekeeping is disabled") - - # enable SPI housekeeping through firmware - await wait_reg2(cpu,caravelEnv,0xBB) # start waiting on reg1 AA - cpu.write_debug_reg1_backdoor(0xAA) - await wait_reg1(cpu,caravelEnv,0xBB) # enabled the housekeeping - - old_pll_enable = dut.uut.housekeeping.pll_ena.value.integer - cocotb.log.debug(f"[TEST] pll_enable = {old_pll_enable}") - await write_reg_spi(caravelEnv,0x8,1-old_pll_enable) - pll_enable = dut.uut.housekeeping.pll_ena.value.integer - cocotb.log.debug(f"[TEST] pll_enable = {pll_enable}") - if pll_enable == 1-old_pll_enable: - cocotb.log.info(f"[TEST] Pass: Housekeeping SPI has been enabled correctly through firmware") - else: - cocotb.log.error(f"[TEST] Error: Housekeeping SPI failed to be enabled through firmware") - \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_rst_spi.c b/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_rst_spi.c deleted file mode 100644 index bf31b67a..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_rst_spi.c +++ /dev/null @@ -1,11 +0,0 @@ -#include -#include - -// Empty C code - -void main() -{ - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - return; -} - diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_wr_spi.c b/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_wr_spi.c deleted file mode 100644 index bf31b67a..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_wr_spi.c +++ /dev/null @@ -1,11 +0,0 @@ -#include -#include - -// Empty C code - -void main() -{ - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - return; -} - diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_wr_wb.c b/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_wr_wb.c deleted file mode 100644 index bf31b67a..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_wr_wb.c +++ /dev/null @@ -1,11 +0,0 @@ -#include -#include - -// Empty C code - -void main() -{ - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - return; -} - diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_wr_wb_cpu.c b/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_wr_wb_cpu.c deleted file mode 100644 index 0295812c..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/hk_regs_wr_wb_cpu.c +++ /dev/null @@ -1,333 +0,0 @@ -#include -#include - - -// access all housekeeping registers that can be access through firmware and change it's value -void main(){ - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - // store RO value regs - int old_reg_hkspi_status = reg_hkspi_status; - int old_reg_hkspi_chip_id = reg_hkspi_chip_id; - int old_reg_hkspi_user_id = reg_hkspi_user_id; - int old_reg_hkspi_trap = reg_hkspi_trap; - int old_reg_hkspi_irq = reg_hkspi_irq; - // write 1 ones to all registers - reg_mprj_io_0 = 0xFFFFFFFF; - reg_mprj_io_1 = 0xFFFFFFFF; - reg_mprj_io_2 = 0xFFFFFFFF; - reg_mprj_io_3 = 0xFFFFFFFF; - reg_mprj_io_4 = 0xFFFFFFFF; - reg_mprj_io_5 = 0xFFFFFFFF; - reg_mprj_io_6 = 0xFFFFFFFF; - reg_mprj_io_7 = 0xFFFFFFFF; - reg_mprj_io_8 = 0xFFFFFFFF; - reg_mprj_io_9 = 0xFFFFFFFF; - reg_mprj_io_10 = 0xFFFFFFFF; - reg_mprj_io_11 = 0xFFFFFFFF; - reg_mprj_io_12 = 0xFFFFFFFF; - reg_mprj_io_13 = 0xFFFFFFFF; - reg_mprj_io_14 = 0xFFFFFFFF; - reg_mprj_io_15 = 0xFFFFFFFF; - reg_mprj_io_16 = 0xFFFFFFFF; - reg_mprj_io_17 = 0xFFFFFFFF; - reg_mprj_io_18 = 0xFFFFFFFF; - reg_mprj_io_19 = 0xFFFFFFFF; - reg_mprj_io_20 = 0xFFFFFFFF; - reg_mprj_io_21 = 0xFFFFFFFF; - reg_mprj_io_22 = 0xFFFFFFFF; - reg_mprj_io_23 = 0xFFFFFFFF; - reg_mprj_io_24 = 0xFFFFFFFF; - reg_mprj_io_25 = 0xFFFFFFFF; - reg_mprj_io_26 = 0xFFFFFFFF; - reg_mprj_io_27 = 0xFFFFFFFF; - reg_mprj_io_28 = 0xFFFFFFFF; - reg_mprj_io_29 = 0xFFFFFFFF; - reg_mprj_io_30 = 0xFFFFFFFF; - reg_mprj_io_31 = 0xFFFFFFFF; - reg_mprj_io_32 = 0xFFFFFFFF; - reg_mprj_io_33 = 0xFFFFFFFF; - reg_mprj_io_34 = 0xFFFFFFFF; - reg_mprj_io_35 = 0xFFFFFFFF; - reg_mprj_io_36 = 0xFFFFFFFF; - reg_mprj_io_37 = 0xFFFFFFFF; - // house keeping - reg_hkspi_status = 0xFFFFFFFF; - reg_hkspi_chip_id = 0xFFFFFFFF; - reg_hkspi_user_id = 0xFFFFFFFF; - reg_hkspi_pll_ena = 0xFFFFFFFF; - reg_hkspi_pll_bypass = 0xFFFFFFFF; - reg_hkspi_irq = 0xFFFFFFFF; - // reg_hkspi_reset = 0xFFFFFFFF; can't write 1 to it cpu would be reset - reg_hkspi_trap = 0xFFFFFFFF; - reg_hkspi_pll_trim = 0xFFFFFFFF; - reg_hkspi_pll_source = 0xFFFFFFFF; - reg_hkspi_pll_divider = 0xFFFFFFFF; - // sys - reg_clk_out_dest = 0xFFFFFFFF; - reg_hkspi_disable = 0xFFFFFFFF; - - // read ones that has been written - if (reg_mprj_io_0 != 0x1FFF) - reg_debug_1 =0x1; - if (reg_mprj_io_1 != 0x1FFF) - reg_debug_1 =0x2; - if (reg_mprj_io_2 != 0x1FFF) - reg_debug_1 =0x3; - if (reg_mprj_io_3 != 0x1FFF) - reg_debug_1 =0x4; - if (reg_mprj_io_4 != 0x1FFF) - reg_debug_1 =0x5; - if (reg_mprj_io_5 != 0x1FFF) - reg_debug_1 =0x6; - if (reg_mprj_io_6 != 0x1FFF) - reg_debug_1 =0x7; - if (reg_mprj_io_7 != 0x1FFF) - reg_debug_1 =0x8; - if (reg_mprj_io_8 != 0x1FFF) - reg_debug_1 =0x9; - if (reg_mprj_io_9 != 0x1FFF) - reg_debug_1 =0xa; - if (reg_mprj_io_10 != 0x1FFF) - reg_debug_1 =0xb; - if (reg_mprj_io_11 != 0x1FFF) - reg_debug_1 =0xc; - if (reg_mprj_io_12 != 0x1FFF) - reg_debug_1 =0xd; - if (reg_mprj_io_13 != 0x1FFF) - reg_debug_1 =0xe; - if (reg_mprj_io_14 != 0x1FFF) - reg_debug_1 =0xf; - if (reg_mprj_io_15 != 0x1FFF) - reg_debug_1 =0x10; - if (reg_mprj_io_16 != 0x1FFF) - reg_debug_1 =0x11; - if (reg_mprj_io_17 != 0x1FFF) - reg_debug_1 =0x12; - if (reg_mprj_io_18 != 0x1FFF) - reg_debug_1 =0x13; - if (reg_mprj_io_19 != 0x1FFF) - reg_debug_1 =0x14; - if (reg_mprj_io_20 != 0x1FFF) - reg_debug_1 =0x15; - if (reg_mprj_io_21 != 0x1FFF) - reg_debug_1 =0x16; - if (reg_mprj_io_22 != 0x1FFF) - reg_debug_1 =0x17; - if (reg_mprj_io_23 != 0x1FFF) - reg_debug_1 =0x18; - if (reg_mprj_io_24 != 0x1FFF) - reg_debug_1 =0x19; - if (reg_mprj_io_25 != 0x1FFF) - reg_debug_1 =0x1a; - if (reg_mprj_io_26 != 0x1FFF) - reg_debug_1 =0x1b; - if (reg_mprj_io_27 != 0x1FFF) - reg_debug_1 =0x1c; - if (reg_mprj_io_28 != 0x1FFF) - reg_debug_1 =0x1d; - if (reg_mprj_io_29 != 0x1FFF) - reg_debug_1 =0x1e; - if (reg_mprj_io_30 != 0x1FFF) - reg_debug_1 =0x1f; - if (reg_mprj_io_31 != 0x1FFF) - reg_debug_1 =0x20; - if (reg_mprj_io_32 != 0x1FFF) - reg_debug_1 =0x21; - if (reg_mprj_io_33 != 0x1FFF) - reg_debug_1 =0x22; - if (reg_mprj_io_34 != 0x1FFF) - reg_debug_1 =0x23; - if (reg_mprj_io_35 != 0x1FFF) - reg_debug_1 =0x24; - if (reg_mprj_io_36 != 0x1FFF) - reg_debug_1 =0x25; - if (reg_mprj_io_37 != 0x1FFF) - reg_debug_1 =0x26; - // housekeeping - if (reg_hkspi_status != old_reg_hkspi_status) // RO - reg_debug_1 =0x27; - if (reg_hkspi_chip_id != old_reg_hkspi_chip_id) // RO - reg_debug_1 =0x28; - if (reg_hkspi_user_id != old_reg_hkspi_user_id) // RO - reg_debug_1 =0x29; - if (reg_hkspi_pll_ena != 0x3) // size =2 - reg_debug_1 =0x2a; - if (reg_hkspi_pll_bypass != 0x1) // size = 1 - reg_debug_1 = 0x2b; - if (reg_hkspi_irq != old_reg_hkspi_irq) // RO - reg_debug_1 = 0x2c; - if (reg_hkspi_trap != old_reg_hkspi_trap) // RO - reg_debug_1 =0x2d; - if (reg_hkspi_pll_trim != 0x3FFFFFF) // size 26 - reg_debug_1 = 0x2f; - if (reg_hkspi_pll_source != 0x3F) // size 6 bits 0-2 = phase 0 divider, bits 3-5 = phase 90 divider - reg_debug_1 =0x2f; - if (reg_hkspi_pll_divider != 0x1F) // size 7 -> PLL output divider, PLL output divider2 , PLL feedback divider - reg_debug_1 =0x30; - if (reg_hkspi_disable != 0x1) // size 1 - reg_debug_1 =0x31; - if (reg_clk_out_dest != 0x7) // trap and clocks redirect - reg_debug_1 =0x32; - // // write zeros to all registers - reg_mprj_io_0 = 0x0; - reg_mprj_io_1 = 0x0; - reg_mprj_io_2 = 0x0; - reg_mprj_io_3 = 0x0; - reg_mprj_io_4 = 0x0; - reg_mprj_io_5 = 0x0; - reg_mprj_io_6 = 0x0; - reg_mprj_io_7 = 0x0; - reg_mprj_io_8 = 0x0; - reg_mprj_io_9 = 0x0; - reg_mprj_io_10 = 0x0; - reg_mprj_io_11 = 0x0; - reg_mprj_io_12 = 0x0; - reg_mprj_io_13 = 0x0; - reg_mprj_io_14 = 0x0; - reg_mprj_io_15 = 0x0; - reg_mprj_io_16 = 0x0; - reg_mprj_io_17 = 0x0; - reg_mprj_io_18 = 0x0; - reg_mprj_io_19 = 0x0; - reg_mprj_io_20 = 0x0; - reg_mprj_io_21 = 0x0; - reg_mprj_io_22 = 0x0; - reg_mprj_io_23 = 0x0; - reg_mprj_io_24 = 0x0; - reg_mprj_io_25 = 0x0; - reg_mprj_io_26 = 0x0; - reg_mprj_io_27 = 0x0; - reg_mprj_io_28 = 0x0; - reg_mprj_io_29 = 0x0; - reg_mprj_io_30 = 0x0; - reg_mprj_io_31 = 0x0; - reg_mprj_io_32 = 0x0; - reg_mprj_io_33 = 0x0; - reg_mprj_io_34 = 0x0; - reg_mprj_io_35 = 0x0; - reg_mprj_io_36 = 0x0; - reg_mprj_io_37 = 0x0; - // house keeping - reg_hkspi_status = 0x0; - reg_hkspi_chip_id = 0x0; - reg_hkspi_user_id = 0x0; - reg_hkspi_pll_ena = 0x0; - reg_hkspi_pll_bypass = 0x0; - reg_hkspi_irq = 0x0; - reg_hkspi_reset = 0x0; - reg_hkspi_trap = 0x0; - reg_hkspi_pll_trim = 0x0; - reg_hkspi_pll_source = 0x0; - reg_hkspi_pll_divider = 0x0; - // sys - reg_clk_out_dest = 0x0; - reg_hkspi_disable = 0x0; - - // // read zeros that has been written - if (reg_mprj_io_0 != 0x0) - reg_debug_2 =0x1; - if (reg_mprj_io_1 != 0x0) - reg_debug_2 =0x2; - if (reg_mprj_io_2 != 0x0) - reg_debug_2 =0x3; - if (reg_mprj_io_3 != 0x0) - reg_debug_2 =0x4; - if (reg_mprj_io_4 != 0x0) - reg_debug_2 =0x5; - if (reg_mprj_io_5 != 0x0) - reg_debug_2 =0x6; - if (reg_mprj_io_6 != 0x0) - reg_debug_2 =0x7; - if (reg_mprj_io_7 != 0x0) - reg_debug_2 =0x8; - if (reg_mprj_io_8 != 0x0) - reg_debug_2 =0x9; - if (reg_mprj_io_9 != 0x0) - reg_debug_2 =0xa; - if (reg_mprj_io_10 != 0x0) - reg_debug_2 =0xb; - if (reg_mprj_io_11 != 0x0) - reg_debug_2 =0xc; - if (reg_mprj_io_12 != 0x0) - reg_debug_2 =0xd; - if (reg_mprj_io_13 != 0x0) - reg_debug_2 =0xe; - if (reg_mprj_io_14 != 0x0) - reg_debug_2 =0xf; - if (reg_mprj_io_15 != 0x0) - reg_debug_2 =0x10; - if (reg_mprj_io_16 != 0x0) - reg_debug_2 =0x11; - if (reg_mprj_io_17 != 0x0) - reg_debug_2 =0x12; - if (reg_mprj_io_18 != 0x0) - reg_debug_2 =0x13; - if (reg_mprj_io_19 != 0x0) - reg_debug_2 =0x14; - if (reg_mprj_io_20 != 0x0) - reg_debug_2 =0x15; - if (reg_mprj_io_21 != 0x0) - reg_debug_2 =0x16; - if (reg_mprj_io_22 != 0x0) - reg_debug_2 =0x17; - if (reg_mprj_io_23 != 0x0) - reg_debug_2 =0x18; - if (reg_mprj_io_24 != 0x0) - reg_debug_2 =0x19; - if (reg_mprj_io_25 != 0x0) - reg_debug_2 =0x1a; - if (reg_mprj_io_26 != 0x0) - reg_debug_2 =0x1b; - if (reg_mprj_io_27 != 0x0) - reg_debug_2 =0x1c; - if (reg_mprj_io_28 != 0x0) - reg_debug_2 =0x1d; - if (reg_mprj_io_29 != 0x0) - reg_debug_2 =0x1e; - if (reg_mprj_io_30 != 0x0) - reg_debug_2 =0x1f; - if (reg_mprj_io_31 != 0x0) - reg_debug_2 =0x20; - if (reg_mprj_io_32 != 0x0) - reg_debug_2 =0x21; - if (reg_mprj_io_33 != 0x0) - reg_debug_2 =0x22; - if (reg_mprj_io_34 != 0x0) - reg_debug_2 =0x23; - if (reg_mprj_io_35 != 0x0) - reg_debug_2 =0x24; - if (reg_mprj_io_36 != 0x0) - reg_debug_2 =0x25; - if (reg_mprj_io_37 != 0x0) - reg_debug_2 =0x26; - // housekeeping - if (reg_hkspi_status != old_reg_hkspi_status) // RO - reg_debug_2 =0x27; - if (reg_hkspi_chip_id != old_reg_hkspi_chip_id) // RO - reg_debug_2 =0x28; - if (reg_hkspi_user_id != old_reg_hkspi_user_id) // RO - reg_debug_2 =0x29; - if (reg_hkspi_pll_ena != 0x0) // size =2 - reg_debug_2 =0x2a; - if (reg_hkspi_pll_bypass != 0x0) // size = 1 - reg_debug_2 = 0x2b; - if (reg_hkspi_irq != old_reg_hkspi_irq) // RO - reg_debug_2 = 0x2c; - if (reg_hkspi_trap != old_reg_hkspi_trap) // RO - reg_debug_2 =0x2d; - if (reg_hkspi_pll_trim != 0x0) // size 26 - reg_debug_2 = 0x2f; - if (reg_hkspi_pll_source != 0x0) // size 6 bits 0-2 = phase 0 divider, bits 3-5 = phase 90 divider - reg_debug_2 =0x2f; - if (reg_hkspi_pll_divider != 0x0) // size 7 -> PLL output divider, PLL output divider2 , PLL feedback divider - reg_debug_2 =0x30; - if (reg_hkspi_disable != 0x0) // size 1 - reg_debug_2 =0x31; - if (reg_clk_out_dest != 0x0) // trap and clocks redirect - reg_debug_2 =0x32; - - reg_debug_2 = 0xFF; -} - diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/housekeeping_regs_tests.py b/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/housekeeping_regs_tests.py deleted file mode 100644 index e8af4e8b..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_regs/housekeeping_regs_tests.py +++ /dev/null @@ -1,213 +0,0 @@ -from json.encoder import INFINITY -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from tests.housekeeping.housekeeping_spi.spi_access_functions import * -import json -reg = Regs() - - -'''randomly write then read housekeeping regs through wishbone''' -@cocotb.test() -@repot_test -async def hk_regs_wr_wb(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=611,num_error=INFINITY) - cpu = RiskV(dut) - cpu.cpu_force_reset() - with open('wb_models/housekeepingWB/HK_regs.json') as f: - regs = json.load(f) - await ClockCycles(caravelEnv.clk, 10) - # write then read - for i in range(random.randint(7, 20)): - bits_num = 32 - mem = random.choice(['GPIO']) # can't access 'SPI' and 'sys' register from interfaces.cpu / read or write - key = random.choice(list(regs[mem].keys())) - if key == 'base_addr': - continue - key_num = int(key,16) & 0xFC - key = generate_key_from_num(key_num) - address = (int(key,16) + regs[mem]['base_addr'][1]) - if address in [0x26000010,0x2600000c]: # skip testing reg_mprj_datal and reg_mprj_datah because when reading them it's getting the gpio input value - continue - data_in = random.getrandbits(bits_num) - cocotb.log.info(f"[TEST] Writing {bin(data_in)} to {regs[mem][key][0][0]} address {hex(address)} through wishbone") - await cpu.drive_data2address(address,data_in) - #calculate the expected value for each bit - data_exp = '' - keys = [generate_key_from_num(key_num+3),generate_key_from_num(key_num+2),generate_key_from_num(key_num+1),generate_key_from_num(key_num)] - for count , k in enumerate(keys): - for i in range(int(bits_num/len(keys)) * (count),int(bits_num/len(keys)) * (count+1)): - bit_exist = False - if k in regs[mem].keys(): - for field in regs[mem][k]: - field_shift = field[2] - field_size = field[3] - field_access = field[4] - i_temp = (bits_num -1 -i) % (bits_num/4) - if field_shift <= i_temp and i_temp <= (field_shift + field_size-1): - if field_access == "RW": - data_exp += bin(data_in)[2:].zfill(bits_num)[i] - bit_exist = True - break - if not bit_exist: - data_exp += '0' - await ClockCycles(caravelEnv.clk,10) - - cocotb.log.info(f"[TEST] expected data calculated = {data_exp}") - data_out = await cpu.read_address(address) - cocotb.log.info(f"[TEST] Read {bin(data_out)} from {regs[mem][key][0][0]} address {hex(address)} through wishbone") - if data_out != int(data_exp,2): cocotb.log.error(f"[TEST] wrong read from {regs[mem][key][0][0]} address {hex(address)} retuned val= {bin(data_out)[2:].zfill(bits_num)} expected = {data_exp}") - else: cocotb.log.info(f"[TEST] read the right value {hex(data_out)} from {regs[mem][key][0][0]} address {hex(address)} ") - -'''randomly write then read housekeeping regs through wishbone''' -@cocotb.test() -@repot_test -async def hk_regs_wr_wb_cpu(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=182983,num_error=INFINITY) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - reg1 =0 # buffer - reg2 =0 - regs_list = ("reg_hkspi_status","reg_hkspi_chip_id","reg_hkspi_user_id", "reg_hkspi_pll_ena","reg_hkspi_pll_bypass","reg_hkspi_irq","reg_hkspi_trap","reg_hkspi_pll_trim","reg_hkspi_pll_source","reg_hkspi_pll_divide","reg_clk_out_des","reg_hkspi_disable") - while True: - if cpu.read_debug_reg2() == 0xFF: # test finish - break - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - if reg1 < 38: - cocotb.log.error(f"[TEST] error while writing 0xFFFFFFFF to reg_mprj_io_{reg1-1}") - else: - cocotb.log.error(f"[TEST] error while writing 0xFFFFFFFF to {regs_list[reg1-39]}") - if reg2 != cpu.read_debug_reg2(): - reg2 = cpu.read_debug_reg2() - if reg1 < 38: - cocotb.log.error(f"[TEST] error while writing 0x0 to reg_mprj_io_{reg2-1}") - else: - cocotb.log.error(f"[TEST] error while writing 0x0 to {regs_list[reg1-39]}") - await ClockCycles(caravelEnv.clk,1) - -'''randomly write then read housekeeping regs through SPI''' -@cocotb.test() -@repot_test -async def hk_regs_wr_spi(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1851,num_error=INFINITY) - - with open('wb_models/housekeepingWB/HK_regs.json') as f: - regs = json.load(f) - # write then read single byte - for i in range(random.randint(10, 40)): - bits_num = 8 # byte testing - mem = random.choice(['GPIO','SPI','sys']) - key = random.choice(list(regs[mem].keys())) - if key == 'base_addr': - continue - address = regs[mem][key][0][7] - if address in [111,36,10]: # 111 is for Housekeeping SPI disable, writing 1 to this address will disable the SPI and 36 is for mprj_io[03] changing bit 3 of this register would disable the spi by deassert spi_is_enabled and 10 0xa cpu irq is self resetting - continue - # address = int(key,16) - if address in [0x69,0x6A,0x6B,0x6C,0x6D,0x13]: # skip testing reg_mprj_datal and reg_mprj_datah because when reading them it's getting the gpio input value and xfer - continue - data_in = random.getrandbits(bits_num) - cocotb.log.info(f"[TEST] Writing {bin(data_in)} to reg [{regs[mem][key][0][0]}] address {hex(address)} through SPI") - await write_reg_spi(caravelEnv,address=address,data=data_in) - #calculate the expected value for each bit - is_unknown = False - data_exp = '' - for i in range(bits_num): - bit_exist = False - for field in regs[mem][key]: - field_shift = field[2] - field_size = field[3] - field_access = field[4] - reset_val = field[5] - i_temp = bits_num -1 -i - if field_shift <= i_temp and i_temp <= (field_shift + field_size-1): - if field_access == "RW": - data_exp += bin(data_in)[2:].zfill(bits_num)[i] - bit_exist = True - break - else : # read only get the value from reset - data_exp += bin(reset_val)[2:].zfill(bits_num)[i] - bit_exist = True - break - if field_access == "NA": # that mean the value is unknown as the register value can change by hardware mostly the reg value is input to the housekeeping from other blocks - is_unknown = True - break - if not bit_exist: - data_exp += '0' - if is_unknown:# that mean the value is unknown as the register value can change by hardware mostly the reg value is input to the housekeeping from other blocks - continue - - await ClockCycles(caravelEnv.clk,10) - cocotb.log.info(f"[TEST] expected data calculated = {data_exp}") - data_out = await read_reg_spi(caravelEnv,address=address) - cocotb.log.info(f"[TEST] Read {bin(data_out)} from [{regs[mem][key][0][0]}] address {hex(address)} through SPI") - if data_out != int(data_exp,2): cocotb.log.error(f"[TEST] wrong read from [{regs[mem][key][0][0]}] address {hex(address)} retuned val= {bin(data_out)[2:].zfill(bits_num)} expected = {data_exp}") - else: cocotb.log.info(f"[TEST] read the right value {hex(data_out)} from [{regs[mem][key][0][0]}] address {address} ") - -'''check reset value of house keeping register''' -@cocotb.test() -@repot_test -async def hk_regs_rst_spi(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=2879,num_error=INFINITY) - - with open('wb_models/housekeepingWB/HK_regs.json') as f: - regs = json.load(f) - # read - bits_num = 8 # byte testing - mems = ['GPIO','SPI','sys'] - - for mem in mems: - keys = [k for k in regs[mem].keys()] - for key in keys: - if key == 'base_addr': - continue - address = regs[mem][key][0][7] - if address in [0x69,0x6A,0x6B,0x6C,0x6D,0x1A]: # skip testing reg_mprj_datal, reg_mprj_datah and usr2_vdd_pwrgood because when reading them it's getting the gpio input value - continue - #calculate the expected value for each bit for reset value - data_exp = '' - # for i in range(bits_num): - bit_exist = False - for field in regs[mem][key]: - field_shift = field[2] - field_size = field[3] - field_access = field[4] - reset_val = field[5] - i_temp = bits_num -1 #-i - # if field_shift <= i_temp and i_temp <= (field_shift + field_size-1): - data_exp = bin(reset_val)[2:].zfill(field_size) + data_exp - print (f'reset = {bin(reset_val)[2:].zfill(bits_num)} data exp = {data_exp} i temp = {i_temp} shift {field_shift} size {field_size}') - # bit_exist = True - # break - # if not bit_exist: - # data_exp += '0' - - cocotb.log.info(f"[TEST] expected reset value for [{regs[mem][key][0][0]}] is {data_exp}") - data_out = await read_reg_spi(caravelEnv,address=address) - cocotb.log.info(f"[TEST] Read {bin(data_out)} from [{regs[mem][key][0][0]}] address {hex(address)} through wishbone") - if data_out != int(data_exp,2): cocotb.log.error(f"[TEST] wrong reset value read from [{regs[mem][key][0][0]}] address {address} retuned val= {bin(data_out)[2:].zfill(bits_num)} expected = {data_exp}") - else: cocotb.log.info(f"[TEST] read the right reset value {hex(data_out)} from [{regs[mem][key][0][0]}] address {address} ") - - - - -def generate_key_from_num(num): - hex_string = hex(num) - hex_list = [i for i in hex_string] - if len(hex_list)==3: - hex_list.insert(2,'0') - hex_string = "".join(hex_list) - return hex_string - - - - diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/spi.py b/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/spi.py deleted file mode 100644 index b0731a91..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/spi.py +++ /dev/null @@ -1,42 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles,Timer -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.spi_master.SPI_VIP import read_mem ,SPI_VIP -from tests.housekeeping.housekeeping_spi.spi_access_functions import * - - -bit_time_ns = 0 -reg = Regs() - - -@cocotb.test() -@repot_test -async def spi_rd_wr_nbyte(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=14833) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info (f"[TEST] start spi_rd_wr_nbyte test") - nbytes_limits= 8 - # writing to the random number(1 to 8) of bits after 0x1E (gpio_configure[4]) address avoid changing gpio 3 - for j in range(3): - address = random.randint(0x26 , 0x67-nbytes_limits) - n_bytes = random.randint(1,nbytes_limits) - await write_reg_spi_nbytes(caravelEnv,address,[0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F],nbytes_limits) - await write_reg_spi_nbytes(caravelEnv,address,[0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0],n_bytes) - data = await read_reg_spi_nbytes(caravelEnv,address,nbytes_limits) - for i in range(nbytes_limits): - if i >= n_bytes: - if data[i] != 0x1F: - cocotb.log.error(f"[TEST] register {i} has returned value {data[i]} while it should return value 0x1F n_bytes = {n_bytes}") - else: cocotb.log.info(f"[TEST] successful read 0 from register {i} n_bytes = {n_bytes}") - else: - if data[i] != 0: - cocotb.log.error(f"[TEST] register number {i} has returned value {data[i]} > 0 while it should return value == 0 n_bytes = {n_bytes}") - else: cocotb.log.info(f"[TEST] successful read {data[i]} from register {i} n_bytes = {n_bytes}") - await ClockCycles(caravelEnv.clk,200) \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/spi_access_functions.py b/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/spi_access_functions.py deleted file mode 100644 index b8c6184e..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/spi_access_functions.py +++ /dev/null @@ -1,58 +0,0 @@ - - -async def write_reg_spi(caravelEnv,address,data): - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(address) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(data) # Data = 0x01 (enable bit-bang mode) - await caravelEnv.disable_csb() - - -async def read_reg_spi(caravelEnv,address): - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x40) # read stream command - await caravelEnv.hk_write_byte(address) # Address - data = await caravelEnv.hk_read_byte() # Data = 0x01 (enable bit-bang mode) - await caravelEnv.disable_csb() - return data - -async def write_reg_spi_nbytes(caravelEnv,address,data,n_bytes): - write_command = 0x2 << 6 | n_bytes << 3 - print(f"command = {hex(write_command)}") - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(write_command) # Write n byte command - await caravelEnv.hk_write_byte(address) # Address (register 19 = GPIO bit-bang control) - for byte in data: - await caravelEnv.hk_write_byte(byte) # Data = 0x01 (enable bit-bang mode) - await caravelEnv.disable_csb() - - -async def read_reg_spi_nbytes(caravelEnv,address,n_bytes): - data =[] - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x40) # read stream command - await caravelEnv.hk_write_byte(address) # Address - for i in range(n_bytes): - data.append(await caravelEnv.hk_read_byte()) # Data = 0x01 (enable bit-bang mode) - await caravelEnv.disable_csb() - return data - -async def reg_spi_user_pass_thru(caravelEnv,command,address): - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0xc2) # Apply user pass-thru command to housekeeping SPI - await caravelEnv.hk_write_byte(command) # read command - address = address.to_bytes(3,'big') - await caravelEnv.hk_write_byte(address[0]) # high byte - await caravelEnv.hk_write_byte(address[1]) # middle byte - await caravelEnv.hk_write_byte(address[2]) # low byte - -async def reg_spi_user_pass_thru_read(caravelEnv): - data = await caravelEnv.hk_read_byte() - return data - -# use for configure in mgmt pass thru or user pass thru -async def reg_spi_op(caravelEnv,command,address): - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(command) # command - await caravelEnv.hk_write_byte(address) # Address - await caravelEnv.disable_csb() diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/spi_rd_wr_nbyte.c b/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/spi_rd_wr_nbyte.c deleted file mode 100644 index 251067b3..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/spi_rd_wr_nbyte.c +++ /dev/null @@ -1,10 +0,0 @@ -#include -#include - -// Empty C code - -void main() -{ - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - return; -} diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/test_data b/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/test_data deleted file mode 100644 index 287a0cf9..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/test_data +++ /dev/null @@ -1,3 +0,0 @@ -@00000000 -6F 00 00 0B 93 01 00 00 13 02 63 57 b5 00 23 20 -13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/user_pass_thru.py b/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/user_pass_thru.py deleted file mode 100644 index c37df7d3..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/user_pass_thru.py +++ /dev/null @@ -1,50 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles,Timer -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.spi_master.SPI_VIP import read_mem ,SPI_VIP -from tests.housekeeping.housekeeping_spi.spi_access_functions import * - - -bit_time_ns = 0 -reg = Regs() - - -@cocotb.test() -@repot_test -async def user_pass_thru_rd(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=13771) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info (f"[TEST] start spi_master_rd test") - file_name = f"{os.getenv('CARAVEL_VERILOG_PATH')}/dv/cocotb/tests/housekeeping/housekeeping_spi/test_data" - mem = read_mem(file_name) - await cocotb.start(SPI_VIP(dut.bin8_monitor,dut.bin9_monitor,dut.bin10_monitor,(dut.bin11_en,dut.bin11),mem)) # fork for SPI - await wait_reg1(cpu,caravelEnv,0XAA) - cocotb.log.info (f"[TEST] Configuration finished") - #The SPI flash may need to be reset - # 0xff and 0xAB commands are suppose to have functionality in the future but for now they would do nothing - await write_reg_spi(caravelEnv,0xc2,0xff) # 0xc2 is for appling user pass-thru command to housekeeping SPI - await write_reg_spi(caravelEnv,0xc2,0xab) # 0xc2 is for appling user pass-thru command to housekeeping SPI - - # start reading from memory - address = 0x0 - await reg_spi_user_pass_thru(caravelEnv,command = 0x3,address=address) # read command - for i in range(8): - val = await reg_spi_user_pass_thru_read(caravelEnv) - if val != mem[address]: - cocotb.log.error(f"[TEST] reading incorrect value from address {hex(address)} expected = {hex(mem[address])} returened = {val}") - else: - cocotb.log.info(f"[TEST] reading correct value {hex(val)} from address {hex(address)} ") - address +=1 - - await caravelEnv.disable_csb() - - # Wait for processor to restart - await wait_reg1(cpu,caravelEnv,0xBB) - cocotb.log.info(f"[TEST] processor has restarted successfully") diff --git a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/user_pass_thru_rd.c b/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/user_pass_thru_rd.c deleted file mode 100644 index 7e2d18dd..00000000 --- a/verilog/dv/cocotb/tests/housekeeping/housekeeping_spi/user_pass_thru_rd.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include - - - -void main() -{ - // This program is just to keep the processor busy while the - // housekeeping SPI is being accessed. to show that the - // processor is halted while the SPI is accessing the - // flash SPI in pass-through mode. - - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - // Management needs to apply output on these pads to access the user area SPI flash - reg_mprj_io_11 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; // SDI - reg_mprj_io_10 = GPIO_MODE_MGMT_STD_OUTPUT; // SDO - reg_mprj_io_9 = GPIO_MODE_MGMT_STD_OUTPUT; // clk - reg_mprj_io_8 = GPIO_MODE_MGMT_STD_OUTPUT; // csb - - - // Apply configuration - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - // Start test - reg_debug_1 = 0xAA; - reg_debug_1 = 0xBB; - reg_uart_enable = 1; - - // Test in progress - reg_mprj_datal = 0xa5000000; - - // Test message -// print("Test message\n"); - print("ABC\n"); - - for (int i=0; i<1200; i++); - - // End test - reg_debug_1 = 0xFF; -} - diff --git a/verilog/dv/cocotb/tests/irq/IRQ_external.c b/verilog/dv/cocotb/tests/irq/IRQ_external.c deleted file mode 100644 index b717d875..00000000 --- a/verilog/dv/cocotb/tests/irq/IRQ_external.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include -#include - -#include - -/* -Testing timer interrupts -Enable interrupt for IRQ external pin mprj_io[7] -> should be drived to 1 by the environment -**NOTE** housekeeping SPI should used to update register irq_1_inputsrc to 1 see verilog code - - @wait for environment to make mprj[7] high - send packet size = 1 - - @received interrupt correctly test pass - send packet size = 5 - - @ timeout test fail - send packet size = 9 - - @ end test - send packet size = 3 - send packet size = 3 - send packet size = 3 - -*/ - -extern uint16_t flag; - -void main(){ - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - // setting bit 7 as input - reg_mprj_io_7 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - - // automatic bitbang approach - if(1){ - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - } - irq_setmask(0); - irq_setie(1); - irq_setmask(irq_getmask() | (1 << USER_IRQ_4_INTERRUPT)); - reg_user4_irq_en =1; - - // test interrrupt happen when mprj[7] is asserted - reg_debug_2 = 0xAA; //wait for environment to make mprj[7] high - flag = 0; - // Loop, waiting for the interrupt to change reg_mprj_datah - bool is_pass = false; - int timeout = 40; - - for (int i = 0; i < timeout; i++){ - if (flag == 1){ - reg_debug_1 = 0x1B; //test pass irq sent at mprj 7 - is_pass = true; - break; - } - } - if (!is_pass){ - reg_debug_1 = 0x1E; // timeout - } - - // test interrupt doesn't happened when mprj[7] is deasserted - reg_debug_2 = 0xBB; - flag = 0; - // Loop, waiting for the interrupt to change reg_mprj_datah - is_pass = false; - - for (int i = 0; i < timeout; i++){ - if (flag == 1){ - reg_debug_1 = 0x2E; //test fail interrupt isn't suppose to happened - is_pass = true; - break; - } - } - if (!is_pass){ - reg_debug_1 = 0x2B; // test pass - } - - // test finish - reg_debug_2 = 0xFF; -} diff --git a/verilog/dv/cocotb/tests/irq/IRQ_external.py b/verilog/dv/cocotb/tests/irq/IRQ_external.py deleted file mode 100644 index a331f315..00000000 --- a/verilog/dv/cocotb/tests/irq/IRQ_external.py +++ /dev/null @@ -1,69 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from tests.housekeeping.housekeeping_spi.spi_access_functions import * - - - -reg = Regs() -"""Testbench of GPIO configuration through bit-bang method using the StriVe housekeeping SPI.""" -@cocotb.test() -@repot_test -async def IRQ_external(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=155225) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start IRQ_external test") - pass_list = (0x1B,0x2B) - fail_list = (0x1E,0x2E) - phases_fails = 2 - phases_passes = 0 - reg1 =0 # buffer - reg2 = 0 #buffer - - - while True: - if reg2 != cpu.read_debug_reg2(): - reg2 = cpu.read_debug_reg2() - if reg2 == 0xFF: # test finish - break - if reg2 == 0xAA: # assert mprj 7 - await write_reg_spi(caravelEnv,0x1c,1) - cocotb.log.info(f"irq 1 = {dut.uut.housekeeping.irq_1_inputsrc.value}") - caravelEnv.drive_gpio_in((7,7),0) - await ClockCycles(caravelEnv.clk,10) - caravelEnv.drive_gpio_in((7,7),1) - - if reg2 == 0xBB: # deassert mprj 7 - caravelEnv.drive_gpio_in((7,7),0) - - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - if reg1 in pass_list: # pass phase - phases_passes +=1 - phases_fails -=1 - if reg1 == 0x1B: - cocotb.log.info(f"[TEST] Pass interrupt is detected when mprj 7 asserted") - elif reg1 == 0x2B: - cocotb.log.info(f"[TEST] Pass interrupt isn't detected when mprj 7 deasserted") - elif reg1 in fail_list: # pass phase - if reg1 == 0x1E: - cocotb.log.error(f"[TEST] Failed interrupt isn't detected when mprj 7 asserted") - elif reg1 == 0x2E: - cocotb.log.error(f"[TEST] Failed interrupt is detected when mprj 7 deasserted") - else: - cocotb.log.error(f"[TEST] debug register 1 has illegal value") - await ClockCycles(caravelEnv.clk,10) - - if phases_fails != 0: - cocotb.log.error(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - else: - cocotb.log.info(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/irq/IRQ_timer.c b/verilog/dv/cocotb/tests/irq/IRQ_timer.c deleted file mode 100644 index 34a9523e..00000000 --- a/verilog/dv/cocotb/tests/irq/IRQ_timer.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include -#include - -#include - - -extern uint16_t flag; - -void main(){ - uint16_t data; - int i; - - - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - irq_setmask(0); - irq_setie(1); - - - irq_setmask(irq_getmask() | (1 << TIMER0_INTERRUPT)); - reg_debug_2 = 0xAA; //wait for timer to send irq - - flag = 0; - /* Configure timer for a single-shot countdown */ - reg_timer0_config = 0; - reg_timer0_data = 30; - reg_timer0_irq_en = 1; - reg_timer0_config = 1; - - // Loop, waiting for the interrupt to change reg_mprj_datah - bool is_pass = false; - int timeout = 40; - - for (int i = 0; i < timeout; i++){ - if (flag == 1){ - reg_debug_1 = 0x1B; //test pass irq sent at timer0 - is_pass = true; - break; - } - } - if (!is_pass){ - reg_debug_1 = 0x1E; // timeout - } - flag = 0; - // test interrupt doesn't happened when timer isnt used - reg_debug_2 = 0xBB; - reg_timer0_config = 0; // disable counter - flag = 0; - // Loop, waiting for the interrupt to change reg_mprj_datah - is_pass = false; - - for (int i = 0; i < timeout; i++){ - if (flag == 1){ - reg_debug_1 = 0x2E; //test fail interrupt isn't suppose to happened - is_pass = true; - break; - } - } - if (!is_pass){ - reg_debug_1 = 0x2B; // test pass - } - - // test finish - reg_debug_2 = 0xFF; - -} - diff --git a/verilog/dv/cocotb/tests/irq/IRQ_timer.py b/verilog/dv/cocotb/tests/irq/IRQ_timer.py deleted file mode 100644 index 6fb48b8e..00000000 --- a/verilog/dv/cocotb/tests/irq/IRQ_timer.py +++ /dev/null @@ -1,51 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE - -reg = Regs() -"""Testbench of GPIO configuration through bit-bang method using the StriVe housekeeping SPI.""" -@cocotb.test() -@repot_test -async def IRQ_timer(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=152854) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start IRQ_timer test") - pass_list = (0x1B,0x2B) - fail_list = (0x1E,0x2E) - phases_fails = 2 - phases_passes = 0 - reg1 =0 # buffer - while True: - if cpu.read_debug_reg2() == 0xFF: # test finish - break - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - if reg1 in pass_list: # pass phase - phases_passes +=1 - phases_fails -=1 - if reg1 == 0x1B: - cocotb.log.info(f"[TEST] Pass interrupt is detected when timer is used") - elif reg1 == 0x2B: - cocotb.log.info(f"[TEST] Pass interrupt isn't detected when timer isnt used") - elif reg1 in fail_list: # pass phase - if reg1 == 0x1E: - cocotb.log.info(f"[TEST] Failed interrupt isn't detected when timer is used") - elif reg1 == 0x2E: - cocotb.log.error(f"[TEST] Failed interrupt is detected when timer isnt used") - else: - cocotb.log.error(f"[TEST] debug register 1 has illegal value") - await ClockCycles(caravelEnv.clk,10) - - if phases_fails != 0: - cocotb.log.error(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - else: - cocotb.log.info(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/irq/IRQ_uart.c b/verilog/dv/cocotb/tests/irq/IRQ_uart.c deleted file mode 100644 index db4136c3..00000000 --- a/verilog/dv/cocotb/tests/irq/IRQ_uart.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ -#include - -#include -#include -#include -#include -#include - - - - -extern uint16_t flag; - -void main(){ - flag = 0; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = 0x1803; - - if(1){ - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - } - reg_uart_enable = 1; - reg_uart_irq_en =1; - irq_setmask(0); - irq_setie(1); - - - irq_setmask(irq_getmask() | (1 << UART_INTERRUPT)); - - reg_debug_2 = 0xAA; //start sending data through the uart - print("M"); - - // Loop, waiting for the interrupt to change reg_mprj_datah - bool is_pass = false; - int timeout = 100; - - for (int i = 0; i < timeout; i++){ - if (flag == 1){ - reg_debug_1 = 0x1B; //test pass irq sent - is_pass = true; - break; - } - } - if (!is_pass){ - reg_debug_1 = 0x1E; // timeout - } - // test interrupt doesn't happened nothing sent at uart - reg_debug_2 = 0xBB; - flag = 0; - // Loop, waiting for the interrupt to change reg_mprj_datah - is_pass = false; - - for (int i = 0; i < timeout; i++){ - if (flag == 1){ - reg_debug_1 = 0x2E; //test fail interrupt isn't suppose to happened - is_pass = true; - break; - } - } - if (!is_pass){ - reg_debug_1 = 0x2B; // test pass - } - // test finish - reg_debug_2 = 0xFF; - -} - diff --git a/verilog/dv/cocotb/tests/irq/IRQ_uart.py b/verilog/dv/cocotb/tests/irq/IRQ_uart.py deleted file mode 100644 index 3fc202bc..00000000 --- a/verilog/dv/cocotb/tests/irq/IRQ_uart.py +++ /dev/null @@ -1,64 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE - -async def write_reg_spi(caravelEnv,address,data): - await caravelEnv.enable_csb() - await caravelEnv.hk_write_byte(0x80) # Write stream command - await caravelEnv.hk_write_byte(address) # Address (register 19 = GPIO bit-bang control) - await caravelEnv.hk_write_byte(data) # Data = 0x01 (enable bit-bang mode) - await caravelEnv.disable_csb() - -reg = Regs() -"""Testbench of GPIO configuration through bit-bang method using the StriVe housekeeping SPI.""" -@cocotb.test() -@repot_test -async def IRQ_uart(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=318039) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start IRQ_uart test") - pass_list = (0x1B,0x2B) - fail_list = (0x1E,0x2E) - phases_fails = 2 - phases_passes = 0 - reg1 =0 # buffer - reg2 = 0 #buffer - while True: - if reg2 != cpu.read_debug_reg2(): - reg2 = cpu.read_debug_reg2() - if reg2 == 0xFF: # test finish - break - if reg2 == 0xAA: - cocotb.log.info(f"[TEST] start sending through uart") - - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - if reg1 in pass_list: # pass phase - phases_passes +=1 - phases_fails -=1 - if reg1 == 0x1B: - cocotb.log.info(f"[TEST] Pass interrupt is detected when uart is sending data") - elif reg1 == 0x2B: - cocotb.log.info(f"[TEST] Pass interrupt isn't detected when uart isnt sending data") - elif reg1 in fail_list: # pass phase - if reg1 == 0x1E: - cocotb.log.info(f"[TEST] Failed interrupt isn't detected uart is sending data") - elif reg1 == 0x2E: - cocotb.log.error(f"[TEST] Failed interrupt is detected uart isnt sending data") - else: - cocotb.log.error(f"[TEST] debug register 1 has illegal value") - await ClockCycles(caravelEnv.clk,10) - - if phases_fails != 0: - cocotb.log.error(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - else: - cocotb.log.info(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/logicAnalyzer/.vscode/c_cpp_properties.json b/verilog/dv/cocotb/tests/logicAnalyzer/.vscode/c_cpp_properties.json deleted file mode 100644 index 862aed87..00000000 --- a/verilog/dv/cocotb/tests/logicAnalyzer/.vscode/c_cpp_properties.json +++ /dev/null @@ -1,16 +0,0 @@ -{ - "configurations": [ - { - "name": "Linux", - "includePath": [ - "${workspaceFolder}/**" - ], - "defines": [], - "compilerPath": "/usr/bin/gcc", - "cStandard": "gnu17", - "cppStandard": "gnu++14", - "intelliSenseMode": "linux-gcc-x64" - } - ], - "version": 4 -} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/logicAnalyzer/la.c b/verilog/dv/cocotb/tests/logicAnalyzer/la.c deleted file mode 100644 index bf41334b..00000000 --- a/verilog/dv/cocotb/tests/logicAnalyzer/la.c +++ /dev/null @@ -1,112 +0,0 @@ - -#include -#include - -void main(){ - unsigned int i, j, k; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - reg_hkspi_disable = 1; - - // Configure LA probes [63:32] and [127:96] as inputs to the cpu - // Configure LA probes [31:0] and [63:32] as outputs from the cpu - reg_la0_oenb = reg_la0_iena = 0xFFFFFFFF; // [31:0] - reg_la1_oenb = reg_la1_iena = 0x00000000; // [63:32] - reg_la2_oenb = reg_la2_iena = 0xFFFFFFFF; // [95:64] - reg_la3_oenb = reg_la3_iena = 0x00000000; // [127:96] - - reg_la0_data = 0xAAAAAAAA; - reg_la2_data = 0xAAAAAAAA; - - reg_debug_2 = reg_la1_data_in; - if (reg_la1_data_in != 0xAAAAAAAA) - reg_debug_1 = 0x1E; - else - reg_debug_1 = 0x1B; - reg_debug_2 = reg_la3_data_in; - if (reg_la3_data_in != 0xAAAAAAAA) - reg_debug_1 = 0x2E; - else - reg_debug_1 = 0x2B; - - reg_la0_data = 0x55555555; - reg_la2_data = 0x55555555; - - reg_debug_2 = reg_la1_data_in; - if (reg_la1_data_in != 0x55555555) - reg_debug_1 = 0x3E; - else - reg_debug_1 = 0x3B; - - reg_debug_2 = reg_la3_data_in; - if (reg_la3_data_in != 0x55555555) - reg_debug_1 = 0x4E; - else - reg_debug_1 = 0x4B; - - // Configure LA probes [31:0] and [63:32] as inputs to the cpu - // Configure LA probes [63:32] and [127:96] as outputs from the cpu - reg_la0_oenb = reg_la0_iena = 0x00000000; // [31:0] - reg_la1_oenb = reg_la1_iena = 0xFFFFFFFF; // [63:32] - reg_la2_oenb = reg_la2_iena = 0x00000000; // [95:64] - reg_la3_oenb = reg_la3_iena = 0xFFFFFFFF; // [127:96] - - reg_la1_data = 0xAAAAAAAA; - reg_la3_data = 0xAAAAAAAA; - - reg_debug_2 = reg_la0_data_in; - if (reg_la0_data_in != 0xAAAAAAAA) - reg_debug_1 = 0x5E; - else - reg_debug_1 = 0x5B; - - reg_debug_2 = reg_la2_data_in; - if (reg_la2_data_in != 0xAAAAAAAA) - reg_debug_1 = 0x6E; - else - reg_debug_1 = 0x6B; - - reg_la1_data = 0x55555555; - reg_la3_data = 0x55555555; - - reg_debug_2 = reg_la0_data_in; - if (reg_la0_data_in != 0x55555555) - reg_debug_1 = 0x7E; - else - reg_debug_1 = 0x7B; - - reg_debug_2 = reg_la2_data_in; - if (reg_la2_data_in != 0x55555555) - reg_debug_1 = 0x8E; - else - reg_debug_1 = 0x8B; - - // Configure LA probes [31:0] and [63:32] as inputs to the cpu - // Configure LA probes [63:32] and [127:96] as disabled input and output - reg_la0_oenb = reg_la0_iena = 0x00000000; // [31:0] - reg_la1_oenb = reg_la1_iena = 0xFFFFFFFF; // [63:32] - reg_la2_oenb = reg_la2_iena = 0x00000000; // [95:64] - reg_la3_oenb = reg_la3_iena = 0xFFFFFFFF; // [127:96] - - reg_la1_iena = reg_la3_iena = 0x00000000; // disable input for la1 and la3 - - reg_la1_data = 0xAAAAAAAA; - reg_la3_data = 0xAAAAAAAA; - - reg_debug_2 = reg_la0_data_in; - if (reg_la0_data == 0xAAAAAAAA) - reg_debug_1 = 0x9E; - else - reg_debug_1 = 0x9B; - - reg_debug_2 = reg_la2_data_in; - if (reg_la2_data == 0xAAAAAAAA) - reg_debug_1 = 0xaE; - else - reg_debug_1 = 0xaB; - - reg_debug_2 = 0xFF; - - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); -} diff --git a/verilog/dv/cocotb/tests/logicAnalyzer/la.py b/verilog/dv/cocotb/tests/logicAnalyzer/la.py deleted file mode 100644 index 3c1cdd8b..00000000 --- a/verilog/dv/cocotb/tests/logicAnalyzer/la.py +++ /dev/null @@ -1,48 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from cocotb.binary import BinaryValue - -reg = Regs() - -@cocotb.test() -@repot_test -async def la(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=67415) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - pass_list = (0x1B,0x2B,0x3B,0x4B,0x5B,0x6B,0x7B,0x8B,0x9B,0xaB) - fail_list = (0x1E,0x2E,0x3E,0x4E,0x5E,0x6E,0x7E,0x8E,0x9E,0xaE) - phases_fails = 10 - phases_passes = 0 - reg1 =0 # buffer - while True: - if cpu.read_debug_reg2() == 0xFF: # test finish - break - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - if reg1 in pass_list: # pass phase - phases_passes +=1 - phases_fails -=1 - cocotb.log.info(f"[TEST] test passes phase {hex(reg1)[2]}") - elif reg1 in fail_list: # fail phase - cocotb.log.error(f"[TEST] test fails phase {hex(reg1)[2]} incorrect value recieved {hex(cpu.read_debug_reg2())}") - - await ClockCycles(caravelEnv.clk,1) - - if phases_fails != 0: - cocotb.log.error(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - else: - cocotb.log.info(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - - await ClockCycles(caravelEnv.clk, 10000) - - \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/mem/mem_dff.c b/verilog/dv/cocotb/tests/mem/mem_dff.c deleted file mode 100644 index c7064798..00000000 --- a/verilog/dv/cocotb/tests/mem/mem_dff.c +++ /dev/null @@ -1,33 +0,0 @@ -#include - -#define BYTE_SIZE 800 -#define SHORT_SIZE BYTE_SIZE/2 -#define INT_SIZE BYTE_SIZE/4 -void main() -{ - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - unsigned int *dff_start_address = (unsigned int *) 0x00000000; - unsigned int dff_size = 0x400/4; - - for (unsigned int i = 0; i < dff_size; i++){ - unsigned int data = (i + 7)*13; - *(dff_start_address+i) = data; - } - bool is_fail = false; - for (unsigned int i = 0; i < dff_size; i++){ - unsigned int data = (i + 7)*13; - if (data != *(dff_start_address+i)){ - reg_debug_2 = i; - reg_debug_1 = 0x1E; - is_fail = true; - break; - } - } - - if (!is_fail) - reg_debug_1 = 0x1B; - -} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/mem/mem_dff2.c b/verilog/dv/cocotb/tests/mem/mem_dff2.c deleted file mode 100644 index 19ddd710..00000000 --- a/verilog/dv/cocotb/tests/mem/mem_dff2.c +++ /dev/null @@ -1,33 +0,0 @@ -#include - -#define BYTE_SIZE 800 -#define SHORT_SIZE BYTE_SIZE/2 -#define INT_SIZE BYTE_SIZE/4 -void main() -{ - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - unsigned int *dff2_start_address = (unsigned int *) 0x00000400; - unsigned int dff2_size = 0x200 / 4; - - for (unsigned int i = 0; i < dff2_size; i++){ - unsigned int data = (i + 7)*13; - *(dff2_start_address+i) = data; - } - bool is_fail = false; - for (unsigned int i = 0; i < dff2_size; i++){ - unsigned int data = (i + 7)*13; - if (data != *(dff2_start_address+i)){ - reg_debug_2 = i; - reg_debug_1 = 0x1E; - is_fail = true; - break; - } - } - - if (!is_fail) - reg_debug_1 = 0x1B; - -} \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/mem/mem_stress.py b/verilog/dv/cocotb/tests/mem/mem_stress.py deleted file mode 100644 index 9e856c7a..00000000 --- a/verilog/dv/cocotb/tests/mem/mem_stress.py +++ /dev/null @@ -1,60 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE - -reg = Regs() -@cocotb.test() -@repot_test -async def mem_dff2(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1309819) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start mem stress test") - pass_list = [0x1B] - fail_list = [0x1E] - reg1 =0 # buffer - while True: - if cpu.read_debug_reg1() == 0xFF: # test finish - break - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - if reg1 in pass_list: # pass phase - cocotb.log.info(f"[TEST] pass writing and reading all dff2 memory ") - break - elif reg1 in fail_list: # pass phase - cocotb.log.error(f"[TEST] failed access address {hex(0x00000400 + cpu.read_debug_reg2())}") - break - await ClockCycles(caravelEnv.clk,100) - - -@cocotb.test() -@repot_test -async def mem_dff(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=2096205) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start mem stress test") - pass_list = [0x1B] - fail_list = [0x1E] - reg1 =0 # buffer - while True: - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - if reg1 in pass_list: # pass phase - cocotb.log.info(f"[TEST] pass writing and reading all dff memory ") - break - elif reg1 in fail_list: # pass phase - cocotb.log.error(f"[TEST] failed access address {hex(0x00000400 + cpu.read_debug_reg2())}") - break - await ClockCycles(caravelEnv.clk,100) - - \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio.py b/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio.py deleted file mode 100644 index c6701c34..00000000 --- a/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio.py +++ /dev/null @@ -1,166 +0,0 @@ -import random -import re -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE - -reg = Regs() -"""Testbench of GPIO configuration through bit-bang method using the StriVe housekeeping SPI.""" -@cocotb.test() -@repot_test -async def mgmt_gpio_out(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=91385) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start mgmt_gpio_out test") - phases_fails = 3 - phases_passes = 0 - reg1 =0 # buffer - reg2 = 0 #buffer - - while True: - if reg2 != cpu.read_debug_reg2(): - reg2 = cpu.read_debug_reg2() - if reg2 == 0xFF: # test finish - break - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - cocotb.log.info(f"[TEST] waiting for {reg1} blinks") - for i in range(reg1): - while (True): - if caravelEnv.monitor_mgmt_gpio() == 0: - break - if reg1 != cpu.read_debug_reg1(): - cocotb.log.error("[TEST] error failing to catch all blinking ") - return - await ClockCycles(caravelEnv.clk,10) - - while (True): - if caravelEnv.monitor_mgmt_gpio() == 1: - break - if reg1 != cpu.read_debug_reg1(): - cocotb.log.error("[TEST] error failing to catch all blinking ") - return - await ClockCycles(caravelEnv.clk,10) - cocotb.log.info("[TEST] passing sending {reg1} blinks ") - phases_fails -=1 - phases_passes +=1 - await ClockCycles(caravelEnv.clk,10) - - if phases_fails != 0: - cocotb.log.error(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - else: - cocotb.log.info(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - - -@cocotb.test() -@repot_test -async def mgmt_gpio_in(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=277033) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start mgmt_gpio_in test") - phases_fails = 3 - phases_passes = 0 - pass_list = (0x1B,0x2B,0xFF) - fail_list = tuple([0xEE]) - reg1 =0 # buffer - reg2 = 0 #buffer - - while True: - if reg2 != cpu.read_debug_reg2(): - reg2 = cpu.read_debug_reg2() - if reg2 in pass_list: - cocotb.log.info (f"[TEST] reg2 = {reg2}") - phases_passes +=1 - phases_fails -=1 - if reg2 == 0xFF: # test finish - break - elif reg2 == 0x1B: - cocotb.log.info(f"[TEST] pass sending 10 blink ") - elif reg2 == 0x2B: - cocotb.log.info(f"[TEST] pass sending 20 blink ") - if reg2 in fail_list: - cocotb.log.error(f"[TEST] gpio change without sending anything") - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - cocotb.log.info(f"[TEST] start sending {reg1} blinks") - for i in range(reg1): - caravelEnv.drive_mgmt_gpio(1) - await wait_reg2(cpu,caravelEnv,0XAA) - caravelEnv.drive_mgmt_gpio(0) - await wait_reg2(cpu,caravelEnv,0XBB) - cocotb.log.info(f"[TEST] finish sending {reg1} blinks ") - await ClockCycles(caravelEnv.clk,10) - - if phases_fails != 0: - cocotb.log.error(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - else: - cocotb.log.info(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - - - - -@cocotb.test() -@repot_test -async def mgmt_gpio_bidir(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=194697) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start mgmt_gpio_bidir test") - phases_fails = 3 - phases_passes = 0 - pass_list = (0x1B,0x2B,0xFF) - fail_list = tuple([0xEE]) - reg2 = 0 #buffer - - await wait_reg1(cpu,caravelEnv,0XAA) - num_blinks = random.randint(1, 20) - cocotb.log.info (f"[TEST] start send {num_blinks} blinks") - for i in range(num_blinks): - if i == num_blinks-1: #last iteration - # await cpu.drive_data2address(reg.get_addr('reg_debug_1'),0xFF) - cpu.write_debug_reg1_backdoor(0xFF) - caravelEnv.drive_mgmt_gpio(1) - await ClockCycles(caravelEnv.clk,4000) - caravelEnv.drive_mgmt_gpio(0) - await ClockCycles(caravelEnv.clk,4000) - cocotb.log.info(f"[TEST] finish sending {num_blinks} blinks ") - - cocotb.log.info(f"[TEST] waiting for {num_blinks} blinks ") - recieved_blinks = 0 - while True: - cocotb.log.info(f"[TEST] here 0 ") - if cpu.read_debug_reg2() == 0xFF: #test finish - break - while (True): - if caravelEnv.monitor_mgmt_gpio() == 0: - break - if cpu.read_debug_reg2() == 0xFF: #test finish - break - cocotb.log.info(f"[TEST] here 1 ") - await ClockCycles(caravelEnv.clk,10) - while (True): - if caravelEnv.monitor_mgmt_gpio() == 1: - recieved_blinks +=1 - break - if cpu.read_debug_reg2() == 0xFF: #test finish - break - cocotb.log.info(f"[TEST] here 2 ") - await ClockCycles(caravelEnv.clk,10) - await ClockCycles(caravelEnv.clk,1) - - - if recieved_blinks == num_blinks: - cocotb.log.info(f"[TEST] recieved the correct number of blinks {num_blinks}") - else: - cocotb.log.error(f"[TEST] recieved the incorrect number of blinks recieved = {recieved_blinks} expected = {num_blinks}") diff --git a/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio_bidir.c b/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio_bidir.c deleted file mode 100644 index dd62da58..00000000 --- a/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio_bidir.c +++ /dev/null @@ -1,63 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include - -// -------------------------------------------------------- - -/* - * Management SoC GPIO Pin Test - * Tests writing to the GPIO pin. - */ - -void main() -{ - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_gpio_mode1 = 1; - reg_gpio_mode0 = 0; // for full swing - - reg_gpio_ien = 1; - reg_gpio_oe = 0; - int num_blinks = 0; - reg_debug_1 = 0xAA; // start of the test - int z = reg_debug_1; - while (true) { - // reg_debug_2 = z; - // z= reg_debug_1; - while(reg_gpio_in == 0); - while(reg_gpio_in == 1); - num_blinks++; - if (reg_debug_1 == 0xFF) - break; - } - reg_gpio_ien = 0; - reg_gpio_oe = 1; - for (int i = 0; i < num_blinks; i++) { - /* Fast blink for simulation */ - reg_gpio_out = 1; - reg_gpio_out = 0; - } - reg_debug_2 = 0xFF; //finish test - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); - - -} - diff --git a/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio_in.c b/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio_in.c deleted file mode 100644 index 584f0ed9..00000000 --- a/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio_in.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include - -// -------------------------------------------------------- - -/* - * Management SoC GPIO Pin Test - * Tests writing to the GPIO pin. - */ - -void main() -{ - int temp_in; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_gpio_mode1 = 1; - reg_gpio_mode0 = 0; // for full swing - - reg_gpio_ien = 1; - reg_gpio_oe = 1; - - reg_debug_1 = 10; // wait for 10 blinks - for (int i = 0; i < 10; i++) { - while(reg_gpio_in == 0); - reg_debug_2 = 0XAA; // 1 is recieved - while(reg_gpio_in == 1); - reg_debug_2 = 0XBB; // 0 is recieved - } - reg_debug_2 = 0x1B; - reg_debug_1 = 20; - for (int i = 0; i < 20; i++) { - while(reg_gpio_in == 0); - reg_debug_2 = 0XAA; // 1 is recieved - while(reg_gpio_in == 1); - reg_debug_2 = 0XBB; // 0 is recieved - } - reg_debug_2 = 0x2B; - temp_in = reg_gpio_in; - reg_debug_1 = 0; - for (int i =0; i<50;i++){ // timeout - if (temp_in != reg_gpio_in) - reg_debug_2 = 0xEE; //finish test - - } - reg_debug_2 = 0xFF; //finish test - - -} - diff --git a/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio_out.c b/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio_out.c deleted file mode 100644 index d31db357..00000000 --- a/verilog/dv/cocotb/tests/mgmt_gpio/mgmt_gpio_out.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include - -// -------------------------------------------------------- - -/* - * Management SoC GPIO Pin Test - * Tests writing to the GPIO pin. - */ - -void main() -{ - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_gpio_mode1 = 1; - reg_gpio_mode0 = 0; // for full swing - - reg_gpio_ien = 1; - reg_gpio_oe = 1; - - reg_debug_1 = 10; - for (int i = 0; i < 10; i++) { - /* Fast blink for simulation */ - reg_gpio_out = 1; - reg_gpio_out = 0; - } - reg_debug_1 = 20; - for (int i = 0; i < 20; i++) { - /* Fast blink for simulation */ - reg_gpio_out = 1; - reg_gpio_out = 0; - } - reg_debug_1 = 0; - reg_debug_1 = 0; // for more delay - reg_debug_1 = 0; - - reg_debug_2 = 0xFF; //finish test - - -} - diff --git a/verilog/dv/cocotb/tests/sessions/session.bitbang_spi_i.vpd.tcl/session.bitbang_spi_i.vpd.tcl b/verilog/dv/cocotb/tests/sessions/session.bitbang_spi_i.vpd.tcl/session.bitbang_spi_i.vpd.tcl deleted file mode 100644 index da262954..00000000 --- a/verilog/dv/cocotb/tests/sessions/session.bitbang_spi_i.vpd.tcl/session.bitbang_spi_i.vpd.tcl +++ /dev/null @@ -1,389 +0,0 @@ -# Begin_DVE_Session_Save_Info -# DVE full session -# Saved on Tue Oct 11 10:47:30 2022 -# Designs open: 1 -# V1: bitbang_spi_i.vpd -# Toplevel windows open: 2 -# TopLevel.1 -# TopLevel.2 -# Source.1: caravel_top -# Wave.1: 19 signals -# Group count = 4 -# Group Group1 signal count = 4 -# Group Group2 signal count = 6 -# Group Group3 signal count = 6 -# Group Group4 signal count = 3 -# End_DVE_Session_Save_Info - -# DVE version: T-2022.06_Full64 -# DVE build date: May 31 2022 20:53:03 - - -# - -gui_set_loading_session_type Post -gui_continuetime_set - -# Close design -if { [gui_sim_state -check active] } { - gui_sim_terminate -} -gui_close_db -all -gui_expr_clear_all - -# Close all windows -gui_close_window -type Console -gui_close_window -type Wave -gui_close_window -type Source -gui_close_window -type Schematic -gui_close_window -type Data -gui_close_window -type DriverLoad -gui_close_window -type List -gui_close_window -type Memory -gui_close_window -type HSPane -gui_close_window -type DLPane -gui_close_window -type Assertion -gui_close_window -type CovHier -gui_close_window -type CoverageTable -gui_close_window -type CoverageMap -gui_close_window -type CovDetail -gui_close_window -type Local -gui_close_window -type Stack -gui_close_window -type Watch -gui_close_window -type Group -gui_close_window -type Transaction - - - -# Application preferences -gui_set_pref_value -key app_default_font -value {Helvetica,10,-1,5,50,0,0,0,0,0} -gui_src_preferences -tabstop 8 -maxbits 24 -windownumber 1 -# - -# DVE top-level session - - -# Create and position top-level window: TopLevel.1 - -if {![gui_exist_window -window TopLevel.1]} { - set TopLevel.1 [ gui_create_window -type TopLevel \ - -icon $::env(DVE)/auxx/gui/images/toolbars/dvewin.xpm] -} else { - set TopLevel.1 TopLevel.1 -} -gui_show_window -window ${TopLevel.1} -show_state maximized -rect {{0 29} {2559 1336}} - -# ToolBar settings -gui_set_toolbar_attributes -toolbar {TimeOperations} -dock_state top -gui_set_toolbar_attributes -toolbar {TimeOperations} -offset 0 -gui_show_toolbar -toolbar {TimeOperations} -gui_hide_toolbar -toolbar {&File} -gui_set_toolbar_attributes -toolbar {&Edit} -dock_state top -gui_set_toolbar_attributes -toolbar {&Edit} -offset 0 -gui_show_toolbar -toolbar {&Edit} -gui_hide_toolbar -toolbar {CopyPaste} -gui_set_toolbar_attributes -toolbar {&Trace} -dock_state top -gui_set_toolbar_attributes -toolbar {&Trace} -offset 0 -gui_show_toolbar -toolbar {&Trace} -gui_hide_toolbar -toolbar {TraceInstance} -gui_hide_toolbar -toolbar {BackTrace} -gui_set_toolbar_attributes -toolbar {&Scope} -dock_state top -gui_set_toolbar_attributes -toolbar {&Scope} -offset 0 -gui_show_toolbar -toolbar {&Scope} -gui_set_toolbar_attributes -toolbar {&Window} -dock_state top -gui_set_toolbar_attributes -toolbar {&Window} -offset 0 -gui_show_toolbar -toolbar {&Window} -gui_set_toolbar_attributes -toolbar {Signal} -dock_state top -gui_set_toolbar_attributes -toolbar {Signal} -offset 0 -gui_show_toolbar -toolbar {Signal} -gui_set_toolbar_attributes -toolbar {Zoom} -dock_state top -gui_set_toolbar_attributes -toolbar {Zoom} -offset 0 -gui_show_toolbar -toolbar {Zoom} -gui_set_toolbar_attributes -toolbar {Zoom And Pan History} -dock_state top -gui_set_toolbar_attributes -toolbar {Zoom And Pan History} -offset 0 -gui_show_toolbar -toolbar {Zoom And Pan History} -gui_set_toolbar_attributes -toolbar {Grid} -dock_state top -gui_set_toolbar_attributes -toolbar {Grid} -offset 0 -gui_show_toolbar -toolbar {Grid} -gui_hide_toolbar -toolbar {Simulator} -gui_hide_toolbar -toolbar {Interactive Rewind} -gui_hide_toolbar -toolbar {Testbench} - -# End ToolBar settings - -# Docked window settings -set HSPane.1 [gui_create_window -type HSPane -parent ${TopLevel.1} -dock_state left -dock_on_new_line true -dock_extent 343] -catch { set Hier.1 [gui_share_window -id ${HSPane.1} -type Hier] } -gui_set_window_pref_key -window ${HSPane.1} -key dock_width -value_type integer -value 343 -gui_set_window_pref_key -window ${HSPane.1} -key dock_height -value_type integer -value -1 -gui_set_window_pref_key -window ${HSPane.1} -key dock_offset -value_type integer -value 0 -gui_update_layout -id ${HSPane.1} {{left 0} {top 0} {width 342} {height 773} {dock_state left} {dock_on_new_line true} {child_hier_colhier 298} {child_hier_coltype 100} {child_hier_colpd 0} {child_hier_col1 0} {child_hier_col2 1} {child_hier_col3 -1}} -set DLPane.1 [gui_create_window -type DLPane -parent ${TopLevel.1} -dock_state left -dock_on_new_line true -dock_extent 354] -catch { set Data.1 [gui_share_window -id ${DLPane.1} -type Data] } -gui_set_window_pref_key -window ${DLPane.1} -key dock_width -value_type integer -value 354 -gui_set_window_pref_key -window ${DLPane.1} -key dock_height -value_type integer -value 772 -gui_set_window_pref_key -window ${DLPane.1} -key dock_offset -value_type integer -value 0 -gui_update_layout -id ${DLPane.1} {{left 0} {top 0} {width 353} {height 773} {dock_state left} {dock_on_new_line true} {child_data_colvariable 265} {child_data_colvalue 65} {child_data_coltype 64} {child_data_col1 0} {child_data_col2 1} {child_data_col3 2}} -set Console.1 [gui_create_window -type Console -parent ${TopLevel.1} -dock_state bottom -dock_on_new_line true -dock_extent 454] -gui_set_window_pref_key -window ${Console.1} -key dock_width -value_type integer -value 2500 -gui_set_window_pref_key -window ${Console.1} -key dock_height -value_type integer -value 454 -gui_set_window_pref_key -window ${Console.1} -key dock_offset -value_type integer -value 0 -gui_update_layout -id ${Console.1} {{left 0} {top 0} {width 2559} {height 453} {dock_state bottom} {dock_on_new_line true}} -#### Start - Readjusting docked view's offset / size -set dockAreaList { top left right bottom } -foreach dockArea $dockAreaList { - set viewList [gui_ekki_get_window_ids -active_parent -dock_area $dockArea] - foreach view $viewList { - if {[lsearch -exact [gui_get_window_pref_keys -window $view] dock_width] != -1} { - set dockWidth [gui_get_window_pref_value -window $view -key dock_width] - set dockHeight [gui_get_window_pref_value -window $view -key dock_height] - set offset [gui_get_window_pref_value -window $view -key dock_offset] - if { [string equal "top" $dockArea] || [string equal "bottom" $dockArea]} { - gui_set_window_attributes -window $view -dock_offset $offset -width $dockWidth - } else { - gui_set_window_attributes -window $view -dock_offset $offset -height $dockHeight - } - } - } -} -#### End - Readjusting docked view's offset / size -gui_sync_global -id ${TopLevel.1} -option true - -# MDI window settings -set Source.1 [gui_create_window -type {Source} -parent ${TopLevel.1}] -gui_show_window -window ${Source.1} -show_state maximized -gui_update_layout -id ${Source.1} {{show_state maximized} {dock_state undocked} {dock_on_new_line false}} - -# End MDI window settings - - -# Create and position top-level window: TopLevel.2 - -if {![gui_exist_window -window TopLevel.2]} { - set TopLevel.2 [ gui_create_window -type TopLevel \ - -icon $::env(DVE)/auxx/gui/images/toolbars/dvewin.xpm] -} else { - set TopLevel.2 TopLevel.2 -} -gui_show_window -window ${TopLevel.2} -show_state maximized -rect {{0 29} {2559 1336}} - -# ToolBar settings -gui_set_toolbar_attributes -toolbar {TimeOperations} -dock_state top -gui_set_toolbar_attributes -toolbar {TimeOperations} -offset 0 -gui_show_toolbar -toolbar {TimeOperations} -gui_hide_toolbar -toolbar {&File} -gui_set_toolbar_attributes -toolbar {&Edit} -dock_state top -gui_set_toolbar_attributes -toolbar {&Edit} -offset 0 -gui_show_toolbar -toolbar {&Edit} -gui_hide_toolbar -toolbar {CopyPaste} -gui_set_toolbar_attributes -toolbar {&Trace} -dock_state top -gui_set_toolbar_attributes -toolbar {&Trace} -offset 0 -gui_show_toolbar -toolbar {&Trace} -gui_hide_toolbar -toolbar {TraceInstance} -gui_hide_toolbar -toolbar {BackTrace} -gui_set_toolbar_attributes -toolbar {&Scope} -dock_state top -gui_set_toolbar_attributes -toolbar {&Scope} -offset 0 -gui_show_toolbar -toolbar {&Scope} -gui_set_toolbar_attributes -toolbar {&Window} -dock_state top -gui_set_toolbar_attributes -toolbar {&Window} -offset 0 -gui_show_toolbar -toolbar {&Window} -gui_set_toolbar_attributes -toolbar {Signal} -dock_state top -gui_set_toolbar_attributes -toolbar {Signal} -offset 0 -gui_show_toolbar -toolbar {Signal} -gui_set_toolbar_attributes -toolbar {Zoom} -dock_state top -gui_set_toolbar_attributes -toolbar {Zoom} -offset 0 -gui_show_toolbar -toolbar {Zoom} -gui_set_toolbar_attributes -toolbar {Zoom And Pan History} -dock_state top -gui_set_toolbar_attributes -toolbar {Zoom And Pan History} -offset 0 -gui_show_toolbar -toolbar {Zoom And Pan History} -gui_set_toolbar_attributes -toolbar {Grid} -dock_state top -gui_set_toolbar_attributes -toolbar {Grid} -offset 0 -gui_show_toolbar -toolbar {Grid} -gui_hide_toolbar -toolbar {Simulator} -gui_hide_toolbar -toolbar {Interactive Rewind} -gui_set_toolbar_attributes -toolbar {Testbench} -dock_state top -gui_set_toolbar_attributes -toolbar {Testbench} -offset 0 -gui_show_toolbar -toolbar {Testbench} - -# End ToolBar settings - -# Docked window settings -gui_sync_global -id ${TopLevel.2} -option true - -# MDI window settings -set Wave.1 [gui_create_window -type {Wave} -parent ${TopLevel.2}] -gui_show_window -window ${Wave.1} -show_state maximized -gui_update_layout -id ${Wave.1} {{show_state maximized} {dock_state undocked} {dock_on_new_line false} {child_wave_left 743} {child_wave_right 1811} {child_wave_colname 369} {child_wave_colvalue 369} {child_wave_col1 0} {child_wave_col2 1}} - -# End MDI window settings - -gui_set_env TOPLEVELS::TARGET_FRAME(Source) ${TopLevel.1} -gui_set_env TOPLEVELS::TARGET_FRAME(Schematic) ${TopLevel.1} -gui_set_env TOPLEVELS::TARGET_FRAME(PathSchematic) ${TopLevel.1} -gui_set_env TOPLEVELS::TARGET_FRAME(Wave) none -gui_set_env TOPLEVELS::TARGET_FRAME(List) none -gui_set_env TOPLEVELS::TARGET_FRAME(Memory) ${TopLevel.1} -gui_set_env TOPLEVELS::TARGET_FRAME(DriverLoad) none -gui_update_statusbar_target_frame ${TopLevel.1} -gui_update_statusbar_target_frame ${TopLevel.2} - -# - -# - -# DVE Open design session: - -if { ![gui_is_db_opened -db {bitbang_spi_i.vpd}] } { - gui_open_db -design V1 -file bitbang_spi_i.vpd -to 8464250000 -nosource -} -gui_set_precision 1ps -gui_set_time_units 1ps -# - -# DVE Global setting session: - - -# Global: Bus - -# Global: Expressions - -# Global: Signal Time Shift - -# Global: Signal Compare - -# Global: Signal Groups - - -set _session_group_1 Group1 -gui_sg_create "$_session_group_1" -set Group1 "$_session_group_1" - -gui_sg_addsignal -group "$_session_group_1" { {caravel_top.uut.gpio_control_bidir_1[0].serial_clock} {caravel_top.uut.gpio_control_bidir_1[0].serial_load} {caravel_top.uut.gpio_control_bidir_1[0].serial_data_in} {caravel_top.uut.gpio_control_bidir_1[0].shift_register} } - -set _session_group_2 Group2 -gui_sg_create "$_session_group_2" -set Group2 "$_session_group_2" - -gui_sg_addsignal -group "$_session_group_2" { caravel_top.uut.housekeeping.serial_bb_clock caravel_top.uut.housekeeping.serial_bb_load caravel_top.uut.housekeeping.serial_bb_resetn caravel_top.uut.housekeeping.serial_bb_data_1 caravel_top.uut.housekeeping.serial_bb_data_2 caravel_top.uut.housekeeping.serial_bb_enable } - -set _session_group_3 Group3 -gui_sg_create "$_session_group_3" -set Group3 "$_session_group_3" - -gui_sg_addsignal -group "$_session_group_3" { caravel_top.uut.housekeeping.hkspi.SCK caravel_top.uut.housekeeping.hkspi.SDI caravel_top.uut.housekeeping.hkspi.CSB caravel_top.uut.housekeeping.cdata caravel_top.uut.housekeeping.caddr caravel_top.uut.housekeeping.hkspi.wrstb } - -set _session_group_4 Group4 -gui_sg_create "$_session_group_4" -set Group4 "$_session_group_4" - -gui_sg_addsignal -group "$_session_group_4" { caravel_top.uut.housekeeping.hkspi.SCK caravel_top.uut.housekeeping.csclk caravel_top.uut.housekeeping.wbbd_sck } - -# Global: Highlighting - -# Global: Stack -gui_change_stack_mode -mode list - -# Post database loading setting... - -# Restore C1 time -gui_set_time -C1_only 665850000 - - - -# Save global setting... - -# Wave/List view global setting -gui_cov_show_value -switch false - -# Close all empty TopLevel windows -foreach __top [gui_ekki_get_window_ids -type TopLevel] { - if { [llength [gui_ekki_get_window_ids -parent $__top]] == 0} { - gui_close_window -window $__top - } -} -gui_set_loading_session_type noSession -# DVE View/pane content session: - - -# Hier 'Hier.1' -gui_show_window -window ${Hier.1} -gui_list_set_filter -id ${Hier.1} -list { {Package 1} {All 0} {Process 1} {VirtPowSwitch 0} {UnnamedProcess 1} {UDP 0} {Function 1} {Block 1} {SrsnAndSpaCell 0} {OVA Unit 1} {LeafScCell 1} {LeafVlgCell 1} {Interface 1} {LeafVhdCell 1} {$unit 1} {NamedBlock 1} {Task 1} {VlgPackage 1} {ClassDef 1} {VirtIsoCell 0} } -gui_list_set_filter -id ${Hier.1} -text {*house*} -gui_hier_list_init -id ${Hier.1} -gui_change_design -id ${Hier.1} -design V1 -catch {gui_list_expand -id ${Hier.1} caravel_top} -catch {gui_list_expand -id ${Hier.1} caravel_top.uut} -catch {gui_list_select -id ${Hier.1} {caravel_top.uut.housekeeping}} -gui_view_scroll -id ${Hier.1} -vertical -set 0 -gui_view_scroll -id ${Hier.1} -horizontal -set 0 - -# Data 'Data.1' -gui_list_set_filter -id ${Data.1} -list { {Buffer 1} {Input 1} {Others 1} {Linkage 1} {Output 1} {LowPower 1} {Parameter 1} {All 1} {Aggregate 1} {LibBaseMember 1} {Event 1} {Assertion 1} {Constant 1} {Interface 1} {BaseMembers 1} {Signal 1} {$unit 1} {Inout 1} {Variable 1} } -gui_list_set_filter -id ${Data.1} -text {*wbbd_sck*} -gui_list_show_data -id ${Data.1} {caravel_top.uut.housekeeping} -gui_show_window -window ${Data.1} -catch { gui_list_select -id ${Data.1} {caravel_top.uut.housekeeping.wbbd_sck }} -gui_view_scroll -id ${Data.1} -vertical -set 0 -gui_view_scroll -id ${Data.1} -horizontal -set 0 -gui_view_scroll -id ${Hier.1} -vertical -set 0 -gui_view_scroll -id ${Hier.1} -horizontal -set 0 - -# Source 'Source.1' -gui_src_value_annotate -id ${Source.1} -switch false -gui_set_env TOGGLE::VALUEANNOTATE 0 -gui_open_source -id ${Source.1} -replace -active caravel_top /home/rady/caravel/caravel_redesign_cocotb_new/caravel/verilog/dv/cocotb/caravel_top.sv -gui_src_value_annotate -id ${Source.1} -switch true -gui_set_env TOGGLE::VALUEANNOTATE 1 -gui_view_scroll -id ${Source.1} -vertical -set 160 -gui_src_set_reusable -id ${Source.1} - -# View 'Wave.1' -gui_wv_sync -id ${Wave.1} -switch false -set groupExD [gui_get_pref_value -category Wave -key exclusiveSG] -gui_set_pref_value -category Wave -key exclusiveSG -value {false} -set origWaveHeight [gui_get_pref_value -category Wave -key waveRowHeight] -gui_list_set_height -id Wave -height 25 -set origGroupCreationState [gui_list_create_group_when_add -wave] -gui_list_create_group_when_add -wave -disable -gui_marker_create -id ${Wave.1} C2 620210463 -gui_marker_select -id ${Wave.1} { C2 } -gui_marker_set_ref -id ${Wave.1} C1 -gui_wv_zoom_timerange -id ${Wave.1} 665193119 667348726 -gui_list_add_group -id ${Wave.1} -after {New Group} {Group1} -gui_list_add_group -id ${Wave.1} -after {New Group} {Group2} -gui_list_add_group -id ${Wave.1} -after {New Group} {Group3} -gui_list_add_group -id ${Wave.1} -after {New Group} {Group4} -gui_list_select -id ${Wave.1} {caravel_top.uut.housekeeping.csclk } -gui_seek_criteria -id ${Wave.1} {Rising} - - - -gui_set_env TOGGLE::DEFAULT_WAVE_WINDOW ${Wave.1} -gui_set_pref_value -category Wave -key exclusiveSG -value $groupExD -gui_list_set_height -id Wave -height $origWaveHeight -if {$origGroupCreationState} { - gui_list_create_group_when_add -wave -enable -} -if { $groupExD } { - gui_msg_report -code DVWW028 -} -gui_list_set_filter -id ${Wave.1} -list { {Buffer 1} {Input 1} {Others 1} {Linkage 1} {Output 1} {Parameter 1} {All 1} {Aggregate 1} {LibBaseMember 1} {Event 1} {Assertion 1} {Constant 1} {Interface 1} {BaseMembers 1} {Signal 1} {$unit 1} {Inout 1} {Variable 1} } -gui_list_set_filter -id ${Wave.1} -text {*} -gui_list_set_insertion_bar -id ${Wave.1} -group Group4 -item caravel_top.uut.housekeeping.wbbd_sck -position below - -gui_marker_move -id ${Wave.1} {C1} 665850000 -gui_view_scroll -id ${Wave.1} -vertical -set 0 -gui_show_grid -id ${Wave.1} -enable false -# Restore toplevel window zorder -# The toplevel window could be closed if it has no view/pane -if {[gui_exist_window -window ${TopLevel.1}]} { - gui_set_active_window -window ${TopLevel.1} - gui_set_active_window -window ${Source.1} - gui_set_active_window -window ${DLPane.1} -} -if {[gui_exist_window -window ${TopLevel.2}]} { - gui_set_active_window -window ${TopLevel.2} - gui_set_active_window -window ${Wave.1} -} -# - diff --git a/verilog/dv/cocotb/tests/spi_master/SPI_VIP.py b/verilog/dv/cocotb/tests/spi_master/SPI_VIP.py deleted file mode 100644 index 2ccd2dac..00000000 --- a/verilog/dv/cocotb/tests/spi_master/SPI_VIP.py +++ /dev/null @@ -1,86 +0,0 @@ - - -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles,Timer -import cocotb.log -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * - - -#VIP for SPI -""" - support commands - 00000000 -> No operation - 00000011 -> Read in streaming mode -""" -async def SPI_VIP(csb,clk,SDI,SDO,mem): - while True: - await FallingEdge(csb) - cocotb.log.info (f"[SPI_VIP] CSB is asserted operation has begin ") - op = await cocotb.start(SPI_op(clk,SDI,SDO,mem)) - await csb_watcher(csb,op) - cocotb.log.info (f"[SPI_VIP] CSB is deasserted operation has been killed") - -# watch the csb and when it's diable kill the SPI_op thread -async def csb_watcher(csb,thread): - cocotb.log.info (f"[csb_watcher] start CSB watching") - await RisingEdge(csb) - thread.kill() - -# detect command and address and apply the command -async def SPI_op(clk,SDI,SDO,mem): - address ='' - command ='' - await RisingEdge(clk) - # command - for i in range(8): - command = command + SDI.value.binstr - await RisingEdge(clk) - cocotb.log.info (f"[SPI_VIP] [SPI_op] command = {command}") - # address - address ='' - for i in range(8*3): # address is 3 parts each part are 8 bits - address = address + SDI.value.binstr - if i != 23: # skip last cycle wait - await RisingEdge(clk) - cocotb.log.info (f"[SPI_VIP] [SPI_op] address = {address}") - address = int(address,2) - #data - if command == "10000000" and False: # not sure about the read command - for i in range(8): - data_in += SDI - await RisingEdge(clk) - elif command == "00000011": - await FallingEdge(clk) - while True: - data = bin(mem[address])[2:].zfill(8) - for i in range(8): - SDO[0].value = 1 # enable - SDO[1].value = int(data[i],2) # bin - cocotb.log.debug (f"[SPI_VIP] [SPI_op] SDO = {data[i]} ") - await FallingEdge(clk) - SDO[0].value = 0 # enable - - cocotb.log.info (f"[SPI_VIP] [SPI_op] finish reading address {hex(address) } data = {hex(int(data,2))} ") - address +=1 - - -def read_mem (file_name): - with open(file_name, 'r') as file: - lines = file.readlines() - mem = dict() - for line in lines: - if line[0] == "@": - address = int(line[1:],16) - cocotb.log.debug (f" found line = {line} address = {hex(address)} ") - else: - line_no_space = line.strip().replace(' ','') - for i in range (0,len(line_no_space),2): - cocotb.log.debug (f" i = {i} ine_no_space[{i}:{i+2}] = {line_no_space[i:i+2]} address = {hex(address)}") - mem[address] = int(line_no_space[i:i+2],16) - address +=1 - cocotb.log.debug (f" found line = {line} line_no_space = {line_no_space} size = {len(line_no_space)}") - cocotb.log.info (f"[read_mem] SPI mem = {mem}") - return mem - diff --git a/verilog/dv/cocotb/tests/spi_master/spi_master.py b/verilog/dv/cocotb/tests/spi_master/spi_master.py deleted file mode 100644 index aa27f413..00000000 --- a/verilog/dv/cocotb/tests/spi_master/spi_master.py +++ /dev/null @@ -1,106 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles,Timer -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.spi_master.SPI_VIP import read_mem ,SPI_VIP -from interfaces.caravel import GPIO_MODE - - -bit_time_ns = 0 -reg = Regs() - - -@cocotb.test() -@repot_test -async def spi_master_rd(dut): - """ the firmware is configured to always send clk to spi so I can't insert alot of logics reading values - - the method of testing used can't work if 2 addresses Consecutive have the same address - """ - - caravelEnv,clock = await test_configure(dut,timeout_cycles=213888) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info (f"[TEST] start spi_master_rd test") - file_name = f"{os.getenv('CARAVEL_VERILOG_PATH')}/dv/cocotb/tests/spi_master/test_data" - mem = read_mem(file_name) - await cocotb.start(SPI_VIP(dut.bin33_monitor,dut.bin32_monitor,dut.bin35_monitor,(dut.bin34_en,dut.bin34),mem)) # fork for SPI - - addresses_to_read = (0x04,0x05,0x06,0x8,0x9,0xa,0xb,0xc,0xd,0xe,0xf) # the addresses that the firmware read from mem file - await wait_reg2(cpu,caravelEnv,0XAA) - cocotb.log.info (f"[TEST] GPIO configuration finished ans start reading from mememory") - val =0 - for address in addresses_to_read: - # await wait_reg2(cpu,caravelEnv,0x55) # value is ready to be read - #wait until value change - while True: - if val != cpu.read_debug_reg1(): - break - await ClockCycles(caravelEnv.clk,100) - - expected_val = mem[address] - val = cpu.read_debug_reg1() - if val == expected_val: - cocotb.log.info(f"[TEST] correct read of value {hex(val)} from address {hex(address)} ") - else: - cocotb.log.error(f"[TEST] wrong read from address {hex(address)} expected value = {hex(expected_val)} value {hex(val)} ") - # cpu.write_debug_reg2_backdoor(0xCC) - - await ClockCycles(caravelEnv.clk,1000) - - - -@cocotb.test() -@repot_test -async def spi_master_temp(dut): - """ the firmware is configured to always send clk to spi so I can't insert alot of logics reading values - - the method of testing used can't work if 2 addresses Consecutive have the same address - """ - caravelEnv,clock = await test_configure(dut,timeout_cycles=39554) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info (f"[TEST] start spi_master_temp test") - await FallingEdge(dut.bin33_monitor) - await RisingEdge(dut.bin32_monitor) - a = '' - b = '' - # first value - for i in range(8): - a = a + dut.bin35_monitor.value.binstr - await RisingEdge(dut.bin32_monitor) - cocotb.log.info (f" [TEST] a = {a} = {int(a,2)}") - - # second val - for i in range(8): - b = b + dut.bin35_monitor.value.binstr - if i != 7: # skip last cycle wait - await RisingEdge(dut.bin32_monitor) - cocotb.log.info (f" [TEST] b = {b} = {int(b,2)}") - - s = int(a,2) + int(b,2) - s_bin = bin(s)[2:].zfill(8) - cocotb.log.info (f" [TEST] sending sum of {int(a,2)} + {int(b,2)} = {s} = {s_bin}") - await FallingEdge(dut.bin32_monitor) - for i in range(8): - dut.bin34_en.value = 1 - dut.bin34.value = int(s_bin[i],2) # bin - cocotb.log.debug (f"[SPI_VIP] [SPI_op] SDO = {s_bin[i]} ") - await FallingEdge(dut.bin32_monitor) - dut.bin34_en.value = 0 # enable - while True: - if cpu.read_debug_reg1() == 0xBB: - cocotb.log.info(f" [TEST] firmware recieve the right value {s}") - break - elif cpu.read_debug_reg1() == 0xBB: - cocotb.log.error(f" [TEST] firmware recieve the incorrect value {cpu.read_debug_reg2()} instead of {s}") - break - - await ClockCycles(caravelEnv.clk,10) - diff --git a/verilog/dv/cocotb/tests/spi_master/spi_master_rd.c b/verilog/dv/cocotb/tests/spi_master/spi_master_rd.c deleted file mode 100644 index 924b6edc..00000000 --- a/verilog/dv/cocotb/tests/spi_master/spi_master_rd.c +++ /dev/null @@ -1,182 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include - -// -------------------------------------------------------- - -/* - * SPI master Test - * - Enables SPI master - * - Uses SPI master to talk to external SPI module - */ - - void spi_write(char c) -{ - reg_spimaster_wdata = (unsigned long) c; -// reg_spimaster_wdata = c; -// spi_master_control_length_write(8); -// spi_master_control_start_write(1); -// reg_spimaster_control = 0x0800; - reg_spimaster_control = 0x0801; -} - char spi_read() -{ -// reg_spimaster_wdata = c; -// spi_master_control_length_write(8); -// spi_master_control_start_write(1); -// reg_spimaster_control = 0x0800; -// spi_write(0x00); -// reg_spimaster_rdata = 0x00; -// reg_spimaster_control = 0x0801; - spi_write(0x00); - while (reg_spimaster_status != 1); - return reg_spimaster_rdata; -} - -void main() -{ - int i; - uint32_t value; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - // For SPI operation, GPIO 1 should be an input, and GPIOs 2 to 4 - // should be outputs. - - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; // SDI - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; // SDO - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT; // CSB - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT; // SCK - - /* Apply configuration */ - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_2 =0xAA; - - reg_spi_enable = 1; - - - // For SPI operation, GPIO 1 should be an input, and GPIOs 2 to 4 - // should be outputs. - - // Start test - - // Enable SPI master - // SPI master configuration bits: - // bits 7-0: Clock prescaler value (default 2) - // bit 8: MSB/LSB first (0 = MSB first, 1 = LSB first) - // bit 9: CSB sense (0 = inverted, 1 = noninverted) - // bit 10: SCK sense (0 = noninverted, 1 = inverted) - // bit 11: mode (0 = read/write opposite edges, 1 = same edges) - // bit 12: stream (1 = CSB ends transmission) - // bit 13: enable (1 = enabled) - // bit 14: IRQ enable (1 = enabled) - // bit 15: (unused) - - - reg_spimaster_cs = 0x10001; // sel=0, manual CS - - spi_write(0x03); // Write 0x03 (read mode) - spi_write(0x00); // Write 0x00 (start address high byte) - spi_write(0x00); // Write 0x00 (start address middle byte) - spi_write(0x04); // Write 0x04 (start address low byte) - - value = spi_read(); // 0x93 - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - - value = spi_read(); // 0x01 - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - value = spi_read(); // 0x00 - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - reg_spimaster_cs = 0x0000; // release CS - reg_spimaster_cs = 0x10001; // sel=0, manual CS - - spi_write(0x03); // Write 0x03 (read mode) - spi_write(0x00); // Write 0x00 (start address high byte) - spi_write(0x00); // Write 0x00 (start address middle byte) - spi_write(0x08); // Write 0x08 (start address low byte) - - value = spi_read(); // 0x13 - if (value == 0x13) - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - value = spi_read(); // 0x02 - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - reg_spimaster_cs = 0x0000; // release CS - reg_spimaster_cs = 0x10001; // sel=0, manual CS - - spi_write(0x03); // Write 0x03 (read mode) - spi_write(0x00); // Write 0x00 (start address high byte) - spi_write(0x00); // Write 0x00 (start address middle byte) - spi_write(0x0a); // Write 0x0a (start address low byte) - - value = spi_read(); // 0x63 - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - value = spi_read(); // 0x57 - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - value = spi_read(); // 0xb5 - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - value = spi_read(); // 0x00 - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - value = spi_read();// 0x23 - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - - value = spi_read(); // 0x20 - reg_debug_1 = value; - // reg_debug_2 =0x55; // value is ready to be read - // while (reg_debug_2 != 0xCC) // testbench has read the value - - reg_spimaster_cs = 0x0000; // release CS - reg_spimaster_cs = 0x10001; // sel=0, manual CS - - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); -} - diff --git a/verilog/dv/cocotb/tests/spi_master/spi_master_temp.c b/verilog/dv/cocotb/tests/spi_master/spi_master_temp.c deleted file mode 100644 index 8a9dbf9d..00000000 --- a/verilog/dv/cocotb/tests/spi_master/spi_master_temp.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include - -// -------------------------------------------------------- - -/* - * SPI master Test - * - Enables SPI master - * - Uses SPI master to talk to external SPI module - */ - - void spi_write(char c) -{ - reg_spimaster_wdata = (unsigned long) c; -// reg_spimaster_wdata = c; -// spi_master_control_length_write(8); -// spi_master_control_start_write(1); -// reg_spimaster_control = 0x0800; - reg_spimaster_control = 0x0801; -} - char spi_read() -{ -// reg_spimaster_wdata = c; -// spi_master_control_length_write(8); -// spi_master_control_start_write(1); -// reg_spimaster_control = 0x0800; -// spi_write(0x00); -// reg_spimaster_rdata = 0x00; -// reg_spimaster_control = 0x0801; - spi_write(0x00); - while (reg_spimaster_status != 1); - return reg_spimaster_rdata; -} - -void main() -{ - int i; - uint32_t value; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - // For SPI operation, GPIO 1 should be an input, and GPIOs 2 to 4 - // should be outputs. - - reg_mprj_io_34 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; // SDI - reg_mprj_io_35 = GPIO_MODE_MGMT_STD_BIDIRECTIONAL; // SDO - reg_mprj_io_33 = GPIO_MODE_MGMT_STD_OUTPUT; // CSB - reg_mprj_io_32 = GPIO_MODE_MGMT_STD_OUTPUT; // SCK - - /* Apply configuration */ - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_debug_2 =0xAA; - - reg_spi_enable = 1; - - - // For SPI operation, GPIO 1 should be an input, and GPIOs 2 to 4 - // should be outputs. - - // Start test - - // Enable SPI master - // SPI master configuration bits: - // bits 7-0: Clock prescaler value (default 2) - // bit 8: MSB/LSB first (0 = MSB first, 1 = LSB first) - // bit 9: CSB sense (0 = inverted, 1 = noninverted) - // bit 10: SCK sense (0 = noninverted, 1 = inverted) - // bit 11: mode (0 = read/write opposite edges, 1 = same edges) - // bit 12: stream (1 = CSB ends transmission) - // bit 13: enable (1 = enabled) - // bit 14: IRQ enable (1 = enabled) - // bit 15: (unused) - - - reg_spimaster_cs = 0x10001; // sel=0, manual CS - - spi_write(0x08); // Write 0x03 (read mode) - spi_write(0x05); // Write 0x00 (start address high byte) - value = spi_read(); // 0x93 - if (value == 0xD) - reg_debug_1 = 0xBB; // get correct value - else { - reg_debug_2 = value; - reg_debug_1 = 0xEE; // get wrong value - } - - reg_spimaster_cs = 0x0000; // release CS - reg_spimaster_cs = 0x10001; // sel=0, manual CS - - print("adding a very very long delay because cpu produces X's when code finish and this break the simulation"); -} - diff --git a/verilog/dv/cocotb/tests/spi_master/test_data b/verilog/dv/cocotb/tests/spi_master/test_data deleted file mode 100644 index 287a0cf9..00000000 --- a/verilog/dv/cocotb/tests/spi_master/test_data +++ /dev/null @@ -1,3 +0,0 @@ -@00000000 -6F 00 00 0B 93 01 00 00 13 02 63 57 b5 00 23 20 -13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 diff --git a/verilog/dv/cocotb/tests/temp_partial_test/partial.py b/verilog/dv/cocotb/tests/temp_partial_test/partial.py deleted file mode 100644 index 6ee3dfa4..00000000 --- a/verilog/dv/cocotb/tests/temp_partial_test/partial.py +++ /dev/null @@ -1,47 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE - -reg = Regs() -"""Testbench of GPIO configuration through bit-bang method using the StriVe housekeeping SPI.""" -@cocotb.test() -@repot_test -async def temp_partial(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=70000) - # Apply data 0x1809 (management standard output) to first block of - # user 1 and user 2 (GPIO 0 and 37) bits 0, 1, 9, and 12 are "1" (data go in backwards) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - - while True: - if cpu.read_debug_reg2() == 0xAA: - break - await ClockCycles(caravelEnv.clk,1) - cpu.cpu_force_reset() - - await ClockCycles(caravelEnv.clk,100) - - await cpu.drive_data2address(reg.get_addr('reg_wb_enable'),1) - await cpu.drive_data2address(reg.get_addr('reg_debug_1'),0xAA) - # await cpu.drive_data2address(reg.get_addr('reg_debug_2'),0xBB) - await cpu.drive_data2address(reg.get_addr('reg_mprj_datal'),0x0) - - # await ClockCycles(caravelEnv.clk,100) - - cpu.cpu_release_reset() - - while True: - if cpu.read_debug_reg2() == 0xBB: - break - await ClockCycles(caravelEnv.clk,1) - - await ClockCycles(caravelEnv.clk,100) - \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/timer/timer.py b/verilog/dv/cocotb/tests/timer/timer.py deleted file mode 100644 index 152cf89b..00000000 --- a/verilog/dv/cocotb/tests/timer/timer.py +++ /dev/null @@ -1,103 +0,0 @@ -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE - -reg = Regs() -"""Testbench of GPIO configuration through bit-bang method using the StriVe housekeeping SPI.""" -@cocotb.test() -@repot_test -async def timer0_oneshot(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=1023545) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start timer0_oneshot test") - cocotb.log.info(f"[TEST] Configure timer as oneshot") - pass_list = (0x1B,0x2B,0x3B) - fail_list = (0x1E,0x2E) - phases_fails = 3 - phases_passes = 0 - reg1 =0 # buffer - while True: - if cpu.read_debug_reg2() == 0xFF: # test finish - break - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - if reg1 in pass_list: # pass phase - phases_passes +=1 - phases_fails -=1 - if reg1 == 0x1B: - cocotb.log.info(f"[TEST] Pass timer0 value is decreasing") - elif reg1 == 0x2B: - cocotb.log.info(f"[TEST] Pass timer0 value reach 0") - elif reg1 == 0x3B: - cocotb.log.info(f"[TEST] Pass timer0 isn't changing after it reachs 0") - elif reg1 in fail_list: # pass phase - if reg1 == 0x1E: - cocotb.log.info(f"[TEST] Failed timer0 value increasing not decresing in oneshot mode") - elif reg1 == 0x2E: - cocotb.log.error(f"[TEST] Failed timer0 is changing before it reachs 0 in oneshot mode") - else: - cocotb.log.error(f"[TEST] debug register 1 has illegal value") - await ClockCycles(caravelEnv.clk,10) - - if phases_fails != 0: - cocotb.log.error(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - else: - cocotb.log.info(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - -@cocotb.test() -@repot_test -async def timer0_periodic(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=52016) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start timer0_periodic test") - cocotb.log.info(f"[TEST] Configure timer as periodic") - pass_list = (0x1B,0x2B,0x3B,0x4B) - fail_list = (0xEE) - phases_fails = 4 - phases_passes = 0 - reg1 =0 # buffer - fourB_happened = False - while True: - if cpu.read_debug_reg2() == 0xFF: # test finish - break - if reg1 != cpu.read_debug_reg1(): - reg1 = cpu.read_debug_reg1() - if reg1 in pass_list: # pass phase - phases_passes +=1 - phases_fails -=1 - if reg1 == 0x1B: - cocotb.log.info(f"[TEST] Pass timer0 first rollover") - elif reg1 == 0x2B: - cocotb.log.info(f"[TEST] Pass timer0 second rollover") - elif reg1 == 0x3B: - cocotb.log.info(f"[TEST] Pass timer0 third rollover") - elif reg1 == 0x4B: - if fourB_happened: # this phase happened one time before - phases_passes -=1 - phases_fails +=1 - else: - cocotb.log.info(f"[TEST] Pass timer0 counter value decreases") - fourB_happened = True - elif reg1 in fail_list: # pass phase - if reg1 == 0xEE: - cocotb.log.info(f"[TEST] Failed timer0 value hasn't rollovered in periodic mode") - else: - cocotb.log.error(f"[TEST] debug register 1 has illegal value") - - await ClockCycles(caravelEnv.clk,10) - - if phases_fails != 0: - cocotb.log.error(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") - else: - cocotb.log.info(f"[TEST] finish with {phases_passes} phases passes and {phases_fails} phases fails") \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/timer/timer0_oneshot.c b/verilog/dv/cocotb/tests/timer/timer0_oneshot.c deleted file mode 100644 index e48e8745..00000000 --- a/verilog/dv/cocotb/tests/timer/timer0_oneshot.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - - -#include - -/* -Testing timer interrupts -Enable interrupt for timer0 and configure it as countdown 1 shot wait for interrupt -*/ - - -void main(){ - uint32_t value; - uint32_t old_value; - - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - /* Configure timer for a single-shot countdown */ - reg_timer0_config = 0; // disable - reg_timer0_data = 0xF3000; - reg_timer0_config = 1; // enable - - // Loop, waiting for the interrupt to change reg_mprj_datah - // test path if counter value stop updated after reach 0 and also the value is always decrementing - reg_timer0_update = 1; // update reg_timer0_value with new counter value - old_value = reg_timer0_value; - // value us decrementing until it reachs zero - while (1) { - reg_timer0_update = 1; // update reg_timer0_value with new counter value - value = reg_timer0_value; - if (value < old_value && value != 0){ - reg_debug_1 = 0x1B; // value decrease - } - else if (value == 0){ - reg_debug_1 = 0x2B; // value reach 0 - break; - }else{ - reg_debug_1 = 0x1F; // value updated incorrectly - } - old_value = value; - } - // check 10 times that value don't change from 0 - for (int i = 0; i < 10; i++); - reg_timer0_update = 1; // update reg_timer0_value with new counter value - - if (reg_timer0_value == 0){ - reg_debug_1 = 0x3B; //timer updated correctly - }else{ - reg_debug_1 = 0x2F; //timer updated incorrectly - } - reg_debug_2 = 0xFF; // finish test -} - diff --git a/verilog/dv/cocotb/tests/timer/timer0_periodic.c b/verilog/dv/cocotb/tests/timer/timer0_periodic.c deleted file mode 100644 index 9edabf7a..00000000 --- a/verilog/dv/cocotb/tests/timer/timer0_periodic.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include - -/* -Testing timer interrupts -Enable interrupt for timer0 and configure it as countdown 1 shot -wait for interrupt - -*/ - - -void main(){ - uint32_t value; - uint32_t old_value; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - /* Configure timer for a single-shot countdown */ - reg_timer0_config = 0; // disable - reg_timer0_data = 0; - reg_timer0_data_periodic = 0x300; - reg_timer0_config = 1; // enable - - // Loop, waiting for the interrupt to change reg_mprj_datah - // test path if counter value stop updated after reach 0 and also the value is always decrementing - reg_timer0_update = 1; // update reg_timer0_value with new counter value - old_value = reg_timer0_value; - // value us decrementing until it reachs zero - int rollover = 0; - int timeout = 400; - for (int i = 0; i < timeout; i++){ - reg_timer0_update = 1; // update reg_timer0_value with new counter value - value = reg_timer0_value; - if (value > old_value){ - rollover++; - if (rollover==1) - reg_debug_1 = 0x1B; // timer rollover - else if (rollover==2) - reg_debug_1 = 0x2B; //timer rollover second time - else if (rollover==3){ - reg_debug_1 = 0x3B; //timer rollover second time - break; - } - } - if (value < old_value){ - reg_debug_1 = 0x4B; // value decreases - } - old_value = value; - } - - if (rollover ==0){ - reg_debug_1 = 0xEE; // counter didn't rollover - } - reg_debug_2 = 0xFF; // finish test - -} - diff --git a/verilog/dv/cocotb/tests/uart/uart.py b/verilog/dv/cocotb/tests/uart/uart.py deleted file mode 100644 index 1405715f..00000000 --- a/verilog/dv/cocotb/tests/uart/uart.py +++ /dev/null @@ -1,173 +0,0 @@ -from curses import baudrate -import random -import cocotb -from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles,Timer,Edge -import cocotb.log -from interfaces.cpu import RiskV -from interfaces.defsParser import Regs -from cocotb.result import TestSuccess -from tests.common_functions.test_functions import * -from tests.bitbang.bitbang_functions import * -from interfaces.caravel import GPIO_MODE -from interfaces.common import Macros - - -bit_time_ns = 0 -reg = Regs() - - -@cocotb.test() -@repot_test -async def uart_tx(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=346140) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start uart test") - expected_msg = "Monitor: Test UART (RTL) passed" - # calculate bit time - clk = clock.period/1000 - global bit_time_ns - bit_time_ns = round(10**5 * clk / (96)) - # wait for start of sending - await wait_reg1(cpu,caravelEnv,0XAA) - - cocotb.log.info (f"[TEST] start receiving from uart") - counter =0 - data_out ='' - while True: - if counter %8 == 0: - if counter != 0: - data_out = data_out+chr(int(char,2)) - cocotb.log.info (f"[TEST] msg is:'{data_out}' expected '{expected_msg}'") - if data_out == expected_msg: - cocotb.log.info (f"[TEST] Pass recieve the full expected msg '{data_out}'") - break - await start_of_tx(caravelEnv) - char = '' - # if temp != caravelEnv.monitor_gpio((6,6)) - char = caravelEnv.monitor_gpio((6,6)).binstr + char - cocotb.log.debug (f"[TEST] bit[{counter}] = {caravelEnv.monitor_gpio((6,6))} data out = {char} ") - await Timer(bit_time_ns, units='ns') - counter +=1 - -async def start_of_tx(caravelEnv): - while (True): # wait for the start of the transimission it 1 then 0 - if (caravelEnv.monitor_gpio((6,6)).integer == 0): - break - await Timer(bit_time_ns, units='ns') - await Timer(bit_time_ns, units='ns') - - -@cocotb.test() -@repot_test -async def uart_rx(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=98315) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start uart test") - caravelEnv.drive_gpio_in((0,0),0) # IO[0] affects the uart selecting btw system and debug - caravelEnv.drive_gpio_in((5,5),1) - # calculate bit time - clk = clock.period/1000 - global bit_time_ns - bit_time_ns = round(10**5 * clk / (96)) - # send first char - await wait_reg1(cpu,caravelEnv,0XAA) - await uart_send_char(caravelEnv,"B") - await uart_check_char_recieved(caravelEnv,cpu) - # send second char - await wait_reg1(cpu,caravelEnv,0XBB) - await uart_send_char(caravelEnv,"M") - await uart_check_char_recieved(caravelEnv,cpu) - # send third char - await wait_reg1(cpu,caravelEnv,0XCC) - await uart_send_char(caravelEnv,"A") - await uart_check_char_recieved(caravelEnv,cpu) - - - -async def uart_send_char(caravelEnv,char): - char_bits = [int(x) for x in '{:08b}'.format(ord(char))] - cocotb.log.info (f"[TEST] start sending on uart {char}") - #send start bit - caravelEnv.drive_gpio_in((5,5),0) - await Timer(bit_time_ns, units='ns') - #send bits - for i in reversed(range(8)): - caravelEnv.drive_gpio_in((5,5),char_bits[i]) - await Timer(bit_time_ns, units='ns') - - # stop of frame - caravelEnv.drive_gpio_in((5,5),1) - await Timer(bit_time_ns, units='ns') - await Timer(bit_time_ns, units='ns') - # insert 4 bit delay just for debugging - await Timer(bit_time_ns, units='ns') - await Timer(bit_time_ns, units='ns') - await Timer(bit_time_ns, units='ns') - await Timer(bit_time_ns, units='ns') - - -async def uart_check_char_recieved(caravelEnv,cpu): - # check cpu recieved the correct character - while True: - if not Macros['GL']: - reg_uart_data = caravelEnv.caravel_hdl.soc.core.uart_rxtx_w.value.binstr - else: - reg_uart_data = "1001110" - - reg1 = cpu.read_debug_reg1() - cocotb.log.debug(f"[TEST] reg1 = {hex(reg1)}") - if reg1 == 0x1B: - cocotb.log.info(f"[TEST] Pass cpu has recieved the correct character {chr(int(reg_uart_data,2))}") - return - if reg1 == 0x1E: - cocotb.log.error(f"[TEST] Failed cpu has recieved the wrong character {chr(int(reg_uart_data,2))}") - return - - await ClockCycles(caravelEnv.clk,1) - -@cocotb.test() -@repot_test -async def uart_loopback(dut): - caravelEnv,clock = await test_configure(dut,timeout_cycles=199021) - cpu = RiskV(dut) - cpu.cpu_force_reset() - cpu.cpu_release_reset() - cocotb.log.info(f"[TEST] Start uart test") - await cocotb.start( connect_5_6(dut,caravelEnv)) # short gpio 6 and 5 - caravelEnv.drive_gpio_in((0,0),0) # IO[0] affects the uart selecting btw system and debug - - # setup watcher loopback results - await cocotb.start(uart_check_char_recieved_loopback(caravelEnv,cpu)) - - await ClockCycles(caravelEnv.clk,197000) - -async def connect_5_6(dut,caravelEnv): - while True: - caravelEnv.drive_gpio_in(5,dut.bin6_monitor.value) - await Edge(dut.bin6_monitor) - - -async def uart_check_char_recieved_loopback(caravelEnv,cpu): - # check cpu recieved the correct character - while True: - if not Macros['GL']: - reg_uart_data = caravelEnv.caravel_hdl.soc.core.uart_rxtx_w.value.binstr - else: - reg_uart_data = "1001110" - - reg1 = cpu.read_debug_reg1() - cocotb.log.debug(f"[TEST] reg1 = {hex(reg1)}") - if reg1 == 0x1B: - cocotb.log.info(f"[TEST] Pass cpu has sent and recieved the correct character {chr(int(reg_uart_data,2))}") - await wait_reg1(cpu,caravelEnv,0) - - if reg1 == 0x1E: - cocotb.log.error(f"[TEST] Failed cpu has sent and recieved the wrong character {chr(int(reg_uart_data,2))}") - await wait_reg1(cpu,caravelEnv,0) - - - await ClockCycles(caravelEnv.clk,1) \ No newline at end of file diff --git a/verilog/dv/cocotb/tests/uart/uart_loopback.c b/verilog/dv/cocotb/tests/uart/uart_loopback.c deleted file mode 100644 index 5cedf381..00000000 --- a/verilog/dv/cocotb/tests/uart/uart_loopback.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include -// -------------------------------------------------------- - -void wait_for_char(char *c){ - while (uart_rxempty_read() == 1); - if (reg_uart_data == *c){ - reg_debug_1 = 0x1B; // recieved the correct character - }else{ - reg_debug_1 = 0x1E; // timeout didn't recieve the character - } - reg_debug_1 =0; - uart_ev_pending_write(UART_EV_RX); -} - -void main(){ - int j; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - - // Now, apply the configuration - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_uart_enable = 1; - - print("M"); - wait_for_char("M"); - - print("B"); - wait_for_char("B"); - - print("A"); - wait_for_char("A"); - - print("5"); - wait_for_char("5"); - - print("o"); - wait_for_char("o"); - -} diff --git a/verilog/dv/cocotb/tests/uart/uart_rx.c b/verilog/dv/cocotb/tests/uart/uart_rx.c deleted file mode 100644 index ce23de00..00000000 --- a/verilog/dv/cocotb/tests/uart/uart_rx.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include -// -------------------------------------------------------- - -void wait_for_char(char *c){ - while (uart_rxempty_read() == 1); - if (reg_uart_data == *c){ - reg_debug_1 = 0x1B; // recieved the correct character - }else{ - reg_debug_1 = 0x1E; // timeout didn't recieve the character - } - uart_ev_pending_write(UART_EV_RX); - -} - -void main(){ - int j; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - reg_mprj_io_5 = GPIO_MODE_MGMT_STD_INPUT_NOPULL; - - // Now, apply the configuration - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - - reg_uart_enable = 1; - - reg_debug_1 = 0xAA; // start sending B - wait_for_char("B"); - - reg_debug_1 = 0xBB; // start sending M - wait_for_char("M"); - - reg_debug_1 = 0xCC; // start sending A - wait_for_char("A"); - -} diff --git a/verilog/dv/cocotb/tests/uart/uart_tx.c b/verilog/dv/cocotb/tests/uart/uart_tx.c deleted file mode 100644 index 9628767a..00000000 --- a/verilog/dv/cocotb/tests/uart/uart_tx.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020 Efabless Corporation - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include - -// -------------------------------------------------------- - -void main() -{ - int j; - reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2 - reg_debug_1 = 0x0; - reg_debug_2 = 0x0; - - reg_mprj_io_6 = GPIO_MODE_MGMT_STD_OUTPUT; - - // Set clock to 64 kbaud and enable the UART. It is important to do this - // before applying the configuration, or else the Tx line initializes as - // zero, which indicates the start of a byte to the receiver. - - - // Now, apply the configuration - reg_mprj_xfer = 1; - while (reg_mprj_xfer == 1); - -// reg_uart_clkdiv = 625; - reg_uart_enable = 1; - - reg_debug_1 = 0xAA; - // This should appear at the output, received by the testbench UART. - // (Makes simulation time long.) -// print("test msg\n"); - print("Monitor: Test UART (RTL) passed"); - - // Allow transmission to complete before signalling that the program - // has ended. - for (j = 0; j < 160; j++); -} diff --git a/verilog/dv/cocotb/verify_cocotb.py b/verilog/dv/cocotb/verify_cocotb.py deleted file mode 100755 index a6e6acf4..00000000 --- a/verilog/dv/cocotb/verify_cocotb.py +++ /dev/null @@ -1,511 +0,0 @@ -#!/usr/bin/python3 -# -*- coding: utf-8 -*- -import collections -import json -import sys -import os -from pathlib import Path -from fnmatch import fnmatch -from datetime import datetime -import random -from pathlib import Path -import shutil -from subprocess import PIPE, run -import threading -import time - -iverilog = True -vcs = False -coverage = False -zip_waves = True -caravan = False -def go_up(path, n): - for i in range(n): - path = os.path.dirname(path) - return path -# search pattern in file -def search_str(file_path, word): - with open(file_path, 'r') as file: - # read all content of a file - content = file.read() - # check if string present in a file - if word in content: - return "passed" - else: - return "failed" - -def change_str(str,new_str,file_path): - # Read in the file - with open(file_path, 'r') as file : - filedata = file.read() - - filedata = filedata.replace(str, new_str) - - # Write the file out again - with open(file_path, 'w') as file: - file.write(filedata) - -class RunTest: - def __init__(self,test_name,sim,corner) -> None: - self.cocotb_path = f"{os.getenv('CARAVEL_ROOT')}/verilog/dv/cocotb" - self.test_name = test_name - self.sim_type = sim - self.corner = corner - self.create_log_file() - self.hex_generate() - self.runTest() - - # create and open full terminal log to be able to use it before run the test - def create_log_file(self): - self.cd_cocotb() - os.chdir(f"sim/{os.getenv('RUNTAG')}") - test_dir = f"{self.sim_type}-{self.test_name}" - if (self.sim_type == "GL_SDF"): - test_dir = f'{test_dir}-{self.corner}' - os.makedirs(f"{test_dir}",exist_ok=True) - self.cd_cocotb() - self.sim_path = f"sim/{os.getenv('RUNTAG')}/{test_dir}/" - terminal_log=f"{self.sim_path}/fullTerminal.log" - test_log=f"{self.sim_path}/{self.test_name}.log" - self.test_log=open(test_log, "w") - self.full_file=f"{self.sim_path}/full.log" - self.full_terminal = open(self.full_file, "w") - - def runTest(self): - self.full_test_name = f"{self.sim_type}-{self.test_name}" - if (self.sim_type=="GL_SDF"): - self.full_test_name = f"{self.sim_type}-{self.test_name}-{self.corner}" - os.environ["TESTFULLNAME"] = f"{self.full_test_name}" - if (iverilog):return self.runTest_iverilog() - elif(vcs): return self.runTest_vcs() - - # iverilog function - def runTest_iverilog(self): - print(f"Start running test: {self.sim_type}-{self.test_name}") - CARAVEL_ROOT = os.getenv('CARAVEL_ROOT') - CARAVEL_VERILOG_PATH = os.getenv('CARAVEL_VERILOG_PATH') - MCW_ROOT = os.getenv('MCW_ROOT') - VERILOG_PATH = os.getenv('VERILOG_PATH') - CARAVEL_PATH = os.getenv('CARAVEL_PATH') - USER_PROJECT_VERILOG = os.getenv('USER_PROJECT_VERILOG') - FIRMWARE_PATH = os.getenv('FIRMWARE_PATH') - RUNTAG = os.getenv('RUNTAG') - ERRORMAX = os.getenv('ERRORMAX') - PDK_ROOT = os.getenv('PDK_ROOT') - PDK = os.getenv('PDK') - TESTFULLNAME = os.getenv('TESTFULLNAME') - env_vars = f"-e {CARAVEL_ROOT} -e CARAVEL_VERILOG_PATH={CARAVEL_VERILOG_PATH} -e MCW_ROOT={MCW_ROOT} -e VERILOG_PATH={VERILOG_PATH} -e CARAVEL_PATH={CARAVEL_PATH} -e USER_PROJECT_VERILOG={USER_PROJECT_VERILOG} -e FIRMWARE_PATH={FIRMWARE_PATH} -e RUNTAG={RUNTAG} -e ERRORMAX={ERRORMAX} -e PDK_ROOT={PDK_ROOT} -e PDK={PDK} -e TESTFULLNAME={TESTFULLNAME}" - macros = f'-DFUNCTIONAL -DSIM=\\\"{self.sim_type}\\\" -DUSE_POWER_PINS -DUNIT_DELAY=#1 -DMAIN_PATH=\\\"{self.cocotb_path}\\\" -DIVERILOG -DTESTNAME=\\\"{self.test_name}\\\" -DTAG=\\\"{RUNTAG}\\\" ' - if self.test_name == "la": - macros = f'{macros} -DLA_TESTING' - if self.test_name in ["gpio_all_o_user","gpio_all_i_user","gpio_all_i_pu_user","gpio_all_i_pd_user","gpio_all_bidir_user"]: - macros = f'{macros} -DGPIO_TESTING' - if(self.sim_type=="RTL"): - includes = f"-f {VERILOG_PATH}/includes/includes.rtl.caravel" - elif(self.sim_type=="GL"): - macros = f'{macros} -DGL' - includes = f"-f {VERILOG_PATH}/includes/includes.gl.caravel" - elif(self.sim_type=="GLSDF"): - print(f"iverilog can't run SDF for test {self.test_name} Please use anothor simulator like cvc" ) - return - user_project = f"{CARAVEL_PATH}/rtl/__user_project_wrapper.v {CARAVEL_PATH}/rtl/__user_project_gpio_example.v {CARAVEL_PATH}/rtl/__user_project_la_example.v" - if caravan: - print ("Use caravan") - macros = f'-DCARAVAN {macros} ' - user_project = f"{CARAVEL_PATH}/rtl/__user_analog_project_wrapper.v" - iverilog_command = (f"iverilog -Ttyp {macros} {includes} -o {self.sim_path}/sim.vvp" - f" {user_project} caravel_top.sv" - f" && TESTCASE={self.test_name} MODULE=caravel_tests vvp -M $(cocotb-config --prefix)/cocotb/libs -m libcocotbvpi_icarus {self.sim_path}/sim.vvp") - docker_command = f"docker run -it {env_vars} -v {os.getenv('CARAVEL_ROOT')}:{os.getenv('CARAVEL_ROOT')} -v {os.getenv('MCW_ROOT')}:{os.getenv('MCW_ROOT')} -v {os.getenv('PDK_ROOT')}:{os.getenv('PDK_ROOT')} efabless/dv:cocotb sh -c 'cd {self.cocotb_path} && {iverilog_command}' >> {self.full_file}" - self.full_terminal = open(self.full_file, "a") - self.full_terminal.write(f"docker command for running iverilog and cocotb:\n% ") - self.full_terminal.write(os.path.expandvars(docker_command)+"\n") - self.full_terminal.close() - - os.system(docker_command) - self.passed = search_str(self.test_log.name,"Test passed with (0)criticals (0)errors") - Path(f'{self.sim_path}/{self.passed}').touch() - if self.passed == "passed": - print(f"Test: {self.sim_type}-{self.test_name} passed") - else : - print(f"Test: {self.sim_type}-{self.test_name} Failed please check logs under {self.sim_path}") - - - # vcs function - def runTest_vcs(self): - print(f"Start running test: {self.sim_type}-{self.test_name}") - CARAVEL_PATH = os.getenv('CARAVEL_PATH') - PDK_ROOT = os.getenv('PDK_ROOT') - PDK = os.getenv('PDK') - VERILOG_PATH = os.getenv('VERILOG_PATH') - dirs = f'+incdir+\\\"{PDK_ROOT}/{PDK}\\\" ' - if self.sim_type == "RTL": - shutil.copyfile(f'{VERILOG_PATH}/includes/rtl_caravel_vcs.v', f"{self.cocotb_path}/includes.v") - change_str(str="\"caravel_mgmt_soc_litex/verilog",new_str=f"\"{VERILOG_PATH}",file_path=f"{self.cocotb_path}/includes.v") - change_str(str="\"caravel/verilog",new_str=f"\"{CARAVEL_PATH}",file_path=f"{self.cocotb_path}/includes.v") - else: - dirs = f' {dirs} -f \\\"{VERILOG_PATH}/includes/gl_caravel_vcs.list\\\" ' - macros = f'+define+FUNCTIONAL +define+USE_POWER_PINS +define+UNIT_DELAY=#1 +define+MAIN_PATH=\\\"{self.cocotb_path}\\\" +define+VCS ' - if self.test_name == "la": - macros = f'{macros} +define+LA_TESTING' - if self.test_name in ["gpio_all_o_user","gpio_all_i_user","gpio_all_i_pu_user","gpio_all_i_pd_user","gpio_all_bidir_user"]: - macros = f'{macros} +define+GPIO_TESTING' - # shutil.copyfile(f'{self.test_full_dir}/{self.test_name}.hex',f'{self.sim_path}/{self.test_name}.hex') - # if os.path.exists(f'{self.test_full_dir}/test_data'): - # shutil.copyfile(f'{self.test_full_dir}/test_data',f'{self.sim_path}/test_data') - if (self.sim_type=="GL_SDF"): - macros = f'{macros} +define+ENABLE_SDF +define+SIM=GL_SDF +define+GL +define+SDF_POSTFIX=\\\"{self.corner[-1]}{self.corner[-1]}\\\" +define+CORNER=\\\"{self.corner[0:3]}\\\"' - # corner example is corner nom-t so `SDF_POSTFIX = tt and `CORNER = nom - # os.makedirs(f"annotation_logs",exist_ok=True) - dirs = f"{dirs} +incdir+\\\"{os.getenv('MCW_ROOT')}/verilog/\\\" " - # +incdir+\\\"{os.getenv('CARAVEL_ROOT')}/signoff/caravel/primetime-signoff/\\\" - elif(self.sim_type=="GL"): - macros = f'{macros} +define+GL +define+SIM=GL' - elif (self.sim_type=="RTL"): - macros = f'{macros} +define+SIM=\\\"RTL\\\"' - else: - print(f"Fatal: incorrect simulation type {self.sim_type}") - coverage_command = "" - if coverage: - coverage_command = "-cm line+tgl+cond+fsm+branch+assert" - os.environ["TESTCASE"] = f"{self.test_name}" - os.environ["MODULE"] = f"caravel_tests" - os.environ["SIM"] = self.sim_type - user_project = f"-v {CARAVEL_PATH}/rtl/__user_project_wrapper.v" - if caravan: - print ("Use caravan") - macros = f'+define+CARAVAN {macros} ' - user_project = f"-v {CARAVEL_PATH}/rtl/__user_analog_project_wrapper.v" - os.system(f"vlogan -full64 -sverilog +error+30 caravel_top.sv {user_project} {dirs} {macros} +define+TESTNAME=\\\"{self.test_name}\\\" +define+FTESTNAME=\\\"{self.full_test_name}\\\" +define+TAG=\\\"{os.getenv('RUNTAG')}\\\" -l {self.sim_path}/analysis.log -o {self.sim_path} ") - - os.system(f"vcs +lint=TFIPC-L {coverage_command} +error+30 -R -diag=sdf:verbose +sdfverbose +neg_tchk -debug_access -full64 -l {self.sim_path}/test.log caravel_top -Mdir={self.sim_path}/csrc -o {self.sim_path}/simv +vpi -P pli.tab -load $(cocotb-config --lib-name-path vpi vcs)") - self.passed = search_str(self.test_log.name,"Test passed with (0)criticals (0)errors") - Path(f'{self.sim_path}/{self.passed}').touch() - os.system("rm -rf AN.DB ucli.key core") # delete vcs additional files - #delete wave when passed - if self.passed == "passed" and zip_waves: - os.chdir(f'{self.cocotb_path}/{self.sim_path}') - os.system(f'zip -m waves_logs.zip analysis.log test.log *.vpd *.vcd') - self.cd_cocotb() - if os.path.exists(f"{self.cocotb_path}/sdfAnnotateInfo"): - shutil.move(f"{self.cocotb_path}/sdfAnnotateInfo", f"{self.sim_path}/sdfAnnotateInfo") - shutil.copyfile(f'{self.cocotb_path}/hex_files/{self.test_name}.hex',f'{self.sim_path}/{self.test_name}.hex') - - def find(self,name, path): - for root, dirs, files in os.walk(path): - if name in files: - return os.path.join(root, name) - print(f"Test {name} doesn't exist or don't have a C file ") - - def test_path(self): - test_name = self.test_name - test_name += ".c" - tests_path = os.path.abspath(f"{self.cocotb_path}/tests") - test_file = self.find(test_name,tests_path) - test_path = os.path.dirname(test_file) - return (test_path) - - def hex_generate(self): - tests_use_dff2 = ["mem_dff"] - tests_use_dff = ["mem_dff2","debug"] - #open docker - test_path =self.test_path() - self.cd_make() - if not os.path.exists(f"{self.cocotb_path}/hex_files"): - os.makedirs(f"{self.cocotb_path}/hex_files") # Create a new hex_files directory because it does not exist - elf_out = f"{self.cocotb_path}/hex_files/{self.test_name}.elf" - c_file = f"{test_path}/{self.test_name}.c" - hex_file = f"{self.cocotb_path}/hex_files/{self.test_name}.hex" - GCC_PATH = "/foss/tools/riscv-gnu-toolchain-rv32i/217e7f3debe424d61374d31e33a091a630535937/bin/" - GCC_PREFIX = "riscv32-unknown-linux-gnu" - SOURCE_FILES = f"{os.getenv('FIRMWARE_PATH')}/crt0_vex.S {os.getenv('FIRMWARE_PATH')}/isr.c" - LINKER_SCRIPT = f"{os.getenv('FIRMWARE_PATH')}/sections.lds" - CPUFLAGS = f"-march=rv32i -mabi=ilp32 -D__vexriscv__ " - verilog_path = f"{os.getenv('VERILOG_PATH')}" - test_dir = f"{os.getenv('VERILOG_PATH')}/dv/tests-caravel/mem" # linker script include // TODO: to fix this in the future from the mgmt repo - #change linker script to for mem tests - if self.test_name in tests_use_dff2: - LINKER_SCRIPT = self.linkerScript_for_mem("dff2",LINKER_SCRIPT) - elif self.test_name in tests_use_dff: - LINKER_SCRIPT = self.linkerScript_for_mem("dff",LINKER_SCRIPT) - - elf_command = (f"{GCC_PATH}/{GCC_PREFIX}-gcc -g -I{verilog_path}/dv/firmware -I{verilog_path}/dv/generated -I{verilog_path}/dv/ " - f"-I{verilog_path}/common {CPUFLAGS} -Wl,-Bstatic,-T,{LINKER_SCRIPT}," - f"--strip-debug -ffreestanding -nostdlib -o {elf_out} {SOURCE_FILES} {c_file}") - hex_command = f"{GCC_PATH}/{GCC_PREFIX}-objcopy -O verilog {elf_out} {hex_file} " - sed_command = f"sed -ie 's/@10/@00/g' {hex_file}" - - hex_gen_state = os.system(f"docker run -it -v {go_up(self.cocotb_path,4)}:{go_up(self.cocotb_path,4)} efabless/dv:latest sh -c 'cd {test_dir} && {elf_command} && {hex_command} && {sed_command} '") - self.full_terminal.write("elf file generation command:\n% ") - self.full_terminal.write(os.path.expandvars(elf_command)+"\n") - self.full_terminal.write("hex file generation command:\n% ") - self.full_terminal.write(os.path.expandvars(hex_command)+"\n% ") - self.full_terminal.write(os.path.expandvars(sed_command)+"\n") - self.cd_cocotb() - self.full_terminal.close() - if hex_gen_state != 0 : - print(f"fatal: Error when generating hex") - sys.exit() - - #change linker script to for mem tests - def linkerScript_for_mem(self,ram,LINKER_SCRIPT): - new_LINKER_SCRIPT = f"{self.cocotb_path}/{self.sim_path}/sections.lds" - shutil.copyfile(LINKER_SCRIPT, new_LINKER_SCRIPT) - if ram == "dff2": - change_str(str="> dff ",new_str="> dff2 ",file_path=new_LINKER_SCRIPT) - change_str(str="> dff\n",new_str="> dff2\n",file_path=new_LINKER_SCRIPT) - change_str(str="ORIGIN(dff)",new_str="ORIGIN(dff2)",file_path=new_LINKER_SCRIPT) - change_str(str="LENGTH(dff)",new_str="LENGTH(dff2)",file_path=new_LINKER_SCRIPT) - elif ram == "dff": - change_str(str="> dff2 ",new_str="> dff ",file_path=new_LINKER_SCRIPT) - change_str(str="ORIGIN(dff2)",new_str="ORIGIN(dff)",file_path=new_LINKER_SCRIPT) - change_str(str="LENGTH(dff2)",new_str="LENGTH(dff)",file_path=new_LINKER_SCRIPT) - else: - print(f"ERROR: wrong trype of ram {ram} need to be used for now the oldy rams that can be used for flashing and data are dff and dff2") - sys.exit() - return new_LINKER_SCRIPT - - def cd_make(self): - os.chdir(f"{os.getenv('VERILOG_PATH')}/dv/make") - - def cd_cocotb(self): - os.chdir(self.cocotb_path) - -class RunRegression: - def __init__(self,regression,test,type_arg,testlist,corner) -> None: - self.cocotb_path = f"{os.getenv('CARAVEL_ROOT')}/verilog/dv/cocotb" - self.regression_arg = regression - self.test_arg = test - self.testlist_arg = testlist - self.corners = corner - self.total_start_time = datetime.now() - if type_arg is None: - type_arg = "RTL" - self.type_arg = type_arg - self.write_command_log() - self.write_git_log() - with open('tests.json') as f: - self.tests_json = json.load(f) - self.tests_json = self.tests_json["Tests"] - self.get_tests() - self.run_regression() - - def get_tests(self): - self.tests = collections.defaultdict(lambda : collections.defaultdict(lambda : collections.defaultdict(dict))) #key is testname and value is list of sim types - self.unknown_tests = 0 - self.passed_tests = 0 - self.failed_tests = 0 - # regression - if self.regression_arg is not None: - sim_types = ("RTL","GL","GL_SDF") - for test,test_elements in self.tests_json.items(): - if fnmatch(test,"_*"): - continue - for sim_type in sim_types: - if sim_type =="GL_SDF": - for corner in self.corners: - if self.regression_arg in test_elements[sim_type]: - self.add_new_test(test_name=test,sim_type = sim_type,corner = corner) - else: - if self.regression_arg in test_elements[sim_type]: - self.add_new_test(test_name=test,sim_type = sim_type,corner = "-") - if (len(self.tests)==0): - print(f"fatal:{self.regression_arg} is not a valid regression name please input a valid regression \ncheck tests.json for more info") - sys.exit() - #test - if self.test_arg is not None: - if isinstance(self.test_arg,list): - for test in self.test_arg: - if test in self.tests_json: - if isinstance(self.type_arg,list): - for sim_type in self.type_arg: - if sim_type =="GL_SDF": - for corner in self.corners: - self.add_new_test(test_name=test,sim_type = sim_type, corner = corner) - else: self.add_new_test(test_name=test,sim_type = sim_type,corner = "-") - else: - if sim_type =="GL_SDF": - for corner in self.corners: - self.add_new_test(test_name=test,sim_type = sim_type, corner = corner) - else: self.add_new_test(test_name=test,sim_type = sim_type,corner = "-") - - else: - if self.test_arg in self.tests_json: - if isinstance(self.type_arg,list): - for sim_type in self.type_arg: - self.add_new_test(test_name=self.test_arg,sim_type = sim_type) - else: - self.add_new_test(test_name=self.test_arg,sim_type = self.type_arg) - # testlist TODO: add logic for test list - if self.testlist_arg is not None: - print(f'fatal: code for test list isnt added yet') - sys.exit() - - - self.update_reg_log() - - def add_new_test(self,test_name,sim_type,corner): - self.tests[test_name][sim_type][corner]["status"]= "pending" - self.tests[test_name][sim_type][corner]["starttime"]= "-" - self.tests[test_name][sim_type][corner]["endtime"]= "-" - self.tests[test_name][sim_type][corner]["duration"] = "-" - self.tests[test_name][sim_type][corner]["pass"]= "-" - self.unknown_tests +=1 - - def run_regression(self): - threads = list() - for test,sim_types in self.tests.items(): - for sim_type,corners in sim_types.items(): # TODO: add multithreading or multiprocessing here - for corner,status in corners.items(): - if iverilog: #threading - # x = threading.Thread(target=self.test_run_function,args=(test,sim_type,corner)) - # threads.append(x) - # x.start() - # time.sleep(10) - self.test_run_function(test,sim_type,corner) - else: - self.test_run_function(test,sim_type,corner) - for index, thread in enumerate(threads): - thread.join() - - if coverage: - self.generate_cov() - #TODO: add send mail here - - def test_run_function(self,test,sim_type,corner): - start_time = datetime.now() - self.tests[test][sim_type][corner]["starttime"] = datetime.now().strftime("%H:%M:%S(%a)") - self.tests[test][sim_type][corner]["duration"] = "-" - self.tests[test][sim_type][corner]["status"] = "running" - self.update_reg_log() - test_run = RunTest(test,sim_type,corner,) - self.tests[test][sim_type][corner]["status"] = "done" - self.tests[test][sim_type][corner]["endtime"] = datetime.now().strftime("%H:%M:%S(%a)") - self.tests[test][sim_type][corner]["duration"] = ("%.10s" % (datetime.now() - start_time)) - self.tests[test][sim_type][corner]["pass"]= test_run.passed - if test_run.passed == "passed": - self.passed_tests +=1 - elif test_run.passed == "failed": - self.failed_tests +=1 - self.unknown_tests -=1 - self.update_reg_log() - - - def generate_cov(self): - os.chdir(f"{self.cocotb_path}/sim/{os.getenv('RUNTAG')}") - os.system(f"urg -dir RTL*/*.vdb -format both -show tests -report coverageRTL/") - # os.system(f"urg -dir GL*/*.vdb -format both -show tests -report coverageGL/") - # os.system(f"urg -dir SDF*/*.vdb -format both -show tests -report coverageSDF/") - os.chdir(self.cocotb_path) - - def update_reg_log(self): - file_name=f"sim/{os.getenv('RUNTAG')}/runs.log" - f = open(file_name, "w") - f.write(f"{'Test':<33} {'status':<10} {'start':<15} {'end':<15} {'duration':<13} {'p/f':<5}\n") - for test,sim_types in self.tests.items(): - for sim_type,corners in sim_types.items(): - for corner,status in corners.items(): - new_test_name= f"{sim_type}-{test}-{corner}" - f.write(f"{new_test_name:<33} {status['status']:<10} {status['starttime']:<15} {status['endtime']:<15} {status['duration']:<13} {status['pass']:<5}\n") - f.write(f"\n\nTotal: ({self.passed_tests})passed ({self.failed_tests})failed ({self.unknown_tests})unknown ({('%.10s' % (datetime.now() - self.total_start_time))})time consumed ") - f.close() - - def write_command_log(self): - file_name=f"sim/{os.getenv('RUNTAG')}/command.log" - f = open(file_name, "w") - f.write(f"{' '.join(sys.argv)}") - f.close() - - def write_git_log(self): - file_name=f"sim/{os.getenv('RUNTAG')}/git_show.log" - f = open(file_name, "w") - # status, output = commands.getstatusoutput("git show") - f.write( f"Repo: {run('basename -s .git `git config --get remote.origin.url`', stdout=PIPE, stderr=PIPE, universal_newlines=True, shell=True).stdout}") - f.write( f"Branch name: {run('git symbolic-ref --short HEAD', stdout=PIPE, stderr=PIPE, universal_newlines=True, shell=True).stdout}") - f.write( run('git show --quiet HEAD', stdout=PIPE, stderr=PIPE, universal_newlines=True, shell=True).stdout) - MCW_ROOT = f"MCW_ROOT" - - f.write( f"\n\nRepo: {run(f'cd {os.getenv(MCW_ROOT)};basename -s .git `git config --get remote.origin.url`', stdout=PIPE, stderr=PIPE, universal_newlines=True, shell=True).stdout}") - f.write( f"Branch name: {run(f'cd {os.getenv(MCW_ROOT)};git symbolic-ref --short HEAD', stdout=PIPE, stderr=PIPE, universal_newlines=True, shell=True).stdout}") - f.write( run(f'cd {os.getenv(MCW_ROOT)};git show --quiet HEAD', stdout=PIPE, stderr=PIPE, universal_newlines=True, shell=True).stdout) - f.close() -class main(): - def __init__(self,args) -> None: - self.regression = args.regression - self.test = args.test - self.testlist = args.testlist - self.sim = args.sim - self.tag = args.tag - self.corner = args.corner - self.maxerr = args.maxerr - self.check_valid_args() - self.set_tag() - self.def_env_vars() - RunRegression(self.regression,self.test,self.sim,self.testlist,self.corner) - - def check_valid_args(self): - if all(v is None for v in [self.regression, self.test, self.testlist]): - print ("Fatal: Should provide at least one of the following options regression, test or testlist for more info use --help") - sys.exit() - if not set(self.sim).issubset(["RTL","GL","GL_SDF"]): - print (f"Fatal: {self.sim} isnt a correct type for -sim it should be one or combination of the following RTL, GL or GL_SDF") - sys.exit() - def set_tag(self): - self.TAG = None # tag will be set in the main phase and other functions will use it - if self.tag is not None: - self.TAG = self.tag - elif self.regression is not None: - self.TAG = f'{self.regression}_{datetime.now().strftime("%H_%M_%S_%d_%m")}' - else: - self.TAG = f'run{random.randint(0,1000)}_{datetime.now().strftime("%H_%M_%S_%d_%m")}' - Path(f"sim/{self.TAG}").mkdir(parents=True, exist_ok=True) - print(f"Run tag: {self.TAG}") - - def def_env_vars(self): - if os.getenv('CARAVEL_ROOT') is None or os.getenv('MCW_ROOT') is None: - print(f"Fatal: CARAVEL_ROOT or MCW_ROOT are not defined") - sys.exit() - cocotb_path = f"{os.getenv('CARAVEL_ROOT')}/verilog/dv/cocotb" - os.environ["CARAVEL_VERILOG_PATH"] = f"{os.getenv('CARAVEL_ROOT')}/verilog" - os.environ["VERILOG_PATH"] = f"{os.getenv('MCW_ROOT')}/verilog" - os.environ["CARAVEL_PATH"] = f"{os.getenv('CARAVEL_VERILOG_PATH')}" - os.environ["FIRMWARE_PATH"] = f"{os.getenv('MCW_ROOT')}/verilog/dv/firmware" - os.environ["RUNTAG"] = f"{self.TAG}" - os.environ["ERRORMAX"] = f"{self.maxerr}" - - - -import argparse -parser = argparse.ArgumentParser(description='Run cocotb tests') -parser.add_argument('-regression','-r', help='name of regression can found in tests.json') -parser.add_argument('-test','-t', nargs='+' ,help='name of test if no --sim provided RTL will be run ') -parser.add_argument('-sim', nargs='+' ,help='Simulation type to be run RTL,GL&GL_SDF provided only when run -test ') -parser.add_argument('-testlist','-tl', help='path of testlist to be run ') -parser.add_argument('-tag', help='provide tag of the run default would be regression name and if no regression is provided would be run___') -parser.add_argument('-maxerr', help='max number of errors for every test before simulation breaks default = 3') -parser.add_argument('-vcs','-v',action='store_true', help='use vcs as compiler if not used iverilog would be used') -parser.add_argument('-cov',action='store_true', help='enable code coverage') -parser.add_argument('-corner','-c', nargs='+' ,help='Corner type in case of GL_SDF run has to be provided') -parser.add_argument('-keep_pass_unzip',action='store_true', help='Normally the waves and logs of passed tests would be zipped. Using this option they wouldn\'t be zipped') -parser.add_argument('-caravan',action='store_true', help='simulate caravan instead of caravel') -args = parser.parse_args() -if (args.vcs) : - iverilog = False - vcs = True -if args.cov: - coverage = True -if args.sim == None: - args.sim= ["RTL"] -if args.corner == None: - args.corner= ["nom-t"] -if args.keep_pass_unzip: - zip_waves = False -if args.caravan: - caravan = True -print(f"regression:{args.regression}, test:{args.test}, testlist:{args.testlist} sim: {args.sim}") -main(args) - - - - - diff --git a/verilog/dv/cocotb/wb_models/housekeepingWB/HKSPImonitor.py b/verilog/dv/cocotb/wb_models/housekeepingWB/HKSPImonitor.py deleted file mode 100644 index bcaddfa5..00000000 --- a/verilog/dv/cocotb/wb_models/housekeepingWB/HKSPImonitor.py +++ /dev/null @@ -1,157 +0,0 @@ - -from fnmatch import fnmatch -import cocotb -from cocotb.triggers import Timer, FallingEdge,RisingEdge, ReadOnly -from cocotb_bus.monitors import Monitor -from cocotb.log import SimLogFormatter, SimTimeContextFilter -from cocotb.binary import BinaryValue -from cocotb.result import TestFailure -from math import ceil -import copy -import logging -from wb_models.housekeepingWB.HKmonitor import HKmonitor -from interfaces.common import Macros - - -class HKSPImonitor(Monitor): - """Observes single input """ - def __init__(self, name, block_path,interfaces, clock,reset,is_logger = False, input=True, callback=None, event=None): - self.name = name - self.interfaces = interfaces - self.clock = clock - self.reset = reset - self.block_path = block_path - self.is_logger = is_logger - self.input = input - self.setup_logger() - Monitor.__init__(self, callback, event) - - - async def _monitor_recv(self): - old_trans_hold = None - old_trans_no_valid = None - while True: - if Macros['GL']: - await RisingEdge(self.block_path.clknet_0_mgmt_gpio_in) # the main reason for doing all this can't use mgmt_gpio_in[4] as signal - else : - await RisingEdge(self.block_path.hkspi.SCK) # the main reason for doing all this can't use mgmt_gpio_in[4] as signal - cocotb.log.debug(f'reset {self.reset.value.binstr }') - - if self.reset.value.binstr == '0': - continue - - mgmt_gpio_in = self.block_path.mgmt_gpio_in.value - gpio_size = mgmt_gpio_in.n_bits-1 - CSB = mgmt_gpio_in[gpio_size-3] - if CSB.binstr == '1': - continue - SCK = mgmt_gpio_in[gpio_size-4] - SDI = mgmt_gpio_in[gpio_size-2] - SDO = self.block_path.mgmt_gpio_out.value[gpio_size-1] - if not self.input: - if self.block_path.hkspi.SCK.value.binstr != '0': - continue - # update signal - self.interfaces['CSB']['val'] = CSB - self.interfaces['SCK']['val'] = SCK - - if self.input: - self.interfaces['SDI']['val'] = SDI - else : - self.interfaces['SDO']['val'] = SDO - - # logger - self.logger.debug(f' ') - self.handler.terminator = "" - self.handler.setFormatter(SimLogFormatter()) - self.logger.debug(f'') - self.handler.setFormatter(logging.Formatter('%(message)s')) - for key2,signal in self.interfaces.items(): - if fnmatch(key2,"_*"): - continue - if signal['val'].is_resolvable: - length = self.lengths[key2] - (len(hex(signal['val'].integer))) - self.logger.debug(f" {hex(signal['val'].integer)}{' '*length}|") - # signal['val'] = self.block_path._id(signal['signal'],False).value.integer - else: - length = self.lengths[key2] - (len('x')) - self.logger.debug(f" x{' '*length}|") - self.handler.terminator = "\n" - self._recv(self.interfaces) - - - - - """method for setting up logger for WB model""" - def setup_logger(self): - self.logger = logging.getLogger(f'HouseKeeping{self.name}') - self.logger.setLevel(logging.DEBUG) - if not self.is_logger: - self.logger.setLevel(logging.INFO) - self.handler = logging.StreamHandler() - # return - else : - self.handler = logging.FileHandler(f"{self.name}.log",mode='w') - self.handler.addFilter(SimTimeContextFilter()) - self.logger.addHandler(self.handler) - # get the sizes of signals - #for key,interface in self.interfaces.items(): - for key,signal in self.interfaces.items(): - if fnmatch(key,"_*"): - continue - signal['val'] = BinaryValue(value=0,n_bits=1) - size = signal['val'].n_bits - signal['val'] = BinaryValue(value = int(size) * '1',n_bits=size) - # set the logger file header - # set first line - self.handler.terminator = "" - self.logger.debug(f' timestamp level ') - length =0 - for key2,signal in self.interfaces.items(): - if fnmatch(key2,"_*"): - continue - length += max(ceil(signal['val'].n_bits/4)+2 , len(key2)) +3 - length -= len(key)+1 - self.logger.debug(f'| signals{" "*int(length)}') - self.handler.terminator = "\n" - self.logger.debug(f' ') - # set second line - self.handler.terminator = "" - self.logger.debug(f'{" "*20}|') - length =0 - self.lengths = dict() - for key2,signal in self.interfaces.items(): - if fnmatch(key2,"_*"): - continue - self.lengths[key2] = max((len(hex(signal['val'].integer))),len(key2)) +1 - length = self.lengths[key2] - len(key2) - self.logger.debug(f'{key2}{" "*length} ') - self.handler.terminator = "\n" - - - -class CSBmonitor(Monitor): - """Observes single input """ - def __init__(self, name, block_path,interfaces, clock,reset,is_logger = False, input=True, callback=None, event=None): - self.name = name - self.interfaces = interfaces - self.clock = clock - self.reset = reset - self.block_path = block_path - self.is_logger = is_logger - self.input = input - Monitor.__init__(self, callback, event) - - - async def _monitor_recv(self): - - while True: - if Macros['GL']: - await RisingEdge(self.block_path.net67) - else: - await RisingEdge(self.block_path.hkspi.CSB) - - self._recv(True) - - - \ No newline at end of file diff --git a/verilog/dv/cocotb/wb_models/housekeepingWB/HK_models.py b/verilog/dv/cocotb/wb_models/housekeepingWB/HK_models.py deleted file mode 100644 index 42a98598..00000000 --- a/verilog/dv/cocotb/wb_models/housekeepingWB/HK_models.py +++ /dev/null @@ -1,371 +0,0 @@ -from audioop import add -from ctypes import BigEndianStructure -from operator import truediv -from cocotb import top -import cocotb -from cocotb.binary import BinaryValue -from cocotb.triggers import Timer, RisingEdge, ReadOnly -import fnmatch -import copy -import logging -from cocotb.result import TestFailure -from cocotb_coverage.coverage import * - -class HK_models(): - def __init__(self,reg_model,expeceted_output,hk_hdl): - self.reg_model = reg_model - self.expeceted_output = expeceted_output - self.hk_hdl = hk_hdl - self.old_hold_val = 1 - self.gpio_out_pre = BinaryValue(value=0,n_bits=38,bigEndian=False) - self.mgmt_gpio_oeb = BinaryValue(value=0,n_bits=38,bigEndian=False) - self.exp_out_wb = [] # expected output for wishbone - self.exp_out_uart_rx = [self.expeceted_output['UART']] # expected output for uart - self.exp_out_debug = [self.expeceted_output['debug']] # expected output for - self.exp_out_spi = [self.expeceted_output['SPI']] # expected output for - self.reset_spi_vals(True) - self.input_dis =3 - self.regs_full_list() - self.intial_cov() - - - - """model for the wishbone interface with housekeeping""" - def wishbone_model(self,trans): - clock_signal = trans["_clk"]["signal"] - if trans["stb"]["val"] == 1 : # valid data - address = trans["adr"]["val"] - data = trans["data"]["val"] - # if ack isn't realsead don't care about the new input it must be the same as the old and the monitor checks that - if (self.old_hold_val == 0): - self.old_hold_val = trans["_hold"]["val"] - return - self.old_hold_val = trans["_hold"]["val"] - if trans["write_en"]["val"] ==1 : # write cycle - cocotb.log.debug(f'[HK_models][_valid_address] write enable for address: {hex(address)} and data: {hex(data)} ') - select = trans["sel"]["val"] - cocotb.scheduler.add(self._write_reg_wb(address,data,select,clock_signal)) - else: #read cycle - self.write_exp_out_wb(self._read_reg_wb(address)) - self.wishbone_last_trans = trans - - """model for the system interface with housekeeping""" - def system_model(self,trans): - self.reg_model['sys']['0x00'][0][6] = trans["vdd2_good"]["val"] - self.reg_model['sys']['0x00'][1][6] = trans["vdd1_good"]["val"] - self.reg_model['sys']['0x00'][2][6] = trans["vcc2_good"]["val"] - self.reg_model['sys']['0x00'][3][6] = trans["vcc1_good"]["val"] - - - """model for the UART interface with housekeeping""" - def UART_model(self,trans): - # when transmiting TX the gpio data out should change to the tx value - if trans["enable"]["val"]: - self.gpio_out_pre[6]= trans["TX"]["val"].value - else: - gpio_data = self._read_reg_keys(["GPIO","0x0c"]) # mgmt_gpio_data[7:0] - self.gpio_out_pre[6]= int(gpio_data[len(gpio_data)-1 -6]) # mgmt_gpio_data[6] - # predecting the rx output value when the value UART is enble is the value drom pin [5] - gpio_in_size = trans["gpio_in"]["val"].n_bits -1 - output = self.expeceted_output['UART'] - output["RX"]["val"] = 0 - if trans["enable"]["val"]: - output["RX"]["val"] = trans["gpio_in"]["val"][gpio_in_size-5] #gpio_in[5] - self.exp_out_uart_rx.append(output) - - - """model for the debug interface with housekeeping""" - def debug_model(self,trans): - # when debug is enable gpio out [0] should follow debug_out - if trans["enable"]["val"]: - self.gpio_out_pre[0] = trans["data"]["val"].value - self.mgmt_gpio_oeb[0] = trans["data"]["val"].value - else: - gpio_data = self._read_reg_keys(["GPIO","0x0c"]) # mgmt_gpio_data[7:0] - self.gpio_out_pre[0]= int(gpio_data[len(gpio_data)-1 -0]) # mgmt_gpio_data[6] - gpio_data_en = self._read_reg_keys(["GPIO","0x24"]) # gpio_configure[0][7:0] - self.mgmt_gpio_oeb[0]= 1- int(gpio_data[len(gpio_data_en)-1 -self.input_dis]) # gpio_configure[0][3] - - # predecting the debug in signal when debug mode is enbled taking the value from pin [0] - gpio_in_size = trans["gpio_in"]["val"].n_bits -1 - output = self.expeceted_output['debug'] - output["data"]["val"] = 0 - if trans["enable"]["val"]: - output["data"]["val"] = trans["gpio_in"]["val"][gpio_in_size-0] # mgmt_gpio_in[0] - self.exp_out_debug.append(output) - - """model for the SPI interface with housekeeping""" - def spi_model(self,trans): - output = self.expeceted_output['SPI'] - output["SDO"]["val"] = 0 - cocotb.log.debug(f'[HK_models][spi_model] spi mode {self.spi_mode[0]} bit number {self.spi_mode[1]} command = {self.command_spi} address = {self.address_spi} write = {self.write_spi} stream = {self.spi_mode[2]}') - if self.spi_mode[0] == "command": - self._setCommand(trans['SDI']['val'].binstr) - self.exp_out_spi.append(output) - elif self.spi_mode[0] == "address": - self._setAddress(trans['SDI']['val'].binstr) - self.exp_out_spi.append(output) - elif self.spi_mode[0] == "write": - self._setWriteData(trans['SDI']['val'].binstr) - self.exp_out_spi.append(output) - elif self.spi_mode[0] == "read": - output["SDO"]["val"] = self._getReadData() - self.exp_out_spi.append(output) - elif self.spi_mode[0] == "read/write": - output["SDO"]["val"] = self._getReadData() - self.exp_out_spi.append(output) - elif self.spi_mode[0] == "noOP": - self._setWriteData(trans['SDI']['val'].binstr) - else: - raise TestFailure("[HK_models][spi_model] invalid command type") - - - """reset the spi vals when CSB is going from low to high""" - def reset_spi_vals(self,trans): - cocotb.log.info(f"[HK_models][reset_spi_vals] CSB is disabled") - self.spi_mode = ["command",0,0] # [mode type, bit number, stream number] - self.command_spi = ['0']*8 - self.address_spi = ['0']*8 - self.write_spi = ['0']*8 - self.read_spi = ['0']*8 - - def _setCommand(self,bit): - if bit not in ['0','1']: - cocotb.log.warning(f"[HK_models][_setCommand] incorrect bit size bit = {bit}") - self.command_spi[self.spi_mode[1]] = bit - self.spi_mode[1] += 1 - self.spi_mode[2] = 0 # stream number - if self.spi_mode[1] >= 8: - self.spi_mode[0] = "address" - self.spi_mode[1] = 0 - - def _setAddress(self,bit): - if bit not in ['0','1']: - cocotb.log.warning(f"[HK_models][_setAddress] incorrect bit size bit = {bit}") - self.address_spi[self.spi_mode[1]] = bit - self.spi_mode[1] += 1 - self.spi_mode[2] = 0 # stream number - if self.spi_mode[1] >= 8: - self.spi_mode[1] = 0 - if self.command_spi[0:2] == ['0','0']: - self.spi_mode[0] = "noOP" - if self.command_spi[0:2] == ['1','0']: - self.spi_mode[0] = "write" - if self.command_spi[0:2] == ['0','1']: - self.spi_mode[0] = "read" - if self.command_spi[0:2] == ['1','1']: - self.spi_mode[0] = "read/write" - - def _setWriteData(self,bit): - if bit not in ['0','1']: - cocotb.log.warning(f"[HK_models][_setWriteData] incorrect bit size bit = {bit}") - # return if write is write n-bytes command and number of bytes exceeds the required - if self.command_spi[2:5] != ['0','0','0']: - self.spi_mode_cov('write-n') - byte_num = int(''.join(self.command_spi[2:5]),2) - if byte_num <= self.spi_mode[2]: #number of written byte <= stream number - self.spi_mode[0] = "noOP" - return - else: self.spi_mode_cov('write') - self.write_spi[self.spi_mode[1]] = bit - self.spi_mode[1] += 1 - if self.spi_mode[1] >= 8: - self.spi_mode[1] = 0 - address = int(''.join(self.address_spi),2) + self.spi_mode[2] - data = ''.join(self.write_spi) - data = BinaryValue(value = data, n_bits =8) - is_valid, keys=self._valid_address_spi(address) - if is_valid: - self.reg_cov(keys[0],keys[1],is_read=False) - cocotb.log.debug(f'[HK_models][_valid_address] writing {data} to memory:{keys[0]} field: {keys[1]} through housekeeping SPI address = {address}') - self._write_fields(keys,data) - if self.command_spi[2:5] != ['0','0','0']:self.spi_mode_cov('write-n') - else: self.spi_mode_cov('write') - self.spi_mode[2] += 1 # stream number - - - def _getReadData(self): - # return if write is write n-bytes command and number of bytes exceeds the required - if self.command_spi[2:5] != ['0','0','0']: - byte_num = int(''.join(self.command_spi[2:5]),2) - if byte_num <= self.spi_mode[2]: #number of written byte <= stream number - self.spi_mode[0] = "noOP" - return - bit_num = self.spi_mode[1] - address = int(''.join(self.address_spi),2) + self.spi_mode[2] - is_valid, keys=self._valid_address_spi(address) - data = '' - if is_valid: - self.reg_cov(keys[0],keys[1]) - cocotb.log.info(f'[HK_models][_getReadData] reading from memory:{keys[0]} field: {keys[1]} through SPI') - for field in self.reg_model[keys[0]][keys[1]]: - data = str(bin(field[6])[2:]).zfill(field[3]) + data - data = data.zfill(8) - cocotb.log.info(f'[HK_models][_getReadData] reading from memory:{keys[0]} field: {keys[1]} through SPI data {data} bit[{7-bit_num}] = {data[bit_num]}') - - self.spi_mode[1] += 1 - if self.spi_mode[1] >= 8: - self.spi_mode[1] = 0 - self.spi_mode[2] += 1 # stream number - if self.command_spi[2:5] != ['0','0','0']:self.spi_mode_cov('read-n') - else: self.spi_mode_cov('read') - - if data == '': - return 0 - return int(data[bit_num],2) - - - def write_exp_out_wb(self,data): - output = self.expeceted_output['wishbone'] - output['ack']['val'] = 1 - output['_valid_cycle']['val'] = 1 - output['data']['val'] = BinaryValue(value = data,n_bits = 32,bigEndian=False) - self.exp_out_wb.append(output) - - """write register through wishbone """ - async def _write_reg_wb(self,address,data,select,clk): - old_data = self._read_reg_wb(address) - self.write_exp_out_wb(old_data) - - if address == 0x2600000c: # mgmt_gpio_data is a special case as it got written completely at the end of the serial writing - for i in range(6): - await RisingEdge(self.hk_hdl._id(clk,False)) - - for i in range(3): - await RisingEdge(self.hk_hdl._id(clk,False)) - - for i,sel in enumerate(select.binstr): - temp_addr = BinaryValue(value=(address.value +i)) - if sel is '1': - is_valid, keys=self._valid_address(temp_addr) - if is_valid: - self.reg_cov(keys[0],keys[1],is_SPI=False,is_read=False) - cocotb.log.debug(f'[HK_models][_valid_address] writing {data[(8*((4-i-1))):8*(4-i)-1]} to memory:{keys[0]} field: {keys[1]}') - temp_data = data[(8*((4-i-1))):8*(4-i)-1] - self._write_fields(keys,temp_data) - cocotb.log.debug(f" [HK_models][_valid_address] address {hex(address)} used for access housekeeping memory success") - if address != 0x2600000c: - for i in range(2): - await RisingEdge(self.hk_hdl._id(clk,False)) - - def _write_fields(self,keys,data): - for field in self.reg_model[keys[0]][keys[1]]: - if field[4] == "RW": - shift = field[2] - size = field[3] - cocotb.log.debug(f'[HK_models][_write_fields] before update field : {field[1]} data = {bin(field[6])} with data {data[shift:shift+size-1]} ') - field[6] = data[8-shift-size:8-shift-1] - cocotb.log.debug(f'[HK_models][_write_fields] after update field : {field[1]} data = {bin(field[6])} with data {data[shift:shift+size-1]} ') - """read register value using keys return size binary value""" - def _read_reg_keys(self,keys:list): - size =0 - data = "" - for field in self.reg_model[keys[0]][keys[1]]: - size += field[3] - data += bin(field[6])[2:].zfill(size) - return data - - - """read register through wishbone """ - def _read_reg_wb(self,address): - total_size = 32 - data_string ="0" - data_out = list(bin(0)[2:].zfill(total_size)) - for i in range(4): - temp_addr = BinaryValue(value=(address.value +i)) - is_valid, keys=self._valid_address(temp_addr) - if is_valid: - self.reg_cov(keys[0],keys[1],is_SPI=False) - for field in self.reg_model[keys[0]][keys[1]]: - shift = field[2] - size = field[3] - first_index = ((8 *(4-i))) - shift-size - second_index = ((8 *(4-i))) - shift - data = bin(field[6])[2:].zfill(size) - cocotb.log.debug(f"[HK_models][_read_reg] memory:{keys[0]} shift:{keys[1]} field:{field[0]} data:{data} ") - for k,j in enumerate(range(first_index, second_index, 1)): - data_out[j] = data[k] - data_string = "".join(data_out) - cocotb.log.debug(f"[HK_models][_read_reg] register {hex(address)} has value {hex(int(data_string,2))} ") - return int(data_string,2) - - """return false if the address isn't exist inside housekeeping if the address exist return true and the key of address in JSON file""" - def _valid_address(self,address): - size = max(len(address),32) - address = address.binstr.zfill(size) - for key,memory in self.reg_model.items(): - if fnmatch.fnmatch(key, "_*") : - continue - # remove the first 2 element 0b and - base_addr= bin(memory["base_addr"][1])[2:].zfill(size) - cocotb.log.debug(f'[HK_models][_valid_address] base address[:13]={hex(int(base_addr[size-32:size-13],2))} target address[:13]={hex(int(address[size-32:size-13],2))} shift={"{0:#0{1}x}".format(int(address[size-12:],2),4)}') - if base_addr[size-32:size-13] == address[size-32:size-13]: - if "{0:#0{1}x}".format(int(address[size-12:],2),4) in memory: - cocotb.log.debug(f'[HK_models][_valid_address] base address={hex(int(base_addr,2))} key {key}') - return True, [key,"{0:#0{1}x}".format(int(address[size-12:],2),4)] - cocotb.log.warning(f"[HK_models][_valid_address] address {hex(int(address,2))} used for access housekeeping memory isn't valid") - return False, None - - """return false if the address isn't exist inside housekeeping if the address exist return true and the key of address in JSON file""" - def _valid_address_spi(self,address): - for key,memory in self.reg_model.items(): - if fnmatch.fnmatch(key, "_*") : - continue - for key2,reg in memory.items(): - if key2 == "base_addr" : - continue - for field in reg: - if field[7] == address: - return True,[key,key2] - cocotb.log.warning(f"[HK_models][_valid_address_spi] address {hex(address)} for SPI housekeeping isn't valid") - return False, None - - -######################## coverage ############################ - def regs_full_list(self): - bins = list() - labels = list() - for key,mem in self.reg_model.items(): - if fnmatch.fnmatch(key, "_*"): - continue - for key2,fields in mem.items(): - if key2=='base_addr': - continue - bins.append((key,key2)) - labels.append((self.reg_model[key][key2][0][0])) - self.reg_bins = bins - self.reg_labels = labels - def intial_cov(self): - for i in [True,False]: - for j in [True,False]: - self.reg_cov(0,0,i,j) - self.spi_mode_cov(0) - - def reg_cov(self,key1,key2,is_SPI=True,is_read=True): - s='' - if is_SPI: - s = "spi." - else: - s="wishbone." - if is_read: - s +="read" - else: - s+= "write" - @CoverPoint(f"top.caravel.housekeeping.regs.{s}", - xf = lambda key1,key2:(key1,key2), - bins = self.reg_bins, - bins_labels=self.reg_labels) - def cov(key1,key2): - pass - cov(key1,key2) - return (key1,key2) - - - def spi_mode_cov(self,mode): - @CoverPoint(f"top.caravel.housekeeping.spi.modes", - bins = ['noOP','write','read','read/write','write-n','read-n','read/write-n','Pass-m','pass-u'], - bins_labels=['No operation','Write in streaming mode','Read in streaming mode','Simultaneous Read/Write in streaming mode','Write in n-byte mode','Read in n-byte mode','Simultaneous Read/Write in n-byte mode','Pass-through (management) Read/Write streaming mode','Pass-through (user) Read/Write in streaming mode' ]) - def cov(mode): - pass - cov(mode) - return mode \ No newline at end of file diff --git a/verilog/dv/cocotb/wb_models/housekeepingWB/HK_regs.json b/verilog/dv/cocotb/wb_models/housekeepingWB/HK_regs.json deleted file mode 100644 index 43a5219a..00000000 --- a/verilog/dv/cocotb/wb_models/housekeepingWB/HK_regs.json +++ /dev/null @@ -1,127 +0,0 @@ -{ - "_comment": "the list contain the fields in register with shift spcified [field name,name iniside housekeeping, shift, size,mode,reset,value(intial is reset value), SPI address map] the shift is from the base address like SPI, system and gpio base address", - "_comment2": "Base address is the first element and called first address", - "_not_used_currently":["0x34",[["SRAM read-only control","sram_ro_csb",0,1,"RW",1,1,20],["SRAM read-only control","sram_ro_clk",1,1,"RW",0,0,20]], "0x30",[["SRAM read-only address","sram_ro_addr",0,8,"RW",0,0,21]]], - - "SPI":{ "base_addr": ["SPI_BASE_ADR",638582784], - "0x00": [["SPI status",null,0,8,"undefined",0,0,0]], - "0x06": [["Manufacturer ID",["mfgr_id",11,8],0,4,"RO",4,4,1]], - "0x05": [["Manufacturer ID",["mfgr_id",7,0],0,8,"RO",86,86,2]], - "0x04": [["Manufacturer ID",["prod_id",7,0],0,8,"RO",17,17,3]], - "0x0b": [["User project ID",["mask_rev",31,24],0,8,"RO",0,0,4]], - "0x0a": [["User project ID",["mask_rev",23,16],0,8,"RO",0,0,5]], - "0x09": [["User project ID",["mask_rev",15,8],0,8,"RO",0,0,6]], - "0x08": [["User project ID",["mask_rev",7,0],0,8,"RO",0,0,7]], - "0x0c": [["PLL enables","pll_ena",0,1,"RW",0,0,8],["PLL DCO enables","pll_dco_ena",1,1,"RW",1,1,8]], - "0x10": [["PLL bypass","pll_bypass",0,1,"RW",1,1,9]], - "0x14": [["CPU IRQ","irq_spi",0,1,"RW",0,0,10]], - "0x18": [["CPU reset","reset_reg",0,1,"RW",0,0,11]], - "0x28": [["CPU trap","trap",0,1,"NA",0,0,12]], - "0x1c": [["DCO trim",["pll_trim",7,0],0,8,"RW",255,255,13]], - "0x1d": [["DCO trim",["pll_trim",15,8],0,8,"RW",239,239,14]], - "0x1e": [["DCO trim",["pll_trim",23,16],0,8,"RW",255,255,15]], - "0x1f": [["DCO trim",["pll_trim",25,24],0,2,"RW",3,3,16]], - "0x20": [["PLL output divider","pll_sel",0,3,"RW",2,2,17],["PLL output divider 2","pll90_sel",3,3,"RW",2,2,17]], - "0x24": [["PLL feedback divider","pll_div",0,5,"RW",4,4,18]] - }, - - "GPIO":{ "base_addr": ["GPIO_BASE_ADR",637534208], - "0x00": [["xfer","serial_xfer",0,1,"RW",0,0,19],["bit bang enable","serial_bb_enable",1,1,"RW",0,0,19], - ["bit bang reset","serial_bb_resetn",2,1,"RW",0,0,19],["bit bang load","serial_bb_load",3,1,"RW",0,0,19], - ["bit bang clock","serial_bb_clock",4,1,"RW",0,0,19],["bit bang data1","serial_bb_data_1",5,1,"RW",0,0,19], - ["bit bang data1","serial_bb_data_2",6,1,"RW",0,0,19]], - "0x04": [["GPIO power control (reg_mprj_pwr)","pwr_ctrl_out",0,4,"RW",0,0,110]], - "0x0c": [["GPIO data low(reg_mprj_datal)",["mgmt_gpio_data",7,0],0,8,"RW",0,0,109]], - "0x0d": [["GPIO data low(reg_mprj_datal)",["mgmt_gpio_data",15,8],0,8,"RW",0,0,108]], - "0x0e": [["GPIO data low(reg_mprj_datal)",["mgmt_gpio_data",23,16],0,8,"RW",0,0,107]], - "0x0f": [["GPIO data low(reg_mprj_datal)",["mgmt_gpio_data",31,24],0,8,"RW",0,0,106]], - "0x10": [["GPIO data high(reg_mprj_datah)",["mgmt_gpio_data",37,32],0,5,"RW",0,0,105]], - "0x24": [["mprj_io[00](reg_mprj_io_0)",["gpio_configure[0]",7,0],0,8,"RW",3,3,30]], - "0x25": [["mprj_io[00](reg_mprj_io_0)",["gpio_configure[0]",12,8],0,5,"RW",24,24,29]], - "0x28": [["mprj_io[01](reg_mprj_io_1)",["gpio_configure[1]",7,0],0,8,"RW",3,3,32]], - "0x29": [["mprj_io[01](reg_mprj_io_1)",["gpio_configure[1]",12,8],0,5,"RW",24,24,31]], - "0x2c": [["mprj_io[02](reg_mprj_io_2)",["gpio_configure[2]",7,0],0,8,"RW",3,3,34]], - "0x2d": [["mprj_io[02](reg_mprj_io_2)",["gpio_configure[2]",12,8],0,5,"RW",4,4,33]], - "0x30": [["mprj_io[03](reg_mprj_io_3)",["gpio_configure[3]",7,0],0,8,"RW",1,1,36]], - "0x31": [["mprj_io[03](reg_mprj_io_3)",["gpio_configure[3]",12,8],0,5,"RW",8,8,35]], - "0x34": [["mprj_io[04](reg_mprj_io_4)",["gpio_configure[4]",7,0],0,8,"RW",3,3,38]], - "0x35": [["mprj_io[04](reg_mprj_io_4)",["gpio_configure[4]",12,8],0,5,"RW",4,4,37]], - "0x38": [["mprj_io[05](reg_mprj_io_5)",["gpio_configure[5]",7,0],0,8,"RW",3,3,40]], - "0x39": [["mprj_io[05](reg_mprj_io_5)",["gpio_configure[5]",12,8],0,5,"RW",4,4,39]], - "0x3c": [["mprj_io[06](reg_mprj_io_6)",["gpio_configure[6]",7,0],0,8,"RW",3,3,42]], - "0x3d": [["mprj_io[06](reg_mprj_io_6)",["gpio_configure[6]",12,8],0,5,"RW",4,4,41]], - "0x40": [["mprj_io[07](reg_mprj_io_7)",["gpio_configure[7]",7,0],0,8,"RW",3,3,44]], - "0x41": [["mprj_io[07](reg_mprj_io_7)",["gpio_configure[7]",12,8],0,5,"RW",4,4,43]], - "0x44": [["mprj_io[08](reg_mprj_io_8)",["gpio_configure[8]",7,0],0,8,"RW",3,3,46]], - "0x45": [["mprj_io[08](reg_mprj_io_8)",["gpio_configure[8]",12,8],0,5,"RW",4,4,45]], - "0x48": [["mprj_io[09](reg_mprj_io_9)",["gpio_configure[9]",7,0],0,8,"RW",3,3,48]], - "0x49": [["mprj_io[09](reg_mprj_io_9)",["gpio_configure[9]",12,8],0,5,"RW",4,4,47]], - "0x4c": [["mprj_io[10](reg_mprj_io_10)",["gpio_configure[10]",7,0],0,8,"RW",3,3,50]], - "0x4d": [["mprj_io[10](reg_mprj_io_10)",["gpio_configure[10]",12,8],0,5,"RW",4,4,49]], - "0x50": [["mprj_io[11](reg_mprj_io_11)",["gpio_configure[11]",7,0],0,8,"RW",3,3,52]], - "0x51": [["mprj_io[11](reg_mprj_io_11)",["gpio_configure[11]",12,8],0,5,"RW",4,4,51]], - "0x54": [["mprj_io[12](reg_mprj_io_12)",["gpio_configure[12]",7,0],0,8,"RW",3,3,54]], - "0x55": [["mprj_io[12](reg_mprj_io_12)",["gpio_configure[12]",12,8],0,5,"RW",4,4,53]], - "0x58": [["mprj_io[13](reg_mprj_io_13)",["gpio_configure[13]",7,0],0,8,"RW",3,3,56]], - "0x59": [["mprj_io[13](reg_mprj_io_13)",["gpio_configure[13]",12,8],0,5,"RW",4,4,55]], - "0x5c": [["mprj_io[14](reg_mprj_io_14)",["gpio_configure[14]",7,0],0,8,"RW",3,3,58]], - "0x5d": [["mprj_io[14](reg_mprj_io_14)",["gpio_configure[14]",12,8],0,5,"RW",4,4,57]], - "0x60": [["mprj_io[15](reg_mprj_io_15)",["gpio_configure[15]",7,0],0,8,"RW",3,3,60]], - "0x61": [["mprj_io[15](reg_mprj_io_15)",["gpio_configure[15]",12,8],0,5,"RW",4,4,59]], - "0x64": [["mprj_io[16](reg_mprj_io_16)",["gpio_configure[16]",7,0],0,8,"RW",3,3,62]], - "0x65": [["mprj_io[16](reg_mprj_io_16)",["gpio_configure[16]",12,8],0,5,"RW",4,4,61]], - "0x68": [["mprj_io[17](reg_mprj_io_17)",["gpio_configure[17]",7,0],0,8,"RW",3,3,64]], - "0x69": [["mprj_io[17](reg_mprj_io_17)",["gpio_configure[17]",12,8],0,5,"RW",4,4,63]], - "0x6c": [["mprj_io[18](reg_mprj_io_18)",["gpio_configure[18]",7,0],0,8,"RW",3,3,66]], - "0x6d": [["mprj_io[18](reg_mprj_io_18)",["gpio_configure[18]",12,8],0,5,"RW",4,4,65]], - "0x70": [["mprj_io[19](reg_mprj_io_19)",["gpio_configure[19]",7,0],0,8,"RW",3,3,68]], - "0x71": [["mprj_io[19](reg_mprj_io_19)",["gpio_configure[19]",12,8],0,5,"RW",4,4,67]], - "0x74": [["mprj_io[20](reg_mprj_io_20)",["gpio_configure[20]",7,0],0,8,"RW",3,3,70]], - "0x75": [["mprj_io[20](reg_mprj_io_20)",["gpio_configure[20]",12,8],0,5,"RW",4,4,69]], - "0x78": [["mprj_io[21](reg_mprj_io_21)",["gpio_configure[21]",7,0],0,8,"RW",3,3,72]], - "0x79": [["mprj_io[21](reg_mprj_io_21)",["gpio_configure[21]",12,8],0,5,"RW",4,4,71]], - "0x7c": [["mprj_io[22](reg_mprj_io_22)",["gpio_configure[22]",7,0],0,8,"RW",3,3,74]], - "0x7d": [["mprj_io[22](reg_mprj_io_22)",["gpio_configure[22]",12,8],0,5,"RW",4,4,73]], - "0x80": [["mprj_io[23](reg_mprj_io_23)",["gpio_configure[23]",7,0],0,8,"RW",3,3,76]], - "0x81": [["mprj_io[23](reg_mprj_io_23)",["gpio_configure[23]",12,8],0,5,"RW",4,4,75]], - "0x84": [["mprj_io[24](reg_mprj_io_24)",["gpio_configure[24]",7,0],0,8,"RW",3,3,78]], - "0x85": [["mprj_io[24](reg_mprj_io_24)",["gpio_configure[24]",12,8],0,5,"RW",4,4,77]], - "0x88": [["mprj_io[25](reg_mprj_io_25)",["gpio_configure[25]",7,0],0,8,"RW",3,3,80]], - "0x89": [["mprj_io[25](reg_mprj_io_25)",["gpio_configure[25]",12,8],0,5,"RW",4,4,79]], - "0x8c": [["mprj_io[26](reg_mprj_io_26)",["gpio_configure[26]",7,0],0,8,"RW",3,3,82]], - "0x8d": [["mprj_io[26](reg_mprj_io_26)",["gpio_configure[26]",12,8],0,5,"RW",4,4,81]], - "0x90": [["mprj_io[27](reg_mprj_io_27)",["gpio_configure[27]",7,0],0,8,"RW",3,3,84]], - "0x91": [["mprj_io[27](reg_mprj_io_27)",["gpio_configure[27]",12,8],0,5,"RW",4,4,83]], - "0x94": [["mprj_io[28](reg_mprj_io_28)",["gpio_configure[28]",7,0],0,8,"RW",3,3,86]], - "0x95": [["mprj_io[28](reg_mprj_io_28)",["gpio_configure[28]",12,8],0,5,"RW",4,4,85]], - "0x98": [["mprj_io[29](reg_mprj_io_29)",["gpio_configure[29]",7,0],0,8,"RW",3,3,88]], - "0x99": [["mprj_io[29](reg_mprj_io_29)",["gpio_configure[29]",12,8],0,5,"RW",4,4,87]], - "0x9c": [["mprj_io[30](reg_mprj_io_30)",["gpio_configure[30]",7,0],0,8,"RW",3,3,90]], - "0x9d": [["mprj_io[30](reg_mprj_io_30)",["gpio_configure[30]",12,8],0,5,"RW",4,4,89]], - "0xa0": [["mprj_io[31](reg_mprj_io_31)",["gpio_configure[31]",7,0],0,8,"RW",3,3,92]], - "0xa1": [["mprj_io[31](reg_mprj_io_31)",["gpio_configure[31]",12,8],0,5,"RW",4,4,91]], - "0xa4": [["mprj_io[32](reg_mprj_io_32)",["gpio_configure[32]",7,0],0,8,"RW",3,3,94]], - "0xa5": [["mprj_io[32](reg_mprj_io_32)",["gpio_configure[32]",12,8],0,5,"RW",4,4,93]], - "0xa8": [["mprj_io[33](reg_mprj_io_33)",["gpio_configure[33]",7,0],0,8,"RW",3,3,96]], - "0xa9": [["mprj_io[33](reg_mprj_io_33)",["gpio_configure[33]",12,8],0,5,"RW",4,4,95]], - "0xac": [["mprj_io[34](reg_mprj_io_34)",["gpio_configure[34]",7,0],0,8,"RW",3,3,98]], - "0xad": [["mprj_io[34](reg_mprj_io_34)",["gpio_configure[34]",12,8],0,5,"RW",4,4,97]], - "0xb0": [["mprj_io[35](reg_mprj_io_35)",["gpio_configure[35]",7,0],0,8,"RW",3,3,100]], - "0xb1": [["mprj_io[35](reg_mprj_io_35)",["gpio_configure[35]",12,8],0,5,"RW",4,4,99]], - "0xb4": [["mprj_io[36](reg_mprj_io_36)",["gpio_configure[36]",7,0],0,8,"RW",3,3,102]], - "0xb5": [["mprj_io[36](reg_mprj_io_36)",["gpio_configure[36]",12,8],0,5,"RW",24,24,101]], - "0xb8": [["mprj_io[37](reg_mprj_io_37)",["gpio_configure[37]",7,0],0,8,"RW",3,3,104]], - "0xb9": [["mprj_io[37](reg_mprj_io_37)",["gpio_configure[37]",12,8],0,5,"RW",24,24,103]] - }, - - "sys":{ "base_addr": ["SYS_BASE_ADR",639631360], - "0x00": [["user2 vdd good","usr2_vdd_pwrgood",0,1,"NA",0,0,26],["user1 vdd good","usr1_vdd_pwrgood",1,1,"NA",0,0,26], - ["user2 vcc good","usr2_vcc_pwrgood",2,1,"RO",0,0,26],["user1 vcc good","usr1_vcc_pwrgood",3,1,"RO",0,0,26]], - "0x04": [["Trap output redirect","trap_output_dest",0,1,"RW",0,0,27], - ["clock2 output redirect","clk2_output_dest",1,1,"RW",0,0,27], - ["clock1 output redirect","clk1_output_dest",2,1,"RW",0,0,27]], - "0x0c": [["IRQ1 input redirect","irq_1_inputsrc",0,1,"RW",0,0,28],["IRQ2 redirect","irq_2_inputsrc",1,1,"RW",0,0,28]], - "0x10": [["Housekeeping SPI disable","hkspi_disable",0,1,"RW",0,0,111]] - } - -} \ No newline at end of file diff --git a/verilog/dv/cocotb/wb_models/housekeepingWB/HK_scoreboard.py b/verilog/dv/cocotb/wb_models/housekeepingWB/HK_scoreboard.py deleted file mode 100644 index 71d55a11..00000000 --- a/verilog/dv/cocotb/wb_models/housekeepingWB/HK_scoreboard.py +++ /dev/null @@ -1,92 +0,0 @@ -from cocotb_bus.scoreboard import Scoreboard -from cocotb.utils import hexdump, hexdiffs -from cocotb.log import SimLog -from cocotb.result import TestFailure, TestSuccess -from cocotb_bus.monitors import Monitor -import cocotb - - -class HKScoreboard(Scoreboard): - def __init__(self, dut, reorder_depth=0, fail_immediately=True): - - Scoreboard.__init__(self, dut, reorder_depth, fail_immediately) - - def compare(self, got, exp, log, strict_type=True): - # Compare the types - if strict_type and type(got) != type(exp): - self.errors += 1 - log.error("Received transaction type is different than expected") - log.info("Received: %s but expected %s" % - (str(type(got)), str(type(exp)))) - if self._imm: - raise TestFailure("Received transaction of wrong type. " - "Set strict_type=False to avoid this.") - return - # Or convert to a string before comparison - elif not strict_type: - got, exp = str(got), str(exp) - - # Compare directly - if self.dict_compare(got, exp): - self.errors += 1 - - # Try our best to print out something useful - strgot, strexp = str(got), str(exp) - - log.error("Received transaction differed from expected output") - if not strict_type: - log.info("Expected:\n" + hexdump(strexp)) - else: - log.info("Expected:\n" + repr(exp)) - if not isinstance(exp, str): - try: - for word in exp: - log.info(str(word)) - except Exception: - pass - if not strict_type: - log.info("Received:\n" + hexdump(strgot)) - else: - log.info("Received:\n" + repr(got)) - if not isinstance(got, str): - try: - for word in got: - log.info(str(word)) - except Exception: - pass - log.warning("Difference:\n%s" % hexdiffs(strexp, strgot)) - if self._imm: - raise TestFailure("Received transaction differed from expected " - "transaction") - else: - # Don't want to fail the test - # if we're passed something without __len__ - try: - log.debug("Received expected transaction %d bytes" % - (len(got))) - log.debug(repr(got)) - except Exception: - pass - - def dict_compare(self,d1, d2): - d1_keys = set(d1.keys()) - d2_keys = set(d2.keys()) - shared_keys = d1_keys.intersection(d2_keys) - different_keys = d1_keys.symmetric_difference(d2_keys) - if different_keys is not None: - cocotb.log.info(f"[HKScoreboard][dict_compare] return False because different_keys \n {d1} \n {d2}") - self.print_expected() - return False - modified = {o : (d1[o], d2[o]) for o in shared_keys if d1[o] != d2[o]} - if modified is not None: - cocotb.log.info(f"[HKScoreboard][dict_compare] return False because modified \n {d1} \n {d2}") - self.print_expected() - return False - cocotb.log.info(f"[HKScoreboard][dict_compare] return True \n {d1} \n {d2}") - self.print_expected() - return True - - - def print_expected(self): - for val in self.expected.items(): - cocotb.log.info(val) diff --git a/verilog/dv/cocotb/wb_models/housekeepingWB/HKmonitor.py b/verilog/dv/cocotb/wb_models/housekeepingWB/HKmonitor.py deleted file mode 100644 index 7b867790..00000000 --- a/verilog/dv/cocotb/wb_models/housekeepingWB/HKmonitor.py +++ /dev/null @@ -1,167 +0,0 @@ - -import cocotb -from cocotb.triggers import Timer, RisingEdge, ReadOnly -from cocotb_bus.monitors import Monitor -from cocotb.log import SimLogFormatter, SimTimeContextFilter -from cocotb.binary import BinaryValue -from cocotb.result import TestFailure -from math import ceil -import copy -import logging -from fnmatch import fnmatch - - -class HKmonitor(Monitor): - """Observes single input """ - def __init__(self, name, block_path,interfaces, clock,reset,is_logger = False, callback=None, event=None): - self.name = name - self.interfaces = interfaces - self.clock = clock - self.reset = reset - self.block_path = block_path - self.is_logger = is_logger - self.setup_logger() - Monitor.__init__(self, callback, event) - - - async def _monitor_recv(self): - old_trans_hold = None - old_trans_no_valid = None - while True: - # Capture signal at rising edge of clock - if "_clk" in self.interfaces: # for interfaces with own clock - signal = self.block_path._id(self.interfaces['_clk']['signal'],False) - await RisingEdge(signal) - else: - await RisingEdge(self.clock) - - - # if self.reset.value.binstr == '0': - # continue - - if "_valid_cycle" in self.interfaces: # for interfaces with valid signal - signal = self.block_path._id(self.interfaces['_valid_cycle']['signal'],False).value.binstr - if signal is not '1': - continue - - if "_valid_cycle_n" in self.interfaces: # for interfaces with valid signal - signal = self.block_path._id(self.interfaces['_valid_cycle']['signal'],False).value.binstr - if signal is not '0': - continue - - # update signal - for key2,signal in self.interfaces.items(): - # if fnmatch(key2,"_*"): - # continue - signal['val'] = self.block_path._id(signal['signal'],False).value - - # if no_valid signal exist trans didn't change so monitor will not monitor anything - # no_valid means if the signal didn't change no addition action would needed - if "_no_valid" in self.interfaces: - if old_trans_no_valid is None: - old_trans_no_valid = copy.deepcopy(self.interfaces) - elif (old_trans_no_valid == self.interfaces): - return - else: - old_trans_no_valid = copy.deepcopy(self.interfaces) - - # logger - self.logger.debug(f' ') - self.handler.terminator = "" - self.handler.setFormatter(SimLogFormatter()) - self.logger.debug(f'') - self.handler.setFormatter(logging.Formatter('%(message)s')) - for key2,signal in self.interfaces.items(): - if fnmatch(key2,"_*"): - continue - if signal['val'].is_resolvable: - length = self.lengths[key2] - (len(hex(signal['val'].integer))) - self.logger.debug(f" {hex(signal['val'].integer)}{' '*length}|") - # signal['val'] = self.block_path._id(signal['signal'],False).value.integer - else: - length = self.lengths[key2] - (len('x')) - self.logger.debug(f" x{' '*length}|") - self.handler.terminator = "\n" - - # special case in HKoutputsMonitorwishbone when writing to reg_mprj_datal(because it uses _buf) the data out is x's - # and in this case scoreboard raise obejection that the value is unresolved - if self.name == "HKoutputsMonitorwishbone": - if not self.interfaces['data']['val'].is_resolvable: - self.interfaces['data']['val'] = BinaryValue(value=0,n_bits=self.interfaces['data']['val'].n_bits) - cocotb.log.debug(f'[HKmonitor][_monitor_recv] interface at monitor {self.name} self.interfaces {self.interfaces}') - self._recv(self.interfaces) - - ## assertion that the values can't change until hold is released - if "_hold" in self.interfaces: - if old_trans_hold is None: - skip = False - old_trans_hold = copy.deepcopy(self.interfaces) - elif self.interfaces['_hold']['val'] == BinaryValue(value=1): - skip = True - elif skip: - old_trans_hold = copy.deepcopy(self.interfaces) - skip = False - else: - if old_trans_hold != self.interfaces: - cocotb.log.error(f'[HKmonitor][_monitor_recv] interface at monitor {self.name} change value before hold value is asserted \nold value {old_trans_hold} \nnew value {self.interfaces}') - raise TestFailure - - - """method for setting up logger for WB model""" - def setup_logger(self): - self.logger = logging.getLogger(f'HouseKeeping{self.name}') - self.logger.setLevel(logging.DEBUG) - if not self.is_logger: - self.logger.setLevel(logging.INFO) - self.handler = logging.StreamHandler() - # return - else : - self.handler = logging.FileHandler(f"{self.name}.log",mode='w') - self.handler.addFilter(SimTimeContextFilter()) - self.logger.addHandler(self.handler) - # get the sizes of signals - #for key,interface in self.interfaces.items(): - for key,signal in self.interfaces.items(): - if fnmatch(key,"_*"): - continue - signal['val'] = self.block_path._id(signal['signal'],False).value - size = signal['val'].n_bits - signal['val'] = BinaryValue(value = int(size) * '1',n_bits=size) - # set the logger file header - # set first line - self.handler.terminator = "" - self.logger.debug(f' timestamp level ') - length =0 - for key2,signal in self.interfaces.items(): - if fnmatch(key2,"_*"): - continue - length += max(ceil(signal['val'].n_bits/4)+2 , len(key2)) +3 - length -= len(key)+1 - self.logger.debug(f'| signals {" "*int(length)}') - self.handler.terminator = "\n" - self.logger.debug(f' ') - # set second line - self.handler.terminator = "" - self.logger.debug(f'{" "*20}|') - length =0 - self.lengths = dict() - for key2,signal in self.interfaces.items(): - if fnmatch(key2,"_*"): - continue - self.lengths[key2] = max((len(hex(signal['val'].integer))),len(key2)) +1 - length = self.lengths[key2] - len(key2) - self.logger.debug(f'{key2}{" "*length} ') - self.handler.terminator = "\n" - - -class color: - PURPLE = '\033[95m' - CYAN = '\033[96m' - DARKCYAN = '\033[36m' - BLUE = '\033[94m' - GREEN = '\033[92m' - YELLOW = '\033[93m' - RED = '\033[91m' - BOLD = '\033[1m' - UNDERLINE = '\033[4m' - END = '\033[0m' \ No newline at end of file diff --git a/verilog/dv/cocotb/wb_models/housekeepingWB/housekeepingIF.json b/verilog/dv/cocotb/wb_models/housekeepingWB/housekeepingIF.json deleted file mode 100644 index 658a54eb..00000000 --- a/verilog/dv/cocotb/wb_models/housekeepingWB/housekeepingIF.json +++ /dev/null @@ -1,133 +0,0 @@ -{ - "inputs" : { "wishbone": {"adr": {"signal":"wb_adr_i","val":0}, - "data": {"signal":"wb_dat_i","val":0}, - "sel": {"signal":"wb_sel_i","val":0}, - "write_en": {"signal":"wb_we_i","val":0}, - "cycle_valid": {"signal":"wb_cyc_i","val":0}, - "stb": {"signal":"wb_stb_i","val":0}, - "_clk": {"signal":"wb_clk_i","val":0}, - "_rst": {"signal":"wb_rstn_i","val":0}, - "_hold": {"signal":"wb_ack_o","val":0}, - "_valid_cycle":{"signal":"wb_cyc_i","val":0}}, - - "user_clk": {"user_clk": {"signal":"user_clock","val":0}}, - "trap": {"user_clk": {"signal":"trap","val":0}}, - - "UART": {"TX": {"signal":"ser_tx","val":0}, - "gpio_in": {"signal":"mgmt_gpio_in","val":0}, - "enable": {"signal":"uart_enabled","val":0}}, - - "SPI": {"CSB": {"signal":"bin3","val":0}, - "SCK": {"signal":"bin4","val":0}, - "SDI": {"signal":"bin2","val":0}, - "_clk": {"signal":"bin4","val":0}, - "_valid_cycle_n":{"signal":"bin3","val":0} - }, - - "SPI_master": {"CSB": {"signal":"spi_csb","val":0}, - "SCK": {"signal":"spi_sck","val":0}, - "SDO": {"signal":"spi_sdo","val":0}, - "SDO_en": {"signal":"spi_sdoenb","val":0}, - "spi_enabled": {"signal":"spi_enabled","val":0}, - "_clk": {"signal":"spi_sck","val":0}, - "_valid_cycle_n":{"signal":"spi_csb","val":0} - }, - - "gpio_data": {"data": {"signal":"mgmt_gpio_in","val":0}}, - - "QSPI_mgmt": {"clk": {"signal":"spimemio_flash_clk","val":0}, - "CSB": {"signal":"spimemio_flash_csb","val":0}, - "io0_oen": {"signal":"spimemio_flash_io0_oeb","val":0}, - "io1_oen": {"signal":"spimemio_flash_io1_oeb","val":0}, - "io2_oen": {"signal":"spimemio_flash_io2_oeb","val":0}, - "io3_oen": {"signal":"spimemio_flash_io3_oeb","val":0}, - "data0": {"signal":"spimemio_flash_io0_do","val":0}, - "data1": {"signal":"spimemio_flash_io1_do","val":0}, - "data2": {"signal":"spimemio_flash_io2_do","val":0}, - "data3": {"signal":"spimemio_flash_io3_do","val":0}, - "qspi_en": {"signal":"qspi_enabled","val":0}, - "_clk": {"signal":"spimemio_flash_clk","val":0}}, - - "debug": {"data": {"signal":"debug_out","val":0}, - "out_en": {"signal":"debug_oeb","val":0}, - "gpio_in": {"signal":"mgmt_gpio_in","val":0}, - "enable": {"signal":"debug_mode","val":0}}, - - "QSPI_pad": {"data0": {"signal":"pad_flash_io0_di","val":0}, - "data1": {"signal":"pad_flash_io1_di","val":0}}, - - "sram": {"data": {"signal":"pad_flash_io0_di","val":0}}, - - "system": {"vcc1_good": {"signal":"usr1_vcc_pwrgood","val":0}, - "vcc2_good": {"signal":"usr2_vcc_pwrgood","val":0}, - "vdd1_good": {"signal":"usr1_vdd_pwrgood","val":0}, - "vdd2_good": {"signal":"usr2_vdd_pwrgood","val":0}, - "_no_valid": {"signal":"usr2_vdd_pwrgood","val":0}}, - - "project_id": {"mask": {"signal":"mask_rev_in","val":0}} - - }, - - "outputs" : { "wishbone": {"ack": {"signal":"wb_ack_o","val":0}, - "data": {"signal":"wb_dat_o","val":0}, - "_valid_cycle":{"signal":"wb_ack_o","val":0}}, - - "UART": {"RX": {"signal":"ser_rx","val":0}}, - - "SPI": {"CSB": {"signal":"bin3","val":0}, - "SCK": {"signal":"bin4","val":0}, - "SDO": {"signal":"bin1","val":0}, - "_clk": {"signal":"bin4","val":0}, - "_valid_cycle_n":{"signal":"bin3","val":0} - }, - - "SPI_master": {"SDI": {"signal":"spi_sdi","val":0}, - "_clk": {"signal":"spi_sck","val":0}}, - - "clk_ctrl": {"pll_en": {"signal":"pll_ena","val":0}, - "pll_dco_en": {"signal":"pll_dco_ena","val":0}, - "pll_div": {"signal":"pll_div","val":0}, - "pll_sel": {"signal":"pll_sel","val":0}, - "pll90_sel": {"signal":"pll90_sel","val":0}, - "pll_trim": {"signal":"pll_trim","val":0}, - "pll_bypass": {"signal":"pll_bypass","val":0}}, - - "external": {"irq": {"signal":"irq","val":0}, - "rst": {"signal":"reset","val":0}}, - - "gpio_loader":{"clk": {"signal":"serial_clock","val":0}, - "load": {"signal":"serial_load","val":0}, - "rst": {"signal":"serial_resetn","val":0}, - "data_1": {"signal":"serial_data_1","val":0}, - "data_2": {"signal":"serial_data_2","val":0}}, - - "gpio_data": {"data": {"signal":"mgmt_gpio_out","val":0}, - "enable": {"signal":"mgmt_gpio_oeb","val":0}}, - - "pwr_ctrl": {"data": {"signal":"pwr_ctrl_out","val":0}}, - - "QSPI_mgmt": {"data0": {"signal":"spimemio_flash_io0_di","val":0}, - "data1": {"signal":"spimemio_flash_io1_di","val":0}, - "data2": {"signal":"spimemio_flash_io2_di","val":0}, - "data3": {"signal":"spimemio_flash_io3_di","val":0}}, - - "debug": {"data": {"signal":"debug_in","val":0}}, - - "QSPI_pad": {"clk": {"signal":"pad_flash_clk","val":0}, - "clk_en": {"signal":"pad_flash_clk_oeb","val":0}, - "CSB": {"signal":"pad_flash_csb","val":0}, - "CSB_en": {"signal":"pad_flash_csb_oeb","val":0}, - "data0": {"signal":"pad_flash_io0_do","val":0}, - "data0_oen": {"signal":"pad_flash_io0_oeb","val":0}, - "data0_ien": {"signal":"pad_flash_io0_ieb","val":0}, - "data1": {"signal":"pad_flash_io1_do","val":0}, - "data1_oen": {"signal":"pad_flash_io1_oeb","val":0}, - "data1_ien": {"signal":"pad_flash_io1_ieb","val":0}, - "_clk": {"signal":"spimemio_flash_clk","val":0}}, - - "sram": {"clk": {"signal":"sram_ro_clk","val":0}, - "CSB": {"signal":"sram_ro_csb","val":0}, - "adr": {"signal":"sram_ro_addr","val":0}} - } - - } \ No newline at end of file diff --git a/verilog/dv/cocotb/wb_models/housekeepingWB/housekeepingWB.py b/verilog/dv/cocotb/wb_models/housekeepingWB/housekeepingWB.py deleted file mode 100644 index d69c2bb3..00000000 --- a/verilog/dv/cocotb/wb_models/housekeepingWB/housekeepingWB.py +++ /dev/null @@ -1,114 +0,0 @@ -import json -import cocotb -from cocotb.triggers import Timer, RisingEdge, ReadOnly -from cocotb_bus.monitors import Monitor -from cocotb.log import SimLogFormatter, SimTimeContextFilter -from cocotb.binary import BinaryValue -from math import ceil -from wb_models.housekeepingWB.HKmonitor import HKmonitor -from wb_models.housekeepingWB.HKSPImonitor import HKSPImonitor -from wb_models.housekeepingWB.HKSPImonitor import CSBmonitor -from wb_models.housekeepingWB.HK_models import HK_models -from cocotb_bus.scoreboard import Scoreboard -import logging -import fnmatch -import copy -from cocotb.result import TestFailure -from interfaces.common import Macros - - -class HK_whiteBox: - def __init__(self,dut,loggers=False): - self.dut = dut - self.hk_hdl = dut.uut.housekeeping - # self.hkspi_hdl = dut.uut.housekeeping.hkspi - self.clk = self.dut.uut.mprj_clock - self.reset = self.dut.uut.resetb - self.logger = loggers - self.load_js() - self.setupModels() - self.Monitors() - cocotb.scheduler.add(self.reg_model_sb()) - """load json models""" - def load_js(self): - with open('wb_models/housekeepingWB/housekeepingIF.json') as f: - self.interface = json.load(f) - with open('wb_models/housekeepingWB/HK_regs.json') as f: - self.reg_model = json.load(f) - self.output_if = copy.deepcopy(self.interface['outputs']) - - """"method to add the housekeeping monitors""" - def Monitors(self): - inputs = self.interface['inputs'] - outputs = self.interface['outputs'] - # wishbone - wishbone_mon_i = HKmonitor(f"HKinputsMonitorwishbone",self.hk_hdl,inputs['wishbone'],self.clk,self.reset,self.logger,callback=self.wb_models.wishbone_model) - wishbone_mon_o = HKmonitor(f"HKoutputsMonitorwishbone",self.hk_hdl,outputs['wishbone'],self.clk,self.reset,self.logger) - wishbone_sb = Scoreboard(SB_name("wishbone_sb"),fail_immediately=False) - wishbone_sb.add_interface(wishbone_mon_o, self.wb_models.exp_out_wb) - # system - system_mon_i = HKmonitor(f"HKinputsMonitorsystem",self.hk_hdl,inputs['system'],self.clk,self.reset,self.logger,callback=self.wb_models.system_model) - # UART - UART_mon_i = HKmonitor(f"HKinputsMonitorUART",self.hk_hdl,inputs['UART'],self.clk,self.reset,self.logger,callback=self.wb_models.UART_model) - UART_mon_o = HKmonitor(f"HKoutputsMonitorUART",self.hk_hdl,outputs['UART'],self.clk,self.reset,self.logger) - UART_sb = Scoreboard(SB_name("UART_sb"),fail_immediately=False) - UART_sb.add_interface(UART_mon_o, self.wb_models.exp_out_uart_rx) - - # debug - debug_mon_i = HKmonitor(f"HKinputsMonitordebug",self.hk_hdl,inputs['debug'],self.clk,self.reset,self.logger,callback=self.wb_models.debug_model) - debug_mon_o = HKmonitor(f"HKoutputsMonitordebug",self.hk_hdl,outputs['debug'],self.clk,self.reset,self.logger) - debug_sb = Scoreboard(SB_name("debug_sb"),fail_immediately=False) - debug_sb.add_interface(debug_mon_o, self.wb_models.exp_out_debug) - - # SPI - SPI_mon_i = HKSPImonitor(f"HKinputsMonitorSPI",self.hk_hdl,inputs['SPI'],self.clk,self.reset,self.logger,callback=self.wb_models.spi_model) - SPI_mon_o = HKSPImonitor(f"HKoutputsMonitorSPI",self.hk_hdl,outputs['SPI'],self.clk,self.reset,self.logger,input=False) - CSBmonitor(f"HKCSBmonitor",self.hk_hdl,outputs['SPI'],self.clk,self.reset,False,callback=self.wb_models.reset_spi_vals) - SPI_sb = Scoreboard(SB_name("SPI_sb"),fail_immediately=False) - SPI_sb.add_interface(SPI_mon_o, self.wb_models.exp_out_spi) - - """initialize all models needed""" - def setupModels(self): - with open('wb_models/housekeepingWB/HK_regs.json') as f: - self.reg_model = json.load(f) - self.wb_models = HK_models(self.reg_model,self.output_if,self.hk_hdl) - - """scoreboard for register model check the reg model with RTL every clock""" - async def reg_model_sb(self): - while True: - await RisingEdge(self.clk) - for key,memory_block in self.reg_model.items(): - if fnmatch.fnmatch(key, "_*"): - continue - for reg_shift,reg in memory_block.items(): - for field in reg: - if reg_shift == "base_addr": - continue - RTL_reg_name = field[1] - if RTL_reg_name == None: - cocotb.log.debug(f"[HK_whiteBox][reg_model_sb] register {field[1]} in {key} doesn't have a RTL register") - continue - if isinstance(field[1],list): - RTL_name = field[1][0] - first_index = int(field[1][1]) - second_index= int(field[1][2]) - if Macros['GL']: - if RTL_name in ["mfgr_id","prod_id","mask_rev","mgmt_gpio_data"]: continue #TODO: change with SDF only - if Macros['GL']: - if fnmatch.fnmatch (RTL_name,"gpio_configure*"): continue #TODO: update gpio_configure and mgmt_gpio_data to get each bit in the SDF case - RTL_reg_path = self.hk_hdl._id(RTL_name,False) - size = RTL_reg_path.value.n_bits-1 - RTL_reg_val = RTL_reg_path.value[size-first_index:size-second_index] - else : - if field[1] in ["pwr_ctrl_out"]: continue #TODO: delete when reset value is spicified - RTL_reg_path = self.hk_hdl._id(field[1],False) - RTL_reg_val = RTL_reg_path.value - if (RTL_reg_val.integer != field[6]): - cocotb.log.error(f'[HK_whiteBox][reg_model_sb] mismatch in register {field[1]} in {key} expected val = {int(field[6])} actual val = {int(RTL_reg_val.binstr,2)} ' ) - else: - cocotb.log.debug(f'[HK_whiteBox][reg_model_sb] match in register {field[1]} in {key} expected val = {field[6]} actual val = {RTL_reg_val.integer} ' ) - -class SB_name: - def __init__(self,name) -> None: - self._name=name - From f5199a7475858c778b8d148ed7eee2cb663993b2 Mon Sep 17 00:00:00 2001 From: mo-hosni Date: Sun, 24 Sep 2023 17:10:34 +0300 Subject: [PATCH 118/138] add a gate-level for `chip_io_openframe` --- verilog/gl/chip_io_openframe.v | 2896 ++++++++++++++++++++++++++++++++ 1 file changed, 2896 insertions(+) create mode 100644 verilog/gl/chip_io_openframe.v diff --git a/verilog/gl/chip_io_openframe.v b/verilog/gl/chip_io_openframe.v new file mode 100644 index 00000000..4c6baa57 --- /dev/null +++ b/verilog/gl/chip_io_openframe.v @@ -0,0 +1,2896 @@ +/* Generated by Yosys 0.30+48 (git sha1 14d50a176d5, gcc 8.3.1 -fPIC -Os) */ + +module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, vssd_pad, vdda_pad, vssa_pad, vdda1_pad, vdda1_pad2, vdda2_pad, vssa1_pad, vssa1_pad2, vssa2_pad, vccd1_pad, vccd2_pad, vssd1_pad, vssd2_pad, vddio, vssio, vccd +, vssd, vdda, vssa, vdda1, vdda2, vssa1, vssa2, vccd1, vccd2, vssd1, vssd2, resetb_pad, porb_h, porb_l, por_l, resetb_h, resetb_l, mask_rev, gpio, gpio_out, gpio_oeb +, gpio_inp_dis, gpio_ib_mode_sel, gpio_vtrip_sel, gpio_slow_sel, gpio_holdover, gpio_analog_en, gpio_analog_sel, gpio_analog_pol, gpio_dm0, gpio_dm1, gpio_dm2, gpio_in, gpio_in_h, gpio_loopback_zero, gpio_loopback_one, analog_io, analog_noesd_io); + wire analog_a; + wire analog_b; + inout [43:0] analog_io; + wire [43:0] analog_io; + inout [43:0] analog_noesd_io; + wire [43:0] analog_noesd_io; + inout [43:0] gpio; + wire [43:0] gpio; + input [43:0] gpio_analog_en; + wire [43:0] gpio_analog_en; + input [43:0] gpio_analog_pol; + wire [43:0] gpio_analog_pol; + input [43:0] gpio_analog_sel; + wire [43:0] gpio_analog_sel; + input [43:0] gpio_dm0; + wire [43:0] gpio_dm0; + input [43:0] gpio_dm1; + wire [43:0] gpio_dm1; + input [43:0] gpio_dm2; + wire [43:0] gpio_dm2; + wire \gpio_dm_all[0] ; + wire \gpio_dm_all[100] ; + wire \gpio_dm_all[101] ; + wire \gpio_dm_all[102] ; + wire \gpio_dm_all[103] ; + wire \gpio_dm_all[104] ; + wire \gpio_dm_all[105] ; + wire \gpio_dm_all[106] ; + wire \gpio_dm_all[107] ; + wire \gpio_dm_all[108] ; + wire \gpio_dm_all[109] ; + wire \gpio_dm_all[10] ; + wire \gpio_dm_all[110] ; + wire \gpio_dm_all[111] ; + wire \gpio_dm_all[112] ; + wire \gpio_dm_all[113] ; + wire \gpio_dm_all[114] ; + wire \gpio_dm_all[115] ; + wire \gpio_dm_all[116] ; + wire \gpio_dm_all[117] ; + wire \gpio_dm_all[118] ; + wire \gpio_dm_all[119] ; + wire \gpio_dm_all[11] ; + wire \gpio_dm_all[120] ; + wire \gpio_dm_all[121] ; + wire \gpio_dm_all[122] ; + wire \gpio_dm_all[123] ; + wire \gpio_dm_all[124] ; + wire \gpio_dm_all[125] ; + wire \gpio_dm_all[126] ; + wire \gpio_dm_all[127] ; + wire \gpio_dm_all[128] ; + wire \gpio_dm_all[129] ; + wire \gpio_dm_all[12] ; + wire \gpio_dm_all[130] ; + wire \gpio_dm_all[131] ; + wire \gpio_dm_all[13] ; + wire \gpio_dm_all[14] ; + wire \gpio_dm_all[15] ; + wire \gpio_dm_all[16] ; + wire \gpio_dm_all[17] ; + wire \gpio_dm_all[18] ; + wire \gpio_dm_all[19] ; + wire \gpio_dm_all[1] ; + wire \gpio_dm_all[20] ; + wire \gpio_dm_all[21] ; + wire \gpio_dm_all[22] ; + wire \gpio_dm_all[23] ; + wire \gpio_dm_all[24] ; + wire \gpio_dm_all[25] ; + wire \gpio_dm_all[26] ; + wire \gpio_dm_all[27] ; + wire \gpio_dm_all[28] ; + wire \gpio_dm_all[29] ; + wire \gpio_dm_all[2] ; + wire \gpio_dm_all[30] ; + wire \gpio_dm_all[31] ; + wire \gpio_dm_all[32] ; + wire \gpio_dm_all[33] ; + wire \gpio_dm_all[34] ; + wire \gpio_dm_all[35] ; + wire \gpio_dm_all[36] ; + wire \gpio_dm_all[37] ; + wire \gpio_dm_all[38] ; + wire \gpio_dm_all[39] ; + wire \gpio_dm_all[3] ; + wire \gpio_dm_all[40] ; + wire \gpio_dm_all[41] ; + wire \gpio_dm_all[42] ; + wire \gpio_dm_all[43] ; + wire \gpio_dm_all[44] ; + wire \gpio_dm_all[45] ; + wire \gpio_dm_all[46] ; + wire \gpio_dm_all[47] ; + wire \gpio_dm_all[48] ; + wire \gpio_dm_all[49] ; + wire \gpio_dm_all[4] ; + wire \gpio_dm_all[50] ; + wire \gpio_dm_all[51] ; + wire \gpio_dm_all[52] ; + wire \gpio_dm_all[53] ; + wire \gpio_dm_all[54] ; + wire \gpio_dm_all[55] ; + wire \gpio_dm_all[56] ; + wire \gpio_dm_all[57] ; + wire \gpio_dm_all[58] ; + wire \gpio_dm_all[59] ; + wire \gpio_dm_all[5] ; + wire \gpio_dm_all[60] ; + wire \gpio_dm_all[61] ; + wire \gpio_dm_all[62] ; + wire \gpio_dm_all[63] ; + wire \gpio_dm_all[64] ; + wire \gpio_dm_all[65] ; + wire \gpio_dm_all[66] ; + wire \gpio_dm_all[67] ; + wire \gpio_dm_all[68] ; + wire \gpio_dm_all[69] ; + wire \gpio_dm_all[6] ; + wire \gpio_dm_all[70] ; + wire \gpio_dm_all[71] ; + wire \gpio_dm_all[72] ; + wire \gpio_dm_all[73] ; + wire \gpio_dm_all[74] ; + wire \gpio_dm_all[75] ; + wire \gpio_dm_all[76] ; + wire \gpio_dm_all[77] ; + wire \gpio_dm_all[78] ; + wire \gpio_dm_all[79] ; + wire \gpio_dm_all[7] ; + wire \gpio_dm_all[80] ; + wire \gpio_dm_all[81] ; + wire \gpio_dm_all[82] ; + wire \gpio_dm_all[83] ; + wire \gpio_dm_all[84] ; + wire \gpio_dm_all[85] ; + wire \gpio_dm_all[86] ; + wire \gpio_dm_all[87] ; + wire \gpio_dm_all[88] ; + wire \gpio_dm_all[89] ; + wire \gpio_dm_all[8] ; + wire \gpio_dm_all[90] ; + wire \gpio_dm_all[91] ; + wire \gpio_dm_all[92] ; + wire \gpio_dm_all[93] ; + wire \gpio_dm_all[94] ; + wire \gpio_dm_all[95] ; + wire \gpio_dm_all[96] ; + wire \gpio_dm_all[97] ; + wire \gpio_dm_all[98] ; + wire \gpio_dm_all[99] ; + wire \gpio_dm_all[9] ; + wire \gpio_enh[0] ; + wire \gpio_enh[10] ; + wire \gpio_enh[11] ; + wire \gpio_enh[12] ; + wire \gpio_enh[13] ; + wire \gpio_enh[14] ; + wire \gpio_enh[15] ; + wire \gpio_enh[16] ; + wire \gpio_enh[17] ; + wire \gpio_enh[18] ; + wire \gpio_enh[19] ; + wire \gpio_enh[1] ; + wire \gpio_enh[20] ; + wire \gpio_enh[21] ; + wire \gpio_enh[22] ; + wire \gpio_enh[23] ; + wire \gpio_enh[24] ; + wire \gpio_enh[25] ; + wire \gpio_enh[26] ; + wire \gpio_enh[27] ; + wire \gpio_enh[28] ; + wire \gpio_enh[29] ; + wire \gpio_enh[2] ; + wire \gpio_enh[30] ; + wire \gpio_enh[31] ; + wire \gpio_enh[32] ; + wire \gpio_enh[33] ; + wire \gpio_enh[34] ; + wire \gpio_enh[35] ; + wire \gpio_enh[36] ; + wire \gpio_enh[37] ; + wire \gpio_enh[38] ; + wire \gpio_enh[39] ; + wire \gpio_enh[3] ; + wire \gpio_enh[40] ; + wire \gpio_enh[41] ; + wire \gpio_enh[42] ; + wire \gpio_enh[43] ; + wire \gpio_enh[4] ; + wire \gpio_enh[5] ; + wire \gpio_enh[6] ; + wire \gpio_enh[7] ; + wire \gpio_enh[8] ; + wire \gpio_enh[9] ; + input [43:0] gpio_holdover; + wire [43:0] gpio_holdover; + input [43:0] gpio_ib_mode_sel; + wire [43:0] gpio_ib_mode_sel; + output [43:0] gpio_in; + wire [43:0] gpio_in; + output [43:0] gpio_in_h; + wire [43:0] gpio_in_h; + input [43:0] gpio_inp_dis; + wire [43:0] gpio_inp_dis; + output [43:0] gpio_loopback_one; + wire [43:0] gpio_loopback_one; + output [43:0] gpio_loopback_zero; + wire [43:0] gpio_loopback_zero; + input [43:0] gpio_oeb; + wire [43:0] gpio_oeb; + input [43:0] gpio_out; + wire [43:0] gpio_out; + input [43:0] gpio_slow_sel; + wire [43:0] gpio_slow_sel; + input [43:0] gpio_vtrip_sel; + wire [43:0] gpio_vtrip_sel; + wire \loop0_gpio[0] ; + wire \loop0_gpio[10] ; + wire \loop0_gpio[11] ; + wire \loop0_gpio[12] ; + wire \loop0_gpio[13] ; + wire \loop0_gpio[14] ; + wire \loop0_gpio[15] ; + wire \loop0_gpio[16] ; + wire \loop0_gpio[17] ; + wire \loop0_gpio[18] ; + wire \loop0_gpio[19] ; + wire \loop0_gpio[1] ; + wire \loop0_gpio[20] ; + wire \loop0_gpio[21] ; + wire \loop0_gpio[22] ; + wire \loop0_gpio[23] ; + wire \loop0_gpio[24] ; + wire \loop0_gpio[25] ; + wire \loop0_gpio[26] ; + wire \loop0_gpio[27] ; + wire \loop0_gpio[28] ; + wire \loop0_gpio[29] ; + wire \loop0_gpio[2] ; + wire \loop0_gpio[30] ; + wire \loop0_gpio[31] ; + wire \loop0_gpio[32] ; + wire \loop0_gpio[33] ; + wire \loop0_gpio[34] ; + wire \loop0_gpio[35] ; + wire \loop0_gpio[36] ; + wire \loop0_gpio[37] ; + wire \loop0_gpio[38] ; + wire \loop0_gpio[39] ; + wire \loop0_gpio[3] ; + wire \loop0_gpio[40] ; + wire \loop0_gpio[41] ; + wire \loop0_gpio[42] ; + wire \loop0_gpio[43] ; + wire \loop0_gpio[4] ; + wire \loop0_gpio[5] ; + wire \loop0_gpio[6] ; + wire \loop0_gpio[7] ; + wire \loop0_gpio[8] ; + wire \loop0_gpio[9] ; + wire \loop1_gpio[0] ; + wire \loop1_gpio[10] ; + wire \loop1_gpio[11] ; + wire \loop1_gpio[12] ; + wire \loop1_gpio[13] ; + wire \loop1_gpio[14] ; + wire \loop1_gpio[15] ; + wire \loop1_gpio[16] ; + wire \loop1_gpio[17] ; + wire \loop1_gpio[18] ; + wire \loop1_gpio[19] ; + wire \loop1_gpio[1] ; + wire \loop1_gpio[20] ; + wire \loop1_gpio[21] ; + wire \loop1_gpio[22] ; + wire \loop1_gpio[23] ; + wire \loop1_gpio[24] ; + wire \loop1_gpio[25] ; + wire \loop1_gpio[26] ; + wire \loop1_gpio[27] ; + wire \loop1_gpio[28] ; + wire \loop1_gpio[29] ; + wire \loop1_gpio[2] ; + wire \loop1_gpio[30] ; + wire \loop1_gpio[31] ; + wire \loop1_gpio[32] ; + wire \loop1_gpio[33] ; + wire \loop1_gpio[34] ; + wire \loop1_gpio[35] ; + wire \loop1_gpio[36] ; + wire \loop1_gpio[37] ; + wire \loop1_gpio[38] ; + wire \loop1_gpio[39] ; + wire \loop1_gpio[3] ; + wire \loop1_gpio[40] ; + wire \loop1_gpio[41] ; + wire \loop1_gpio[42] ; + wire \loop1_gpio[43] ; + wire \loop1_gpio[4] ; + wire \loop1_gpio[5] ; + wire \loop1_gpio[6] ; + wire \loop1_gpio[7] ; + wire \loop1_gpio[8] ; + wire \loop1_gpio[9] ; + output [31:0] mask_rev; + wire [31:0] mask_rev; + output por_l; + wire por_l; + output porb_h; + wire porb_h; + output porb_l; + wire porb_l; + output resetb_h; + wire resetb_h; + output resetb_l; + wire resetb_l; + input resetb_pad; + wire resetb_pad; + inout vccd; + wire vccd; + inout vccd1; + wire vccd1; + inout vccd1_pad; + wire vccd1_pad; + inout vccd2; + wire vccd2; + inout vccd2_pad; + wire vccd2_pad; + inout vccd_pad; + wire vccd_pad; + inout vdda; + wire vdda; + inout vdda1; + wire vdda1; + inout vdda1_pad; + wire vdda1_pad; + inout vdda1_pad2; + wire vdda1_pad2; + inout vdda2; + wire vdda2; + inout vdda2_pad; + wire vdda2_pad; + inout vdda_pad; + wire vdda_pad; + inout vddio; + wire vddio; + inout vddio_pad; + wire vddio_pad; + inout vddio_pad2; + wire vddio_pad2; + wire vddio_q; + inout vssa; + wire vssa; + inout vssa1; + wire vssa1; + inout vssa1_pad; + wire vssa1_pad; + inout vssa1_pad2; + wire vssa1_pad2; + inout vssa2; + wire vssa2; + inout vssa2_pad; + wire vssa2_pad; + inout vssa_pad; + wire vssa_pad; + inout vssd; + wire vssd; + inout vssd1; + wire vssd1; + inout vssd1_pad; + wire vssd1_pad; + inout vssd2; + wire vssd2; + inout vssd2_pad; + wire vssd2_pad; + inout vssd_pad; + wire vssd_pad; + inout vssio; + wire vssio; + inout vssio_pad; + wire vssio_pad; + inout vssio_pad2; + wire vssio_pad2; + wire vssio_q; + wire xres_loopback_one; + wire xres_loopback_zero; + wire xres_vss_loop; + wire xresloop; + sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[0] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[38]), + .ANALOG_POL(gpio_analog_pol[38]), + .ANALOG_SEL(gpio_analog_sel[38]), + .DM({ gpio_dm2[38], gpio_dm1[38], gpio_dm0[38] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[38] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[38]), + .ENABLE_VSWITCH_H(\loop0_gpio[38] ), + .HLD_H_N(\loop1_gpio[38] ), + .HLD_OVR(gpio_holdover[38]), + .IB_MODE_SEL(gpio_ib_mode_sel[38]), + .IN(gpio_in[38]), + .INP_DIS(gpio_inp_dis[38]), + .IN_H(gpio_in_h[38]), + .OE_N(gpio_oeb[38]), + .OUT(gpio_out[38]), + .PAD(gpio[38]), + .PAD_A_ESD_0_H(analog_io[38]), + .PAD_A_NOESD_H(analog_noesd_io[38]), + .SLOW(gpio_slow_sel[38]), + .TIE_HI_ESD(\loop1_gpio[38] ), + .TIE_LO_ESD(\loop0_gpio[38] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[38]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[1] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[39]), + .ANALOG_POL(gpio_analog_pol[39]), + .ANALOG_SEL(gpio_analog_sel[39]), + .DM({ gpio_dm2[39], gpio_dm1[39], gpio_dm0[39] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[39] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[39]), + .ENABLE_VSWITCH_H(\loop0_gpio[39] ), + .HLD_H_N(\loop1_gpio[39] ), + .HLD_OVR(gpio_holdover[39]), + .IB_MODE_SEL(gpio_ib_mode_sel[39]), + .IN(gpio_in[39]), + .INP_DIS(gpio_inp_dis[39]), + .IN_H(gpio_in_h[39]), + .OE_N(gpio_oeb[39]), + .OUT(gpio_out[39]), + .PAD(gpio[39]), + .PAD_A_ESD_0_H(analog_io[39]), + .PAD_A_NOESD_H(analog_noesd_io[39]), + .SLOW(gpio_slow_sel[39]), + .TIE_HI_ESD(\loop1_gpio[39] ), + .TIE_LO_ESD(\loop0_gpio[39] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[39]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[2] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[40]), + .ANALOG_POL(gpio_analog_pol[40]), + .ANALOG_SEL(gpio_analog_sel[40]), + .DM({ gpio_dm2[40], gpio_dm1[40], gpio_dm0[40] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[40] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[40]), + .ENABLE_VSWITCH_H(\loop0_gpio[40] ), + .HLD_H_N(\loop1_gpio[40] ), + .HLD_OVR(gpio_holdover[40]), + .IB_MODE_SEL(gpio_ib_mode_sel[40]), + .IN(gpio_in[40]), + .INP_DIS(gpio_inp_dis[40]), + .IN_H(gpio_in_h[40]), + .OE_N(gpio_oeb[40]), + .OUT(gpio_out[40]), + .PAD(gpio[40]), + .PAD_A_ESD_0_H(analog_io[40]), + .PAD_A_NOESD_H(analog_noesd_io[40]), + .SLOW(gpio_slow_sel[40]), + .TIE_HI_ESD(\loop1_gpio[40] ), + .TIE_LO_ESD(\loop0_gpio[40] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[40]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[3] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[41]), + .ANALOG_POL(gpio_analog_pol[41]), + .ANALOG_SEL(gpio_analog_sel[41]), + .DM({ gpio_dm2[41], gpio_dm1[41], gpio_dm0[41] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[41] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[41]), + .ENABLE_VSWITCH_H(\loop0_gpio[41] ), + .HLD_H_N(\loop1_gpio[41] ), + .HLD_OVR(gpio_holdover[41]), + .IB_MODE_SEL(gpio_ib_mode_sel[41]), + .IN(gpio_in[41]), + .INP_DIS(gpio_inp_dis[41]), + .IN_H(gpio_in_h[41]), + .OE_N(gpio_oeb[41]), + .OUT(gpio_out[41]), + .PAD(gpio[41]), + .PAD_A_ESD_0_H(analog_io[41]), + .PAD_A_NOESD_H(analog_noesd_io[41]), + .SLOW(gpio_slow_sel[41]), + .TIE_HI_ESD(\loop1_gpio[41] ), + .TIE_LO_ESD(\loop0_gpio[41] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[41]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[4] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[42]), + .ANALOG_POL(gpio_analog_pol[42]), + .ANALOG_SEL(gpio_analog_sel[42]), + .DM({ gpio_dm2[42], gpio_dm1[42], gpio_dm0[42] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[42] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[42]), + .ENABLE_VSWITCH_H(\loop0_gpio[42] ), + .HLD_H_N(\loop1_gpio[42] ), + .HLD_OVR(gpio_holdover[42]), + .IB_MODE_SEL(gpio_ib_mode_sel[42]), + .IN(gpio_in[42]), + .INP_DIS(gpio_inp_dis[42]), + .IN_H(gpio_in_h[42]), + .OE_N(gpio_oeb[42]), + .OUT(gpio_out[42]), + .PAD(gpio[42]), + .PAD_A_ESD_0_H(analog_io[42]), + .PAD_A_NOESD_H(analog_noesd_io[42]), + .SLOW(gpio_slow_sel[42]), + .TIE_HI_ESD(\loop1_gpio[42] ), + .TIE_LO_ESD(\loop0_gpio[42] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[42]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[5] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[43]), + .ANALOG_POL(gpio_analog_pol[43]), + .ANALOG_SEL(gpio_analog_sel[43]), + .DM({ gpio_dm2[43], gpio_dm1[43], gpio_dm0[43] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[43] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[43]), + .ENABLE_VSWITCH_H(\loop0_gpio[43] ), + .HLD_H_N(\loop1_gpio[43] ), + .HLD_OVR(gpio_holdover[43]), + .IB_MODE_SEL(gpio_ib_mode_sel[43]), + .IN(gpio_in[43]), + .INP_DIS(gpio_inp_dis[43]), + .IN_H(gpio_in_h[43]), + .OE_N(gpio_oeb[43]), + .OUT(gpio_out[43]), + .PAD(gpio[43]), + .PAD_A_ESD_0_H(analog_io[43]), + .PAD_A_NOESD_H(analog_noesd_io[43]), + .SLOW(gpio_slow_sel[43]), + .TIE_HI_ESD(\loop1_gpio[43] ), + .TIE_LO_ESD(\loop0_gpio[43] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[43]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[0] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[0]), + .ANALOG_POL(gpio_analog_pol[0]), + .ANALOG_SEL(gpio_analog_sel[0]), + .DM({ gpio_dm2[0], gpio_dm1[0], gpio_dm0[0] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[0] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[0]), + .ENABLE_VSWITCH_H(\loop0_gpio[0] ), + .HLD_H_N(\loop1_gpio[0] ), + .HLD_OVR(gpio_holdover[0]), + .IB_MODE_SEL(gpio_ib_mode_sel[0]), + .IN(gpio_in[0]), + .INP_DIS(gpio_inp_dis[0]), + .IN_H(gpio_in_h[0]), + .OE_N(gpio_oeb[0]), + .OUT(gpio_out[0]), + .PAD(gpio[0]), + .PAD_A_ESD_0_H(analog_io[0]), + .PAD_A_NOESD_H(analog_noesd_io[0]), + .SLOW(gpio_slow_sel[0]), + .TIE_HI_ESD(\loop1_gpio[0] ), + .TIE_LO_ESD(\loop0_gpio[0] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[0]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[10] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[10]), + .ANALOG_POL(gpio_analog_pol[10]), + .ANALOG_SEL(gpio_analog_sel[10]), + .DM({ gpio_dm2[10], gpio_dm1[10], gpio_dm0[10] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[10] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[10]), + .ENABLE_VSWITCH_H(\loop0_gpio[10] ), + .HLD_H_N(\loop1_gpio[10] ), + .HLD_OVR(gpio_holdover[10]), + .IB_MODE_SEL(gpio_ib_mode_sel[10]), + .IN(gpio_in[10]), + .INP_DIS(gpio_inp_dis[10]), + .IN_H(gpio_in_h[10]), + .OE_N(gpio_oeb[10]), + .OUT(gpio_out[10]), + .PAD(gpio[10]), + .PAD_A_ESD_0_H(analog_io[10]), + .PAD_A_NOESD_H(analog_noesd_io[10]), + .SLOW(gpio_slow_sel[10]), + .TIE_HI_ESD(\loop1_gpio[10] ), + .TIE_LO_ESD(\loop0_gpio[10] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[10]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[11] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[11]), + .ANALOG_POL(gpio_analog_pol[11]), + .ANALOG_SEL(gpio_analog_sel[11]), + .DM({ gpio_dm2[11], gpio_dm1[11], gpio_dm0[11] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[11] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[11]), + .ENABLE_VSWITCH_H(\loop0_gpio[11] ), + .HLD_H_N(\loop1_gpio[11] ), + .HLD_OVR(gpio_holdover[11]), + .IB_MODE_SEL(gpio_ib_mode_sel[11]), + .IN(gpio_in[11]), + .INP_DIS(gpio_inp_dis[11]), + .IN_H(gpio_in_h[11]), + .OE_N(gpio_oeb[11]), + .OUT(gpio_out[11]), + .PAD(gpio[11]), + .PAD_A_ESD_0_H(analog_io[11]), + .PAD_A_NOESD_H(analog_noesd_io[11]), + .SLOW(gpio_slow_sel[11]), + .TIE_HI_ESD(\loop1_gpio[11] ), + .TIE_LO_ESD(\loop0_gpio[11] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[11]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[12] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[12]), + .ANALOG_POL(gpio_analog_pol[12]), + .ANALOG_SEL(gpio_analog_sel[12]), + .DM({ gpio_dm2[12], gpio_dm1[12], gpio_dm0[12] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[12] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[12]), + .ENABLE_VSWITCH_H(\loop0_gpio[12] ), + .HLD_H_N(\loop1_gpio[12] ), + .HLD_OVR(gpio_holdover[12]), + .IB_MODE_SEL(gpio_ib_mode_sel[12]), + .IN(gpio_in[12]), + .INP_DIS(gpio_inp_dis[12]), + .IN_H(gpio_in_h[12]), + .OE_N(gpio_oeb[12]), + .OUT(gpio_out[12]), + .PAD(gpio[12]), + .PAD_A_ESD_0_H(analog_io[12]), + .PAD_A_NOESD_H(analog_noesd_io[12]), + .SLOW(gpio_slow_sel[12]), + .TIE_HI_ESD(\loop1_gpio[12] ), + .TIE_LO_ESD(\loop0_gpio[12] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[12]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[13] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[13]), + .ANALOG_POL(gpio_analog_pol[13]), + .ANALOG_SEL(gpio_analog_sel[13]), + .DM({ gpio_dm2[13], gpio_dm1[13], gpio_dm0[13] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[13] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[13]), + .ENABLE_VSWITCH_H(\loop0_gpio[13] ), + .HLD_H_N(\loop1_gpio[13] ), + .HLD_OVR(gpio_holdover[13]), + .IB_MODE_SEL(gpio_ib_mode_sel[13]), + .IN(gpio_in[13]), + .INP_DIS(gpio_inp_dis[13]), + .IN_H(gpio_in_h[13]), + .OE_N(gpio_oeb[13]), + .OUT(gpio_out[13]), + .PAD(gpio[13]), + .PAD_A_ESD_0_H(analog_io[13]), + .PAD_A_NOESD_H(analog_noesd_io[13]), + .SLOW(gpio_slow_sel[13]), + .TIE_HI_ESD(\loop1_gpio[13] ), + .TIE_LO_ESD(\loop0_gpio[13] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[13]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[14] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[14]), + .ANALOG_POL(gpio_analog_pol[14]), + .ANALOG_SEL(gpio_analog_sel[14]), + .DM({ gpio_dm2[14], gpio_dm1[14], gpio_dm0[14] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[14] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[14]), + .ENABLE_VSWITCH_H(\loop0_gpio[14] ), + .HLD_H_N(\loop1_gpio[14] ), + .HLD_OVR(gpio_holdover[14]), + .IB_MODE_SEL(gpio_ib_mode_sel[14]), + .IN(gpio_in[14]), + .INP_DIS(gpio_inp_dis[14]), + .IN_H(gpio_in_h[14]), + .OE_N(gpio_oeb[14]), + .OUT(gpio_out[14]), + .PAD(gpio[14]), + .PAD_A_ESD_0_H(analog_io[14]), + .PAD_A_NOESD_H(analog_noesd_io[14]), + .SLOW(gpio_slow_sel[14]), + .TIE_HI_ESD(\loop1_gpio[14] ), + .TIE_LO_ESD(\loop0_gpio[14] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[14]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[15] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[15]), + .ANALOG_POL(gpio_analog_pol[15]), + .ANALOG_SEL(gpio_analog_sel[15]), + .DM({ gpio_dm2[15], gpio_dm1[15], gpio_dm0[15] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[15] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[15]), + .ENABLE_VSWITCH_H(\loop0_gpio[15] ), + .HLD_H_N(\loop1_gpio[15] ), + .HLD_OVR(gpio_holdover[15]), + .IB_MODE_SEL(gpio_ib_mode_sel[15]), + .IN(gpio_in[15]), + .INP_DIS(gpio_inp_dis[15]), + .IN_H(gpio_in_h[15]), + .OE_N(gpio_oeb[15]), + .OUT(gpio_out[15]), + .PAD(gpio[15]), + .PAD_A_ESD_0_H(analog_io[15]), + .PAD_A_NOESD_H(analog_noesd_io[15]), + .SLOW(gpio_slow_sel[15]), + .TIE_HI_ESD(\loop1_gpio[15] ), + .TIE_LO_ESD(\loop0_gpio[15] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[15]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[16] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[16]), + .ANALOG_POL(gpio_analog_pol[16]), + .ANALOG_SEL(gpio_analog_sel[16]), + .DM({ gpio_dm2[16], gpio_dm1[16], gpio_dm0[16] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[16] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[16]), + .ENABLE_VSWITCH_H(\loop0_gpio[16] ), + .HLD_H_N(\loop1_gpio[16] ), + .HLD_OVR(gpio_holdover[16]), + .IB_MODE_SEL(gpio_ib_mode_sel[16]), + .IN(gpio_in[16]), + .INP_DIS(gpio_inp_dis[16]), + .IN_H(gpio_in_h[16]), + .OE_N(gpio_oeb[16]), + .OUT(gpio_out[16]), + .PAD(gpio[16]), + .PAD_A_ESD_0_H(analog_io[16]), + .PAD_A_NOESD_H(analog_noesd_io[16]), + .SLOW(gpio_slow_sel[16]), + .TIE_HI_ESD(\loop1_gpio[16] ), + .TIE_LO_ESD(\loop0_gpio[16] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[16]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[17] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[17]), + .ANALOG_POL(gpio_analog_pol[17]), + .ANALOG_SEL(gpio_analog_sel[17]), + .DM({ gpio_dm2[17], gpio_dm1[17], gpio_dm0[17] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[17] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[17]), + .ENABLE_VSWITCH_H(\loop0_gpio[17] ), + .HLD_H_N(\loop1_gpio[17] ), + .HLD_OVR(gpio_holdover[17]), + .IB_MODE_SEL(gpio_ib_mode_sel[17]), + .IN(gpio_in[17]), + .INP_DIS(gpio_inp_dis[17]), + .IN_H(gpio_in_h[17]), + .OE_N(gpio_oeb[17]), + .OUT(gpio_out[17]), + .PAD(gpio[17]), + .PAD_A_ESD_0_H(analog_io[17]), + .PAD_A_NOESD_H(analog_noesd_io[17]), + .SLOW(gpio_slow_sel[17]), + .TIE_HI_ESD(\loop1_gpio[17] ), + .TIE_LO_ESD(\loop0_gpio[17] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[17]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[18] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[18]), + .ANALOG_POL(gpio_analog_pol[18]), + .ANALOG_SEL(gpio_analog_sel[18]), + .DM({ gpio_dm2[18], gpio_dm1[18], gpio_dm0[18] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[18] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[18]), + .ENABLE_VSWITCH_H(\loop0_gpio[18] ), + .HLD_H_N(\loop1_gpio[18] ), + .HLD_OVR(gpio_holdover[18]), + .IB_MODE_SEL(gpio_ib_mode_sel[18]), + .IN(gpio_in[18]), + .INP_DIS(gpio_inp_dis[18]), + .IN_H(gpio_in_h[18]), + .OE_N(gpio_oeb[18]), + .OUT(gpio_out[18]), + .PAD(gpio[18]), + .PAD_A_ESD_0_H(analog_io[18]), + .PAD_A_NOESD_H(analog_noesd_io[18]), + .SLOW(gpio_slow_sel[18]), + .TIE_HI_ESD(\loop1_gpio[18] ), + .TIE_LO_ESD(\loop0_gpio[18] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[18]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[1] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[1]), + .ANALOG_POL(gpio_analog_pol[1]), + .ANALOG_SEL(gpio_analog_sel[1]), + .DM({ gpio_dm2[1], gpio_dm1[1], gpio_dm0[1] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[1] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[1]), + .ENABLE_VSWITCH_H(\loop0_gpio[1] ), + .HLD_H_N(\loop1_gpio[1] ), + .HLD_OVR(gpio_holdover[1]), + .IB_MODE_SEL(gpio_ib_mode_sel[1]), + .IN(gpio_in[1]), + .INP_DIS(gpio_inp_dis[1]), + .IN_H(gpio_in_h[1]), + .OE_N(gpio_oeb[1]), + .OUT(gpio_out[1]), + .PAD(gpio[1]), + .PAD_A_ESD_0_H(analog_io[1]), + .PAD_A_NOESD_H(analog_noesd_io[1]), + .SLOW(gpio_slow_sel[1]), + .TIE_HI_ESD(\loop1_gpio[1] ), + .TIE_LO_ESD(\loop0_gpio[1] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[1]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[2] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[2]), + .ANALOG_POL(gpio_analog_pol[2]), + .ANALOG_SEL(gpio_analog_sel[2]), + .DM({ gpio_dm2[2], gpio_dm1[2], gpio_dm0[2] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[2] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[2]), + .ENABLE_VSWITCH_H(\loop0_gpio[2] ), + .HLD_H_N(\loop1_gpio[2] ), + .HLD_OVR(gpio_holdover[2]), + .IB_MODE_SEL(gpio_ib_mode_sel[2]), + .IN(gpio_in[2]), + .INP_DIS(gpio_inp_dis[2]), + .IN_H(gpio_in_h[2]), + .OE_N(gpio_oeb[2]), + .OUT(gpio_out[2]), + .PAD(gpio[2]), + .PAD_A_ESD_0_H(analog_io[2]), + .PAD_A_NOESD_H(analog_noesd_io[2]), + .SLOW(gpio_slow_sel[2]), + .TIE_HI_ESD(\loop1_gpio[2] ), + .TIE_LO_ESD(\loop0_gpio[2] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[2]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[3] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[3]), + .ANALOG_POL(gpio_analog_pol[3]), + .ANALOG_SEL(gpio_analog_sel[3]), + .DM({ gpio_dm2[3], gpio_dm1[3], gpio_dm0[3] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[3] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[3]), + .ENABLE_VSWITCH_H(\loop0_gpio[3] ), + .HLD_H_N(\loop1_gpio[3] ), + .HLD_OVR(gpio_holdover[3]), + .IB_MODE_SEL(gpio_ib_mode_sel[3]), + .IN(gpio_in[3]), + .INP_DIS(gpio_inp_dis[3]), + .IN_H(gpio_in_h[3]), + .OE_N(gpio_oeb[3]), + .OUT(gpio_out[3]), + .PAD(gpio[3]), + .PAD_A_ESD_0_H(analog_io[3]), + .PAD_A_NOESD_H(analog_noesd_io[3]), + .SLOW(gpio_slow_sel[3]), + .TIE_HI_ESD(\loop1_gpio[3] ), + .TIE_LO_ESD(\loop0_gpio[3] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[3]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[4] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[4]), + .ANALOG_POL(gpio_analog_pol[4]), + .ANALOG_SEL(gpio_analog_sel[4]), + .DM({ gpio_dm2[4], gpio_dm1[4], gpio_dm0[4] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[4] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[4]), + .ENABLE_VSWITCH_H(\loop0_gpio[4] ), + .HLD_H_N(\loop1_gpio[4] ), + .HLD_OVR(gpio_holdover[4]), + .IB_MODE_SEL(gpio_ib_mode_sel[4]), + .IN(gpio_in[4]), + .INP_DIS(gpio_inp_dis[4]), + .IN_H(gpio_in_h[4]), + .OE_N(gpio_oeb[4]), + .OUT(gpio_out[4]), + .PAD(gpio[4]), + .PAD_A_ESD_0_H(analog_io[4]), + .PAD_A_NOESD_H(analog_noesd_io[4]), + .SLOW(gpio_slow_sel[4]), + .TIE_HI_ESD(\loop1_gpio[4] ), + .TIE_LO_ESD(\loop0_gpio[4] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[4]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[5] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[5]), + .ANALOG_POL(gpio_analog_pol[5]), + .ANALOG_SEL(gpio_analog_sel[5]), + .DM({ gpio_dm2[5], gpio_dm1[5], gpio_dm0[5] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[5] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[5]), + .ENABLE_VSWITCH_H(\loop0_gpio[5] ), + .HLD_H_N(\loop1_gpio[5] ), + .HLD_OVR(gpio_holdover[5]), + .IB_MODE_SEL(gpio_ib_mode_sel[5]), + .IN(gpio_in[5]), + .INP_DIS(gpio_inp_dis[5]), + .IN_H(gpio_in_h[5]), + .OE_N(gpio_oeb[5]), + .OUT(gpio_out[5]), + .PAD(gpio[5]), + .PAD_A_ESD_0_H(analog_io[5]), + .PAD_A_NOESD_H(analog_noesd_io[5]), + .SLOW(gpio_slow_sel[5]), + .TIE_HI_ESD(\loop1_gpio[5] ), + .TIE_LO_ESD(\loop0_gpio[5] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[5]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[6] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[6]), + .ANALOG_POL(gpio_analog_pol[6]), + .ANALOG_SEL(gpio_analog_sel[6]), + .DM({ gpio_dm2[6], gpio_dm1[6], gpio_dm0[6] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[6] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[6]), + .ENABLE_VSWITCH_H(\loop0_gpio[6] ), + .HLD_H_N(\loop1_gpio[6] ), + .HLD_OVR(gpio_holdover[6]), + .IB_MODE_SEL(gpio_ib_mode_sel[6]), + .IN(gpio_in[6]), + .INP_DIS(gpio_inp_dis[6]), + .IN_H(gpio_in_h[6]), + .OE_N(gpio_oeb[6]), + .OUT(gpio_out[6]), + .PAD(gpio[6]), + .PAD_A_ESD_0_H(analog_io[6]), + .PAD_A_NOESD_H(analog_noesd_io[6]), + .SLOW(gpio_slow_sel[6]), + .TIE_HI_ESD(\loop1_gpio[6] ), + .TIE_LO_ESD(\loop0_gpio[6] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[6]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[7] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[7]), + .ANALOG_POL(gpio_analog_pol[7]), + .ANALOG_SEL(gpio_analog_sel[7]), + .DM({ gpio_dm2[7], gpio_dm1[7], gpio_dm0[7] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[7] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[7]), + .ENABLE_VSWITCH_H(\loop0_gpio[7] ), + .HLD_H_N(\loop1_gpio[7] ), + .HLD_OVR(gpio_holdover[7]), + .IB_MODE_SEL(gpio_ib_mode_sel[7]), + .IN(gpio_in[7]), + .INP_DIS(gpio_inp_dis[7]), + .IN_H(gpio_in_h[7]), + .OE_N(gpio_oeb[7]), + .OUT(gpio_out[7]), + .PAD(gpio[7]), + .PAD_A_ESD_0_H(analog_io[7]), + .PAD_A_NOESD_H(analog_noesd_io[7]), + .SLOW(gpio_slow_sel[7]), + .TIE_HI_ESD(\loop1_gpio[7] ), + .TIE_LO_ESD(\loop0_gpio[7] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[7]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[8] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[8]), + .ANALOG_POL(gpio_analog_pol[8]), + .ANALOG_SEL(gpio_analog_sel[8]), + .DM({ gpio_dm2[8], gpio_dm1[8], gpio_dm0[8] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[8] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[8]), + .ENABLE_VSWITCH_H(\loop0_gpio[8] ), + .HLD_H_N(\loop1_gpio[8] ), + .HLD_OVR(gpio_holdover[8]), + .IB_MODE_SEL(gpio_ib_mode_sel[8]), + .IN(gpio_in[8]), + .INP_DIS(gpio_inp_dis[8]), + .IN_H(gpio_in_h[8]), + .OE_N(gpio_oeb[8]), + .OUT(gpio_out[8]), + .PAD(gpio[8]), + .PAD_A_ESD_0_H(analog_io[8]), + .PAD_A_NOESD_H(analog_noesd_io[8]), + .SLOW(gpio_slow_sel[8]), + .TIE_HI_ESD(\loop1_gpio[8] ), + .TIE_LO_ESD(\loop0_gpio[8] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[8]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[9] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[9]), + .ANALOG_POL(gpio_analog_pol[9]), + .ANALOG_SEL(gpio_analog_sel[9]), + .DM({ gpio_dm2[9], gpio_dm1[9], gpio_dm0[9] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[9] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[9]), + .ENABLE_VSWITCH_H(\loop0_gpio[9] ), + .HLD_H_N(\loop1_gpio[9] ), + .HLD_OVR(gpio_holdover[9]), + .IB_MODE_SEL(gpio_ib_mode_sel[9]), + .IN(gpio_in[9]), + .INP_DIS(gpio_inp_dis[9]), + .IN_H(gpio_in_h[9]), + .OE_N(gpio_oeb[9]), + .OUT(gpio_out[9]), + .PAD(gpio[9]), + .PAD_A_ESD_0_H(analog_io[9]), + .PAD_A_NOESD_H(analog_noesd_io[9]), + .SLOW(gpio_slow_sel[9]), + .TIE_HI_ESD(\loop1_gpio[9] ), + .TIE_LO_ESD(\loop0_gpio[9] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[9]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[0] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[19]), + .ANALOG_POL(gpio_analog_pol[19]), + .ANALOG_SEL(gpio_analog_sel[19]), + .DM({ gpio_dm2[19], gpio_dm1[19], gpio_dm0[19] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[19] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[19]), + .ENABLE_VSWITCH_H(\loop0_gpio[19] ), + .HLD_H_N(\loop1_gpio[19] ), + .HLD_OVR(gpio_holdover[19]), + .IB_MODE_SEL(gpio_ib_mode_sel[19]), + .IN(gpio_in[19]), + .INP_DIS(gpio_inp_dis[19]), + .IN_H(gpio_in_h[19]), + .OE_N(gpio_oeb[19]), + .OUT(gpio_out[19]), + .PAD(gpio[19]), + .PAD_A_ESD_0_H(analog_io[19]), + .PAD_A_NOESD_H(analog_noesd_io[19]), + .SLOW(gpio_slow_sel[19]), + .TIE_HI_ESD(\loop1_gpio[19] ), + .TIE_LO_ESD(\loop0_gpio[19] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[19]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[10] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[29]), + .ANALOG_POL(gpio_analog_pol[29]), + .ANALOG_SEL(gpio_analog_sel[29]), + .DM({ gpio_dm2[29], gpio_dm1[29], gpio_dm0[29] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[29] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[29]), + .ENABLE_VSWITCH_H(\loop0_gpio[29] ), + .HLD_H_N(\loop1_gpio[29] ), + .HLD_OVR(gpio_holdover[29]), + .IB_MODE_SEL(gpio_ib_mode_sel[29]), + .IN(gpio_in[29]), + .INP_DIS(gpio_inp_dis[29]), + .IN_H(gpio_in_h[29]), + .OE_N(gpio_oeb[29]), + .OUT(gpio_out[29]), + .PAD(gpio[29]), + .PAD_A_ESD_0_H(analog_io[29]), + .PAD_A_NOESD_H(analog_noesd_io[29]), + .SLOW(gpio_slow_sel[29]), + .TIE_HI_ESD(\loop1_gpio[29] ), + .TIE_LO_ESD(\loop0_gpio[29] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[29]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[11] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[30]), + .ANALOG_POL(gpio_analog_pol[30]), + .ANALOG_SEL(gpio_analog_sel[30]), + .DM({ gpio_dm2[30], gpio_dm1[30], gpio_dm0[30] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[30] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[30]), + .ENABLE_VSWITCH_H(\loop0_gpio[30] ), + .HLD_H_N(\loop1_gpio[30] ), + .HLD_OVR(gpio_holdover[30]), + .IB_MODE_SEL(gpio_ib_mode_sel[30]), + .IN(gpio_in[30]), + .INP_DIS(gpio_inp_dis[30]), + .IN_H(gpio_in_h[30]), + .OE_N(gpio_oeb[30]), + .OUT(gpio_out[30]), + .PAD(gpio[30]), + .PAD_A_ESD_0_H(analog_io[30]), + .PAD_A_NOESD_H(analog_noesd_io[30]), + .SLOW(gpio_slow_sel[30]), + .TIE_HI_ESD(\loop1_gpio[30] ), + .TIE_LO_ESD(\loop0_gpio[30] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[30]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[12] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[31]), + .ANALOG_POL(gpio_analog_pol[31]), + .ANALOG_SEL(gpio_analog_sel[31]), + .DM({ gpio_dm2[31], gpio_dm1[31], gpio_dm0[31] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[31] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[31]), + .ENABLE_VSWITCH_H(\loop0_gpio[31] ), + .HLD_H_N(\loop1_gpio[31] ), + .HLD_OVR(gpio_holdover[31]), + .IB_MODE_SEL(gpio_ib_mode_sel[31]), + .IN(gpio_in[31]), + .INP_DIS(gpio_inp_dis[31]), + .IN_H(gpio_in_h[31]), + .OE_N(gpio_oeb[31]), + .OUT(gpio_out[31]), + .PAD(gpio[31]), + .PAD_A_ESD_0_H(analog_io[31]), + .PAD_A_NOESD_H(analog_noesd_io[31]), + .SLOW(gpio_slow_sel[31]), + .TIE_HI_ESD(\loop1_gpio[31] ), + .TIE_LO_ESD(\loop0_gpio[31] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[31]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[13] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[32]), + .ANALOG_POL(gpio_analog_pol[32]), + .ANALOG_SEL(gpio_analog_sel[32]), + .DM({ gpio_dm2[32], gpio_dm1[32], gpio_dm0[32] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[32] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[32]), + .ENABLE_VSWITCH_H(\loop0_gpio[32] ), + .HLD_H_N(\loop1_gpio[32] ), + .HLD_OVR(gpio_holdover[32]), + .IB_MODE_SEL(gpio_ib_mode_sel[32]), + .IN(gpio_in[32]), + .INP_DIS(gpio_inp_dis[32]), + .IN_H(gpio_in_h[32]), + .OE_N(gpio_oeb[32]), + .OUT(gpio_out[32]), + .PAD(gpio[32]), + .PAD_A_ESD_0_H(analog_io[32]), + .PAD_A_NOESD_H(analog_noesd_io[32]), + .SLOW(gpio_slow_sel[32]), + .TIE_HI_ESD(\loop1_gpio[32] ), + .TIE_LO_ESD(\loop0_gpio[32] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[32]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[14] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[33]), + .ANALOG_POL(gpio_analog_pol[33]), + .ANALOG_SEL(gpio_analog_sel[33]), + .DM({ gpio_dm2[33], gpio_dm1[33], gpio_dm0[33] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[33] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[33]), + .ENABLE_VSWITCH_H(\loop0_gpio[33] ), + .HLD_H_N(\loop1_gpio[33] ), + .HLD_OVR(gpio_holdover[33]), + .IB_MODE_SEL(gpio_ib_mode_sel[33]), + .IN(gpio_in[33]), + .INP_DIS(gpio_inp_dis[33]), + .IN_H(gpio_in_h[33]), + .OE_N(gpio_oeb[33]), + .OUT(gpio_out[33]), + .PAD(gpio[33]), + .PAD_A_ESD_0_H(analog_io[33]), + .PAD_A_NOESD_H(analog_noesd_io[33]), + .SLOW(gpio_slow_sel[33]), + .TIE_HI_ESD(\loop1_gpio[33] ), + .TIE_LO_ESD(\loop0_gpio[33] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[33]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[15] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[34]), + .ANALOG_POL(gpio_analog_pol[34]), + .ANALOG_SEL(gpio_analog_sel[34]), + .DM({ gpio_dm2[34], gpio_dm1[34], gpio_dm0[34] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[34] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[34]), + .ENABLE_VSWITCH_H(\loop0_gpio[34] ), + .HLD_H_N(\loop1_gpio[34] ), + .HLD_OVR(gpio_holdover[34]), + .IB_MODE_SEL(gpio_ib_mode_sel[34]), + .IN(gpio_in[34]), + .INP_DIS(gpio_inp_dis[34]), + .IN_H(gpio_in_h[34]), + .OE_N(gpio_oeb[34]), + .OUT(gpio_out[34]), + .PAD(gpio[34]), + .PAD_A_ESD_0_H(analog_io[34]), + .PAD_A_NOESD_H(analog_noesd_io[34]), + .SLOW(gpio_slow_sel[34]), + .TIE_HI_ESD(\loop1_gpio[34] ), + .TIE_LO_ESD(\loop0_gpio[34] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[34]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[16] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[35]), + .ANALOG_POL(gpio_analog_pol[35]), + .ANALOG_SEL(gpio_analog_sel[35]), + .DM({ gpio_dm2[35], gpio_dm1[35], gpio_dm0[35] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[35] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[35]), + .ENABLE_VSWITCH_H(\loop0_gpio[35] ), + .HLD_H_N(\loop1_gpio[35] ), + .HLD_OVR(gpio_holdover[35]), + .IB_MODE_SEL(gpio_ib_mode_sel[35]), + .IN(gpio_in[35]), + .INP_DIS(gpio_inp_dis[35]), + .IN_H(gpio_in_h[35]), + .OE_N(gpio_oeb[35]), + .OUT(gpio_out[35]), + .PAD(gpio[35]), + .PAD_A_ESD_0_H(analog_io[35]), + .PAD_A_NOESD_H(analog_noesd_io[35]), + .SLOW(gpio_slow_sel[35]), + .TIE_HI_ESD(\loop1_gpio[35] ), + .TIE_LO_ESD(\loop0_gpio[35] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[35]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[17] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[36]), + .ANALOG_POL(gpio_analog_pol[36]), + .ANALOG_SEL(gpio_analog_sel[36]), + .DM({ gpio_dm2[36], gpio_dm1[36], gpio_dm0[36] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[36] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[36]), + .ENABLE_VSWITCH_H(\loop0_gpio[36] ), + .HLD_H_N(\loop1_gpio[36] ), + .HLD_OVR(gpio_holdover[36]), + .IB_MODE_SEL(gpio_ib_mode_sel[36]), + .IN(gpio_in[36]), + .INP_DIS(gpio_inp_dis[36]), + .IN_H(gpio_in_h[36]), + .OE_N(gpio_oeb[36]), + .OUT(gpio_out[36]), + .PAD(gpio[36]), + .PAD_A_ESD_0_H(analog_io[36]), + .PAD_A_NOESD_H(analog_noesd_io[36]), + .SLOW(gpio_slow_sel[36]), + .TIE_HI_ESD(\loop1_gpio[36] ), + .TIE_LO_ESD(\loop0_gpio[36] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[36]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[18] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[37]), + .ANALOG_POL(gpio_analog_pol[37]), + .ANALOG_SEL(gpio_analog_sel[37]), + .DM({ gpio_dm2[37], gpio_dm1[37], gpio_dm0[37] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[37] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[37]), + .ENABLE_VSWITCH_H(\loop0_gpio[37] ), + .HLD_H_N(\loop1_gpio[37] ), + .HLD_OVR(gpio_holdover[37]), + .IB_MODE_SEL(gpio_ib_mode_sel[37]), + .IN(gpio_in[37]), + .INP_DIS(gpio_inp_dis[37]), + .IN_H(gpio_in_h[37]), + .OE_N(gpio_oeb[37]), + .OUT(gpio_out[37]), + .PAD(gpio[37]), + .PAD_A_ESD_0_H(analog_io[37]), + .PAD_A_NOESD_H(analog_noesd_io[37]), + .SLOW(gpio_slow_sel[37]), + .TIE_HI_ESD(\loop1_gpio[37] ), + .TIE_LO_ESD(\loop0_gpio[37] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[37]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[1] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[20]), + .ANALOG_POL(gpio_analog_pol[20]), + .ANALOG_SEL(gpio_analog_sel[20]), + .DM({ gpio_dm2[20], gpio_dm1[20], gpio_dm0[20] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[20] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[20]), + .ENABLE_VSWITCH_H(\loop0_gpio[20] ), + .HLD_H_N(\loop1_gpio[20] ), + .HLD_OVR(gpio_holdover[20]), + .IB_MODE_SEL(gpio_ib_mode_sel[20]), + .IN(gpio_in[20]), + .INP_DIS(gpio_inp_dis[20]), + .IN_H(gpio_in_h[20]), + .OE_N(gpio_oeb[20]), + .OUT(gpio_out[20]), + .PAD(gpio[20]), + .PAD_A_ESD_0_H(analog_io[20]), + .PAD_A_NOESD_H(analog_noesd_io[20]), + .SLOW(gpio_slow_sel[20]), + .TIE_HI_ESD(\loop1_gpio[20] ), + .TIE_LO_ESD(\loop0_gpio[20] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[20]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[2] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[21]), + .ANALOG_POL(gpio_analog_pol[21]), + .ANALOG_SEL(gpio_analog_sel[21]), + .DM({ gpio_dm2[21], gpio_dm1[21], gpio_dm0[21] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[21] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[21]), + .ENABLE_VSWITCH_H(\loop0_gpio[21] ), + .HLD_H_N(\loop1_gpio[21] ), + .HLD_OVR(gpio_holdover[21]), + .IB_MODE_SEL(gpio_ib_mode_sel[21]), + .IN(gpio_in[21]), + .INP_DIS(gpio_inp_dis[21]), + .IN_H(gpio_in_h[21]), + .OE_N(gpio_oeb[21]), + .OUT(gpio_out[21]), + .PAD(gpio[21]), + .PAD_A_ESD_0_H(analog_io[21]), + .PAD_A_NOESD_H(analog_noesd_io[21]), + .SLOW(gpio_slow_sel[21]), + .TIE_HI_ESD(\loop1_gpio[21] ), + .TIE_LO_ESD(\loop0_gpio[21] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[21]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[3] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[22]), + .ANALOG_POL(gpio_analog_pol[22]), + .ANALOG_SEL(gpio_analog_sel[22]), + .DM({ gpio_dm2[22], gpio_dm1[22], gpio_dm0[22] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[22] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[22]), + .ENABLE_VSWITCH_H(\loop0_gpio[22] ), + .HLD_H_N(\loop1_gpio[22] ), + .HLD_OVR(gpio_holdover[22]), + .IB_MODE_SEL(gpio_ib_mode_sel[22]), + .IN(gpio_in[22]), + .INP_DIS(gpio_inp_dis[22]), + .IN_H(gpio_in_h[22]), + .OE_N(gpio_oeb[22]), + .OUT(gpio_out[22]), + .PAD(gpio[22]), + .PAD_A_ESD_0_H(analog_io[22]), + .PAD_A_NOESD_H(analog_noesd_io[22]), + .SLOW(gpio_slow_sel[22]), + .TIE_HI_ESD(\loop1_gpio[22] ), + .TIE_LO_ESD(\loop0_gpio[22] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[22]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[4] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[23]), + .ANALOG_POL(gpio_analog_pol[23]), + .ANALOG_SEL(gpio_analog_sel[23]), + .DM({ gpio_dm2[23], gpio_dm1[23], gpio_dm0[23] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[23] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[23]), + .ENABLE_VSWITCH_H(\loop0_gpio[23] ), + .HLD_H_N(\loop1_gpio[23] ), + .HLD_OVR(gpio_holdover[23]), + .IB_MODE_SEL(gpio_ib_mode_sel[23]), + .IN(gpio_in[23]), + .INP_DIS(gpio_inp_dis[23]), + .IN_H(gpio_in_h[23]), + .OE_N(gpio_oeb[23]), + .OUT(gpio_out[23]), + .PAD(gpio[23]), + .PAD_A_ESD_0_H(analog_io[23]), + .PAD_A_NOESD_H(analog_noesd_io[23]), + .SLOW(gpio_slow_sel[23]), + .TIE_HI_ESD(\loop1_gpio[23] ), + .TIE_LO_ESD(\loop0_gpio[23] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[23]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[5] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[24]), + .ANALOG_POL(gpio_analog_pol[24]), + .ANALOG_SEL(gpio_analog_sel[24]), + .DM({ gpio_dm2[24], gpio_dm1[24], gpio_dm0[24] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[24] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[24]), + .ENABLE_VSWITCH_H(\loop0_gpio[24] ), + .HLD_H_N(\loop1_gpio[24] ), + .HLD_OVR(gpio_holdover[24]), + .IB_MODE_SEL(gpio_ib_mode_sel[24]), + .IN(gpio_in[24]), + .INP_DIS(gpio_inp_dis[24]), + .IN_H(gpio_in_h[24]), + .OE_N(gpio_oeb[24]), + .OUT(gpio_out[24]), + .PAD(gpio[24]), + .PAD_A_ESD_0_H(analog_io[24]), + .PAD_A_NOESD_H(analog_noesd_io[24]), + .SLOW(gpio_slow_sel[24]), + .TIE_HI_ESD(\loop1_gpio[24] ), + .TIE_LO_ESD(\loop0_gpio[24] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[24]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[6] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[25]), + .ANALOG_POL(gpio_analog_pol[25]), + .ANALOG_SEL(gpio_analog_sel[25]), + .DM({ gpio_dm2[25], gpio_dm1[25], gpio_dm0[25] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[25] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[25]), + .ENABLE_VSWITCH_H(\loop0_gpio[25] ), + .HLD_H_N(\loop1_gpio[25] ), + .HLD_OVR(gpio_holdover[25]), + .IB_MODE_SEL(gpio_ib_mode_sel[25]), + .IN(gpio_in[25]), + .INP_DIS(gpio_inp_dis[25]), + .IN_H(gpio_in_h[25]), + .OE_N(gpio_oeb[25]), + .OUT(gpio_out[25]), + .PAD(gpio[25]), + .PAD_A_ESD_0_H(analog_io[25]), + .PAD_A_NOESD_H(analog_noesd_io[25]), + .SLOW(gpio_slow_sel[25]), + .TIE_HI_ESD(\loop1_gpio[25] ), + .TIE_LO_ESD(\loop0_gpio[25] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[25]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[7] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[26]), + .ANALOG_POL(gpio_analog_pol[26]), + .ANALOG_SEL(gpio_analog_sel[26]), + .DM({ gpio_dm2[26], gpio_dm1[26], gpio_dm0[26] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[26] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[26]), + .ENABLE_VSWITCH_H(\loop0_gpio[26] ), + .HLD_H_N(\loop1_gpio[26] ), + .HLD_OVR(gpio_holdover[26]), + .IB_MODE_SEL(gpio_ib_mode_sel[26]), + .IN(gpio_in[26]), + .INP_DIS(gpio_inp_dis[26]), + .IN_H(gpio_in_h[26]), + .OE_N(gpio_oeb[26]), + .OUT(gpio_out[26]), + .PAD(gpio[26]), + .PAD_A_ESD_0_H(analog_io[26]), + .PAD_A_NOESD_H(analog_noesd_io[26]), + .SLOW(gpio_slow_sel[26]), + .TIE_HI_ESD(\loop1_gpio[26] ), + .TIE_LO_ESD(\loop0_gpio[26] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[26]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[8] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[27]), + .ANALOG_POL(gpio_analog_pol[27]), + .ANALOG_SEL(gpio_analog_sel[27]), + .DM({ gpio_dm2[27], gpio_dm1[27], gpio_dm0[27] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[27] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[27]), + .ENABLE_VSWITCH_H(\loop0_gpio[27] ), + .HLD_H_N(\loop1_gpio[27] ), + .HLD_OVR(gpio_holdover[27]), + .IB_MODE_SEL(gpio_ib_mode_sel[27]), + .IN(gpio_in[27]), + .INP_DIS(gpio_inp_dis[27]), + .IN_H(gpio_in_h[27]), + .OE_N(gpio_oeb[27]), + .OUT(gpio_out[27]), + .PAD(gpio[27]), + .PAD_A_ESD_0_H(analog_io[27]), + .PAD_A_NOESD_H(analog_noesd_io[27]), + .SLOW(gpio_slow_sel[27]), + .TIE_HI_ESD(\loop1_gpio[27] ), + .TIE_LO_ESD(\loop0_gpio[27] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[27]) + ); + sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[9] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .ANALOG_EN(gpio_analog_en[28]), + .ANALOG_POL(gpio_analog_pol[28]), + .ANALOG_SEL(gpio_analog_sel[28]), + .DM({ gpio_dm2[28], gpio_dm1[28], gpio_dm0[28] }), + .ENABLE_H(porb_h), + .ENABLE_INP_H(\loop0_gpio[28] ), + .ENABLE_VDDA_H(porb_h), + .ENABLE_VDDIO(gpio_loopback_one[28]), + .ENABLE_VSWITCH_H(\loop0_gpio[28] ), + .HLD_H_N(\loop1_gpio[28] ), + .HLD_OVR(gpio_holdover[28]), + .IB_MODE_SEL(gpio_ib_mode_sel[28]), + .IN(gpio_in[28]), + .INP_DIS(gpio_inp_dis[28]), + .IN_H(gpio_in_h[28]), + .OE_N(gpio_oeb[28]), + .OUT(gpio_out[28]), + .PAD(gpio[28]), + .PAD_A_ESD_0_H(analog_io[28]), + .PAD_A_NOESD_H(analog_noesd_io[28]), + .SLOW(gpio_slow_sel[28]), + .TIE_HI_ESD(\loop1_gpio[28] ), + .TIE_LO_ESD(\loop0_gpio[28] ), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .VTRIP_SEL(gpio_vtrip_sel[28]) + ); + constant_block \constant_value_inst[0] ( + .one(gpio_loopback_one[0]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[0]) + ); + constant_block \constant_value_inst[10] ( + .one(gpio_loopback_one[10]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[10]) + ); + constant_block \constant_value_inst[11] ( + .one(gpio_loopback_one[11]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[11]) + ); + constant_block \constant_value_inst[12] ( + .one(gpio_loopback_one[12]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[12]) + ); + constant_block \constant_value_inst[13] ( + .one(gpio_loopback_one[13]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[13]) + ); + constant_block \constant_value_inst[14] ( + .one(gpio_loopback_one[14]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[14]) + ); + constant_block \constant_value_inst[15] ( + .one(gpio_loopback_one[15]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[15]) + ); + constant_block \constant_value_inst[16] ( + .one(gpio_loopback_one[16]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[16]) + ); + constant_block \constant_value_inst[17] ( + .one(gpio_loopback_one[17]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[17]) + ); + constant_block \constant_value_inst[18] ( + .one(gpio_loopback_one[18]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[18]) + ); + constant_block \constant_value_inst[19] ( + .one(gpio_loopback_one[19]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[19]) + ); + constant_block \constant_value_inst[1] ( + .one(gpio_loopback_one[1]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[1]) + ); + constant_block \constant_value_inst[20] ( + .one(gpio_loopback_one[20]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[20]) + ); + constant_block \constant_value_inst[21] ( + .one(gpio_loopback_one[21]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[21]) + ); + constant_block \constant_value_inst[22] ( + .one(gpio_loopback_one[22]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[22]) + ); + constant_block \constant_value_inst[23] ( + .one(gpio_loopback_one[23]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[23]) + ); + constant_block \constant_value_inst[24] ( + .one(gpio_loopback_one[24]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[24]) + ); + constant_block \constant_value_inst[25] ( + .one(gpio_loopback_one[25]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[25]) + ); + constant_block \constant_value_inst[26] ( + .one(gpio_loopback_one[26]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[26]) + ); + constant_block \constant_value_inst[27] ( + .one(gpio_loopback_one[27]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[27]) + ); + constant_block \constant_value_inst[28] ( + .one(gpio_loopback_one[28]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[28]) + ); + constant_block \constant_value_inst[29] ( + .one(gpio_loopback_one[29]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[29]) + ); + constant_block \constant_value_inst[2] ( + .one(gpio_loopback_one[2]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[2]) + ); + constant_block \constant_value_inst[30] ( + .one(gpio_loopback_one[30]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[30]) + ); + constant_block \constant_value_inst[31] ( + .one(gpio_loopback_one[31]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[31]) + ); + constant_block \constant_value_inst[32] ( + .one(gpio_loopback_one[32]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[32]) + ); + constant_block \constant_value_inst[33] ( + .one(gpio_loopback_one[33]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[33]) + ); + constant_block \constant_value_inst[34] ( + .one(gpio_loopback_one[34]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[34]) + ); + constant_block \constant_value_inst[35] ( + .one(gpio_loopback_one[35]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[35]) + ); + constant_block \constant_value_inst[36] ( + .one(gpio_loopback_one[36]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[36]) + ); + constant_block \constant_value_inst[37] ( + .one(gpio_loopback_one[37]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[37]) + ); + constant_block \constant_value_inst[38] ( + .one(gpio_loopback_one[38]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[38]) + ); + constant_block \constant_value_inst[39] ( + .one(gpio_loopback_one[39]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[39]) + ); + constant_block \constant_value_inst[3] ( + .one(gpio_loopback_one[3]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[3]) + ); + constant_block \constant_value_inst[40] ( + .one(gpio_loopback_one[40]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[40]) + ); + constant_block \constant_value_inst[41] ( + .one(gpio_loopback_one[41]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[41]) + ); + constant_block \constant_value_inst[42] ( + .one(gpio_loopback_one[42]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[42]) + ); + constant_block \constant_value_inst[43] ( + .one(gpio_loopback_one[43]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[43]) + ); + constant_block \constant_value_inst[4] ( + .one(gpio_loopback_one[4]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[4]) + ); + constant_block \constant_value_inst[5] ( + .one(gpio_loopback_one[5]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[5]) + ); + constant_block \constant_value_inst[6] ( + .one(gpio_loopback_one[6]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[6]) + ); + constant_block \constant_value_inst[7] ( + .one(gpio_loopback_one[7]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[7]) + ); + constant_block \constant_value_inst[8] ( + .one(gpio_loopback_one[8]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[8]) + ); + constant_block \constant_value_inst[9] ( + .one(gpio_loopback_one[9]), + .vccd(vccd), + .vssd(vssd), + .zero(gpio_loopback_zero[9]) + ); + constant_block constant_value_xres_inst ( + .one(xres_loopback_one), + .vccd(vccd), + .vssd(vssd), + .zero(xres_loopback_zero) + ); + sky130_fd_io__top_xres4v2 master_resetb_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .DISABLE_PULLUP_H(xres_vss_loop), + .ENABLE_H(porb_h), + .ENABLE_VDDIO(xres_loopback_one), + .EN_VDDIO_SIG_H(xres_vss_loop), + .FILT_IN_H(xres_vss_loop), + .INP_SEL_H(xres_vss_loop), + .PAD(resetb_pad), + .PAD_A_ESD_H(xresloop), + .PULLUP_H(xres_vss_loop), + .TIE_LO_ESD(xres_vss_loop), + .TIE_WEAK_HI_H(xresloop), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio), + .XRES_H_N(resetb_h) + ); + simple_por por ( + .por_l(por_l), + .porb_h(porb_h), + .porb_l(porb_l), + .vdd1v8(vccd), + .vdd3v3(vddio), + .vss1v8(vssd), + .vss3v3(vssio) + ); + xres_buf rstb_level ( + .A(resetb_h), + .LVGND(vssd), + .LVPWR(vccd), + .VGND(vssio), + .VPWR(vddio), + .X(resetb_l) + ); + sky130_ef_io__corner_pad \user0_corner[0] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__corner_pad \user0_corner[1] ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vccd_lvc_clamped_pad user0_vccd_lvclamp_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCD_PAD(vccd_pad), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vdda_hvc_clamped_pad user0_vdda_hvclamp_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDA_PAD(vdda_pad), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vddio_hvc_clamped_pad user0_vddio_hvclamp_pad_0 ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_PAD(vddio_pad), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vddio_hvc_clamped_pad user0_vddio_hvclamp_pad_1 ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_PAD(vddio_pad2), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vssa_hvc_clamped_pad user0_vssa_hvclamp_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSA_PAD(vssa_pad), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vssd_lvc_clamped_pad user0_vssd_lvclamp_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSD_PAD(vssd_pad), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vssio_hvc_clamped_pad user0_vssio_hvclamp_pad_0 ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_PAD(vssio_pad), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vssio_hvc_clamped_pad user0_vssio_hvclamp_pad_1 ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_PAD(vssio_pad2), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__corner_pad user1_corner ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vccd_lvc_clamped3_pad user1_vccd_lvclamp_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCD1(vccd1), + .VCCD_PAD(vccd1_pad), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSD1(vssd1), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vdda_hvc_clamped_pad user1_vdda_hvclamp_pad_0 ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDA_PAD(vdda1_pad), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vdda_hvc_clamped_pad user1_vdda_hvclamp_pad_1 ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDA_PAD(vdda1_pad2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vssa_hvc_clamped_pad user1_vssa_hvclamp_pad_0 ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSA_PAD(vssa1_pad), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vssa_hvc_clamped_pad user1_vssa_hvclamp_pad_1 ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSA_PAD(vssa1_pad2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vssd_lvc_clamped3_pad user1_vssd_lvclamp_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCD1(vccd1), + .VCCHIB(vccd), + .VDDA(vdda1), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa1), + .VSSD(vssd), + .VSSD1(vssd1), + .VSSD_PAD(vssd1_pad), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__corner_pad user2_corner ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vccd_lvc_clamped3_pad user2_vccd_lvclamp_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCD1(vccd2), + .VCCD_PAD(vccd2_pad), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSD1(vssd2), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vdda_hvc_clamped_pad user2_vdda_hvclamp_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDA_PAD(vdda2_pad), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vssa_hvc_clamped_pad user2_vssa_hvclamp_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSA_PAD(vssa2_pad), + .VSSD(vssd), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + sky130_ef_io__vssd_lvc_clamped3_pad user2_vssd_lvclamp_pad ( + .AMUXBUS_A(analog_a), + .AMUXBUS_B(analog_b), + .VCCD(vccd), + .VCCD1(vccd2), + .VCCHIB(vccd), + .VDDA(vdda2), + .VDDIO(vddio), + .VDDIO_Q(vddio_q), + .VSSA(vssa2), + .VSSD(vssd), + .VSSD1(vssd2), + .VSSD_PAD(vssd2_pad), + .VSSIO(vssio), + .VSSIO_Q(vssio_q), + .VSWITCH(vddio) + ); + user_id_programming user_id_value ( + .VGND(vssd), + .VPWR(vccd), + .mask_rev(mask_rev) + ); + assign \gpio_dm_all[131] = gpio_dm2[43]; + assign \gpio_dm_all[130] = gpio_dm1[43]; + assign \gpio_dm_all[129] = gpio_dm0[43]; + assign \gpio_dm_all[128] = gpio_dm2[42]; + assign \gpio_dm_all[127] = gpio_dm1[42]; + assign \gpio_dm_all[126] = gpio_dm0[42]; + assign \gpio_dm_all[125] = gpio_dm2[41]; + assign \gpio_dm_all[124] = gpio_dm1[41]; + assign \gpio_dm_all[123] = gpio_dm0[41]; + assign \gpio_dm_all[122] = gpio_dm2[40]; + assign \gpio_dm_all[121] = gpio_dm1[40]; + assign \gpio_dm_all[120] = gpio_dm0[40]; + assign \gpio_dm_all[119] = gpio_dm2[39]; + assign \gpio_dm_all[118] = gpio_dm1[39]; + assign \gpio_dm_all[117] = gpio_dm0[39]; + assign \gpio_dm_all[116] = gpio_dm2[38]; + assign \gpio_dm_all[115] = gpio_dm1[38]; + assign \gpio_dm_all[114] = gpio_dm0[38]; + assign \gpio_dm_all[113] = gpio_dm2[37]; + assign \gpio_dm_all[112] = gpio_dm1[37]; + assign \gpio_dm_all[111] = gpio_dm0[37]; + assign \gpio_dm_all[110] = gpio_dm2[36]; + assign \gpio_dm_all[109] = gpio_dm1[36]; + assign \gpio_dm_all[108] = gpio_dm0[36]; + assign \gpio_dm_all[107] = gpio_dm2[35]; + assign \gpio_dm_all[106] = gpio_dm1[35]; + assign \gpio_dm_all[105] = gpio_dm0[35]; + assign \gpio_dm_all[104] = gpio_dm2[34]; + assign \gpio_dm_all[103] = gpio_dm1[34]; + assign \gpio_dm_all[102] = gpio_dm0[34]; + assign \gpio_dm_all[101] = gpio_dm2[33]; + assign \gpio_dm_all[100] = gpio_dm1[33]; + assign \gpio_dm_all[99] = gpio_dm0[33]; + assign \gpio_dm_all[98] = gpio_dm2[32]; + assign \gpio_dm_all[97] = gpio_dm1[32]; + assign \gpio_dm_all[96] = gpio_dm0[32]; + assign \gpio_dm_all[95] = gpio_dm2[31]; + assign \gpio_dm_all[94] = gpio_dm1[31]; + assign \gpio_dm_all[93] = gpio_dm0[31]; + assign \gpio_dm_all[92] = gpio_dm2[30]; + assign \gpio_dm_all[91] = gpio_dm1[30]; + assign \gpio_dm_all[90] = gpio_dm0[30]; + assign \gpio_dm_all[89] = gpio_dm2[29]; + assign \gpio_dm_all[88] = gpio_dm1[29]; + assign \gpio_dm_all[87] = gpio_dm0[29]; + assign \gpio_dm_all[86] = gpio_dm2[28]; + assign \gpio_dm_all[85] = gpio_dm1[28]; + assign \gpio_dm_all[84] = gpio_dm0[28]; + assign \gpio_dm_all[83] = gpio_dm2[27]; + assign \gpio_dm_all[82] = gpio_dm1[27]; + assign \gpio_dm_all[81] = gpio_dm0[27]; + assign \gpio_dm_all[80] = gpio_dm2[26]; + assign \gpio_dm_all[79] = gpio_dm1[26]; + assign \gpio_dm_all[78] = gpio_dm0[26]; + assign \gpio_dm_all[77] = gpio_dm2[25]; + assign \gpio_dm_all[76] = gpio_dm1[25]; + assign \gpio_dm_all[75] = gpio_dm0[25]; + assign \gpio_dm_all[74] = gpio_dm2[24]; + assign \gpio_dm_all[73] = gpio_dm1[24]; + assign \gpio_dm_all[72] = gpio_dm0[24]; + assign \gpio_dm_all[71] = gpio_dm2[23]; + assign \gpio_dm_all[70] = gpio_dm1[23]; + assign \gpio_dm_all[69] = gpio_dm0[23]; + assign \gpio_dm_all[68] = gpio_dm2[22]; + assign \gpio_dm_all[67] = gpio_dm1[22]; + assign \gpio_dm_all[66] = gpio_dm0[22]; + assign \gpio_dm_all[65] = gpio_dm2[21]; + assign \gpio_dm_all[64] = gpio_dm1[21]; + assign \gpio_dm_all[63] = gpio_dm0[21]; + assign \gpio_dm_all[62] = gpio_dm2[20]; + assign \gpio_dm_all[61] = gpio_dm1[20]; + assign \gpio_dm_all[60] = gpio_dm0[20]; + assign \gpio_dm_all[59] = gpio_dm2[19]; + assign \gpio_dm_all[58] = gpio_dm1[19]; + assign \gpio_dm_all[57] = gpio_dm0[19]; + assign \gpio_dm_all[56] = gpio_dm2[18]; + assign \gpio_dm_all[55] = gpio_dm1[18]; + assign \gpio_dm_all[54] = gpio_dm0[18]; + assign \gpio_dm_all[53] = gpio_dm2[17]; + assign \gpio_dm_all[52] = gpio_dm1[17]; + assign \gpio_dm_all[51] = gpio_dm0[17]; + assign \gpio_dm_all[50] = gpio_dm2[16]; + assign \gpio_dm_all[49] = gpio_dm1[16]; + assign \gpio_dm_all[48] = gpio_dm0[16]; + assign \gpio_dm_all[47] = gpio_dm2[15]; + assign \gpio_dm_all[46] = gpio_dm1[15]; + assign \gpio_dm_all[45] = gpio_dm0[15]; + assign \gpio_dm_all[44] = gpio_dm2[14]; + assign \gpio_dm_all[43] = gpio_dm1[14]; + assign \gpio_dm_all[42] = gpio_dm0[14]; + assign \gpio_dm_all[41] = gpio_dm2[13]; + assign \gpio_dm_all[40] = gpio_dm1[13]; + assign \gpio_dm_all[39] = gpio_dm0[13]; + assign \gpio_dm_all[38] = gpio_dm2[12]; + assign \gpio_dm_all[37] = gpio_dm1[12]; + assign \gpio_dm_all[36] = gpio_dm0[12]; + assign \gpio_dm_all[35] = gpio_dm2[11]; + assign \gpio_dm_all[34] = gpio_dm1[11]; + assign \gpio_dm_all[33] = gpio_dm0[11]; + assign \gpio_dm_all[32] = gpio_dm2[10]; + assign \gpio_dm_all[31] = gpio_dm1[10]; + assign \gpio_dm_all[30] = gpio_dm0[10]; + assign \gpio_dm_all[29] = gpio_dm2[9]; + assign \gpio_dm_all[28] = gpio_dm1[9]; + assign \gpio_dm_all[27] = gpio_dm0[9]; + assign \gpio_dm_all[26] = gpio_dm2[8]; + assign \gpio_dm_all[25] = gpio_dm1[8]; + assign \gpio_dm_all[24] = gpio_dm0[8]; + assign \gpio_dm_all[23] = gpio_dm2[7]; + assign \gpio_dm_all[22] = gpio_dm1[7]; + assign \gpio_dm_all[21] = gpio_dm0[7]; + assign \gpio_dm_all[20] = gpio_dm2[6]; + assign \gpio_dm_all[19] = gpio_dm1[6]; + assign \gpio_dm_all[18] = gpio_dm0[6]; + assign \gpio_dm_all[17] = gpio_dm2[5]; + assign \gpio_dm_all[16] = gpio_dm1[5]; + assign \gpio_dm_all[15] = gpio_dm0[5]; + assign \gpio_dm_all[14] = gpio_dm2[4]; + assign \gpio_dm_all[13] = gpio_dm1[4]; + assign \gpio_dm_all[12] = gpio_dm0[4]; + assign \gpio_dm_all[11] = gpio_dm2[3]; + assign \gpio_dm_all[10] = gpio_dm1[3]; + assign \gpio_dm_all[9] = gpio_dm0[3]; + assign \gpio_dm_all[8] = gpio_dm2[2]; + assign \gpio_dm_all[7] = gpio_dm1[2]; + assign \gpio_dm_all[6] = gpio_dm0[2]; + assign \gpio_dm_all[5] = gpio_dm2[1]; + assign \gpio_dm_all[4] = gpio_dm1[1]; + assign \gpio_dm_all[3] = gpio_dm0[1]; + assign \gpio_dm_all[2] = gpio_dm2[0]; + assign \gpio_dm_all[1] = gpio_dm1[0]; + assign \gpio_dm_all[0] = gpio_dm0[0]; + assign \gpio_enh[43] = porb_h; + assign \gpio_enh[42] = porb_h; + assign \gpio_enh[41] = porb_h; + assign \gpio_enh[40] = porb_h; + assign \gpio_enh[39] = porb_h; + assign \gpio_enh[38] = porb_h; + assign \gpio_enh[37] = porb_h; + assign \gpio_enh[36] = porb_h; + assign \gpio_enh[35] = porb_h; + assign \gpio_enh[34] = porb_h; + assign \gpio_enh[33] = porb_h; + assign \gpio_enh[32] = porb_h; + assign \gpio_enh[31] = porb_h; + assign \gpio_enh[30] = porb_h; + assign \gpio_enh[29] = porb_h; + assign \gpio_enh[28] = porb_h; + assign \gpio_enh[27] = porb_h; + assign \gpio_enh[26] = porb_h; + assign \gpio_enh[25] = porb_h; + assign \gpio_enh[24] = porb_h; + assign \gpio_enh[23] = porb_h; + assign \gpio_enh[22] = porb_h; + assign \gpio_enh[21] = porb_h; + assign \gpio_enh[20] = porb_h; + assign \gpio_enh[19] = porb_h; + assign \gpio_enh[18] = porb_h; + assign \gpio_enh[17] = porb_h; + assign \gpio_enh[16] = porb_h; + assign \gpio_enh[15] = porb_h; + assign \gpio_enh[14] = porb_h; + assign \gpio_enh[13] = porb_h; + assign \gpio_enh[12] = porb_h; + assign \gpio_enh[11] = porb_h; + assign \gpio_enh[10] = porb_h; + assign \gpio_enh[9] = porb_h; + assign \gpio_enh[8] = porb_h; + assign \gpio_enh[7] = porb_h; + assign \gpio_enh[6] = porb_h; + assign \gpio_enh[5] = porb_h; + assign \gpio_enh[4] = porb_h; + assign \gpio_enh[3] = porb_h; + assign \gpio_enh[2] = porb_h; + assign \gpio_enh[1] = porb_h; + assign \gpio_enh[0] = porb_h; +endmodule From 9a48f4c99829f3bee719b9411b4cc1ca53299997 Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Mon, 25 Sep 2023 09:11:24 -0400 Subject: [PATCH 119/138] Swapped the positions of gpio_dm0[38] and gpio_dm1[38], which were swapped in the openframe project wrapper layout, per Mitch Bailey's observation in the #shuttle-development Slack channel. --- mag/openframe_project_wrapper.mag | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/mag/openframe_project_wrapper.mag b/mag/openframe_project_wrapper.mag index b7e6a37c..7e7f59e7 100644 --- a/mag/openframe_project_wrapper.mag +++ b/mag/openframe_project_wrapper.mag @@ -3408,9 +3408,9 @@ flabel metal2 145190 -424 145246 56 0 FreeSans 400 270 0 0 gpio_in[38] port 691 nsew flabel metal2 147030 -424 147086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[38] port 339 nsew -flabel metal2 148870 -424 148926 56 0 FreeSans 400 270 0 0 gpio_dm0[38] +flabel metal2 148870 -424 148926 56 0 FreeSans 400 270 0 0 gpio_dm1[38] port 559 nsew -flabel metal2 150710 -424 150766 56 0 FreeSans 400 270 0 0 gpio_dm1[38] +flabel metal2 150710 -424 150766 56 0 FreeSans 400 270 0 0 gpio_dm0[38] port 603 nsew flabel metal2 151354 -424 151410 56 0 FreeSans 400 270 0 0 gpio_analog_pol[38] port 515 nsew From 31c8f54f249ceec5269a82b1f44866f05683c112 Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Mon, 25 Sep 2023 19:26:09 -0400 Subject: [PATCH 120/138] Modified the openframe padframe so that the GPIO "wrapped" cells are replaced with the base cells. Routing to pins is instead done in the "gpio_connects" cells while improving on the original routing (fewer cross-overs, multiple vias per contact, wider buses for the analog signals). Made small adjustments to many of the openframe wrapper pins to keep them all on a 10nm grid. Moved the connections previously from the "wrapped" GPIO cell back from the openframe project border, so that the border can be clear of all blockages. Added the DEF file of the wrapper (previously only in the openframe example repo) to the def/ directory. Note: The modified LVS scripts depend on the gate-level netlists of the frame, which have been committed in a prior pull request. This pull request does not conflict with those files. --- def/openframe_project_wrapper.def | 4612 ++++++++++++++++ mag/caravel_openframe.mag | 6 +- mag/chip_io_gpio_connects.mag | 256 +- mag/chip_io_gpio_connects_horiz.mag | 446 +- mag/chip_io_openframe.mag | 7287 ++++++++++---------------- mag/constant_block.mag | 52 +- mag/openframe_project_wrapper.mag | 6082 +++++++-------------- mag/simple_por.mag | 14 +- mag/user_id_programming.mag | 687 +-- mag/xres_buf.mag | 34 +- scripts/run_chip_io_openframe_lvs.sh | 14 +- scripts/run_openframe_lvs.sh | 2 +- verilog/rtl/chip_io_openframe.v | 6 +- 13 files changed, 10360 insertions(+), 9138 deletions(-) create mode 100644 def/openframe_project_wrapper.def diff --git a/def/openframe_project_wrapper.def b/def/openframe_project_wrapper.def new file mode 100644 index 00000000..12f219cb --- /dev/null +++ b/def/openframe_project_wrapper.def @@ -0,0 +1,4612 @@ +VERSION 5.7 ; + NAMESCASESENSITIVE ON ; + DIVIDERCHAR "/" ; + BUSBITCHARS "()" ; + DESIGN openframe_project_wrapper ; + TECHNOLOGY sky130A ; + UNITS DISTANCE MICRONS 1000 ; + DIEAREA ( 280 280 ) ( 3166350 4766350 ) ; + +VIAS 0 ; +END VIAS + +COMPONENTS 0 ; +END COMPONENTS + +PINS 910 ; + - gpio_vtrip_sel[43] + NET gpio_vtrip_sel[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2429490 -920 ) N ; + - gpio_analog_en[15] + NET gpio_analog_en[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2970160 4767550 ) N ; + - gpio_analog_pol[15] + NET gpio_analog_pol[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2963720 4767550 ) N ; + - gpio_analog_sel[15] + NET gpio_analog_sel[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2948540 4767550 ) N ; + - gpio_dm0[15] + NET gpio_dm0[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2966940 4767550 ) N ; + - gpio_dm1[15] + NET gpio_dm1[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2976140 4767550 ) N ; + - gpio_dm2[15] + NET gpio_dm2[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2945320 4767550 ) N ; + - gpio_holdover[15] + NET gpio_holdover[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2942100 4767550 ) N ; + - gpio_ib_mode_sel[15] + NET gpio_ib_mode_sel[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2926920 4767550 ) N ; + - gpio_inp_dis[15] + NET gpio_inp_dis[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2960960 4767550 ) N ; + - gpio_oeb[15] + NET gpio_oeb[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2923700 4767550 ) N ; + - gpio_out[15] + NET gpio_out[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2939340 4767550 ) N ; + - gpio_slow_sel[15] + NET gpio_slow_sel[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2985340 4767550 ) N ; + - gpio_vtrip_sel[15] + NET gpio_vtrip_sel[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2930140 4767550 ) N ; + - gpio_in[15] + NET gpio_in[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2994540 4767550 ) N ; + - gpio_analog_en[16] + NET gpio_analog_en[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2461160 4767550 ) N ; + - gpio_analog_pol[16] + NET gpio_analog_pol[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2454720 4767550 ) N ; + - gpio_analog_sel[16] + NET gpio_analog_sel[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2439540 4767550 ) N ; + - gpio_dm0[16] + NET gpio_dm0[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2457940 4767550 ) N ; + - gpio_dm1[16] + NET gpio_dm1[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2467140 4767550 ) N ; + - gpio_dm2[16] + NET gpio_dm2[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2436320 4767550 ) N ; + - gpio_holdover[16] + NET gpio_holdover[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2433100 4767550 ) N ; + - gpio_ib_mode_sel[16] + NET gpio_ib_mode_sel[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2417920 4767550 ) N ; + - gpio_inp_dis[16] + NET gpio_inp_dis[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2451960 4767550 ) N ; + - gpio_oeb[16] + NET gpio_oeb[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2414700 4767550 ) N ; + - gpio_out[16] + NET gpio_out[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2430340 4767550 ) N ; + - gpio_slow_sel[16] + NET gpio_slow_sel[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2476340 4767550 ) N ; + - gpio_vtrip_sel[16] + NET gpio_vtrip_sel[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2421140 4767550 ) N ; + - gpio_in[16] + NET gpio_in[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2485540 4767550 ) N ; + - gpio_dm1[17] + NET gpio_dm1[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2210140 4767550 ) N ; + - gpio_dm2[17] + NET gpio_dm2[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2179320 4767550 ) N ; + - gpio_holdover[17] + NET gpio_holdover[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2176100 4767550 ) N ; + - gpio_ib_mode_sel[17] + NET gpio_ib_mode_sel[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2160920 4767550 ) N ; + - gpio_inp_dis[17] + NET gpio_inp_dis[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2194960 4767550 ) N ; + - gpio_oeb[17] + NET gpio_oeb[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2157700 4767550 ) N ; + - gpio_out[17] + NET gpio_out[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2173340 4767550 ) N ; + - gpio_slow_sel[17] + NET gpio_slow_sel[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2219340 4767550 ) N ; + - gpio_vtrip_sel[17] + NET gpio_vtrip_sel[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2164140 4767550 ) N ; + - gpio_in[17] + NET gpio_in[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2228540 4767550 ) N ; + - gpio_analog_en[18] + NET gpio_analog_en[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1759160 4767550 ) N ; + - gpio_analog_pol[18] + NET gpio_analog_pol[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1752720 4767550 ) N ; + - gpio_analog_sel[18] + NET gpio_analog_sel[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1737540 4767550 ) N ; + - gpio_dm0[18] + NET gpio_dm0[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1755940 4767550 ) N ; + - gpio_dm1[18] + NET gpio_dm1[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1765140 4767550 ) N ; + - gpio_dm2[18] + NET gpio_dm2[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1734320 4767550 ) N ; + - gpio_holdover[18] + NET gpio_holdover[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1731100 4767550 ) N ; + - gpio_ib_mode_sel[18] + NET gpio_ib_mode_sel[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1715920 4767550 ) N ; + - gpio_inp_dis[18] + NET gpio_inp_dis[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1749960 4767550 ) N ; + - gpio_oeb[18] + NET gpio_oeb[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1712700 4767550 ) N ; + - gpio_out[18] + NET gpio_out[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1728340 4767550 ) N ; + - gpio_slow_sel[18] + NET gpio_slow_sel[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1774340 4767550 ) N ; + - gpio_vtrip_sel[18] + NET gpio_vtrip_sel[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1719140 4767550 ) N ; + - gpio_in[18] + NET gpio_in[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1783540 4767550 ) N ; + - gpio_analog_en[17] + NET gpio_analog_en[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2204160 4767550 ) N ; + - gpio_analog_pol[17] + NET gpio_analog_pol[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2197720 4767550 ) N ; + - gpio_analog_sel[17] + NET gpio_analog_sel[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2182540 4767550 ) N ; + - gpio_dm0[17] + NET gpio_dm0[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2200940 4767550 ) N ; + - gpio_slow_sel[19] + NET gpio_slow_sel[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1265340 4767550 ) N ; + - gpio_vtrip_sel[19] + NET gpio_vtrip_sel[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1210140 4767550 ) N ; + - gpio_in[19] + NET gpio_in[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1274540 4767550 ) N ; + - gpio_analog_en[20] + NET gpio_analog_en[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 992160 4767550 ) N ; + - gpio_analog_pol[20] + NET gpio_analog_pol[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 985720 4767550 ) N ; + - gpio_analog_sel[20] + NET gpio_analog_sel[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 970540 4767550 ) N ; + - gpio_dm0[20] + NET gpio_dm0[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 988940 4767550 ) N ; + - gpio_dm1[20] + NET gpio_dm1[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 998140 4767550 ) N ; + - gpio_dm2[20] + NET gpio_dm2[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 967320 4767550 ) N ; + - gpio_holdover[20] + NET gpio_holdover[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 964100 4767550 ) N ; + - gpio_ib_mode_sel[20] + NET gpio_ib_mode_sel[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 948920 4767550 ) N ; + - gpio_inp_dis[20] + NET gpio_inp_dis[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 982960 4767550 ) N ; + - gpio_oeb[20] + NET gpio_oeb[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 945700 4767550 ) N ; + - gpio_out[20] + NET gpio_out[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 961340 4767550 ) N ; + - gpio_slow_sel[20] + NET gpio_slow_sel[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1007340 4767550 ) N ; + - gpio_vtrip_sel[20] + NET gpio_vtrip_sel[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 952140 4767550 ) N ; + - gpio_in[20] + NET gpio_in[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1016540 4767550 ) N ; + - gpio_analog_en[19] + NET gpio_analog_en[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1250160 4767550 ) N ; + - gpio_analog_pol[19] + NET gpio_analog_pol[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1243720 4767550 ) N ; + - gpio_analog_sel[19] + NET gpio_analog_sel[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1228540 4767550 ) N ; + - gpio_dm0[19] + NET gpio_dm0[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1246940 4767550 ) N ; + - gpio_dm1[19] + NET gpio_dm1[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1256140 4767550 ) N ; + - gpio_dm2[19] + NET gpio_dm2[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1225320 4767550 ) N ; + - gpio_holdover[19] + NET gpio_holdover[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1222100 4767550 ) N ; + - gpio_ib_mode_sel[19] + NET gpio_ib_mode_sel[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1206920 4767550 ) N ; + - gpio_inp_dis[19] + NET gpio_inp_dis[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1240960 4767550 ) N ; + - gpio_oeb[19] + NET gpio_oeb[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1203700 4767550 ) N ; + - gpio_out[19] + NET gpio_out[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1219340 4767550 ) N ; + - gpio_in[21] + NET gpio_in[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 759540 4767550 ) N ; + - gpio_analog_en[22] + NET gpio_analog_en[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 478160 4767550 ) N ; + - gpio_analog_pol[22] + NET gpio_analog_pol[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 471720 4767550 ) N ; + - gpio_analog_sel[22] + NET gpio_analog_sel[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 456540 4767550 ) N ; + - gpio_dm0[22] + NET gpio_dm0[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 474940 4767550 ) N ; + - gpio_dm1[22] + NET gpio_dm1[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 484140 4767550 ) N ; + - gpio_dm2[22] + NET gpio_dm2[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 453320 4767550 ) N ; + - gpio_holdover[22] + NET gpio_holdover[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 450100 4767550 ) N ; + - gpio_ib_mode_sel[22] + NET gpio_ib_mode_sel[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 434920 4767550 ) N ; + - gpio_inp_dis[22] + NET gpio_inp_dis[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 468960 4767550 ) N ; + - gpio_oeb[22] + NET gpio_oeb[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 431700 4767550 ) N ; + - gpio_out[22] + NET gpio_out[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 447340 4767550 ) N ; + - gpio_slow_sel[22] + NET gpio_slow_sel[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 493340 4767550 ) N ; + - gpio_vtrip_sel[22] + NET gpio_vtrip_sel[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 438140 4767550 ) N ; + - gpio_in[22] + NET gpio_in[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 502540 4767550 ) N ; + - gpio_analog_en[23] + NET gpio_analog_en[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 221160 4767550 ) N ; + - gpio_analog_pol[23] + NET gpio_analog_pol[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 214720 4767550 ) N ; + - gpio_analog_sel[23] + NET gpio_analog_sel[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 199540 4767550 ) N ; + - gpio_dm0[23] + NET gpio_dm0[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 217940 4767550 ) N ; + - gpio_dm1[23] + NET gpio_dm1[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 227140 4767550 ) N ; + - gpio_dm2[23] + NET gpio_dm2[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 196320 4767550 ) N ; + - gpio_holdover[23] + NET gpio_holdover[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 193100 4767550 ) N ; + - gpio_ib_mode_sel[23] + NET gpio_ib_mode_sel[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 177920 4767550 ) N ; + - gpio_inp_dis[23] + NET gpio_inp_dis[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 211960 4767550 ) N ; + - gpio_oeb[23] + NET gpio_oeb[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 174700 4767550 ) N ; + - gpio_out[23] + NET gpio_out[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 190340 4767550 ) N ; + - gpio_slow_sel[23] + NET gpio_slow_sel[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 236340 4767550 ) N ; + - gpio_vtrip_sel[23] + NET gpio_vtrip_sel[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 181140 4767550 ) N ; + - gpio_in[23] + NET gpio_in[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 245540 4767550 ) N ; + - gpio_analog_en[21] + NET gpio_analog_en[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 735160 4767550 ) N ; + - gpio_analog_pol[21] + NET gpio_analog_pol[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 728720 4767550 ) N ; + - gpio_analog_sel[21] + NET gpio_analog_sel[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 713540 4767550 ) N ; + - gpio_dm0[21] + NET gpio_dm0[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 731940 4767550 ) N ; + - gpio_dm1[21] + NET gpio_dm1[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 741140 4767550 ) N ; + - gpio_dm2[21] + NET gpio_dm2[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 710320 4767550 ) N ; + - gpio_holdover[21] + NET gpio_holdover[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 707100 4767550 ) N ; + - gpio_ib_mode_sel[21] + NET gpio_ib_mode_sel[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 691920 4767550 ) N ; + - gpio_inp_dis[21] + NET gpio_inp_dis[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 725960 4767550 ) N ; + - gpio_oeb[21] + NET gpio_oeb[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 688700 4767550 ) N ; + - gpio_out[21] + NET gpio_out[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 704340 4767550 ) N ; + - gpio_slow_sel[21] + NET gpio_slow_sel[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 750340 4767550 ) N ; + - gpio_vtrip_sel[21] + NET gpio_vtrip_sel[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 695140 4767550 ) N ; + - gpio_analog_pol[38] + NET gpio_analog_pol[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 756910 -920 ) N ; + - gpio_analog_en[38] + NET gpio_analog_en[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 750470 -920 ) N ; + - gpio_inp_dis[38] + NET gpio_inp_dis[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 759670 -920 ) N ; + - gpio_analog_sel[38] + NET gpio_analog_sel[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 772090 -920 ) N ; + - gpio_dm2[38] + NET gpio_dm2[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 775310 -920 ) N ; + - gpio_holdover[38] + NET gpio_holdover[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 778530 -920 ) N ; + - gpio_out[38] + NET gpio_out[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 781290 -920 ) N ; + - gpio_vtrip_sel[38] + NET gpio_vtrip_sel[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 790490 -920 ) N ; + - gpio_ib_mode_sel[38] + NET gpio_ib_mode_sel[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 793710 -920 ) N ; + - gpio_oeb[38] + NET gpio_oeb[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 796930 -920 ) N ; + - gpio_in[39] + NET gpio_in[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1269090 -920 ) N ; + - gpio_slow_sel[39] + NET gpio_slow_sel[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1278290 -920 ) N ; + - gpio_dm1[39] + NET gpio_dm1[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1287490 -920 ) N ; + - gpio_dm0[39] + NET gpio_dm0[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1296690 -920 ) N ; + - gpio_analog_pol[39] + NET gpio_analog_pol[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1299910 -920 ) N ; + - gpio_analog_en[39] + NET gpio_analog_en[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1293470 -920 ) N ; + - gpio_inp_dis[39] + NET gpio_inp_dis[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1302670 -920 ) N ; + - gpio_analog_sel[39] + NET gpio_analog_sel[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1315090 -920 ) N ; + - gpio_dm2[39] + NET gpio_dm2[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1318310 -920 ) N ; + - gpio_holdover[39] + NET gpio_holdover[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1321530 -920 ) N ; + - gpio_out[39] + NET gpio_out[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1324290 -920 ) N ; + - gpio_vtrip_sel[39] + NET gpio_vtrip_sel[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1333490 -920 ) N ; + - gpio_ib_mode_sel[39] + NET gpio_ib_mode_sel[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1336710 -920 ) N ; + - gpio_oeb[39] + NET gpio_oeb[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1339930 -920 ) N ; + - gpio_in[40] + NET gpio_in[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1543090 -920 ) N ; + - gpio_slow_sel[40] + NET gpio_slow_sel[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1552290 -920 ) N ; + - gpio_dm1[40] + NET gpio_dm1[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1561490 -920 ) N ; + - gpio_dm0[40] + NET gpio_dm0[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1570690 -920 ) N ; + - gpio_analog_pol[40] + NET gpio_analog_pol[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1573910 -920 ) N ; + - gpio_analog_en[40] + NET gpio_analog_en[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1567470 -920 ) N ; + - gpio_inp_dis[40] + NET gpio_inp_dis[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1576670 -920 ) N ; + - gpio_analog_sel[40] + NET gpio_analog_sel[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1589090 -920 ) N ; + - gpio_dm2[40] + NET gpio_dm2[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1592310 -920 ) N ; + - gpio_holdover[40] + NET gpio_holdover[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1595530 -920 ) N ; + - gpio_out[40] + NET gpio_out[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1598290 -920 ) N ; + - gpio_vtrip_sel[40] + NET gpio_vtrip_sel[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1607490 -920 ) N ; + - gpio_ib_mode_sel[40] + NET gpio_ib_mode_sel[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1610710 -920 ) N ; + - gpio_oeb[40] + NET gpio_oeb[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1613930 -920 ) N ; + - gpio_in[41] + NET gpio_in[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1817090 -920 ) N ; + - gpio_slow_sel[41] + NET gpio_slow_sel[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1826290 -920 ) N ; + - gpio_dm1[41] + NET gpio_dm1[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1835490 -920 ) N ; + - gpio_dm0[41] + NET gpio_dm0[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1844690 -920 ) N ; + - gpio_analog_pol[41] + NET gpio_analog_pol[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1847910 -920 ) N ; + - gpio_analog_en[41] + NET gpio_analog_en[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1841470 -920 ) N ; + - gpio_inp_dis[41] + NET gpio_inp_dis[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1850670 -920 ) N ; + - gpio_analog_sel[41] + NET gpio_analog_sel[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1863090 -920 ) N ; + - gpio_dm2[41] + NET gpio_dm2[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1866310 -920 ) N ; + - gpio_holdover[41] + NET gpio_holdover[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1869530 -920 ) N ; + - gpio_out[41] + NET gpio_out[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1872290 -920 ) N ; + - gpio_vtrip_sel[41] + NET gpio_vtrip_sel[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1881490 -920 ) N ; + - gpio_ib_mode_sel[41] + NET gpio_ib_mode_sel[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1884710 -920 ) N ; + - gpio_oeb[41] + NET gpio_oeb[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1887930 -920 ) N ; + - gpio_in[42] + NET gpio_in[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2091090 -920 ) N ; + - gpio_slow_sel[42] + NET gpio_slow_sel[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2100290 -920 ) N ; + - gpio_dm1[42] + NET gpio_dm1[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2109490 -920 ) N ; + - gpio_dm0[42] + NET gpio_dm0[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2118690 -920 ) N ; + - gpio_analog_pol[42] + NET gpio_analog_pol[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2121910 -920 ) N ; + - gpio_analog_en[42] + NET gpio_analog_en[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2115470 -920 ) N ; + - gpio_inp_dis[42] + NET gpio_inp_dis[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2124670 -920 ) N ; + - gpio_analog_sel[42] + NET gpio_analog_sel[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2137090 -920 ) N ; + - gpio_dm2[42] + NET gpio_dm2[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2140310 -920 ) N ; + - gpio_holdover[42] + NET gpio_holdover[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2143530 -920 ) N ; + - gpio_out[42] + NET gpio_out[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2146290 -920 ) N ; + - gpio_vtrip_sel[42] + NET gpio_vtrip_sel[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2155490 -920 ) N ; + - gpio_ib_mode_sel[42] + NET gpio_ib_mode_sel[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2158710 -920 ) N ; + - gpio_oeb[42] + NET gpio_oeb[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2161930 -920 ) N ; + - gpio_in[43] + NET gpio_in[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2365090 -920 ) N ; + - gpio_slow_sel[43] + NET gpio_slow_sel[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2374290 -920 ) N ; + - gpio_dm1[43] + NET gpio_dm1[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2383490 -920 ) N ; + - gpio_dm0[43] + NET gpio_dm0[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2392690 -920 ) N ; + - gpio_analog_pol[43] + NET gpio_analog_pol[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2395910 -920 ) N ; + - gpio_analog_en[43] + NET gpio_analog_en[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2389470 -920 ) N ; + - gpio_inp_dis[43] + NET gpio_inp_dis[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2398670 -920 ) N ; + - gpio_analog_sel[43] + NET gpio_analog_sel[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2411090 -920 ) N ; + - gpio_dm2[43] + NET gpio_dm2[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2414310 -920 ) N ; + - gpio_holdover[43] + NET gpio_holdover[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2417530 -920 ) N ; + - gpio_out[43] + NET gpio_out[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2420290 -920 ) N ; + - gpio_ib_mode_sel[43] + NET gpio_ib_mode_sel[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2432710 -920 ) N ; + - gpio_oeb[43] + NET gpio_oeb[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2435930 -920 ) N ; + - gpio_in_h[15] + NET gpio_in_h[15] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2920940 4767550 ) N ; + - gpio_in_h[16] + NET gpio_in_h[16] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2411940 4767550 ) N ; + - gpio_in_h[17] + NET gpio_in_h[17] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2154940 4767550 ) N ; + - gpio_in_h[18] + NET gpio_in_h[18] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1709940 4767550 ) N ; + - gpio_in_h[19] + NET gpio_in_h[19] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1200940 4767550 ) N ; + - gpio_in_h[20] + NET gpio_in_h[20] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 942940 4767550 ) N ; + - gpio_in_h[21] + NET gpio_in_h[21] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 685940 4767550 ) N ; + - gpio_in_h[22] + NET gpio_in_h[22] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 428940 4767550 ) N ; + - gpio_in_h[23] + NET gpio_in_h[23] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 171940 4767550 ) N ; + - gpio_in_h[38] + NET gpio_in_h[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 799690 -920 ) N ; + - gpio_in_h[39] + NET gpio_in_h[39] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1342690 -920 ) N ; + - gpio_in_h[40] + NET gpio_in_h[40] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1616690 -920 ) N ; + - gpio_in_h[41] + NET gpio_in_h[41] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1890690 -920 ) N ; + - gpio_in_h[42] + NET gpio_in_h[42] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2164690 -920 ) N ; + - gpio_in_h[43] + NET gpio_in_h[43] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2438690 -920 ) N ; + - vccd1 + NET vccd1 + + PORT + + LAYER met3 ( -1250 -11655 ) ( 1250 11655 ) + PLACED ( 3167600 2125705 ) N ; + - vdda1 + NET vdda1 + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 3943870 ) N ; + - vdda1 + NET vdda1 + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 2370870 ) N ; + - vssa1 + NET vssa1 + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 1929870 ) N ; + - vssa1 + NET vssa1 + + PORT + + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2679760 4767600 ) N ; + - vssio + NET vssio + + PORT + + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 1468760 4767600 ) N ; + - vccd2 + NET vccd2 + + PORT + + LAYER met3 ( -1250 -11975 ) ( 1250 11975 ) + PLACED ( -970 4412045 ) N ; + - vddio + NET vddio + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 4150760 ) N ; + - vssa2 + NET vssa2 + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 3939760 ) N ; + - vdda2 + NET vdda2 + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 2216760 ) N ; + - vddio + NET vddio + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 352760 ) N ; + - vssio + NET vssio + + PORT + + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2696870 -970 ) N ; + - vdda + NET vdda + + PORT + + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2965870 -970 ) N ; + - analog_noesd_io[8] + NET analog_noesd_io[8] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 2780710 ) N ; + - gpio_loopback_one[24] + NET gpio_loopback_one[24] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 4533370 ) N ; + - gpio_loopback_one[25] + NET gpio_loopback_one[25] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3683370 ) N ; + - gpio_loopback_one[26] + NET gpio_loopback_one[26] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3468370 ) N ; + - gpio_loopback_one[27] + NET gpio_loopback_one[27] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3253370 ) N ; + - gpio_loopback_one[28] + NET gpio_loopback_one[28] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3038370 ) N ; + - gpio_loopback_one[29] + NET gpio_loopback_one[29] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2823370 ) N ; + - gpio_loopback_one[30] + NET gpio_loopback_one[30] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2608370 ) N ; + - gpio_loopback_one[31] + NET gpio_loopback_one[31] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2393370 ) N ; + - gpio_loopback_one[32] + NET gpio_loopback_one[32] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1748370 ) N ; + - gpio_loopback_one[33] + NET gpio_loopback_one[33] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1533370 ) N ; + - gpio_loopback_one[34] + NET gpio_loopback_one[34] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1318370 ) N ; + - gpio_loopback_one[35] + NET gpio_loopback_one[35] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1103370 ) N ; + - gpio_loopback_one[36] + NET gpio_loopback_one[36] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 888370 ) N ; + - gpio_loopback_one[37] + NET gpio_loopback_one[37] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 673370 ) N ; + - gpio_loopback_one[43] + NET gpio_loopback_one[43] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 2442030 -510 ) N ; + - gpio_loopback_zero[43] + NET gpio_loopback_zero[43] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 2463305 -510 ) N ; + - gpio_loopback_one[42] + NET gpio_loopback_one[42] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 2168030 -510 ) N ; + - gpio_loopback_zero[42] + NET gpio_loopback_zero[42] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 2189020 -510 ) N ; + - gpio_loopback_one[41] + NET gpio_loopback_one[41] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1894030 -510 ) N ; + - gpio_loopback_zero[41] + NET gpio_loopback_zero[41] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1915020 -510 ) N ; + - gpio_loopback_one[40] + NET gpio_loopback_one[40] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1620030 -510 ) N ; + - gpio_loopback_zero[40] + NET gpio_loopback_zero[40] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1640955 -620 ) N ; + - gpio_loopback_one[39] + NET gpio_loopback_one[39] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1346030 -510 ) N ; + - gpio_loopback_zero[39] + NET gpio_loopback_zero[39] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1366930 -510 ) N ; + - gpio_loopback_one[38] + NET gpio_loopback_one[38] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 803030 -510 ) N ; + - gpio_loopback_zero[38] + NET gpio_loopback_zero[38] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 819085 -505 ) N ; + - resetb_l + NET resetb_l + + PORT + + LAYER met2 ( -140 -430 ) ( 140 430 ) + PLACED ( 550960 -150 ) N ; + - resetb_h + NET resetb_h + + PORT + + LAYER met2 ( -165 -365 ) ( 165 365 ) + PLACED ( 498020 -85 ) N ; + - por_l + NET por_l + + PORT + + LAYER met3 ( -850 -175 ) ( 850 175 ) + PLACED ( -570 267035 ) N ; + - porb_l + NET porb_l + + PORT + + LAYER met3 ( -850 -175 ) ( 850 175 ) + PLACED ( -570 268150 ) N ; + - mask_rev[0] + NET mask_rev[0] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3025540 -510 ) N ; + - porb_h + NET porb_h + + PORT + + LAYER met3 ( -850 -175 ) ( 850 175 ) + PLACED ( -570 265910 ) N ; + - gpio_loopback_one[15] + NET gpio_loopback_one[15] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2891640 4767490 ) N ; + - gpio_loopback_one[16] + NET gpio_loopback_one[16] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2394640 4767490 ) N ; + - gpio_loopback_one[17] + NET gpio_loopback_one[17] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2138640 4767490 ) N ; + - gpio_loopback_one[18] + NET gpio_loopback_one[18] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 1693640 4767490 ) N ; + - gpio_loopback_one[19] + NET gpio_loopback_one[19] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 1171640 4767490 ) N ; + - gpio_loopback_one[20] + NET gpio_loopback_one[20] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 915640 4767490 ) N ; + - gpio_loopback_one[21] + NET gpio_loopback_one[21] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 659640 4767490 ) N ; + - gpio_loopback_one[22] + NET gpio_loopback_one[22] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 403640 4767490 ) N ; + - gpio_loopback_one[23] + NET gpio_loopback_one[23] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 147640 4767490 ) N ; + - gpio_loopback_one[7] + NET gpio_loopback_one[7] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 2615180 ) N ; + - gpio_loopback_one[6] + NET gpio_loopback_one[6] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1730180 ) N ; + - gpio_loopback_one[5] + NET gpio_loopback_one[5] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1505180 ) N ; + - gpio_loopback_one[4] + NET gpio_loopback_one[4] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1280180 ) N ; + - gpio_loopback_one[3] + NET gpio_loopback_one[3] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1055180 ) N ; + - gpio_loopback_one[2] + NET gpio_loopback_one[2] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 830180 ) N ; + - gpio_loopback_one[1] + NET gpio_loopback_one[1] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 605180 ) N ; + - gpio_loopback_one[0] + NET gpio_loopback_one[0] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 380180 ) N ; + - mask_rev[4] + NET mask_rev[4] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3030020 -510 ) N ; + - mask_rev[5] + NET mask_rev[5] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3031140 -510 ) N ; + - mask_rev[6] + NET mask_rev[6] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3032260 -510 ) N ; + - mask_rev[7] + NET mask_rev[7] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3033380 -510 ) N ; + - mask_rev[8] + NET mask_rev[8] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3034500 -510 ) N ; + - mask_rev[9] + NET mask_rev[9] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3035620 -510 ) N ; + - mask_rev[10] + NET mask_rev[10] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3036740 -510 ) N ; + - mask_rev[11] + NET mask_rev[11] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3037860 -510 ) N ; + - mask_rev[12] + NET mask_rev[12] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3038980 -510 ) N ; + - mask_rev[13] + NET mask_rev[13] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3040100 -510 ) N ; + - mask_rev[14] + NET mask_rev[14] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3041220 -510 ) N ; + - mask_rev[15] + NET mask_rev[15] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3042340 -510 ) N ; + - mask_rev[16] + NET mask_rev[16] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3043460 -510 ) N ; + - mask_rev[17] + NET mask_rev[17] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3044580 -510 ) N ; + - mask_rev[18] + NET mask_rev[18] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3045700 -510 ) N ; + - mask_rev[19] + NET mask_rev[19] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3046820 -510 ) N ; + - mask_rev[20] + NET mask_rev[20] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3047940 -510 ) N ; + - mask_rev[21] + NET mask_rev[21] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3049060 -510 ) N ; + - mask_rev[22] + NET mask_rev[22] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3050180 -510 ) N ; + - mask_rev[23] + NET mask_rev[23] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3051300 -510 ) N ; + - mask_rev[24] + NET mask_rev[24] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3052420 -510 ) N ; + - mask_rev[25] + NET mask_rev[25] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3053540 -510 ) N ; + - mask_rev[26] + NET mask_rev[26] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3054660 -510 ) N ; + - mask_rev[27] + NET mask_rev[27] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3055780 -510 ) N ; + - mask_rev[28] + NET mask_rev[28] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3056900 -510 ) N ; + - mask_rev[29] + NET mask_rev[29] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3058020 -510 ) N ; + - mask_rev[30] + NET mask_rev[30] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3059140 -510 ) N ; + - mask_rev[31] + NET mask_rev[31] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3060260 -510 ) N ; + - mask_rev[3] + NET mask_rev[3] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3028900 -510 ) N ; + - mask_rev[2] + NET mask_rev[2] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3027780 -510 ) N ; + - mask_rev[1] + NET mask_rev[1] + + PORT + + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3026660 -510 ) N ; + - gpio_loopback_zero[25] + NET gpio_loopback_zero[25] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3673370 ) N ; + - gpio_loopback_zero[27] + NET gpio_loopback_zero[27] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3243370 ) N ; + - gpio_loopback_zero[29] + NET gpio_loopback_zero[29] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2813370 ) N ; + - gpio_loopback_zero[31] + NET gpio_loopback_zero[31] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2383370 ) N ; + - gpio_loopback_zero[33] + NET gpio_loopback_zero[33] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1523370 ) N ; + - gpio_loopback_zero[35] + NET gpio_loopback_zero[35] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1093370 ) N ; + - gpio_loopback_zero[37] + NET gpio_loopback_zero[37] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 663370 ) N ; + - gpio_loopback_zero[24] + NET gpio_loopback_zero[24] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 4523370 ) N ; + - gpio_loopback_zero[26] + NET gpio_loopback_zero[26] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3458370 ) N ; + - gpio_loopback_zero[28] + NET gpio_loopback_zero[28] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3028370 ) N ; + - gpio_loopback_zero[30] + NET gpio_loopback_zero[30] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2598370 ) N ; + - gpio_loopback_zero[32] + NET gpio_loopback_zero[32] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1738370 ) N ; + - gpio_loopback_zero[34] + NET gpio_loopback_zero[34] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1308370 ) N ; + - gpio_loopback_zero[36] + NET gpio_loopback_zero[36] + + PORT + + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 878370 ) N ; + - gpio_loopback_zero[23] + NET gpio_loopback_zero[23] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 137635 4767490 ) N ; + - gpio_loopback_zero[22] + NET gpio_loopback_zero[22] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 393635 4767490 ) N ; + - gpio_loopback_zero[21] + NET gpio_loopback_zero[21] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 649635 4767490 ) N ; + - gpio_loopback_zero[20] + NET gpio_loopback_zero[20] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 905635 4767490 ) N ; + - gpio_loopback_zero[19] + NET gpio_loopback_zero[19] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 1161635 4767490 ) N ; + - gpio_loopback_zero[18] + NET gpio_loopback_zero[18] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 1683635 4767490 ) N ; + - gpio_loopback_zero[17] + NET gpio_loopback_zero[17] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2128635 4767490 ) N ; + - gpio_loopback_zero[16] + NET gpio_loopback_zero[16] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2384635 4767490 ) N ; + - gpio_loopback_zero[15] + NET gpio_loopback_zero[15] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2881635 4767490 ) N ; + - gpio_slow_sel[38] + NET gpio_slow_sel[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 735290 -920 ) N ; + - gpio_in[38] + NET gpio_in[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 726090 -920 ) N ; + - vssa + NET vssa + + PORT + + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 245870 -970 ) N ; + - analog_io[0] + NET analog_io[0] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 306510 ) N ; + - analog_noesd_io[0] + NET analog_noesd_io[0] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 315710 ) N ; + - analog_noesd_io[1] + NET analog_noesd_io[1] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 541710 ) N ; + - analog_io[1] + NET analog_io[1] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 532510 ) N ; + - analog_io[2] + NET analog_io[2] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 757510 ) N ; + - analog_noesd_io[2] + NET analog_noesd_io[2] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 766710 ) N ; + - analog_io[3] + NET analog_io[3] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 983510 ) N ; + - analog_noesd_io[3] + NET analog_noesd_io[3] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 992710 ) N ; + - analog_io[4] + NET analog_io[4] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 1208510 ) N ; + - analog_noesd_io[4] + NET analog_noesd_io[4] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 1217710 ) N ; + - analog_io[5] + NET analog_io[5] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 1433510 ) N ; + - analog_noesd_io[5] + NET analog_noesd_io[5] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 1442710 ) N ; + - analog_io[6] + NET analog_io[6] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 1659510 ) N ; + - analog_noesd_io[6] + NET analog_noesd_io[6] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 1668710 ) N ; + - analog_io[7] + NET analog_io[7] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 2545510 ) N ; + - analog_noesd_io[7] + NET analog_noesd_io[7] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 2554710 ) N ; + - analog_io[8] + NET analog_io[8] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 2771510 ) N ; + - analog_io[9] + NET analog_io[9] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 2996510 ) N ; + - analog_noesd_io[9] + NET analog_noesd_io[9] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 3005710 ) N ; + - analog_io[10] + NET analog_io[10] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 3222510 ) N ; + - analog_noesd_io[10] + NET analog_noesd_io[10] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 3231710 ) N ; + - analog_io[11] + NET analog_io[11] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 3447510 ) N ; + - analog_noesd_io[11] + NET analog_noesd_io[11] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 3456710 ) N ; + - analog_io[12] + NET analog_io[12] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 3672510 ) N ; + - analog_io[13] + NET analog_io[13] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 4118510 ) N ; + - analog_io[14] + NET analog_io[14] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 4564510 ) N ; + - analog_noesd_io[12] + NET analog_noesd_io[12] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 3681710 ) N ; + - analog_noesd_io[13] + NET analog_noesd_io[13] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 4127710 ) N ; + - analog_noesd_io[14] + NET analog_noesd_io[14] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 4573710 ) N ; + - analog_io[15] + NET analog_io[15] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 2982120 4767550 ) N ; + - analog_io[16] + NET analog_io[16] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 2473120 4767550 ) N ; + - analog_io[17] + NET analog_io[17] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 2216120 4767550 ) N ; + - analog_io[18] + NET analog_io[18] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1771120 4767550 ) N ; + - analog_io[19] + NET analog_io[19] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1262120 4767550 ) N ; + - analog_io[20] + NET analog_io[20] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1004120 4767550 ) N ; + - analog_io[21] + NET analog_io[21] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 747120 4767550 ) N ; + - analog_io[22] + NET analog_io[22] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 490120 4767550 ) N ; + - analog_io[23] + NET analog_io[23] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 233120 4767550 ) N ; + - analog_noesd_io[15] + NET analog_noesd_io[15] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 2972920 4767550 ) N ; + - analog_noesd_io[16] + NET analog_noesd_io[16] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 2463920 4767550 ) N ; + - analog_noesd_io[17] + NET analog_noesd_io[17] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 2206920 4767550 ) N ; + - analog_noesd_io[18] + NET analog_noesd_io[18] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 1761920 4767550 ) N ; + - analog_noesd_io[19] + NET analog_noesd_io[19] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 1252920 4767550 ) N ; + - analog_noesd_io[20] + NET analog_noesd_io[20] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 994920 4767550 ) N ; + - analog_noesd_io[21] + NET analog_noesd_io[21] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 737920 4767550 ) N ; + - analog_noesd_io[22] + NET analog_noesd_io[22] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 480920 4767550 ) N ; + - analog_noesd_io[23] + NET analog_noesd_io[23] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 223920 4767550 ) N ; + - analog_io[25] + NET analog_io[25] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 3774120 ) N ; + - analog_io[26] + NET analog_io[26] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 3558120 ) N ; + - analog_io[27] + NET analog_io[27] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 3342120 ) N ; + - analog_io[28] + NET analog_io[28] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 3126120 ) N ; + - analog_io[29] + NET analog_io[29] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 2910120 ) N ; + - analog_io[30] + NET analog_io[30] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 2694120 ) N ; + - analog_io[31] + NET analog_io[31] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 2478120 ) N ; + - analog_io[32] + NET analog_io[32] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 1840120 ) N ; + - analog_io[33] + NET analog_io[33] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 1624120 ) N ; + - analog_io[34] + NET analog_io[34] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 1408120 ) N ; + - analog_io[35] + NET analog_io[35] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 1192120 ) N ; + - analog_io[36] + NET analog_io[36] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 976120 ) N ; + - analog_io[37] + NET analog_io[37] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 760120 ) N ; + - analog_noesd_io[25] + NET analog_noesd_io[25] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 3764920 ) N ; + - analog_noesd_io[26] + NET analog_noesd_io[26] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 3548920 ) N ; + - analog_noesd_io[27] + NET analog_noesd_io[27] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 3332920 ) N ; + - analog_noesd_io[28] + NET analog_noesd_io[28] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 3116920 ) N ; + - analog_noesd_io[29] + NET analog_noesd_io[29] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 2900920 ) N ; + - analog_noesd_io[30] + NET analog_noesd_io[30] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 2684920 ) N ; + - analog_noesd_io[32] + NET analog_noesd_io[32] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 1830920 ) N ; + - analog_noesd_io[33] + NET analog_noesd_io[33] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 1614920 ) N ; + - analog_noesd_io[34] + NET analog_noesd_io[34] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 1398920 ) N ; + - analog_noesd_io[35] + NET analog_noesd_io[35] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 1182920 ) N ; + - analog_noesd_io[36] + NET analog_noesd_io[36] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 966920 ) N ; + - analog_noesd_io[37] + NET analog_noesd_io[37] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 750920 ) N ; + - analog_io[39] + NET analog_io[39] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1281510 -920 ) N ; + - analog_io[40] + NET analog_io[40] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1555510 -920 ) N ; + - analog_io[41] + NET analog_io[41] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1829510 -920 ) N ; + - analog_io[42] + NET analog_io[42] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 2103510 -920 ) N ; + - analog_io[43] + NET analog_io[43] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 2377510 -920 ) N ; + - analog_noesd_io[39] + NET analog_noesd_io[39] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 1290710 -920 ) N ; + - analog_noesd_io[40] + NET analog_noesd_io[40] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 1564710 -920 ) N ; + - analog_noesd_io[41] + NET analog_noesd_io[41] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 1838710 -920 ) N ; + - analog_noesd_io[42] + NET analog_noesd_io[42] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 2112710 -920 ) N ; + - analog_noesd_io[43] + NET analog_noesd_io[43] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 2386710 -920 ) N ; + - analog_noesd_io[38] + NET analog_noesd_io[38] + + PORT + + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 747710 -920 ) N ; + - analog_io[38] + NET analog_io[38] + + PORT + + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 738510 -920 ) N ; + - gpio_dm1[38] + NET gpio_dm1[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 744490 -920 ) N ; + - gpio_dm0[38] + NET gpio_dm0[38] + + PORT + + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 753690 -920 ) N ; + - analog_noesd_io[31] + NET analog_noesd_io[31] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 2468920 ) N ; + - vssa1 + NET vssa1 + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 1879980 ) N ; + - vssd1 + NET vssd1 + + PORT + + LAYER met3 ( -1250 -11975 ) ( 1250 11975 ) + PLACED ( 3167600 2100585 ) N ; + - vssd1 + NET vssd1 + + PORT + + LAYER met3 ( -1250 -12000 ) ( 1250 12000 ) + PLACED ( 3167600 2150810 ) N ; + - vdda1 + NET vdda1 + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 2320970 ) N ; + - gpio_loopback_one[8] + NET gpio_loopback_one[8] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 2840185 ) N ; + - gpio_loopback_one[9] + NET gpio_loopback_one[9] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3065185 ) N ; + - gpio_loopback_one[10] + NET gpio_loopback_one[10] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3290185 ) N ; + - gpio_loopback_one[11] + NET gpio_loopback_one[11] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3515185 ) N ; + - gpio_loopback_one[12] + NET gpio_loopback_one[12] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3740185 ) N ; + - vdda1 + NET vdda1 + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 3893980 ) N ; + - gpio_loopback_one[13] + NET gpio_loopback_one[13] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 4185185 ) N ; + - gpio_loopback_one[14] + NET gpio_loopback_one[14] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 4635185 ) N ; + - vssa1 + NET vssa1 + + PORT + + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2729660 4767600 ) N ; + - vssio + NET vssio + + PORT + + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 1518660 4767600 ) N ; + - vssd2 + NET vssd2 + + PORT + + LAYER met3 ( -1250 -11655 ) ( 1250 11655 ) + PLACED ( -970 4386925 ) N ; + - vccd2 + NET vccd2 + + PORT + + LAYER met3 ( -1250 -12000 ) ( 1250 12000 ) + PLACED ( -970 4361820 ) N ; + - vddio + NET vddio + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 4200660 ) N ; + - vssa2 + NET vssa2 + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 3989660 ) N ; + - gpio_in[25] + NET gpio_in[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3786535 ) N ; + - gpio_slow_sel[25] + NET gpio_slow_sel[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3777335 ) N ; + - gpio_dm1[25] + NET gpio_dm1[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3768135 ) N ; + - gpio_analog_en[25] + NET gpio_analog_en[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3762155 ) N ; + - gpio_dm0[25] + NET gpio_dm0[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3758935 ) N ; + - gpio_analog_pol[25] + NET gpio_analog_pol[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3755715 ) N ; + - gpio_inp_dis[25] + NET gpio_inp_dis[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3752955 ) N ; + - gpio_analog_sel[25] + NET gpio_analog_sel[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3740535 ) N ; + - gpio_dm2[25] + NET gpio_dm2[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3737315 ) N ; + - gpio_holdover[25] + NET gpio_holdover[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3734095 ) N ; + - gpio_out[25] + NET gpio_out[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3731335 ) N ; + - gpio_vtrip_sel[25] + NET gpio_vtrip_sel[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3722135 ) N ; + - gpio_ib_mode_sel[25] + NET gpio_ib_mode_sel[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3718915 ) N ; + - gpio_oeb[25] + NET gpio_oeb[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3715695 ) N ; + - gpio_in_h[25] + NET gpio_in_h[25] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3712935 ) N ; + - gpio_in[26] + NET gpio_in[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3570535 ) N ; + - gpio_slow_sel[26] + NET gpio_slow_sel[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3561335 ) N ; + - gpio_dm1[26] + NET gpio_dm1[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3552135 ) N ; + - gpio_analog_en[26] + NET gpio_analog_en[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3546155 ) N ; + - gpio_dm0[26] + NET gpio_dm0[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3542935 ) N ; + - gpio_analog_pol[26] + NET gpio_analog_pol[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3539715 ) N ; + - gpio_inp_dis[26] + NET gpio_inp_dis[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3536955 ) N ; + - gpio_analog_sel[26] + NET gpio_analog_sel[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3524535 ) N ; + - gpio_dm2[26] + NET gpio_dm2[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3521315 ) N ; + - gpio_holdover[26] + NET gpio_holdover[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3518095 ) N ; + - gpio_out[26] + NET gpio_out[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3515335 ) N ; + - gpio_vtrip_sel[26] + NET gpio_vtrip_sel[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3506135 ) N ; + - gpio_ib_mode_sel[26] + NET gpio_ib_mode_sel[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3502915 ) N ; + - gpio_oeb[26] + NET gpio_oeb[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3499695 ) N ; + - gpio_in_h[26] + NET gpio_in_h[26] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3496935 ) N ; + - gpio_vtrip_sel[37] + NET gpio_vtrip_sel[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 708135 ) N ; + - gpio_analog_en[37] + NET gpio_analog_en[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 748155 ) N ; + - gpio_analog_pol[37] + NET gpio_analog_pol[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 741715 ) N ; + - gpio_analog_sel[37] + NET gpio_analog_sel[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 726535 ) N ; + - gpio_dm0[37] + NET gpio_dm0[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 744935 ) N ; + - gpio_dm2[37] + NET gpio_dm2[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 723315 ) N ; + - gpio_holdover[37] + NET gpio_holdover[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 720095 ) N ; + - gpio_ib_mode_sel[37] + NET gpio_ib_mode_sel[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 704915 ) N ; + - gpio_oeb[37] + NET gpio_oeb[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 701695 ) N ; + - gpio_out[37] + NET gpio_out[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 717335 ) N ; + - gpio_inp_dis[37] + NET gpio_inp_dis[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 738955 ) N ; + - gpio_in_h[37] + NET gpio_in_h[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 698935 ) N ; + - gpio_dm1[37] + NET gpio_dm1[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 754135 ) N ; + - gpio_slow_sel[37] + NET gpio_slow_sel[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 763335 ) N ; + - gpio_in[37] + NET gpio_in[37] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 772535 ) N ; + - gpio_dm2[36] + NET gpio_dm2[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 939315 ) N ; + - gpio_holdover[36] + NET gpio_holdover[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 936095 ) N ; + - gpio_ib_mode_sel[36] + NET gpio_ib_mode_sel[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 920915 ) N ; + - gpio_inp_dis[36] + NET gpio_inp_dis[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 954955 ) N ; + - gpio_oeb[36] + NET gpio_oeb[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 917695 ) N ; + - gpio_out[36] + NET gpio_out[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 933335 ) N ; + - gpio_vtrip_sel[36] + NET gpio_vtrip_sel[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 924135 ) N ; + - gpio_analog_en[36] + NET gpio_analog_en[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 964155 ) N ; + - gpio_analog_pol[36] + NET gpio_analog_pol[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 957715 ) N ; + - gpio_analog_sel[36] + NET gpio_analog_sel[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 942535 ) N ; + - gpio_dm0[36] + NET gpio_dm0[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 960935 ) N ; + - gpio_in_h[36] + NET gpio_in_h[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 914935 ) N ; + - gpio_dm1[36] + NET gpio_dm1[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 970135 ) N ; + - gpio_slow_sel[36] + NET gpio_slow_sel[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 979335 ) N ; + - gpio_in[36] + NET gpio_in[36] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 988535 ) N ; + - gpio_analog_en[35] + NET gpio_analog_en[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1180155 ) N ; + - gpio_analog_pol[35] + NET gpio_analog_pol[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1173715 ) N ; + - gpio_analog_sel[35] + NET gpio_analog_sel[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1158535 ) N ; + - gpio_dm0[35] + NET gpio_dm0[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1176935 ) N ; + - gpio_dm2[35] + NET gpio_dm2[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1155315 ) N ; + - gpio_holdover[35] + NET gpio_holdover[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1152095 ) N ; + - gpio_ib_mode_sel[35] + NET gpio_ib_mode_sel[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1136915 ) N ; + - gpio_inp_dis[35] + NET gpio_inp_dis[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1170955 ) N ; + - gpio_oeb[35] + NET gpio_oeb[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1133695 ) N ; + - gpio_out[35] + NET gpio_out[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1149335 ) N ; + - gpio_vtrip_sel[35] + NET gpio_vtrip_sel[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1140135 ) N ; + - gpio_in_h[35] + NET gpio_in_h[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1130935 ) N ; + - gpio_dm1[35] + NET gpio_dm1[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1186135 ) N ; + - gpio_slow_sel[35] + NET gpio_slow_sel[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1195335 ) N ; + - gpio_in[35] + NET gpio_in[35] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1204535 ) N ; + - gpio_analog_en[34] + NET gpio_analog_en[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1396155 ) N ; + - gpio_analog_pol[34] + NET gpio_analog_pol[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1389715 ) N ; + - gpio_analog_sel[34] + NET gpio_analog_sel[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1374535 ) N ; + - gpio_dm0[34] + NET gpio_dm0[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1392935 ) N ; + - gpio_dm2[34] + NET gpio_dm2[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1371315 ) N ; + - gpio_holdover[34] + NET gpio_holdover[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1368095 ) N ; + - gpio_ib_mode_sel[34] + NET gpio_ib_mode_sel[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1352915 ) N ; + - gpio_inp_dis[34] + NET gpio_inp_dis[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1386955 ) N ; + - gpio_oeb[34] + NET gpio_oeb[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1349695 ) N ; + - gpio_out[34] + NET gpio_out[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1365335 ) N ; + - gpio_vtrip_sel[34] + NET gpio_vtrip_sel[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1356135 ) N ; + - gpio_in_h[34] + NET gpio_in_h[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1346935 ) N ; + - gpio_dm1[34] + NET gpio_dm1[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1402135 ) N ; + - gpio_slow_sel[34] + NET gpio_slow_sel[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1411335 ) N ; + - gpio_in[34] + NET gpio_in[34] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1420535 ) N ; + - gpio_analog_en[33] + NET gpio_analog_en[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1612155 ) N ; + - gpio_analog_sel[33] + NET gpio_analog_sel[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1590535 ) N ; + - gpio_dm2[33] + NET gpio_dm2[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1587315 ) N ; + - gpio_dm0[33] + NET gpio_dm0[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1608935 ) N ; + - gpio_holdover[33] + NET gpio_holdover[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1584095 ) N ; + - gpio_ib_mode_sel[33] + NET gpio_ib_mode_sel[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1568915 ) N ; + - gpio_inp_dis[33] + NET gpio_inp_dis[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1602955 ) N ; + - gpio_oeb[33] + NET gpio_oeb[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1565695 ) N ; + - gpio_out[33] + NET gpio_out[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1581335 ) N ; + - gpio_vtrip_sel[33] + NET gpio_vtrip_sel[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1572135 ) N ; + - gpio_in_h[33] + NET gpio_in_h[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1562935 ) N ; + - gpio_analog_pol[33] + NET gpio_analog_pol[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1605715 ) N ; + - gpio_dm1[33] + NET gpio_dm1[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1618135 ) N ; + - gpio_slow_sel[33] + NET gpio_slow_sel[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1627335 ) N ; + - gpio_in[33] + NET gpio_in[33] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1636535 ) N ; + - gpio_analog_en[32] + NET gpio_analog_en[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1828155 ) N ; + - gpio_analog_pol[32] + NET gpio_analog_pol[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1821715 ) N ; + - gpio_analog_sel[32] + NET gpio_analog_sel[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1806535 ) N ; + - gpio_dm0[32] + NET gpio_dm0[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1824935 ) N ; + - gpio_dm2[32] + NET gpio_dm2[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1803315 ) N ; + - gpio_holdover[32] + NET gpio_holdover[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1800095 ) N ; + - gpio_ib_mode_sel[32] + NET gpio_ib_mode_sel[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1784915 ) N ; + - gpio_inp_dis[32] + NET gpio_inp_dis[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1818955 ) N ; + - gpio_oeb[32] + NET gpio_oeb[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1781695 ) N ; + - gpio_out[32] + NET gpio_out[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1797335 ) N ; + - gpio_vtrip_sel[32] + NET gpio_vtrip_sel[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1788135 ) N ; + - gpio_in_h[32] + NET gpio_in_h[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1778935 ) N ; + - gpio_dm1[32] + NET gpio_dm1[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1834135 ) N ; + - gpio_slow_sel[32] + NET gpio_slow_sel[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1843335 ) N ; + - gpio_in[32] + NET gpio_in[32] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1852535 ) N ; + - gpio_analog_en[31] + NET gpio_analog_en[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2466155 ) N ; + - gpio_analog_pol[31] + NET gpio_analog_pol[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2459715 ) N ; + - gpio_analog_sel[31] + NET gpio_analog_sel[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2444535 ) N ; + - gpio_dm0[31] + NET gpio_dm0[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2462935 ) N ; + - gpio_dm2[31] + NET gpio_dm2[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2441315 ) N ; + - gpio_holdover[31] + NET gpio_holdover[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2438095 ) N ; + - gpio_ib_mode_sel[31] + NET gpio_ib_mode_sel[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2422915 ) N ; + - gpio_inp_dis[31] + NET gpio_inp_dis[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2456955 ) N ; + - gpio_oeb[31] + NET gpio_oeb[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2419695 ) N ; + - gpio_out[31] + NET gpio_out[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2435335 ) N ; + - gpio_vtrip_sel[31] + NET gpio_vtrip_sel[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2426135 ) N ; + - gpio_in_h[31] + NET gpio_in_h[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2416935 ) N ; + - gpio_dm1[31] + NET gpio_dm1[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2472135 ) N ; + - gpio_slow_sel[31] + NET gpio_slow_sel[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2481335 ) N ; + - gpio_in[31] + NET gpio_in[31] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2490535 ) N ; + - gpio_dm0[30] + NET gpio_dm0[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2678935 ) N ; + - gpio_dm2[30] + NET gpio_dm2[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2657315 ) N ; + - gpio_holdover[30] + NET gpio_holdover[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2654095 ) N ; + - gpio_ib_mode_sel[30] + NET gpio_ib_mode_sel[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2638915 ) N ; + - gpio_inp_dis[30] + NET gpio_inp_dis[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2672955 ) N ; + - gpio_oeb[30] + NET gpio_oeb[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2635695 ) N ; + - gpio_out[30] + NET gpio_out[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2651335 ) N ; + - gpio_vtrip_sel[30] + NET gpio_vtrip_sel[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2642135 ) N ; + - gpio_analog_en[30] + NET gpio_analog_en[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2682155 ) N ; + - gpio_analog_pol[30] + NET gpio_analog_pol[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2675715 ) N ; + - gpio_analog_sel[30] + NET gpio_analog_sel[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2660535 ) N ; + - gpio_in_h[30] + NET gpio_in_h[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2632935 ) N ; + - gpio_dm1[30] + NET gpio_dm1[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2688135 ) N ; + - gpio_slow_sel[30] + NET gpio_slow_sel[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2697335 ) N ; + - gpio_in[30] + NET gpio_in[30] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2706535 ) N ; + - gpio_analog_sel[29] + NET gpio_analog_sel[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2876535 ) N ; + - gpio_dm2[29] + NET gpio_dm2[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2873315 ) N ; + - gpio_holdover[29] + NET gpio_holdover[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2870095 ) N ; + - gpio_ib_mode_sel[29] + NET gpio_ib_mode_sel[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2854915 ) N ; + - gpio_oeb[29] + NET gpio_oeb[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2851695 ) N ; + - gpio_out[29] + NET gpio_out[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2867335 ) N ; + - gpio_vtrip_sel[29] + NET gpio_vtrip_sel[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2858135 ) N ; + - gpio_in_h[29] + NET gpio_in_h[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2848935 ) N ; + - gpio_analog_en[29] + NET gpio_analog_en[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2898155 ) N ; + - gpio_analog_pol[29] + NET gpio_analog_pol[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2891715 ) N ; + - gpio_dm0[29] + NET gpio_dm0[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2894935 ) N ; + - gpio_inp_dis[29] + NET gpio_inp_dis[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2888955 ) N ; + - gpio_dm1[29] + NET gpio_dm1[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2904135 ) N ; + - gpio_slow_sel[29] + NET gpio_slow_sel[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2913335 ) N ; + - gpio_in[29] + NET gpio_in[29] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2922535 ) N ; + - gpio_analog_en[28] + NET gpio_analog_en[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3114155 ) N ; + - gpio_analog_pol[28] + NET gpio_analog_pol[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3107715 ) N ; + - gpio_analog_sel[28] + NET gpio_analog_sel[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3092535 ) N ; + - gpio_dm0[28] + NET gpio_dm0[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3110935 ) N ; + - gpio_dm2[28] + NET gpio_dm2[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3089315 ) N ; + - gpio_holdover[28] + NET gpio_holdover[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3086095 ) N ; + - gpio_ib_mode_sel[28] + NET gpio_ib_mode_sel[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3070915 ) N ; + - gpio_inp_dis[28] + NET gpio_inp_dis[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3104955 ) N ; + - gpio_oeb[28] + NET gpio_oeb[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3067695 ) N ; + - gpio_out[28] + NET gpio_out[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3083335 ) N ; + - gpio_vtrip_sel[28] + NET gpio_vtrip_sel[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3074135 ) N ; + - gpio_in_h[28] + NET gpio_in_h[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3064935 ) N ; + - gpio_dm1[28] + NET gpio_dm1[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3120135 ) N ; + - gpio_slow_sel[28] + NET gpio_slow_sel[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3129335 ) N ; + - gpio_in[28] + NET gpio_in[28] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3138535 ) N ; + - gpio_analog_en[27] + NET gpio_analog_en[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3330155 ) N ; + - gpio_analog_pol[27] + NET gpio_analog_pol[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3323715 ) N ; + - gpio_analog_sel[27] + NET gpio_analog_sel[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3308535 ) N ; + - gpio_dm0[27] + NET gpio_dm0[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3326935 ) N ; + - gpio_dm2[27] + NET gpio_dm2[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3305315 ) N ; + - gpio_holdover[27] + NET gpio_holdover[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3302095 ) N ; + - gpio_ib_mode_sel[27] + NET gpio_ib_mode_sel[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3286915 ) N ; + - gpio_inp_dis[27] + NET gpio_inp_dis[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3320955 ) N ; + - gpio_oeb[27] + NET gpio_oeb[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3283695 ) N ; + - gpio_out[27] + NET gpio_out[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3299335 ) N ; + - gpio_vtrip_sel[27] + NET gpio_vtrip_sel[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3290135 ) N ; + - gpio_in_h[27] + NET gpio_in_h[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3280935 ) N ; + - gpio_dm1[27] + NET gpio_dm1[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3336135 ) N ; + - gpio_slow_sel[27] + NET gpio_slow_sel[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3345335 ) N ; + - gpio_in[27] + NET gpio_in[27] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3354535 ) N ; + - vdda2 + NET vdda2 + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 2266650 ) N ; + - vssd2 + NET vssd2 + + PORT + + LAYER met3 ( -1250 -11975 ) ( 1250 11975 ) + PLACED ( -970 2056045 ) N ; + - vccd2 + NET vccd2 + + PORT + + LAYER met3 ( -1250 -11630 ) ( 1250 11630 ) + PLACED ( -970 2030940 ) N ; + - vssd2 + NET vssd2 + + PORT + + LAYER met3 ( -1250 -12000 ) ( 1250 12000 ) + PLACED ( -970 2005810 ) N ; + - vddio + NET vddio + + PORT + + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 402650 ) N ; + - vccd + NET vccd + + PORT + + LAYER met3 ( -1250 -11975 ) ( 1250 11975 ) + PLACED ( -970 192045 ) N ; + - vccd + NET vccd + + PORT + + LAYER met3 ( -1250 -12000 ) ( 1250 12000 ) + PLACED ( -970 141810 ) N ; + - vssa + NET vssa + + PORT + + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 195980 -970 ) N ; + - vssd + NET vssd + + PORT + + LAYER met3 ( -11575 -1250 ) ( 11575 1250 ) + PLACED ( 1007995 -970 ) N ; + - vssd + NET vssd + + PORT + + LAYER met3 ( -12000 -1250 ) ( 12000 1250 ) + PLACED ( 1057820 -970 ) N ; + - vssio + NET vssio + + PORT + + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2646980 -970 ) N ; + - vdda + NET vdda + + PORT + + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2915980 -970 ) N ; + - gpio_loopback_zero[14] + NET gpio_loopback_zero[14] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 4645185 ) N ; + - gpio_loopback_zero[13] + NET gpio_loopback_zero[13] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 4195185 ) N ; + - gpio_loopback_zero[12] + NET gpio_loopback_zero[12] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3750185 ) N ; + - gpio_loopback_zero[11] + NET gpio_loopback_zero[11] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3525185 ) N ; + - gpio_loopback_zero[10] + NET gpio_loopback_zero[10] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3300185 ) N ; + - gpio_loopback_zero[9] + NET gpio_loopback_zero[9] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3075185 ) N ; + - gpio_loopback_zero[8] + NET gpio_loopback_zero[8] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 2850185 ) N ; + - gpio_loopback_zero[7] + NET gpio_loopback_zero[7] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 2625185 ) N ; + - gpio_loopback_zero[6] + NET gpio_loopback_zero[6] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1740185 ) N ; + - gpio_loopback_zero[5] + NET gpio_loopback_zero[5] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1515185 ) N ; + - gpio_loopback_zero[4] + NET gpio_loopback_zero[4] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1290185 ) N ; + - gpio_loopback_zero[3] + NET gpio_loopback_zero[3] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1065185 ) N ; + - gpio_loopback_zero[2] + NET gpio_loopback_zero[2] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 840185 ) N ; + - gpio_loopback_zero[1] + NET gpio_loopback_zero[1] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 615185 ) N ; + - gpio_loopback_zero[0] + NET gpio_loopback_zero[0] + + PORT + + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 390185 ) N ; + - gpio_slow_sel[0] + NET gpio_slow_sel[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 303295 ) N ; + - gpio_in[0] + NET gpio_in[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 294095 ) N ; + - gpio_dm1[0] + NET gpio_dm1[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 312495 ) N ; + - gpio_analog_en[0] + NET gpio_analog_en[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 318475 ) N ; + - gpio_analog_pol[0] + NET gpio_analog_pol[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 324915 ) N ; + - gpio_analog_sel[0] + NET gpio_analog_sel[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 340095 ) N ; + - gpio_dm0[0] + NET gpio_dm0[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 321695 ) N ; + - gpio_dm2[0] + NET gpio_dm2[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 343315 ) N ; + - gpio_holdover[0] + NET gpio_holdover[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 346535 ) N ; + - gpio_ib_mode_sel[0] + NET gpio_ib_mode_sel[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 361715 ) N ; + - gpio_inp_dis[0] + NET gpio_inp_dis[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 327675 ) N ; + - gpio_oeb[0] + NET gpio_oeb[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 364935 ) N ; + - gpio_out[0] + NET gpio_out[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 349295 ) N ; + - gpio_vtrip_sel[0] + NET gpio_vtrip_sel[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 358495 ) N ; + - gpio_in_h[0] + NET gpio_in_h[0] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 367695 ) N ; + - gpio_slow_sel[1] + NET gpio_slow_sel[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 529295 ) N ; + - gpio_in[1] + NET gpio_in[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 520095 ) N ; + - gpio_dm1[1] + NET gpio_dm1[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 538495 ) N ; + - gpio_analog_en[1] + NET gpio_analog_en[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 544475 ) N ; + - gpio_analog_pol[1] + NET gpio_analog_pol[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 550915 ) N ; + - gpio_analog_sel[1] + NET gpio_analog_sel[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 566095 ) N ; + - gpio_dm0[1] + NET gpio_dm0[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 547695 ) N ; + - gpio_dm2[1] + NET gpio_dm2[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 569315 ) N ; + - gpio_holdover[1] + NET gpio_holdover[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 572535 ) N ; + - gpio_ib_mode_sel[1] + NET gpio_ib_mode_sel[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 587715 ) N ; + - gpio_inp_dis[1] + NET gpio_inp_dis[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 553675 ) N ; + - gpio_oeb[1] + NET gpio_oeb[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 590935 ) N ; + - gpio_out[1] + NET gpio_out[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 575295 ) N ; + - gpio_vtrip_sel[1] + NET gpio_vtrip_sel[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 584495 ) N ; + - gpio_in_h[1] + NET gpio_in_h[1] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 593695 ) N ; + - gpio_slow_sel[2] + NET gpio_slow_sel[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 754295 ) N ; + - gpio_in[2] + NET gpio_in[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 745095 ) N ; + - gpio_dm1[2] + NET gpio_dm1[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 763495 ) N ; + - gpio_analog_en[2] + NET gpio_analog_en[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 769475 ) N ; + - gpio_analog_pol[2] + NET gpio_analog_pol[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 775915 ) N ; + - gpio_analog_sel[2] + NET gpio_analog_sel[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 791095 ) N ; + - gpio_dm0[2] + NET gpio_dm0[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 772695 ) N ; + - gpio_dm2[2] + NET gpio_dm2[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 794315 ) N ; + - gpio_holdover[2] + NET gpio_holdover[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 797535 ) N ; + - gpio_ib_mode_sel[2] + NET gpio_ib_mode_sel[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 812715 ) N ; + - gpio_inp_dis[2] + NET gpio_inp_dis[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 778675 ) N ; + - gpio_oeb[2] + NET gpio_oeb[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 815935 ) N ; + - gpio_out[2] + NET gpio_out[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 800295 ) N ; + - gpio_vtrip_sel[2] + NET gpio_vtrip_sel[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 809495 ) N ; + - gpio_in_h[2] + NET gpio_in_h[2] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 818695 ) N ; + - gpio_slow_sel[3] + NET gpio_slow_sel[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 980295 ) N ; + - gpio_in[3] + NET gpio_in[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 971095 ) N ; + - gpio_dm1[3] + NET gpio_dm1[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 989495 ) N ; + - gpio_analog_en[3] + NET gpio_analog_en[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 995475 ) N ; + - gpio_analog_pol[3] + NET gpio_analog_pol[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1001915 ) N ; + - gpio_analog_sel[3] + NET gpio_analog_sel[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1017095 ) N ; + - gpio_dm2[3] + NET gpio_dm2[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1020315 ) N ; + - gpio_dm0[3] + NET gpio_dm0[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 998695 ) N ; + - gpio_holdover[3] + NET gpio_holdover[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1023535 ) N ; + - gpio_ib_mode_sel[3] + NET gpio_ib_mode_sel[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1038715 ) N ; + - gpio_inp_dis[3] + NET gpio_inp_dis[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1004675 ) N ; + - gpio_oeb[3] + NET gpio_oeb[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1041935 ) N ; + - gpio_out[3] + NET gpio_out[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1026295 ) N ; + - gpio_vtrip_sel[3] + NET gpio_vtrip_sel[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1035495 ) N ; + - gpio_in_h[3] + NET gpio_in_h[3] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1044695 ) N ; + - gpio_slow_sel[4] + NET gpio_slow_sel[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1205295 ) N ; + - gpio_in[4] + NET gpio_in[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1196095 ) N ; + - gpio_dm1[4] + NET gpio_dm1[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1214495 ) N ; + - gpio_analog_en[4] + NET gpio_analog_en[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1220475 ) N ; + - gpio_analog_pol[4] + NET gpio_analog_pol[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1226915 ) N ; + - gpio_analog_sel[4] + NET gpio_analog_sel[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1242095 ) N ; + - gpio_dm0[4] + NET gpio_dm0[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1223695 ) N ; + - gpio_dm2[4] + NET gpio_dm2[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1245315 ) N ; + - gpio_holdover[4] + NET gpio_holdover[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1248535 ) N ; + - gpio_ib_mode_sel[4] + NET gpio_ib_mode_sel[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1263715 ) N ; + - gpio_inp_dis[4] + NET gpio_inp_dis[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1229675 ) N ; + - gpio_oeb[4] + NET gpio_oeb[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1266935 ) N ; + - gpio_out[4] + NET gpio_out[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1251295 ) N ; + - gpio_vtrip_sel[4] + NET gpio_vtrip_sel[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1260495 ) N ; + - gpio_in_h[4] + NET gpio_in_h[4] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1269695 ) N ; + - gpio_slow_sel[5] + NET gpio_slow_sel[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1430295 ) N ; + - gpio_in[5] + NET gpio_in[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1421095 ) N ; + - gpio_dm1[5] + NET gpio_dm1[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1439495 ) N ; + - gpio_analog_en[5] + NET gpio_analog_en[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1445475 ) N ; + - gpio_analog_pol[5] + NET gpio_analog_pol[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1451915 ) N ; + - gpio_analog_sel[5] + NET gpio_analog_sel[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1467095 ) N ; + - gpio_dm0[5] + NET gpio_dm0[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1448695 ) N ; + - gpio_dm2[5] + NET gpio_dm2[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1470315 ) N ; + - gpio_holdover[5] + NET gpio_holdover[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1473535 ) N ; + - gpio_ib_mode_sel[5] + NET gpio_ib_mode_sel[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1488715 ) N ; + - gpio_inp_dis[5] + NET gpio_inp_dis[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1454675 ) N ; + - gpio_oeb[5] + NET gpio_oeb[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1491935 ) N ; + - gpio_out[5] + NET gpio_out[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1476295 ) N ; + - gpio_vtrip_sel[5] + NET gpio_vtrip_sel[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1485495 ) N ; + - gpio_in_h[5] + NET gpio_in_h[5] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1494695 ) N ; + - gpio_slow_sel[6] + NET gpio_slow_sel[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1656295 ) N ; + - gpio_in[6] + NET gpio_in[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1647095 ) N ; + - gpio_dm1[6] + NET gpio_dm1[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1665495 ) N ; + - gpio_analog_en[6] + NET gpio_analog_en[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1671475 ) N ; + - gpio_analog_pol[6] + NET gpio_analog_pol[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1677915 ) N ; + - gpio_analog_sel[6] + NET gpio_analog_sel[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1693095 ) N ; + - gpio_dm0[6] + NET gpio_dm0[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1674695 ) N ; + - gpio_dm2[6] + NET gpio_dm2[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1696315 ) N ; + - gpio_holdover[6] + NET gpio_holdover[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1699535 ) N ; + - gpio_ib_mode_sel[6] + NET gpio_ib_mode_sel[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1714715 ) N ; + - gpio_inp_dis[6] + NET gpio_inp_dis[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1680675 ) N ; + - gpio_oeb[6] + NET gpio_oeb[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1717935 ) N ; + - gpio_out[6] + NET gpio_out[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1702295 ) N ; + - gpio_vtrip_sel[6] + NET gpio_vtrip_sel[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1711495 ) N ; + - gpio_in_h[6] + NET gpio_in_h[6] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1720695 ) N ; + - gpio_slow_sel[7] + NET gpio_slow_sel[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2542295 ) N ; + - gpio_in[7] + NET gpio_in[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2533095 ) N ; + - gpio_dm1[7] + NET gpio_dm1[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2551495 ) N ; + - gpio_analog_en[7] + NET gpio_analog_en[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2557475 ) N ; + - gpio_analog_pol[7] + NET gpio_analog_pol[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2563915 ) N ; + - gpio_analog_sel[7] + NET gpio_analog_sel[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2579095 ) N ; + - gpio_dm0[7] + NET gpio_dm0[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2560695 ) N ; + - gpio_dm2[7] + NET gpio_dm2[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2582315 ) N ; + - gpio_holdover[7] + NET gpio_holdover[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2585535 ) N ; + - gpio_ib_mode_sel[7] + NET gpio_ib_mode_sel[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2600715 ) N ; + - gpio_inp_dis[7] + NET gpio_inp_dis[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2566675 ) N ; + - gpio_oeb[7] + NET gpio_oeb[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2603935 ) N ; + - gpio_out[7] + NET gpio_out[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2588295 ) N ; + - gpio_vtrip_sel[7] + NET gpio_vtrip_sel[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2597495 ) N ; + - gpio_in_h[7] + NET gpio_in_h[7] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2606695 ) N ; + - gpio_slow_sel[8] + NET gpio_slow_sel[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2768295 ) N ; + - gpio_in[8] + NET gpio_in[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2759095 ) N ; + - gpio_dm1[8] + NET gpio_dm1[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2777495 ) N ; + - gpio_analog_en[8] + NET gpio_analog_en[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2783475 ) N ; + - gpio_analog_pol[8] + NET gpio_analog_pol[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2789915 ) N ; + - gpio_analog_sel[8] + NET gpio_analog_sel[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2805095 ) N ; + - gpio_dm0[8] + NET gpio_dm0[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2786695 ) N ; + - gpio_dm2[8] + NET gpio_dm2[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2808315 ) N ; + - gpio_holdover[8] + NET gpio_holdover[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2811535 ) N ; + - gpio_ib_mode_sel[8] + NET gpio_ib_mode_sel[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2826715 ) N ; + - gpio_inp_dis[8] + NET gpio_inp_dis[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2792675 ) N ; + - gpio_oeb[8] + NET gpio_oeb[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2829935 ) N ; + - gpio_out[8] + NET gpio_out[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2814295 ) N ; + - gpio_vtrip_sel[8] + NET gpio_vtrip_sel[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2823495 ) N ; + - gpio_in_h[8] + NET gpio_in_h[8] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2832695 ) N ; + - gpio_slow_sel[9] + NET gpio_slow_sel[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2993295 ) N ; + - gpio_in[9] + NET gpio_in[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2984095 ) N ; + - gpio_dm1[9] + NET gpio_dm1[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3002495 ) N ; + - gpio_analog_en[9] + NET gpio_analog_en[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3008475 ) N ; + - gpio_analog_pol[9] + NET gpio_analog_pol[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3014915 ) N ; + - gpio_analog_sel[9] + NET gpio_analog_sel[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3030095 ) N ; + - gpio_dm0[9] + NET gpio_dm0[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3011695 ) N ; + - gpio_dm2[9] + NET gpio_dm2[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3033315 ) N ; + - gpio_holdover[9] + NET gpio_holdover[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3036535 ) N ; + - gpio_ib_mode_sel[9] + NET gpio_ib_mode_sel[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3051715 ) N ; + - gpio_inp_dis[9] + NET gpio_inp_dis[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3017675 ) N ; + - gpio_oeb[9] + NET gpio_oeb[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3054935 ) N ; + - gpio_out[9] + NET gpio_out[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3039295 ) N ; + - gpio_vtrip_sel[9] + NET gpio_vtrip_sel[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3048495 ) N ; + - gpio_in_h[9] + NET gpio_in_h[9] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3057695 ) N ; + - gpio_slow_sel[10] + NET gpio_slow_sel[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3219295 ) N ; + - gpio_in[10] + NET gpio_in[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3210095 ) N ; + - gpio_dm1[10] + NET gpio_dm1[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3228495 ) N ; + - gpio_analog_en[10] + NET gpio_analog_en[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3234475 ) N ; + - gpio_analog_pol[10] + NET gpio_analog_pol[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3240915 ) N ; + - gpio_analog_sel[10] + NET gpio_analog_sel[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3256095 ) N ; + - gpio_dm0[10] + NET gpio_dm0[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3237695 ) N ; + - gpio_dm2[10] + NET gpio_dm2[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3259315 ) N ; + - gpio_holdover[10] + NET gpio_holdover[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3262535 ) N ; + - gpio_ib_mode_sel[10] + NET gpio_ib_mode_sel[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3277715 ) N ; + - gpio_inp_dis[10] + NET gpio_inp_dis[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3243675 ) N ; + - gpio_oeb[10] + NET gpio_oeb[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3280935 ) N ; + - gpio_out[10] + NET gpio_out[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3265295 ) N ; + - gpio_vtrip_sel[10] + NET gpio_vtrip_sel[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3274495 ) N ; + - gpio_in_h[10] + NET gpio_in_h[10] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3283695 ) N ; + - gpio_slow_sel[11] + NET gpio_slow_sel[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3444295 ) N ; + - gpio_in[11] + NET gpio_in[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3435095 ) N ; + - gpio_dm1[11] + NET gpio_dm1[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3453495 ) N ; + - gpio_holdover[11] + NET gpio_holdover[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3487535 ) N ; + - gpio_ib_mode_sel[11] + NET gpio_ib_mode_sel[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3502715 ) N ; + - gpio_inp_dis[11] + NET gpio_inp_dis[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3468675 ) N ; + - gpio_oeb[11] + NET gpio_oeb[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3505935 ) N ; + - gpio_out[11] + NET gpio_out[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3490295 ) N ; + - gpio_vtrip_sel[11] + NET gpio_vtrip_sel[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3499495 ) N ; + - gpio_analog_en[11] + NET gpio_analog_en[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3459475 ) N ; + - gpio_analog_pol[11] + NET gpio_analog_pol[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3465915 ) N ; + - gpio_analog_sel[11] + NET gpio_analog_sel[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3481095 ) N ; + - gpio_dm0[11] + NET gpio_dm0[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3462695 ) N ; + - gpio_dm2[11] + NET gpio_dm2[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3484315 ) N ; + - gpio_in_h[11] + NET gpio_in_h[11] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3508695 ) N ; + - gpio_slow_sel[12] + NET gpio_slow_sel[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3669295 ) N ; + - gpio_in[12] + NET gpio_in[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3660095 ) N ; + - gpio_dm1[12] + NET gpio_dm1[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3678495 ) N ; + - gpio_analog_en[12] + NET gpio_analog_en[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3684475 ) N ; + - gpio_analog_pol[12] + NET gpio_analog_pol[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3690915 ) N ; + - gpio_analog_sel[12] + NET gpio_analog_sel[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3706095 ) N ; + - gpio_dm0[12] + NET gpio_dm0[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3687695 ) N ; + - gpio_dm2[12] + NET gpio_dm2[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3709315 ) N ; + - gpio_holdover[12] + NET gpio_holdover[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3712535 ) N ; + - gpio_ib_mode_sel[12] + NET gpio_ib_mode_sel[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3727715 ) N ; + - gpio_inp_dis[12] + NET gpio_inp_dis[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3693675 ) N ; + - gpio_oeb[12] + NET gpio_oeb[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3730935 ) N ; + - gpio_out[12] + NET gpio_out[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3715295 ) N ; + - gpio_vtrip_sel[12] + NET gpio_vtrip_sel[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3724495 ) N ; + - gpio_in_h[12] + NET gpio_in_h[12] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3733695 ) N ; + - gpio_slow_sel[13] + NET gpio_slow_sel[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4115295 ) N ; + - gpio_in[13] + NET gpio_in[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4106095 ) N ; + - gpio_dm1[13] + NET gpio_dm1[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4124495 ) N ; + - gpio_analog_en[13] + NET gpio_analog_en[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4130475 ) N ; + - gpio_analog_pol[13] + NET gpio_analog_pol[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4136915 ) N ; + - gpio_analog_sel[13] + NET gpio_analog_sel[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4152095 ) N ; + - gpio_dm0[13] + NET gpio_dm0[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4133695 ) N ; + - gpio_dm2[13] + NET gpio_dm2[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4155315 ) N ; + - gpio_holdover[13] + NET gpio_holdover[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4158535 ) N ; + - gpio_ib_mode_sel[13] + NET gpio_ib_mode_sel[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4173715 ) N ; + - gpio_inp_dis[13] + NET gpio_inp_dis[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4139675 ) N ; + - gpio_oeb[13] + NET gpio_oeb[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4176935 ) N ; + - gpio_out[13] + NET gpio_out[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4161295 ) N ; + - gpio_vtrip_sel[13] + NET gpio_vtrip_sel[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4170495 ) N ; + - gpio_in_h[13] + NET gpio_in_h[13] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4179695 ) N ; + - gpio_slow_sel[14] + NET gpio_slow_sel[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4561295 ) N ; + - gpio_in[14] + NET gpio_in[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4552095 ) N ; + - gpio_dm1[14] + NET gpio_dm1[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4570495 ) N ; + - gpio_analog_en[14] + NET gpio_analog_en[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4576475 ) N ; + - gpio_analog_pol[14] + NET gpio_analog_pol[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4582915 ) N ; + - gpio_analog_sel[14] + NET gpio_analog_sel[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4598095 ) N ; + - gpio_dm0[14] + NET gpio_dm0[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4579695 ) N ; + - gpio_dm2[14] + NET gpio_dm2[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4601315 ) N ; + - gpio_holdover[14] + NET gpio_holdover[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4604535 ) N ; + - gpio_ib_mode_sel[14] + NET gpio_ib_mode_sel[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4619715 ) N ; + - gpio_inp_dis[14] + NET gpio_inp_dis[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4585675 ) N ; + - gpio_oeb[14] + NET gpio_oeb[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4622935 ) N ; + - gpio_out[14] + NET gpio_out[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4607295 ) N ; + - gpio_vtrip_sel[14] + NET gpio_vtrip_sel[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4616495 ) N ; + - gpio_in_h[14] + NET gpio_in_h[14] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4625695 ) N ; + - gpio_in[24] + NET gpio_in[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4635535 ) N ; + - gpio_slow_sel[24] + NET gpio_slow_sel[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4626335 ) N ; + - gpio_dm1[24] + NET gpio_dm1[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4617135 ) N ; + - gpio_analog_en[24] + NET gpio_analog_en[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4611155 ) N ; + - gpio_dm0[24] + NET gpio_dm0[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4607935 ) N ; + - gpio_analog_pol[24] + NET gpio_analog_pol[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4604715 ) N ; + - gpio_inp_dis[24] + NET gpio_inp_dis[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4601955 ) N ; + - gpio_analog_sel[24] + NET gpio_analog_sel[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4589535 ) N ; + - gpio_dm2[24] + NET gpio_dm2[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4586315 ) N ; + - gpio_holdover[24] + NET gpio_holdover[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4583095 ) N ; + - gpio_out[24] + NET gpio_out[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4580335 ) N ; + - gpio_vtrip_sel[24] + NET gpio_vtrip_sel[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4571135 ) N ; + - gpio_ib_mode_sel[24] + NET gpio_ib_mode_sel[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4567915 ) N ; + - gpio_oeb[24] + NET gpio_oeb[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4564695 ) N ; + - gpio_in_h[24] + NET gpio_in_h[24] + + PORT + + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4561935 ) N ; + - analog_io[24] + NET analog_io[24] + + PORT + + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 4623120 ) N ; + - analog_noesd_io[24] + NET analog_noesd_io[24] + + PORT + + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 4613920 ) N ; +END PINS + +NONDEFAULTRULES 13 ; + - met3_width_310 + + LAYER met3 WIDTH 310 ; + - met3_width_2500 + + LAYER met3 WIDTH 2500 ; + - met2_width_330 + + LAYER met2 WIDTH 330 ; + - met3_width_1070 + + LAYER met3 WIDTH 1070 ; + - met2_width_300 + + LAYER met2 WIDTH 300 ; + - met3_width_640 + + LAYER met3 WIDTH 640 ; + - met2_width_1070 + + LAYER met2 WIDTH 1070 ; + - met2_width_305 + + LAYER met2 WIDTH 305 ; + - met2_width_640 + + LAYER met2 WIDTH 640 ; + - met2_width_280 + + LAYER met2 WIDTH 280 ; + - met2_width_260 + + LAYER met2 WIDTH 260 ; + - met2_width_285 + + LAYER met2 WIDTH 285 ; + - met3_width_350 + + LAYER met3 WIDTH 350 ; +END NONDEFAULTRULES + +NETS 887 ; + - vdda ( PIN vdda ) + + ROUTED met3 TAPERRULE met3_width_2500 ( 2953920 -970 ) ( 2977820 * ) + NEW met3 TAPERRULE met3_width_2500 ( 2904030 -970 ) ( 2927930 * ) ; + - vssio ( PIN vssio ) + + ROUTED met3 TAPERRULE met3_width_2500 ( 2684920 -970 ) ( 2708820 * ) + NEW met3 TAPERRULE met3_width_2500 ( 2635030 -970 ) ( 2658930 * ) + NEW met3 TAPERRULE met3_width_2500 ( 1506710 4767600 ) ( 1530610 * ) + NEW met3 TAPERRULE met3_width_2500 ( 1456810 4767600 ) ( 1480710 * ) ; + - vssd ( PIN vssd ) + + ROUTED met3 TAPERRULE met3_width_2500 ( 1045820 -970 ) ( 1069820 * ) + NEW met3 TAPERRULE met3_width_2500 ( 996420 -970 ) ( 1019570 * ) ; + - vssa ( PIN vssa ) + + ROUTED met3 TAPERRULE met3_width_2500 ( 233920 -970 ) ( 257820 * ) + NEW met3 TAPERRULE met3_width_2500 ( 184030 -970 ) ( 207930 * ) ; + - vccd ( PIN vccd ) + + ROUTED met3 TAPERRULE met3_width_2500 ( -970 129810 ) ( * 153810 ) + NEW met3 TAPERRULE met3_width_2500 ( -970 180070 ) ( * 204020 ) ; + - porb_h ( PIN porb_h ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2000 265910 ) ( 280 * ) ; + - por_l ( PIN por_l ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2000 267035 ) ( 280 * ) ; + - porb_l ( PIN porb_l ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2000 268150 ) ( 280 * ) ; + - gpio_in[0] ( PIN gpio_in[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 294095 ) ( 3168750 * ) ; + - gpio_slow_sel[0] ( PIN gpio_slow_sel[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 303295 ) ( 3168750 * ) ; + - analog_io[0] ( PIN analog_io[0] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 306510 ) ( 3168750 * ) ; + - gpio_dm1[0] ( PIN gpio_dm1[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 312495 ) ( 3168750 * ) ; + - analog_noesd_io[0] ( PIN analog_noesd_io[0] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 315710 ) ( 3168750 * ) ; + - gpio_analog_en[0] ( PIN gpio_analog_en[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 318475 ) ( 3168750 * ) ; + - gpio_dm0[0] ( PIN gpio_dm0[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 321695 ) ( 3168750 * ) ; + - gpio_analog_pol[0] ( PIN gpio_analog_pol[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 324915 ) ( 3168750 * ) ; + - gpio_inp_dis[0] ( PIN gpio_inp_dis[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 327675 ) ( 3168750 * ) ; + - gpio_analog_sel[0] ( PIN gpio_analog_sel[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 340095 ) ( 3168750 * ) ; + - gpio_dm2[0] ( PIN gpio_dm2[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 343315 ) ( 3168750 * ) ; + - gpio_holdover[0] ( PIN gpio_holdover[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 346535 ) ( 3168750 * ) ; + - gpio_out[0] ( PIN gpio_out[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 349295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[0] ( PIN gpio_vtrip_sel[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 358495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[0] ( PIN gpio_ib_mode_sel[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 361715 ) ( 3168750 * ) ; + - vddio ( PIN vddio ) + + ROUTED met3 TAPERRULE met3_width_2500 ( -970 340810 ) ( * 364710 ) + NEW met3 TAPERRULE met3_width_2500 ( -970 390700 ) ( * 414600 ) + NEW met3 TAPERRULE met3_width_2500 ( -970 4138810 ) ( * 4162710 ) + NEW met3 TAPERRULE met3_width_2500 ( -970 4188710 ) ( * 4212610 ) ; + - gpio_oeb[0] ( PIN gpio_oeb[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 364935 ) ( 3168750 * ) ; + - gpio_in_h[0] ( PIN gpio_in_h[0] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 367695 ) ( 3168750 * ) ; + - gpio_loopback_one[0] ( PIN gpio_loopback_one[0] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 380180 ) ( 3168630 * ) ; + - gpio_loopback_zero[0] ( PIN gpio_loopback_zero[0] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 390185 ) ( 3168630 * ) ; + - gpio_in[1] ( PIN gpio_in[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 520095 ) ( 3168750 * ) ; + - gpio_slow_sel[1] ( PIN gpio_slow_sel[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 529295 ) ( 3168750 * ) ; + - analog_io[1] ( PIN analog_io[1] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 532510 ) ( 3168750 * ) ; + - gpio_dm1[1] ( PIN gpio_dm1[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 538495 ) ( 3168750 * ) ; + - analog_noesd_io[1] ( PIN analog_noesd_io[1] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 541710 ) ( 3168750 * ) ; + - gpio_analog_en[1] ( PIN gpio_analog_en[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 544475 ) ( 3168750 * ) ; + - gpio_dm0[1] ( PIN gpio_dm0[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 547695 ) ( 3168750 * ) ; + - gpio_analog_pol[1] ( PIN gpio_analog_pol[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 550915 ) ( 3168750 * ) ; + - gpio_inp_dis[1] ( PIN gpio_inp_dis[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 553675 ) ( 3168750 * ) ; + - gpio_analog_sel[1] ( PIN gpio_analog_sel[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 566095 ) ( 3168750 * ) ; + - gpio_dm2[1] ( PIN gpio_dm2[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 569315 ) ( 3168750 * ) ; + - gpio_holdover[1] ( PIN gpio_holdover[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 572535 ) ( 3168750 * ) ; + - gpio_out[1] ( PIN gpio_out[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 575295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[1] ( PIN gpio_vtrip_sel[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 584495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[1] ( PIN gpio_ib_mode_sel[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 587715 ) ( 3168750 * ) ; + - gpio_oeb[1] ( PIN gpio_oeb[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 590935 ) ( 3168750 * ) ; + - gpio_in_h[1] ( PIN gpio_in_h[1] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 593695 ) ( 3168750 * ) ; + - gpio_loopback_one[1] ( PIN gpio_loopback_one[1] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 605180 ) ( 3168630 * ) ; + - gpio_loopback_zero[1] ( PIN gpio_loopback_zero[1] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 615185 ) ( 3168630 * ) ; + - gpio_loopback_zero[37] ( PIN gpio_loopback_zero[37] ) + + ROUTED met3 ( -1850 663370 ) ( 130 * ) ; + - gpio_loopback_one[37] ( PIN gpio_loopback_one[37] ) + + ROUTED met3 ( -1850 673370 ) ( 130 * ) ; + - gpio_in_h[37] ( PIN gpio_in_h[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 698935 ) ( 280 * ) ; + - gpio_oeb[37] ( PIN gpio_oeb[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 701695 ) ( 280 * ) ; + - gpio_ib_mode_sel[37] ( PIN gpio_ib_mode_sel[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 704915 ) ( 280 * ) ; + - gpio_vtrip_sel[37] ( PIN gpio_vtrip_sel[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 708135 ) ( 280 * ) ; + - gpio_out[37] ( PIN gpio_out[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 717335 ) ( 280 * ) ; + - gpio_holdover[37] ( PIN gpio_holdover[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 720095 ) ( 280 * ) ; + - gpio_dm2[37] ( PIN gpio_dm2[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 723315 ) ( 280 * ) ; + - gpio_analog_sel[37] ( PIN gpio_analog_sel[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 726535 ) ( 280 * ) ; + - gpio_inp_dis[37] ( PIN gpio_inp_dis[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 738955 ) ( 280 * ) ; + - gpio_analog_pol[37] ( PIN gpio_analog_pol[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 741715 ) ( 280 * ) ; + - gpio_in[2] ( PIN gpio_in[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 745095 ) ( 3168750 * ) ; + - gpio_dm0[37] ( PIN gpio_dm0[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 744935 ) ( 280 * ) ; + - gpio_analog_en[37] ( PIN gpio_analog_en[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 748155 ) ( 280 * ) ; + - analog_noesd_io[37] ( PIN analog_noesd_io[37] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 750920 ) ( 280 * ) ; + - gpio_slow_sel[2] ( PIN gpio_slow_sel[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 754295 ) ( 3168750 * ) ; + - gpio_dm1[37] ( PIN gpio_dm1[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 754135 ) ( 280 * ) ; + - analog_io[2] ( PIN analog_io[2] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 757510 ) ( 3168750 * ) ; + - analog_io[37] ( PIN analog_io[37] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 760120 ) ( 280 * ) ; + - gpio_dm1[2] ( PIN gpio_dm1[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 763495 ) ( 3168750 * ) ; + - gpio_slow_sel[37] ( PIN gpio_slow_sel[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 763335 ) ( 280 * ) ; + - analog_noesd_io[2] ( PIN analog_noesd_io[2] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 766710 ) ( 3168750 * ) ; + - gpio_analog_en[2] ( PIN gpio_analog_en[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 769475 ) ( 3168750 * ) ; + - gpio_dm0[2] ( PIN gpio_dm0[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 772695 ) ( 3168750 * ) ; + - gpio_in[37] ( PIN gpio_in[37] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 772535 ) ( 280 * ) ; + - gpio_analog_pol[2] ( PIN gpio_analog_pol[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 775915 ) ( 3168750 * ) ; + - gpio_inp_dis[2] ( PIN gpio_inp_dis[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 778675 ) ( 3168750 * ) ; + - gpio_analog_sel[2] ( PIN gpio_analog_sel[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 791095 ) ( 3168750 * ) ; + - gpio_dm2[2] ( PIN gpio_dm2[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 794315 ) ( 3168750 * ) ; + - gpio_holdover[2] ( PIN gpio_holdover[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 797535 ) ( 3168750 * ) ; + - gpio_out[2] ( PIN gpio_out[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 800295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[2] ( PIN gpio_vtrip_sel[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 809495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[2] ( PIN gpio_ib_mode_sel[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 812715 ) ( 3168750 * ) ; + - gpio_oeb[2] ( PIN gpio_oeb[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 815935 ) ( 3168750 * ) ; + - gpio_in_h[2] ( PIN gpio_in_h[2] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 818695 ) ( 3168750 * ) ; + - gpio_loopback_one[2] ( PIN gpio_loopback_one[2] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 830180 ) ( 3168630 * ) ; + - gpio_loopback_zero[2] ( PIN gpio_loopback_zero[2] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 840185 ) ( 3168630 * ) ; + - gpio_loopback_zero[36] ( PIN gpio_loopback_zero[36] ) + + ROUTED met3 ( -1850 878370 ) ( 130 * ) ; + - gpio_loopback_one[36] ( PIN gpio_loopback_one[36] ) + + ROUTED met3 ( -1850 888370 ) ( 130 * ) ; + - gpio_in_h[36] ( PIN gpio_in_h[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 914935 ) ( 280 * ) ; + - gpio_oeb[36] ( PIN gpio_oeb[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 917695 ) ( 280 * ) ; + - gpio_ib_mode_sel[36] ( PIN gpio_ib_mode_sel[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 920915 ) ( 280 * ) ; + - gpio_vtrip_sel[36] ( PIN gpio_vtrip_sel[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 924135 ) ( 280 * ) ; + - gpio_out[36] ( PIN gpio_out[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 933335 ) ( 280 * ) ; + - gpio_holdover[36] ( PIN gpio_holdover[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 936095 ) ( 280 * ) ; + - gpio_dm2[36] ( PIN gpio_dm2[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 939315 ) ( 280 * ) ; + - gpio_analog_sel[36] ( PIN gpio_analog_sel[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 942535 ) ( 280 * ) ; + - gpio_inp_dis[36] ( PIN gpio_inp_dis[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 954955 ) ( 280 * ) ; + - gpio_analog_pol[36] ( PIN gpio_analog_pol[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 957715 ) ( 280 * ) ; + - gpio_dm0[36] ( PIN gpio_dm0[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 960935 ) ( 280 * ) ; + - gpio_analog_en[36] ( PIN gpio_analog_en[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 964155 ) ( 280 * ) ; + - analog_noesd_io[36] ( PIN analog_noesd_io[36] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 966920 ) ( 280 * ) ; + - gpio_dm1[36] ( PIN gpio_dm1[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 970135 ) ( 280 * ) ; + - gpio_in[3] ( PIN gpio_in[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 971095 ) ( 3168750 * ) ; + - analog_io[36] ( PIN analog_io[36] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 976120 ) ( 280 * ) ; + - gpio_slow_sel[36] ( PIN gpio_slow_sel[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 979335 ) ( 280 * ) ; + - gpio_slow_sel[3] ( PIN gpio_slow_sel[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 980295 ) ( 3168750 * ) ; + - analog_io[3] ( PIN analog_io[3] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 983510 ) ( 3168750 * ) ; + - gpio_in[36] ( PIN gpio_in[36] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 988535 ) ( 280 * ) ; + - gpio_dm1[3] ( PIN gpio_dm1[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 989495 ) ( 3168750 * ) ; + - analog_noesd_io[3] ( PIN analog_noesd_io[3] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 992710 ) ( 3168750 * ) ; + - gpio_analog_en[3] ( PIN gpio_analog_en[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 995475 ) ( 3168750 * ) ; + - gpio_dm0[3] ( PIN gpio_dm0[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 998695 ) ( 3168750 * ) ; + - gpio_analog_pol[3] ( PIN gpio_analog_pol[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1001915 ) ( 3168750 * ) ; + - gpio_inp_dis[3] ( PIN gpio_inp_dis[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1004675 ) ( 3168750 * ) ; + - gpio_analog_sel[3] ( PIN gpio_analog_sel[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1017095 ) ( 3168750 * ) ; + - gpio_dm2[3] ( PIN gpio_dm2[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1020315 ) ( 3168750 * ) ; + - gpio_holdover[3] ( PIN gpio_holdover[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1023535 ) ( 3168750 * ) ; + - gpio_out[3] ( PIN gpio_out[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1026295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[3] ( PIN gpio_vtrip_sel[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1035495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[3] ( PIN gpio_ib_mode_sel[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1038715 ) ( 3168750 * ) ; + - gpio_oeb[3] ( PIN gpio_oeb[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1041935 ) ( 3168750 * ) ; + - gpio_in_h[3] ( PIN gpio_in_h[3] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1044695 ) ( 3168750 * ) ; + - gpio_loopback_one[3] ( PIN gpio_loopback_one[3] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1055180 ) ( 3168630 * ) ; + - gpio_loopback_zero[3] ( PIN gpio_loopback_zero[3] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1065185 ) ( 3168630 * ) ; + - gpio_loopback_zero[35] ( PIN gpio_loopback_zero[35] ) + + ROUTED met3 ( -1850 1093370 ) ( 130 * ) ; + - gpio_loopback_one[35] ( PIN gpio_loopback_one[35] ) + + ROUTED met3 ( -1850 1103370 ) ( 130 * ) ; + - gpio_in_h[35] ( PIN gpio_in_h[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1130935 ) ( 280 * ) ; + - gpio_oeb[35] ( PIN gpio_oeb[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1133695 ) ( 280 * ) ; + - gpio_ib_mode_sel[35] ( PIN gpio_ib_mode_sel[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1136915 ) ( 280 * ) ; + - gpio_vtrip_sel[35] ( PIN gpio_vtrip_sel[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1140135 ) ( 280 * ) ; + - gpio_out[35] ( PIN gpio_out[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1149335 ) ( 280 * ) ; + - gpio_holdover[35] ( PIN gpio_holdover[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1152095 ) ( 280 * ) ; + - gpio_dm2[35] ( PIN gpio_dm2[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1155315 ) ( 280 * ) ; + - gpio_analog_sel[35] ( PIN gpio_analog_sel[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1158535 ) ( 280 * ) ; + - gpio_inp_dis[35] ( PIN gpio_inp_dis[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1170955 ) ( 280 * ) ; + - gpio_analog_pol[35] ( PIN gpio_analog_pol[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1173715 ) ( 280 * ) ; + - gpio_dm0[35] ( PIN gpio_dm0[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1176935 ) ( 280 * ) ; + - gpio_analog_en[35] ( PIN gpio_analog_en[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1180155 ) ( 280 * ) ; + - analog_noesd_io[35] ( PIN analog_noesd_io[35] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 1182920 ) ( 280 * ) ; + - gpio_dm1[35] ( PIN gpio_dm1[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1186135 ) ( 280 * ) ; + - analog_io[35] ( PIN analog_io[35] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 1192120 ) ( 280 * ) ; + - gpio_slow_sel[35] ( PIN gpio_slow_sel[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1195335 ) ( 280 * ) ; + - gpio_in[4] ( PIN gpio_in[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1196095 ) ( 3168750 * ) ; + - gpio_in[35] ( PIN gpio_in[35] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1204535 ) ( 280 * ) ; + - gpio_slow_sel[4] ( PIN gpio_slow_sel[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1205295 ) ( 3168750 * ) ; + - analog_io[4] ( PIN analog_io[4] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 1208510 ) ( 3168750 * ) ; + - gpio_dm1[4] ( PIN gpio_dm1[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1214495 ) ( 3168750 * ) ; + - analog_noesd_io[4] ( PIN analog_noesd_io[4] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 1217710 ) ( 3168750 * ) ; + - gpio_analog_en[4] ( PIN gpio_analog_en[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1220475 ) ( 3168750 * ) ; + - gpio_dm0[4] ( PIN gpio_dm0[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1223695 ) ( 3168750 * ) ; + - gpio_analog_pol[4] ( PIN gpio_analog_pol[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1226915 ) ( 3168750 * ) ; + - gpio_inp_dis[4] ( PIN gpio_inp_dis[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1229675 ) ( 3168750 * ) ; + - gpio_analog_sel[4] ( PIN gpio_analog_sel[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1242095 ) ( 3168750 * ) ; + - gpio_dm2[4] ( PIN gpio_dm2[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1245315 ) ( 3168750 * ) ; + - gpio_holdover[4] ( PIN gpio_holdover[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1248535 ) ( 3168750 * ) ; + - gpio_out[4] ( PIN gpio_out[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1251295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[4] ( PIN gpio_vtrip_sel[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1260495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[4] ( PIN gpio_ib_mode_sel[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1263715 ) ( 3168750 * ) ; + - gpio_oeb[4] ( PIN gpio_oeb[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1266935 ) ( 3168750 * ) ; + - gpio_in_h[4] ( PIN gpio_in_h[4] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1269695 ) ( 3168750 * ) ; + - gpio_loopback_one[4] ( PIN gpio_loopback_one[4] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1280180 ) ( 3168630 * ) ; + - gpio_loopback_zero[4] ( PIN gpio_loopback_zero[4] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1290185 ) ( 3168630 * ) ; + - gpio_loopback_zero[34] ( PIN gpio_loopback_zero[34] ) + + ROUTED met3 ( -1850 1308370 ) ( 130 * ) ; + - gpio_loopback_one[34] ( PIN gpio_loopback_one[34] ) + + ROUTED met3 ( -1850 1318370 ) ( 130 * ) ; + - gpio_in_h[34] ( PIN gpio_in_h[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1346935 ) ( 280 * ) ; + - gpio_oeb[34] ( PIN gpio_oeb[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1349695 ) ( 280 * ) ; + - gpio_ib_mode_sel[34] ( PIN gpio_ib_mode_sel[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1352915 ) ( 280 * ) ; + - gpio_vtrip_sel[34] ( PIN gpio_vtrip_sel[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1356135 ) ( 280 * ) ; + - gpio_out[34] ( PIN gpio_out[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1365335 ) ( 280 * ) ; + - gpio_holdover[34] ( PIN gpio_holdover[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1368095 ) ( 280 * ) ; + - gpio_dm2[34] ( PIN gpio_dm2[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1371315 ) ( 280 * ) ; + - gpio_analog_sel[34] ( PIN gpio_analog_sel[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1374535 ) ( 280 * ) ; + - gpio_inp_dis[34] ( PIN gpio_inp_dis[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1386955 ) ( 280 * ) ; + - gpio_analog_pol[34] ( PIN gpio_analog_pol[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1389715 ) ( 280 * ) ; + - gpio_dm0[34] ( PIN gpio_dm0[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1392935 ) ( 280 * ) ; + - gpio_analog_en[34] ( PIN gpio_analog_en[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1396155 ) ( 280 * ) ; + - analog_noesd_io[34] ( PIN analog_noesd_io[34] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 1398920 ) ( 280 * ) ; + - gpio_dm1[34] ( PIN gpio_dm1[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1402135 ) ( 280 * ) ; + - analog_io[34] ( PIN analog_io[34] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 1408120 ) ( 280 * ) ; + - gpio_slow_sel[34] ( PIN gpio_slow_sel[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1411335 ) ( 280 * ) ; + - gpio_in[34] ( PIN gpio_in[34] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1420535 ) ( 280 * ) ; + - gpio_in[5] ( PIN gpio_in[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1421095 ) ( 3168750 * ) ; + - gpio_slow_sel[5] ( PIN gpio_slow_sel[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1430295 ) ( 3168750 * ) ; + - analog_io[5] ( PIN analog_io[5] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 1433510 ) ( 3168750 * ) ; + - gpio_dm1[5] ( PIN gpio_dm1[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1439495 ) ( 3168750 * ) ; + - analog_noesd_io[5] ( PIN analog_noesd_io[5] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 1442710 ) ( 3168750 * ) ; + - gpio_analog_en[5] ( PIN gpio_analog_en[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1445475 ) ( 3168750 * ) ; + - gpio_dm0[5] ( PIN gpio_dm0[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1448695 ) ( 3168750 * ) ; + - gpio_analog_pol[5] ( PIN gpio_analog_pol[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1451915 ) ( 3168750 * ) ; + - gpio_inp_dis[5] ( PIN gpio_inp_dis[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1454675 ) ( 3168750 * ) ; + - gpio_analog_sel[5] ( PIN gpio_analog_sel[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1467095 ) ( 3168750 * ) ; + - gpio_dm2[5] ( PIN gpio_dm2[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1470315 ) ( 3168750 * ) ; + - gpio_holdover[5] ( PIN gpio_holdover[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1473535 ) ( 3168750 * ) ; + - gpio_out[5] ( PIN gpio_out[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1476295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[5] ( PIN gpio_vtrip_sel[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1485495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[5] ( PIN gpio_ib_mode_sel[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1488715 ) ( 3168750 * ) ; + - gpio_oeb[5] ( PIN gpio_oeb[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1491935 ) ( 3168750 * ) ; + - gpio_in_h[5] ( PIN gpio_in_h[5] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1494695 ) ( 3168750 * ) ; + - gpio_loopback_one[5] ( PIN gpio_loopback_one[5] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1505180 ) ( 3168630 * ) ; + - gpio_loopback_zero[5] ( PIN gpio_loopback_zero[5] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1515185 ) ( 3168630 * ) ; + - gpio_loopback_zero[33] ( PIN gpio_loopback_zero[33] ) + + ROUTED met3 ( -1850 1523370 ) ( 130 * ) ; + - gpio_loopback_one[33] ( PIN gpio_loopback_one[33] ) + + ROUTED met3 ( -1850 1533370 ) ( 130 * ) ; + - gpio_in_h[33] ( PIN gpio_in_h[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1562935 ) ( 280 * ) ; + - gpio_oeb[33] ( PIN gpio_oeb[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1565695 ) ( 280 * ) ; + - gpio_ib_mode_sel[33] ( PIN gpio_ib_mode_sel[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1568915 ) ( 280 * ) ; + - gpio_vtrip_sel[33] ( PIN gpio_vtrip_sel[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1572135 ) ( 280 * ) ; + - gpio_out[33] ( PIN gpio_out[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1581335 ) ( 280 * ) ; + - gpio_holdover[33] ( PIN gpio_holdover[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1584095 ) ( 280 * ) ; + - gpio_dm2[33] ( PIN gpio_dm2[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1587315 ) ( 280 * ) ; + - gpio_analog_sel[33] ( PIN gpio_analog_sel[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1590535 ) ( 280 * ) ; + - gpio_inp_dis[33] ( PIN gpio_inp_dis[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1602955 ) ( 280 * ) ; + - gpio_analog_pol[33] ( PIN gpio_analog_pol[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1605715 ) ( 280 * ) ; + - gpio_dm0[33] ( PIN gpio_dm0[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1608935 ) ( 280 * ) ; + - gpio_analog_en[33] ( PIN gpio_analog_en[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1612155 ) ( 280 * ) ; + - analog_noesd_io[33] ( PIN analog_noesd_io[33] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 1614920 ) ( 280 * ) ; + - gpio_dm1[33] ( PIN gpio_dm1[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1618135 ) ( 280 * ) ; + - analog_io[33] ( PIN analog_io[33] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 1624120 ) ( 280 * ) ; + - gpio_slow_sel[33] ( PIN gpio_slow_sel[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1627335 ) ( 280 * ) ; + - gpio_in[33] ( PIN gpio_in[33] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1636535 ) ( 280 * ) ; + - gpio_in[6] ( PIN gpio_in[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1647095 ) ( 3168750 * ) ; + - gpio_slow_sel[6] ( PIN gpio_slow_sel[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1656295 ) ( 3168750 * ) ; + - analog_io[6] ( PIN analog_io[6] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 1659510 ) ( 3168750 * ) ; + - gpio_dm1[6] ( PIN gpio_dm1[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1665495 ) ( 3168750 * ) ; + - analog_noesd_io[6] ( PIN analog_noesd_io[6] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 1668710 ) ( 3168750 * ) ; + - gpio_analog_en[6] ( PIN gpio_analog_en[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1671475 ) ( 3168750 * ) ; + - gpio_dm0[6] ( PIN gpio_dm0[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1674695 ) ( 3168750 * ) ; + - gpio_analog_pol[6] ( PIN gpio_analog_pol[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1677915 ) ( 3168750 * ) ; + - gpio_inp_dis[6] ( PIN gpio_inp_dis[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1680675 ) ( 3168750 * ) ; + - gpio_analog_sel[6] ( PIN gpio_analog_sel[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1693095 ) ( 3168750 * ) ; + - gpio_dm2[6] ( PIN gpio_dm2[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1696315 ) ( 3168750 * ) ; + - gpio_holdover[6] ( PIN gpio_holdover[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1699535 ) ( 3168750 * ) ; + - gpio_out[6] ( PIN gpio_out[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1702295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[6] ( PIN gpio_vtrip_sel[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1711495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[6] ( PIN gpio_ib_mode_sel[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1714715 ) ( 3168750 * ) ; + - gpio_oeb[6] ( PIN gpio_oeb[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1717935 ) ( 3168750 * ) ; + - gpio_in_h[6] ( PIN gpio_in_h[6] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1720695 ) ( 3168750 * ) ; + - gpio_loopback_one[6] ( PIN gpio_loopback_one[6] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1730180 ) ( 3168630 * ) ; + - gpio_loopback_zero[32] ( PIN gpio_loopback_zero[32] ) + + ROUTED met3 ( -1850 1738370 ) ( 130 * ) ; + - gpio_loopback_zero[6] ( PIN gpio_loopback_zero[6] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1740185 ) ( 3168630 * ) ; + - gpio_loopback_one[32] ( PIN gpio_loopback_one[32] ) + + ROUTED met3 ( -1850 1748370 ) ( 130 * ) ; + - gpio_in_h[32] ( PIN gpio_in_h[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1778935 ) ( 280 * ) ; + - gpio_oeb[32] ( PIN gpio_oeb[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1781695 ) ( 280 * ) ; + - gpio_ib_mode_sel[32] ( PIN gpio_ib_mode_sel[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1784915 ) ( 280 * ) ; + - gpio_vtrip_sel[32] ( PIN gpio_vtrip_sel[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1788135 ) ( 280 * ) ; + - gpio_out[32] ( PIN gpio_out[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1797335 ) ( 280 * ) ; + - gpio_holdover[32] ( PIN gpio_holdover[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1800095 ) ( 280 * ) ; + - gpio_dm2[32] ( PIN gpio_dm2[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1803315 ) ( 280 * ) ; + - gpio_analog_sel[32] ( PIN gpio_analog_sel[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1806535 ) ( 280 * ) ; + - gpio_inp_dis[32] ( PIN gpio_inp_dis[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1818955 ) ( 280 * ) ; + - gpio_analog_pol[32] ( PIN gpio_analog_pol[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1821715 ) ( 280 * ) ; + - gpio_dm0[32] ( PIN gpio_dm0[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1824935 ) ( 280 * ) ; + - gpio_analog_en[32] ( PIN gpio_analog_en[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1828155 ) ( 280 * ) ; + - analog_noesd_io[32] ( PIN analog_noesd_io[32] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 1830920 ) ( 280 * ) ; + - gpio_dm1[32] ( PIN gpio_dm1[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1834135 ) ( 280 * ) ; + - analog_io[32] ( PIN analog_io[32] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 1840120 ) ( 280 * ) ; + - gpio_slow_sel[32] ( PIN gpio_slow_sel[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1843335 ) ( 280 * ) ; + - gpio_in[32] ( PIN gpio_in[32] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1852535 ) ( 280 * ) ; + - vssa1 ( PIN vssa1 ) + + ROUTED met3 TAPERRULE met3_width_2500 ( 3167600 1868030 ) ( * 1891930 ) + NEW met3 TAPERRULE met3_width_2500 ( 3167600 1917920 ) ( * 1941820 ) + NEW met3 TAPERRULE met3_width_2500 ( 2717710 4767600 ) ( 2741610 * ) + NEW met3 TAPERRULE met3_width_2500 ( 2667810 4767600 ) ( 2691710 * ) ; + - vssd2 ( PIN vssd2 ) + + ROUTED met3 TAPERRULE met3_width_2500 ( -970 1993810 ) ( * 2017810 ) + NEW met3 TAPERRULE met3_width_2500 ( -970 2044070 ) ( * 2068020 ) + NEW met3 TAPERRULE met3_width_2500 ( -970 4375270 ) ( * 4398580 ) ; + - vccd2 ( PIN vccd2 ) + + ROUTED met3 TAPERRULE met3_width_2500 ( -970 2019310 ) ( * 2042570 ) + NEW met3 TAPERRULE met3_width_2500 ( -970 4349820 ) ( * 4373820 ) + NEW met3 TAPERRULE met3_width_2500 ( -970 4400070 ) ( * 4424020 ) ; + - vssd1 ( PIN vssd1 ) + + ROUTED met3 TAPERRULE met3_width_2500 ( 3167600 2088610 ) ( * 2112560 ) + NEW met3 TAPERRULE met3_width_2500 ( 3167600 2138810 ) ( * 2162810 ) ; + - vccd1 ( PIN vccd1 ) + + ROUTED met3 TAPERRULE met3_width_2500 ( 3167600 2114050 ) ( * 2137360 ) ; + - vdda2 ( PIN vdda2 ) + + ROUTED met3 TAPERRULE met3_width_2500 ( -970 2204810 ) ( * 2228710 ) + NEW met3 TAPERRULE met3_width_2500 ( -970 2254700 ) ( * 2278600 ) ; + - vdda1 ( PIN vdda1 ) + + ROUTED met3 TAPERRULE met3_width_2500 ( 3167600 2309020 ) ( * 2332920 ) + NEW met3 TAPERRULE met3_width_2500 ( 3167600 2358920 ) ( * 2382820 ) + NEW met3 TAPERRULE met3_width_2500 ( 3167600 3882030 ) ( * 3905930 ) + NEW met3 TAPERRULE met3_width_2500 ( 3167600 3931920 ) ( * 3955820 ) ; + - gpio_loopback_zero[31] ( PIN gpio_loopback_zero[31] ) + + ROUTED met3 ( -1850 2383370 ) ( 130 * ) ; + - gpio_loopback_one[31] ( PIN gpio_loopback_one[31] ) + + ROUTED met3 ( -1850 2393370 ) ( 130 * ) ; + - gpio_in_h[31] ( PIN gpio_in_h[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2416935 ) ( 280 * ) ; + - gpio_oeb[31] ( PIN gpio_oeb[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2419695 ) ( 280 * ) ; + - gpio_ib_mode_sel[31] ( PIN gpio_ib_mode_sel[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2422915 ) ( 280 * ) ; + - gpio_vtrip_sel[31] ( PIN gpio_vtrip_sel[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2426135 ) ( 280 * ) ; + - gpio_out[31] ( PIN gpio_out[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2435335 ) ( 280 * ) ; + - gpio_holdover[31] ( PIN gpio_holdover[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2438095 ) ( 280 * ) ; + - gpio_dm2[31] ( PIN gpio_dm2[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2441315 ) ( 280 * ) ; + - gpio_analog_sel[31] ( PIN gpio_analog_sel[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2444535 ) ( 280 * ) ; + - gpio_inp_dis[31] ( PIN gpio_inp_dis[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2456955 ) ( 280 * ) ; + - gpio_analog_pol[31] ( PIN gpio_analog_pol[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2459715 ) ( 280 * ) ; + - gpio_dm0[31] ( PIN gpio_dm0[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2462935 ) ( 280 * ) ; + - gpio_analog_en[31] ( PIN gpio_analog_en[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2466155 ) ( 280 * ) ; + - analog_noesd_io[31] ( PIN analog_noesd_io[31] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 2468920 ) ( 280 * ) ; + - gpio_dm1[31] ( PIN gpio_dm1[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2472135 ) ( 280 * ) ; + - analog_io[31] ( PIN analog_io[31] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 2478120 ) ( 280 * ) ; + - gpio_slow_sel[31] ( PIN gpio_slow_sel[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2481335 ) ( 280 * ) ; + - gpio_in[31] ( PIN gpio_in[31] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2490535 ) ( 280 * ) ; + - gpio_in[7] ( PIN gpio_in[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2533095 ) ( 3168750 * ) ; + - gpio_slow_sel[7] ( PIN gpio_slow_sel[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2542295 ) ( 3168750 * ) ; + - analog_io[7] ( PIN analog_io[7] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 2545510 ) ( 3168750 * ) ; + - gpio_dm1[7] ( PIN gpio_dm1[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2551495 ) ( 3168750 * ) ; + - analog_noesd_io[7] ( PIN analog_noesd_io[7] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 2554710 ) ( 3168750 * ) ; + - gpio_analog_en[7] ( PIN gpio_analog_en[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2557475 ) ( 3168750 * ) ; + - gpio_dm0[7] ( PIN gpio_dm0[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2560695 ) ( 3168750 * ) ; + - gpio_analog_pol[7] ( PIN gpio_analog_pol[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2563915 ) ( 3168750 * ) ; + - gpio_inp_dis[7] ( PIN gpio_inp_dis[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2566675 ) ( 3168750 * ) ; + - gpio_analog_sel[7] ( PIN gpio_analog_sel[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2579095 ) ( 3168750 * ) ; + - gpio_dm2[7] ( PIN gpio_dm2[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2582315 ) ( 3168750 * ) ; + - gpio_holdover[7] ( PIN gpio_holdover[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2585535 ) ( 3168750 * ) ; + - gpio_out[7] ( PIN gpio_out[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2588295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[7] ( PIN gpio_vtrip_sel[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2597495 ) ( 3168750 * ) ; + - gpio_loopback_zero[30] ( PIN gpio_loopback_zero[30] ) + + ROUTED met3 ( -1850 2598370 ) ( 130 * ) ; + - gpio_ib_mode_sel[7] ( PIN gpio_ib_mode_sel[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2600715 ) ( 3168750 * ) ; + - gpio_oeb[7] ( PIN gpio_oeb[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2603935 ) ( 3168750 * ) ; + - gpio_in_h[7] ( PIN gpio_in_h[7] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2606695 ) ( 3168750 * ) ; + - gpio_loopback_one[30] ( PIN gpio_loopback_one[30] ) + + ROUTED met3 ( -1850 2608370 ) ( 130 * ) ; + - gpio_loopback_one[7] ( PIN gpio_loopback_one[7] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 2615180 ) ( 3168630 * ) ; + - gpio_loopback_zero[7] ( PIN gpio_loopback_zero[7] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 2625185 ) ( 3168630 * ) ; + - gpio_in_h[30] ( PIN gpio_in_h[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2632935 ) ( 280 * ) ; + - gpio_oeb[30] ( PIN gpio_oeb[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2635695 ) ( 280 * ) ; + - gpio_ib_mode_sel[30] ( PIN gpio_ib_mode_sel[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2638915 ) ( 280 * ) ; + - gpio_vtrip_sel[30] ( PIN gpio_vtrip_sel[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2642135 ) ( 280 * ) ; + - gpio_out[30] ( PIN gpio_out[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2651335 ) ( 280 * ) ; + - gpio_holdover[30] ( PIN gpio_holdover[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2654095 ) ( 280 * ) ; + - gpio_dm2[30] ( PIN gpio_dm2[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2657315 ) ( 280 * ) ; + - gpio_analog_sel[30] ( PIN gpio_analog_sel[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2660535 ) ( 280 * ) ; + - gpio_inp_dis[30] ( PIN gpio_inp_dis[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2672955 ) ( 280 * ) ; + - gpio_analog_pol[30] ( PIN gpio_analog_pol[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2675715 ) ( 280 * ) ; + - gpio_dm0[30] ( PIN gpio_dm0[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2678935 ) ( 280 * ) ; + - gpio_analog_en[30] ( PIN gpio_analog_en[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2682155 ) ( 280 * ) ; + - analog_noesd_io[30] ( PIN analog_noesd_io[30] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 2684920 ) ( 280 * ) ; + - gpio_dm1[30] ( PIN gpio_dm1[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2688135 ) ( 280 * ) ; + - analog_io[30] ( PIN analog_io[30] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 2694120 ) ( 280 * ) ; + - gpio_slow_sel[30] ( PIN gpio_slow_sel[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2697335 ) ( 280 * ) ; + - gpio_in[30] ( PIN gpio_in[30] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2706535 ) ( 280 * ) ; + - gpio_in[8] ( PIN gpio_in[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2759095 ) ( 3168750 * ) ; + - gpio_slow_sel[8] ( PIN gpio_slow_sel[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2768295 ) ( 3168750 * ) ; + - analog_io[8] ( PIN analog_io[8] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 2771510 ) ( 3168750 * ) ; + - gpio_dm1[8] ( PIN gpio_dm1[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2777495 ) ( 3168750 * ) ; + - analog_noesd_io[8] ( PIN analog_noesd_io[8] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 2780710 ) ( 3168750 * ) ; + - gpio_analog_en[8] ( PIN gpio_analog_en[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2783475 ) ( 3168750 * ) ; + - gpio_dm0[8] ( PIN gpio_dm0[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2786695 ) ( 3168750 * ) ; + - gpio_analog_pol[8] ( PIN gpio_analog_pol[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2789915 ) ( 3168750 * ) ; + - gpio_inp_dis[8] ( PIN gpio_inp_dis[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2792675 ) ( 3168750 * ) ; + - gpio_analog_sel[8] ( PIN gpio_analog_sel[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2805095 ) ( 3168750 * ) ; + - gpio_dm2[8] ( PIN gpio_dm2[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2808315 ) ( 3168750 * ) ; + - gpio_holdover[8] ( PIN gpio_holdover[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2811535 ) ( 3168750 * ) ; + - gpio_loopback_zero[29] ( PIN gpio_loopback_zero[29] ) + + ROUTED met3 ( -1850 2813370 ) ( 130 * ) ; + - gpio_out[8] ( PIN gpio_out[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2814295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[8] ( PIN gpio_vtrip_sel[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2823495 ) ( 3168750 * ) ; + - gpio_loopback_one[29] ( PIN gpio_loopback_one[29] ) + + ROUTED met3 ( -1850 2823370 ) ( 130 * ) ; + - gpio_ib_mode_sel[8] ( PIN gpio_ib_mode_sel[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2826715 ) ( 3168750 * ) ; + - gpio_oeb[8] ( PIN gpio_oeb[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2829935 ) ( 3168750 * ) ; + - gpio_in_h[8] ( PIN gpio_in_h[8] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2832695 ) ( 3168750 * ) ; + - gpio_loopback_one[8] ( PIN gpio_loopback_one[8] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 2840185 ) ( 3168630 * ) ; + - gpio_in_h[29] ( PIN gpio_in_h[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2848935 ) ( 280 * ) ; + - gpio_loopback_zero[8] ( PIN gpio_loopback_zero[8] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 2850185 ) ( 3168630 * ) ; + - gpio_oeb[29] ( PIN gpio_oeb[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2851695 ) ( 280 * ) ; + - gpio_ib_mode_sel[29] ( PIN gpio_ib_mode_sel[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2854915 ) ( 280 * ) ; + - gpio_vtrip_sel[29] ( PIN gpio_vtrip_sel[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2858135 ) ( 280 * ) ; + - gpio_out[29] ( PIN gpio_out[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2867335 ) ( 280 * ) ; + - gpio_holdover[29] ( PIN gpio_holdover[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2870095 ) ( 280 * ) ; + - gpio_dm2[29] ( PIN gpio_dm2[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2873315 ) ( 280 * ) ; + - gpio_analog_sel[29] ( PIN gpio_analog_sel[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2876535 ) ( 280 * ) ; + - gpio_inp_dis[29] ( PIN gpio_inp_dis[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2888955 ) ( 280 * ) ; + - gpio_analog_pol[29] ( PIN gpio_analog_pol[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2891715 ) ( 280 * ) ; + - gpio_dm0[29] ( PIN gpio_dm0[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2894935 ) ( 280 * ) ; + - gpio_analog_en[29] ( PIN gpio_analog_en[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2898155 ) ( 280 * ) ; + - analog_noesd_io[29] ( PIN analog_noesd_io[29] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 2900920 ) ( 280 * ) ; + - gpio_dm1[29] ( PIN gpio_dm1[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2904135 ) ( 280 * ) ; + - analog_io[29] ( PIN analog_io[29] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 2910120 ) ( 280 * ) ; + - gpio_slow_sel[29] ( PIN gpio_slow_sel[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2913335 ) ( 280 * ) ; + - gpio_in[29] ( PIN gpio_in[29] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2922535 ) ( 280 * ) ; + - gpio_in[9] ( PIN gpio_in[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2984095 ) ( 3168750 * ) ; + - gpio_slow_sel[9] ( PIN gpio_slow_sel[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2993295 ) ( 3168750 * ) ; + - analog_io[9] ( PIN analog_io[9] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 2996510 ) ( 3168750 * ) ; + - gpio_dm1[9] ( PIN gpio_dm1[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3002495 ) ( 3168750 * ) ; + - analog_noesd_io[9] ( PIN analog_noesd_io[9] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 3005710 ) ( 3168750 * ) ; + - gpio_analog_en[9] ( PIN gpio_analog_en[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3008475 ) ( 3168750 * ) ; + - gpio_dm0[9] ( PIN gpio_dm0[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3011695 ) ( 3168750 * ) ; + - gpio_analog_pol[9] ( PIN gpio_analog_pol[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3014915 ) ( 3168750 * ) ; + - gpio_inp_dis[9] ( PIN gpio_inp_dis[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3017675 ) ( 3168750 * ) ; + - gpio_loopback_zero[28] ( PIN gpio_loopback_zero[28] ) + + ROUTED met3 ( -1850 3028370 ) ( 130 * ) ; + - gpio_analog_sel[9] ( PIN gpio_analog_sel[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3030095 ) ( 3168750 * ) ; + - gpio_dm2[9] ( PIN gpio_dm2[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3033315 ) ( 3168750 * ) ; + - gpio_holdover[9] ( PIN gpio_holdover[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3036535 ) ( 3168750 * ) ; + - gpio_loopback_one[28] ( PIN gpio_loopback_one[28] ) + + ROUTED met3 ( -1850 3038370 ) ( 130 * ) ; + - gpio_out[9] ( PIN gpio_out[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3039295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[9] ( PIN gpio_vtrip_sel[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3048495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[9] ( PIN gpio_ib_mode_sel[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3051715 ) ( 3168750 * ) ; + - gpio_oeb[9] ( PIN gpio_oeb[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3054935 ) ( 3168750 * ) ; + - gpio_in_h[9] ( PIN gpio_in_h[9] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3057695 ) ( 3168750 * ) ; + - gpio_loopback_one[9] ( PIN gpio_loopback_one[9] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3065185 ) ( 3168630 * ) ; + - gpio_in_h[28] ( PIN gpio_in_h[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3064935 ) ( 280 * ) ; + - gpio_oeb[28] ( PIN gpio_oeb[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3067695 ) ( 280 * ) ; + - gpio_ib_mode_sel[28] ( PIN gpio_ib_mode_sel[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3070915 ) ( 280 * ) ; + - gpio_vtrip_sel[28] ( PIN gpio_vtrip_sel[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3074135 ) ( 280 * ) ; + - gpio_loopback_zero[9] ( PIN gpio_loopback_zero[9] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3075185 ) ( 3168630 * ) ; + - gpio_out[28] ( PIN gpio_out[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3083335 ) ( 280 * ) ; + - gpio_holdover[28] ( PIN gpio_holdover[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3086095 ) ( 280 * ) ; + - gpio_dm2[28] ( PIN gpio_dm2[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3089315 ) ( 280 * ) ; + - gpio_analog_sel[28] ( PIN gpio_analog_sel[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3092535 ) ( 280 * ) ; + - gpio_inp_dis[28] ( PIN gpio_inp_dis[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3104955 ) ( 280 * ) ; + - gpio_analog_pol[28] ( PIN gpio_analog_pol[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3107715 ) ( 280 * ) ; + - gpio_dm0[28] ( PIN gpio_dm0[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3110935 ) ( 280 * ) ; + - gpio_analog_en[28] ( PIN gpio_analog_en[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3114155 ) ( 280 * ) ; + - analog_noesd_io[28] ( PIN analog_noesd_io[28] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 3116920 ) ( 280 * ) ; + - gpio_dm1[28] ( PIN gpio_dm1[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3120135 ) ( 280 * ) ; + - analog_io[28] ( PIN analog_io[28] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 3126120 ) ( 280 * ) ; + - gpio_slow_sel[28] ( PIN gpio_slow_sel[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3129335 ) ( 280 * ) ; + - gpio_in[28] ( PIN gpio_in[28] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3138535 ) ( 280 * ) ; + - gpio_in[10] ( PIN gpio_in[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3210095 ) ( 3168750 * ) ; + - gpio_slow_sel[10] ( PIN gpio_slow_sel[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3219295 ) ( 3168750 * ) ; + - analog_io[10] ( PIN analog_io[10] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 3222510 ) ( 3168750 * ) ; + - gpio_dm1[10] ( PIN gpio_dm1[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3228495 ) ( 3168750 * ) ; + - analog_noesd_io[10] ( PIN analog_noesd_io[10] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 3231710 ) ( 3168750 * ) ; + - gpio_analog_en[10] ( PIN gpio_analog_en[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3234475 ) ( 3168750 * ) ; + - gpio_dm0[10] ( PIN gpio_dm0[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3237695 ) ( 3168750 * ) ; + - gpio_analog_pol[10] ( PIN gpio_analog_pol[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3240915 ) ( 3168750 * ) ; + - gpio_inp_dis[10] ( PIN gpio_inp_dis[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3243675 ) ( 3168750 * ) ; + - gpio_loopback_zero[27] ( PIN gpio_loopback_zero[27] ) + + ROUTED met3 ( -1850 3243370 ) ( 130 * ) ; + - gpio_loopback_one[27] ( PIN gpio_loopback_one[27] ) + + ROUTED met3 ( -1850 3253370 ) ( 130 * ) ; + - gpio_analog_sel[10] ( PIN gpio_analog_sel[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3256095 ) ( 3168750 * ) ; + - gpio_dm2[10] ( PIN gpio_dm2[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3259315 ) ( 3168750 * ) ; + - gpio_holdover[10] ( PIN gpio_holdover[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3262535 ) ( 3168750 * ) ; + - gpio_out[10] ( PIN gpio_out[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3265295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[10] ( PIN gpio_vtrip_sel[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3274495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[10] ( PIN gpio_ib_mode_sel[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3277715 ) ( 3168750 * ) ; + - gpio_oeb[10] ( PIN gpio_oeb[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3280935 ) ( 3168750 * ) ; + - gpio_in_h[27] ( PIN gpio_in_h[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3280935 ) ( 280 * ) ; + - gpio_in_h[10] ( PIN gpio_in_h[10] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3283695 ) ( 3168750 * ) ; + - gpio_oeb[27] ( PIN gpio_oeb[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3283695 ) ( 280 * ) ; + - gpio_ib_mode_sel[27] ( PIN gpio_ib_mode_sel[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3286915 ) ( 280 * ) ; + - gpio_loopback_one[10] ( PIN gpio_loopback_one[10] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3290185 ) ( 3168630 * ) ; + - gpio_vtrip_sel[27] ( PIN gpio_vtrip_sel[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3290135 ) ( 280 * ) ; + - gpio_out[27] ( PIN gpio_out[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3299335 ) ( 280 * ) ; + - gpio_loopback_zero[10] ( PIN gpio_loopback_zero[10] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3300185 ) ( 3168630 * ) ; + - gpio_holdover[27] ( PIN gpio_holdover[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3302095 ) ( 280 * ) ; + - gpio_dm2[27] ( PIN gpio_dm2[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3305315 ) ( 280 * ) ; + - gpio_analog_sel[27] ( PIN gpio_analog_sel[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3308535 ) ( 280 * ) ; + - gpio_inp_dis[27] ( PIN gpio_inp_dis[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3320955 ) ( 280 * ) ; + - gpio_analog_pol[27] ( PIN gpio_analog_pol[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3323715 ) ( 280 * ) ; + - gpio_dm0[27] ( PIN gpio_dm0[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3326935 ) ( 280 * ) ; + - gpio_analog_en[27] ( PIN gpio_analog_en[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3330155 ) ( 280 * ) ; + - analog_noesd_io[27] ( PIN analog_noesd_io[27] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 3332920 ) ( 280 * ) ; + - gpio_dm1[27] ( PIN gpio_dm1[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3336135 ) ( 280 * ) ; + - analog_io[27] ( PIN analog_io[27] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 3342120 ) ( 280 * ) ; + - gpio_slow_sel[27] ( PIN gpio_slow_sel[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3345335 ) ( 280 * ) ; + - gpio_in[27] ( PIN gpio_in[27] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3354535 ) ( 280 * ) ; + - gpio_in[11] ( PIN gpio_in[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3435095 ) ( 3168750 * ) ; + - gpio_slow_sel[11] ( PIN gpio_slow_sel[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3444295 ) ( 3168750 * ) ; + - analog_io[11] ( PIN analog_io[11] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 3447510 ) ( 3168750 * ) ; + - gpio_dm1[11] ( PIN gpio_dm1[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3453495 ) ( 3168750 * ) ; + - analog_noesd_io[11] ( PIN analog_noesd_io[11] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 3456710 ) ( 3168750 * ) ; + - gpio_loopback_zero[26] ( PIN gpio_loopback_zero[26] ) + + ROUTED met3 ( -1850 3458370 ) ( 130 * ) ; + - gpio_analog_en[11] ( PIN gpio_analog_en[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3459475 ) ( 3168750 * ) ; + - gpio_dm0[11] ( PIN gpio_dm0[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3462695 ) ( 3168750 * ) ; + - gpio_analog_pol[11] ( PIN gpio_analog_pol[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3465915 ) ( 3168750 * ) ; + - gpio_inp_dis[11] ( PIN gpio_inp_dis[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3468675 ) ( 3168750 * ) ; + - gpio_loopback_one[26] ( PIN gpio_loopback_one[26] ) + + ROUTED met3 ( -1850 3468370 ) ( 130 * ) ; + - gpio_analog_sel[11] ( PIN gpio_analog_sel[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3481095 ) ( 3168750 * ) ; + - gpio_dm2[11] ( PIN gpio_dm2[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3484315 ) ( 3168750 * ) ; + - gpio_holdover[11] ( PIN gpio_holdover[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3487535 ) ( 3168750 * ) ; + - gpio_out[11] ( PIN gpio_out[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3490295 ) ( 3168750 * ) ; + - gpio_in_h[26] ( PIN gpio_in_h[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3496935 ) ( 280 * ) ; + - gpio_vtrip_sel[11] ( PIN gpio_vtrip_sel[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3499495 ) ( 3168750 * ) ; + - gpio_oeb[26] ( PIN gpio_oeb[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3499695 ) ( 280 * ) ; + - gpio_ib_mode_sel[11] ( PIN gpio_ib_mode_sel[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3502715 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[26] ( PIN gpio_ib_mode_sel[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3502915 ) ( 280 * ) ; + - gpio_oeb[11] ( PIN gpio_oeb[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3505935 ) ( 3168750 * ) ; + - gpio_vtrip_sel[26] ( PIN gpio_vtrip_sel[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3506135 ) ( 280 * ) ; + - gpio_in_h[11] ( PIN gpio_in_h[11] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3508695 ) ( 3168750 * ) ; + - gpio_loopback_one[11] ( PIN gpio_loopback_one[11] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3515185 ) ( 3168630 * ) ; + - gpio_out[26] ( PIN gpio_out[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3515335 ) ( 280 * ) ; + - gpio_holdover[26] ( PIN gpio_holdover[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3518095 ) ( 280 * ) ; + - gpio_dm2[26] ( PIN gpio_dm2[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3521315 ) ( 280 * ) ; + - gpio_analog_sel[26] ( PIN gpio_analog_sel[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3524535 ) ( 280 * ) ; + - gpio_loopback_zero[11] ( PIN gpio_loopback_zero[11] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3525185 ) ( 3168630 * ) ; + - gpio_inp_dis[26] ( PIN gpio_inp_dis[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3536955 ) ( 280 * ) ; + - gpio_analog_pol[26] ( PIN gpio_analog_pol[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3539715 ) ( 280 * ) ; + - gpio_dm0[26] ( PIN gpio_dm0[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3542935 ) ( 280 * ) ; + - gpio_analog_en[26] ( PIN gpio_analog_en[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3546155 ) ( 280 * ) ; + - analog_noesd_io[26] ( PIN analog_noesd_io[26] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 3548920 ) ( 280 * ) ; + - gpio_dm1[26] ( PIN gpio_dm1[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3552135 ) ( 280 * ) ; + - analog_io[26] ( PIN analog_io[26] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 3558120 ) ( 280 * ) ; + - gpio_slow_sel[26] ( PIN gpio_slow_sel[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3561335 ) ( 280 * ) ; + - gpio_in[26] ( PIN gpio_in[26] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3570535 ) ( 280 * ) ; + - gpio_in[12] ( PIN gpio_in[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3660095 ) ( 3168750 * ) ; + - gpio_slow_sel[12] ( PIN gpio_slow_sel[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3669295 ) ( 3168750 * ) ; + - analog_io[12] ( PIN analog_io[12] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 3672510 ) ( 3168750 * ) ; + - gpio_loopback_zero[25] ( PIN gpio_loopback_zero[25] ) + + ROUTED met3 ( -1850 3673370 ) ( 130 * ) ; + - gpio_dm1[12] ( PIN gpio_dm1[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3678495 ) ( 3168750 * ) ; + - analog_noesd_io[12] ( PIN analog_noesd_io[12] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 3681710 ) ( 3168750 * ) ; + - gpio_loopback_one[25] ( PIN gpio_loopback_one[25] ) + + ROUTED met3 ( -1850 3683370 ) ( 130 * ) ; + - gpio_analog_en[12] ( PIN gpio_analog_en[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3684475 ) ( 3168750 * ) ; + - gpio_dm0[12] ( PIN gpio_dm0[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3687695 ) ( 3168750 * ) ; + - gpio_analog_pol[12] ( PIN gpio_analog_pol[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3690915 ) ( 3168750 * ) ; + - gpio_inp_dis[12] ( PIN gpio_inp_dis[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3693675 ) ( 3168750 * ) ; + - gpio_analog_sel[12] ( PIN gpio_analog_sel[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3706095 ) ( 3168750 * ) ; + - gpio_dm2[12] ( PIN gpio_dm2[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3709315 ) ( 3168750 * ) ; + - gpio_holdover[12] ( PIN gpio_holdover[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3712535 ) ( 3168750 * ) ; + - gpio_in_h[25] ( PIN gpio_in_h[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3712935 ) ( 280 * ) ; + - gpio_out[12] ( PIN gpio_out[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3715295 ) ( 3168750 * ) ; + - gpio_oeb[25] ( PIN gpio_oeb[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3715695 ) ( 280 * ) ; + - gpio_ib_mode_sel[25] ( PIN gpio_ib_mode_sel[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3718915 ) ( 280 * ) ; + - gpio_vtrip_sel[25] ( PIN gpio_vtrip_sel[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3722135 ) ( 280 * ) ; + - gpio_vtrip_sel[12] ( PIN gpio_vtrip_sel[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3724495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[12] ( PIN gpio_ib_mode_sel[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3727715 ) ( 3168750 * ) ; + - gpio_oeb[12] ( PIN gpio_oeb[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3730935 ) ( 3168750 * ) ; + - gpio_out[25] ( PIN gpio_out[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3731335 ) ( 280 * ) ; + - gpio_in_h[12] ( PIN gpio_in_h[12] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3733695 ) ( 3168750 * ) ; + - gpio_holdover[25] ( PIN gpio_holdover[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3734095 ) ( 280 * ) ; + - gpio_dm2[25] ( PIN gpio_dm2[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3737315 ) ( 280 * ) ; + - gpio_loopback_one[12] ( PIN gpio_loopback_one[12] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3740185 ) ( 3168630 * ) ; + - gpio_analog_sel[25] ( PIN gpio_analog_sel[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3740535 ) ( 280 * ) ; + - gpio_loopback_zero[12] ( PIN gpio_loopback_zero[12] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3750185 ) ( 3168630 * ) ; + - gpio_inp_dis[25] ( PIN gpio_inp_dis[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3752955 ) ( 280 * ) ; + - gpio_analog_pol[25] ( PIN gpio_analog_pol[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3755715 ) ( 280 * ) ; + - gpio_dm0[25] ( PIN gpio_dm0[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3758935 ) ( 280 * ) ; + - gpio_analog_en[25] ( PIN gpio_analog_en[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3762155 ) ( 280 * ) ; + - analog_noesd_io[25] ( PIN analog_noesd_io[25] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 3764920 ) ( 280 * ) ; + - gpio_dm1[25] ( PIN gpio_dm1[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3768135 ) ( 280 * ) ; + - analog_io[25] ( PIN analog_io[25] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 3774120 ) ( 280 * ) ; + - gpio_slow_sel[25] ( PIN gpio_slow_sel[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3777335 ) ( 280 * ) ; + - gpio_in[25] ( PIN gpio_in[25] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3786535 ) ( 280 * ) ; + - vssa2 ( PIN vssa2 ) + + ROUTED met3 TAPERRULE met3_width_2500 ( -970 3927810 ) ( * 3951710 ) + NEW met3 TAPERRULE met3_width_2500 ( -970 3977710 ) ( * 4001610 ) ; + - gpio_in[13] ( PIN gpio_in[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4106095 ) ( 3168750 * ) ; + - gpio_slow_sel[13] ( PIN gpio_slow_sel[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4115295 ) ( 3168750 * ) ; + - analog_io[13] ( PIN analog_io[13] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 4118510 ) ( 3168750 * ) ; + - gpio_dm1[13] ( PIN gpio_dm1[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4124495 ) ( 3168750 * ) ; + - analog_noesd_io[13] ( PIN analog_noesd_io[13] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 4127710 ) ( 3168750 * ) ; + - gpio_analog_en[13] ( PIN gpio_analog_en[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4130475 ) ( 3168750 * ) ; + - gpio_dm0[13] ( PIN gpio_dm0[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4133695 ) ( 3168750 * ) ; + - gpio_analog_pol[13] ( PIN gpio_analog_pol[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4136915 ) ( 3168750 * ) ; + - gpio_inp_dis[13] ( PIN gpio_inp_dis[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4139675 ) ( 3168750 * ) ; + - gpio_analog_sel[13] ( PIN gpio_analog_sel[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4152095 ) ( 3168750 * ) ; + - gpio_dm2[13] ( PIN gpio_dm2[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4155315 ) ( 3168750 * ) ; + - gpio_holdover[13] ( PIN gpio_holdover[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4158535 ) ( 3168750 * ) ; + - gpio_out[13] ( PIN gpio_out[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4161295 ) ( 3168750 * ) ; + - gpio_vtrip_sel[13] ( PIN gpio_vtrip_sel[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4170495 ) ( 3168750 * ) ; + - gpio_ib_mode_sel[13] ( PIN gpio_ib_mode_sel[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4173715 ) ( 3168750 * ) ; + - gpio_oeb[13] ( PIN gpio_oeb[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4176935 ) ( 3168750 * ) ; + - gpio_in_h[13] ( PIN gpio_in_h[13] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4179695 ) ( 3168750 * ) ; + - gpio_loopback_one[13] ( PIN gpio_loopback_one[13] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 4185185 ) ( 3168630 * ) ; + - gpio_loopback_zero[13] ( PIN gpio_loopback_zero[13] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 4195185 ) ( 3168630 * ) ; + - gpio_loopback_zero[24] ( PIN gpio_loopback_zero[24] ) + + ROUTED met3 ( -1850 4523370 ) ( 130 * ) ; + - gpio_loopback_one[24] ( PIN gpio_loopback_one[24] ) + + ROUTED met3 ( -1850 4533370 ) ( 130 * ) ; + - gpio_in[14] ( PIN gpio_in[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4552095 ) ( 3168750 * ) ; + - gpio_slow_sel[14] ( PIN gpio_slow_sel[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4561295 ) ( 3168750 * ) ; + - gpio_in_h[24] ( PIN gpio_in_h[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4561935 ) ( 280 * ) ; + - analog_io[14] ( PIN analog_io[14] ) + + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 4564510 ) ( 3168750 * ) ; + - gpio_oeb[24] ( PIN gpio_oeb[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4564695 ) ( 280 * ) ; + - gpio_ib_mode_sel[24] ( PIN gpio_ib_mode_sel[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4567915 ) ( 280 * ) ; + - gpio_dm1[14] ( PIN gpio_dm1[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4570495 ) ( 3168750 * ) ; + - gpio_vtrip_sel[24] ( PIN gpio_vtrip_sel[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4571135 ) ( 280 * ) ; + - analog_noesd_io[14] ( PIN analog_noesd_io[14] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 4573710 ) ( 3168750 * ) ; + - gpio_analog_en[14] ( PIN gpio_analog_en[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4576475 ) ( 3168750 * ) ; + - gpio_dm0[14] ( PIN gpio_dm0[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4579695 ) ( 3168750 * ) ; + - gpio_out[24] ( PIN gpio_out[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4580335 ) ( 280 * ) ; + - gpio_analog_pol[14] ( PIN gpio_analog_pol[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4582915 ) ( 3168750 * ) ; + - gpio_holdover[24] ( PIN gpio_holdover[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4583095 ) ( 280 * ) ; + - gpio_inp_dis[14] ( PIN gpio_inp_dis[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4585675 ) ( 3168750 * ) ; + - gpio_dm2[24] ( PIN gpio_dm2[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4586315 ) ( 280 * ) ; + - gpio_analog_sel[24] ( PIN gpio_analog_sel[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4589535 ) ( 280 * ) ; + - gpio_analog_sel[14] ( PIN gpio_analog_sel[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4598095 ) ( 3168750 * ) ; + - gpio_dm2[14] ( PIN gpio_dm2[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4601315 ) ( 3168750 * ) ; + - gpio_inp_dis[24] ( PIN gpio_inp_dis[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4601955 ) ( 280 * ) ; + - gpio_holdover[14] ( PIN gpio_holdover[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4604535 ) ( 3168750 * ) ; + - gpio_analog_pol[24] ( PIN gpio_analog_pol[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4604715 ) ( 280 * ) ; + - gpio_out[14] ( PIN gpio_out[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4607295 ) ( 3168750 * ) ; + - gpio_dm0[24] ( PIN gpio_dm0[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4607935 ) ( 280 * ) ; + - gpio_analog_en[24] ( PIN gpio_analog_en[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4611155 ) ( 280 * ) ; + - analog_noesd_io[24] ( PIN analog_noesd_io[24] ) + + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 4613920 ) ( 280 * ) ; + - gpio_vtrip_sel[14] ( PIN gpio_vtrip_sel[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4616495 ) ( 3168750 * ) ; + - gpio_dm1[24] ( PIN gpio_dm1[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4617135 ) ( 280 * ) ; + - gpio_ib_mode_sel[14] ( PIN gpio_ib_mode_sel[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4619715 ) ( 3168750 * ) ; + - gpio_oeb[14] ( PIN gpio_oeb[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4622935 ) ( 3168750 * ) ; + - analog_io[24] ( PIN analog_io[24] ) + + ROUTED met3 TAPERRULE met3_width_640 ( -2120 4623120 ) ( 280 * ) ; + - gpio_in_h[14] ( PIN gpio_in_h[14] ) + + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4625695 ) ( 3168750 * ) ; + - gpio_slow_sel[24] ( PIN gpio_slow_sel[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4626335 ) ( 280 * ) ; + - gpio_loopback_one[14] ( PIN gpio_loopback_one[14] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 4635185 ) ( 3168630 * ) ; + - gpio_in[24] ( PIN gpio_in[24] ) + + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4635535 ) ( 280 * ) ; + - gpio_loopback_zero[14] ( PIN gpio_loopback_zero[14] ) + + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 4645185 ) ( 3168630 * ) ; + - mask_rev[31] ( PIN mask_rev[31] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3060260 -1300 ) ( * 280 ) + NEW met2 ( 3060255 -1930 ) ( * -1370 ) ; + - mask_rev[30] ( PIN mask_rev[30] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3059140 -1300 ) ( * 280 ) + NEW met2 ( 3059135 -1930 ) ( * -1370 ) ; + - mask_rev[29] ( PIN mask_rev[29] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3058020 -1300 ) ( * 280 ) + NEW met2 ( 3058015 -1930 ) ( * -1370 ) ; + - mask_rev[28] ( PIN mask_rev[28] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3056900 -1300 ) ( * 280 ) + NEW met2 ( 3056895 -1930 ) ( * -1370 ) ; + - mask_rev[27] ( PIN mask_rev[27] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3055780 -1300 ) ( * 280 ) + NEW met2 ( 3055775 -1930 ) ( * -1370 ) ; + - mask_rev[26] ( PIN mask_rev[26] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3054660 -1300 ) ( * 280 ) + NEW met2 ( 3054655 -1930 ) ( * -1370 ) ; + - mask_rev[25] ( PIN mask_rev[25] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3053540 -1300 ) ( * 280 ) + NEW met2 ( 3053535 -1930 ) ( * -1370 ) ; + - mask_rev[24] ( PIN mask_rev[24] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3052420 -1300 ) ( * 280 ) + NEW met2 ( 3052415 -1930 ) ( * -1370 ) ; + - mask_rev[23] ( PIN mask_rev[23] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3051300 -1300 ) ( * 280 ) + NEW met2 ( 3051295 -1930 ) ( * -1370 ) ; + - mask_rev[22] ( PIN mask_rev[22] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3050180 -1300 ) ( * 280 ) + NEW met2 ( 3050175 -1930 ) ( * -1370 ) ; + - mask_rev[21] ( PIN mask_rev[21] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3049060 -1300 ) ( * 280 ) + NEW met2 ( 3049055 -1930 ) ( * -1370 ) ; + - mask_rev[20] ( PIN mask_rev[20] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3047940 -1300 ) ( * 280 ) + NEW met2 ( 3047935 -1930 ) ( * -1370 ) ; + - mask_rev[19] ( PIN mask_rev[19] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3046820 -1300 ) ( * 280 ) + NEW met2 ( 3046815 -1930 ) ( * -1370 ) ; + - mask_rev[18] ( PIN mask_rev[18] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3045700 -1300 ) ( * 280 ) + NEW met2 ( 3045695 -1930 ) ( * -1370 ) ; + - mask_rev[17] ( PIN mask_rev[17] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3044580 -1300 ) ( * 280 ) + NEW met2 ( 3044575 -1930 ) ( * -1370 ) ; + - mask_rev[16] ( PIN mask_rev[16] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3043460 -1300 ) ( * 280 ) + NEW met2 ( 3043455 -1930 ) ( * -1370 ) ; + - mask_rev[15] ( PIN mask_rev[15] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3042340 -1300 ) ( * 280 ) + NEW met2 ( 3042335 -1930 ) ( * -1370 ) ; + - mask_rev[14] ( PIN mask_rev[14] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3041220 -1300 ) ( * 280 ) + NEW met2 ( 3041215 -1930 ) ( * -1370 ) ; + - mask_rev[13] ( PIN mask_rev[13] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3040100 -1300 ) ( * 280 ) + NEW met2 ( 3040095 -1930 ) ( * -1370 ) ; + - mask_rev[12] ( PIN mask_rev[12] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3038980 -1300 ) ( * 280 ) + NEW met2 ( 3038975 -1930 ) ( * -1370 ) ; + - mask_rev[11] ( PIN mask_rev[11] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3037860 -1300 ) ( * 280 ) + NEW met2 ( 3037855 -1930 ) ( * -1370 ) ; + - mask_rev[10] ( PIN mask_rev[10] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3036740 -1300 ) ( * 280 ) + NEW met2 ( 3036735 -1930 ) ( * -1370 ) ; + - mask_rev[9] ( PIN mask_rev[9] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3035620 -1300 ) ( * 280 ) + NEW met2 ( 3035615 -1930 ) ( * -1370 ) ; + - mask_rev[8] ( PIN mask_rev[8] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3034500 -1300 ) ( * 280 ) + NEW met2 ( 3034495 -1930 ) ( * -1370 ) ; + - mask_rev[7] ( PIN mask_rev[7] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3033380 -1300 ) ( * 280 ) + NEW met2 ( 3033375 -1930 ) ( * -1370 ) ; + - mask_rev[6] ( PIN mask_rev[6] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3032260 -1300 ) ( * 280 ) + NEW met2 ( 3032255 -1930 ) ( * -1370 ) ; + - mask_rev[5] ( PIN mask_rev[5] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3031140 -1300 ) ( * 280 ) + NEW met2 ( 3031135 -1930 ) ( * -1370 ) ; + - mask_rev[4] ( PIN mask_rev[4] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3030020 -1300 ) ( * 280 ) + NEW met2 ( 3030015 -1930 ) ( * -1370 ) ; + - mask_rev[3] ( PIN mask_rev[3] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3028900 -1300 ) ( * 280 ) + NEW met2 ( 3028895 -1930 ) ( * -1370 ) ; + - mask_rev[2] ( PIN mask_rev[2] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3027780 -1300 ) ( * 280 ) + NEW met2 ( 3027775 -1930 ) ( * -1370 ) ; + - mask_rev[1] ( PIN mask_rev[1] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3026660 -1300 ) ( * 280 ) + NEW met2 ( 3026655 -1930 ) ( * -1370 ) ; + - mask_rev[0] ( PIN mask_rev[0] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 3025540 -1300 ) ( * 280 ) + NEW met2 ( 3025535 -1930 ) ( * -1370 ) ; + - gpio_loopback_zero[43] ( PIN gpio_loopback_zero[43] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 2463305 -2000 ) ( * 280 ) ; + - gpio_loopback_one[43] ( PIN gpio_loopback_one[43] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 2442030 -2000 ) ( * 280 ) ; + - gpio_in_h[43] ( PIN gpio_in_h[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2438690 -2120 ) ( * 280 ) ; + - gpio_oeb[43] ( PIN gpio_oeb[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2435930 -2120 ) ( * 280 ) ; + - gpio_ib_mode_sel[43] ( PIN gpio_ib_mode_sel[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2432710 -2120 ) ( * 280 ) ; + - gpio_vtrip_sel[43] ( PIN gpio_vtrip_sel[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2429490 -2120 ) ( * 280 ) ; + - gpio_out[43] ( PIN gpio_out[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2420290 -2120 ) ( * 280 ) ; + - gpio_holdover[43] ( PIN gpio_holdover[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2417530 -2120 ) ( * 280 ) ; + - gpio_dm2[43] ( PIN gpio_dm2[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2414310 -2120 ) ( * 280 ) ; + - gpio_analog_sel[43] ( PIN gpio_analog_sel[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2411090 -2120 ) ( * 280 ) ; + - gpio_inp_dis[43] ( PIN gpio_inp_dis[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2398670 -2120 ) ( * 280 ) ; + - gpio_analog_pol[43] ( PIN gpio_analog_pol[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2395910 -2120 ) ( * 280 ) ; + - gpio_dm0[43] ( PIN gpio_dm0[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2392690 -2120 ) ( * 280 ) ; + - gpio_analog_en[43] ( PIN gpio_analog_en[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2389470 -2120 ) ( * 280 ) ; + - analog_noesd_io[43] ( PIN analog_noesd_io[43] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 2386710 -2120 ) ( * 280 ) ; + - gpio_dm1[43] ( PIN gpio_dm1[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2383490 -2120 ) ( * 280 ) ; + - analog_io[43] ( PIN analog_io[43] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 2377510 -2120 ) ( * 280 ) ; + - gpio_slow_sel[43] ( PIN gpio_slow_sel[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2374290 -2120 ) ( * 280 ) ; + - gpio_in[43] ( PIN gpio_in[43] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2365090 -2120 ) ( * 280 ) ; + - gpio_loopback_zero[42] ( PIN gpio_loopback_zero[42] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 2189020 -2000 ) ( * 280 ) ; + - gpio_loopback_one[42] ( PIN gpio_loopback_one[42] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 2168030 -2000 ) ( * 280 ) ; + - gpio_in_h[42] ( PIN gpio_in_h[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2164690 -2120 ) ( * 280 ) ; + - gpio_oeb[42] ( PIN gpio_oeb[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2161930 -2120 ) ( * 280 ) ; + - gpio_ib_mode_sel[42] ( PIN gpio_ib_mode_sel[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2158710 -2120 ) ( * 280 ) ; + - gpio_vtrip_sel[42] ( PIN gpio_vtrip_sel[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2155490 -2120 ) ( * 280 ) ; + - gpio_out[42] ( PIN gpio_out[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2146290 -2120 ) ( * 280 ) ; + - gpio_holdover[42] ( PIN gpio_holdover[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2143530 -2120 ) ( * 280 ) ; + - gpio_dm2[42] ( PIN gpio_dm2[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2140310 -2120 ) ( * 280 ) ; + - gpio_analog_sel[42] ( PIN gpio_analog_sel[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2137090 -2120 ) ( * 280 ) ; + - gpio_inp_dis[42] ( PIN gpio_inp_dis[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2124670 -2120 ) ( * 280 ) ; + - gpio_analog_pol[42] ( PIN gpio_analog_pol[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2121910 -2120 ) ( * 280 ) ; + - gpio_dm0[42] ( PIN gpio_dm0[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2118690 -2120 ) ( * 280 ) ; + - gpio_analog_en[42] ( PIN gpio_analog_en[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2115470 -2120 ) ( * 280 ) ; + - analog_noesd_io[42] ( PIN analog_noesd_io[42] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 2112710 -2120 ) ( * 280 ) ; + - gpio_dm1[42] ( PIN gpio_dm1[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2109490 -2120 ) ( * 280 ) ; + - analog_io[42] ( PIN analog_io[42] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 2103510 -2120 ) ( * 280 ) ; + - gpio_slow_sel[42] ( PIN gpio_slow_sel[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2100290 -2120 ) ( * 280 ) ; + - gpio_in[42] ( PIN gpio_in[42] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2091090 -2120 ) ( * 280 ) ; + - gpio_loopback_zero[41] ( PIN gpio_loopback_zero[41] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 1915020 -2000 ) ( * 280 ) ; + - gpio_loopback_one[41] ( PIN gpio_loopback_one[41] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 1894030 -2000 ) ( * 280 ) ; + - gpio_in_h[41] ( PIN gpio_in_h[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1890690 -2120 ) ( * 280 ) ; + - gpio_oeb[41] ( PIN gpio_oeb[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1887930 -2120 ) ( * 280 ) ; + - gpio_ib_mode_sel[41] ( PIN gpio_ib_mode_sel[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1884710 -2120 ) ( * 280 ) ; + - gpio_vtrip_sel[41] ( PIN gpio_vtrip_sel[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1881490 -2120 ) ( * 280 ) ; + - gpio_out[41] ( PIN gpio_out[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1872290 -2120 ) ( * 280 ) ; + - gpio_holdover[41] ( PIN gpio_holdover[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1869530 -2120 ) ( * 280 ) ; + - gpio_dm2[41] ( PIN gpio_dm2[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1866310 -2120 ) ( * 280 ) ; + - gpio_analog_sel[41] ( PIN gpio_analog_sel[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1863090 -2120 ) ( * 280 ) ; + - gpio_inp_dis[41] ( PIN gpio_inp_dis[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1850670 -2120 ) ( * 280 ) ; + - gpio_analog_pol[41] ( PIN gpio_analog_pol[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1847910 -2120 ) ( * 280 ) ; + - gpio_dm0[41] ( PIN gpio_dm0[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1844690 -2120 ) ( * 280 ) ; + - gpio_analog_en[41] ( PIN gpio_analog_en[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1841470 -2120 ) ( * 280 ) ; + - analog_noesd_io[41] ( PIN analog_noesd_io[41] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 1838710 -2120 ) ( * 280 ) ; + - gpio_dm1[41] ( PIN gpio_dm1[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1835490 -2120 ) ( * 280 ) ; + - analog_io[41] ( PIN analog_io[41] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 1829510 -2120 ) ( * 280 ) ; + - gpio_slow_sel[41] ( PIN gpio_slow_sel[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1826290 -2120 ) ( * 280 ) ; + - gpio_in[41] ( PIN gpio_in[41] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1817090 -2120 ) ( * 280 ) ; + - gpio_loopback_zero[40] ( PIN gpio_loopback_zero[40] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 1640955 -2000 ) ( * 170 ) ; + - gpio_loopback_one[40] ( PIN gpio_loopback_one[40] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 1620030 -2000 ) ( * 280 ) ; + - gpio_in_h[40] ( PIN gpio_in_h[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1616690 -2120 ) ( * 280 ) ; + - gpio_oeb[40] ( PIN gpio_oeb[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1613930 -2120 ) ( * 280 ) ; + - gpio_ib_mode_sel[40] ( PIN gpio_ib_mode_sel[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1610710 -2120 ) ( * 280 ) ; + - gpio_vtrip_sel[40] ( PIN gpio_vtrip_sel[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1607490 -2120 ) ( * 280 ) ; + - gpio_out[40] ( PIN gpio_out[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1598290 -2120 ) ( * 280 ) ; + - gpio_holdover[40] ( PIN gpio_holdover[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1595530 -2120 ) ( * 280 ) ; + - gpio_dm2[40] ( PIN gpio_dm2[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1592310 -2120 ) ( * 280 ) ; + - gpio_analog_sel[40] ( PIN gpio_analog_sel[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1589090 -2120 ) ( * 280 ) ; + - gpio_inp_dis[40] ( PIN gpio_inp_dis[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1576670 -2120 ) ( * 280 ) ; + - gpio_analog_pol[40] ( PIN gpio_analog_pol[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1573910 -2120 ) ( * 280 ) ; + - gpio_dm0[40] ( PIN gpio_dm0[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1570690 -2120 ) ( * 280 ) ; + - gpio_analog_en[40] ( PIN gpio_analog_en[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1567470 -2120 ) ( * 280 ) ; + - analog_noesd_io[40] ( PIN analog_noesd_io[40] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 1564710 -2120 ) ( * 280 ) ; + - gpio_dm1[40] ( PIN gpio_dm1[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1561490 -2120 ) ( * 280 ) ; + - analog_io[40] ( PIN analog_io[40] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 1555510 -2120 ) ( * 280 ) ; + - gpio_slow_sel[40] ( PIN gpio_slow_sel[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1552290 -2120 ) ( * 280 ) ; + - gpio_in[40] ( PIN gpio_in[40] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1543090 -2120 ) ( * 280 ) ; + - gpio_loopback_zero[39] ( PIN gpio_loopback_zero[39] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 1366930 -2000 ) ( * 280 ) ; + - gpio_loopback_one[39] ( PIN gpio_loopback_one[39] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 1346030 -2000 ) ( * 280 ) ; + - gpio_in_h[39] ( PIN gpio_in_h[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1342690 -2120 ) ( * 280 ) ; + - gpio_oeb[39] ( PIN gpio_oeb[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1339930 -2120 ) ( * 280 ) ; + - gpio_ib_mode_sel[39] ( PIN gpio_ib_mode_sel[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1336710 -2120 ) ( * 280 ) ; + - gpio_vtrip_sel[39] ( PIN gpio_vtrip_sel[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1333490 -2120 ) ( * 280 ) ; + - gpio_out[39] ( PIN gpio_out[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1324290 -2120 ) ( * 280 ) ; + - gpio_holdover[39] ( PIN gpio_holdover[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1321530 -2120 ) ( * 280 ) ; + - gpio_dm2[39] ( PIN gpio_dm2[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1318310 -2120 ) ( * 280 ) ; + - gpio_analog_sel[39] ( PIN gpio_analog_sel[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1315090 -2120 ) ( * 280 ) ; + - gpio_inp_dis[39] ( PIN gpio_inp_dis[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1302670 -2120 ) ( * 280 ) ; + - gpio_analog_pol[39] ( PIN gpio_analog_pol[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1299910 -2120 ) ( * 280 ) ; + - gpio_dm0[39] ( PIN gpio_dm0[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1296690 -2120 ) ( * 280 ) ; + - gpio_analog_en[39] ( PIN gpio_analog_en[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1293470 -2120 ) ( * 280 ) ; + - analog_noesd_io[39] ( PIN analog_noesd_io[39] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 1290710 -2120 ) ( * 280 ) ; + - gpio_dm1[39] ( PIN gpio_dm1[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1287490 -2120 ) ( * 280 ) ; + - analog_io[39] ( PIN analog_io[39] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 1281510 -2120 ) ( * 280 ) ; + - gpio_slow_sel[39] ( PIN gpio_slow_sel[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1278290 -2120 ) ( * 280 ) ; + - gpio_in[39] ( PIN gpio_in[39] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1269090 -2120 ) ( * 280 ) ; + - gpio_loopback_zero[38] ( PIN gpio_loopback_zero[38] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 819085 -2000 ) ( * 280 ) ; + - gpio_loopback_one[38] ( PIN gpio_loopback_one[38] ) + + ROUTED met2 TAPERRULE met2_width_260 ( 803030 -2000 ) ( * 280 ) ; + - gpio_in_h[38] ( PIN gpio_in_h[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 799690 -2120 ) ( * 280 ) ; + - gpio_oeb[38] ( PIN gpio_oeb[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 796930 -2120 ) ( * 280 ) ; + - gpio_ib_mode_sel[38] ( PIN gpio_ib_mode_sel[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 793710 -2120 ) ( * 280 ) ; + - gpio_vtrip_sel[38] ( PIN gpio_vtrip_sel[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 790490 -2120 ) ( * 280 ) ; + - gpio_out[38] ( PIN gpio_out[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 781290 -2120 ) ( * 280 ) ; + - gpio_holdover[38] ( PIN gpio_holdover[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 778530 -2120 ) ( * 280 ) ; + - gpio_dm2[38] ( PIN gpio_dm2[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 775310 -2120 ) ( * 280 ) ; + - gpio_analog_sel[38] ( PIN gpio_analog_sel[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 772090 -2120 ) ( * 280 ) ; + - gpio_inp_dis[38] ( PIN gpio_inp_dis[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 759670 -2120 ) ( * 280 ) ; + - gpio_analog_pol[38] ( PIN gpio_analog_pol[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 756910 -2120 ) ( * 280 ) ; + - gpio_dm0[38] ( PIN gpio_dm0[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 753690 -2120 ) ( * 280 ) ; + - gpio_analog_en[38] ( PIN gpio_analog_en[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 750470 -2120 ) ( * 280 ) ; + - analog_noesd_io[38] ( PIN analog_noesd_io[38] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 747710 -2120 ) ( * 280 ) ; + - gpio_dm1[38] ( PIN gpio_dm1[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 744490 -2120 ) ( * 280 ) ; + - analog_io[38] ( PIN analog_io[38] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 738510 -2120 ) ( * 280 ) ; + - gpio_slow_sel[38] ( PIN gpio_slow_sel[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 735290 -2120 ) ( * 280 ) ; + - gpio_in[38] ( PIN gpio_in[38] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 726090 -2120 ) ( * 280 ) ; + - resetb_l ( PIN resetb_l ) + + ROUTED met2 TAPERRULE met2_width_280 ( 550960 -2000 ) ( * 280 ) ; + - resetb_h ( PIN resetb_h ) + + ROUTED met2 TAPERRULE met2_width_330 ( 498020 -450 ) ( * 280 ) + NEW met2 TAPERRULE met2_width_300 ( 498020 -2000 ) ( * -450 ) ; + - gpio_in[15] ( PIN gpio_in[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2994540 4766350 ) ( * 4768750 ) ; + - gpio_slow_sel[15] ( PIN gpio_slow_sel[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2985340 4766350 ) ( * 4768750 ) ; + - analog_io[15] ( PIN analog_io[15] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 2982120 4766350 ) ( * 4768750 ) ; + - gpio_dm1[15] ( PIN gpio_dm1[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2976140 4766350 ) ( * 4768750 ) ; + - analog_noesd_io[15] ( PIN analog_noesd_io[15] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 2972920 4766350 ) ( * 4768750 ) ; + - gpio_analog_en[15] ( PIN gpio_analog_en[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2970160 4766350 ) ( * 4768750 ) ; + - gpio_dm0[15] ( PIN gpio_dm0[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2966940 4766350 ) ( * 4768750 ) ; + - gpio_analog_pol[15] ( PIN gpio_analog_pol[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2963720 4766350 ) ( * 4768750 ) ; + - gpio_inp_dis[15] ( PIN gpio_inp_dis[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2960960 4766350 ) ( * 4768750 ) ; + - gpio_analog_sel[15] ( PIN gpio_analog_sel[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2948540 4766350 ) ( * 4768750 ) ; + - gpio_dm2[15] ( PIN gpio_dm2[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2945320 4766350 ) ( * 4768750 ) ; + - gpio_holdover[15] ( PIN gpio_holdover[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2942100 4766350 ) ( * 4768750 ) ; + - gpio_out[15] ( PIN gpio_out[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2939340 4766350 ) ( * 4768750 ) ; + - gpio_vtrip_sel[15] ( PIN gpio_vtrip_sel[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2930140 4766350 ) ( * 4768750 ) ; + - gpio_ib_mode_sel[15] ( PIN gpio_ib_mode_sel[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2926920 4766350 ) ( * 4768750 ) ; + - gpio_oeb[15] ( PIN gpio_oeb[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2923700 4766350 ) ( * 4768750 ) ; + - gpio_in_h[15] ( PIN gpio_in_h[15] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2920940 4766350 ) ( * 4768750 ) ; + - gpio_loopback_one[15] ( PIN gpio_loopback_one[15] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 2891640 4766350 ) ( * 4768630 ) ; + - gpio_loopback_zero[15] ( PIN gpio_loopback_zero[15] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 2881635 4766350 ) ( * 4768630 ) ; + - gpio_in[16] ( PIN gpio_in[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2485540 4766350 ) ( * 4768750 ) ; + - gpio_slow_sel[16] ( PIN gpio_slow_sel[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2476340 4766350 ) ( * 4768750 ) ; + - analog_io[16] ( PIN analog_io[16] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 2473120 4766350 ) ( * 4768750 ) ; + - gpio_dm1[16] ( PIN gpio_dm1[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2467140 4766350 ) ( * 4768750 ) ; + - analog_noesd_io[16] ( PIN analog_noesd_io[16] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 2463920 4766350 ) ( * 4768750 ) ; + - gpio_analog_en[16] ( PIN gpio_analog_en[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2461160 4766350 ) ( * 4768750 ) ; + - gpio_dm0[16] ( PIN gpio_dm0[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2457940 4766350 ) ( * 4768750 ) ; + - gpio_analog_pol[16] ( PIN gpio_analog_pol[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2454720 4766350 ) ( * 4768750 ) ; + - gpio_inp_dis[16] ( PIN gpio_inp_dis[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2451960 4766350 ) ( * 4768750 ) ; + - gpio_analog_sel[16] ( PIN gpio_analog_sel[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2439540 4766350 ) ( * 4768750 ) ; + - gpio_dm2[16] ( PIN gpio_dm2[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2436320 4766350 ) ( * 4768750 ) ; + - gpio_holdover[16] ( PIN gpio_holdover[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2433100 4766350 ) ( * 4768750 ) ; + - gpio_out[16] ( PIN gpio_out[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2430340 4766350 ) ( * 4768750 ) ; + - gpio_vtrip_sel[16] ( PIN gpio_vtrip_sel[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2421140 4766350 ) ( * 4768750 ) ; + - gpio_ib_mode_sel[16] ( PIN gpio_ib_mode_sel[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2417920 4766350 ) ( * 4768750 ) ; + - gpio_oeb[16] ( PIN gpio_oeb[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2414700 4766350 ) ( * 4768750 ) ; + - gpio_in_h[16] ( PIN gpio_in_h[16] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2411940 4766350 ) ( * 4768750 ) ; + - gpio_loopback_one[16] ( PIN gpio_loopback_one[16] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 2394640 4766350 ) ( * 4768630 ) ; + - gpio_loopback_zero[16] ( PIN gpio_loopback_zero[16] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 2384635 4766350 ) ( * 4768630 ) ; + - gpio_in[17] ( PIN gpio_in[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2228540 4766350 ) ( * 4768750 ) ; + - gpio_slow_sel[17] ( PIN gpio_slow_sel[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2219340 4766350 ) ( * 4768750 ) ; + - analog_io[17] ( PIN analog_io[17] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 2216120 4766350 ) ( * 4768750 ) ; + - gpio_dm1[17] ( PIN gpio_dm1[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2210140 4766350 ) ( * 4768750 ) ; + - analog_noesd_io[17] ( PIN analog_noesd_io[17] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 2206920 4766350 ) ( * 4768750 ) ; + - gpio_analog_en[17] ( PIN gpio_analog_en[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2204160 4766350 ) ( * 4768750 ) ; + - gpio_dm0[17] ( PIN gpio_dm0[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2200940 4766350 ) ( * 4768750 ) ; + - gpio_analog_pol[17] ( PIN gpio_analog_pol[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2197720 4766350 ) ( * 4768750 ) ; + - gpio_inp_dis[17] ( PIN gpio_inp_dis[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2194960 4766350 ) ( * 4768750 ) ; + - gpio_analog_sel[17] ( PIN gpio_analog_sel[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2182540 4766350 ) ( * 4768750 ) ; + - gpio_dm2[17] ( PIN gpio_dm2[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2179320 4766350 ) ( * 4768750 ) ; + - gpio_holdover[17] ( PIN gpio_holdover[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2176100 4766350 ) ( * 4768750 ) ; + - gpio_out[17] ( PIN gpio_out[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2173340 4766350 ) ( * 4768750 ) ; + - gpio_vtrip_sel[17] ( PIN gpio_vtrip_sel[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2164140 4766350 ) ( * 4768750 ) ; + - gpio_ib_mode_sel[17] ( PIN gpio_ib_mode_sel[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2160920 4766350 ) ( * 4768750 ) ; + - gpio_oeb[17] ( PIN gpio_oeb[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2157700 4766350 ) ( * 4768750 ) ; + - gpio_in_h[17] ( PIN gpio_in_h[17] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 2154940 4766350 ) ( * 4768750 ) ; + - gpio_loopback_one[17] ( PIN gpio_loopback_one[17] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 2138640 4766350 ) ( * 4768630 ) ; + - gpio_loopback_zero[17] ( PIN gpio_loopback_zero[17] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 2128635 4766350 ) ( * 4768630 ) ; + - gpio_in[18] ( PIN gpio_in[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1783540 4766350 ) ( * 4768750 ) ; + - gpio_slow_sel[18] ( PIN gpio_slow_sel[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1774340 4766350 ) ( * 4768750 ) ; + - analog_io[18] ( PIN analog_io[18] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 1771120 4766350 ) ( * 4768750 ) ; + - gpio_dm1[18] ( PIN gpio_dm1[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1765140 4766350 ) ( * 4768750 ) ; + - analog_noesd_io[18] ( PIN analog_noesd_io[18] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 1761920 4766350 ) ( * 4768750 ) ; + - gpio_analog_en[18] ( PIN gpio_analog_en[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1759160 4766350 ) ( * 4768750 ) ; + - gpio_dm0[18] ( PIN gpio_dm0[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1755940 4766350 ) ( * 4768750 ) ; + - gpio_analog_pol[18] ( PIN gpio_analog_pol[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1752720 4766350 ) ( * 4768750 ) ; + - gpio_inp_dis[18] ( PIN gpio_inp_dis[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1749960 4766350 ) ( * 4768750 ) ; + - gpio_analog_sel[18] ( PIN gpio_analog_sel[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1737540 4766350 ) ( * 4768750 ) ; + - gpio_dm2[18] ( PIN gpio_dm2[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1734320 4766350 ) ( * 4768750 ) ; + - gpio_holdover[18] ( PIN gpio_holdover[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1731100 4766350 ) ( * 4768750 ) ; + - gpio_out[18] ( PIN gpio_out[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1728340 4766350 ) ( * 4768750 ) ; + - gpio_vtrip_sel[18] ( PIN gpio_vtrip_sel[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1719140 4766350 ) ( * 4768750 ) ; + - gpio_ib_mode_sel[18] ( PIN gpio_ib_mode_sel[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1715920 4766350 ) ( * 4768750 ) ; + - gpio_oeb[18] ( PIN gpio_oeb[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1712700 4766350 ) ( * 4768750 ) ; + - gpio_in_h[18] ( PIN gpio_in_h[18] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1709940 4766350 ) ( * 4768750 ) ; + - gpio_loopback_one[18] ( PIN gpio_loopback_one[18] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 1693640 4766350 ) ( * 4768630 ) ; + - gpio_loopback_zero[18] ( PIN gpio_loopback_zero[18] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 1683635 4766350 ) ( * 4768630 ) ; + - gpio_in[19] ( PIN gpio_in[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1274540 4766350 ) ( * 4768750 ) ; + - gpio_slow_sel[19] ( PIN gpio_slow_sel[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1265340 4766350 ) ( * 4768750 ) ; + - analog_io[19] ( PIN analog_io[19] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 1262120 4766350 ) ( * 4768750 ) ; + - gpio_dm1[19] ( PIN gpio_dm1[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1256140 4766350 ) ( * 4768750 ) ; + - analog_noesd_io[19] ( PIN analog_noesd_io[19] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 1252920 4766350 ) ( * 4768750 ) ; + - gpio_analog_en[19] ( PIN gpio_analog_en[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1250160 4766350 ) ( * 4768750 ) ; + - gpio_dm0[19] ( PIN gpio_dm0[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1246940 4766350 ) ( * 4768750 ) ; + - gpio_analog_pol[19] ( PIN gpio_analog_pol[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1243720 4766350 ) ( * 4768750 ) ; + - gpio_inp_dis[19] ( PIN gpio_inp_dis[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1240960 4766350 ) ( * 4768750 ) ; + - gpio_analog_sel[19] ( PIN gpio_analog_sel[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1228540 4766350 ) ( * 4768750 ) ; + - gpio_dm2[19] ( PIN gpio_dm2[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1225320 4766350 ) ( * 4768750 ) ; + - gpio_holdover[19] ( PIN gpio_holdover[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1222100 4766350 ) ( * 4768750 ) ; + - gpio_out[19] ( PIN gpio_out[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1219340 4766350 ) ( * 4768750 ) ; + - gpio_vtrip_sel[19] ( PIN gpio_vtrip_sel[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1210140 4766350 ) ( * 4768750 ) ; + - gpio_ib_mode_sel[19] ( PIN gpio_ib_mode_sel[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1206920 4766350 ) ( * 4768750 ) ; + - gpio_oeb[19] ( PIN gpio_oeb[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1203700 4766350 ) ( * 4768750 ) ; + - gpio_in_h[19] ( PIN gpio_in_h[19] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1200940 4766350 ) ( * 4768750 ) ; + - gpio_loopback_one[19] ( PIN gpio_loopback_one[19] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 1171640 4766350 ) ( * 4768630 ) ; + - gpio_loopback_zero[19] ( PIN gpio_loopback_zero[19] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 1161635 4766350 ) ( * 4768630 ) ; + - gpio_in[20] ( PIN gpio_in[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1016540 4766350 ) ( * 4768750 ) ; + - gpio_slow_sel[20] ( PIN gpio_slow_sel[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 1007340 4766350 ) ( * 4768750 ) ; + - analog_io[20] ( PIN analog_io[20] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 1004120 4766350 ) ( * 4768750 ) ; + - gpio_dm1[20] ( PIN gpio_dm1[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 998140 4766350 ) ( * 4768750 ) ; + - analog_noesd_io[20] ( PIN analog_noesd_io[20] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 994920 4766350 ) ( * 4768750 ) ; + - gpio_analog_en[20] ( PIN gpio_analog_en[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 992160 4766350 ) ( * 4768750 ) ; + - gpio_dm0[20] ( PIN gpio_dm0[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 988940 4766350 ) ( * 4768750 ) ; + - gpio_analog_pol[20] ( PIN gpio_analog_pol[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 985720 4766350 ) ( * 4768750 ) ; + - gpio_inp_dis[20] ( PIN gpio_inp_dis[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 982960 4766350 ) ( * 4768750 ) ; + - gpio_analog_sel[20] ( PIN gpio_analog_sel[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 970540 4766350 ) ( * 4768750 ) ; + - gpio_dm2[20] ( PIN gpio_dm2[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 967320 4766350 ) ( * 4768750 ) ; + - gpio_holdover[20] ( PIN gpio_holdover[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 964100 4766350 ) ( * 4768750 ) ; + - gpio_out[20] ( PIN gpio_out[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 961340 4766350 ) ( * 4768750 ) ; + - gpio_vtrip_sel[20] ( PIN gpio_vtrip_sel[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 952140 4766350 ) ( * 4768750 ) ; + - gpio_ib_mode_sel[20] ( PIN gpio_ib_mode_sel[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 948920 4766350 ) ( * 4768750 ) ; + - gpio_oeb[20] ( PIN gpio_oeb[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 945700 4766350 ) ( * 4768750 ) ; + - gpio_in_h[20] ( PIN gpio_in_h[20] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 942940 4766350 ) ( * 4768750 ) ; + - gpio_loopback_one[20] ( PIN gpio_loopback_one[20] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 915640 4766350 ) ( * 4768630 ) ; + - gpio_loopback_zero[20] ( PIN gpio_loopback_zero[20] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 905635 4766350 ) ( * 4768630 ) ; + - gpio_in[21] ( PIN gpio_in[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 759540 4766350 ) ( * 4768750 ) ; + - gpio_slow_sel[21] ( PIN gpio_slow_sel[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 750340 4766350 ) ( * 4768750 ) ; + - analog_io[21] ( PIN analog_io[21] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 747120 4766350 ) ( * 4768750 ) ; + - gpio_dm1[21] ( PIN gpio_dm1[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 741140 4766350 ) ( * 4768750 ) ; + - analog_noesd_io[21] ( PIN analog_noesd_io[21] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 737920 4766350 ) ( * 4768750 ) ; + - gpio_analog_en[21] ( PIN gpio_analog_en[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 735160 4766350 ) ( * 4768750 ) ; + - gpio_dm0[21] ( PIN gpio_dm0[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 731940 4766350 ) ( * 4768750 ) ; + - gpio_analog_pol[21] ( PIN gpio_analog_pol[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 728720 4766350 ) ( * 4768750 ) ; + - gpio_inp_dis[21] ( PIN gpio_inp_dis[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 725960 4766350 ) ( * 4768750 ) ; + - gpio_analog_sel[21] ( PIN gpio_analog_sel[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 713540 4766350 ) ( * 4768750 ) ; + - gpio_dm2[21] ( PIN gpio_dm2[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 710320 4766350 ) ( * 4768750 ) ; + - gpio_holdover[21] ( PIN gpio_holdover[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 707100 4766350 ) ( * 4768750 ) ; + - gpio_out[21] ( PIN gpio_out[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 704340 4766350 ) ( * 4768750 ) ; + - gpio_vtrip_sel[21] ( PIN gpio_vtrip_sel[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 695140 4766350 ) ( * 4768750 ) ; + - gpio_ib_mode_sel[21] ( PIN gpio_ib_mode_sel[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 691920 4766350 ) ( * 4768750 ) ; + - gpio_oeb[21] ( PIN gpio_oeb[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 688700 4766350 ) ( * 4768750 ) ; + - gpio_in_h[21] ( PIN gpio_in_h[21] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 685940 4766350 ) ( * 4768750 ) ; + - gpio_loopback_one[21] ( PIN gpio_loopback_one[21] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 659640 4766350 ) ( * 4768630 ) ; + - gpio_loopback_zero[21] ( PIN gpio_loopback_zero[21] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 649635 4766350 ) ( * 4768630 ) ; + - gpio_in[22] ( PIN gpio_in[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 502540 4766350 ) ( * 4768750 ) ; + - gpio_slow_sel[22] ( PIN gpio_slow_sel[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 493340 4766350 ) ( * 4768750 ) ; + - analog_io[22] ( PIN analog_io[22] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 490120 4766350 ) ( * 4768750 ) ; + - gpio_dm1[22] ( PIN gpio_dm1[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 484140 4766350 ) ( * 4768750 ) ; + - analog_noesd_io[22] ( PIN analog_noesd_io[22] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 480920 4766350 ) ( * 4768750 ) ; + - gpio_analog_en[22] ( PIN gpio_analog_en[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 478160 4766350 ) ( * 4768750 ) ; + - gpio_dm0[22] ( PIN gpio_dm0[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 474940 4766350 ) ( * 4768750 ) ; + - gpio_analog_pol[22] ( PIN gpio_analog_pol[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 471720 4766350 ) ( * 4768750 ) ; + - gpio_inp_dis[22] ( PIN gpio_inp_dis[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 468960 4766350 ) ( * 4768750 ) ; + - gpio_analog_sel[22] ( PIN gpio_analog_sel[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 456540 4766350 ) ( * 4768750 ) ; + - gpio_dm2[22] ( PIN gpio_dm2[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 453320 4766350 ) ( * 4768750 ) ; + - gpio_holdover[22] ( PIN gpio_holdover[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 450100 4766350 ) ( * 4768750 ) ; + - gpio_out[22] ( PIN gpio_out[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 447340 4766350 ) ( * 4768750 ) ; + - gpio_vtrip_sel[22] ( PIN gpio_vtrip_sel[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 438140 4766350 ) ( * 4768750 ) ; + - gpio_ib_mode_sel[22] ( PIN gpio_ib_mode_sel[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 434920 4766350 ) ( * 4768750 ) ; + - gpio_oeb[22] ( PIN gpio_oeb[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 431700 4766350 ) ( * 4768750 ) ; + - gpio_in_h[22] ( PIN gpio_in_h[22] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 428940 4766350 ) ( * 4768750 ) ; + - gpio_loopback_one[22] ( PIN gpio_loopback_one[22] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 403640 4766350 ) ( * 4768630 ) ; + - gpio_loopback_zero[22] ( PIN gpio_loopback_zero[22] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 393635 4766350 ) ( * 4768630 ) ; + - gpio_in[23] ( PIN gpio_in[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 245540 4766350 ) ( * 4768750 ) ; + - gpio_slow_sel[23] ( PIN gpio_slow_sel[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 236340 4766350 ) ( * 4768750 ) ; + - analog_io[23] ( PIN analog_io[23] ) + + ROUTED met2 TAPERRULE met2_width_640 ( 233120 4766350 ) ( * 4768750 ) ; + - gpio_dm1[23] ( PIN gpio_dm1[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 227140 4766350 ) ( * 4768750 ) ; + - analog_noesd_io[23] ( PIN analog_noesd_io[23] ) + + ROUTED met2 TAPERRULE met2_width_1070 ( 223920 4766350 ) ( * 4768750 ) ; + - gpio_analog_en[23] ( PIN gpio_analog_en[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 221160 4766350 ) ( * 4768750 ) ; + - gpio_dm0[23] ( PIN gpio_dm0[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 217940 4766350 ) ( * 4768750 ) ; + - gpio_analog_pol[23] ( PIN gpio_analog_pol[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 214720 4766350 ) ( * 4768750 ) ; + - gpio_inp_dis[23] ( PIN gpio_inp_dis[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 211960 4766350 ) ( * 4768750 ) ; + - gpio_analog_sel[23] ( PIN gpio_analog_sel[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 199540 4766350 ) ( * 4768750 ) ; + - gpio_dm2[23] ( PIN gpio_dm2[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 196320 4766350 ) ( * 4768750 ) ; + - gpio_holdover[23] ( PIN gpio_holdover[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 193100 4766350 ) ( * 4768750 ) ; + - gpio_out[23] ( PIN gpio_out[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 190340 4766350 ) ( * 4768750 ) ; + - gpio_vtrip_sel[23] ( PIN gpio_vtrip_sel[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 181140 4766350 ) ( * 4768750 ) ; + - gpio_ib_mode_sel[23] ( PIN gpio_ib_mode_sel[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 177920 4766350 ) ( * 4768750 ) ; + - gpio_oeb[23] ( PIN gpio_oeb[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 174700 4766350 ) ( * 4768750 ) ; + - gpio_in_h[23] ( PIN gpio_in_h[23] ) + + ROUTED met2 TAPERRULE met2_width_280 ( 171940 4766350 ) ( * 4768750 ) ; + - gpio_loopback_one[23] ( PIN gpio_loopback_one[23] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 147640 4766350 ) ( * 4768630 ) ; + - gpio_loopback_zero[23] ( PIN gpio_loopback_zero[23] ) + + ROUTED met2 TAPERRULE met2_width_300 ( 137635 4766350 ) ( * 4768630 ) ; +END NETS + +END DESIGN + diff --git a/mag/caravel_openframe.mag b/mag/caravel_openframe.mag index afe7cc31..4abf31ee 100644 --- a/mag/caravel_openframe.mag +++ b/mag/caravel_openframe.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1686190293 +timestamp 1695675344 << checkpaint >> rect 40504 1532674 43088 1535246 rect 40504 1443474 43088 1446046 @@ -86,11 +86,11 @@ rect 515440 6598 527960 19088 rect 570422 6811 582590 18975 rect 624222 6811 636390 18975 use chip_io_openframe chip_io_openframe_0 -timestamp 1686190293 +timestamp 1695675801 transform 1 0 0 0 1 0 box 0 0 717600 1037600 use openframe_project_wrapper openframe_project_wrapper_0 -timestamp 1686190293 +timestamp 1695675240 transform 1 0 42137 0 1 42137 box -444 -444 633770 953770 << labels >> diff --git a/mag/chip_io_gpio_connects.mag b/mag/chip_io_gpio_connects.mag index 0bbce4fe..03a1df41 100644 --- a/mag/chip_io_gpio_connects.mag +++ b/mag/chip_io_gpio_connects.mag @@ -1,106 +1,210 @@ magic tech sky130A magscale 1 2 -timestamp 1686151263 -<< checkpaint >> -rect 675396 121665 678085 122078 -rect 675258 117277 678085 121665 -rect 674508 115475 678085 117277 -rect 674508 114693 678023 115475 -rect 674516 114683 678023 114693 -rect 674516 114672 678018 114683 -rect 674516 103443 677084 114672 -rect 674514 103440 677086 103443 -rect 674514 103439 677088 103440 -rect 674509 103379 677091 103439 -rect 674509 100863 677215 103379 -rect 674512 100696 677215 100863 -rect 674516 99196 677084 100696 +timestamp 1695666643 +<< error_p >> +rect 675774 102379 675780 102383 +rect 675768 102371 675769 102377 +rect 675768 102125 675769 102131 +rect 675774 102119 675780 102123 << metal1 >> -rect 675768 115959 675774 116011 -rect 675826 115959 675832 116011 +rect 675768 115799 675774 116011 +rect 675826 115799 675832 116011 rect 675682 113371 675734 115709 rect 675586 112665 675638 112671 rect 675586 112487 675638 112493 -rect 675490 109630 675542 109636 -rect 675490 109452 675542 109458 -rect 675492 101631 675540 109452 -rect 675588 108347 675636 112487 -rect 675682 109050 675734 113199 -rect 675586 108341 675638 108347 -rect 675586 108163 675638 108169 -rect 675490 101625 675542 101631 -rect 675490 101567 675542 101573 -rect 675492 100265 675540 101567 -rect 675588 100462 675636 108163 +rect 675588 108330 675636 112487 +rect 675682 108990 675734 113199 +rect 675586 108324 675638 108330 +rect 675586 108146 675638 108152 +rect 675588 100462 675636 108146 rect 675586 100456 675638 100462 rect 675586 100278 675638 100284 rect 675588 100265 675636 100278 -rect 675682 99896 675734 108866 -rect 675776 102183 675824 115959 -rect 675774 102177 675826 102183 +rect 675682 99896 675734 108806 +rect 675776 102383 675824 115799 +rect 675878 109636 675930 109642 +rect 675878 109452 675930 109458 +rect 675774 102377 675826 102383 rect 675774 102119 675826 102125 +rect 675880 101831 675928 109452 +rect 677392 103462 677399 103674 +rect 677451 103514 677458 103674 +rect 677451 103462 677652 103514 +rect 675878 101825 675930 101831 +rect 675878 101567 675930 101573 << via1 >> -rect 675774 115959 675826 116011 +rect 675774 115799 675826 116011 rect 675682 113199 675734 113371 rect 675586 112493 675638 112665 -rect 675490 109458 675542 109630 -rect 675682 108866 675734 109050 -rect 675586 108169 675638 108341 -rect 675490 101573 675542 101625 +rect 675682 108806 675734 108990 +rect 675586 108152 675638 108324 rect 675586 100284 675638 100456 -rect 675774 102125 675826 102177 +rect 675878 109458 675930 109636 +rect 675774 102125 675826 102377 +rect 677399 103462 677451 103674 +rect 675878 101573 675930 101825 << metal2 >> rect 675774 116011 675826 116017 rect 676698 116015 676758 116024 rect 675826 115961 676698 116009 -rect 675774 115953 675826 115959 -rect 676698 115946 676758 115955 -rect 675676 113311 675682 113371 -rect 675407 113255 675682 113311 -rect 675676 113199 675682 113255 +rect 675826 115801 675836 115961 +rect 676685 115801 676698 115961 +rect 675774 115793 675826 115799 +rect 676698 115786 676758 115795 +rect 677000 115915 677278 115920 +rect 677000 115801 677159 115915 +rect 677273 115801 677282 115915 +rect 677000 115796 677278 115801 +rect 677000 115703 677085 115796 +rect 675831 115647 677085 115703 +rect 677025 115279 677614 115325 +rect 677025 115151 677071 115279 +rect 675874 115095 677071 115151 +rect 676855 114870 677614 114916 +rect 676855 114507 676901 114870 +rect 675874 114451 676901 114507 +rect 677017 114722 677614 114774 +rect 677017 113863 677069 114722 +rect 675874 113807 677069 113863 +rect 676969 113397 677614 113449 +rect 675676 113199 675682 113371 rect 675734 113311 675740 113371 -rect 675734 113255 675887 113311 +rect 676969 113311 677021 113397 +rect 675734 113255 677021 113311 rect 675734 113199 675740 113255 -rect 675407 112665 675887 112667 -rect 675407 112611 675586 112665 -rect 675580 112493 675586 112611 -rect 675638 112611 675887 112665 +rect 677022 112686 677614 112738 +rect 677022 112667 677074 112686 +rect 675580 112665 677074 112667 +rect 675580 112493 675586 112665 +rect 675638 112611 677074 112665 rect 675638 112493 675644 112611 -rect 675407 109630 675887 109631 -rect 675407 109575 675490 109630 -rect 675484 109458 675490 109575 -rect 675542 109575 675887 109630 -rect 675542 109458 675548 109575 -rect 675676 108866 675682 109050 -rect 675734 108866 675740 109050 -rect 675407 108341 675887 108343 -rect 675407 108287 675586 108341 -rect 675580 108169 675586 108287 -rect 675638 108287 675887 108341 -rect 675638 108169 675644 108287 -rect 675407 102177 675887 102179 -rect 675407 102125 675774 102177 -rect 675826 102125 675887 102177 -rect 675407 102123 675887 102125 -rect 675407 101625 675887 101627 -rect 675407 101573 675490 101625 -rect 675542 101573 675887 101625 -rect 675407 101571 675887 101573 -rect 675580 100339 675586 100456 -rect 675407 100284 675586 100339 +rect 675874 111967 677216 112023 +rect 677164 111529 677216 111967 +rect 677164 111477 677614 111529 +rect 675874 111415 677044 111471 +rect 675874 110771 676892 110827 +rect 676836 110302 676892 110771 +rect 676992 110680 677044 111415 +rect 676992 110628 677614 110680 +rect 676836 110250 677614 110302 +rect 675874 110127 676727 110183 +rect 676671 109850 676727 110127 +rect 676671 109798 677614 109850 +rect 675872 109636 677614 109637 +rect 675872 109458 675878 109636 +rect 675930 109585 677614 109636 +rect 675930 109581 676776 109585 +rect 675930 109458 675936 109581 +rect 675676 108806 675682 108990 +rect 675734 108908 675740 108990 +rect 675734 108856 677614 108908 +rect 675734 108806 675740 108856 +rect 675580 108324 677230 108326 +rect 675580 108152 675586 108324 +rect 675638 108322 677230 108324 +rect 675638 108270 677614 108322 +rect 675638 108152 675644 108270 +rect 675874 107643 677216 107699 +rect 675874 107091 677086 107147 +rect 677020 106982 677086 107091 +rect 677016 106766 677025 106982 +rect 677081 106766 677090 106982 +rect 677164 106951 677216 107643 +rect 677164 106899 677614 106951 +rect 677020 106761 677086 106766 +rect 675874 106447 677230 106503 +rect 677174 106029 677230 106447 +rect 677174 105977 677614 106029 +rect 675874 105803 677451 105859 +rect 676806 105386 677010 105390 +rect 675407 105381 677015 105386 +rect 675407 105172 676806 105381 +rect 676801 104977 676806 105172 +rect 677010 104977 677015 105381 +rect 676801 104972 677015 104977 +rect 676806 104968 677010 104972 +rect 675874 104607 676520 104663 +rect 675407 103375 676368 103503 +rect 676240 103038 676368 103375 +rect 676466 103185 676518 104607 +rect 677399 103674 677451 105803 +rect 677399 103456 677451 103462 +rect 676466 103133 677240 103185 +rect 676240 102910 677133 103038 +rect 675874 102767 676909 102823 +rect 675769 102377 675832 102379 +rect 675769 102125 675774 102377 +rect 675826 102179 675832 102377 +rect 675826 102125 676776 102179 +rect 675769 102123 676776 102125 +rect 675871 101825 675936 101827 +rect 675871 101573 675878 101825 +rect 675930 101627 675936 101825 +rect 675930 101573 676610 101627 +rect 675871 101571 676610 101573 +rect 675874 100927 676467 100983 +rect 675580 100284 675586 100456 rect 675638 100339 675644 100456 -rect 675638 100284 675887 100339 -rect 675407 100283 675887 100284 +rect 675638 100284 676255 100339 +rect 676401 100307 676467 100927 +rect 675580 100283 676255 100284 +rect 676214 100057 676254 100283 +rect 676397 100091 676406 100307 +rect 676462 100091 676471 100307 +rect 676570 100259 676610 101571 +rect 676710 100595 676776 102123 +rect 676710 100379 676715 100595 +rect 676771 100379 676776 100595 +rect 676857 100478 676909 102767 +rect 677005 100744 677133 102910 +rect 677188 102633 677240 103133 +rect 677188 102581 677614 102633 +rect 677005 100616 677614 100744 +rect 676857 100426 677614 100478 +rect 676710 100374 676776 100379 +rect 676715 100370 676771 100374 +rect 676570 100219 677614 100259 +rect 676401 100086 676467 100091 +rect 676214 100017 677614 100057 << via2 >> -rect 676698 115955 676758 116015 +rect 676698 115795 676758 116015 +rect 677159 115801 677273 115915 +rect 677025 106766 677081 106982 +rect 676806 104977 677010 105381 +rect 676406 100091 676462 100307 +rect 676715 100379 676771 100595 << metal3 >> rect 676696 116020 676756 117658 rect 676693 116015 676763 116020 -rect 676693 115955 676698 116015 -rect 676758 115955 676763 116015 -rect 676693 115950 676763 115955 -rect 676696 115943 676756 115950 +rect 676693 115795 676698 116015 +rect 676758 115795 676763 116015 +rect 677154 115915 677614 115920 +rect 677154 115801 677159 115915 +rect 677273 115801 677614 115915 +rect 677154 115796 677614 115801 +rect 676693 115790 676763 115795 +rect 676696 115783 676756 115790 +rect 677020 106982 677095 106987 +rect 677020 106766 677025 106982 +rect 677081 106827 677095 106982 +rect 677081 106766 677614 106827 +rect 677020 106761 677614 106766 +rect 676801 105381 677015 105386 +rect 676801 104977 676806 105381 +rect 677010 104977 677015 105381 +rect 676801 103436 677015 104977 +rect 676801 103222 677614 103436 +rect 676710 100595 676776 100600 +rect 676710 100379 676715 100595 +rect 676771 100379 676776 100595 +rect 676401 100307 676472 100312 +rect 676401 100091 676406 100307 +rect 676462 100152 676472 100307 +rect 676710 100284 676776 100379 +rect 676710 100218 677614 100284 +rect 676462 100091 677614 100152 +rect 676401 100086 677614 100091 << properties >> string flatten true << end >> diff --git a/mag/chip_io_gpio_connects_horiz.mag b/mag/chip_io_gpio_connects_horiz.mag index 9648d498..ca61c20f 100644 --- a/mag/chip_io_gpio_connects_horiz.mag +++ b/mag/chip_io_gpio_connects_horiz.mag @@ -1,216 +1,274 @@ magic tech sky130A magscale 1 2 -timestamp 1686190293 +timestamp 1695675344 << checkpaint >> -rect 40504 681074 43088 683646 -rect 674512 114908 678096 118596 -rect 674512 114708 678037 114908 -rect 674245 108867 676990 111443 -rect 674143 103403 677009 105940 -rect 674244 103347 676989 103403 +rect 674054 99659 678702 116976 << metal1 >> rect 675778 116066 675830 116072 -rect 675778 116008 675830 116014 -rect 675682 113371 675734 115709 -rect 675586 112665 675638 112671 -rect 675586 112487 675638 112493 -rect 675490 109630 675542 109636 -rect 675490 109452 675542 109458 -rect 675492 101631 675540 109452 -rect 675588 108347 675636 112487 -rect 675682 109050 675734 113199 -rect 675586 108341 675638 108347 -rect 675586 108163 675638 108169 -rect 675490 101625 675542 101631 -rect 675490 101567 675542 101573 -rect 675492 100265 675540 101567 -rect 675588 100462 675636 108163 +rect 675778 115848 675830 115854 +rect 675682 113513 675734 115709 +rect 675586 112736 675638 112742 +rect 675586 112558 675638 112564 +rect 675588 108330 675636 112558 +rect 675682 108981 675734 113341 +rect 675586 108324 675638 108330 +rect 675586 108146 675638 108152 +rect 675588 100462 675636 108146 rect 675586 100456 675638 100462 rect 675586 100278 675638 100284 -rect 675588 100265 675636 100278 -rect 675682 99896 675734 108866 -rect 675780 102183 675828 116008 -rect 675778 102177 675830 102183 +rect 675682 99896 675734 108797 +rect 675780 102343 675828 115848 +rect 675874 109636 675926 109642 +rect 675874 109458 675926 109464 +rect 675778 102337 675830 102343 rect 675778 102119 675830 102125 -rect 675780 102106 675828 102119 +rect 675876 101791 675924 109458 +rect 677378 103462 677384 103674 +rect 677436 103514 677442 103674 +rect 677436 103462 677658 103514 +rect 675874 101785 675926 101791 +rect 675874 101567 675926 101573 +rect 675876 101554 675924 101567 << via1 >> -rect 675778 116014 675830 116066 -rect 675682 113199 675734 113371 -rect 675586 112493 675638 112665 -rect 675490 109458 675542 109630 -rect 675682 108866 675734 109050 -rect 675586 108169 675638 108341 -rect 675490 101573 675542 101625 +rect 675778 115854 675830 116066 +rect 675682 113341 675734 113513 +rect 675586 112564 675638 112736 +rect 675682 108797 675734 108981 +rect 675586 108152 675638 108324 rect 675586 100284 675638 100456 -rect 675778 102125 675830 102177 +rect 675874 109464 675926 109636 +rect 675778 102125 675830 102337 +rect 677384 103462 677436 103674 +rect 675874 101573 675926 101785 << metal2 >> -rect 675772 116014 675778 116066 +rect 675772 115854 675778 116066 rect 675830 116064 675836 116066 -rect 676699 116064 676708 116070 +rect 676699 116064 676708 116230 rect 675830 116016 676708 116064 -rect 675830 116014 675836 116016 +rect 675830 115854 675836 116016 rect 676699 116010 676708 116016 -rect 676768 116010 676777 116070 -rect 675495 115647 675505 115703 -rect 675730 115647 675740 115703 -rect 675495 115095 675505 115151 -rect 675730 115095 675740 115151 -rect 675490 114451 675506 114507 -rect 675731 114451 675747 114507 -rect 675496 113807 675506 113863 -rect 675731 113807 675741 113863 -rect 675676 113311 675682 113371 -rect 675407 113255 675682 113311 -rect 675676 113199 675682 113255 -rect 675734 113311 675740 113371 -rect 675734 113255 675887 113311 -rect 675734 113199 675740 113255 -rect 675407 112665 675887 112667 -rect 675407 112611 675586 112665 -rect 675580 112493 675586 112611 -rect 675638 112611 675887 112665 -rect 675638 112493 675644 112611 -rect 675496 111967 675506 112023 -rect 675731 111967 675741 112023 -rect 675495 111415 675505 111471 -rect 675730 111415 675740 111471 -rect 675495 110771 675505 110827 -rect 675730 110771 675740 110827 -rect 675407 109630 675887 109631 -rect 675407 109575 675490 109630 -rect 675484 109458 675490 109575 -rect 675542 109575 675887 109630 -rect 675542 109458 675548 109575 -rect 675676 108866 675682 109050 -rect 675734 108866 675740 109050 -rect 675407 108341 675887 108343 -rect 675407 108287 675586 108341 -rect 675580 108169 675586 108287 -rect 675638 108287 675887 108341 -rect 675638 108169 675644 108287 -rect 675496 107643 675505 107699 -rect 675730 107643 675739 107699 -rect 675496 107091 675506 107147 -rect 675731 107091 675741 107147 -rect 675496 106447 675506 106503 -rect 675731 106447 675741 106503 -rect 675495 105803 675505 105859 -rect 675730 105803 675740 105859 -rect 675494 105251 675504 105307 -rect 675729 105251 675739 105307 -rect 675496 103411 675506 103467 -rect 675731 103411 675741 103467 -rect 675495 102767 675505 102823 -rect 675730 102767 675740 102823 -rect 675762 102177 675840 102179 -rect 675762 102125 675778 102177 -rect 675830 102125 675840 102177 -rect 675762 102123 675840 102125 -rect 675407 101625 675887 101627 -rect 675407 101573 675490 101625 -rect 675542 101573 675887 101625 -rect 675407 101571 675887 101573 -rect 675495 100927 675505 100983 -rect 675730 100927 675740 100983 -rect 675580 100339 675586 100456 -rect 675407 100284 675586 100339 +rect 676768 116010 676777 116230 +rect 677187 115272 677196 115332 +rect 677416 115325 677425 115332 +rect 677416 115279 677607 115325 +rect 677416 115272 677425 115279 +rect 677189 114863 677198 114923 +rect 677418 114916 677427 114923 +rect 677418 114870 677607 114916 +rect 677418 114863 677427 114870 +rect 677186 114718 677195 114778 +rect 677415 114774 677424 114778 +rect 677415 114722 677607 114774 +rect 677415 114718 677424 114722 +rect 675676 113341 675682 113513 +rect 675734 113453 675740 113513 +rect 675734 113449 676020 113453 +rect 675734 113397 677607 113449 +rect 675734 113341 675740 113397 +rect 675580 112736 677607 112738 +rect 675580 112564 675586 112736 +rect 675638 112686 677607 112736 +rect 675638 112682 677262 112686 +rect 675638 112564 675644 112682 +rect 677220 111689 677290 111694 +rect 677216 111469 677225 111689 +rect 677285 111529 677295 111689 +rect 677285 111477 677607 111529 +rect 677285 111469 677294 111477 +rect 677220 111464 677290 111469 +rect 676980 110620 676989 110840 +rect 677049 110680 677058 110840 +rect 677049 110628 677607 110680 +rect 677049 110620 677058 110628 +rect 676758 110243 676767 110463 +rect 676827 110302 676836 110463 +rect 676827 110250 677607 110302 +rect 676827 110243 676836 110250 +rect 676543 109796 676552 110016 +rect 676612 109850 676621 110016 +rect 676612 109798 677607 109850 +rect 676612 109796 676621 109798 +rect 675868 109636 677607 109637 +rect 675868 109464 675874 109636 +rect 675926 109585 677607 109636 +rect 675926 109581 677286 109585 +rect 675926 109464 675932 109581 +rect 675676 108797 675682 108981 +rect 675734 108912 675740 108981 +rect 675734 108908 677272 108912 +rect 675734 108856 677607 108908 +rect 675734 108797 675740 108856 +rect 675580 108324 677286 108326 +rect 675580 108152 675586 108324 +rect 675638 108322 677286 108324 +rect 675638 108270 677607 108322 +rect 675638 108152 675644 108270 +rect 677373 106895 677382 107115 +rect 677442 106951 677451 107115 +rect 677442 106899 677616 106951 +rect 677442 106895 677451 106899 +rect 677379 106510 677439 106514 +rect 677374 106505 677444 106510 +rect 677374 106285 677379 106505 +rect 677439 106285 677444 106505 +rect 677374 106275 677444 106285 +rect 677384 106029 677436 106275 +rect 677384 105977 677607 106029 +rect 677380 105865 677440 105874 +rect 677380 105636 677440 105645 +rect 677384 103674 677436 105636 +rect 677384 103456 677436 103462 +rect 676885 102577 676894 102797 +rect 676954 102633 676963 102797 +rect 676954 102581 677607 102633 +rect 676954 102577 676963 102581 +rect 675773 102337 675835 102343 +rect 675773 102125 675778 102337 +rect 675830 102179 675835 102337 +rect 676285 102179 676363 102189 +rect 675830 102125 676291 102179 +rect 675773 102123 676291 102125 +rect 675773 102118 675835 102123 +rect 676285 101963 676291 102123 +rect 676357 101963 676363 102179 +rect 676285 101954 676363 101963 +rect 675870 101785 675931 101792 +rect 675870 101573 675874 101785 +rect 675926 101627 675931 101785 +rect 675926 101573 676249 101627 +rect 675870 101571 676249 101573 +rect 675870 101566 675931 101571 +rect 675580 100284 675586 100456 rect 675638 100339 675644 100456 -rect 675638 100284 675887 100339 -rect 675407 100283 675887 100284 +rect 675638 100284 676031 100339 +rect 675580 100283 676031 100284 +rect 675991 100057 676031 100283 +rect 676209 100259 676249 101571 +rect 676473 100422 676482 100642 +rect 676542 100478 676551 100642 +rect 676653 100616 676662 100904 +rect 676790 100744 676800 100904 +rect 676790 100616 677607 100744 +rect 676542 100426 677607 100478 +rect 676542 100422 676551 100426 +rect 676209 100219 677607 100259 +rect 675991 100017 677607 100057 << via2 >> -rect 676708 116010 676768 116070 -rect 675505 115647 675730 115703 -rect 675505 115095 675730 115151 -rect 675506 114451 675731 114507 -rect 675506 113807 675731 113863 -rect 675506 111967 675731 112023 -rect 675505 111415 675730 111471 -rect 675505 110771 675730 110827 -rect 675505 110127 675730 110183 -rect 675505 107643 675730 107699 -rect 675506 107091 675731 107147 -rect 675506 106447 675731 106503 -rect 675505 105803 675730 105859 -rect 675504 105251 675729 105307 -rect 675504 104607 675729 104663 -rect 675506 103411 675731 103467 -rect 675505 102767 675730 102823 -rect 675505 100927 675730 100983 +rect 676708 116010 676768 116230 +rect 677196 115272 677416 115332 +rect 677198 114863 677418 114923 +rect 677195 114718 677415 114778 +rect 677225 111469 677285 111689 +rect 676989 110620 677049 110840 +rect 676767 110243 676827 110463 +rect 676552 109796 676612 110016 +rect 677382 106895 677442 107115 +rect 677379 106285 677439 106505 +rect 677380 105645 677440 105865 +rect 676894 102577 676954 102797 +rect 676291 101963 676357 102179 +rect 676482 100422 676542 100642 +rect 676662 100616 676790 100904 << metal3 >> -rect 676708 116075 676768 117452 -rect 676703 116070 676773 116075 -rect 676703 116010 676708 116070 -rect 676768 116010 676773 116070 +rect 676708 116235 676768 117452 +rect 676703 116230 676773 116235 +rect 676703 116010 676708 116230 +rect 676768 116010 676773 116230 rect 676703 116005 676773 116010 -rect 675407 115703 675887 115710 -rect 675407 115647 675505 115703 -rect 675730 115647 675887 115703 -rect 675407 115640 675887 115647 -rect 675407 115151 675887 115158 -rect 675407 115095 675505 115151 -rect 675730 115095 675887 115151 -rect 675407 115088 675887 115095 -rect 675407 114507 675887 114514 -rect 675407 114451 675506 114507 -rect 675731 114451 675887 114507 -rect 675407 114444 675887 114451 -rect 675407 113863 675887 113870 -rect 675407 113807 675506 113863 -rect 675731 113807 675887 113863 -rect 675407 113800 675887 113807 -rect 675407 112023 675887 112030 -rect 675407 111967 675506 112023 -rect 675731 111967 675887 112023 -rect 675407 111960 675887 111967 -rect 675407 111471 675887 111478 -rect 675407 111415 675505 111471 -rect 675730 111415 675887 111471 -rect 675407 111408 675887 111415 -rect 675407 110827 675887 110834 -rect 675407 110771 675505 110827 -rect 675730 110771 675887 110827 -rect 675407 110764 675887 110771 -rect 675407 110183 675887 110190 -rect 675407 110127 675505 110183 -rect 675730 110127 675887 110183 -rect 675407 110120 675887 110127 -rect 675407 107699 675887 107706 -rect 675407 107643 675505 107699 -rect 675730 107643 675887 107699 -rect 675407 107636 675887 107643 -rect 675407 107147 675887 107154 -rect 675407 107091 675506 107147 -rect 675731 107091 675887 107147 -rect 675407 107084 675887 107091 -rect 675407 106503 675887 106510 -rect 675407 106447 675506 106503 -rect 675731 106447 675887 106503 -rect 675407 106440 675887 106447 -rect 675407 105859 675887 105866 -rect 675407 105803 675505 105859 -rect 675730 105803 675887 105859 -rect 675407 105796 675887 105803 -rect 675406 105307 675886 105314 -rect 675406 105251 675504 105307 -rect 675729 105251 675886 105307 -rect 675406 105244 675886 105251 -rect 675407 104663 675887 104670 -rect 675407 104607 675504 104663 -rect 675729 104607 675887 104663 -rect 675407 104600 675887 104607 -rect 675407 103467 675887 103474 -rect 675407 103411 675506 103467 -rect 675731 103411 675887 103467 -rect 675407 103404 675887 103411 -rect 675407 102823 675887 102830 -rect 675407 102767 675505 102823 -rect 675730 102767 675887 102823 -rect 675407 102760 675887 102767 -rect 675407 100983 675887 100990 -rect 675407 100927 675505 100983 -rect 675730 100927 675887 100983 -rect 675407 100920 675887 100927 +rect 677177 115796 677607 115920 +rect 677177 115711 677247 115796 +rect 675407 115641 677247 115711 +rect 677191 115332 677421 115337 +rect 675942 115272 677196 115332 +rect 677416 115272 677421 115332 +rect 675942 115159 676002 115272 +rect 677191 115267 677421 115272 +rect 675407 115089 676002 115159 +rect 677193 114923 677423 114928 +rect 676200 114863 677198 114923 +rect 677418 114863 677423 114923 +rect 676200 114515 676260 114863 +rect 677193 114858 677423 114863 +rect 677190 114778 677420 114783 +rect 675407 114445 676260 114515 +rect 676326 114718 677195 114778 +rect 677415 114718 677420 114778 +rect 676326 113871 676386 114718 +rect 677190 114713 677420 114718 +rect 675407 113801 676386 113871 +rect 675407 111961 677290 112031 +rect 677220 111689 677290 111961 +rect 675407 111409 677054 111479 +rect 677220 111469 677225 111689 +rect 677285 111469 677290 111689 +rect 677220 111464 677290 111469 +rect 676984 110840 677054 111409 +rect 675407 110765 676832 110835 +rect 676762 110463 676832 110765 +rect 676984 110620 676989 110840 +rect 677049 110620 677054 110840 +rect 676984 110615 677054 110620 +rect 676762 110243 676767 110463 +rect 676827 110243 676832 110463 +rect 676762 110238 676832 110243 +rect 675407 110121 676617 110191 +rect 676547 110016 676617 110121 +rect 676547 109796 676552 110016 +rect 676612 109796 676617 110016 +rect 676547 109790 676617 109796 +rect 675407 107637 677442 107707 +rect 675407 107085 677250 107155 +rect 677382 107120 677442 107637 +rect 677180 106827 677250 107085 +rect 677377 107115 677447 107120 +rect 677377 106895 677382 107115 +rect 677442 106895 677447 107115 +rect 677377 106890 677447 106895 +rect 677180 106761 677616 106827 +rect 675407 106510 677379 106511 +rect 675407 106505 677444 106510 +rect 675407 106441 677379 106505 +rect 677374 106285 677379 106441 +rect 677439 106285 677444 106505 +rect 677374 106280 677444 106285 +rect 677375 105866 677445 105870 +rect 675407 105865 677445 105866 +rect 675407 105806 677380 105865 +rect 675407 105796 675887 105806 +rect 677375 105645 677380 105806 +rect 677440 105645 677445 105865 +rect 677375 105640 677445 105645 +rect 675407 105172 677260 105386 +rect 675407 104601 676955 104671 +rect 675407 103375 676790 103503 +rect 675407 102761 676542 102831 +rect 676286 102179 676362 102187 +rect 676286 101963 676291 102179 +rect 676357 101963 676362 102179 +rect 676286 101958 676362 101963 +rect 675407 100921 676153 100991 +rect 676087 100152 676153 100921 +rect 676291 100284 676357 101958 +rect 676482 100647 676542 102761 +rect 676662 100909 676790 103375 +rect 676894 102802 676954 104601 +rect 677046 103436 677260 105172 +rect 677046 103222 677607 103436 +rect 676889 102797 676959 102802 +rect 676889 102577 676894 102797 +rect 676954 102577 676959 102797 +rect 676889 102572 676959 102577 +rect 676657 100904 676795 100909 +rect 676477 100642 676547 100647 +rect 676477 100422 676482 100642 +rect 676542 100422 676547 100642 +rect 676657 100616 676662 100904 +rect 676790 100616 676795 100904 +rect 676657 100611 676795 100616 +rect 676477 100417 676547 100422 +rect 676291 100218 677607 100284 +rect 676087 100086 677607 100152 << properties >> string flatten true << end >> diff --git a/mag/chip_io_openframe.mag b/mag/chip_io_openframe.mag index 4bca9004..0c4ebd8a 100644 --- a/mag/chip_io_openframe.mag +++ b/mag/chip_io_openframe.mag @@ -1,371 +1,159 @@ magic tech sky130A magscale 1 2 -timestamp 1686190293 +timestamp 1695675801 << checkpaint >> -rect 40504 1532674 43088 1535246 -rect 40504 1443474 43088 1446046 -rect 40504 1354274 43088 1356846 -rect 40504 1309274 43088 1311846 -rect 40504 1264274 43088 1266846 -rect 40504 1219074 43088 1221646 -rect 40504 1174074 43088 1176646 -rect 40504 1128874 43088 1131446 -rect -1260 996747 718860 1038860 -rect -1260 996340 42060 996747 -rect -1260 971594 40853 996340 -rect 68429 995258 93594 996747 -rect 68429 994534 73601 995258 -rect 74797 994147 93594 995258 -rect 119629 995258 144994 996747 -rect 119629 994534 124801 995258 -rect 126197 994147 144994 995258 -rect 170829 995258 196394 996747 -rect 170829 994534 176001 995258 -rect 177597 994147 196394 995258 -rect 222029 995258 247794 996747 -rect 222029 994534 227201 995258 -rect 228997 994147 247794 995258 -rect 273229 995258 299394 996747 -rect 332140 996340 349660 996747 -rect 273229 994534 278401 995258 -rect 280597 994147 299394 995258 -rect 377629 994534 401194 996747 -rect 466629 994534 490194 996747 -rect 517829 994534 541594 996747 -rect 574340 996340 591860 996747 -rect 617229 995258 643394 996747 -rect 676340 995540 718860 996747 -rect 617229 994534 622401 995258 -rect 382397 994147 401194 994534 -rect 471397 994147 490194 994534 -rect 522797 994147 541594 994534 -rect 624597 994147 643394 995258 -rect 88689 994059 91412 994147 -rect 140092 994068 142815 994147 -rect 191496 994050 194219 994147 -rect 242902 994086 245625 994147 -rect 294504 994038 297227 994147 -rect 396305 994083 399028 994147 -rect 485285 994047 488008 994147 -rect 536713 994008 539436 994147 -rect 638473 993970 641185 994147 -rect 676747 972411 718860 995540 -rect -1260 971564 43453 971594 -rect -1260 969399 43454 971564 -rect 674545 970312 718860 972411 -rect -1260 966701 43595 969399 -rect -1260 964260 43457 966701 -rect -1260 951488 43454 964260 -rect 674146 957540 718860 970312 -rect 674143 955127 718860 957540 -rect 674053 952395 718860 955127 -rect -1260 950747 42152 951488 -rect -1260 945575 43062 950747 -rect 674146 950236 718860 952395 -rect 674147 950206 718860 950236 -rect -1260 930447 40853 945575 -rect -1260 910740 43030 930447 -rect 676747 923860 718860 950206 -rect -1260 909046 40853 910740 -rect -1260 906474 43088 909046 -rect -1260 886060 40853 906474 -rect 674570 904153 718860 923860 -rect -1260 868540 41260 886060 -rect 676747 882411 718860 904153 -rect 674545 881112 718860 882411 -rect -1260 864046 40853 868540 -rect 674146 868340 718860 881112 -rect 674143 865952 718860 868340 -rect -1260 861474 43088 864046 -rect 674079 863220 718860 865952 -rect -1260 843860 40853 861474 -rect 674146 861036 718860 863220 -rect 674147 861006 718860 861036 -rect -1260 826340 41260 843860 -rect 676747 834660 718860 861006 -rect -1260 819046 40853 826340 -rect -1260 816474 43088 819046 -rect 676340 817140 718860 834660 -rect -1260 801794 40853 816474 -rect -1260 801764 43453 801794 -rect -1260 799604 43454 801764 -rect -1260 796906 43574 799604 -rect -1260 794460 43457 796906 -rect -1260 781688 43454 794460 -rect 676747 793411 718860 817140 -rect 674545 791912 718860 793411 -rect -1260 780747 42152 781688 -rect -1260 775575 43062 780747 -rect 674146 779140 718860 791912 -rect 674143 776750 718860 779140 -rect -1260 773846 40853 775575 -rect 674041 774018 718860 776750 -rect -1260 771274 43088 773846 -rect 674146 771836 718860 774018 -rect 674147 771806 718860 771836 -rect -1260 758594 40853 771274 -rect -1260 758564 43453 758594 -rect -1260 756407 43454 758564 -rect -1260 753709 43568 756407 -rect -1260 751260 43457 753709 -rect -1260 738488 43454 751260 -rect 676747 748411 718860 771806 -rect 674545 746912 718860 748411 -rect -1260 737747 42152 738488 -rect -1260 732575 43062 737747 -rect 674146 734140 718860 746912 -rect -1260 728846 40853 732575 -rect 674143 731756 718860 734140 -rect 674050 729024 718860 731756 -rect -1260 726274 43088 728846 -rect 674146 726836 718860 729024 -rect 674147 726806 718860 726836 -rect -1260 715394 40853 726274 -rect -1260 715364 43453 715394 -rect -1260 713205 43454 715364 -rect -1260 710504 43503 713205 -rect -1260 708060 43457 710504 -rect -1260 695288 43454 708060 -rect 676747 703411 718860 726806 -rect 674545 701912 718860 703411 -rect -1260 694747 42152 695288 -rect -1260 689575 43062 694747 -rect -1260 683646 40853 689575 -rect 674146 689140 718860 701912 -rect 674143 686729 718860 689140 -rect 674061 683997 718860 686729 -rect -1260 681074 43088 683646 -rect 674146 681836 718860 683997 -rect 674147 681806 718860 681836 -rect -1260 672194 40853 681074 -rect -1260 672164 43453 672194 -rect -1260 669996 43454 672164 -rect -1260 667295 43521 669996 -rect -1260 664860 43457 667295 -rect -1260 652088 43454 664860 -rect 676747 658411 718860 681806 -rect 674545 656712 718860 658411 -rect -1260 651747 42152 652088 -rect -1260 646575 43062 651747 -rect -1260 628994 40853 646575 -rect 674146 643940 718860 656712 -rect 674143 641546 718860 643940 -rect 674058 638814 718860 641546 -rect 674146 636636 718860 638814 -rect 674147 636606 718860 636636 -rect -1260 628964 43453 628994 -rect -1260 626775 43454 628964 -rect -1260 624074 43560 626775 -rect -1260 621660 43457 624074 -rect -1260 608888 43454 621660 -rect 676747 613411 718860 636606 -rect 674545 611712 718860 613411 -rect -1260 608747 42152 608888 -rect -1260 603575 43062 608747 -rect -1260 585794 40853 603575 -rect 674146 598940 718860 611712 -rect 674143 596526 718860 598940 -rect 674038 593794 718860 596526 -rect 674146 591636 718860 593794 -rect 674147 591606 718860 591636 -rect -1260 585764 43453 585794 -rect -1260 583599 43454 585764 -rect -1260 580898 43557 583599 -rect -1260 578460 43457 580898 -rect -1260 565688 43454 578460 -rect 676747 568411 718860 591606 -rect 674545 566512 718860 568411 -rect -1260 560575 43062 565688 -rect -1260 542594 40853 560575 -rect 674146 553740 718860 566512 -rect 674143 551322 718860 553740 -rect 673985 548590 718860 551322 -rect 674146 546436 718860 548590 -rect 674147 546406 718860 546436 -rect -1260 542564 43453 542594 -rect -1260 540417 43454 542564 -rect -1260 537716 43524 540417 -rect -1260 535260 43457 537716 -rect -1260 522488 43454 535260 -rect -1260 517575 43062 522488 -rect 676747 520060 718860 546406 -rect -1260 499260 40853 517575 -rect 676340 502540 718860 520060 -rect -1260 481740 41260 499260 -rect -1260 459247 40853 481740 -rect 676747 476060 718860 502540 -rect -1260 439540 43030 459247 -rect 674570 456353 718860 476060 -rect -1260 414994 40853 439540 -rect 676747 431860 718860 456353 -rect -1260 414964 43453 414994 -rect -1260 412794 43454 414964 -rect 676340 414340 718860 431860 -rect -1260 410093 43578 412794 -rect -1260 407660 43457 410093 -rect -1260 394888 43454 407660 -rect -1260 393747 42152 394888 -rect -1260 388575 43062 393747 -rect 676747 391411 718860 414340 -rect 674545 389312 718860 391411 -rect -1260 371794 40853 388575 -rect 674146 376540 718860 389312 -rect 674143 374089 718860 376540 -rect -1260 371764 43453 371794 -rect -1260 369576 43454 371764 -rect 674082 371404 718860 374089 -rect -1260 366875 43563 369576 -rect 674146 369236 718860 371404 -rect 674147 369206 718860 369236 -rect -1260 364460 43457 366875 -rect -1260 351688 43454 364460 -rect -1260 350747 42152 351688 -rect -1260 345575 43062 350747 -rect 676747 346411 718860 369206 -rect -1260 328594 40853 345575 -rect 674545 344112 718860 346411 -rect 674146 331340 718860 344112 -rect 674143 328891 718860 331340 -rect -1260 328564 43453 328594 -rect -1260 326398 43454 328564 -rect -1260 323697 43581 326398 -rect 674088 326206 718860 328891 -rect 674104 325013 718860 326206 -rect 674146 324036 718860 325013 -rect 674147 324006 718860 324036 -rect -1260 321260 43457 323697 -rect -1260 308488 43454 321260 -rect -1260 307747 42152 308488 -rect -1260 302575 43062 307747 -rect -1260 285394 40853 302575 -rect 676747 301411 718860 324006 -rect 674545 299112 718860 301411 -rect 674146 286340 718860 299112 -rect -1260 285364 43453 285394 -rect -1260 283181 43454 285364 -rect 674143 283987 718860 286340 -rect -1260 280512 43530 283181 -rect 674061 281197 718860 283987 -rect -1260 278060 43457 280512 -rect 674146 279036 718860 281197 -rect 674147 279006 718860 279036 -rect -1260 265288 43454 278060 -rect -1260 264747 42152 265288 -rect -1260 259575 43062 264747 -rect -1260 242194 40853 259575 -rect 676747 256411 718860 279006 -rect 674545 254112 718860 256411 -rect -1260 242164 43453 242194 -rect -1260 239999 43454 242164 -rect 674146 242129 718860 254112 -rect -1260 237330 43626 239999 -rect 674061 239339 718860 242129 -rect 674143 239018 718860 239339 -rect -1260 234860 43457 237330 -rect 674099 236228 718860 239018 -rect -1260 222088 43454 234860 -rect 674146 234036 718860 236228 -rect 674147 234006 718860 234036 -rect -1260 221747 42152 222088 -rect -1260 216575 43062 221747 -rect 676747 219326 718860 234006 -rect 674512 216754 718860 219326 -rect -1260 198994 40853 216575 -rect 676747 211411 718860 216754 -rect 674545 208912 718860 211411 -rect -1260 198964 43453 198994 -rect -1260 196760 43454 198964 -rect -1260 194091 43587 196760 -rect 674146 196140 718860 208912 -rect -1260 191660 43457 194091 -rect 674143 193677 718860 196140 -rect -1260 178888 43454 191660 -rect 674042 191015 718860 193677 -rect 674146 188836 718860 191015 -rect 674147 188806 718860 188836 -rect -1260 178747 42152 178888 -rect -1260 173575 43062 178747 -rect 676747 176126 718860 188806 -rect -1260 126460 40853 173575 -rect 674512 173554 718860 176126 -rect 676747 166411 718860 173554 -rect 674545 163912 718860 166411 -rect 674146 151140 718860 163912 -rect 674143 148603 718860 151140 -rect 674146 143836 718860 148603 -rect 674147 143806 718860 143836 -rect 676747 132926 718860 143806 -rect 674512 130354 718860 132926 -rect -1260 108940 41260 126460 -rect 676747 121411 718860 130354 -rect 674545 118712 718860 121411 -rect -1260 86499 40853 108940 -rect 674146 105940 718860 118712 -rect 674143 103403 718860 105940 -rect 674146 98636 718860 103403 -rect 674147 98606 718860 98636 -rect 676747 89726 718860 98606 -rect 674512 87154 718860 89726 -rect -1260 66740 42960 86499 -rect -1260 42060 40853 66740 -rect 676747 46526 718860 87154 -rect 674512 43954 718860 46526 -rect 187150 43453 189873 43585 -rect 295800 43453 298523 43624 -rect 350583 43453 353306 43657 -rect 405391 43453 408114 43630 -rect 460222 43453 462945 43642 -rect 514982 43453 517705 43597 -rect 185006 43036 203803 43453 -rect 293606 43036 312403 43453 -rect 348406 43036 367203 43453 -rect 403206 43036 422003 43453 -rect 458006 43036 476803 43453 -rect 512806 43036 531603 43453 -rect -1260 40853 41260 42060 -rect 147050 41260 152222 43036 -rect 77540 40853 95060 41260 -rect 131216 40853 152222 41260 -rect 185006 42342 207022 43036 -rect 185006 42204 208065 42342 -rect 185006 40853 208478 42204 -rect 237701 40853 257460 42960 -rect 293606 42342 316622 43036 -rect 348406 42342 371422 43036 -rect 403206 42342 426222 43036 -rect 458006 42342 481022 43036 -rect 512806 42342 535822 43036 -rect 293606 42204 316665 42342 -rect 348406 42204 371465 42342 -rect 403206 42204 426265 42342 -rect 458006 42204 481065 42342 -rect 512806 42204 535865 42342 -rect 293606 40853 317078 42204 -rect 348406 40853 371878 42204 -rect 403206 40853 426678 42204 -rect 458006 40853 481478 42204 -rect 512806 40853 536278 42204 -rect 676747 41260 718860 43954 -rect 567740 40853 585260 41260 -rect 621540 40853 639060 41260 -rect 675540 40853 718860 41260 -rect -1260 -1260 718860 40853 -rect -1260 -1267 1261 -1260 -rect 674512 -42446 677096 -39874 -rect 674512 -170046 677096 -167474 -rect 674512 -213246 677096 -210674 -rect 674512 -256446 677096 -253874 -rect 674512 -299646 677096 -297074 -rect 674512 -342846 677096 -340274 -rect 674512 -386046 677096 -383474 +rect 68429 994534 73601 998782 +rect 119629 994534 124801 998782 +rect 170829 994534 176001 998782 +rect 222029 994534 227201 998782 +rect 273229 994534 278401 998782 +rect 377629 994534 382801 998782 +rect 466629 994534 471801 998782 +rect 517829 994534 523001 998782 +rect 617229 994534 622401 998782 +rect 674545 967239 678793 972411 +rect 38814 945575 43062 950747 +rect 674545 877239 678793 882411 +rect 674545 788239 678793 793411 +rect 38814 775575 43062 780747 +rect 674545 743239 678793 748411 +rect 38814 732575 43062 737747 +rect 674545 698239 678793 703411 +rect 38814 689575 43062 694747 +rect 674545 653239 678793 658411 +rect 38814 646575 43062 651747 +rect 38814 603575 43062 608747 +rect 674545 608239 678793 613411 +rect 38814 560575 43062 565747 +rect 674545 563239 678793 568411 +rect 38814 517575 43062 522747 +rect 38814 388575 43062 393747 +rect 674545 386239 678793 391411 +rect 38814 345575 43062 350747 +rect 674545 341239 678793 346411 +rect 38814 302575 43062 307747 +rect 674545 296239 678793 301411 +rect 38814 259575 43062 264747 +rect 674545 251239 678793 256411 +rect 38814 216575 43062 221747 +rect 674545 206239 678793 211411 +rect 38814 173575 43062 178747 +rect 674545 161239 678793 166411 +rect 674545 116239 678793 121411 +rect 16179 101085 19639 101095 +rect 16179 95083 20673 101085 +rect 17213 95073 20673 95083 +rect 147050 38788 152222 43036 +rect 201850 38788 207022 43036 +rect 311450 38788 316622 43036 +rect 366250 38788 371422 43036 +rect 421050 38788 426222 43036 +rect 475850 38788 481022 43036 +rect 530650 38788 535822 43036 +rect 147801 15942 153429 21030 +rect 642960 9026 650432 16538 << error_s >> +rect 85588 1012253 88730 1012287 +rect 136988 1012253 140130 1012287 +rect 188388 1012253 191530 1012287 +rect 239788 1012253 242930 1012287 +rect 291388 1012253 294530 1012287 +rect 393188 1012253 396330 1012287 +rect 482188 1012253 485330 1012287 +rect 533588 1012253 536730 1012287 +rect 635388 1012253 638530 1012287 +rect 78124 1009804 78907 1009922 +rect 129524 1009804 130307 1009922 +rect 180924 1009804 181707 1009922 +rect 232324 1009804 233107 1009922 +rect 283924 1009804 284707 1009922 +rect 385724 1009804 386507 1009922 +rect 474724 1009804 475507 1009922 +rect 526124 1009804 526907 1009922 +rect 627924 1009804 628707 1009922 +rect 25481 963588 25515 966898 +rect 689804 964893 689922 965676 +rect 27846 956292 27964 956907 +rect 692253 955070 692287 958212 +rect 41633 916901 41897 916960 +rect 41633 916900 41837 916901 +rect 41633 916899 41693 916900 +rect 41633 916840 41837 916899 +rect 689804 875693 689922 876476 +rect 692253 865870 692287 869012 +rect 25481 793788 25515 797098 +rect 27846 786492 27964 787107 +rect 689804 786493 689922 787276 +rect 692253 776670 692287 779812 +rect 25481 750588 25515 753898 +rect 27846 743292 27964 743907 +rect 689804 741493 689922 742276 +rect 692253 731670 692287 734812 +rect 25481 707388 25515 710698 +rect 27846 700092 27964 700707 +rect 689804 696493 689922 697276 +rect 692253 686670 692287 689812 +rect 25481 664188 25515 667498 +rect 27846 656892 27964 657507 +rect 689804 651293 689922 652076 +rect 692253 641470 692287 644612 +rect 25481 620988 25515 624298 +rect 27846 613692 27964 614307 +rect 689804 606293 689922 607076 +rect 692253 596470 692287 599612 +rect 25481 577788 25515 581098 +rect 27846 570492 27964 571107 +rect 689804 561093 689922 561876 +rect 692253 551270 692287 554412 +rect 25481 534588 25515 537898 +rect 27846 527292 27964 527907 +rect 25481 406988 25515 410298 +rect 27846 399692 27964 400307 +rect 689804 383893 689922 384676 +rect 692253 374070 692287 377212 +rect 25481 363788 25515 367098 +rect 27846 356492 27964 357107 +rect 689804 338693 689922 339476 +rect 692253 328870 692287 332012 +rect 25481 320588 25515 323898 +rect 27846 313292 27964 313907 +rect 689804 293693 689922 294476 +rect 692253 283870 692287 287012 +rect 25481 277388 25515 280698 +rect 27846 270092 27964 270707 +rect 689804 248693 689922 249476 +rect 692253 238870 692287 242012 +rect 25481 234188 25515 237498 +rect 27846 226892 27964 227507 +rect 689804 203493 689922 204276 +rect 25481 190988 25515 194298 +rect 692253 193670 692287 196812 +rect 27846 183692 27964 184307 +rect 689804 158493 689922 159276 +rect 692253 148670 692287 151812 +rect 689804 113293 689922 114076 +rect 692253 103470 692287 106612 +rect 246049 39564 246050 39673 +rect 246129 39484 246130 39593 +rect 199693 27846 200308 27964 +rect 308293 27846 308908 27964 +rect 363093 27846 363708 27964 +rect 417893 27846 418508 27964 +rect 472693 27846 473308 27964 +rect 527493 27846 528108 27964 +rect 189702 25481 193012 25515 +rect 298302 25481 301612 25515 +rect 353102 25481 356412 25515 +rect 407902 25481 411212 25515 +rect 462702 25481 466012 25515 +rect 517502 25481 520812 25515 rect 149223 18082 150855 18116 << metal1 >> rect 41866 995682 675734 995734 rect 41866 95347 41918 995682 -rect 41525 95291 41536 95347 -rect 41835 95291 41918 95347 +rect 41405 95291 41416 95347 +rect 41715 95291 41918 95347 rect 41866 41918 41918 95291 rect 675682 41918 675734 995682 rect 41866 41866 145063 41918 @@ -673,7 +461,7 @@ rect 646169 9350 646175 9362 rect 652878 9350 652884 9362 rect 652936 9350 652942 9402 << via1 >> -rect 41536 95291 41835 95347 +rect 41416 95291 41715 95347 rect 145063 41866 145115 41918 rect 145127 41866 145179 41918 rect 140996 40073 141048 40125 @@ -759,9 +547,9 @@ rect 84501 995407 84557 995887 rect 85053 995407 85109 995887 rect 85697 995407 85753 995887 rect 86341 995407 86397 995887 -rect 86893 995407 86949 995887 +rect 86814 995407 87028 995887 rect 87537 995407 87593 995887 -rect 88733 995407 88789 995887 +rect 88697 995407 88825 995887 rect 89377 995407 89433 995887 rect 91217 995407 91273 995887 rect 120834 995407 120895 996693 @@ -780,9 +568,9 @@ rect 135901 995407 135957 995887 rect 136453 995407 136509 995887 rect 137097 995407 137153 995887 rect 137741 995407 137797 995887 -rect 138293 995407 138349 995887 +rect 138214 995407 138428 995887 rect 138937 995407 138993 995887 -rect 140133 995407 140189 995887 +rect 140097 995407 140225 995887 rect 140777 995407 140833 995887 rect 142617 995407 142673 995887 rect 172034 995407 172095 996693 @@ -801,9 +589,9 @@ rect 187301 995407 187357 995887 rect 187853 995407 187909 995887 rect 188497 995407 188553 995887 rect 189141 995407 189197 995887 -rect 189693 995407 189749 995887 +rect 189614 995407 189828 995887 rect 190337 995407 190393 995887 -rect 191533 995407 191589 995887 +rect 191497 995407 191625 995887 rect 192177 995407 192233 995887 rect 194017 995407 194073 995887 rect 223234 995407 223295 996699 @@ -822,9 +610,9 @@ rect 238701 995407 238757 995887 rect 239253 995407 239309 995887 rect 239897 995407 239953 995887 rect 240541 995407 240597 995887 -rect 241093 995407 241149 995887 +rect 241014 995407 241228 995887 rect 241737 995407 241793 995887 -rect 242933 995407 242989 995887 +rect 242897 995407 243025 995887 rect 243577 995407 243633 995887 rect 245417 995407 245473 995887 rect 274434 995407 274495 996696 @@ -843,9 +631,9 @@ rect 290301 995407 290357 995887 rect 290853 995407 290909 995887 rect 291497 995407 291553 995887 rect 292141 995407 292197 995887 -rect 292693 995407 292749 995887 +rect 292614 995407 292828 995887 rect 293337 995407 293393 995887 -rect 294533 995407 294589 995887 +rect 294497 995407 294625 995887 rect 295177 995407 295233 995887 rect 297017 995407 297073 995887 rect 378834 995407 378895 996702 @@ -864,9 +652,9 @@ rect 392101 995407 392157 995887 rect 392653 995407 392709 995887 rect 393297 995407 393353 995887 rect 393941 995407 393997 995887 -rect 394493 995407 394549 995887 +rect 394414 995407 394628 995887 rect 395137 995407 395193 995887 -rect 396333 995407 396389 995887 +rect 396297 995407 396425 995887 rect 396977 995407 397033 995887 rect 398817 995407 398873 995887 rect 467834 995407 467895 996687 @@ -885,9 +673,9 @@ rect 481101 995407 481157 995887 rect 481653 995407 481709 995887 rect 482297 995407 482353 995887 rect 482941 995407 482997 995887 -rect 483493 995407 483549 995887 +rect 483414 995407 483628 995887 rect 484137 995407 484193 995887 -rect 485333 995407 485389 995887 +rect 485297 995407 485425 995887 rect 485977 995407 486033 995887 rect 487817 995407 487873 995887 rect 519034 995407 519095 996690 @@ -906,9 +694,9 @@ rect 532501 995407 532557 995887 rect 533053 995407 533109 995887 rect 533697 995407 533753 995887 rect 534341 995407 534397 995887 -rect 534893 995407 534949 995887 +rect 534814 995407 535028 995887 rect 535537 995407 535593 995887 -rect 536733 995407 536789 995887 +rect 536697 995407 536825 995887 rect 537377 995407 537433 995887 rect 539217 995407 539273 995887 rect 618434 995407 618495 996690 @@ -926,1367 +714,20 @@ rect 634301 995407 634357 995887 rect 634853 995407 634909 995887 rect 635497 995407 635553 995887 rect 636141 995407 636197 995887 -rect 636693 995407 636749 995887 +rect 636614 995407 636828 995887 rect 637337 995407 637393 995887 -rect 638533 995407 638589 995887 +rect 638497 995407 638625 995887 rect 639177 995407 639233 995887 rect 641017 995407 641073 995887 -rect 41863 969273 42193 969280 -rect 41713 969217 42193 969273 -rect 41863 969210 42193 969217 -rect 41863 967433 42193 967440 -rect 41713 967377 42193 967433 -rect 41863 967370 42193 967377 -rect 675407 967247 675887 967303 -rect 41863 966789 42193 966796 -rect 41713 966733 42193 966789 -rect 41863 966726 42193 966733 -rect 675407 966751 675737 966758 -rect 675407 966695 675887 966751 -rect 675407 966688 675737 966695 -rect 675407 966107 675737 966114 -rect 675407 966051 675887 966107 -rect 675407 966044 675737 966051 -rect 41863 965593 42193 965600 -rect 41713 965537 42193 965593 -rect 41863 965530 42193 965537 -rect 675407 965463 675737 965470 -rect 675407 965407 675887 965463 -rect 675407 965400 675737 965407 -rect 41713 964893 42193 964949 -rect 41863 964397 42193 964404 -rect 41713 964341 42193 964397 -rect 41863 964334 42193 964341 -rect 41863 963753 42193 963760 -rect 41713 963697 42193 963753 -rect 41863 963690 42193 963697 -rect 675407 963623 675737 963630 -rect 675407 963567 675887 963623 -rect 675407 963560 675737 963567 -rect 41863 963109 42193 963116 -rect 41713 963053 42193 963109 -rect 41863 963046 42193 963053 -rect 675407 963071 675737 963078 -rect 675407 963015 675887 963071 -rect 675407 963008 675737 963015 -rect 41863 962557 42193 962564 -rect 41713 962501 42193 962557 -rect 41863 962494 42193 962501 -rect 675407 962427 675737 962434 -rect 675407 962371 675887 962427 -rect 675407 962364 675737 962371 -rect 675407 961783 675737 961790 -rect 675407 961727 675887 961783 -rect 675407 961720 675737 961727 -rect 41863 960073 42193 960080 -rect 41713 960017 42193 960073 -rect 41863 960010 42193 960017 -rect 41863 959429 42193 959436 -rect 41713 959373 42193 959429 -rect 41863 959366 42193 959373 -rect 675407 959299 675737 959306 -rect 675407 959243 675887 959299 -rect 675407 959236 675737 959243 -rect 41863 958785 42193 958792 -rect 41713 958729 42193 958785 -rect 41863 958722 42193 958729 -rect 675407 958747 675737 958754 -rect 675407 958691 675887 958747 -rect 675407 958684 675737 958691 -rect 41863 958233 42193 958240 -rect 41713 958177 42193 958233 -rect 41863 958170 42193 958177 -rect 675407 958103 675737 958110 -rect 675407 958047 675887 958103 -rect 675407 958040 675737 958047 -rect 675407 957459 675737 957466 -rect 675407 957403 675887 957459 -rect 675407 957396 675737 957403 -rect 675407 956851 675887 956907 -rect 41863 956393 42193 956400 -rect 41713 956337 42193 956393 -rect 41863 956330 42193 956337 -rect 675407 956263 675737 956270 -rect 675407 956207 675887 956263 -rect 675407 956200 675737 956207 -rect 41863 955749 42193 955756 -rect 41713 955693 42193 955749 -rect 41863 955686 42193 955693 -rect 41863 955105 42193 955112 -rect 41713 955049 42193 955105 -rect 41863 955042 42193 955049 -rect 675407 955067 675737 955074 -rect 675407 955011 675887 955067 -rect 675407 955004 675737 955011 -rect 41713 954497 42193 954553 -rect 675407 954423 675737 954430 -rect 675407 954367 675887 954423 -rect 675407 954360 675737 954367 -rect 675407 952583 675737 952590 -rect 675407 952527 675887 952583 -rect 675407 952520 675737 952527 -rect 675407 878047 675887 878103 -rect 675407 877551 675737 877558 -rect 675407 877495 675887 877551 -rect 675407 877488 675737 877495 -rect 675407 876907 675737 876914 -rect 675407 876851 675887 876907 -rect 675407 876844 675737 876851 -rect 675407 876263 675737 876270 -rect 675407 876207 675887 876263 -rect 675407 876200 675737 876207 -rect 675407 874423 675737 874430 -rect 675407 874367 675887 874423 -rect 675407 874360 675737 874367 -rect 675407 873871 675737 873878 -rect 675407 873815 675887 873871 -rect 675407 873808 675737 873815 -rect 675407 873227 675737 873234 -rect 675407 873171 675887 873227 -rect 675407 873164 675737 873171 -rect 675407 872583 675737 872590 -rect 675407 872527 675887 872583 -rect 675407 872520 675737 872527 -rect 675407 870099 675737 870106 -rect 675407 870043 675887 870099 -rect 675407 870036 675737 870043 -rect 675407 869547 675737 869554 -rect 675407 869491 675887 869547 -rect 675407 869484 675737 869491 -rect 675407 868903 675737 868910 -rect 675407 868847 675887 868903 -rect 675407 868840 675737 868847 -rect 675407 868259 675737 868266 -rect 675407 868203 675887 868259 -rect 675407 868196 675737 868203 -rect 675407 867651 675887 867707 -rect 675407 867063 675737 867070 -rect 675407 867007 675887 867063 -rect 675407 867000 675737 867007 -rect 675407 865867 675737 865874 -rect 675407 865811 675887 865867 -rect 675407 865804 675737 865811 -rect 675407 865223 675737 865230 -rect 675407 865167 675887 865223 -rect 675407 865160 675737 865167 -rect 675407 863383 675737 863390 -rect 675407 863327 675887 863383 -rect 675407 863320 675737 863327 -rect 41863 799473 42193 799480 -rect 41713 799417 42193 799473 -rect 41863 799410 42193 799417 -rect 41863 797633 42193 797640 -rect 41713 797577 42193 797633 -rect 41863 797570 42193 797577 -rect 41863 796989 42193 796996 -rect 41713 796933 42193 796989 -rect 41863 796926 42193 796933 -rect 41863 795793 42193 795800 -rect 41713 795737 42193 795793 -rect 41863 795730 42193 795737 -rect 41713 795093 42193 795149 -rect 41863 794597 42193 794604 -rect 41713 794541 42193 794597 -rect 41863 794534 42193 794541 -rect 41863 793953 42193 793960 -rect 41713 793897 42193 793953 -rect 41863 793890 42193 793897 -rect 41863 793309 42193 793316 -rect 41713 793253 42193 793309 -rect 41863 793246 42193 793253 -rect 41863 792757 42193 792764 -rect 41713 792701 42193 792757 -rect 41863 792694 42193 792701 -rect 41863 790273 42193 790280 -rect 41713 790217 42193 790273 -rect 41863 790210 42193 790217 -rect 41863 789629 42193 789636 -rect 41713 789573 42193 789629 -rect 41863 789566 42193 789573 -rect 41863 788985 42193 788992 -rect 41713 788929 42193 788985 -rect 41863 788922 42193 788929 -rect 675407 788847 675887 788903 -rect 41863 788433 42193 788440 -rect 41713 788377 42193 788433 -rect 41863 788370 42193 788377 -rect 675407 788351 675737 788358 -rect 675407 788295 675887 788351 -rect 675407 788288 675737 788295 -rect 675407 787707 675737 787714 -rect 675407 787651 675887 787707 -rect 675407 787644 675737 787651 -rect 675407 787063 675737 787070 -rect 675407 787007 675887 787063 -rect 675407 787000 675737 787007 -rect 41863 786593 42193 786600 -rect 41713 786537 42193 786593 -rect 41863 786530 42193 786537 -rect 41863 785949 42193 785956 -rect 41713 785893 42193 785949 -rect 41863 785886 42193 785893 -rect 41863 785305 42193 785312 -rect 41713 785249 42193 785305 -rect 41863 785242 42193 785249 -rect 675407 785223 675737 785230 -rect 675407 785167 675887 785223 -rect 675407 785160 675737 785167 -rect 41713 784697 42193 784753 -rect 675407 784671 675737 784678 -rect 675407 784615 675887 784671 -rect 675407 784608 675737 784615 -rect 675407 784027 675737 784034 -rect 675407 783971 675887 784027 -rect 675407 783964 675737 783971 -rect 675407 783383 675737 783390 -rect 675407 783327 675887 783383 -rect 675407 783320 675737 783327 -rect 675407 780899 675737 780906 -rect 675407 780843 675887 780899 -rect 675407 780836 675737 780843 -rect 675407 780347 675737 780354 -rect 675407 780291 675887 780347 -rect 675407 780284 675737 780291 -rect 675407 779703 675737 779710 -rect 675407 779647 675887 779703 -rect 675407 779640 675737 779647 -rect 675407 779059 675737 779066 -rect 675407 779003 675887 779059 -rect 675407 778996 675737 779003 -rect 675407 778451 675887 778507 -rect 675407 777863 675737 777870 -rect 675407 777807 675887 777863 -rect 675407 777800 675737 777807 -rect 675407 776667 675737 776674 -rect 675407 776611 675887 776667 -rect 675407 776604 675737 776611 -rect 675407 776023 675737 776030 -rect 675407 775967 675887 776023 -rect 675407 775960 675737 775967 -rect 675407 774183 675737 774190 -rect 675407 774127 675887 774183 -rect 675407 774120 675737 774127 -rect 41863 756273 42193 756280 -rect 41713 756217 42193 756273 -rect 41863 756210 42193 756217 -rect 41863 754433 42193 754440 -rect 41713 754377 42193 754433 -rect 41863 754370 42193 754377 -rect 41863 753789 42193 753796 -rect 41713 753733 42193 753789 -rect 41863 753726 42193 753733 -rect 41863 752593 42193 752600 -rect 41713 752537 42193 752593 -rect 41863 752530 42193 752537 -rect 41713 751893 42193 751949 -rect 41863 751397 42193 751404 -rect 41713 751341 42193 751397 -rect 41863 751334 42193 751341 -rect 41863 750753 42193 750760 -rect 41713 750697 42193 750753 -rect 41863 750690 42193 750697 -rect 41863 750109 42193 750116 -rect 41713 750053 42193 750109 -rect 41863 750046 42193 750053 -rect 41863 749557 42193 749564 -rect 41713 749501 42193 749557 -rect 41863 749494 42193 749501 -rect 41863 747073 42193 747080 -rect 41713 747017 42193 747073 -rect 41863 747010 42193 747017 -rect 41863 746429 42193 746436 -rect 41713 746373 42193 746429 -rect 41863 746366 42193 746373 -rect 41863 745785 42193 745792 -rect 41713 745729 42193 745785 -rect 41863 745722 42193 745729 -rect 41863 745233 42193 745240 -rect 41713 745177 42193 745233 -rect 41863 745170 42193 745177 -rect 675407 743847 675887 743903 -rect 41863 743393 42193 743400 -rect 41713 743337 42193 743393 -rect 41863 743330 42193 743337 -rect 675407 743351 675737 743358 -rect 675407 743295 675887 743351 -rect 675407 743288 675737 743295 -rect 41863 742749 42193 742756 -rect 41713 742693 42193 742749 -rect 41863 742686 42193 742693 -rect 675407 742707 675737 742714 -rect 675407 742651 675887 742707 -rect 675407 742644 675737 742651 -rect 41863 742105 42193 742112 -rect 41713 742049 42193 742105 -rect 41863 742042 42193 742049 -rect 675407 742063 675737 742070 -rect 675407 742007 675887 742063 -rect 675407 742000 675737 742007 -rect 41713 741497 42193 741553 -rect 675407 740223 675737 740230 -rect 675407 740167 675887 740223 -rect 675407 740160 675737 740167 -rect 675407 739671 675737 739678 -rect 675407 739615 675887 739671 -rect 675407 739608 675737 739615 -rect 675407 739027 675737 739034 -rect 675407 738971 675887 739027 -rect 675407 738964 675737 738971 -rect 675407 738383 675737 738390 -rect 675407 738327 675887 738383 -rect 675407 738320 675737 738327 -rect 675407 735899 675737 735906 -rect 675407 735843 675887 735899 -rect 675407 735836 675737 735843 -rect 675407 735347 675737 735354 -rect 675407 735291 675887 735347 -rect 675407 735284 675737 735291 -rect 675407 734703 675737 734710 -rect 675407 734647 675887 734703 -rect 675407 734640 675737 734647 -rect 675407 734059 675737 734066 -rect 675407 734003 675887 734059 -rect 675407 733996 675737 734003 -rect 675407 733451 675887 733507 -rect 675407 732863 675737 732870 -rect 675407 732807 675887 732863 -rect 675407 732800 675737 732807 -rect 675407 731667 675737 731674 -rect 675407 731611 675887 731667 -rect 675407 731604 675737 731611 -rect 675407 731023 675737 731030 -rect 675407 730967 675887 731023 -rect 675407 730960 675737 730967 -rect 675407 729183 675737 729190 -rect 675407 729127 675887 729183 -rect 675407 729120 675737 729127 -rect 41863 713073 42193 713080 -rect 41713 713017 42193 713073 -rect 41863 713010 42193 713017 -rect 41863 711233 42193 711240 -rect 41713 711177 42193 711233 -rect 41863 711170 42193 711177 -rect 41863 710589 42193 710596 -rect 41713 710533 42193 710589 -rect 41863 710526 42193 710533 -rect 41863 709393 42193 709400 -rect 41713 709337 42193 709393 -rect 41863 709330 42193 709337 -rect 41713 708693 42193 708749 -rect 41863 708197 42193 708204 -rect 41713 708141 42193 708197 -rect 41863 708134 42193 708141 -rect 41863 707553 42193 707560 -rect 41713 707497 42193 707553 -rect 41863 707490 42193 707497 -rect 41863 706909 42193 706916 -rect 41713 706853 42193 706909 -rect 41863 706846 42193 706853 -rect 41863 706357 42193 706364 -rect 41713 706301 42193 706357 -rect 41863 706294 42193 706301 -rect 41863 703873 42193 703880 -rect 41713 703817 42193 703873 -rect 41863 703810 42193 703817 -rect 41863 703229 42193 703236 -rect 41713 703173 42193 703229 -rect 41863 703166 42193 703173 -rect 41863 702585 42193 702592 -rect 41713 702529 42193 702585 -rect 41863 702522 42193 702529 -rect 41863 702033 42193 702040 -rect 41713 701977 42193 702033 -rect 41863 701970 42193 701977 -rect 41863 700193 42193 700200 -rect 41713 700137 42193 700193 -rect 41863 700130 42193 700137 -rect 41863 699549 42193 699556 -rect 41713 699493 42193 699549 -rect 41863 699486 42193 699493 -rect 41863 698905 42193 698912 -rect 41713 698849 42193 698905 -rect 41863 698842 42193 698849 -rect 675407 698847 675887 698903 -rect 41713 698297 42193 698353 -rect 675407 698351 675737 698358 -rect 675407 698295 675887 698351 -rect 675407 698288 675737 698295 -rect 675407 697707 675737 697714 -rect 675407 697651 675887 697707 -rect 675407 697644 675737 697651 -rect 675407 697063 675737 697070 -rect 675407 697007 675887 697063 -rect 675407 697000 675737 697007 -rect 675407 695223 675737 695230 -rect 675407 695167 675887 695223 -rect 675407 695160 675737 695167 -rect 675407 694671 675737 694678 -rect 675407 694615 675887 694671 -rect 675407 694608 675737 694615 -rect 675407 694027 675737 694034 -rect 675407 693971 675887 694027 -rect 675407 693964 675737 693971 -rect 675407 693383 675737 693390 -rect 675407 693327 675887 693383 -rect 675407 693320 675737 693327 -rect 675407 690899 675737 690906 -rect 675407 690843 675887 690899 -rect 675407 690836 675737 690843 -rect 675407 690347 675737 690354 -rect 675407 690291 675887 690347 -rect 675407 690284 675737 690291 -rect 675407 689703 675737 689710 -rect 675407 689647 675887 689703 -rect 675407 689640 675737 689647 -rect 675407 689059 675737 689066 -rect 675407 689003 675887 689059 -rect 675407 688996 675737 689003 -rect 675407 688451 675887 688507 -rect 675407 687863 675737 687870 -rect 675407 687807 675887 687863 -rect 675407 687800 675737 687807 -rect 675407 686667 675737 686674 -rect 675407 686611 675887 686667 -rect 675407 686604 675737 686611 -rect 675407 686023 675737 686030 -rect 675407 685967 675887 686023 -rect 675407 685960 675737 685967 -rect 675407 684183 675737 684190 -rect 675407 684127 675887 684183 -rect 675407 684120 675737 684127 -rect 41863 669873 42193 669880 -rect 41713 669817 42193 669873 -rect 41863 669810 42193 669817 -rect 41863 668033 42193 668040 -rect 41713 667977 42193 668033 -rect 41863 667970 42193 667977 -rect 41863 667389 42193 667396 -rect 41713 667333 42193 667389 -rect 41863 667326 42193 667333 -rect 41863 666193 42193 666200 -rect 41713 666137 42193 666193 -rect 41863 666130 42193 666137 -rect 41713 665493 42193 665549 -rect 41863 664997 42193 665004 -rect 41713 664941 42193 664997 -rect 41863 664934 42193 664941 -rect 41863 664353 42193 664360 -rect 41713 664297 42193 664353 -rect 41863 664290 42193 664297 -rect 41863 663709 42193 663716 -rect 41713 663653 42193 663709 -rect 41863 663646 42193 663653 -rect 41863 663157 42193 663164 -rect 41713 663101 42193 663157 -rect 41863 663094 42193 663101 -rect 41863 660673 42193 660680 -rect 41713 660617 42193 660673 -rect 41863 660610 42193 660617 -rect 41863 660029 42193 660036 -rect 41713 659973 42193 660029 -rect 41863 659966 42193 659973 -rect 41863 659385 42193 659392 -rect 41713 659329 42193 659385 -rect 41863 659322 42193 659329 -rect 41863 658833 42193 658840 -rect 41713 658777 42193 658833 -rect 41863 658770 42193 658777 -rect 41863 656993 42193 657000 -rect 41713 656937 42193 656993 -rect 41863 656930 42193 656937 -rect 41863 656349 42193 656356 -rect 41713 656293 42193 656349 -rect 41863 656286 42193 656293 -rect 41863 655705 42193 655712 -rect 41713 655649 42193 655705 -rect 41863 655642 42193 655649 -rect 41713 655097 42193 655153 -rect 675407 653647 675887 653703 -rect 675407 653151 675737 653158 -rect 675407 653095 675887 653151 -rect 675407 653088 675737 653095 -rect 675407 652507 675737 652514 -rect 675407 652451 675887 652507 -rect 675407 652444 675737 652451 -rect 675407 651863 675737 651870 -rect 675407 651807 675887 651863 -rect 675407 651800 675737 651807 -rect 675407 650023 675737 650030 -rect 675407 649967 675887 650023 -rect 675407 649960 675737 649967 -rect 675407 649471 675737 649478 -rect 675407 649415 675887 649471 -rect 675407 649408 675737 649415 -rect 675407 648827 675737 648834 -rect 675407 648771 675887 648827 -rect 675407 648764 675737 648771 -rect 675407 648183 675737 648190 -rect 675407 648127 675887 648183 -rect 675407 648120 675737 648127 -rect 675407 645699 675737 645706 -rect 675407 645643 675887 645699 -rect 675407 645636 675737 645643 -rect 675407 645147 675737 645154 -rect 675407 645091 675887 645147 -rect 675407 645084 675737 645091 -rect 675407 644503 675737 644510 -rect 675407 644447 675887 644503 -rect 675407 644440 675737 644447 -rect 675407 643859 675737 643866 -rect 675407 643803 675887 643859 -rect 675407 643796 675737 643803 -rect 675407 643251 675887 643307 -rect 675407 642663 675737 642670 -rect 675407 642607 675887 642663 -rect 675407 642600 675737 642607 -rect 675407 641467 675737 641474 -rect 675407 641411 675887 641467 -rect 675407 641404 675737 641411 -rect 675407 640823 675737 640830 -rect 675407 640767 675887 640823 -rect 675407 640760 675737 640767 -rect 675407 638983 675737 638990 -rect 675407 638927 675887 638983 -rect 675407 638920 675737 638927 -rect 41863 626673 42193 626680 -rect 41713 626617 42193 626673 -rect 41863 626610 42193 626617 -rect 41863 624833 42193 624840 -rect 41713 624777 42193 624833 -rect 41863 624770 42193 624777 -rect 41863 624189 42193 624196 -rect 41713 624133 42193 624189 -rect 41863 624126 42193 624133 -rect 41863 622993 42193 623000 -rect 41713 622937 42193 622993 -rect 41863 622930 42193 622937 -rect 41713 622293 42193 622349 -rect 41863 621797 42193 621804 -rect 41713 621741 42193 621797 -rect 41863 621734 42193 621741 -rect 41863 621153 42193 621160 -rect 41713 621097 42193 621153 -rect 41863 621090 42193 621097 -rect 41863 620509 42193 620516 -rect 41713 620453 42193 620509 -rect 41863 620446 42193 620453 -rect 41863 619957 42193 619964 -rect 41713 619901 42193 619957 -rect 41863 619894 42193 619901 -rect 41863 617473 42193 617480 -rect 41713 617417 42193 617473 -rect 41863 617410 42193 617417 -rect 41863 616829 42193 616836 -rect 41713 616773 42193 616829 -rect 41863 616766 42193 616773 -rect 41863 616185 42193 616192 -rect 41713 616129 42193 616185 -rect 41863 616122 42193 616129 -rect 41863 615633 42193 615640 -rect 41713 615577 42193 615633 -rect 41863 615570 42193 615577 -rect 41863 613793 42193 613800 -rect 41713 613737 42193 613793 -rect 41863 613730 42193 613737 -rect 41863 613149 42193 613156 -rect 41713 613093 42193 613149 -rect 41863 613086 42193 613093 -rect 41863 612505 42193 612512 -rect 41713 612449 42193 612505 -rect 41863 612442 42193 612449 -rect 41713 611897 42193 611953 -rect 675407 608647 675887 608703 -rect 675407 608151 675737 608158 -rect 675407 608095 675887 608151 -rect 675407 608088 675737 608095 -rect 675407 607507 675737 607514 -rect 675407 607451 675887 607507 -rect 675407 607444 675737 607451 -rect 675407 606863 675737 606870 -rect 675407 606807 675887 606863 -rect 675407 606800 675737 606807 -rect 675407 605023 675737 605030 -rect 675407 604967 675887 605023 -rect 675407 604960 675737 604967 -rect 675407 604471 675737 604478 -rect 675407 604415 675887 604471 -rect 675407 604408 675737 604415 -rect 675407 603827 675737 603834 -rect 675407 603771 675887 603827 -rect 675407 603764 675737 603771 -rect 675407 603183 675737 603190 -rect 675407 603127 675887 603183 -rect 675407 603120 675737 603127 -rect 675407 600699 675737 600706 -rect 675407 600643 675887 600699 -rect 675407 600636 675737 600643 -rect 675407 600147 675737 600154 -rect 675407 600091 675887 600147 -rect 675407 600084 675737 600091 -rect 675407 599503 675737 599510 -rect 675407 599447 675887 599503 -rect 675407 599440 675737 599447 -rect 675407 598859 675737 598866 -rect 675407 598803 675887 598859 -rect 675407 598796 675737 598803 -rect 675407 597663 675737 597670 -rect 675407 597607 675887 597663 -rect 675407 597600 675737 597607 -rect 675407 596467 675737 596474 -rect 675407 596411 675887 596467 -rect 675407 596404 675737 596411 -rect 675407 595823 675737 595830 -rect 675407 595767 675887 595823 -rect 675407 595760 675737 595767 -rect 675407 593983 675737 593990 -rect 675407 593927 675887 593983 -rect 675407 593920 675737 593927 -rect 41863 583473 42193 583480 -rect 41713 583417 42193 583473 -rect 41863 583410 42193 583417 -rect 41863 581633 42193 581640 -rect 41713 581577 42193 581633 -rect 41863 581570 42193 581577 -rect 41863 580989 42193 580996 -rect 41713 580933 42193 580989 -rect 41863 580926 42193 580933 -rect 41863 579793 42193 579800 -rect 41713 579737 42193 579793 -rect 41863 579730 42193 579737 -rect 41713 579093 42193 579149 -rect 41863 578597 42193 578604 -rect 41713 578541 42193 578597 -rect 41863 578534 42193 578541 -rect 41863 577953 42193 577960 -rect 41713 577897 42193 577953 -rect 41863 577890 42193 577897 -rect 41863 577309 42193 577316 -rect 41713 577253 42193 577309 -rect 41863 577246 42193 577253 -rect 41863 576757 42193 576764 -rect 41713 576701 42193 576757 -rect 41863 576694 42193 576701 -rect 41863 574273 42193 574280 -rect 41713 574217 42193 574273 -rect 41863 574210 42193 574217 -rect 41863 573629 42193 573636 -rect 41713 573573 42193 573629 -rect 41863 573566 42193 573573 -rect 41863 572985 42193 572992 -rect 41713 572929 42193 572985 -rect 41863 572922 42193 572929 -rect 41863 572433 42193 572440 -rect 41713 572377 42193 572433 -rect 41863 572370 42193 572377 -rect 41863 570593 42193 570600 -rect 41713 570537 42193 570593 -rect 41863 570530 42193 570537 -rect 41863 569949 42193 569956 -rect 41713 569893 42193 569949 -rect 41863 569886 42193 569893 -rect 41863 569305 42193 569312 -rect 41713 569249 42193 569305 -rect 41863 569242 42193 569249 -rect 41713 568697 42193 568753 -rect 675407 563447 675887 563503 -rect 675407 562951 675737 562958 -rect 675407 562895 675887 562951 -rect 675407 562888 675737 562895 -rect 675407 562307 675737 562314 -rect 675407 562251 675887 562307 -rect 675407 562244 675737 562251 -rect 675407 561663 675737 561670 -rect 675407 561607 675887 561663 -rect 675407 561600 675737 561607 -rect 675407 559823 675737 559830 -rect 675407 559767 675887 559823 -rect 675407 559760 675737 559767 -rect 675407 559271 675737 559278 -rect 675407 559215 675887 559271 -rect 675407 559208 675737 559215 -rect 675407 558627 675737 558634 -rect 675407 558571 675887 558627 -rect 675407 558564 675737 558571 -rect 675407 557983 675737 557990 -rect 675407 557927 675887 557983 -rect 675407 557920 675737 557927 -rect 675407 555499 675737 555506 -rect 675407 555443 675887 555499 -rect 675407 555436 675737 555443 -rect 675407 554947 675737 554954 -rect 675407 554891 675887 554947 -rect 675407 554884 675737 554891 -rect 675407 554303 675737 554310 -rect 675407 554247 675887 554303 -rect 675407 554240 675737 554247 -rect 675407 553659 675737 553666 -rect 675407 553603 675887 553659 -rect 675407 553596 675737 553603 -rect 675407 553051 675887 553107 -rect 675407 552463 675737 552470 -rect 675407 552407 675887 552463 -rect 675407 552400 675737 552407 -rect 675407 551267 675737 551274 -rect 675407 551211 675887 551267 -rect 675407 551204 675737 551211 -rect 675407 550623 675737 550630 -rect 675407 550567 675887 550623 -rect 675407 550560 675737 550567 -rect 675407 548783 675737 548790 -rect 675407 548727 675887 548783 -rect 675407 548720 675737 548727 -rect 41863 540273 42193 540280 -rect 41713 540217 42193 540273 -rect 41863 540210 42193 540217 -rect 41863 538433 42193 538440 -rect 41713 538377 42193 538433 -rect 41863 538370 42193 538377 -rect 41863 537789 42193 537796 -rect 41713 537733 42193 537789 -rect 41863 537726 42193 537733 -rect 41863 536593 42193 536600 -rect 41713 536537 42193 536593 -rect 41863 536530 42193 536537 -rect 41713 535893 42193 535949 -rect 41863 535397 42193 535404 -rect 41713 535341 42193 535397 -rect 41863 535334 42193 535341 -rect 41863 534753 42193 534760 -rect 41713 534697 42193 534753 -rect 41863 534690 42193 534697 -rect 41863 534109 42193 534116 -rect 41713 534053 42193 534109 -rect 41863 534046 42193 534053 -rect 41863 533557 42193 533564 -rect 41713 533501 42193 533557 -rect 41863 533494 42193 533501 -rect 41863 531073 42193 531080 -rect 41713 531017 42193 531073 -rect 41863 531010 42193 531017 -rect 41863 530429 42193 530436 -rect 41713 530373 42193 530429 -rect 41863 530366 42193 530373 -rect 41863 529785 42193 529792 -rect 41713 529729 42193 529785 -rect 41863 529722 42193 529729 -rect 41863 529233 42193 529240 -rect 41713 529177 42193 529233 -rect 41863 529170 42193 529177 -rect 41863 527393 42193 527400 -rect 41713 527337 42193 527393 -rect 41863 527330 42193 527337 -rect 41863 526749 42193 526756 -rect 41713 526693 42193 526749 -rect 41863 526686 42193 526693 -rect 41863 526105 42193 526112 -rect 41713 526049 42193 526105 -rect 41863 526042 42193 526049 -rect 41713 525497 42193 525553 -rect 41863 412673 42193 412680 -rect 41713 412617 42193 412673 -rect 41863 412610 42193 412617 -rect 41863 410833 42193 410840 -rect 41713 410777 42193 410833 -rect 41863 410770 42193 410777 -rect 41863 410189 42193 410196 -rect 41713 410133 42193 410189 -rect 41863 410126 42193 410133 -rect 41863 408993 42193 409000 -rect 41713 408937 42193 408993 -rect 41863 408930 42193 408937 -rect 41713 408293 42193 408349 -rect 41863 407797 42193 407804 -rect 41713 407741 42193 407797 -rect 41863 407734 42193 407741 -rect 41863 407153 42193 407160 -rect 41713 407097 42193 407153 -rect 41863 407090 42193 407097 -rect 41863 406509 42193 406516 -rect 41713 406453 42193 406509 -rect 41863 406446 42193 406453 -rect 41863 405957 42193 405964 -rect 41713 405901 42193 405957 -rect 41863 405894 42193 405901 -rect 41863 403473 42193 403480 -rect 41713 403417 42193 403473 -rect 41863 403410 42193 403417 -rect 41863 402829 42193 402836 -rect 41713 402773 42193 402829 -rect 41863 402766 42193 402773 -rect 41863 402185 42193 402192 -rect 41713 402129 42193 402185 -rect 41863 402122 42193 402129 -rect 41863 401633 42193 401640 -rect 41713 401577 42193 401633 -rect 41863 401570 42193 401577 -rect 41863 399793 42193 399800 -rect 41713 399737 42193 399793 -rect 41863 399730 42193 399737 -rect 41863 399149 42193 399156 -rect 41713 399093 42193 399149 -rect 41863 399086 42193 399093 -rect 41863 398505 42193 398512 -rect 41713 398449 42193 398505 -rect 41863 398442 42193 398449 -rect 41713 397897 42193 397953 -rect 675407 386247 675887 386303 -rect 675407 385751 675737 385758 -rect 675407 385695 675887 385751 -rect 675407 385688 675737 385695 -rect 675407 385107 675737 385114 -rect 675407 385051 675887 385107 -rect 675407 385044 675737 385051 -rect 675407 384463 675737 384470 -rect 675407 384407 675887 384463 -rect 675407 384400 675737 384407 -rect 675407 382623 675737 382630 -rect 675407 382567 675887 382623 -rect 675407 382560 675737 382567 -rect 675407 382071 675737 382078 -rect 675407 382015 675887 382071 -rect 675407 382008 675737 382015 -rect 675407 381427 675737 381434 -rect 675407 381371 675887 381427 -rect 675407 381364 675737 381371 -rect 675407 380783 675737 380790 -rect 675407 380727 675887 380783 -rect 675407 380720 675737 380727 -rect 675407 378299 675737 378306 -rect 675407 378243 675887 378299 -rect 675407 378236 675737 378243 -rect 675407 377747 675737 377754 -rect 675407 377691 675887 377747 -rect 675407 377684 675737 377691 -rect 675407 377103 675737 377110 -rect 675407 377047 675887 377103 -rect 675407 377040 675737 377047 -rect 675407 376459 675737 376466 -rect 675407 376403 675887 376459 -rect 675407 376396 675737 376403 -rect 675407 375851 675887 375907 -rect 675407 375263 675737 375270 -rect 675407 375207 675887 375263 -rect 675407 375200 675737 375207 -rect 675407 374011 675887 374067 -rect 675407 373423 675737 373430 -rect 675407 373367 675887 373423 -rect 675407 373360 675737 373367 -rect 675407 371583 675737 371590 -rect 675407 371527 675887 371583 -rect 675407 371520 675737 371527 -rect 41863 369473 42193 369480 -rect 41713 369417 42193 369473 -rect 41863 369410 42193 369417 -rect 41863 367633 42193 367640 -rect 41713 367577 42193 367633 -rect 41863 367570 42193 367577 -rect 41863 366989 42193 366996 -rect 41713 366933 42193 366989 -rect 41863 366926 42193 366933 -rect 41863 365793 42193 365800 -rect 41713 365737 42193 365793 -rect 41863 365730 42193 365737 -rect 41713 365093 42193 365149 -rect 41863 364597 42193 364604 -rect 41713 364541 42193 364597 -rect 41863 364534 42193 364541 -rect 41863 363953 42193 363960 -rect 41713 363897 42193 363953 -rect 41863 363890 42193 363897 -rect 41863 363309 42193 363316 -rect 41713 363253 42193 363309 -rect 41863 363246 42193 363253 -rect 41863 362757 42193 362764 -rect 41713 362701 42193 362757 -rect 41863 362694 42193 362701 -rect 41863 360273 42193 360280 -rect 41713 360217 42193 360273 -rect 41863 360210 42193 360217 -rect 41863 359629 42193 359636 -rect 41713 359573 42193 359629 -rect 41863 359566 42193 359573 -rect 41863 358985 42193 358992 -rect 41713 358929 42193 358985 -rect 41863 358922 42193 358929 -rect 41863 358433 42193 358440 -rect 41713 358377 42193 358433 -rect 41863 358370 42193 358377 -rect 41863 356593 42193 356600 -rect 41713 356537 42193 356593 -rect 41863 356530 42193 356537 -rect 41863 355949 42193 355956 -rect 41713 355893 42193 355949 -rect 41863 355886 42193 355893 -rect 41863 355305 42193 355312 -rect 41713 355249 42193 355305 -rect 41863 355242 42193 355249 -rect 41713 354697 42193 354753 -rect 675407 341047 675887 341103 -rect 675407 340551 675737 340558 -rect 675407 340495 675887 340551 -rect 675407 340488 675737 340495 -rect 675407 339907 675737 339914 -rect 675407 339851 675887 339907 -rect 675407 339844 675737 339851 -rect 675407 339263 675737 339270 -rect 675407 339207 675887 339263 -rect 675407 339200 675737 339207 -rect 675407 337423 675737 337430 -rect 675407 337367 675887 337423 -rect 675407 337360 675737 337367 -rect 675407 336871 675737 336878 -rect 675407 336815 675887 336871 -rect 675407 336808 675737 336815 -rect 675407 336227 675737 336234 -rect 675407 336171 675887 336227 -rect 675407 336164 675737 336171 -rect 675407 335583 675737 335590 -rect 675407 335527 675887 335583 -rect 675407 335520 675737 335527 -rect 675407 333099 675737 333106 -rect 675407 333043 675887 333099 -rect 675407 333036 675737 333043 -rect 675407 332547 675737 332554 -rect 675407 332491 675887 332547 -rect 675407 332484 675737 332491 -rect 675407 331903 675737 331910 -rect 675407 331847 675887 331903 -rect 675407 331840 675737 331847 -rect 675407 331259 675737 331266 -rect 675407 331203 675887 331259 -rect 675407 331196 675737 331203 -rect 675407 330651 675887 330707 -rect 675407 330063 675737 330070 -rect 675407 330007 675887 330063 -rect 675407 330000 675737 330007 -rect 675407 328811 675887 328867 -rect 675407 328223 675737 328230 -rect 675407 328167 675887 328223 -rect 675407 328160 675737 328167 -rect 675407 326383 675737 326390 -rect 675407 326327 675887 326383 -rect 675407 326320 675737 326327 -rect 41863 326273 42193 326280 -rect 41713 326217 42193 326273 -rect 41863 326210 42193 326217 -rect 41863 324433 42193 324440 -rect 41713 324377 42193 324433 -rect 41863 324370 42193 324377 -rect 41863 323789 42193 323796 -rect 41713 323733 42193 323789 -rect 41863 323726 42193 323733 -rect 41863 322593 42193 322600 -rect 41713 322537 42193 322593 -rect 41863 322530 42193 322537 -rect 41713 321893 42193 321949 -rect 41863 321397 42193 321404 -rect 41713 321341 42193 321397 -rect 41863 321334 42193 321341 -rect 41863 320753 42193 320760 -rect 41713 320697 42193 320753 -rect 41863 320690 42193 320697 -rect 41863 320109 42193 320116 -rect 41713 320053 42193 320109 -rect 41863 320046 42193 320053 -rect 41863 319557 42193 319564 -rect 41713 319501 42193 319557 -rect 41863 319494 42193 319501 -rect 41863 317073 42193 317080 -rect 41713 317017 42193 317073 -rect 41863 317010 42193 317017 -rect 41863 316429 42193 316436 -rect 41713 316373 42193 316429 -rect 41863 316366 42193 316373 -rect 41863 315785 42193 315792 -rect 41713 315729 42193 315785 -rect 41863 315722 42193 315729 -rect 41863 315233 42193 315240 -rect 41713 315177 42193 315233 -rect 41863 315170 42193 315177 -rect 41863 313393 42193 313400 -rect 41713 313337 42193 313393 -rect 41863 313330 42193 313337 -rect 41863 312749 42193 312756 -rect 41713 312693 42193 312749 -rect 41863 312686 42193 312693 -rect 41863 312105 42193 312112 -rect 41713 312049 42193 312105 -rect 41863 312042 42193 312049 -rect 41713 311497 42193 311553 -rect 675407 296047 675887 296103 -rect 675407 295551 675737 295558 -rect 675407 295495 675887 295551 -rect 675407 295488 675737 295495 -rect 675407 294907 675737 294914 -rect 675407 294851 675887 294907 -rect 675407 294844 675737 294851 -rect 675407 294263 675737 294270 -rect 675407 294207 675887 294263 -rect 675407 294200 675737 294207 -rect 675407 292423 675737 292430 -rect 675407 292367 675887 292423 -rect 675407 292360 675737 292367 -rect 675407 291871 675737 291878 -rect 675407 291815 675887 291871 -rect 675407 291808 675737 291815 -rect 675407 291227 675737 291234 -rect 675407 291171 675887 291227 -rect 675407 291164 675737 291171 -rect 675407 290583 675737 290590 -rect 675407 290527 675887 290583 -rect 675407 290520 675737 290527 -rect 675407 288099 675737 288106 -rect 675407 288043 675887 288099 -rect 675407 288036 675737 288043 -rect 675407 287547 675737 287554 -rect 675407 287491 675887 287547 -rect 675407 287484 675737 287491 -rect 675407 286903 675737 286910 -rect 675407 286847 675887 286903 -rect 675407 286840 675737 286847 -rect 675407 286259 675737 286266 -rect 675407 286203 675887 286259 -rect 675407 286196 675737 286203 -rect 675407 285651 675887 285707 -rect 675407 285063 675737 285070 -rect 675407 285007 675887 285063 -rect 675407 285000 675737 285007 -rect 675407 283811 675887 283867 -rect 675407 283223 675737 283230 -rect 675407 283167 675887 283223 -rect 675407 283160 675737 283167 -rect 41863 283073 42193 283080 -rect 41713 283017 42193 283073 -rect 41863 283010 42193 283017 -rect 675407 281383 675737 281390 -rect 675407 281327 675887 281383 -rect 675407 281320 675737 281327 -rect 41863 281233 42193 281240 -rect 41713 281177 42193 281233 -rect 41863 281170 42193 281177 -rect 41863 280589 42193 280596 -rect 41713 280533 42193 280589 -rect 41863 280526 42193 280533 -rect 41863 279393 42193 279400 -rect 41713 279337 42193 279393 -rect 41863 279330 42193 279337 -rect 41713 278693 42193 278749 -rect 41863 278197 42193 278204 -rect 41713 278141 42193 278197 -rect 41863 278134 42193 278141 -rect 41863 277553 42193 277560 -rect 41713 277497 42193 277553 -rect 41863 277490 42193 277497 -rect 41863 276909 42193 276916 -rect 41713 276853 42193 276909 -rect 41863 276846 42193 276853 -rect 41863 276357 42193 276364 -rect 41713 276301 42193 276357 -rect 41863 276294 42193 276301 -rect 41863 273873 42193 273880 -rect 41713 273817 42193 273873 -rect 41863 273810 42193 273817 -rect 41863 273229 42193 273236 -rect 41713 273173 42193 273229 -rect 41863 273166 42193 273173 -rect 41863 272585 42193 272592 -rect 41713 272529 42193 272585 -rect 41863 272522 42193 272529 -rect 41863 272033 42193 272040 -rect 41713 271977 42193 272033 -rect 41863 271970 42193 271977 -rect 41863 270193 42193 270200 -rect 41713 270137 42193 270193 -rect 41863 270130 42193 270137 -rect 41863 269549 42193 269556 -rect 41713 269493 42193 269549 -rect 41863 269486 42193 269493 -rect 41863 268905 42193 268912 -rect 41713 268849 42193 268905 -rect 41863 268842 42193 268849 -rect 41713 268297 42193 268353 -rect 675407 251047 675887 251103 -rect 675407 250551 675737 250558 -rect 675407 250495 675887 250551 -rect 675407 250488 675737 250495 -rect 675407 249907 675737 249914 -rect 675407 249851 675887 249907 -rect 675407 249844 675737 249851 -rect 675407 249263 675737 249270 -rect 675407 249207 675887 249263 -rect 675407 249200 675737 249207 -rect 675407 247423 675737 247430 -rect 675407 247367 675887 247423 -rect 675407 247360 675737 247367 -rect 675407 246871 675737 246878 -rect 675407 246815 675887 246871 -rect 675407 246808 675737 246815 -rect 675407 246227 675737 246234 -rect 675407 246171 675887 246227 -rect 675407 246164 675737 246171 -rect 675407 245583 675737 245590 -rect 675407 245527 675887 245583 -rect 675407 245520 675737 245527 -rect 675407 243099 675737 243106 -rect 675407 243043 675887 243099 -rect 675407 243036 675737 243043 -rect 675407 242547 675737 242554 -rect 675407 242491 675887 242547 -rect 675407 242484 675737 242491 -rect 675407 241903 675737 241910 -rect 675407 241847 675887 241903 -rect 675407 241840 675737 241847 -rect 675407 241259 675737 241266 -rect 675407 241203 675887 241259 -rect 675407 241196 675737 241203 -rect 675407 240651 675887 240707 -rect 675407 240063 675737 240070 -rect 675407 240007 675887 240063 -rect 675407 240000 675737 240007 -rect 41863 239873 42193 239880 -rect 41713 239817 42193 239873 -rect 41863 239810 42193 239817 -rect 675407 238811 675887 238867 -rect 675407 238223 675737 238230 -rect 675407 238167 675887 238223 -rect 675407 238160 675737 238167 -rect 41863 238033 42193 238040 -rect 41713 237977 42193 238033 -rect 41863 237970 42193 237977 -rect 41713 237333 42193 237389 -rect 675407 236383 675737 236390 -rect 675407 236327 675887 236383 -rect 675407 236320 675737 236327 -rect 41863 236193 42193 236200 -rect 41713 236137 42193 236193 -rect 41863 236130 42193 236137 -rect 41713 235493 42193 235549 -rect 41863 234997 42193 235004 -rect 41713 234941 42193 234997 -rect 41863 234934 42193 234941 -rect 41863 234353 42193 234360 -rect 41713 234297 42193 234353 -rect 41863 234290 42193 234297 -rect 41863 233709 42193 233716 -rect 41713 233653 42193 233709 -rect 41863 233646 42193 233653 -rect 41863 233157 42193 233164 -rect 41713 233101 42193 233157 -rect 41863 233094 42193 233101 -rect 41863 230673 42193 230680 -rect 41713 230617 42193 230673 -rect 41863 230610 42193 230617 -rect 41863 230029 42193 230036 -rect 41713 229973 42193 230029 -rect 41863 229966 42193 229973 -rect 41863 229385 42193 229392 -rect 41713 229329 42193 229385 -rect 41863 229322 42193 229329 -rect 41863 228833 42193 228840 -rect 41713 228777 42193 228833 -rect 41863 228770 42193 228777 -rect 41863 226993 42193 227000 -rect 41713 226937 42193 226993 -rect 41863 226930 42193 226937 -rect 41863 226349 42193 226356 -rect 41713 226293 42193 226349 -rect 41863 226286 42193 226293 -rect 41863 225705 42193 225712 -rect 41713 225649 42193 225705 -rect 41863 225642 42193 225649 -rect 41713 225097 42193 225153 -rect 675407 205847 675887 205903 -rect 675407 205351 675737 205358 -rect 675407 205295 675887 205351 -rect 675407 205288 675737 205295 -rect 675407 204707 675737 204714 -rect 675407 204651 675887 204707 -rect 675407 204644 675737 204651 -rect 675407 204063 675737 204070 -rect 675407 204007 675887 204063 -rect 675407 204000 675737 204007 -rect 675407 202223 675737 202230 -rect 675407 202167 675887 202223 -rect 675407 202160 675737 202167 -rect 675407 201671 675737 201678 -rect 675407 201615 675887 201671 -rect 675407 201608 675737 201615 -rect 675407 201027 675737 201034 -rect 675407 200971 675887 201027 -rect 675407 200964 675737 200971 -rect 675407 200383 675737 200390 -rect 675407 200327 675887 200383 -rect 675407 200320 675737 200327 -rect 675407 197899 675737 197906 -rect 675407 197843 675887 197899 -rect 675407 197836 675737 197843 -rect 675407 197347 675737 197354 -rect 675407 197291 675887 197347 -rect 675407 197284 675737 197291 -rect 675407 196703 675737 196710 -rect 41863 196673 42193 196680 -rect 41713 196617 42193 196673 -rect 675407 196647 675887 196703 -rect 675407 196640 675737 196647 -rect 41863 196610 42193 196617 -rect 675407 196059 675737 196066 -rect 675407 196003 675887 196059 -rect 675407 195996 675737 196003 -rect 675407 195451 675887 195507 -rect 675407 194863 675737 194870 -rect 41863 194833 42193 194840 -rect 41713 194777 42193 194833 -rect 675407 194807 675887 194863 -rect 675407 194800 675737 194807 -rect 41863 194770 42193 194777 -rect 41713 194133 42193 194189 -rect 675407 193611 675887 193667 -rect 675407 193023 675737 193030 -rect 41863 192993 42193 193000 -rect 41713 192937 42193 192993 -rect 675407 192967 675887 193023 -rect 675407 192960 675737 192967 -rect 41863 192930 42193 192937 -rect 41713 192293 42193 192349 -rect 41863 191797 42193 191804 -rect 41713 191741 42193 191797 -rect 41863 191734 42193 191741 -rect 675407 191183 675737 191190 -rect 41863 191153 42193 191160 -rect 41713 191097 42193 191153 -rect 675407 191127 675887 191183 -rect 675407 191120 675737 191127 -rect 41863 191090 42193 191097 -rect 41863 190509 42193 190516 -rect 41713 190453 42193 190509 -rect 41863 190446 42193 190453 -rect 41863 189957 42193 189964 -rect 41713 189901 42193 189957 -rect 41863 189894 42193 189901 -rect 41863 187473 42193 187480 -rect 41713 187417 42193 187473 -rect 41863 187410 42193 187417 -rect 41863 186829 42193 186836 -rect 41713 186773 42193 186829 -rect 41863 186766 42193 186773 -rect 41863 186185 42193 186192 -rect 41713 186129 42193 186185 -rect 41863 186122 42193 186129 -rect 41863 185633 42193 185640 -rect 41713 185577 42193 185633 -rect 41863 185570 42193 185577 -rect 41863 183793 42193 183800 -rect 41713 183737 42193 183793 -rect 41863 183730 42193 183737 -rect 41863 183149 42193 183156 -rect 41713 183093 42193 183149 -rect 41863 183086 42193 183093 -rect 41863 182505 42193 182512 -rect 41713 182449 42193 182505 -rect 41863 182442 42193 182449 -rect 41713 181897 42193 181953 -rect 675407 160847 675887 160903 -rect 675407 160351 675737 160358 -rect 675407 160295 675887 160351 -rect 675407 160288 675737 160295 -rect 675407 159707 675737 159714 -rect 675407 159651 675887 159707 -rect 675407 159644 675737 159651 -rect 675407 159063 675737 159070 -rect 675407 159007 675887 159063 -rect 675407 159000 675737 159007 -rect 675407 157223 675737 157230 -rect 675407 157167 675887 157223 -rect 675407 157160 675737 157167 -rect 675407 156671 675737 156678 -rect 675407 156615 675887 156671 -rect 675407 156608 675737 156615 -rect 675407 156027 675737 156034 -rect 675407 155971 675887 156027 -rect 675407 155964 675737 155971 -rect 675407 155383 675737 155390 -rect 675407 155327 675887 155383 -rect 675407 155320 675737 155327 -rect 675407 152899 675737 152906 -rect 675407 152843 675887 152899 -rect 675407 152836 675737 152843 -rect 675407 152347 675737 152354 -rect 675407 152291 675887 152347 -rect 675407 152284 675737 152291 -rect 675407 151703 675737 151710 -rect 675407 151647 675887 151703 -rect 675407 151640 675737 151647 -rect 675407 151059 675737 151066 -rect 675407 151003 675887 151059 -rect 675407 150996 675737 151003 -rect 675407 150451 675887 150507 -rect 675407 149863 675737 149870 -rect 675407 149807 675887 149863 -rect 675407 149800 675737 149807 -rect 675407 148611 675887 148667 -rect 675407 148023 675737 148030 -rect 675407 147967 675887 148023 -rect 675407 147960 675737 147967 -rect 675407 147379 675737 147386 -rect 675407 147323 675887 147379 -rect 675407 147316 675737 147323 -rect 675407 146183 675737 146190 -rect 675407 146127 675887 146183 -rect 675407 146120 675737 146127 -rect 675407 115647 675887 115703 -rect 675407 115151 675737 115158 -rect 675407 115095 675887 115151 -rect 675407 115088 675737 115095 -rect 675407 114507 675737 114514 -rect 675407 114451 675887 114507 -rect 675407 114444 675737 114451 -rect 675407 113863 675737 113870 -rect 675407 113807 675887 113863 -rect 675407 113800 675737 113807 -rect 675407 112023 675737 112030 -rect 675407 111967 675887 112023 -rect 675407 111960 675737 111967 -rect 675407 111471 675737 111478 -rect 675407 111415 675887 111471 -rect 675407 111408 675737 111415 -rect 675407 110827 675737 110834 -rect 675407 110771 675887 110827 -rect 675407 110764 675737 110771 -rect 675407 110183 675737 110190 -rect 675407 110127 675887 110183 -rect 675407 110120 675737 110127 -rect 675407 107699 675737 107706 -rect 675407 107643 675887 107699 -rect 675407 107636 675737 107643 -rect 675407 107147 675737 107154 -rect 675407 107091 675887 107147 -rect 675407 107084 675737 107091 -rect 675407 106503 675737 106510 -rect 675407 106447 675887 106503 -rect 675407 106440 675737 106447 -rect 675407 105859 675737 105866 -rect 675407 105803 675887 105859 -rect 675407 105796 675737 105803 -rect 675407 105251 675887 105307 -rect 675407 104663 675737 104670 -rect 675407 104607 675887 104663 -rect 675407 104600 675737 104607 -rect 675407 103411 675887 103467 -rect 675407 102823 675737 102830 -rect 675407 102767 675887 102823 -rect 675407 102760 675737 102767 -rect 675407 100983 675737 100990 -rect 675407 100927 675887 100983 -rect 675407 100920 675737 100927 rect 18917 95739 18934 95795 -rect 19194 95739 41478 95795 -rect 41829 95739 41845 95795 +rect 19194 95739 41358 95795 +rect 41709 95739 41725 95795 rect 18555 95515 18569 95571 -rect 18829 95515 41470 95571 -rect 41821 95515 41845 95571 +rect 18829 95515 41350 95571 +rect 41701 95515 41725 95571 rect 17829 95291 17843 95347 -rect 18112 95291 41467 95347 -rect 41835 95291 41845 95347 +rect 18112 95291 41347 95347 +rect 41715 95291 41725 95347 rect 141708 42047 141774 42193 rect 141710 40350 141771 42047 rect 145035 41918 145207 41924 @@ -2332,9 +773,9 @@ rect 149243 20108 149299 20438 rect 152301 17140 152357 42193 rect 187327 41713 187383 42193 rect 189167 41713 189223 42193 -rect 189811 41713 189867 42193 +rect 189775 41713 189903 42193 rect 191007 41713 191063 42193 -rect 191651 41713 191707 42193 +rect 191572 41713 191786 42193 rect 192203 41713 192259 42193 rect 192847 41713 192903 42193 rect 193491 41713 193547 42193 @@ -2352,9 +793,9 @@ rect 202713 40871 202773 40882 rect 205928 40881 205980 42193 rect 295927 41713 295983 42193 rect 297767 41713 297823 42193 -rect 298411 41713 298467 42193 +rect 298375 41713 298503 42193 rect 299607 41713 299663 42193 -rect 300251 41713 300307 42193 +rect 300172 41713 300386 42193 rect 300803 41713 300859 42193 rect 301447 41713 301503 42193 rect 302091 41713 302147 42193 @@ -2379,9 +820,9 @@ rect 311313 40871 311373 40882 rect 315497 40876 315549 42193 rect 350727 41713 350783 42193 rect 352567 41713 352623 42193 -rect 353211 41713 353267 42193 +rect 353175 41713 353303 42193 rect 354407 41713 354463 42193 -rect 355051 41713 355107 42193 +rect 354972 41713 355186 42193 rect 355603 41713 355659 42193 rect 356247 41713 356303 42193 rect 356891 41713 356947 42193 @@ -2405,9 +846,9 @@ rect 366113 40871 366173 40882 rect 370302 40881 370354 42171 rect 405527 41713 405583 42193 rect 407367 41713 407423 42193 -rect 408011 41713 408067 42193 +rect 407975 41713 408103 42193 rect 409207 41713 409263 42193 -rect 409851 41713 409907 42193 +rect 409772 41713 409986 42193 rect 410403 41713 410459 42193 rect 411047 41713 411103 42193 rect 411691 41713 411747 42193 @@ -2435,9 +876,9 @@ rect 420971 40815 420973 40871 rect 425115 40869 425167 42193 rect 460327 41713 460383 42193 rect 462167 41713 462223 42193 -rect 462811 41713 462867 42193 +rect 462775 41713 462903 42193 rect 464007 41713 464063 42193 -rect 464651 41713 464707 42193 +rect 464572 41713 464786 42193 rect 465203 41713 465259 42193 rect 465847 41713 465903 42193 rect 466491 41713 466547 42193 @@ -2454,9 +895,9 @@ rect 475717 40882 475769 42193 rect 479915 40883 479967 42193 rect 515127 41713 515183 42193 rect 516967 41713 517023 42193 -rect 517611 41713 517667 42193 +rect 517575 41713 517703 42193 rect 518807 41713 518863 42193 -rect 519451 41713 519507 42193 +rect 519372 41713 519586 42193 rect 520003 41713 520059 42193 rect 520647 41713 520703 42193 rect 521291 41713 521347 42193 @@ -2810,12 +1251,12 @@ rect 521035 996693 521096 996754 rect 618434 996690 618495 996751 rect 620435 996693 620496 996754 rect 18934 95739 19194 95795 -rect 41478 95739 41829 95795 +rect 41358 95739 41709 95795 rect 18569 95515 18829 95571 -rect 41470 95515 41821 95571 +rect 41350 95515 41701 95571 rect 17843 95291 18112 95347 -rect 41467 95291 41536 95347 -rect 41536 95291 41818 95347 +rect 41347 95291 41416 95347 +rect 41416 95291 41698 95347 rect 141710 40289 141771 40350 rect 143435 40073 143437 40090 rect 143437 40073 143489 40090 @@ -3070,47 +1511,47 @@ rect 677793 969760 680341 969764 rect 677626 969726 680341 969760 rect 677626 969463 686875 969540 rect 677626 969462 686108 969463 -rect 41713 969210 42193 969280 -rect 675407 969142 676797 969204 +rect 41713 969209 42193 969279 +rect 675407 969143 676797 969205 rect 677626 969158 677648 969462 rect 677792 969159 686108 969462 rect 686812 969159 686875 969463 rect 677792 969158 686875 969159 rect 677626 969090 686875 969158 -rect 41713 967370 42193 967440 -rect 675407 967240 675887 967310 -rect 41713 966726 42193 966796 -rect 675407 966688 675887 966758 -rect 675407 966044 675887 966114 -rect 41713 965530 42193 965600 -rect 675407 965400 675887 965470 -rect 41713 964886 42193 964956 -rect 41713 964334 42193 964404 -rect 41713 963690 42193 963760 -rect 675407 963560 675887 963630 -rect 41713 963046 42193 963116 -rect 675407 963008 675887 963078 -rect 41713 962494 42193 962564 -rect 675407 962364 675887 962434 -rect 675407 961720 675887 961790 -rect 41713 960010 42193 960080 -rect 41713 959366 42193 959436 -rect 675407 959236 675887 959306 -rect 41713 958722 42193 958792 -rect 675407 958684 675887 958754 -rect 41713 958170 42193 958240 -rect 675407 958040 675887 958110 -rect 675407 957396 675887 957466 -rect 675407 956844 675887 956914 -rect 41713 956330 42193 956400 -rect 675407 956200 675887 956270 -rect 41713 955686 42193 955756 -rect 41713 955042 42193 955112 -rect 675407 955004 675887 955074 -rect 41713 954490 42193 954560 -rect 675407 954360 675887 954430 +rect 41713 967369 42193 967439 +rect 675407 967241 675887 967311 +rect 41713 966697 42193 966825 +rect 675407 966689 675887 966759 +rect 675407 966045 675887 966115 +rect 41713 965529 42193 965599 +rect 675407 965401 675887 965471 +rect 41713 964814 42193 965028 +rect 41713 964333 42193 964403 +rect 41713 963689 42193 963759 +rect 675407 963561 675887 963631 +rect 41713 963045 42193 963115 +rect 675407 963009 675887 963079 +rect 41713 962493 42193 962563 +rect 675407 962365 675887 962435 +rect 675407 961721 675887 961791 +rect 41713 960009 42193 960079 +rect 41713 959365 42193 959435 +rect 675407 959237 675887 959307 +rect 41713 958721 42193 958791 +rect 675407 958685 675887 958755 +rect 41713 958169 42193 958239 +rect 675407 958041 675887 958111 +rect 675407 957397 675887 957467 +rect 675407 956772 675887 956986 +rect 41713 956329 42193 956399 +rect 675407 956201 675887 956271 +rect 41713 955685 42193 955755 +rect 41713 955041 42193 955111 +rect 675407 954975 675887 955103 +rect 41713 954489 42193 954559 +rect 675407 954361 675887 954431 rect 40832 949550 40892 952819 -rect 675407 952520 675887 952590 +rect 675407 952521 675887 952591 rect 30782 948827 39885 948896 rect 30782 948523 30845 948827 rect 31549 948808 39885 948827 @@ -3127,29 +1568,35 @@ rect 37316 947912 39704 947918 rect 39848 947912 39885 948216 rect 37316 947879 39885 947912 rect 40810 946781 42193 946841 +rect 41693 926940 42193 926941 rect 39880 926939 42193 926940 rect 39880 922151 41039 926939 rect 41837 922151 42193 926939 -rect 675407 922499 677778 922500 +rect 675907 922499 677778 922500 +rect 40717 921852 42193 921853 rect 39880 921851 42193 921852 rect 39880 917191 39919 921851 rect 40717 917191 42193 921851 rect 675407 917701 675787 922499 rect 676585 917701 677778 922499 rect 675407 917700 677778 917701 -rect 39880 917190 42193 917191 -rect 675407 917409 677778 917410 -rect 39880 916899 42193 916900 +rect 675407 917699 675907 917700 +rect 676907 917409 677778 917410 +rect 39880 917190 40717 917191 +rect 41693 916900 42193 916901 +rect 39880 916899 41693 916900 rect 39880 912101 41039 916899 -rect 41837 912101 42193 916899 +rect 41837 912101 42193 916900 rect 675407 912749 676907 917409 rect 677705 912749 677778 917409 rect 675407 912748 677778 912749 -rect 39880 912100 42193 912101 +rect 675407 912747 676907 912748 +rect 39880 912100 41693 912101 rect 675407 907661 675787 912449 rect 676585 907661 677778 912449 rect 675407 907660 677778 907661 -rect 39913 879878 42193 884658 +rect 675407 907659 675907 907660 +rect 39913 879879 42193 884659 rect 675407 881144 676767 881206 rect 677626 880068 680341 880107 rect 677626 880064 679567 880068 @@ -3160,44 +1607,44 @@ rect 677793 879760 680341 879764 rect 677626 879726 680341 879760 rect 677626 879463 686875 879540 rect 677626 879462 686108 879463 -rect 675407 879142 676797 879204 +rect 675407 879143 676797 879205 rect 677626 879158 677648 879462 rect 677792 879159 686108 879462 rect 686812 879159 686875 879463 rect 677792 879158 686875 879159 rect 677626 879090 686875 879158 -rect 675407 878040 675887 878110 -rect 675407 877488 675887 877558 -rect 675407 876844 675887 876914 -rect 675407 876200 675887 876270 +rect 675407 878041 675887 878111 +rect 675407 877489 675887 877559 +rect 675407 876845 675887 876915 +rect 675407 876201 675887 876271 rect 39913 869899 42193 874679 -rect 675407 874360 675887 874430 -rect 675407 873808 675887 873878 -rect 675407 873164 675887 873234 -rect 675407 872520 675887 872590 -rect 675407 870036 675887 870106 -rect 675407 869484 675887 869554 -rect 675407 868840 675887 868910 -rect 675407 868196 675887 868266 -rect 675407 867644 675887 867714 -rect 675407 867000 675887 867070 -rect 675407 865804 675887 865874 -rect 675407 865160 675887 865230 -rect 675407 863320 675887 863390 -rect 39920 837678 42193 842458 +rect 675407 874361 675887 874431 +rect 675407 873809 675887 873879 +rect 675407 873165 675887 873235 +rect 675407 872521 675887 872591 +rect 675407 870037 675887 870107 +rect 675407 869485 675887 869555 +rect 675407 868841 675887 868911 +rect 675407 868197 675887 868267 +rect 675407 867572 675887 867786 +rect 675407 867001 675887 867071 +rect 675407 865775 675887 865903 +rect 675407 865161 675887 865231 +rect 675407 863321 675887 863391 +rect 39920 837679 42193 842459 rect 39920 827699 42193 832479 rect 675407 828521 677782 833301 -rect 675407 818542 677782 823322 -rect 41713 799410 42193 799480 -rect 41713 797570 42193 797640 -rect 41713 796926 42193 796996 -rect 41713 795730 42193 795800 -rect 41713 795086 42193 795156 -rect 41713 794534 42193 794604 -rect 41713 793890 42193 793960 -rect 41713 793246 42193 793316 -rect 41713 792694 42193 792764 -rect 675407 792144 676767 792206 +rect 675407 818543 677782 823323 +rect 41713 799409 42193 799479 +rect 41713 797569 42193 797639 +rect 41713 796897 42193 797025 +rect 41713 795729 42193 795799 +rect 41713 795014 42193 795228 +rect 41713 794533 42193 794603 +rect 41713 793889 42193 793959 +rect 41713 793245 42193 793315 +rect 41713 792693 42193 792763 +rect 675407 792143 676767 792205 rect 677626 791068 680341 791107 rect 677626 791064 679567 791068 rect 677626 790760 677649 791064 @@ -3207,33 +1654,33 @@ rect 677793 790760 680341 790764 rect 677626 790726 680341 790760 rect 677626 790463 686875 790540 rect 677626 790462 686108 790463 -rect 41713 790210 42193 790280 -rect 675407 790142 676797 790204 +rect 41713 790209 42193 790279 +rect 675407 790143 676797 790205 rect 677626 790158 677648 790462 rect 677792 790159 686108 790462 rect 686812 790159 686875 790463 rect 677792 790158 686875 790159 rect 677626 790090 686875 790158 -rect 41713 789566 42193 789636 -rect 41713 788922 42193 788992 -rect 675407 788840 675887 788910 -rect 41713 788370 42193 788440 -rect 675407 788288 675887 788358 -rect 675407 787644 675887 787714 -rect 675407 787000 675887 787070 -rect 41713 786530 42193 786600 -rect 41713 785886 42193 785956 -rect 41713 785242 42193 785312 -rect 675407 785160 675887 785230 -rect 41713 784690 42193 784760 -rect 675407 784608 675887 784678 -rect 675407 783964 675887 784034 -rect 675407 783320 675887 783390 +rect 41713 789565 42193 789635 +rect 41713 788921 42193 788991 +rect 675407 788841 675887 788911 +rect 41713 788369 42193 788439 +rect 675407 788289 675887 788359 +rect 675407 787645 675887 787715 +rect 675407 787001 675887 787071 +rect 41713 786529 42193 786599 +rect 41713 785885 42193 785955 +rect 41713 785241 42193 785311 +rect 675407 785161 675887 785231 +rect 41713 784689 42193 784759 +rect 675407 784609 675887 784679 +rect 675407 783965 675887 784035 +rect 675407 783321 675887 783391 rect 40832 779539 40892 783008 -rect 675407 780836 675887 780906 -rect 675407 780284 675887 780354 -rect 675407 779640 675887 779710 -rect 675407 778996 675887 779066 +rect 675407 780837 675887 780907 +rect 675407 780285 675887 780355 +rect 675407 779641 675887 779711 +rect 675407 778997 675887 779067 rect 30782 778827 39885 778896 rect 30782 778523 30845 778827 rect 31549 778808 39885 778827 @@ -3242,7 +1689,7 @@ rect 30782 778504 39705 778523 rect 39849 778504 39885 778808 rect 40810 778781 42193 778841 rect 30782 778446 39885 778504 -rect 675407 778444 675887 778514 +rect 675407 778372 675887 778586 rect 37316 778222 39885 778260 rect 37316 777918 37386 778222 rect 38090 778216 39885 778222 @@ -3250,26 +1697,26 @@ rect 38090 777918 39704 778216 rect 37316 777912 39704 777918 rect 39848 777912 39885 778216 rect 37316 777879 39885 777912 -rect 675407 777800 675887 777870 +rect 675407 777801 675887 777871 rect 40810 776781 42193 776841 -rect 675407 776604 675887 776674 -rect 675407 775960 675887 776030 -rect 675407 774120 675887 774190 -rect 41713 756210 42193 756280 -rect 41713 754370 42193 754440 -rect 41713 753726 42193 753796 -rect 41713 752530 42193 752600 -rect 41713 751886 42193 751956 -rect 41713 751334 42193 751404 -rect 41713 750690 42193 750760 -rect 41713 750046 42193 750116 -rect 41713 749494 42193 749564 -rect 675407 747144 676767 747206 -rect 41713 747010 42193 747080 -rect 41713 746366 42193 746436 +rect 675407 776575 675887 776703 +rect 675407 775961 675887 776031 +rect 675407 774121 675887 774191 +rect 41713 756209 42193 756279 +rect 41713 754369 42193 754439 +rect 41713 753697 42193 753825 +rect 41713 752529 42193 752599 +rect 41713 751814 42193 752028 +rect 41713 751333 42193 751403 +rect 41713 750689 42193 750759 +rect 41713 750045 42193 750115 +rect 41713 749493 42193 749563 +rect 675407 747143 676767 747205 +rect 41713 747009 42193 747079 +rect 41713 746365 42193 746435 rect 677626 746068 680341 746107 rect 677626 746064 679567 746068 -rect 41713 745722 42193 745792 +rect 41713 745721 42193 745791 rect 677626 745760 677649 746064 rect 677793 745764 679567 746064 rect 680271 745764 680341 746068 @@ -3277,26 +1724,26 @@ rect 677793 745760 680341 745764 rect 677626 745726 680341 745760 rect 677626 745463 686875 745540 rect 677626 745462 686108 745463 -rect 41713 745170 42193 745240 -rect 675407 745142 676797 745204 +rect 41713 745169 42193 745239 +rect 675407 745143 676797 745205 rect 677626 745158 677648 745462 rect 677792 745159 686108 745462 rect 686812 745159 686875 745463 rect 677792 745158 686875 745159 rect 677626 745090 686875 745158 -rect 675407 743840 675887 743910 -rect 41713 743330 42193 743400 -rect 675407 743288 675887 743358 -rect 41713 742686 42193 742756 -rect 675407 742644 675887 742714 -rect 41713 742042 42193 742112 -rect 675407 742000 675887 742070 -rect 41713 741490 42193 741560 -rect 675407 740160 675887 740230 +rect 675407 743841 675887 743911 +rect 41713 743329 42193 743399 +rect 675407 743289 675887 743359 +rect 41713 742685 42193 742755 +rect 675407 742645 675887 742715 +rect 41713 742041 42193 742111 +rect 675407 742001 675887 742071 +rect 41713 741489 42193 741559 +rect 675407 740161 675887 740231 rect 40832 736546 40892 739828 -rect 675407 739608 675887 739678 -rect 675407 738964 675887 739034 -rect 675407 738320 675887 738390 +rect 675407 739609 675887 739679 +rect 675407 738965 675887 739035 +rect 675407 738321 675887 738391 rect 30782 735827 39885 735896 rect 30782 735523 30845 735827 rect 31549 735808 39885 735827 @@ -3304,9 +1751,9 @@ rect 31549 735523 39705 735808 rect 30782 735504 39705 735523 rect 39849 735504 39885 735808 rect 40810 735781 42193 735841 -rect 675407 735836 675887 735906 +rect 675407 735837 675887 735907 rect 30782 735446 39885 735504 -rect 675407 735284 675887 735354 +rect 675407 735285 675887 735355 rect 37316 735222 39885 735260 rect 37316 734918 37386 735222 rect 38090 735216 39885 735222 @@ -3314,28 +1761,28 @@ rect 38090 734918 39704 735216 rect 37316 734912 39704 734918 rect 39848 734912 39885 735216 rect 37316 734879 39885 734912 -rect 675407 734640 675887 734710 -rect 675407 733996 675887 734066 +rect 675407 734641 675887 734711 +rect 675407 733997 675887 734067 rect 40810 733781 42193 733841 -rect 675407 733444 675887 733514 -rect 675407 732800 675887 732870 -rect 675407 731604 675887 731674 -rect 675407 730960 675887 731030 -rect 675407 729120 675887 729190 -rect 41713 713010 42193 713080 -rect 41713 711170 42193 711240 -rect 41713 710526 42193 710596 -rect 41713 709330 42193 709400 -rect 41713 708686 42193 708756 -rect 41713 708134 42193 708204 -rect 41713 707490 42193 707560 -rect 41713 706846 42193 706916 -rect 41713 706294 42193 706364 -rect 41713 703810 42193 703880 -rect 41713 703166 42193 703236 -rect 41713 702522 42193 702592 -rect 675407 702144 676767 702206 -rect 41713 701970 42193 702040 +rect 675407 733372 675887 733586 +rect 675407 732801 675887 732871 +rect 675407 731575 675887 731703 +rect 675407 730961 675887 731031 +rect 675407 729121 675887 729191 +rect 41713 713009 42193 713079 +rect 41713 711169 42193 711239 +rect 41713 710497 42193 710625 +rect 41713 709329 42193 709399 +rect 41713 708614 42193 708828 +rect 41713 708133 42193 708203 +rect 41713 707489 42193 707559 +rect 41713 706845 42193 706915 +rect 41713 706293 42193 706363 +rect 41713 703809 42193 703879 +rect 41713 703165 42193 703235 +rect 41713 702521 42193 702591 +rect 675407 702143 676767 702205 +rect 41713 701969 42193 702039 rect 677626 701068 680341 701107 rect 677626 701064 679567 701068 rect 677626 700760 677649 701064 @@ -3345,25 +1792,25 @@ rect 677793 700760 680341 700764 rect 677626 700726 680341 700760 rect 677626 700463 686875 700540 rect 677626 700462 686108 700463 -rect 41713 700130 42193 700200 -rect 675407 700142 676797 700204 +rect 41713 700129 42193 700199 +rect 675407 700143 676797 700205 rect 677626 700158 677648 700462 rect 677792 700159 686108 700462 rect 686812 700159 686875 700463 rect 677792 700158 686875 700159 rect 677626 700090 686875 700158 -rect 41713 699486 42193 699556 -rect 41713 698842 42193 698912 -rect 675407 698840 675887 698910 -rect 41713 698290 42193 698360 -rect 675407 698288 675887 698358 -rect 675407 697644 675887 697714 -rect 675407 697000 675887 697070 +rect 41713 699485 42193 699555 +rect 41713 698841 42193 698911 +rect 675407 698841 675887 698911 +rect 41713 698289 42193 698359 +rect 675407 698289 675887 698359 +rect 675407 697645 675887 697715 +rect 675407 697001 675887 697071 rect 40832 693552 40892 696608 -rect 675407 695160 675887 695230 -rect 675407 694608 675887 694678 -rect 675407 693964 675887 694034 -rect 675407 693320 675887 693390 +rect 675407 695161 675887 695231 +rect 675407 694609 675887 694679 +rect 675407 693965 675887 694035 +rect 675407 693321 675887 693391 rect 30782 692827 39885 692896 rect 30782 692523 30845 692827 rect 31549 692808 39885 692827 @@ -3380,31 +1827,31 @@ rect 37316 691912 39704 691918 rect 39848 691912 39885 692216 rect 37316 691879 39885 691912 rect 40810 690781 42193 690841 -rect 675407 690836 675887 690906 -rect 675407 690284 675887 690354 -rect 675407 689640 675887 689710 -rect 675407 688996 675887 689066 -rect 675407 688444 675887 688514 -rect 675407 687800 675887 687870 -rect 675407 686604 675887 686674 -rect 675407 685960 675887 686030 -rect 675407 684120 675887 684190 -rect 41713 669810 42193 669880 -rect 41713 667970 42193 668040 -rect 41713 667326 42193 667396 -rect 41713 666130 42193 666200 -rect 41713 665486 42193 665556 -rect 41713 664934 42193 665004 -rect 41713 664290 42193 664360 -rect 41713 663646 42193 663716 -rect 41713 663094 42193 663164 -rect 41713 660610 42193 660680 -rect 41713 659966 42193 660036 -rect 41713 659322 42193 659392 -rect 41713 658770 42193 658840 -rect 675407 657144 676767 657206 -rect 41713 656930 42193 657000 -rect 41713 656286 42193 656356 +rect 675407 690837 675887 690907 +rect 675407 690285 675887 690355 +rect 675407 689641 675887 689711 +rect 675407 688997 675887 689067 +rect 675407 688372 675887 688586 +rect 675407 687801 675887 687871 +rect 675407 686575 675887 686703 +rect 675407 685961 675887 686031 +rect 675407 684121 675887 684191 +rect 41713 669809 42193 669879 +rect 41713 667969 42193 668039 +rect 41713 667297 42193 667425 +rect 41713 666129 42193 666199 +rect 41713 665414 42193 665628 +rect 41713 664933 42193 665003 +rect 41713 664289 42193 664359 +rect 41713 663645 42193 663715 +rect 41713 663093 42193 663163 +rect 41713 660609 42193 660679 +rect 41713 659965 42193 660035 +rect 41713 659321 42193 659391 +rect 41713 658769 42193 658839 +rect 675407 657143 676767 657205 +rect 41713 656929 42193 656999 +rect 41713 656285 42193 656355 rect 677626 656068 680341 656107 rect 677626 656064 679567 656068 rect 677626 655760 677649 656064 @@ -3412,22 +1859,22 @@ rect 677793 655764 679567 656064 rect 680271 655764 680341 656068 rect 677793 655760 680341 655764 rect 677626 655726 680341 655760 -rect 41713 655642 42193 655712 +rect 41713 655641 42193 655711 rect 677626 655463 686875 655540 rect 677626 655462 686108 655463 -rect 41713 655090 42193 655160 -rect 675407 655142 676797 655204 +rect 41713 655089 42193 655159 +rect 675407 655143 676797 655205 rect 677626 655158 677648 655462 rect 677792 655159 686108 655462 rect 686812 655159 686875 655463 rect 677792 655158 686875 655159 rect 677626 655090 686875 655158 -rect 675407 653640 675887 653710 +rect 675407 653641 675887 653711 rect 40832 650533 40892 653443 -rect 675407 653088 675887 653158 -rect 675407 652444 675887 652514 -rect 675407 651800 675887 651870 -rect 675407 649960 675887 650030 +rect 675407 653089 675887 653159 +rect 675407 652445 675887 652515 +rect 675407 651801 675887 651871 +rect 675407 649961 675887 650031 rect 30782 649827 39885 649896 rect 30782 649523 30845 649827 rect 31549 649808 39885 649827 @@ -3436,7 +1883,7 @@ rect 30782 649504 39705 649523 rect 39849 649504 39885 649808 rect 40810 649781 42193 649841 rect 30782 649446 39885 649504 -rect 675407 649408 675887 649478 +rect 675407 649409 675887 649479 rect 37316 649222 39885 649260 rect 37316 648918 37386 649222 rect 38090 649216 39885 649222 @@ -3444,36 +1891,36 @@ rect 38090 648918 39704 649216 rect 37316 648912 39704 648918 rect 39848 648912 39885 649216 rect 37316 648879 39885 648912 -rect 675407 648764 675887 648834 -rect 675407 648120 675887 648190 +rect 675407 648765 675887 648835 +rect 675407 648121 675887 648191 rect 40810 647781 42193 647841 -rect 675407 645636 675887 645706 -rect 675407 645084 675887 645154 -rect 675407 644440 675887 644510 -rect 675407 643796 675887 643866 -rect 675407 643244 675887 643314 -rect 675407 642600 675887 642670 -rect 675407 641404 675887 641474 -rect 675407 640760 675887 640830 -rect 675407 638920 675887 638990 -rect 41713 626610 42193 626680 -rect 41713 624770 42193 624840 -rect 41713 624126 42193 624196 -rect 41713 622930 42193 623000 -rect 41713 622286 42193 622356 -rect 41713 621734 42193 621804 -rect 41713 621090 42193 621160 -rect 41713 620446 42193 620516 -rect 41713 619894 42193 619964 -rect 41713 617410 42193 617480 -rect 41713 616766 42193 616836 -rect 41713 616122 42193 616192 -rect 41713 615570 42193 615640 -rect 41713 613730 42193 613800 -rect 41713 613086 42193 613156 -rect 41713 612442 42193 612512 -rect 675407 612144 676767 612206 -rect 41713 611890 42193 611960 +rect 675407 645637 675887 645707 +rect 675407 645085 675887 645155 +rect 675407 644441 675887 644511 +rect 675407 643797 675887 643867 +rect 675407 643172 675887 643386 +rect 675407 642601 675887 642671 +rect 675407 641375 675887 641503 +rect 675407 640761 675887 640831 +rect 675407 638921 675887 638991 +rect 41713 626609 42193 626679 +rect 41713 624769 42193 624839 +rect 41713 624097 42193 624225 +rect 41713 622929 42193 622999 +rect 41713 622214 42193 622428 +rect 41713 621733 42193 621803 +rect 41713 621089 42193 621159 +rect 41713 620445 42193 620515 +rect 41713 619893 42193 619963 +rect 41713 617409 42193 617479 +rect 41713 616765 42193 616835 +rect 41713 616121 42193 616191 +rect 41713 615569 42193 615639 +rect 41713 613729 42193 613799 +rect 41713 613085 42193 613155 +rect 41713 612441 42193 612511 +rect 675407 612143 676767 612205 +rect 41713 611889 42193 611959 rect 677626 611068 680341 611107 rect 677626 611064 679567 611068 rect 677626 610760 677649 611064 @@ -3484,15 +1931,15 @@ rect 677626 610726 680341 610760 rect 677626 610463 686875 610540 rect 677626 610462 686108 610463 rect 40832 607531 40892 610227 -rect 675407 610142 676797 610204 +rect 675407 610143 676797 610205 rect 677626 610158 677648 610462 rect 677792 610159 686108 610462 rect 686812 610159 686875 610463 rect 677792 610158 686875 610159 rect 677626 610090 686875 610158 -rect 675407 608640 675887 608710 -rect 675407 608088 675887 608158 -rect 675407 607444 675887 607514 +rect 675407 608641 675887 608711 +rect 675407 608089 675887 608159 +rect 675407 607445 675887 607515 rect 30782 606827 39885 606896 rect 30782 606523 30845 606827 rect 31549 606808 39885 606827 @@ -3500,7 +1947,7 @@ rect 31549 606523 39705 606808 rect 30782 606504 39705 606523 rect 39849 606504 39885 606808 rect 40810 606781 42193 606841 -rect 675407 606800 675887 606870 +rect 675407 606801 675887 606871 rect 30782 606446 39885 606504 rect 37316 606222 39885 606260 rect 37316 605918 37386 606222 @@ -3509,38 +1956,38 @@ rect 38090 605918 39704 606216 rect 37316 605912 39704 605918 rect 39848 605912 39885 606216 rect 37316 605879 39885 605912 -rect 675407 604960 675887 605030 +rect 675407 604961 675887 605031 rect 40810 604781 42193 604841 -rect 675407 604408 675887 604478 -rect 675407 603764 675887 603834 -rect 675407 603120 675887 603190 -rect 675407 600636 675887 600706 -rect 675407 600084 675887 600154 -rect 675407 599440 675887 599510 -rect 675407 598796 675887 598866 -rect 675407 598244 675887 598314 -rect 675407 597600 675887 597670 -rect 675407 596404 675887 596474 -rect 675407 595760 675887 595830 -rect 675407 593920 675887 593990 -rect 41713 583410 42193 583480 -rect 41713 581570 42193 581640 -rect 41713 580926 42193 580996 -rect 41713 579730 42193 579800 -rect 41713 579086 42193 579156 -rect 41713 578534 42193 578604 -rect 41713 577890 42193 577960 -rect 41713 577246 42193 577316 -rect 41713 576694 42193 576764 -rect 41713 574210 42193 574280 -rect 41713 573566 42193 573636 -rect 41713 572922 42193 572992 -rect 41713 572370 42193 572440 -rect 41713 570530 42193 570600 -rect 41713 569886 42193 569956 -rect 41713 569242 42193 569312 -rect 41713 568690 42193 568760 -rect 675407 567144 676767 567206 +rect 675407 604409 675887 604479 +rect 675407 603765 675887 603835 +rect 675407 603121 675887 603191 +rect 675407 600637 675887 600707 +rect 675407 600085 675887 600155 +rect 675407 599441 675887 599511 +rect 675407 598797 675887 598867 +rect 675407 598172 675887 598386 +rect 675407 597601 675887 597671 +rect 675407 596375 675887 596503 +rect 675407 595761 675887 595831 +rect 675407 593921 675887 593991 +rect 41713 583409 42193 583479 +rect 41713 581569 42193 581639 +rect 41713 580897 42193 581025 +rect 41713 579729 42193 579799 +rect 41713 579014 42193 579228 +rect 41713 578533 42193 578603 +rect 41713 577889 42193 577959 +rect 41713 577245 42193 577315 +rect 41713 576693 42193 576763 +rect 41713 574209 42193 574279 +rect 41713 573565 42193 573635 +rect 41713 572921 42193 572991 +rect 41713 572369 42193 572439 +rect 41713 570529 42193 570599 +rect 41713 569885 42193 569955 +rect 41713 569241 42193 569311 +rect 41713 568689 42193 568759 +rect 675407 567143 676767 567205 rect 40832 564525 40892 567008 rect 677626 566068 680341 566107 rect 677626 566064 679567 566068 @@ -3565,7 +2012,7 @@ rect 30782 563504 39705 563523 rect 39849 563504 39885 563808 rect 40810 563781 42193 563841 rect 30782 563446 39885 563504 -rect 675407 563440 675887 563510 +rect 675407 563441 675887 563511 rect 37316 563222 39885 563260 rect 37316 562918 37386 563222 rect 38090 563216 39885 563222 @@ -3573,40 +2020,40 @@ rect 38090 562918 39704 563216 rect 37316 562912 39704 562918 rect 39848 562912 39885 563216 rect 37316 562879 39885 562912 -rect 675407 562888 675887 562958 -rect 675407 562244 675887 562314 +rect 675407 562889 675887 562959 +rect 675407 562245 675887 562315 rect 40810 561781 42193 561841 -rect 675407 561600 675887 561670 -rect 675407 559760 675887 559830 -rect 675407 559208 675887 559278 -rect 675407 558564 675887 558634 -rect 675407 557920 675887 557990 -rect 675407 555436 675887 555506 -rect 675407 554884 675887 554954 -rect 675407 554240 675887 554310 -rect 675407 553596 675887 553666 -rect 675407 553044 675887 553114 -rect 675407 552400 675887 552470 -rect 675407 551204 675887 551274 -rect 675407 550560 675887 550630 -rect 675407 548720 675887 548790 -rect 41713 540210 42193 540280 -rect 41713 538370 42193 538440 -rect 41713 537726 42193 537796 -rect 41713 536530 42193 536600 -rect 41713 535886 42193 535956 -rect 41713 535334 42193 535404 -rect 41713 534690 42193 534760 -rect 41713 534046 42193 534116 -rect 41713 533494 42193 533564 -rect 41713 531010 42193 531080 -rect 41713 530366 42193 530436 -rect 41713 529722 42193 529792 -rect 41713 529170 42193 529240 -rect 41713 527330 42193 527400 -rect 41713 526686 42193 526756 -rect 41713 526042 42193 526112 -rect 41713 525490 42193 525560 +rect 675407 561601 675887 561671 +rect 675407 559761 675887 559831 +rect 675407 559209 675887 559279 +rect 675407 558565 675887 558635 +rect 675407 557921 675887 557991 +rect 675407 555437 675887 555507 +rect 675407 554885 675887 554955 +rect 675407 554241 675887 554311 +rect 675407 553597 675887 553667 +rect 675407 552972 675887 553186 +rect 675407 552401 675887 552471 +rect 675407 551175 675887 551303 +rect 675407 550561 675887 550631 +rect 675407 548721 675887 548791 +rect 41713 540209 42193 540279 +rect 41713 538369 42193 538439 +rect 41713 537697 42193 537825 +rect 41713 536529 42193 536599 +rect 41713 535814 42193 536028 +rect 41713 535333 42193 535403 +rect 41713 534689 42193 534759 +rect 41713 534045 42193 534115 +rect 41713 533493 42193 533563 +rect 41713 531009 42193 531079 +rect 41713 530365 42193 530435 +rect 41713 529721 42193 529791 +rect 41713 529169 42193 529239 +rect 41713 527329 42193 527399 +rect 41713 526685 42193 526755 +rect 41713 526041 42193 526111 +rect 41713 525489 42193 525559 rect 40832 521519 40892 523808 rect 30782 520827 39885 520896 rect 30782 520523 30845 520827 @@ -3625,49 +2072,53 @@ rect 39848 519912 39885 520216 rect 37316 519879 39885 519912 rect 40810 518781 42193 518841 rect 675407 513921 677812 518701 -rect 675407 503942 677812 508722 -rect 39874 493078 42193 497858 +rect 675407 503941 677812 508721 +rect 39874 493077 42193 497857 rect 39874 483099 42193 487879 -rect 675407 474699 677752 474700 -rect 675407 469901 676907 474699 -rect 677705 469901 677752 474699 -rect 675407 469900 677752 469901 +rect 675407 469900 676907 474699 +rect 677705 469900 677752 474699 +rect 675407 469899 677752 469900 +rect 675407 469600 676109 469609 rect 675407 469599 677549 469600 -rect 675407 464949 675787 469599 -rect 676585 464949 677549 469599 +rect 675407 464960 675787 469599 +rect 676585 464960 677549 469599 +rect 675407 464947 676109 464960 +rect 676838 464649 676907 464660 rect 675407 459861 676907 464649 -rect 677705 459861 677752 464649 +rect 677705 459861 677752 464660 rect 675407 459860 677752 459861 -rect 39870 455739 42193 455740 -rect 39870 450953 39919 455739 -rect 40717 450953 42193 455739 -rect 39870 450951 42193 450953 +rect 675407 459859 675907 459860 +rect 39870 455740 42193 455741 +rect 39870 450953 39919 455740 +rect 40717 450953 42193 455740 +rect 39870 450952 42193 450953 +rect 41495 450951 42193 450952 rect 40051 446001 41039 450651 rect 41837 446001 42193 450651 rect 40051 446000 42193 446001 -rect 39870 445699 42193 445700 -rect 39870 440901 39919 445699 -rect 40717 440901 42193 445699 -rect 39870 440900 42193 440901 +rect 41693 445999 42193 446000 +rect 39870 440900 39919 445699 +rect 40717 440900 42193 445699 +rect 39870 440899 42193 440900 rect 675407 425721 677812 430501 -rect 675407 415742 677812 420522 -rect 41713 412610 42193 412680 -rect 41713 410770 42193 410840 -rect 41713 410126 42193 410196 -rect 41713 408930 42193 409000 -rect 41713 408286 42193 408356 -rect 41713 407734 42193 407804 -rect 41713 407090 42193 407160 -rect 41713 406446 42193 406516 -rect 41713 405894 42193 405964 -rect 41713 403410 42193 403480 -rect 41713 402766 42193 402836 -rect 41713 402122 42193 402192 -rect 41713 401570 42193 401640 -rect 41713 399730 42193 399800 -rect 41713 399086 42193 399156 -rect 41713 398442 42193 398512 -rect 41713 397890 42193 397960 +rect 675407 415743 677812 420523 +rect 41713 412609 42193 412679 +rect 41713 410769 42193 410839 +rect 41713 410097 42193 410225 +rect 41713 408929 42193 408999 +rect 41713 408214 42193 408428 +rect 41713 407733 42193 407803 +rect 41713 407089 42193 407159 +rect 41713 406445 42193 406515 +rect 41713 405893 42193 405963 +rect 41713 403409 42193 403479 +rect 41713 402765 42193 402835 +rect 41713 402121 42193 402191 +rect 41713 401569 42193 401639 +rect 41713 399729 42193 399799 +rect 41713 399085 42193 399155 +rect 41713 398441 42193 398511 +rect 41713 397889 42193 397959 rect 40832 392553 40892 396208 rect 30782 391827 39885 391896 rect 30782 391523 30845 391827 @@ -3684,7 +2135,7 @@ rect 38090 390918 39704 391216 rect 37316 390912 39704 390918 rect 39848 390912 39885 391216 rect 37316 390879 39885 390912 -rect 675407 390144 676767 390206 +rect 675407 390143 676767 390205 rect 40810 389781 42193 389841 rect 677626 389068 680341 389107 rect 677626 389064 679567 389068 @@ -3701,40 +2152,40 @@ rect 677792 388159 686108 388462 rect 686812 388159 686875 388463 rect 677792 388158 686875 388159 rect 677626 388090 686875 388158 -rect 675407 386240 675887 386310 -rect 675407 385688 675887 385758 -rect 675407 385044 675887 385114 -rect 675407 384400 675887 384470 -rect 675407 382560 675887 382630 -rect 675407 382008 675887 382078 -rect 675407 381364 675887 381434 -rect 675407 380720 675887 380790 -rect 675407 378236 675887 378306 -rect 675407 377684 675887 377754 -rect 675407 377040 675887 377110 -rect 675407 376396 675887 376466 -rect 675407 375844 675887 375914 -rect 675407 375200 675887 375270 -rect 675407 374004 675887 374074 -rect 675407 373360 675887 373430 -rect 675407 371520 675887 371590 -rect 41713 369410 42193 369480 -rect 41713 367570 42193 367640 -rect 41713 366926 42193 366996 -rect 41713 365730 42193 365800 -rect 41713 365086 42193 365156 -rect 41713 364534 42193 364604 -rect 41713 363890 42193 363960 -rect 41713 363246 42193 363316 -rect 41713 362694 42193 362764 -rect 41713 360210 42193 360280 -rect 41713 359566 42193 359636 -rect 41713 358922 42193 358992 -rect 41713 358370 42193 358440 -rect 41713 356530 42193 356600 -rect 41713 355886 42193 355956 -rect 41713 355242 42193 355312 -rect 41713 354690 42193 354760 +rect 675407 386241 675887 386311 +rect 675407 385689 675887 385759 +rect 675407 385045 675887 385115 +rect 675407 384401 675887 384471 +rect 675407 382561 675887 382631 +rect 675407 382009 675887 382079 +rect 675407 381365 675887 381435 +rect 675407 380721 675887 380791 +rect 675407 378237 675887 378307 +rect 675407 377685 675887 377755 +rect 675407 377041 675887 377111 +rect 675407 376397 675887 376467 +rect 675407 375772 675887 375986 +rect 675407 375201 675887 375271 +rect 675407 373975 675887 374103 +rect 675407 373361 675887 373431 +rect 675407 371521 675887 371591 +rect 41713 369409 42193 369479 +rect 41713 367569 42193 367639 +rect 41713 366897 42193 367025 +rect 41713 365729 42193 365799 +rect 41713 365014 42193 365228 +rect 41713 364533 42193 364603 +rect 41713 363889 42193 363959 +rect 41713 363245 42193 363315 +rect 41713 362693 42193 362763 +rect 41713 360209 42193 360279 +rect 41713 359565 42193 359635 +rect 41713 358921 42193 358991 +rect 41713 358369 42193 358439 +rect 41713 356529 42193 356599 +rect 41713 355885 42193 355955 +rect 41713 355241 42193 355311 +rect 41713 354689 42193 354759 rect 40832 349533 40892 353008 rect 30782 348827 39885 348896 rect 30782 348523 30845 348827 @@ -3752,7 +2203,7 @@ rect 37316 347912 39704 347918 rect 39848 347912 39885 348216 rect 37316 347879 39885 347912 rect 40810 346781 42193 346841 -rect 675407 345144 676767 345206 +rect 675407 345143 676767 345205 rect 677626 344068 680341 344107 rect 677626 344064 679567 344068 rect 677626 343760 677649 344064 @@ -3768,40 +2219,40 @@ rect 677792 343159 686108 343462 rect 686812 343159 686875 343463 rect 677792 343158 686875 343159 rect 677626 343090 686875 343158 -rect 675407 341040 675887 341110 -rect 675407 340488 675887 340558 -rect 675407 339844 675887 339914 -rect 675407 339200 675887 339270 -rect 675407 337360 675887 337430 -rect 675407 336808 675887 336878 -rect 675407 336164 675887 336234 -rect 675407 335520 675887 335590 -rect 675407 333036 675887 333106 -rect 675407 332484 675887 332554 -rect 675407 331840 675887 331910 -rect 675407 331196 675887 331266 -rect 675407 330644 675887 330714 -rect 675407 330000 675887 330070 -rect 675407 328804 675887 328874 -rect 675407 328160 675887 328230 -rect 675407 326320 675887 326390 -rect 41713 326210 42193 326280 -rect 41713 324370 42193 324440 -rect 41713 323726 42193 323796 -rect 41713 322530 42193 322600 -rect 41713 321886 42193 321956 -rect 41713 321334 42193 321404 -rect 41713 320690 42193 320760 -rect 41713 320046 42193 320116 -rect 41713 319494 42193 319564 -rect 41713 317010 42193 317080 -rect 41713 316366 42193 316436 -rect 41713 315722 42193 315792 -rect 41713 315170 42193 315240 -rect 41713 313330 42193 313400 -rect 41713 312686 42193 312756 -rect 41713 312042 42193 312112 -rect 41713 311490 42193 311560 +rect 675407 341041 675887 341111 +rect 675407 340489 675887 340559 +rect 675407 339845 675887 339915 +rect 675407 339201 675887 339271 +rect 675407 337361 675887 337431 +rect 675407 336809 675887 336879 +rect 675407 336165 675887 336235 +rect 675407 335521 675887 335591 +rect 675407 333037 675887 333107 +rect 675407 332485 675887 332555 +rect 675407 331841 675887 331911 +rect 675407 331197 675887 331267 +rect 675407 330572 675887 330786 +rect 675407 330001 675887 330071 +rect 675407 328775 675887 328903 +rect 675407 328161 675887 328231 +rect 675407 326321 675887 326391 +rect 41713 326209 42193 326279 +rect 41713 324369 42193 324439 +rect 41713 323697 42193 323825 +rect 41713 322529 42193 322599 +rect 41713 321814 42193 322028 +rect 41713 321333 42193 321403 +rect 41713 320689 42193 320759 +rect 41713 320045 42193 320115 +rect 41713 319493 42193 319563 +rect 41713 317009 42193 317079 +rect 41713 316365 42193 316435 +rect 41713 315721 42193 315791 +rect 41713 315169 42193 315239 +rect 41713 313329 42193 313399 +rect 41713 312685 42193 312755 +rect 41713 312041 42193 312111 +rect 41713 311489 42193 311559 rect 40832 306514 40892 309808 rect 30782 305827 39885 305896 rect 30782 305523 30845 305827 @@ -3819,7 +2270,7 @@ rect 37316 304912 39704 304918 rect 39848 304912 39885 305216 rect 37316 304879 39885 304912 rect 40810 303781 42193 303841 -rect 675407 300144 676767 300206 +rect 675407 300143 676767 300205 rect 677626 299068 680341 299107 rect 677626 299064 679567 299068 rect 677626 298760 677649 299064 @@ -3835,40 +2286,40 @@ rect 677792 298159 686108 298462 rect 686812 298159 686875 298463 rect 677792 298158 686875 298159 rect 677626 298090 686875 298158 -rect 675407 296040 675887 296110 -rect 675407 295488 675887 295558 -rect 675407 294844 675887 294914 -rect 675407 294200 675887 294270 -rect 675407 292360 675887 292430 -rect 675407 291808 675887 291878 -rect 675407 291164 675887 291234 -rect 675407 290520 675887 290590 -rect 675407 288036 675887 288106 -rect 675407 287484 675887 287554 -rect 675407 286840 675887 286910 -rect 675407 286196 675887 286266 -rect 675407 285644 675887 285714 -rect 675407 285000 675887 285070 -rect 675407 283804 675887 283874 -rect 675407 283160 675887 283230 -rect 41713 283010 42193 283080 -rect 675407 281320 675887 281390 -rect 41713 281170 42193 281240 -rect 41713 280526 42193 280596 -rect 41713 279330 42193 279400 -rect 41713 278686 42193 278756 -rect 41713 278134 42193 278204 -rect 41713 277490 42193 277560 -rect 41713 276846 42193 276916 -rect 41713 276294 42193 276364 -rect 41713 273810 42193 273880 -rect 41713 273166 42193 273236 -rect 41713 272522 42193 272592 -rect 41713 271970 42193 272040 -rect 41713 270130 42193 270200 -rect 41713 269486 42193 269556 -rect 41713 268842 42193 268912 -rect 41713 268290 42193 268360 +rect 675407 296041 675887 296111 +rect 675407 295489 675887 295559 +rect 675407 294845 675887 294915 +rect 675407 294201 675887 294271 +rect 675407 292361 675887 292431 +rect 675407 291809 675887 291879 +rect 675407 291165 675887 291235 +rect 675407 290521 675887 290591 +rect 675407 288037 675887 288107 +rect 675407 287485 675887 287555 +rect 675407 286841 675887 286911 +rect 675407 286197 675887 286267 +rect 675407 285572 675887 285786 +rect 675407 285001 675887 285071 +rect 675407 283775 675887 283903 +rect 675407 283161 675887 283231 +rect 41713 283009 42193 283079 +rect 675407 281321 675887 281391 +rect 41713 281169 42193 281239 +rect 41713 280497 42193 280625 +rect 41713 279329 42193 279399 +rect 41713 278614 42193 278828 +rect 41713 278133 42193 278203 +rect 41713 277489 42193 277559 +rect 41713 276845 42193 276915 +rect 41713 276293 42193 276363 +rect 41713 273809 42193 273879 +rect 41713 273165 42193 273235 +rect 41713 272521 42193 272591 +rect 41713 271969 42193 272039 +rect 41713 270129 42193 270199 +rect 41713 269485 42193 269555 +rect 41713 268841 42193 268911 +rect 41713 268289 42193 268359 rect 40832 263525 40892 266624 rect 30782 262827 39885 262896 rect 30782 262523 30845 262827 @@ -3886,7 +2337,7 @@ rect 37316 261912 39704 261918 rect 39848 261912 39885 262216 rect 37316 261879 39885 261912 rect 40810 260781 42193 260841 -rect 675407 255144 676767 255206 +rect 675407 255143 676767 255205 rect 677626 254068 680341 254107 rect 677626 254064 679567 254068 rect 677626 253760 677649 254064 @@ -3902,40 +2353,40 @@ rect 677792 253159 686108 253462 rect 686812 253159 686875 253463 rect 677792 253158 686875 253159 rect 677626 253090 686875 253158 -rect 675407 251040 675887 251110 -rect 675407 250488 675887 250558 -rect 675407 249844 675887 249914 -rect 675407 249200 675887 249270 -rect 675407 247360 675887 247430 -rect 675407 246808 675887 246878 -rect 675407 246164 675887 246234 -rect 675407 245520 675887 245590 -rect 675407 243036 675887 243106 -rect 675407 242484 675887 242554 -rect 675407 241840 675887 241910 -rect 675407 241196 675887 241266 -rect 675407 240644 675887 240714 -rect 675407 240000 675887 240070 -rect 41713 239810 42193 239880 -rect 675407 238804 675887 238874 -rect 675407 238160 675887 238230 -rect 41713 237970 42193 238040 -rect 41713 237326 42193 237396 -rect 675407 236320 675887 236390 -rect 41713 236130 42193 236200 -rect 41713 235486 42193 235556 -rect 41713 234934 42193 235004 -rect 41713 234290 42193 234360 -rect 41713 233646 42193 233716 -rect 41713 233094 42193 233164 -rect 41713 230610 42193 230680 -rect 41713 229966 42193 230036 -rect 41713 229322 42193 229392 -rect 41713 228770 42193 228840 -rect 41713 226930 42193 227000 -rect 41713 226286 42193 226356 -rect 41713 225642 42193 225712 -rect 41713 225090 42193 225160 +rect 675407 251041 675887 251111 +rect 675407 250489 675887 250559 +rect 675407 249845 675887 249915 +rect 675407 249201 675887 249271 +rect 675407 247361 675887 247431 +rect 675407 246809 675887 246879 +rect 675407 246165 675887 246235 +rect 675407 245521 675887 245591 +rect 675407 243037 675887 243107 +rect 675407 242485 675887 242555 +rect 675407 241841 675887 241911 +rect 675407 241197 675887 241267 +rect 675407 240572 675887 240786 +rect 675407 240001 675887 240071 +rect 41713 239809 42193 239879 +rect 675407 238775 675887 238903 +rect 675407 238161 675887 238231 +rect 41713 237969 42193 238039 +rect 41713 237297 42193 237425 +rect 675407 236321 675887 236391 +rect 41713 236129 42193 236199 +rect 41713 235414 42193 235628 +rect 41713 234933 42193 235003 +rect 41713 234289 42193 234359 +rect 41713 233645 42193 233715 +rect 41713 233093 42193 233163 +rect 41713 230609 42193 230679 +rect 41713 229965 42193 230035 +rect 41713 229321 42193 229391 +rect 41713 228769 42193 228839 +rect 41713 226929 42193 226999 +rect 41713 226285 42193 226355 +rect 41713 225641 42193 225711 +rect 41713 225089 42193 225159 rect 40832 220519 40892 223429 rect 30782 219827 39885 219896 rect 30782 219523 30845 219827 @@ -3953,7 +2404,7 @@ rect 37316 218912 39704 218918 rect 39848 218912 39885 219216 rect 37316 218879 39885 218912 rect 40810 217781 42193 217841 -rect 675407 210144 676767 210206 +rect 675407 210143 676767 210205 rect 677626 209068 680341 209107 rect 677626 209064 679567 209068 rect 677626 208760 677649 209064 @@ -3969,40 +2420,40 @@ rect 677792 208159 686108 208462 rect 686812 208159 686875 208463 rect 677792 208158 686875 208159 rect 677626 208090 686875 208158 -rect 675407 205840 675887 205910 -rect 675407 205288 675887 205358 -rect 675407 204644 675887 204714 -rect 675407 204000 675887 204070 -rect 675407 202160 675887 202230 -rect 675407 201608 675887 201678 -rect 675407 200964 675887 201034 -rect 675407 200320 675887 200390 -rect 675407 197836 675887 197906 -rect 675407 197284 675887 197354 -rect 41713 196610 42193 196680 -rect 675407 196640 675887 196710 -rect 675407 195996 675887 196066 -rect 675407 195444 675887 195514 -rect 41713 194770 42193 194840 -rect 675407 194800 675887 194870 -rect 41713 194126 42193 194196 -rect 675407 193604 675887 193674 -rect 41713 192930 42193 193000 -rect 675407 192960 675887 193030 -rect 41713 192286 42193 192356 -rect 41713 191734 42193 191804 -rect 41713 191090 42193 191160 -rect 675407 191120 675887 191190 -rect 41713 190446 42193 190516 -rect 41713 189894 42193 189964 -rect 41713 187410 42193 187480 -rect 41713 186766 42193 186836 -rect 41713 186122 42193 186192 -rect 41713 185570 42193 185640 -rect 41713 183730 42193 183800 -rect 41713 183086 42193 183156 -rect 41713 182442 42193 182512 -rect 41713 181890 42193 181960 +rect 675407 205841 675887 205911 +rect 675407 205289 675887 205359 +rect 675407 204645 675887 204715 +rect 675407 204001 675887 204071 +rect 675407 202161 675887 202231 +rect 675407 201609 675887 201679 +rect 675407 200965 675887 201035 +rect 675407 200321 675887 200391 +rect 675407 197837 675887 197907 +rect 675407 197285 675887 197355 +rect 41713 196609 42193 196679 +rect 675407 196641 675887 196711 +rect 675407 195997 675887 196067 +rect 675407 195372 675887 195586 +rect 41713 194769 42193 194839 +rect 675407 194801 675887 194871 +rect 41713 194097 42193 194225 +rect 675407 193575 675887 193703 +rect 41713 192929 42193 192999 +rect 675407 192961 675887 193031 +rect 41713 192214 42193 192428 +rect 41713 191733 42193 191803 +rect 41713 191089 42193 191159 +rect 675407 191121 675887 191191 +rect 41713 190445 42193 190515 +rect 41713 189893 42193 189963 +rect 41713 187409 42193 187479 +rect 41713 186765 42193 186835 +rect 41713 186121 42193 186191 +rect 41713 185569 42193 185639 +rect 41713 183729 42193 183799 +rect 41713 183085 42193 183155 +rect 41713 182441 42193 182511 +rect 41713 181889 42193 181959 rect 40832 177543 40892 180230 rect 30782 176827 39885 176896 rect 30782 176523 30845 176827 @@ -4020,7 +2471,7 @@ rect 37316 175912 39704 175918 rect 39848 175912 39885 176216 rect 37316 175879 39885 175912 rect 40810 174781 42193 174841 -rect 675407 165144 676767 165206 +rect 675407 165143 676767 165205 rect 677626 164068 680341 164107 rect 677626 164064 679567 164068 rect 677626 163760 677649 164064 @@ -4036,25 +2487,25 @@ rect 677792 163159 686108 163462 rect 686812 163159 686875 163463 rect 677792 163158 686875 163159 rect 677626 163090 686875 163158 -rect 675407 160840 675887 160910 -rect 675407 160288 675887 160358 -rect 675407 159644 675887 159714 -rect 675407 159000 675887 159070 -rect 675407 157160 675887 157230 -rect 675407 156608 675887 156678 -rect 675407 155964 675887 156034 -rect 675407 155320 675887 155390 -rect 675407 152836 675887 152906 -rect 675407 152284 675887 152354 -rect 675407 151640 675887 151710 -rect 675407 150996 675887 151066 -rect 675407 150444 675887 150514 -rect 675407 149800 675887 149870 -rect 675407 148604 675887 148674 -rect 675407 147960 675887 148030 -rect 675407 146120 675887 146190 -rect 39790 120278 42193 125058 -rect 675407 120144 676744 120206 +rect 675407 160841 675887 160911 +rect 675407 160289 675887 160359 +rect 675407 159645 675887 159715 +rect 675407 159001 675887 159071 +rect 675407 157161 675887 157231 +rect 675407 156609 675887 156679 +rect 675407 155965 675887 156035 +rect 675407 155321 675887 155391 +rect 675407 152837 675887 152907 +rect 675407 152285 675887 152355 +rect 675407 151641 675887 151711 +rect 675407 150997 675887 151067 +rect 675407 150372 675887 150586 +rect 675407 149801 675887 149871 +rect 675407 148575 675887 148703 +rect 675407 147961 675887 148031 +rect 675407 146121 675887 146191 +rect 39790 120277 42193 125057 +rect 675407 120143 676744 120205 rect 677626 119068 680341 119107 rect 677626 119064 679567 119068 rect 677626 118760 677649 119064 @@ -4070,27 +2521,27 @@ rect 677792 118159 686108 118462 rect 686812 118159 686875 118463 rect 677792 118158 686875 118159 rect 677626 118090 686875 118158 -rect 675407 115640 675887 115710 -rect 675407 115088 675887 115158 +rect 675407 115641 675887 115711 +rect 675407 115089 675887 115159 rect 39790 110299 42193 115079 -rect 675407 114444 675887 114514 -rect 675407 113800 675887 113870 -rect 675407 111960 675887 112030 -rect 675407 111408 675887 111478 -rect 675407 110764 675887 110834 -rect 675407 110120 675887 110190 -rect 675407 107636 675887 107706 -rect 675407 107084 675887 107154 -rect 675407 106440 675887 106510 -rect 675407 105796 675887 105866 -rect 675407 105244 675887 105314 -rect 675407 104600 675887 104670 -rect 675407 103404 675887 103474 -rect 675407 102760 675887 102830 +rect 675407 114445 675887 114515 +rect 675407 113801 675887 113871 +rect 675407 111961 675887 112031 +rect 675407 111409 675887 111479 +rect 675407 110765 675887 110835 +rect 675407 110121 675887 110191 +rect 675407 107637 675887 107707 +rect 675407 107085 675887 107155 +rect 675407 106441 675887 106511 +rect 675407 105797 675887 105867 +rect 675407 105172 675887 105386 +rect 675407 104601 675887 104671 +rect 675407 103375 675887 103503 +rect 675407 102761 675887 102831 rect 19586 101323 31666 101352 rect 19586 99489 30809 101323 rect 31637 99489 31666 101323 -rect 675407 100920 675887 100990 +rect 675407 100921 675887 100991 rect 19586 99457 31666 99489 rect 17843 95353 17912 95915 rect 18569 95576 18629 95915 @@ -4099,26 +2550,26 @@ rect 18929 95795 19201 95800 rect 18929 95739 18934 95795 rect 19194 95739 19201 95795 rect 18929 95729 19201 95739 -rect 41447 95795 42193 95802 -rect 41447 95739 41478 95795 -rect 41829 95739 42193 95795 -rect 41447 95732 42193 95739 +rect 41327 95795 42193 95802 +rect 41327 95739 41358 95795 +rect 41709 95739 42193 95795 +rect 41327 95732 42193 95739 rect 18563 95571 18835 95576 rect 18563 95515 18569 95571 rect 18829 95515 18835 95571 rect 18563 95505 18835 95515 -rect 41447 95571 42193 95579 -rect 41447 95515 41470 95571 -rect 41821 95515 42193 95571 -rect 41447 95509 42193 95515 +rect 41327 95571 42193 95579 +rect 41327 95515 41350 95571 +rect 41701 95515 42193 95571 +rect 41327 95509 42193 95515 rect 17837 95347 18118 95353 rect 17837 95291 17843 95347 rect 18112 95291 18118 95347 rect 17837 95283 18118 95291 -rect 41447 95347 42193 95354 -rect 41447 95291 41467 95347 -rect 41818 95291 42193 95347 -rect 41447 95284 42193 95291 +rect 41327 95347 42193 95354 +rect 41327 95291 41347 95347 +rect 41698 95291 42193 95347 +rect 41327 95284 42193 95291 rect 19024 94481 38186 94499 rect 19024 92770 19050 94481 rect 19352 94456 38186 94481 @@ -4126,10 +2577,12 @@ rect 19352 92802 37362 94456 rect 38160 92802 38186 94456 rect 19352 92770 38186 92802 rect 19024 92753 38186 92770 +rect 41693 82940 42193 82941 rect 39566 78151 42193 82940 -rect 39566 68100 42193 72900 -rect 78942 39820 83722 42193 -rect 88921 39820 93701 42194 +rect 39566 68099 42193 72899 +rect 78943 39820 83723 42193 +rect 88921 39820 93701 42193 +rect 241421 41693 246051 42193 rect 145825 40874 145891 40877 rect 145825 40872 148252 40874 rect 145825 40816 145830 40872 @@ -4217,8 +2670,8 @@ rect 204337 39872 204718 39895 rect 204337 39728 204371 39872 rect 204675 39728 204718 39872 rect 204337 38114 204718 39728 -rect 241420 39564 246049 42193 -rect 251300 39564 256100 42193 +rect 241421 39564 246050 41693 +rect 251301 39564 256101 42193 rect 311308 40873 311378 40878 rect 315488 40874 315558 40881 rect 315488 40873 315495 40874 @@ -4347,9 +2800,9 @@ rect 532501 31573 532951 39729 rect 533137 39872 533518 39895 rect 533137 39728 533171 39872 rect 533475 39728 533518 39872 -rect 569142 39844 573922 42193 +rect 569143 39844 573923 42193 rect 579121 39844 583901 42193 -rect 622942 39906 627722 42193 +rect 622943 39906 627723 42193 rect 632921 39906 637701 42193 rect 533137 38114 533518 39728 rect 533137 37410 533175 38114 @@ -4535,8 +2988,8 @@ rect 39705 520504 39849 520808 rect 37386 519918 38090 520222 rect 39704 519912 39848 520216 rect 676907 469901 677705 474699 -rect 675787 464949 676585 469599 -rect 676907 459861 677705 464649 +rect 675787 464960 676585 469599 +rect 676907 459861 677705 464660 rect 39919 450953 40717 455739 rect 41039 446001 41837 450651 rect 39919 440901 40717 445699 @@ -5147,12 +3600,12 @@ rect 676906 469901 676907 474699 rect 677705 469901 677706 474699 rect 676906 469900 677706 469901 rect 675786 469599 676586 469600 -rect 675786 464949 675787 469599 -rect 676585 464949 676586 469599 -rect 675786 464948 676586 464949 -rect 676906 464649 677706 464650 -rect 676906 459861 676907 464649 -rect 677705 459861 677706 464649 +rect 675786 464960 675787 469599 +rect 676585 464960 676586 469599 +rect 675786 464959 676586 464960 +rect 676906 464660 677706 464661 +rect 676906 459861 676907 464660 +rect 677705 459861 677706 464660 rect 676906 459860 677706 459861 rect 680587 459800 681277 459993 rect 688881 459800 688947 474800 @@ -5658,8 +4111,8 @@ rect 41063 912101 41813 916899 rect 676931 912749 677681 917409 rect 675811 907661 676561 912449 rect 676931 469901 677681 474699 -rect 675811 464949 676561 469599 -rect 676931 459861 677681 464649 +rect 675811 464960 676561 469599 +rect 676931 459861 677681 464660 rect 39943 450953 40693 455739 rect 41063 446001 41813 450651 rect 39943 440901 40693 445699 @@ -5729,9 +4182,9 @@ rect 675786 912449 676586 917701 rect 675786 907661 675811 912449 rect 676561 907661 676586 912449 rect 675786 469599 676586 907661 -rect 675786 464949 675811 469599 -rect 676561 464949 676586 469599 -rect 675786 459306 676586 464949 +rect 675786 464960 675811 469599 +rect 676561 464960 676586 469599 +rect 675786 459306 676586 464960 rect 676906 917409 677706 922776 rect 676906 912749 676931 917409 rect 677681 912749 677706 917409 @@ -5748,9 +4201,9 @@ rect 698512 549040 711002 561560 rect 698624 505222 710788 517390 rect 676906 469901 676931 474699 rect 677681 469901 677706 474699 -rect 676906 464649 677706 469901 -rect 676906 459861 676931 464649 -rect 677681 459861 677706 464649 +rect 676906 464660 677706 469901 +rect 676906 459861 676931 464660 +rect 677681 459861 677706 464660 rect 697980 461866 711432 472746 rect 676906 459306 677706 459861 rect 41038 446001 41063 450651 @@ -5835,392 +4288,392 @@ rect 42097 995463 675503 995503 rect 42097 42137 42137 995463 rect 675463 42137 675503 995463 rect 42097 42097 675503 42137 -use sky130_ef_io__gpiov2_pad_wrapped area0_gpio_pad[0] $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 -transform -1 0 202400 0 -1 42193 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area0_gpio_pad[1] -timestamp 1683647856 -transform -1 0 311000 0 -1 42193 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area0_gpio_pad[2] -timestamp 1683647856 -transform -1 0 365800 0 -1 42193 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area0_gpio_pad[3] -timestamp 1683647856 -transform -1 0 420600 0 -1 42193 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area0_gpio_pad[4] -timestamp 1683647856 -transform -1 0 475400 0 -1 42193 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area0_gpio_pad[5] -timestamp 1683647856 -transform -1 0 530200 0 -1 42193 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[0] -timestamp 1683647856 -transform 1 0 282000 0 1 995407 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[1] -timestamp 1683647856 -transform 1 0 230400 0 1 995407 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[2] -timestamp 1683647856 -transform 1 0 179000 0 1 995407 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[3] -timestamp 1683647856 -transform 1 0 127600 0 1 995407 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[4] -timestamp 1683647856 -transform 1 0 76200 0 1 995407 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[5] -timestamp 1683647856 -transform 0 -1 42193 1 0 954200 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[6] -timestamp 1683647856 -transform 0 -1 42193 1 0 784400 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[7] -timestamp 1683647856 -transform 0 -1 42193 1 0 741200 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[8] -timestamp 1683647856 -transform 0 -1 42193 1 0 698000 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[9] -timestamp 1683647856 -transform 0 1 675407 -1 0 654000 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[10] -timestamp 1683647856 -transform 0 1 675407 -1 0 699200 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[11] -timestamp 1683647856 -transform 0 1 675407 -1 0 744200 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[12] -timestamp 1683647856 -transform 0 1 675407 -1 0 789200 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[13] -timestamp 1683647856 -transform 0 1 675407 -1 0 878400 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[14] -timestamp 1683647856 -transform 0 1 675407 -1 0 967600 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[15] -timestamp 1683647856 -transform 1 0 626000 0 1 995407 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[16] -timestamp 1683647856 -transform 1 0 524200 0 1 995407 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[17] -timestamp 1683647856 -transform 1 0 472800 0 1 995407 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad[18] -timestamp 1683647856 -transform 1 0 383800 0 1 995407 -box -143 0 16134 42193 +use sky130_ef_io__gpiov2_pad area0_gpio_pad[0] $PDKPATH/libs.ref/sky130_fd_io/mag +timestamp 1692890899 +transform -1 0 202400 0 -1 39593 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area0_gpio_pad[1] +timestamp 1692890899 +transform -1 0 311000 0 -1 39593 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area0_gpio_pad[2] +timestamp 1692890899 +transform -1 0 365800 0 -1 39593 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area0_gpio_pad[3] +timestamp 1692890899 +transform -1 0 420600 0 -1 39593 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area0_gpio_pad[4] +timestamp 1692890899 +transform -1 0 475400 0 -1 39593 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area0_gpio_pad[5] +timestamp 1692890899 +transform -1 0 530200 0 -1 39593 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[0] +timestamp 1692890899 +transform 1 0 282000 0 1 998007 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[1] +timestamp 1692890899 +transform 1 0 230400 0 1 998007 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[2] +timestamp 1692890899 +transform 1 0 179000 0 1 998007 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[3] +timestamp 1692890899 +transform 1 0 127600 0 1 998007 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[4] +timestamp 1692890899 +transform 1 0 76200 0 1 998007 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[5] +timestamp 1692890899 +transform 0 -1 39593 1 0 954200 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[6] +timestamp 1692890899 +transform 0 -1 39593 1 0 784400 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[7] +timestamp 1692890899 +transform 0 -1 39593 1 0 741200 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[8] +timestamp 1692890899 +transform 0 -1 39593 1 0 698000 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[9] +timestamp 1692890899 +transform 0 1 678007 -1 0 654000 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[10] +timestamp 1692890899 +transform 0 1 678007 -1 0 699200 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[11] +timestamp 1692890899 +transform 0 1 678007 -1 0 744200 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[12] +timestamp 1692890899 +transform 0 1 678007 -1 0 789200 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[13] +timestamp 1692890899 +transform 0 1 678007 -1 0 878400 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[14] +timestamp 1692890899 +transform 0 1 678007 -1 0 967600 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[15] +timestamp 1692890899 +transform 1 0 626000 0 1 998007 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[16] +timestamp 1692890899 +transform 1 0 524200 0 1 998007 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[17] +timestamp 1692890899 +transform 1 0 472800 0 1 998007 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad area1_gpio_pad[18] +timestamp 1692890899 +transform 1 0 383800 0 1 998007 +box -143 -407 16134 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_1 $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform -1 0 51400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_2 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 55400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_3 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 59400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_4 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 63400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_5 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 67400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_6 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 71400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_7 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 105200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_8 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 109200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_9 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 113200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_10 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 117200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_11 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 121200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_12 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 125200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_13 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 159000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_14 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 163000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_15 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 167000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_16 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 171000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_17 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 175000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_18 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 179000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_19 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 213800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_20 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 217800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_21 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 221800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_22 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 225800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_23 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 229800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_24 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 233800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_25 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 267600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_26 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 271600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_27 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 275600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_28 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 279600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_29 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 283600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_30 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 287600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_31 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 322400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_32 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 326400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_33 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 330400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_34 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 334400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_35 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 338400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_36 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 342400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_37 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 377200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_38 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 381200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_39 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 385200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_40 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 389200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_41 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 393200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_42 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 397200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_43 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 432000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_44 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 436000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_45 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 440000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_46 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 444000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_47 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 448000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_48 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 452000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_49 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 486800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_50 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 490800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_51 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 494800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_52 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 498800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_53 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 502800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_54 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 506800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_55 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 541600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_56 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 545600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_57 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 549600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_58 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 553600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_59 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 557600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_60 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 561600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_61 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 595400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_62 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 599400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_63 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 603400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_64 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 607400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_65 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 611400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_66 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 615400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_67 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 649200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_68 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 653200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_69 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 657200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_70 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 661200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_71 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 665200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um bus_tie_72 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 669200 0 -1 39593 box 0 0 4000 39593 use caravel_logo caravel_logo_0 @@ -6232,181 +4685,181 @@ timestamp 1637698310 transform 1 0 -108943 0 1 -4710 box 373080 14838 395618 19242 use chip_io_gpio_connects chip_io_gpio_connects_0 -timestamp 1686151263 +timestamp 1695666643 transform 0 -1 742000 1 0 320000 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_1 -timestamp 1686151263 +timestamp 1695666643 transform 0 -1 640200 1 0 320000 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_2 -timestamp 1686151263 +timestamp 1695666643 transform 0 -1 588800 1 0 320000 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_3 -timestamp 1686151263 +timestamp 1695666643 transform 0 -1 499800 1 0 320000 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_4 -timestamp 1686151263 +timestamp 1695666643 transform 0 -1 398000 1 0 320000 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_5 -timestamp 1686151263 +timestamp 1695666643 transform 0 -1 346400 1 0 320000 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_6 -timestamp 1686151263 +timestamp 1695666643 transform 0 -1 295000 1 0 320000 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_7 -timestamp 1686151263 +timestamp 1695666643 transform 0 -1 243600 1 0 320000 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_8 -timestamp 1686151263 +timestamp 1695666643 transform 0 -1 192200 1 0 320000 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_35 -timestamp 1686151263 +timestamp 1695666643 transform 0 1 86400 -1 0 717600 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_39 -timestamp 1686151263 +timestamp 1695666643 transform 0 1 195000 -1 0 717600 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_40 -timestamp 1686151263 +timestamp 1695666643 transform 0 1 249800 -1 0 717600 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_41 -timestamp 1686151263 +timestamp 1695666643 transform 0 1 304600 -1 0 717600 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_42 -timestamp 1686151263 +timestamp 1695666643 transform 0 1 359400 -1 0 717600 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_43 -timestamp 1686151263 +timestamp 1695666643 transform 0 1 414200 -1 0 717600 -box 675407 99896 676763 117658 +box 675407 99896 677652 117658 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_0 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 0 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_1 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 45200 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_2 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 90200 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_3 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 135400 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_4 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 180400 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_5 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 225400 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_6 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 270600 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_7 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 447800 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_8 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 493000 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_9 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 538000 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_10 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 583200 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_11 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 628200 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_12 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 673200 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_13 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 762400 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_14 -timestamp 1686190293 +timestamp 1695675344 transform 1 0 0 0 1 851600 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_15 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 1070200 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_16 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 900400 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_17 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 857200 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_18 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 814000 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_19 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 770800 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_20 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 727600 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_21 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 684400 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_22 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 641200 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_23 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 513600 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_24 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 470400 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_25 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 427200 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_26 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 384000 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_27 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 340800 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_28 -timestamp 1686190293 +timestamp 1695675344 transform -1 0 717600 0 -1 297600 -box 675406 99896 676777 117452 +box 675407 99896 677658 117452 use constant_block constant_value_inst[0] timestamp 1665254080 transform 0 -1 678029 -1 0 120205 @@ -6592,2727 +5045,2727 @@ timestamp 1680028979 transform 1 0 95817 0 1 16746 box -262 -10348 35048 2764 use sky130_ef_io__disconnect_vdda_slice_5um disconnect_vdda_0 $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform 1 0 348400 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__disconnect_vdda_slice_5um disconnect_vdda_1 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 70000 box 0 0 1000 39593 use sky130_ef_io__disconnect_vdda_slice_5um disconnect_vdda_2 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 152400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_5 $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform 1 0 40800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_6 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 44800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_7 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 48800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_8 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 52800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_9 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 56800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_10 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 60800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_11 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 64800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_12 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 68800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_13 $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform 1 0 72800 0 1 998007 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_14 $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform 1 0 74800 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_15 $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform 1 0 75800 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_16 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 76000 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_18 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 92200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_19 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 96200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_20 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 100200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_21 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 104200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_22 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 108200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_23 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 112200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_24 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 116200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_25 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 120200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_26 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 124200 0 1 998007 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_27 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 126200 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_28 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 127200 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_29 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 127400 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_31 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 143600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_32 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 147600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_33 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 151600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_34 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 155600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_35 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 159600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_36 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 163600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_37 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 167600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_38 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 171600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_39 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 175600 0 1 998007 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_40 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 177600 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_41 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 178600 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_42 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 178800 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_44 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 195000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_45 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 199000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_46 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 203000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_47 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 207000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_48 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 211000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_49 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 215000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_50 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 219000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_51 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 223000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_52 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 227000 0 1 998007 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_53 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 229000 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_54 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 230000 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_55 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 230200 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_57 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 246400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_58 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 250400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_59 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 254400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_60 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 258400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_61 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 262400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_62 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 266400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_63 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 270400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_64 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 274400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_65 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 278400 0 1 998007 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_66 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 280400 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_67 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 281400 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_68 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 281600 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_69 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 281800 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_71 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 298000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_72 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 302000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_73 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 306000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_74 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 310000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_75 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 314000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_76 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 318000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_77 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 322000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_78 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 326000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_79 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 330000 0 1 998007 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_80 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 332000 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_81 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 333000 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_82 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 333200 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_86 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 350400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_87 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 354400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_88 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 358400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_89 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 362400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_90 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 366400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_91 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 370400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_92 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 374400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_93 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 378400 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_94 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 382400 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_95 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 383400 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_96 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 383600 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_98 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 399800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_99 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 403800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_100 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 407800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_101 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 411800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_102 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 415800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_103 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 419800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_104 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 423800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_105 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 427800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_106 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 431800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_107 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 435800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_108 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 439800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_109 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 443800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_110 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 447800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_111 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 451800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_112 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 455800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_113 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 459800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_114 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 463800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_115 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 467800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_116 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 471800 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_118 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 488800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_119 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 492800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_120 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 496800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_121 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 500800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_122 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 504800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_123 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 508800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_124 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 512800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_125 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 516800 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_126 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 520800 0 1 998007 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_127 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 522800 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_128 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 523800 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_129 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 524000 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_131 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 540200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_132 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 544200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_133 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 548200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_134 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 552200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_135 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 556200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_136 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 560200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_137 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 564200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_138 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 568200 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_139 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 572200 0 1 998007 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_140 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 574200 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_141 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 575200 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_142 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 575400 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_144 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 590600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_145 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 594600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_146 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 598600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_147 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 602600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_148 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 606600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_149 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 610600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_150 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 614600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_151 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 618600 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_152 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 622600 0 1 998007 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_153 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 624600 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_154 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 625600 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_155 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 625800 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_157 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 642000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_158 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 646000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_159 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 650000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_160 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 654000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_161 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 658000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_162 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 662000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_163 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 666000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_164 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 670000 0 1 998007 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_165 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 674000 0 1 998007 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_166 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 676000 0 1 998007 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_167 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 677000 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_168 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 677200 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_169 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 677400 0 1 998007 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_170 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 44000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_171 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 46000 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_172 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 47000 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_173 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 47200 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_174 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 47400 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_181 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 75400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_182 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 77400 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_183 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 78400 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_184 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 78600 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_185 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 78800 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_187 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 97800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_188 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 99800 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_189 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 100800 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_190 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 101000 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_191 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 101200 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_198 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 129200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_199 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 131200 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_200 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 132200 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_201 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 132400 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_202 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 132600 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_204 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 151600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_205 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 153600 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_206 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 154600 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_207 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 154800 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_208 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 155000 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_215 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 183000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_216 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 185000 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_217 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 186000 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_218 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 186200 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_219 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 186400 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_221 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 206400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_222 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 208400 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_223 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 209400 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_224 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 209600 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_225 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 209800 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_232 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 237800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_233 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 239800 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_234 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 240800 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_235 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 241000 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_236 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 241200 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_238 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 260200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_239 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 262200 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_240 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 263200 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_241 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 263400 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_242 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 263600 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_249 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 291600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_250 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 293600 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_251 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 294600 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_252 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 294800 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_253 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 295000 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_255 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 315000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_256 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 317000 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_257 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 318000 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_258 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 318200 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_259 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 318400 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_266 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 346400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_267 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 348400 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_268 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 349400 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_269 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 349600 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_270 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 349800 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_272 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 369800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_273 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 371800 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_274 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 372800 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_275 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 373000 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_276 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 373200 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_283 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 401200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_284 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 403200 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_285 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 404200 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_286 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 404400 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_287 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 404600 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_289 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 424600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_290 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 426600 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_291 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 427600 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_292 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 427800 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_293 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 428000 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_300 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 456000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_301 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 458000 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_302 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 459000 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_303 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 459200 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_304 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 459400 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_306 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 479400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_307 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 481400 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_308 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 482400 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_309 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 482600 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_310 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 482800 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_317 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 510800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_318 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 512800 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_319 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 513800 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_320 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 514000 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_321 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 514200 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_323 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 534200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_324 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 536200 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_325 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 537200 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_326 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 537400 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_327 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 537600 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_334 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 565600 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_335 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 567600 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_336 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 568600 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_337 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 568800 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_338 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 569000 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_340 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 588000 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_341 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 590000 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_342 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 591000 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_343 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 591200 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_344 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 591400 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_351 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 619400 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_352 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 621400 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_353 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 622400 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_354 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 622600 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_355 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 622800 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_357 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 641800 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_358 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 643800 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_359 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 644800 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_360 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 645000 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_361 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 645200 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_368 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 673200 0 -1 39593 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_369 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 675200 0 -1 39593 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_370 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 676200 0 -1 39593 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_371 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 676400 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_372 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 676600 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_373 -timestamp 1683647856 +timestamp 1692890899 transform -1 0 676800 0 -1 39593 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_374 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 40800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_375 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 44800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_376 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 48800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_377 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 52800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_378 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 56800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_379 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 60800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_380 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 64800 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_381 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 66800 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_382 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 67800 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_384 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 83000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_385 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 87000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_386 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 91000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_387 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 95000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_388 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 99000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_389 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 103000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_390 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 107000 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_391 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 109000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_392 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 110000 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_394 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 125200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_395 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 129200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_396 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 133200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_397 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 137200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_398 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 141200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_399 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 145200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_400 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 149200 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_401 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 151200 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_402 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 152200 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_405 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 154400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_406 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 158400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_407 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 162400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_408 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 166400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_409 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 170400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_410 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 174400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_411 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 178400 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_412 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 180400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_413 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 181400 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_415 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 197600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_416 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 201600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_417 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 205600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_418 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 209600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_419 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 213600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_420 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 217600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_421 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 221600 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_422 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 223600 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_423 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 224600 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_425 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 240800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_426 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 244800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_427 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 248800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_428 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 252800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_429 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 256800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_430 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 260800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_431 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 264800 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_432 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 266800 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_433 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 267800 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_435 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 284000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_436 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 288000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_437 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 292000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_438 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 296000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_439 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 300000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_440 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 304000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_441 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 308000 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_442 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 310000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_443 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 311000 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_445 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 327200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_446 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 331200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_447 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 335200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_448 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 339200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_449 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 343200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_450 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 347200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_451 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 351200 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_452 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 353200 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_453 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 354200 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_455 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 370400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_456 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 374400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_457 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 378400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_458 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 382400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_459 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 386400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_460 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 390400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_461 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 394400 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_462 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 396400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_463 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 397400 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_465 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 413600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_466 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 417600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_467 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 421600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_468 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 425600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_469 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 429600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_470 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 433600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_471 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 437600 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_472 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 439600 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_473 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 440600 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_475 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 455800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_476 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 459800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_477 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 463800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_478 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 467800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_479 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 471800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_480 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 475800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_481 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 479800 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_482 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 481800 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_483 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 482800 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_485 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 498000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_486 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 502000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_487 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 506000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_488 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 510000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_489 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 514000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_490 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 518000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_491 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 522000 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_492 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 524000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_493 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 525000 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_495 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 541200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_496 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 545200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_497 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 549200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_498 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 553200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_499 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 557200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_500 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 561200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_501 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 565200 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_502 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 567200 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_503 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 568200 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_505 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 584400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_506 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 588400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_507 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 592400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_508 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 596400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_509 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 600400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_510 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 604400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_511 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 608400 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_512 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 610400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_513 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 611400 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_515 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 627600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_516 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 631600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_517 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 635600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_518 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 639600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_519 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 643600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_520 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 647600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_521 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 651600 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_522 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 653600 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_523 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 654600 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_525 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 670800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_526 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 674800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_527 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 678800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_528 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 682800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_529 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 686800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_530 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 690800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_531 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 694800 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_532 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 696800 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_533 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 697800 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_535 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 714000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_536 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 718000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_537 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 722000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_538 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 726000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_539 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 730000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_540 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 734000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_541 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 738000 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_542 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 740000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_543 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 741000 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_545 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 757200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_546 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 761200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_547 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 765200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_548 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 769200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_549 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 773200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_550 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 777200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_551 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 781200 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_552 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 783200 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_553 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 784200 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_555 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 800400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_556 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 804400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_557 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 808400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_558 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 812400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_559 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 816400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_560 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 820400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_561 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 824400 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_562 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 826400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_563 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 827400 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_565 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 842600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_566 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 846600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_567 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 850600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_568 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 854600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_569 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 858600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_570 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 862600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_571 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 866600 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_572 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 868600 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_573 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 869600 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_575 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 884800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_576 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 888800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_577 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 892800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_578 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 896800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_579 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 900800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_580 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 904800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_581 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 908800 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_582 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 910800 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_583 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 911800 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_585 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 927000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_586 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 931000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_587 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 935000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_588 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 939000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_589 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 943000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_590 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 947000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_591 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 951000 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_592 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 953000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_593 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 954000 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_595 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 970200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_596 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 974200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_597 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 978200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_598 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 982200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_599 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 986200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_600 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 990200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_10um FILLER_601 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 994200 box 0 0 2000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_602 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 996200 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_603 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 997200 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_1um FILLER_604 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 997400 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_605 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 44000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_606 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 48000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_607 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 52000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_608 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 56000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_609 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 60000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_610 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 64000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_611 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 68000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_612 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 69000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_615 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 75000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_616 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 79000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_617 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 83000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_618 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 87000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_619 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 91000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_620 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 95000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_621 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 99000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_622 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 100000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_624 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 120000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_625 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 124000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_626 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 128000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_627 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 132000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_628 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 136000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_629 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 140000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_630 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 144000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_631 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 145000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_632 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 145200 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_634 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 165200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_635 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 169200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_636 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 173200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_637 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 177200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_638 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 181200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_639 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 185200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_640 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 189200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_641 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 190200 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_643 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 210200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_644 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 214200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_645 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 218200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_646 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 222200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_647 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 226200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_648 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 230200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_649 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 234200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_650 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 235200 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_651 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 235400 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_653 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 255400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_654 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 259400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_655 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 263400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_656 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 267400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_657 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 271400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_658 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 275400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_659 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 279400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_660 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 280400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_662 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 300400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_663 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 304400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_664 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 308400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_665 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 312400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_666 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 316400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_667 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 320400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_668 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 324400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_669 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 325400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_671 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 345400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_672 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 349400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_673 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 353400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_674 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 357400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_675 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 361400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_676 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 365400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_677 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 369400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_678 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 370400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_679 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 370600 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_681 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 390600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_682 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 394600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_683 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 398600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_684 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 402600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_685 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 406600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_686 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 410600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_687 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 414600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_688 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 415600 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_690 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 434600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_691 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 438600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_692 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 442600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_693 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 446600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_694 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 450600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_695 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 454600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_696 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 458600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_697 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 459600 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_698 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 459800 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_700 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 478800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_701 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 482800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_702 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 486800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_703 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 490800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_704 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 494800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_705 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 498800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_706 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 502800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_707 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 503800 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_709 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 522800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_710 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 526800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_711 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 530800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_712 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 534800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_713 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 538800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_714 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 542800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_715 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 546800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_716 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 547800 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_718 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 567800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_719 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 571800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_720 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 575800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_721 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 579800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_722 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 583800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_723 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 587800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_724 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 591800 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_725 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 592800 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_726 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 593000 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_728 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 613000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_729 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 617000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_730 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 621000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_731 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 625000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_732 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 629000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_733 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 633000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_734 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 637000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_735 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 638000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_737 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 658000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_738 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 662000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_739 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 666000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_740 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 670000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_741 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 674000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_742 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 678000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_743 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 682000 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_744 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 683000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_745 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 683200 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_747 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 703200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_748 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 707200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_749 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 711200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_750 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 715200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_751 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 719200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_752 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 723200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_753 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 727200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_754 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 728200 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_756 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 748200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_757 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 752200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_758 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 756200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_759 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 760200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_760 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 764200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_761 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 768200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_762 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 772200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_763 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 773200 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_765 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 793200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_766 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 797200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_767 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 801200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_768 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 805200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_769 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 809200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_770 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 813200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_771 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 817200 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_772 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 818200 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_773 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 818400 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_775 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 837400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_776 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 841400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_777 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 845400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_778 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 849400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_779 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 853400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_780 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 857400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_781 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 861400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_782 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 862400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_784 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 882400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_785 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 886400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_786 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 890400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_787 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 894400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_788 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 898400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_789 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 902400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_790 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 906400 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_791 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 907400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_792 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 907600 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_20um FILLER_794 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 926600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_795 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 930600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_796 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 934600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_797 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 938600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_798 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 942600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_799 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 946600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_800 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 950600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_801 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 951600 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_803 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 971600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_804 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 975600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_805 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 979600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_806 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 983600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_807 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 987600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_808 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 991600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_20um FILLER_809 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 995600 box 0 0 4000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_810 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 996600 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_1um FILLER_811 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 996800 box 0 0 200 39593 use sky130_ef_io__com_bus_slice_5um FILLER_SB1 -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 71000 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_SB2 -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 153400 box 0 0 1000 39593 use sky130_ef_io__com_bus_slice_5um FILLER_SB3 -timestamp 1683647856 +timestamp 1692890899 transform 1 0 349400 0 1 998007 box 0 0 1000 39593 use sky130_fd_io__top_xres4v2 master_resetb_pad $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform -1 0 147600 0 -1 40000 box -103 0 15124 40000 use sky130_ef_io__vccd_lvc_clamped_pad mgmt_vccd_lvclamp_pad $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 68000 box 0 -2107 17239 39593 use sky130_ef_io__vdda_hvc_clamped_pad mgmt_vdda_hvclamp_pad $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform -1 0 637800 0 -1 39593 box 0 -407 15000 39593 use sky130_ef_io__vddio_hvc_clamped_pad mgmt_vddio_hvclamp_pad\[0\] $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 110200 box 0 -407 15000 39593 use sky130_ef_io__vddio_hvc_clamped_pad mgmt_vddio_hvclamp_pad\[1\] -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 869800 box 0 -407 15000 39593 use sky130_ef_io__vssa_hvc_clamped_pad mgmt_vssa_hvclamp_pad $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform -1 0 93800 0 -1 39593 box 0 -407 15000 39593 use sky130_ef_io__vssd_lvc_clamped_pad mgmt_vssd_lvclamp_pad $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform -1 0 256200 0 -1 39593 box 0 -2107 17239 39593 use sky130_ef_io__vssio_hvc_clamped_pad mgmt_vssio_hvclamp_pad\[0\] $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform -1 0 584000 0 -1 39593 box 0 -407 15000 39593 use sky130_ef_io__vssio_hvc_clamped_pad mgmt_vssio_hvclamp_pad\[1\] -timestamp 1683647856 +timestamp 1692890899 transform 1 0 333400 0 1 998007 box 0 -407 15000 39593 use open_source open_source_0 @@ -9323,136 +7776,136 @@ use simple_por por timestamp 1680223961 transform 0 1 11078 -1 0 107236 box -52 -62 11344 8684 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_0 -timestamp 1683647856 -transform 0 -1 42193 1 0 181600 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_1 -timestamp 1683647856 -transform 0 -1 42193 1 0 224800 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_2 -timestamp 1683647856 -transform 0 -1 42193 1 0 268000 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_3 -timestamp 1683647856 -transform 0 -1 42193 1 0 311200 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_4 -timestamp 1683647856 -transform 0 -1 42193 1 0 354400 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_5 -timestamp 1683647856 -transform 0 -1 42193 1 0 397600 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_6 -timestamp 1683647856 -transform 0 -1 42193 1 0 525200 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_7 -timestamp 1683647856 -transform 0 -1 42193 1 0 568400 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_8 -timestamp 1683647856 -transform 0 -1 42193 1 0 611600 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_9 -timestamp 1683647856 -transform 0 -1 42193 1 0 654800 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_10 -timestamp 1683647856 -transform 0 1 675407 -1 0 609000 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_11 -timestamp 1683647856 -transform 0 1 675407 -1 0 563800 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_12 -timestamp 1683647856 -transform 0 1 675407 -1 0 386600 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_13 -timestamp 1683647856 -transform 0 1 675407 -1 0 341400 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_14 -timestamp 1683647856 -transform 0 1 675407 -1 0 296400 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_15 -timestamp 1683647856 -transform 0 1 675407 -1 0 251400 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_16 -timestamp 1683647856 -transform 0 1 675407 -1 0 206200 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_17 -timestamp 1683647856 -transform 0 1 675407 -1 0 161200 -box -143 0 16134 42193 -use sky130_ef_io__gpiov2_pad_wrapped sky130_ef_io__gpiov2_pad_wrapped_18 -timestamp 1683647856 -transform 0 1 675407 -1 0 116000 -box -143 0 16134 42193 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_0 +timestamp 1692890899 +transform 0 -1 39593 1 0 181600 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_1 +timestamp 1692890899 +transform 0 -1 39593 1 0 224800 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_2 +timestamp 1692890899 +transform 0 -1 39593 1 0 268000 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_3 +timestamp 1692890899 +transform 0 -1 39593 1 0 311200 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_4 +timestamp 1692890899 +transform 0 -1 39593 1 0 354400 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_5 +timestamp 1692890899 +transform 0 -1 39593 1 0 397600 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_6 +timestamp 1692890899 +transform 0 -1 39593 1 0 525200 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_7 +timestamp 1692890899 +transform 0 -1 39593 1 0 568400 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_8 +timestamp 1692890899 +transform 0 -1 39593 1 0 611600 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_9 +timestamp 1692890899 +transform 0 -1 39593 1 0 654800 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_10 +timestamp 1692890899 +transform 0 1 678007 -1 0 609000 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_11 +timestamp 1692890899 +transform 0 1 678007 -1 0 563800 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_12 +timestamp 1692890899 +transform 0 1 678007 -1 0 386600 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_13 +timestamp 1692890899 +transform 0 1 678007 -1 0 341400 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_14 +timestamp 1692890899 +transform 0 1 678007 -1 0 296400 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_15 +timestamp 1692890899 +transform 0 1 678007 -1 0 251400 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_16 +timestamp 1692890899 +transform 0 1 678007 -1 0 206200 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_17 +timestamp 1692890899 +transform 0 1 678007 -1 0 161200 +box -143 -407 16134 39593 +use sky130_ef_io__gpiov2_pad sky130_ef_io__gpiov2_pad_18 +timestamp 1692890899 +transform 0 1 678007 -1 0 116000 +box -143 -407 16134 39593 use sky130_ef_io__corner_pad user0_corner[0] $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform -1 0 40000 0 -1 40800 box 0 0 40000 40800 use sky130_ef_io__corner_pad user0_corner[1] -timestamp 1683647856 +timestamp 1692890899 transform 0 1 676800 -1 0 40000 box 0 0 40000 40800 use sky130_ef_io__corner_pad user1_corner -timestamp 1683647856 +timestamp 1692890899 transform 1 0 677600 0 1 996800 box 0 0 40000 40800 use sky130_ef_io__vccd_lvc_clamped3_pad user1_vccd_lvclamp_pad $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 922600 box 0 -2177 17187 39593 use sky130_ef_io__vdda_hvc_clamped_pad user1_vdda_hvclamp_pad\[0\] -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 833400 box 0 -407 15000 39593 use sky130_ef_io__vdda_hvc_clamped_pad user1_vdda_hvclamp_pad\[1\] -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 518800 box 0 -407 15000 39593 use sky130_ef_io__vssa_hvc_clamped_pad user1_vssa_hvclamp_pad\[0\] -timestamp 1683647856 +timestamp 1692890899 transform 1 0 575600 0 1 998007 box 0 -407 15000 39593 use sky130_ef_io__vssa_hvc_clamped_pad user1_vssa_hvclamp_pad\[1\] -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 430600 box 0 -407 15000 39593 use sky130_ef_io__vssd_lvc_clamped3_pad user1_vssd_lvclamp_pad $PDKPATH/libs.ref/sky130_fd_io/mag -timestamp 1683647856 +timestamp 1692890899 transform 0 1 678007 -1 0 474800 box 0 -2177 17187 39593 use sky130_ef_io__corner_pad user2_corner -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 40800 1 0 997600 box 0 0 40000 40800 use sky130_ef_io__vccd_lvc_clamped3_pad user2_vccd_lvclamp_pad -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 912000 box 0 -2177 17187 39593 use sky130_ef_io__vdda_hvc_clamped_pad user2_vdda_hvclamp_pad -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 483000 box 0 -407 15000 39593 use sky130_ef_io__vssa_hvc_clamped_pad user2_vssa_hvclamp_pad -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 827600 box 0 -407 15000 39593 use sky130_ef_io__vssd_lvc_clamped3_pad user2_vssd_lvclamp_pad -timestamp 1683647856 +timestamp 1692890899 transform 0 -1 39593 1 0 440800 box 0 -2177 17187 39593 use user_id_textblock user_id_textblock_0 @@ -9468,90 +7921,6 @@ timestamp 1678062433 transform -1 0 152583 0 1 16471 box 0 -400 4000 3800 << labels >> -flabel metal3 s 675407 778996 675887 779066 0 FreeSans 400 0 0 0 gpio_analog_en[12] -port 453 nsew -flabel metal3 s 675407 780284 675887 780354 0 FreeSans 400 0 0 0 gpio_analog_pol[12] -port 541 nsew -flabel metal3 s 675407 783320 675887 783390 0 FreeSans 400 0 0 0 gpio_analog_sel[12] -port 497 nsew -flabel metal3 s 675407 779640 675887 779710 0 FreeSans 400 0 0 0 gpio_dm0[12] -port 585 nsew -flabel metal3 s 675407 777800 675887 777870 0 FreeSans 400 0 0 0 gpio_dm1[12] -port 629 nsew -flabel metal3 s 675407 783964 675887 784034 0 FreeSans 400 0 0 0 gpio_dm2[12] -port 673 nsew -flabel metal3 s 675407 784608 675887 784678 0 FreeSans 400 0 0 0 gpio_holdover[12] -port 409 nsew -flabel metal3 s 675407 787644 675887 787714 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] -port 277 nsew -flabel metal3 s 675407 780836 675887 780906 0 FreeSans 400 0 0 0 gpio_inp_dis[12] -port 233 nsew -flabel metal3 s 675407 788288 675887 788358 0 FreeSans 400 0 0 0 gpio_oeb[12] -port 189 nsew -flabel metal3 s 675407 785160 675887 785230 0 FreeSans 400 0 0 0 gpio_out[12] -port 145 nsew -flabel metal3 s 675407 775960 675887 776030 0 FreeSans 400 0 0 0 gpio_slow_sel[12] -port 365 nsew -flabel metal3 s 675407 787000 675887 787070 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] -port 321 nsew -flabel metal3 s 675407 774120 675887 774190 0 FreeSans 400 0 0 0 gpio_in[12] -port 717 nsew -flabel metal3 s 675407 868196 675887 868266 0 FreeSans 400 0 0 0 gpio_analog_en[13] -port 452 nsew -flabel metal3 s 675407 869484 675887 869554 0 FreeSans 400 0 0 0 gpio_analog_pol[13] -port 540 nsew -flabel metal3 s 675407 872520 675887 872590 0 FreeSans 400 0 0 0 gpio_analog_sel[13] -port 496 nsew -flabel metal3 s 675407 868840 675887 868910 0 FreeSans 400 0 0 0 gpio_dm0[13] -port 584 nsew -flabel metal3 s 675407 867000 675887 867070 0 FreeSans 400 0 0 0 gpio_dm1[13] -port 628 nsew -flabel metal3 s 675407 873164 675887 873234 0 FreeSans 400 0 0 0 gpio_dm2[13] -port 672 nsew -flabel metal3 s 675407 873808 675887 873878 0 FreeSans 400 0 0 0 gpio_holdover[13] -port 408 nsew -flabel metal3 s 675407 876844 675887 876914 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] -port 276 nsew -flabel metal3 s 675407 870036 675887 870106 0 FreeSans 400 0 0 0 gpio_inp_dis[13] -port 232 nsew -flabel metal3 s 675407 877488 675887 877558 0 FreeSans 400 0 0 0 gpio_oeb[13] -port 188 nsew -flabel metal3 s 675407 874360 675887 874430 0 FreeSans 400 0 0 0 gpio_out[13] -port 144 nsew -flabel metal3 s 675407 865160 675887 865230 0 FreeSans 400 0 0 0 gpio_slow_sel[13] -port 364 nsew -flabel metal3 s 675407 876200 675887 876270 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] -port 320 nsew -flabel metal3 s 675407 863320 675887 863390 0 FreeSans 400 0 0 0 gpio_in[13] -port 716 nsew -flabel metal3 s 675407 957396 675887 957466 0 FreeSans 400 0 0 0 gpio_analog_en[14] -port 451 nsew -flabel metal3 s 675407 958684 675887 958754 0 FreeSans 400 0 0 0 gpio_analog_pol[14] -port 539 nsew -flabel metal3 s 675407 961720 675887 961790 0 FreeSans 400 0 0 0 gpio_analog_sel[14] -port 495 nsew -flabel metal3 s 675407 958040 675887 958110 0 FreeSans 400 0 0 0 gpio_dm0[14] -port 583 nsew -flabel metal3 s 675407 956200 675887 956270 0 FreeSans 400 0 0 0 gpio_dm1[14] -port 627 nsew -flabel metal3 s 675407 962364 675887 962434 0 FreeSans 400 0 0 0 gpio_dm2[14] -port 671 nsew -flabel metal3 s 675407 963008 675887 963078 0 FreeSans 400 0 0 0 gpio_holdover[14] -port 407 nsew -flabel metal3 s 675407 966044 675887 966114 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] -port 275 nsew -flabel metal3 s 675407 959236 675887 959306 0 FreeSans 400 0 0 0 gpio_inp_dis[14] -port 231 nsew -flabel metal3 s 675407 966688 675887 966758 0 FreeSans 400 0 0 0 gpio_oeb[14] -port 187 nsew -flabel metal3 s 675407 963560 675887 963630 0 FreeSans 400 0 0 0 gpio_out[14] -port 143 nsew -flabel metal3 s 675407 954360 675887 954430 0 FreeSans 400 0 0 0 gpio_slow_sel[14] -port 363 nsew -flabel metal3 s 675407 965400 675887 965470 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] -port 319 nsew -flabel metal3 s 675407 952520 675887 952590 0 FreeSans 400 0 0 0 gpio_in[14] -port 715 nsew flabel metal2 s 636141 995407 636197 995887 0 FreeSans 400 90 0 0 gpio_analog_en[15] port 450 nsew flabel metal2 s 634853 995407 634909 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[15] @@ -9664,146 +8033,6 @@ flabel metal2 s 478617 995407 478673 995887 0 FreeSans 400 90 0 0 gpio_analog_se port 492 nsew flabel metal2 s 482297 995407 482353 995887 0 FreeSans 400 90 0 0 gpio_dm0[17] port 580 nsew -flabel metal3 s 675407 739608 675887 739678 0 FreeSans 400 0 0 0 gpio_holdover[11] -port 410 nsew -flabel metal3 s 675407 742644 675887 742714 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] -port 278 nsew -flabel metal3 s 675407 735836 675887 735906 0 FreeSans 400 0 0 0 gpio_inp_dis[11] -port 234 nsew -flabel metal3 s 675407 743288 675887 743358 0 FreeSans 400 0 0 0 gpio_oeb[11] -port 190 nsew -flabel metal3 s 675407 740160 675887 740230 0 FreeSans 400 0 0 0 gpio_out[11] -port 146 nsew -flabel metal3 s 675407 730960 675887 731030 0 FreeSans 400 0 0 0 gpio_slow_sel[11] -port 366 nsew -flabel metal3 s 675407 742000 675887 742070 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] -port 322 nsew -flabel metal3 s 675407 729120 675887 729190 0 FreeSans 400 0 0 0 gpio_in[11] -port 718 nsew -flabel metal3 s 675407 688996 675887 689066 0 FreeSans 400 0 0 0 gpio_analog_en[10] -port 455 nsew -flabel metal3 s 675407 690284 675887 690354 0 FreeSans 400 0 0 0 gpio_analog_pol[10] -port 543 nsew -flabel metal3 s 675407 693320 675887 693390 0 FreeSans 400 0 0 0 gpio_analog_sel[10] -port 499 nsew -flabel metal3 s 675407 689640 675887 689710 0 FreeSans 400 0 0 0 gpio_dm0[10] -port 587 nsew -flabel metal3 s 675407 687800 675887 687870 0 FreeSans 400 0 0 0 gpio_dm1[10] -port 631 nsew -flabel metal3 s 675407 693964 675887 694034 0 FreeSans 400 0 0 0 gpio_dm2[10] -port 675 nsew -flabel metal3 s 675407 694608 675887 694678 0 FreeSans 400 0 0 0 gpio_holdover[10] -port 411 nsew -flabel metal3 s 675407 697644 675887 697714 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] -port 279 nsew -flabel metal3 s 675407 690836 675887 690906 0 FreeSans 400 0 0 0 gpio_inp_dis[10] -port 235 nsew -flabel metal3 s 675407 698288 675887 698358 0 FreeSans 400 0 0 0 gpio_oeb[10] -port 191 nsew -flabel metal3 s 675407 695160 675887 695230 0 FreeSans 400 0 0 0 gpio_out[10] -port 147 nsew -flabel metal3 s 675407 685960 675887 686030 0 FreeSans 400 0 0 0 gpio_slow_sel[10] -port 367 nsew -flabel metal3 s 675407 697000 675887 697070 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] -port 323 nsew -flabel metal3 s 675407 684120 675887 684190 0 FreeSans 400 0 0 0 gpio_in[10] -port 719 nsew -flabel metal3 s 675407 553596 675887 553666 0 FreeSans 400 0 0 0 gpio_analog_en[7] -port 458 nsew -flabel metal3 s 675407 554884 675887 554954 0 FreeSans 400 0 0 0 gpio_analog_pol[7] -port 546 nsew -flabel metal3 s 675407 557920 675887 557990 0 FreeSans 400 0 0 0 gpio_analog_sel[7] -port 502 nsew -flabel metal3 s 675407 554240 675887 554310 0 FreeSans 400 0 0 0 gpio_dm0[7] -port 590 nsew -flabel metal3 s 675407 552400 675887 552470 0 FreeSans 400 0 0 0 gpio_dm1[7] -port 634 nsew -flabel metal3 s 675407 558564 675887 558634 0 FreeSans 400 0 0 0 gpio_dm2[7] -port 678 nsew -flabel metal3 s 675407 559208 675887 559278 0 FreeSans 400 0 0 0 gpio_holdover[7] -port 414 nsew -flabel metal3 s 675407 562244 675887 562314 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] -port 282 nsew -flabel metal3 s 675407 555436 675887 555506 0 FreeSans 400 0 0 0 gpio_inp_dis[7] -port 238 nsew -flabel metal3 s 675407 562888 675887 562958 0 FreeSans 400 0 0 0 gpio_oeb[7] -port 194 nsew -flabel metal3 s 675407 559760 675887 559830 0 FreeSans 400 0 0 0 gpio_out[7] -port 150 nsew -flabel metal3 s 675407 550560 675887 550630 0 FreeSans 400 0 0 0 gpio_slow_sel[7] -port 370 nsew -flabel metal3 s 675407 561600 675887 561670 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] -port 326 nsew -flabel metal3 s 675407 548720 675887 548790 0 FreeSans 400 0 0 0 gpio_in[7] -port 722 nsew -flabel metal3 s 675407 598796 675887 598866 0 FreeSans 400 0 0 0 gpio_analog_en[8] -port 457 nsew -flabel metal3 s 675407 600084 675887 600154 0 FreeSans 400 0 0 0 gpio_analog_pol[8] -port 545 nsew -flabel metal3 s 675407 603120 675887 603190 0 FreeSans 400 0 0 0 gpio_analog_sel[8] -port 501 nsew -flabel metal3 s 675407 599440 675887 599510 0 FreeSans 400 0 0 0 gpio_dm0[8] -port 589 nsew -flabel metal3 s 675407 597600 675887 597670 0 FreeSans 400 0 0 0 gpio_dm1[8] -port 633 nsew -flabel metal3 s 675407 603764 675887 603834 0 FreeSans 400 0 0 0 gpio_dm2[8] -port 677 nsew -flabel metal3 s 675407 604408 675887 604478 0 FreeSans 400 0 0 0 gpio_holdover[8] -port 413 nsew -flabel metal3 s 675407 607444 675887 607514 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] -port 281 nsew -flabel metal3 s 675407 600636 675887 600706 0 FreeSans 400 0 0 0 gpio_inp_dis[8] -port 237 nsew -flabel metal3 s 675407 608088 675887 608158 0 FreeSans 400 0 0 0 gpio_oeb[8] -port 193 nsew -flabel metal3 s 675407 604960 675887 605030 0 FreeSans 400 0 0 0 gpio_out[8] -port 149 nsew -flabel metal3 s 675407 595760 675887 595830 0 FreeSans 400 0 0 0 gpio_slow_sel[8] -port 369 nsew -flabel metal3 s 675407 606800 675887 606870 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] -port 325 nsew -flabel metal3 s 675407 593920 675887 593990 0 FreeSans 400 0 0 0 gpio_in[8] -port 721 nsew -flabel metal3 s 675407 643796 675887 643866 0 FreeSans 400 0 0 0 gpio_analog_en[9] -port 456 nsew -flabel metal3 s 675407 645084 675887 645154 0 FreeSans 400 0 0 0 gpio_analog_pol[9] -port 544 nsew -flabel metal3 s 675407 648120 675887 648190 0 FreeSans 400 0 0 0 gpio_analog_sel[9] -port 500 nsew -flabel metal3 s 675407 644440 675887 644510 0 FreeSans 400 0 0 0 gpio_dm0[9] -port 588 nsew -flabel metal3 s 675407 642600 675887 642670 0 FreeSans 400 0 0 0 gpio_dm1[9] -port 632 nsew -flabel metal3 s 675407 648764 675887 648834 0 FreeSans 400 0 0 0 gpio_dm2[9] -port 676 nsew -flabel metal3 s 675407 649408 675887 649478 0 FreeSans 400 0 0 0 gpio_holdover[9] -port 412 nsew -flabel metal3 s 675407 652444 675887 652514 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] -port 280 nsew -flabel metal3 s 675407 645636 675887 645706 0 FreeSans 400 0 0 0 gpio_inp_dis[9] -port 236 nsew -flabel metal3 s 675407 653088 675887 653158 0 FreeSans 400 0 0 0 gpio_oeb[9] -port 192 nsew -flabel metal3 s 675407 649960 675887 650030 0 FreeSans 400 0 0 0 gpio_out[9] -port 148 nsew -flabel metal3 s 675407 640760 675887 640830 0 FreeSans 400 0 0 0 gpio_slow_sel[9] -port 368 nsew -flabel metal3 s 675407 651800 675887 651870 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] -port 324 nsew -flabel metal3 s 675407 638920 675887 638990 0 FreeSans 400 0 0 0 gpio_in[9] -port 720 nsew -flabel metal3 s 675407 733996 675887 734066 0 FreeSans 400 0 0 0 gpio_analog_en[11] -port 454 nsew -flabel metal3 s 675407 735284 675887 735354 0 FreeSans 400 0 0 0 gpio_analog_pol[11] -port 542 nsew -flabel metal3 s 675407 738320 675887 738390 0 FreeSans 400 0 0 0 gpio_analog_sel[11] -port 498 nsew -flabel metal3 s 675407 734640 675887 734710 0 FreeSans 400 0 0 0 gpio_dm0[11] -port 586 nsew -flabel metal3 s 675407 732800 675887 732870 0 FreeSans 400 0 0 0 gpio_dm1[11] -port 630 nsew -flabel metal3 s 675407 738964 675887 739034 0 FreeSans 400 0 0 0 gpio_dm2[11] -port 674 nsew flabel metal2 s 295177 995407 295233 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[19] port 358 nsew flabel metal2 s 284137 995407 284193 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[19] @@ -9918,62 +8147,6 @@ flabel metal2 s 78337 995407 78393 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[2 port 310 nsew flabel metal2 s 91217 995407 91273 995887 0 FreeSans 400 90 0 0 gpio_in[23] port 706 nsew -flabel metal3 s 41713 964334 42193 964404 0 FreeSans 400 0 0 0 gpio_analog_en[24] -port 441 nsew -flabel metal3 s 41713 963046 42193 963116 0 FreeSans 400 0 0 0 gpio_analog_pol[24] -port 529 nsew -flabel metal3 s 41713 960010 42193 960080 0 FreeSans 400 0 0 0 gpio_analog_sel[24] -port 485 nsew -flabel metal3 s 41713 963690 42193 963760 0 FreeSans 400 0 0 0 gpio_dm0[24] -port 573 nsew -flabel metal3 s 41713 965530 42193 965600 0 FreeSans 400 0 0 0 gpio_dm1[24] -port 617 nsew -flabel metal3 s 41713 959366 42193 959436 0 FreeSans 400 0 0 0 gpio_dm2[24] -port 661 nsew -flabel metal3 s 41713 958722 42193 958792 0 FreeSans 400 0 0 0 gpio_holdover[24] -port 397 nsew -flabel metal3 s 41713 955686 42193 955756 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] -port 265 nsew -flabel metal3 s 41713 962494 42193 962564 0 FreeSans 400 0 0 0 gpio_inp_dis[24] -port 221 nsew -flabel metal3 s 41713 955042 42193 955112 0 FreeSans 400 0 0 0 gpio_oeb[24] -port 177 nsew -flabel metal3 s 41713 958170 42193 958240 0 FreeSans 400 0 0 0 gpio_out[24] -port 133 nsew -flabel metal3 s 41713 967370 42193 967440 0 FreeSans 400 0 0 0 gpio_slow_sel[24] -port 353 nsew -flabel metal3 s 41713 956330 42193 956400 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] -port 309 nsew -flabel metal3 s 41713 969210 42193 969280 0 FreeSans 400 0 0 0 gpio_in[24] -port 705 nsew -flabel metal3 s 41713 794534 42193 794604 0 FreeSans 400 0 0 0 gpio_analog_en[25] -port 440 nsew -flabel metal3 s 41713 793246 42193 793316 0 FreeSans 400 0 0 0 gpio_analog_pol[25] -port 528 nsew -flabel metal3 s 41713 790210 42193 790280 0 FreeSans 400 0 0 0 gpio_analog_sel[25] -port 484 nsew -flabel metal3 s 41713 793890 42193 793960 0 FreeSans 400 0 0 0 gpio_dm0[25] -port 572 nsew -flabel metal3 s 41713 795730 42193 795800 0 FreeSans 400 0 0 0 gpio_dm1[25] -port 616 nsew -flabel metal3 s 41713 789566 42193 789636 0 FreeSans 400 0 0 0 gpio_dm2[25] -port 660 nsew -flabel metal3 s 41713 788922 42193 788992 0 FreeSans 400 0 0 0 gpio_holdover[25] -port 396 nsew -flabel metal3 s 41713 785886 42193 785956 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] -port 264 nsew -flabel metal3 s 41713 792694 42193 792764 0 FreeSans 400 0 0 0 gpio_inp_dis[25] -port 220 nsew -flabel metal3 s 41713 785242 42193 785312 0 FreeSans 400 0 0 0 gpio_oeb[25] -port 176 nsew -flabel metal3 s 41713 788370 42193 788440 0 FreeSans 400 0 0 0 gpio_out[25] -port 132 nsew -flabel metal3 s 41713 797570 42193 797640 0 FreeSans 400 0 0 0 gpio_slow_sel[25] -port 352 nsew -flabel metal3 s 41713 786530 42193 786600 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] -port 308 nsew -flabel metal3 s 41713 799410 42193 799480 0 FreeSans 400 0 0 0 gpio_in[25] -port 704 nsew flabel metal2 s 189141 995407 189197 995887 0 FreeSans 400 90 0 0 gpio_analog_en[21] port 444 nsew flabel metal2 s 187853 995407 187909 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[21] @@ -10000,530 +8173,6 @@ flabel metal2 s 192177 995407 192233 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[ port 356 nsew flabel metal2 s 181137 995407 181193 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[21] port 312 nsew -flabel metal3 s 41713 577890 42193 577960 0 FreeSans 400 0 0 0 gpio_dm0[30] -port 567 nsew -flabel metal3 s 41713 579730 42193 579800 0 FreeSans 400 0 0 0 gpio_dm1[30] -port 611 nsew -flabel metal3 s 41713 573566 42193 573636 0 FreeSans 400 0 0 0 gpio_dm2[30] -port 655 nsew -flabel metal3 s 41713 572922 42193 572992 0 FreeSans 400 0 0 0 gpio_holdover[30] -port 391 nsew -flabel metal3 s 41713 569886 42193 569956 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] -port 259 nsew -flabel metal3 s 41713 576694 42193 576764 0 FreeSans 400 0 0 0 gpio_inp_dis[30] -port 215 nsew -flabel metal3 s 41713 569242 42193 569312 0 FreeSans 400 0 0 0 gpio_oeb[30] -port 171 nsew -flabel metal3 s 41713 572370 42193 572440 0 FreeSans 400 0 0 0 gpio_out[30] -port 127 nsew -flabel metal3 s 41713 581570 42193 581640 0 FreeSans 400 0 0 0 gpio_slow_sel[30] -port 347 nsew -flabel metal3 s 41713 570530 42193 570600 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] -port 303 nsew -flabel metal3 s 41713 583410 42193 583480 0 FreeSans 400 0 0 0 gpio_in[30] -port 699 nsew -flabel metal3 s 41713 535334 42193 535404 0 FreeSans 400 0 0 0 gpio_analog_en[31] -port 434 nsew -flabel metal3 s 41713 534046 42193 534116 0 FreeSans 400 0 0 0 gpio_analog_pol[31] -port 522 nsew -flabel metal3 s 41713 531010 42193 531080 0 FreeSans 400 0 0 0 gpio_analog_sel[31] -port 478 nsew -flabel metal3 s 41713 534690 42193 534760 0 FreeSans 400 0 0 0 gpio_dm0[31] -port 566 nsew -flabel metal3 s 41713 536530 42193 536600 0 FreeSans 400 0 0 0 gpio_dm1[31] -port 610 nsew -flabel metal3 s 41713 530366 42193 530436 0 FreeSans 400 0 0 0 gpio_dm2[31] -port 654 nsew -flabel metal3 s 41713 529722 42193 529792 0 FreeSans 400 0 0 0 gpio_holdover[31] -port 390 nsew -flabel metal3 s 41713 526686 42193 526756 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] -port 258 nsew -flabel metal3 s 41713 533494 42193 533564 0 FreeSans 400 0 0 0 gpio_inp_dis[31] -port 214 nsew -flabel metal3 s 41713 526042 42193 526112 0 FreeSans 400 0 0 0 gpio_oeb[31] -port 170 nsew -flabel metal3 s 41713 529170 42193 529240 0 FreeSans 400 0 0 0 gpio_out[31] -port 126 nsew -flabel metal3 s 41713 538370 42193 538440 0 FreeSans 400 0 0 0 gpio_slow_sel[31] -port 346 nsew -flabel metal3 s 41713 527330 42193 527400 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] -port 302 nsew -flabel metal3 s 41713 540210 42193 540280 0 FreeSans 400 0 0 0 gpio_in[31] -port 698 nsew -flabel metal3 s 41713 751334 42193 751404 0 FreeSans 400 0 0 0 gpio_analog_en[26] -port 439 nsew -flabel metal3 s 41713 750046 42193 750116 0 FreeSans 400 0 0 0 gpio_analog_pol[26] -port 527 nsew -flabel metal3 s 41713 747010 42193 747080 0 FreeSans 400 0 0 0 gpio_analog_sel[26] -port 483 nsew -flabel metal3 s 41713 750690 42193 750760 0 FreeSans 400 0 0 0 gpio_dm0[26] -port 571 nsew -flabel metal3 s 41713 752530 42193 752600 0 FreeSans 400 0 0 0 gpio_dm1[26] -port 615 nsew -flabel metal3 s 41713 746366 42193 746436 0 FreeSans 400 0 0 0 gpio_dm2[26] -port 659 nsew -flabel metal3 s 41713 745722 42193 745792 0 FreeSans 400 0 0 0 gpio_holdover[26] -port 395 nsew -flabel metal3 s 41713 742686 42193 742756 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] -port 263 nsew -flabel metal3 s 41713 749494 42193 749564 0 FreeSans 400 0 0 0 gpio_inp_dis[26] -port 219 nsew -flabel metal3 s 41713 742042 42193 742112 0 FreeSans 400 0 0 0 gpio_oeb[26] -port 175 nsew -flabel metal3 s 41713 745170 42193 745240 0 FreeSans 400 0 0 0 gpio_out[26] -port 131 nsew -flabel metal3 s 41713 754370 42193 754440 0 FreeSans 400 0 0 0 gpio_slow_sel[26] -port 351 nsew -flabel metal3 s 41713 743330 42193 743400 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] -port 307 nsew -flabel metal3 s 41713 756210 42193 756280 0 FreeSans 400 0 0 0 gpio_in[26] -port 703 nsew -flabel metal3 s 41713 708134 42193 708204 0 FreeSans 400 0 0 0 gpio_analog_en[27] -port 438 nsew -flabel metal3 s 41713 706846 42193 706916 0 FreeSans 400 0 0 0 gpio_analog_pol[27] -port 526 nsew -flabel metal3 s 41713 703810 42193 703880 0 FreeSans 400 0 0 0 gpio_analog_sel[27] -port 482 nsew -flabel metal3 s 41713 707490 42193 707560 0 FreeSans 400 0 0 0 gpio_dm0[27] -port 570 nsew -flabel metal3 s 41713 709330 42193 709400 0 FreeSans 400 0 0 0 gpio_dm1[27] -port 614 nsew -flabel metal3 s 41713 703166 42193 703236 0 FreeSans 400 0 0 0 gpio_dm2[27] -port 658 nsew -flabel metal3 s 41713 702522 42193 702592 0 FreeSans 400 0 0 0 gpio_holdover[27] -port 394 nsew -flabel metal3 s 41713 699486 42193 699556 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] -port 262 nsew -flabel metal3 s 41713 706294 42193 706364 0 FreeSans 400 0 0 0 gpio_inp_dis[27] -port 218 nsew -flabel metal3 s 41713 698842 42193 698912 0 FreeSans 400 0 0 0 gpio_oeb[27] -port 174 nsew -flabel metal3 s 41713 701970 42193 702040 0 FreeSans 400 0 0 0 gpio_out[27] -port 130 nsew -flabel metal3 s 41713 711170 42193 711240 0 FreeSans 400 0 0 0 gpio_slow_sel[27] -port 350 nsew -flabel metal3 s 41713 700130 42193 700200 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] -port 306 nsew -flabel metal3 s 41713 713010 42193 713080 0 FreeSans 400 0 0 0 gpio_in[27] -port 702 nsew -flabel metal3 s 41713 664934 42193 665004 0 FreeSans 400 0 0 0 gpio_analog_en[28] -port 437 nsew -flabel metal3 s 41713 663646 42193 663716 0 FreeSans 400 0 0 0 gpio_analog_pol[28] -port 525 nsew -flabel metal3 s 41713 660610 42193 660680 0 FreeSans 400 0 0 0 gpio_analog_sel[28] -port 481 nsew -flabel metal3 s 41713 664290 42193 664360 0 FreeSans 400 0 0 0 gpio_dm0[28] -port 569 nsew -flabel metal3 s 41713 666130 42193 666200 0 FreeSans 400 0 0 0 gpio_dm1[28] -port 613 nsew -flabel metal3 s 41713 659966 42193 660036 0 FreeSans 400 0 0 0 gpio_dm2[28] -port 657 nsew -flabel metal3 s 41713 659322 42193 659392 0 FreeSans 400 0 0 0 gpio_holdover[28] -port 393 nsew -flabel metal3 s 41713 656286 42193 656356 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] -port 261 nsew -flabel metal3 s 41713 663094 42193 663164 0 FreeSans 400 0 0 0 gpio_inp_dis[28] -port 217 nsew -flabel metal3 s 41713 655642 42193 655712 0 FreeSans 400 0 0 0 gpio_oeb[28] -port 173 nsew -flabel metal3 s 41713 658770 42193 658840 0 FreeSans 400 0 0 0 gpio_out[28] -port 129 nsew -flabel metal3 s 41713 667970 42193 668040 0 FreeSans 400 0 0 0 gpio_slow_sel[28] -port 349 nsew -flabel metal3 s 41713 656930 42193 657000 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] -port 305 nsew -flabel metal3 s 41713 669810 42193 669880 0 FreeSans 400 0 0 0 gpio_in[28] -port 701 nsew -flabel metal3 s 41713 621734 42193 621804 0 FreeSans 400 0 0 0 gpio_analog_en[29] -port 436 nsew -flabel metal3 s 41713 620446 42193 620516 0 FreeSans 400 0 0 0 gpio_analog_pol[29] -port 524 nsew -flabel metal3 s 41713 617410 42193 617480 0 FreeSans 400 0 0 0 gpio_analog_sel[29] -port 480 nsew -flabel metal3 s 41713 621090 42193 621160 0 FreeSans 400 0 0 0 gpio_dm0[29] -port 568 nsew -flabel metal3 s 41713 622930 42193 623000 0 FreeSans 400 0 0 0 gpio_dm1[29] -port 612 nsew -flabel metal3 s 41713 616766 42193 616836 0 FreeSans 400 0 0 0 gpio_dm2[29] -port 656 nsew -flabel metal3 s 41713 616122 42193 616192 0 FreeSans 400 0 0 0 gpio_holdover[29] -port 392 nsew -flabel metal3 s 41713 613086 42193 613156 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] -port 260 nsew -flabel metal3 s 41713 619894 42193 619964 0 FreeSans 400 0 0 0 gpio_inp_dis[29] -port 216 nsew -flabel metal3 s 41713 612442 42193 612512 0 FreeSans 400 0 0 0 gpio_oeb[29] -port 172 nsew -flabel metal3 s 41713 615570 42193 615640 0 FreeSans 400 0 0 0 gpio_out[29] -port 128 nsew -flabel metal3 s 41713 624770 42193 624840 0 FreeSans 400 0 0 0 gpio_slow_sel[29] -port 348 nsew -flabel metal3 s 41713 613730 42193 613800 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] -port 304 nsew -flabel metal3 s 41713 626610 42193 626680 0 FreeSans 400 0 0 0 gpio_in[29] -port 700 nsew -flabel metal3 s 41713 578534 42193 578604 0 FreeSans 400 0 0 0 gpio_analog_en[30] -port 435 nsew -flabel metal3 s 41713 577246 42193 577316 0 FreeSans 400 0 0 0 gpio_analog_pol[30] -port 523 nsew -flabel metal3 s 41713 574210 42193 574280 0 FreeSans 400 0 0 0 gpio_analog_sel[30] -port 479 nsew -flabel metal3 s 41713 236130 42193 236200 0 FreeSans 400 0 0 0 gpio_dm1[36] -port 605 nsew -flabel metal3 s 41713 229966 42193 230036 0 FreeSans 400 0 0 0 gpio_dm2[36] -port 649 nsew -flabel metal3 s 41713 229322 42193 229392 0 FreeSans 400 0 0 0 gpio_holdover[36] -port 385 nsew -flabel metal3 s 41713 226286 42193 226356 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] -port 253 nsew -flabel metal3 s 41713 233094 42193 233164 0 FreeSans 400 0 0 0 gpio_inp_dis[36] -port 209 nsew -flabel metal3 s 41713 225642 42193 225712 0 FreeSans 400 0 0 0 gpio_oeb[36] -port 165 nsew -flabel metal3 s 41713 228770 42193 228840 0 FreeSans 400 0 0 0 gpio_out[36] -port 121 nsew -flabel metal3 s 41713 237970 42193 238040 0 FreeSans 400 0 0 0 gpio_slow_sel[36] -port 341 nsew -flabel metal3 s 41713 226930 42193 227000 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] -port 297 nsew -flabel metal3 s 41713 239810 42193 239880 0 FreeSans 400 0 0 0 gpio_in[36] -port 693 nsew -flabel metal3 s 41713 191734 42193 191804 0 FreeSans 400 0 0 0 gpio_analog_en[37] -port 428 nsew -flabel metal3 s 41713 190446 42193 190516 0 FreeSans 400 0 0 0 gpio_analog_pol[37] -port 516 nsew -flabel metal3 s 41713 187410 42193 187480 0 FreeSans 400 0 0 0 gpio_analog_sel[37] -port 472 nsew -flabel metal3 s 41713 191090 42193 191160 0 FreeSans 400 0 0 0 gpio_dm0[37] -port 560 nsew -flabel metal3 s 41713 192930 42193 193000 0 FreeSans 400 0 0 0 gpio_dm1[37] -port 604 nsew -flabel metal3 s 41713 186766 42193 186836 0 FreeSans 400 0 0 0 gpio_dm2[37] -port 648 nsew -flabel metal3 s 41713 186122 42193 186192 0 FreeSans 400 0 0 0 gpio_holdover[37] -port 384 nsew -flabel metal3 s 41713 183086 42193 183156 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] -port 252 nsew -flabel metal3 s 41713 182442 42193 182512 0 FreeSans 400 0 0 0 gpio_oeb[37] -port 164 nsew -flabel metal3 s 41713 185570 42193 185640 0 FreeSans 400 0 0 0 gpio_out[37] -port 120 nsew -flabel metal3 s 41713 194770 42193 194840 0 FreeSans 400 0 0 0 gpio_slow_sel[37] -port 340 nsew -flabel metal3 s 41713 183730 42193 183800 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] -port 296 nsew -flabel metal3 s 41713 196610 42193 196680 0 FreeSans 400 0 0 0 gpio_in[37] -port 692 nsew -flabel metal3 s 41713 407734 42193 407804 0 FreeSans 400 0 0 0 gpio_analog_en[32] -port 433 nsew -flabel metal3 s 41713 406446 42193 406516 0 FreeSans 400 0 0 0 gpio_analog_pol[32] -port 521 nsew -flabel metal3 s 41713 403410 42193 403480 0 FreeSans 400 0 0 0 gpio_analog_sel[32] -port 477 nsew -flabel metal3 s 41713 407090 42193 407160 0 FreeSans 400 0 0 0 gpio_dm0[32] -port 565 nsew -flabel metal3 s 41713 408930 42193 409000 0 FreeSans 400 0 0 0 gpio_dm1[32] -port 609 nsew -flabel metal3 s 41713 402766 42193 402836 0 FreeSans 400 0 0 0 gpio_dm2[32] -port 653 nsew -flabel metal3 s 41713 402122 42193 402192 0 FreeSans 400 0 0 0 gpio_holdover[32] -port 389 nsew -flabel metal3 s 41713 399086 42193 399156 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] -port 257 nsew -flabel metal3 s 41713 405894 42193 405964 0 FreeSans 400 0 0 0 gpio_inp_dis[32] -port 213 nsew -flabel metal3 s 41713 398442 42193 398512 0 FreeSans 400 0 0 0 gpio_oeb[32] -port 169 nsew -flabel metal3 s 41713 401570 42193 401640 0 FreeSans 400 0 0 0 gpio_out[32] -port 125 nsew -flabel metal3 s 41713 410770 42193 410840 0 FreeSans 400 0 0 0 gpio_slow_sel[32] -port 345 nsew -flabel metal3 s 41713 399730 42193 399800 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] -port 301 nsew -flabel metal3 s 41713 412610 42193 412680 0 FreeSans 400 0 0 0 gpio_in[32] -port 697 nsew -flabel metal3 s 41713 364534 42193 364604 0 FreeSans 400 0 0 0 gpio_analog_en[33] -port 432 nsew -flabel metal3 s 41713 363246 42193 363316 0 FreeSans 400 0 0 0 gpio_analog_pol[33] -port 520 nsew -flabel metal3 s 41713 360210 42193 360280 0 FreeSans 400 0 0 0 gpio_analog_sel[33] -port 476 nsew -flabel metal3 s 41713 365730 42193 365800 0 FreeSans 400 0 0 0 gpio_dm1[33] -port 608 nsew -flabel metal3 s 41713 359566 42193 359636 0 FreeSans 400 0 0 0 gpio_dm2[33] -port 652 nsew -flabel metal3 s 41713 363890 42193 363960 0 FreeSans 400 0 0 0 gpio_dm0[33] -port 564 nsew -flabel metal3 s 41713 358922 42193 358992 0 FreeSans 400 0 0 0 gpio_holdover[33] -port 388 nsew -flabel metal3 s 41713 355886 42193 355956 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] -port 256 nsew -flabel metal3 s 41713 362694 42193 362764 0 FreeSans 400 0 0 0 gpio_inp_dis[33] -port 212 nsew -flabel metal3 s 41713 355242 42193 355312 0 FreeSans 400 0 0 0 gpio_oeb[33] -port 168 nsew -flabel metal3 s 41713 358370 42193 358440 0 FreeSans 400 0 0 0 gpio_out[33] -port 124 nsew -flabel metal3 s 41713 367570 42193 367640 0 FreeSans 400 0 0 0 gpio_slow_sel[33] -port 344 nsew -flabel metal3 s 41713 356530 42193 356600 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] -port 300 nsew -flabel metal3 s 41713 369410 42193 369480 0 FreeSans 400 0 0 0 gpio_in[33] -port 696 nsew -flabel metal3 s 41713 321334 42193 321404 0 FreeSans 400 0 0 0 gpio_analog_en[34] -port 431 nsew -flabel metal3 s 41713 320046 42193 320116 0 FreeSans 400 0 0 0 gpio_analog_pol[34] -port 519 nsew -flabel metal3 s 41713 317010 42193 317080 0 FreeSans 400 0 0 0 gpio_analog_sel[34] -port 475 nsew -flabel metal3 s 41713 320690 42193 320760 0 FreeSans 400 0 0 0 gpio_dm0[34] -port 563 nsew -flabel metal3 s 41713 322530 42193 322600 0 FreeSans 400 0 0 0 gpio_dm1[34] -port 607 nsew -flabel metal3 s 41713 316366 42193 316436 0 FreeSans 400 0 0 0 gpio_dm2[34] -port 651 nsew -flabel metal3 s 41713 315722 42193 315792 0 FreeSans 400 0 0 0 gpio_holdover[34] -port 387 nsew -flabel metal3 s 41713 312686 42193 312756 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] -port 255 nsew -flabel metal3 s 41713 319494 42193 319564 0 FreeSans 400 0 0 0 gpio_inp_dis[34] -port 211 nsew -flabel metal3 s 41713 312042 42193 312112 0 FreeSans 400 0 0 0 gpio_oeb[34] -port 167 nsew -flabel metal3 s 41713 315170 42193 315240 0 FreeSans 400 0 0 0 gpio_out[34] -port 123 nsew -flabel metal3 s 41713 324370 42193 324440 0 FreeSans 400 0 0 0 gpio_slow_sel[34] -port 343 nsew -flabel metal3 s 41713 313330 42193 313400 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] -port 299 nsew -flabel metal3 s 41713 326210 42193 326280 0 FreeSans 400 0 0 0 gpio_in[34] -port 695 nsew -flabel metal3 s 41713 278134 42193 278204 0 FreeSans 400 0 0 0 gpio_analog_en[35] -port 430 nsew -flabel metal3 s 41713 276846 42193 276916 0 FreeSans 400 0 0 0 gpio_analog_pol[35] -port 518 nsew -flabel metal3 s 41713 273810 42193 273880 0 FreeSans 400 0 0 0 gpio_analog_sel[35] -port 474 nsew -flabel metal3 s 41713 277490 42193 277560 0 FreeSans 400 0 0 0 gpio_dm0[35] -port 562 nsew -flabel metal3 s 41713 279330 42193 279400 0 FreeSans 400 0 0 0 gpio_dm1[35] -port 606 nsew -flabel metal3 s 41713 273166 42193 273236 0 FreeSans 400 0 0 0 gpio_dm2[35] -port 650 nsew -flabel metal3 s 41713 272522 42193 272592 0 FreeSans 400 0 0 0 gpio_holdover[35] -port 386 nsew -flabel metal3 s 41713 269486 42193 269556 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] -port 254 nsew -flabel metal3 s 41713 276294 42193 276364 0 FreeSans 400 0 0 0 gpio_inp_dis[35] -port 210 nsew -flabel metal3 s 41713 268842 42193 268912 0 FreeSans 400 0 0 0 gpio_oeb[35] -port 166 nsew -flabel metal3 s 41713 271970 42193 272040 0 FreeSans 400 0 0 0 gpio_out[35] -port 122 nsew -flabel metal3 s 41713 281170 42193 281240 0 FreeSans 400 0 0 0 gpio_slow_sel[35] -port 342 nsew -flabel metal3 s 41713 270130 42193 270200 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] -port 298 nsew -flabel metal3 s 41713 283010 42193 283080 0 FreeSans 400 0 0 0 gpio_in[35] -port 694 nsew -flabel metal3 s 41713 234934 42193 235004 0 FreeSans 400 0 0 0 gpio_analog_en[36] -port 429 nsew -flabel metal3 s 41713 233646 42193 233716 0 FreeSans 400 0 0 0 gpio_analog_pol[36] -port 517 nsew -flabel metal3 s 41713 230610 42193 230680 0 FreeSans 400 0 0 0 gpio_analog_sel[36] -port 473 nsew -flabel metal3 s 41713 234290 42193 234360 0 FreeSans 400 0 0 0 gpio_dm0[36] -port 561 nsew -flabel metal3 s 675407 286196 675887 286266 0 FreeSans 400 0 0 0 gpio_analog_en[4] -port 461 nsew -flabel metal3 s 675407 287484 675887 287554 0 FreeSans 400 0 0 0 gpio_analog_pol[4] -port 549 nsew -flabel metal3 s 675407 290520 675887 290590 0 FreeSans 400 0 0 0 gpio_analog_sel[4] -port 505 nsew -flabel metal3 s 675407 286840 675887 286910 0 FreeSans 400 0 0 0 gpio_dm0[4] -port 593 nsew -flabel metal3 s 675407 285000 675887 285070 0 FreeSans 400 0 0 0 gpio_dm1[4] -port 637 nsew -flabel metal3 s 675407 291164 675887 291234 0 FreeSans 400 0 0 0 gpio_dm2[4] -port 681 nsew -flabel metal3 s 675407 291808 675887 291878 0 FreeSans 400 0 0 0 gpio_holdover[4] -port 417 nsew -flabel metal3 s 675407 294844 675887 294914 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] -port 285 nsew -flabel metal3 s 675407 288036 675887 288106 0 FreeSans 400 0 0 0 gpio_inp_dis[4] -port 241 nsew -flabel metal3 s 675407 295488 675887 295558 0 FreeSans 400 0 0 0 gpio_oeb[4] -port 197 nsew -flabel metal3 s 675407 292360 675887 292430 0 FreeSans 400 0 0 0 gpio_out[4] -port 153 nsew -flabel metal3 s 675407 283160 675887 283230 0 FreeSans 400 0 0 0 gpio_slow_sel[4] -port 373 nsew -flabel metal3 s 675407 294200 675887 294270 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] -port 329 nsew -flabel metal3 s 675407 281320 675887 281390 0 FreeSans 400 0 0 0 gpio_in[4] -port 725 nsew -flabel metal3 s 675407 331196 675887 331266 0 FreeSans 400 0 0 0 gpio_analog_en[5] -port 460 nsew -flabel metal3 s 675407 332484 675887 332554 0 FreeSans 400 0 0 0 gpio_analog_pol[5] -port 548 nsew -flabel metal3 s 675407 335520 675887 335590 0 FreeSans 400 0 0 0 gpio_analog_sel[5] -port 504 nsew -flabel metal3 s 675407 331840 675887 331910 0 FreeSans 400 0 0 0 gpio_dm0[5] -port 592 nsew -flabel metal3 s 675407 330000 675887 330070 0 FreeSans 400 0 0 0 gpio_dm1[5] -port 636 nsew -flabel metal3 s 675407 336164 675887 336234 0 FreeSans 400 0 0 0 gpio_dm2[5] -port 680 nsew -flabel metal3 s 675407 336808 675887 336878 0 FreeSans 400 0 0 0 gpio_holdover[5] -port 416 nsew -flabel metal3 s 675407 339844 675887 339914 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] -port 284 nsew -flabel metal3 s 675407 333036 675887 333106 0 FreeSans 400 0 0 0 gpio_inp_dis[5] -port 240 nsew -flabel metal3 s 675407 340488 675887 340558 0 FreeSans 400 0 0 0 gpio_oeb[5] -port 196 nsew -flabel metal3 s 675407 337360 675887 337430 0 FreeSans 400 0 0 0 gpio_out[5] -port 152 nsew -flabel metal3 s 675407 328160 675887 328230 0 FreeSans 400 0 0 0 gpio_slow_sel[5] -port 372 nsew -flabel metal3 s 675407 339200 675887 339270 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] -port 328 nsew -flabel metal3 s 675407 376396 675887 376466 0 FreeSans 400 0 0 0 gpio_analog_en[6] -port 459 nsew -flabel metal3 s 675407 377684 675887 377754 0 FreeSans 400 0 0 0 gpio_analog_pol[6] -port 547 nsew -flabel metal3 s 675407 380720 675887 380790 0 FreeSans 400 0 0 0 gpio_analog_sel[6] -port 503 nsew -flabel metal3 s 675407 377040 675887 377110 0 FreeSans 400 0 0 0 gpio_dm0[6] -port 591 nsew -flabel metal3 s 675407 375200 675887 375270 0 FreeSans 400 0 0 0 gpio_dm1[6] -port 635 nsew -flabel metal3 s 675407 381364 675887 381434 0 FreeSans 400 0 0 0 gpio_dm2[6] -port 679 nsew -flabel metal3 s 675407 382008 675887 382078 0 FreeSans 400 0 0 0 gpio_holdover[6] -port 415 nsew -flabel metal3 s 675407 385044 675887 385114 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] -port 283 nsew -flabel metal3 s 675407 378236 675887 378306 0 FreeSans 400 0 0 0 gpio_inp_dis[6] -port 239 nsew -flabel metal3 s 675407 385688 675887 385758 0 FreeSans 400 0 0 0 gpio_oeb[6] -port 195 nsew -flabel metal3 s 675407 382560 675887 382630 0 FreeSans 400 0 0 0 gpio_out[6] -port 151 nsew -flabel metal3 s 675407 373360 675887 373430 0 FreeSans 400 0 0 0 gpio_slow_sel[6] -port 371 nsew -flabel metal3 s 675407 384400 675887 384470 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] -port 327 nsew -flabel metal3 s 675407 371520 675887 371590 0 FreeSans 400 0 0 0 gpio_in[6] -port 723 nsew -flabel metal3 s 675407 150996 675887 151066 0 FreeSans 400 0 0 0 gpio_analog_en[1] -port 464 nsew -flabel metal3 s 675407 152284 675887 152354 0 FreeSans 400 0 0 0 gpio_analog_pol[1] -port 552 nsew -flabel metal3 s 675407 155320 675887 155390 0 FreeSans 400 0 0 0 gpio_analog_sel[1] -port 508 nsew -flabel metal3 s 675407 151640 675887 151710 0 FreeSans 400 0 0 0 gpio_dm0[1] -port 596 nsew -flabel metal3 s 675407 149800 675887 149870 0 FreeSans 400 0 0 0 gpio_dm1[1] -port 640 nsew -flabel metal3 s 675407 155964 675887 156034 0 FreeSans 400 0 0 0 gpio_dm2[1] -port 684 nsew -flabel metal3 s 675407 156608 675887 156678 0 FreeSans 400 0 0 0 gpio_holdover[1] -port 420 nsew -flabel metal3 s 675407 159644 675887 159714 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] -port 288 nsew -flabel metal3 s 675407 152836 675887 152906 0 FreeSans 400 0 0 0 gpio_inp_dis[1] -port 244 nsew -flabel metal3 s 675407 160288 675887 160358 0 FreeSans 400 0 0 0 gpio_oeb[1] -port 200 nsew -flabel metal3 s 675407 157160 675887 157230 0 FreeSans 400 0 0 0 gpio_out[1] -port 156 nsew -flabel metal3 s 675407 147960 675887 148030 0 FreeSans 400 0 0 0 gpio_slow_sel[1] -port 376 nsew -flabel metal3 s 675407 159000 675887 159070 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] -port 332 nsew -flabel metal3 s 675407 146120 675887 146190 0 FreeSans 400 0 0 0 gpio_in[1] -port 728 nsew -flabel metal3 s 675407 195996 675887 196066 0 FreeSans 400 0 0 0 gpio_analog_en[2] -port 463 nsew -flabel metal3 s 675407 197284 675887 197354 0 FreeSans 400 0 0 0 gpio_analog_pol[2] -port 551 nsew -flabel metal3 s 675407 200320 675887 200390 0 FreeSans 400 0 0 0 gpio_analog_sel[2] -port 507 nsew -flabel metal3 s 675407 196640 675887 196710 0 FreeSans 400 0 0 0 gpio_dm0[2] -port 595 nsew -flabel metal3 s 675407 194800 675887 194870 0 FreeSans 400 0 0 0 gpio_dm1[2] -port 639 nsew -flabel metal3 s 675407 200964 675887 201034 0 FreeSans 400 0 0 0 gpio_dm2[2] -port 683 nsew -flabel metal3 s 675407 201608 675887 201678 0 FreeSans 400 0 0 0 gpio_holdover[2] -port 419 nsew -flabel metal3 s 675407 204644 675887 204714 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] -port 287 nsew -flabel metal3 s 675407 197836 675887 197906 0 FreeSans 400 0 0 0 gpio_inp_dis[2] -port 243 nsew -flabel metal3 s 675407 205288 675887 205358 0 FreeSans 400 0 0 0 gpio_oeb[2] -port 199 nsew -flabel metal3 s 675407 202160 675887 202230 0 FreeSans 400 0 0 0 gpio_out[2] -port 155 nsew -flabel metal3 s 675407 192960 675887 193030 0 FreeSans 400 0 0 0 gpio_slow_sel[2] -port 375 nsew -flabel metal3 s 675407 204000 675887 204070 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] -port 331 nsew -flabel metal3 s 675407 191120 675887 191190 0 FreeSans 400 0 0 0 gpio_in[2] -port 727 nsew -flabel metal3 s 675407 241196 675887 241266 0 FreeSans 400 0 0 0 gpio_analog_en[3] -port 462 nsew -flabel metal3 s 675407 242484 675887 242554 0 FreeSans 400 0 0 0 gpio_analog_pol[3] -port 550 nsew -flabel metal3 s 675407 245520 675887 245590 0 FreeSans 400 0 0 0 gpio_analog_sel[3] -port 506 nsew -flabel metal3 s 675407 240000 675887 240070 0 FreeSans 400 0 0 0 gpio_dm1[3] -port 638 nsew -flabel metal3 s 675407 246164 675887 246234 0 FreeSans 400 0 0 0 gpio_dm2[3] -port 682 nsew -flabel metal3 s 675407 241840 675887 241910 0 FreeSans 400 0 0 0 gpio_dm0[3] -port 594 nsew -flabel metal3 s 675407 246808 675887 246878 0 FreeSans 400 0 0 0 gpio_holdover[3] -port 418 nsew -flabel metal3 s 675407 249844 675887 249914 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] -port 286 nsew -flabel metal3 s 675407 243036 675887 243106 0 FreeSans 400 0 0 0 gpio_inp_dis[3] -port 242 nsew -flabel metal3 s 675407 250488 675887 250558 0 FreeSans 400 0 0 0 gpio_oeb[3] -port 198 nsew -flabel metal3 s 675407 247360 675887 247430 0 FreeSans 400 0 0 0 gpio_out[3] -port 154 nsew -flabel metal3 s 675407 238160 675887 238230 0 FreeSans 400 0 0 0 gpio_slow_sel[3] -port 374 nsew -flabel metal3 s 675407 249200 675887 249270 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] -port 330 nsew -flabel metal3 s 675407 105796 675887 105866 0 FreeSans 400 0 0 0 gpio_analog_en[0] -port 465 nsew -flabel metal3 s 675407 107084 675887 107154 0 FreeSans 400 0 0 0 gpio_analog_pol[0] -port 553 nsew -flabel metal3 s 675407 110120 675887 110190 0 FreeSans 400 0 0 0 gpio_analog_sel[0] -port 509 nsew -flabel metal3 s 675407 106440 675887 106510 0 FreeSans 400 0 0 0 gpio_dm0[0] -port 597 nsew -flabel metal3 s 675407 104600 675887 104670 0 FreeSans 400 0 0 0 gpio_dm1[0] -port 641 nsew -flabel metal3 s 675407 110764 675887 110834 0 FreeSans 400 0 0 0 gpio_dm2[0] -port 685 nsew -flabel metal3 s 675407 111408 675887 111478 0 FreeSans 400 0 0 0 gpio_holdover[0] -port 421 nsew -flabel metal3 s 675407 107636 675887 107706 0 FreeSans 400 0 0 0 gpio_inp_dis[0] -port 245 nsew -flabel metal3 s 675407 115088 675887 115158 0 FreeSans 400 0 0 0 gpio_oeb[0] -port 201 nsew -flabel metal3 s 675407 111960 675887 112030 0 FreeSans 400 0 0 0 gpio_out[0] -port 157 nsew -flabel metal3 s 675407 102760 675887 102830 0 FreeSans 400 0 0 0 gpio_slow_sel[0] -port 377 nsew -flabel metal3 s 675407 100920 675887 100990 0 FreeSans 400 0 0 0 gpio_in[0] -port 729 nsew -flabel metal3 s 675407 236320 675887 236390 0 FreeSans 400 0 0 0 gpio_in[3] -port 726 nsew rlabel metal1 s 142538 40100 142538 40100 4 xres_vss_loop flabel metal4 s 36323 455607 37013 455799 6 FreeSans 400 0 0 0 vdda2 port 25 nsew @@ -10664,16 +8313,10 @@ flabel metal5 s 6598 183840 19088 196360 0 FreeSans 16000 0 0 0 gpio[37] port 76 nsew flabel metal5 s 698512 101240 711002 113760 0 FreeSans 16000 0 0 0 gpio[0] port 113 nsew -flabel metal3 s 41713 189894 42193 189964 0 FreeSans 400 0 0 0 gpio_inp_dis[37] -port 208 nsew flabel metal2 187327 41713 187383 42193 0 FreeSans 400 270 0 0 gpio_in[38] port 691 nsew flabel metal2 189167 41713 189223 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[38] port 339 nsew -flabel metal2 191007 41713 191063 42193 0 FreeSans 400 270 0 0 gpio_dm0[38] -port 559 nsew -flabel metal2 192847 41713 192903 42193 0 FreeSans 400 270 0 0 gpio_dm1[38] -port 603 nsew flabel metal2 193491 41713 193547 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[38] port 515 nsew flabel metal2 192203 41713 192259 42193 0 FreeSans 400 270 0 0 gpio_analog_en[38] @@ -10834,82 +8477,52 @@ flabel metal2 528651 41713 528707 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[ port 246 nsew flabel metal2 529295 41713 529351 42193 0 FreeSans 400 270 0 0 gpio_oeb[43] port 158 nsew -flabel metal3 675407 103404 675887 103474 0 FreeSans 400 0 0 0 analog_io[0] +flabel metal3 675407 103375 675887 103503 0 FreeSans 400 0 0 0 analog_io[0] port 905 nsew -flabel metal3 675407 105244 675887 105314 0 FreeSans 400 0 0 0 analog_noesd_io[0] +flabel metal3 675407 105172 675887 105386 0 FreeSans 400 0 0 0 analog_noesd_io[0] port 949 nsew -flabel metal3 675407 150444 675887 150514 0 FreeSans 400 0 0 0 analog_noesd_io[1] +flabel metal3 675407 150372 675887 150586 0 FreeSans 400 0 0 0 analog_noesd_io[1] port 948 nsew -flabel metal3 675407 148604 675887 148674 0 FreeSans 400 0 0 0 analog_io[1] +flabel metal3 675407 148575 675887 148703 0 FreeSans 400 0 0 0 analog_io[1] port 904 nsew -flabel metal3 675407 115640 675887 115710 0 FreeSans 400 0 0 0 gpio_in_h[0] -port 773 nsew -flabel metal3 675407 160840 675887 160910 0 FreeSans 400 0 0 0 gpio_in_h[1] -port 772 nsew -flabel metal3 675407 193604 675887 193674 0 FreeSans 400 0 0 0 analog_io[2] +flabel metal3 675407 193575 675887 193703 0 FreeSans 400 0 0 0 analog_io[2] port 903 nsew -flabel metal3 675407 195444 675887 195514 0 FreeSans 400 0 0 0 analog_noesd_io[2] +flabel metal3 675407 195372 675887 195586 0 FreeSans 400 0 0 0 analog_noesd_io[2] port 947 nsew -flabel metal3 675407 205840 675887 205910 0 FreeSans 400 0 0 0 gpio_in_h[2] -port 771 nsew -flabel metal3 675407 238804 675887 238874 0 FreeSans 400 0 0 0 analog_io[3] +flabel metal3 675407 238775 675887 238903 0 FreeSans 400 0 0 0 analog_io[3] port 902 nsew -flabel metal3 675407 251040 675887 251110 0 FreeSans 400 0 0 0 gpio_in_h[3] -port 770 nsew -flabel metal3 675407 283804 675887 283874 0 FreeSans 400 0 0 0 analog_io[4] +flabel metal3 675407 283775 675887 283903 0 FreeSans 400 0 0 0 analog_io[4] port 901 nsew -flabel metal3 675407 285644 675887 285714 0 FreeSans 400 0 0 0 analog_noesd_io[4] +flabel metal3 675407 285572 675887 285786 0 FreeSans 400 0 0 0 analog_noesd_io[4] port 945 nsew -flabel metal3 675407 296040 675887 296110 0 FreeSans 400 0 0 0 gpio_in_h[4] -port 769 nsew -flabel metal3 675407 328804 675887 328874 0 FreeSans 400 0 0 0 analog_io[5] +flabel metal3 675407 328775 675887 328903 0 FreeSans 400 0 0 0 analog_io[5] port 900 nsew -flabel metal3 675407 330644 675887 330714 0 FreeSans 400 0 0 0 analog_noesd_io[5] +flabel metal3 675407 330572 675887 330786 0 FreeSans 400 0 0 0 analog_noesd_io[5] port 944 nsew -flabel metal3 675407 341040 675887 341110 0 FreeSans 400 0 0 0 gpio_in_h[5] -port 768 nsew -flabel metal3 675407 374004 675887 374074 0 FreeSans 400 0 0 0 analog_io[6] +flabel metal3 675407 373975 675887 374103 0 FreeSans 400 0 0 0 analog_io[6] port 899 nsew -flabel metal3 675407 375844 675887 375914 0 FreeSans 400 0 0 0 analog_noesd_io[6] +flabel metal3 675407 375772 675887 375986 0 FreeSans 400 0 0 0 analog_noesd_io[6] port 943 nsew -flabel metal3 675407 386240 675887 386310 0 FreeSans 400 0 0 0 gpio_in_h[6] -port 767 nsew -flabel metal3 s 675407 551204 675887 551274 0 FreeSans 400 0 0 0 analog_io[7] +flabel metal3 s 675407 551175 675887 551303 0 FreeSans 400 0 0 0 analog_io[7] port 898 nsew -flabel metal3 s 675407 553044 675887 553114 0 FreeSans 400 0 0 0 analog_noesd_io[7] +flabel metal3 s 675407 552972 675887 553186 0 FreeSans 400 0 0 0 analog_noesd_io[7] port 942 nsew -flabel metal3 s 675407 563440 675887 563510 0 FreeSans 400 0 0 0 gpio_in_h[7] -port 766 nsew -flabel metal3 s 675407 596404 675887 596474 0 FreeSans 400 0 0 0 analog_io[8] +flabel metal3 s 675407 596375 675887 596503 0 FreeSans 400 0 0 0 analog_io[8] port 897 nsew -flabel metal3 s 675407 598244 675887 598314 0 FreeSans 400 0 0 0 analog_noesd_io[8] +flabel metal3 s 675407 598172 675887 598386 0 FreeSans 400 0 0 0 analog_noesd_io[8] port 941 nsew -flabel metal3 s 675407 608640 675887 608710 0 FreeSans 400 0 0 0 gpio_in_h[8] -port 765 nsew -flabel metal3 s 675407 641404 675887 641474 0 FreeSans 400 0 0 0 analog_io[9] +flabel metal3 s 675407 641375 675887 641503 0 FreeSans 400 0 0 0 analog_io[9] port 896 nsew -flabel metal3 s 675407 643244 675887 643314 0 FreeSans 400 0 0 0 analog_noesd_io[9] +flabel metal3 s 675407 643172 675887 643386 0 FreeSans 400 0 0 0 analog_noesd_io[9] port 940 nsew -flabel metal3 s 675407 653640 675887 653710 0 FreeSans 400 0 0 0 gpio_in_h[9] -port 764 nsew -flabel metal3 s 675407 686604 675887 686674 0 FreeSans 400 0 0 0 analog_io[10] +flabel metal3 s 675407 686575 675887 686703 0 FreeSans 400 0 0 0 analog_io[10] port 895 nsew -flabel metal3 s 675407 688444 675887 688514 0 FreeSans 400 0 0 0 analog_noesd_io[10] +flabel metal3 s 675407 688372 675887 688586 0 FreeSans 400 0 0 0 analog_noesd_io[10] port 939 nsew -flabel metal3 s 675407 698840 675887 698910 0 FreeSans 400 0 0 0 gpio_in_h[10] -port 763 nsew -flabel metal3 s 675407 731604 675887 731674 0 FreeSans 400 0 0 0 analog_io[11] +flabel metal3 s 675407 731575 675887 731703 0 FreeSans 400 0 0 0 analog_io[11] port 894 nsew -flabel metal3 s 675407 733444 675887 733514 0 FreeSans 400 0 0 0 analog_noesd_io[11] +flabel metal3 s 675407 733372 675887 733586 0 FreeSans 400 0 0 0 analog_noesd_io[11] port 938 nsew -flabel metal3 s 675407 743840 675887 743910 0 FreeSans 400 0 0 0 gpio_in_h[11] -port 762 nsew -flabel metal3 s 675407 788840 675887 788910 0 FreeSans 400 0 0 0 gpio_in_h[12] -port 761 nsew -flabel metal3 s 675407 878040 675887 878110 0 FreeSans 400 0 0 0 gpio_in_h[13] -port 760 nsew -flabel metal3 s 675407 967240 675887 967310 0 FreeSans 400 0 0 0 gpio_in_h[14] -port 759 nsew flabel metal2 s 626297 995407 626353 995887 0 FreeSans 400 90 0 0 gpio_in_h[15] port 758 nsew flabel metal2 s 524497 995407 524553 995887 0 FreeSans 400 90 0 0 gpio_in_h[16] @@ -10928,34 +8541,6 @@ flabel metal2 s 127897 995407 127953 995887 0 FreeSans 400 90 0 0 gpio_in_h[22] port 751 nsew flabel metal2 s 76497 995407 76553 995887 0 FreeSans 400 90 0 0 gpio_in_h[23] port 750 nsew -flabel metal3 s 41713 954490 42193 954560 0 FreeSans 400 0 0 0 gpio_in_h[24] -port 749 nsew -flabel metal3 s 41713 784690 42193 784760 0 FreeSans 400 0 0 0 gpio_in_h[25] -port 748 nsew -flabel metal3 s 41713 741490 42193 741560 0 FreeSans 400 0 0 0 gpio_in_h[26] -port 747 nsew -flabel metal3 s 41713 698290 42193 698360 0 FreeSans 400 0 0 0 gpio_in_h[27] -port 746 nsew -flabel metal3 s 41713 655090 42193 655160 0 FreeSans 400 0 0 0 gpio_in_h[28] -port 745 nsew -flabel metal3 s 41713 611890 42193 611960 0 FreeSans 400 0 0 0 gpio_in_h[29] -port 744 nsew -flabel metal3 s 41713 568690 42193 568760 0 FreeSans 400 0 0 0 gpio_in_h[30] -port 743 nsew -flabel metal3 s 41713 525490 42193 525560 0 FreeSans 400 0 0 0 gpio_in_h[31] -port 742 nsew -flabel metal3 s 41713 397890 42193 397960 0 FreeSans 400 0 0 0 gpio_in_h[32] -port 741 nsew -flabel metal3 s 41713 354690 42193 354760 0 FreeSans 400 0 0 0 gpio_in_h[33] -port 740 nsew -flabel metal3 s 41713 311490 42193 311560 0 FreeSans 400 0 0 0 gpio_in_h[34] -port 739 nsew -flabel metal3 s 41713 268290 42193 268360 0 FreeSans 400 0 0 0 gpio_in_h[35] -port 738 nsew -flabel metal3 s 41713 225090 42193 225160 0 FreeSans 400 0 0 0 gpio_in_h[36] -port 737 nsew -flabel metal3 s 41713 181890 42193 181960 0 FreeSans 400 0 0 0 gpio_in_h[37] -port 736 nsew flabel metal2 s 202047 41713 202103 42193 0 FreeSans 400 90 0 0 gpio_in_h[38] port 735 nsew flabel metal2 s 310647 41713 310703 42193 0 FreeSans 400 90 0 0 gpio_in_h[39] @@ -10968,133 +8553,119 @@ flabel metal2 s 475047 41713 475103 42193 0 FreeSans 400 90 0 0 gpio_in_h[42] port 731 nsew flabel metal2 s 529847 41713 529903 42193 0 FreeSans 400 90 0 0 gpio_in_h[43] port 730 nsew -flabel metal3 s 675407 776604 675887 776674 0 FreeSans 400 0 0 0 analog_io[12] +flabel metal3 s 675407 776575 675887 776703 0 FreeSans 400 0 0 0 analog_io[12] port 893 nsew -flabel metal3 s 675407 865804 675887 865874 0 FreeSans 400 0 0 0 analog_io[13] +flabel metal3 s 675407 865775 675887 865903 0 FreeSans 400 0 0 0 analog_io[13] port 892 nsew -flabel metal3 s 675407 955004 675887 955074 0 FreeSans 400 0 0 0 analog_io[14] +flabel metal3 s 675407 954975 675887 955103 0 FreeSans 400 0 0 0 analog_io[14] port 891 nsew -flabel metal2 s 638533 995407 638589 995887 0 FreeSans 400 90 0 0 analog_io[15] +flabel metal2 s 638497 995407 638625 995887 0 FreeSans 400 90 0 0 analog_io[15] port 890 nsew -flabel metal2 s 536733 995407 536789 995887 0 FreeSans 400 90 0 0 analog_io[16] +flabel metal2 s 536697 995407 536825 995887 0 FreeSans 400 90 0 0 analog_io[16] port 889 nsew -flabel metal2 s 485333 995407 485389 995887 0 FreeSans 400 90 0 0 analog_io[17] +flabel metal2 s 485297 995407 485425 995887 0 FreeSans 400 90 0 0 analog_io[17] port 888 nsew -flabel metal2 s 396333 995407 396389 995887 0 FreeSans 400 90 0 0 analog_io[18] +flabel metal2 s 396297 995407 396425 995887 0 FreeSans 400 90 0 0 analog_io[18] port 887 nsew -flabel metal2 s 294533 995407 294589 995887 0 FreeSans 400 90 0 0 analog_io[19] +flabel metal2 s 294497 995407 294625 995887 0 FreeSans 400 90 0 0 analog_io[19] port 886 nsew -flabel metal2 s 242933 995407 242989 995887 0 FreeSans 400 90 0 0 analog_io[20] +flabel metal2 s 242897 995407 243025 995887 0 FreeSans 400 90 0 0 analog_io[20] port 885 nsew -flabel metal2 s 191533 995407 191589 995887 0 FreeSans 400 90 0 0 analog_io[21] +flabel metal2 s 191497 995407 191625 995887 0 FreeSans 400 90 0 0 analog_io[21] port 884 nsew -flabel metal2 s 140133 995407 140189 995887 0 FreeSans 400 90 0 0 analog_io[22] +flabel metal2 s 140097 995407 140225 995887 0 FreeSans 400 90 0 0 analog_io[22] port 883 nsew -flabel metal2 s 88733 995407 88789 995887 0 FreeSans 400 90 0 0 analog_io[23] +flabel metal2 s 88697 995407 88825 995887 0 FreeSans 400 90 0 0 analog_io[23] port 882 nsew -flabel metal3 s 41713 966726 42193 966796 0 FreeSans 400 0 0 0 analog_io[24] -port 881 nsew -flabel metal3 s 41713 796926 42193 796996 0 FreeSans 400 0 0 0 analog_io[25] +flabel metal3 s 41713 796897 42193 797025 0 FreeSans 400 0 0 0 analog_io[25] port 880 nsew -flabel metal3 s 41713 753726 42193 753796 0 FreeSans 400 0 0 0 analog_io[26] -port 879 nsew -flabel metal3 s 41713 710526 42193 710596 0 FreeSans 400 0 0 0 analog_io[27] +flabel metal3 s 41713 710497 42193 710625 0 FreeSans 400 0 0 0 analog_io[27] port 878 nsew -flabel metal3 s 41713 667326 42193 667396 0 FreeSans 400 0 0 0 analog_io[28] +flabel metal3 s 41713 667297 42193 667425 0 FreeSans 400 0 0 0 analog_io[28] port 877 nsew -flabel metal3 s 41713 624126 42193 624196 0 FreeSans 400 0 0 0 analog_io[29] +flabel metal3 s 41713 624097 42193 624225 0 FreeSans 400 0 0 0 analog_io[29] port 876 nsew -flabel metal3 s 41713 580926 42193 580996 0 FreeSans 400 0 0 0 analog_io[30] +flabel metal3 s 41713 580897 42193 581025 0 FreeSans 400 0 0 0 analog_io[30] port 875 nsew -flabel metal3 s 41713 537726 42193 537796 0 FreeSans 400 0 0 0 analog_io[31] +flabel metal3 s 41713 537697 42193 537825 0 FreeSans 400 0 0 0 analog_io[31] port 874 nsew -flabel metal3 s 41713 410126 42193 410196 0 FreeSans 400 0 0 0 analog_io[32] +flabel metal3 s 41713 410097 42193 410225 0 FreeSans 400 0 0 0 analog_io[32] port 873 nsew -flabel metal3 s 41713 366926 42193 366996 0 FreeSans 400 0 0 0 analog_io[33] +flabel metal3 s 41713 366897 42193 367025 0 FreeSans 400 0 0 0 analog_io[33] port 872 nsew -flabel metal3 s 41713 323726 42193 323796 0 FreeSans 400 0 0 0 analog_io[34] +flabel metal3 s 41713 323697 42193 323825 0 FreeSans 400 0 0 0 analog_io[34] port 871 nsew -flabel metal3 s 41713 280526 42193 280596 0 FreeSans 400 0 0 0 analog_io[35] +flabel metal3 s 41713 280497 42193 280625 0 FreeSans 400 0 0 0 analog_io[35] port 870 nsew -flabel metal3 s 41713 237326 42193 237396 0 FreeSans 400 0 0 0 analog_io[36] +flabel metal3 s 41713 237297 42193 237425 0 FreeSans 400 0 0 0 analog_io[36] port 869 nsew -flabel metal3 s 41713 194126 42193 194196 0 FreeSans 400 0 0 0 analog_io[37] -port 868 nsew -flabel metal2 s 189811 41713 189867 42193 0 FreeSans 400 90 0 0 analog_io[38] +flabel metal2 s 189775 41713 189903 42193 0 FreeSans 400 90 0 0 analog_io[38] port 867 nsew -flabel metal2 s 298411 41713 298467 42193 0 FreeSans 400 90 0 0 analog_io[39] -port 866 nsew -flabel metal2 s 353211 41713 353267 42193 0 FreeSans 400 90 0 0 analog_io[40] +flabel metal2 s 353175 41713 353303 42193 0 FreeSans 400 90 0 0 analog_io[40] port 865 nsew -flabel metal2 s 408011 41713 408067 42193 0 FreeSans 400 90 0 0 analog_io[41] +flabel metal2 s 407975 41713 408103 42193 0 FreeSans 400 90 0 0 analog_io[41] port 864 nsew -flabel metal2 s 462811 41713 462867 42193 0 FreeSans 400 90 0 0 analog_io[42] +flabel metal2 s 462775 41713 462903 42193 0 FreeSans 400 90 0 0 analog_io[42] port 863 nsew -flabel metal2 s 517611 41713 517667 42193 0 FreeSans 400 90 0 0 analog_io[43] +flabel metal2 s 517575 41713 517703 42193 0 FreeSans 400 90 0 0 analog_io[43] port 862 nsew -flabel metal3 s 675407 778444 675887 778514 0 FreeSans 400 0 0 0 analog_noesd_io[12] +flabel metal3 s 675407 778372 675887 778586 0 FreeSans 400 0 0 0 analog_noesd_io[12] port 937 nsew -flabel metal3 s 675407 867644 675887 867714 0 FreeSans 400 0 0 0 analog_noesd_io[13] +flabel metal3 s 675407 867572 675887 867786 0 FreeSans 400 0 0 0 analog_noesd_io[13] port 936 nsew -flabel metal3 s 675407 956844 675887 956914 0 FreeSans 400 0 0 0 analog_noesd_io[14] +flabel metal3 s 675407 956772 675887 956986 0 FreeSans 400 0 0 0 analog_noesd_io[14] port 935 nsew -flabel metal2 s 636693 995407 636749 995887 0 FreeSans 400 90 0 0 analog_noesd_io[15] +flabel metal2 s 636614 995407 636828 995887 0 FreeSans 400 90 0 0 analog_noesd_io[15] port 934 nsew -flabel metal2 s 534893 995407 534949 995887 0 FreeSans 400 90 0 0 analog_noesd_io[16] +flabel metal2 s 534814 995407 535028 995887 0 FreeSans 400 90 0 0 analog_noesd_io[16] port 933 nsew -flabel metal2 s 483493 995407 483549 995887 0 FreeSans 400 90 0 0 analog_noesd_io[17] +flabel metal2 s 483414 995407 483628 995887 0 FreeSans 400 90 0 0 analog_noesd_io[17] port 932 nsew -flabel metal2 s 394493 995407 394549 995887 0 FreeSans 400 90 0 0 analog_noesd_io[18] +flabel metal2 s 394414 995407 394628 995887 0 FreeSans 400 90 0 0 analog_noesd_io[18] port 931 nsew -flabel metal2 s 292693 995407 292749 995887 0 FreeSans 400 90 0 0 analog_noesd_io[19] +flabel metal2 s 292614 995407 292828 995887 0 FreeSans 400 90 0 0 analog_noesd_io[19] port 930 nsew -flabel metal2 s 241093 995407 241149 995887 0 FreeSans 400 90 0 0 analog_noesd_io[20] +flabel metal2 s 241014 995407 241228 995887 0 FreeSans 400 90 0 0 analog_noesd_io[20] port 929 nsew -flabel metal2 s 189693 995407 189749 995887 0 FreeSans 400 90 0 0 analog_noesd_io[21] +flabel metal2 s 189614 995407 189828 995887 0 FreeSans 400 90 0 0 analog_noesd_io[21] port 928 nsew -flabel metal2 s 138293 995407 138349 995887 0 FreeSans 400 90 0 0 analog_noesd_io[22] +flabel metal2 s 138214 995407 138428 995887 0 FreeSans 400 90 0 0 analog_noesd_io[22] port 927 nsew -flabel metal2 s 86893 995407 86949 995887 0 FreeSans 400 90 0 0 analog_noesd_io[23] +flabel metal2 s 86814 995407 87028 995887 0 FreeSans 400 90 0 0 analog_noesd_io[23] port 926 nsew -flabel metal3 s 41713 964886 42193 964956 0 FreeSans 400 0 0 0 analog_noesd_io[24] -port 925 nsew -flabel metal3 s 41713 795086 42193 795156 0 FreeSans 400 0 0 0 analog_noesd_io[25] +flabel metal3 s 41713 795014 42193 795228 0 FreeSans 400 0 0 0 analog_noesd_io[25] port 924 nsew -flabel metal3 s 41713 751886 42193 751956 0 FreeSans 400 0 0 0 analog_noesd_io[26] +flabel metal3 s 41713 751814 42193 752028 0 FreeSans 400 0 0 0 analog_noesd_io[26] port 923 nsew -flabel metal3 s 41713 708686 42193 708756 0 FreeSans 400 0 0 0 analog_noesd_io[27] +flabel metal3 s 41713 708614 42193 708828 0 FreeSans 400 0 0 0 analog_noesd_io[27] port 922 nsew -flabel metal3 s 41713 665486 42193 665556 0 FreeSans 400 0 0 0 analog_noesd_io[28] -port 921 nsew -flabel metal3 s 41713 622286 42193 622356 0 FreeSans 400 0 0 0 analog_noesd_io[29] +flabel metal3 s 41713 622214 42193 622428 0 FreeSans 400 0 0 0 analog_noesd_io[29] port 920 nsew -flabel metal3 s 41713 579086 42193 579156 0 FreeSans 400 0 0 0 analog_noesd_io[30] +flabel metal3 s 41713 579014 42193 579228 0 FreeSans 400 0 0 0 analog_noesd_io[30] port 919 nsew -flabel metal3 s 41713 535886 42193 535956 0 FreeSans 400 0 0 0 analog_noesd_io[31] -port 918 nsew -flabel metal3 s 41713 408286 42193 408356 0 FreeSans 400 0 0 0 analog_noesd_io[32] +flabel metal3 s 41713 408214 42193 408428 0 FreeSans 400 0 0 0 analog_noesd_io[32] port 917 nsew -flabel metal3 s 41713 365086 42193 365156 0 FreeSans 400 0 0 0 analog_noesd_io[33] +flabel metal3 s 41713 365014 42193 365228 0 FreeSans 400 0 0 0 analog_noesd_io[33] port 916 nsew -flabel metal3 s 41713 321886 42193 321956 0 FreeSans 400 0 0 0 analog_noesd_io[34] +flabel metal3 s 41713 321814 42193 322028 0 FreeSans 400 0 0 0 analog_noesd_io[34] port 915 nsew -flabel metal3 s 41713 278686 42193 278756 0 FreeSans 400 0 0 0 analog_noesd_io[35] +flabel metal3 s 41713 278614 42193 278828 0 FreeSans 400 0 0 0 analog_noesd_io[35] port 914 nsew -flabel metal3 s 41713 235486 42193 235556 0 FreeSans 400 0 0 0 analog_noesd_io[36] +flabel metal3 s 41713 235414 42193 235628 0 FreeSans 400 0 0 0 analog_noesd_io[36] port 913 nsew -flabel metal3 s 41713 192286 42193 192356 0 FreeSans 400 0 0 0 analog_noesd_io[37] +flabel metal3 s 41713 192214 42193 192428 0 FreeSans 400 0 0 0 analog_noesd_io[37] port 912 nsew -flabel metal2 s 191651 41713 191707 42193 0 FreeSans 400 90 0 0 analog_noesd_io[38] +flabel metal2 s 191572 41713 191786 42193 0 FreeSans 400 90 0 0 analog_noesd_io[38] port 911 nsew -flabel metal2 s 300251 41713 300307 42193 0 FreeSans 400 90 0 0 analog_noesd_io[39] +flabel metal2 s 300172 41713 300386 42193 0 FreeSans 400 90 0 0 analog_noesd_io[39] port 910 nsew -flabel metal2 s 355051 41713 355107 42193 0 FreeSans 400 90 0 0 analog_noesd_io[40] +flabel metal2 s 354972 41713 355186 42193 0 FreeSans 400 90 0 0 analog_noesd_io[40] port 909 nsew -flabel metal2 s 409851 41713 409907 42193 0 FreeSans 400 90 0 0 analog_noesd_io[41] +flabel metal2 s 409772 41713 409986 42193 0 FreeSans 400 90 0 0 analog_noesd_io[41] port 908 nsew -flabel metal2 s 464651 41713 464707 42193 0 FreeSans 400 90 0 0 analog_noesd_io[42] +flabel metal2 s 464572 41713 464786 42193 0 FreeSans 400 90 0 0 analog_noesd_io[42] port 907 nsew -flabel metal2 s 519451 41713 519507 42193 0 FreeSans 400 90 0 0 analog_noesd_io[43] +flabel metal2 s 519372 41713 519586 42193 0 FreeSans 400 90 0 0 analog_noesd_io[43] port 906 nsew flabel metal3 41873 948781 42193 948841 0 FreeSans 400 0 0 0 gpio_loopback_one[24] port 837 nsew @@ -11178,22 +8749,6 @@ flabel metal2 122835 995407 122896 995727 0 FreeSans 400 90 0 0 gpio_loopback_on port 839 nsew flabel metal2 71635 995407 71696 995727 0 FreeSans 400 90 0 0 gpio_loopback_one[23] port 838 nsew -flabel metal3 675407 969142 675727 969204 0 FreeSans 400 0 0 0 gpio_loopback_one[14] -port 847 nsew -flabel metal3 675407 879142 675727 879204 0 FreeSans 400 0 0 0 gpio_loopback_one[13] -port 848 nsew -flabel metal3 675407 790142 675727 790204 0 FreeSans 400 0 0 0 gpio_loopback_one[12] -port 849 nsew -flabel metal3 675407 745142 675727 745204 0 FreeSans 400 0 0 0 gpio_loopback_one[11] -port 850 nsew -flabel metal3 675407 700142 675727 700204 0 FreeSans 400 0 0 0 gpio_loopback_one[10] -port 851 nsew -flabel metal3 675407 655142 675727 655204 0 FreeSans 400 0 0 0 gpio_loopback_one[9] -port 852 nsew -flabel metal3 675407 610142 675727 610204 0 FreeSans 400 0 0 0 gpio_loopback_one[8] -port 853 nsew -flabel metal3 675407 565142 675727 565204 0 FreeSans 400 0 0 0 gpio_loopback_one[7] -port 854 nsew flabel metal3 675407 388142 675727 388204 0 FreeSans 400 0 0 0 gpio_loopback_one[6] port 855 nsew flabel metal3 675407 343142 675727 343204 0 FreeSans 400 0 0 0 gpio_loopback_one[5] @@ -11210,52 +8765,16 @@ flabel metal3 675407 118142 675727 118204 0 FreeSans 400 0 0 0 gpio_loopback_one port 861 nsew flabel metal3 632921 41693 637701 42193 0 FreeSans 3200 0 0 0 vdda port 22 nsew -flabel metal3 622942 41693 627722 42193 0 FreeSans 3200 0 0 0 vdda -port 22 nsew -flabel metal3 569142 41693 573922 42193 0 FreeSans 3200 0 0 0 vssio -port 19 nsew flabel metal3 579121 41693 583901 42193 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 241420 41693 246049 42193 0 FreeSans 3200 0 0 0 vssd -port 21 nsew -flabel metal3 251300 41693 256100 42193 0 FreeSans 3200 0 0 0 vssd -port 21 nsew -flabel metal3 78942 41693 83722 42193 0 FreeSans 3200 0 0 0 vssa -port 23 nsew -flabel metal3 88921 41694 93701 42194 0 FreeSans 3200 0 0 0 vssa -port 23 nsew -flabel metal3 41693 68100 42193 72900 0 FreeSans 3200 90 0 0 vccd -port 20 nsew -flabel metal3 41693 78151 42193 82940 0 FreeSans 3200 90 0 0 vccd -port 20 nsew flabel metal3 41693 110299 42193 115079 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 41693 120278 42193 125058 0 FreeSans 3200 90 0 0 vddio -port 18 nsew -flabel metal3 41693 440900 42193 445700 0 FreeSans 3200 90 0 0 vssd2 -port 31 nsew -flabel metal3 41693 450951 42193 455740 0 FreeSans 3200 90 0 0 vssd2 -port 31 nsew -flabel metal3 41693 446000 42193 450651 0 FreeSans 3200 90 0 0 vccd2 -port 29 nsew flabel metal3 41693 483099 42193 487879 0 FreeSans 3200 90 0 0 vdda2 port 25 nsew -flabel metal3 41693 493078 42193 497858 0 FreeSans 3200 90 0 0 vdda2 -port 25 nsew flabel metal3 41693 827699 42193 832479 0 FreeSans 3200 90 0 0 vssa2 port 27 nsew -flabel metal3 41693 837678 42193 842458 0 FreeSans 3200 90 0 0 vssa2 -port 27 nsew flabel metal3 41693 869899 42193 874679 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 41693 879878 42193 884658 0 FreeSans 3200 90 0 0 vddio -port 18 nsew -flabel metal3 41693 912100 42193 916900 0 FreeSans 3200 90 0 0 vccd2 -port 29 nsew -flabel metal3 41693 922151 42193 926940 0 FreeSans 3200 90 0 0 vccd2 -port 29 nsew -flabel metal3 41693 917190 42193 921852 0 FreeSans 3200 90 0 0 vssd2 -port 31 nsew flabel metal3 333499 995407 338279 995907 0 FreeSans 3200 0 0 0 vssio port 19 nsew flabel metal3 343478 995407 348258 995907 0 FreeSans 3200 0 0 0 vssio @@ -11264,30 +8783,12 @@ flabel metal3 s 575699 995407 580479 995907 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew flabel metal3 s 585678 995407 590458 995907 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 s 675407 415742 675907 420522 0 FreeSans 3200 0 0 0 vssa1 -port 26 nsew flabel metal3 s 675407 425721 675907 430501 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 s 675407 503942 675907 508722 0 FreeSans 3200 0 0 0 vdda1 -port 24 nsew flabel metal3 s 675407 513921 675907 518701 0 FreeSans 3200 0 0 0 vdda1 port 24 nsew -flabel metal3 s 675407 818542 675907 823322 0 FreeSans 3200 0 0 0 vdda1 -port 24 nsew flabel metal3 s 675407 828521 675907 833301 0 FreeSans 3200 0 0 0 vdda1 port 24 nsew -flabel metal3 s 675407 907660 675907 912449 0 FreeSans 3200 0 0 0 vccd1 -port 28 nsew -flabel metal3 s 675407 917700 675907 922500 0 FreeSans 3200 0 0 0 vccd1 -port 28 nsew -flabel metal3 s 675407 912748 675907 917410 0 FreeSans 3200 0 0 0 vssd1 -port 30 nsew -flabel metal3 675407 459860 675907 464649 0 FreeSans 3200 90 0 0 vssd1 -port 30 nsew -flabel metal3 675407 469900 675907 474700 0 FreeSans 3200 90 0 0 vssd1 -port 30 nsew -flabel metal3 675407 464949 675907 469600 0 FreeSans 3200 90 0 0 vccd1 -port 28 nsew flabel metal2 s 648115 41877 648167 42193 0 FreeSans 400 90 0 0 mask_rev[4] port 65 nsew flabel metal2 s 648339 41877 648391 42193 0 FreeSans 400 90 0 0 mask_rev[5] @@ -11352,32 +8853,6 @@ flabel metal2 s 647443 41877 647495 42193 0 FreeSans 400 90 0 0 mask_rev[1] port 68 nsew flabel metal5 s 698512 952840 711002 965360 0 FreeSans 16000 0 0 0 gpio[14] port 99 nsew -flabel metal3 675407 120144 675727 120206 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] -port 817 nsew -flabel metal3 675407 165144 675727 165206 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] -port 816 nsew -flabel metal3 675407 210144 675727 210206 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] -port 815 nsew -flabel metal3 675407 255144 675727 255206 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] -port 814 nsew -flabel metal3 675407 300144 675727 300206 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] -port 813 nsew -flabel metal3 675407 345144 675727 345206 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] -port 812 nsew -flabel metal3 675407 390144 675727 390206 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] -port 811 nsew -flabel metal3 675407 567144 675727 567206 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] -port 810 nsew -flabel metal3 675407 612144 675727 612206 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] -port 809 nsew -flabel metal3 675407 657144 675727 657206 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] -port 808 nsew -flabel metal3 675407 702144 675727 702206 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] -port 807 nsew -flabel metal3 675407 747144 675727 747206 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] -port 806 nsew -flabel metal3 675407 792144 675727 792206 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] -port 805 nsew flabel metal3 675407 881144 675727 881206 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] port 804 nsew flabel metal3 675407 971144 675727 971206 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] @@ -11428,14 +8903,992 @@ flabel metal2 519034 995407 519095 995727 0 FreeSans 400 90 0 0 gpio_loopback_ze port 801 nsew flabel metal2 618434 995407 618495 995727 0 FreeSans 400 90 0 0 gpio_loopback_zero[15] port 802 nsew -flabel metal3 s 675407 114444 675887 114514 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] +flabel metal3 s 41713 194097 42193 194225 0 FreeSans 400 0 0 0 analog_io[37] +port 868 nsew +flabel metal2 s 298375 41713 298503 42193 0 FreeSans 400 90 0 0 analog_io[39] +port 866 nsew +flabel metal2 192847 41713 192903 42193 0 FreeSans 400 270 0 0 gpio_dm0[38] +port 559 nsew +flabel metal2 191007 41713 191063 42193 0 FreeSans 400 270 0 0 gpio_dm1[38] +port 603 nsew +flabel metal3 88921 41693 93701 42193 0 FreeSans 3200 0 0 0 vssa +port 23 nsew +flabel metal3 s 41713 535814 42193 536028 0 FreeSans 400 0 0 0 analog_noesd_io[31] +port 918 nsew +flabel metal3 s 41713 665414 42193 665628 0 FreeSans 400 0 0 0 analog_noesd_io[28] +port 921 nsew +flabel metal3 s 41713 753697 42193 753825 0 FreeSans 400 0 0 0 analog_io[26] +port 879 nsew +flabel metal3 675407 240572 675887 240786 0 FreeSans 400 0 0 0 analog_noesd_io[3] +port 946 nsew +flabel metal3 s 675407 100921 675887 100991 0 FreeSans 400 0 0 0 gpio_in[0] +port 729 nsew +flabel metal3 s 675407 102761 675887 102831 0 FreeSans 400 0 0 0 gpio_slow_sel[0] +port 377 nsew +flabel metal3 s 675407 104601 675887 104671 0 FreeSans 400 0 0 0 gpio_dm1[0] +port 641 nsew +flabel metal3 s 675407 105797 675887 105867 0 FreeSans 400 0 0 0 gpio_analog_en[0] +port 465 nsew +flabel metal3 s 675407 107085 675887 107155 0 FreeSans 400 0 0 0 gpio_analog_pol[0] +port 553 nsew +flabel metal3 s 675407 110121 675887 110191 0 FreeSans 400 0 0 0 gpio_analog_sel[0] +port 509 nsew +flabel metal3 s 675407 106441 675887 106511 0 FreeSans 400 0 0 0 gpio_dm0[0] +port 597 nsew +flabel metal3 s 675407 110765 675887 110835 0 FreeSans 400 0 0 0 gpio_dm2[0] +port 685 nsew +flabel metal3 s 675407 111409 675887 111479 0 FreeSans 400 0 0 0 gpio_holdover[0] +port 421 nsew +flabel metal3 s 675407 107637 675887 107707 0 FreeSans 400 0 0 0 gpio_inp_dis[0] +port 245 nsew +flabel metal3 s 675407 115089 675887 115159 0 FreeSans 400 0 0 0 gpio_oeb[0] +port 201 nsew +flabel metal3 s 675407 111961 675887 112031 0 FreeSans 400 0 0 0 gpio_out[0] +port 157 nsew +flabel metal3 675407 115641 675887 115711 0 FreeSans 400 0 0 0 gpio_in_h[0] +port 773 nsew +flabel metal3 s 675407 114445 675887 114515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] port 289 nsew -flabel metal3 s 675407 113800 675887 113870 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] +flabel metal3 s 675407 113801 675887 113871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] port 333 nsew -flabel metal3 675407 240644 675887 240714 0 FreeSans 400 0 0 0 analog_noesd_io[3] -port 946 nsew -flabel metal3 s 675407 326320 675887 326390 0 FreeSans 400 0 0 0 gpio_in[5] +flabel metal3 675407 120143 675727 120205 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] +port 817 nsew +flabel metal3 s 675407 967241 675887 967311 0 FreeSans 400 0 0 0 gpio_in_h[14] +port 759 nsew +flabel metal3 s 675407 965401 675887 965471 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] +port 319 nsew +flabel metal3 s 675407 963561 675887 963631 0 FreeSans 400 0 0 0 gpio_out[14] +port 143 nsew +flabel metal3 s 675407 966689 675887 966759 0 FreeSans 400 0 0 0 gpio_oeb[14] +port 187 nsew +flabel metal3 s 675407 959237 675887 959307 0 FreeSans 400 0 0 0 gpio_inp_dis[14] +port 231 nsew +flabel metal3 s 675407 966045 675887 966115 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] +port 275 nsew +flabel metal3 s 675407 963009 675887 963079 0 FreeSans 400 0 0 0 gpio_holdover[14] +port 407 nsew +flabel metal3 s 675407 962365 675887 962435 0 FreeSans 400 0 0 0 gpio_dm2[14] +port 671 nsew +flabel metal3 s 675407 958041 675887 958111 0 FreeSans 400 0 0 0 gpio_dm0[14] +port 583 nsew +flabel metal3 s 675407 961721 675887 961791 0 FreeSans 400 0 0 0 gpio_analog_sel[14] +port 495 nsew +flabel metal3 s 675407 958685 675887 958755 0 FreeSans 400 0 0 0 gpio_analog_pol[14] +port 539 nsew +flabel metal3 s 675407 957397 675887 957467 0 FreeSans 400 0 0 0 gpio_analog_en[14] +port 451 nsew +flabel metal3 s 675407 956201 675887 956271 0 FreeSans 400 0 0 0 gpio_dm1[14] +port 627 nsew +flabel metal3 s 675407 952521 675887 952591 0 FreeSans 400 0 0 0 gpio_in[14] +port 715 nsew +flabel metal3 s 675407 954361 675887 954431 0 FreeSans 400 0 0 0 gpio_slow_sel[14] +port 363 nsew +flabel metal3 s 675407 878041 675887 878111 0 FreeSans 400 0 0 0 gpio_in_h[13] +port 760 nsew +flabel metal3 s 675407 876201 675887 876271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] +port 320 nsew +flabel metal3 s 675407 874361 675887 874431 0 FreeSans 400 0 0 0 gpio_out[13] +port 144 nsew +flabel metal3 s 675407 877489 675887 877559 0 FreeSans 400 0 0 0 gpio_oeb[13] +port 188 nsew +flabel metal3 s 675407 870037 675887 870107 0 FreeSans 400 0 0 0 gpio_inp_dis[13] +port 232 nsew +flabel metal3 s 675407 876845 675887 876915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] +port 276 nsew +flabel metal3 s 675407 873809 675887 873879 0 FreeSans 400 0 0 0 gpio_holdover[13] +port 408 nsew +flabel metal3 s 675407 873165 675887 873235 0 FreeSans 400 0 0 0 gpio_dm2[13] +port 672 nsew +flabel metal3 s 675407 868841 675887 868911 0 FreeSans 400 0 0 0 gpio_dm0[13] +port 584 nsew +flabel metal3 s 675407 872521 675887 872591 0 FreeSans 400 0 0 0 gpio_analog_sel[13] +port 496 nsew +flabel metal3 s 675407 869485 675887 869555 0 FreeSans 400 0 0 0 gpio_analog_pol[13] +port 540 nsew +flabel metal3 s 675407 868197 675887 868267 0 FreeSans 400 0 0 0 gpio_analog_en[13] +port 452 nsew +flabel metal3 s 675407 867001 675887 867071 0 FreeSans 400 0 0 0 gpio_dm1[13] +port 628 nsew +flabel metal3 s 675407 863321 675887 863391 0 FreeSans 400 0 0 0 gpio_in[13] +port 716 nsew +flabel metal3 s 675407 865161 675887 865231 0 FreeSans 400 0 0 0 gpio_slow_sel[13] +port 364 nsew +flabel metal3 s 675407 788841 675887 788911 0 FreeSans 400 0 0 0 gpio_in_h[12] +port 761 nsew +flabel metal3 s 675407 787001 675887 787071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] +port 321 nsew +flabel metal3 s 675407 785161 675887 785231 0 FreeSans 400 0 0 0 gpio_out[12] +port 145 nsew +flabel metal3 s 675407 788289 675887 788359 0 FreeSans 400 0 0 0 gpio_oeb[12] +port 189 nsew +flabel metal3 s 675407 780837 675887 780907 0 FreeSans 400 0 0 0 gpio_inp_dis[12] +port 233 nsew +flabel metal3 s 675407 787645 675887 787715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] +port 277 nsew +flabel metal3 s 675407 784609 675887 784679 0 FreeSans 400 0 0 0 gpio_holdover[12] +port 409 nsew +flabel metal3 s 675407 783965 675887 784035 0 FreeSans 400 0 0 0 gpio_dm2[12] +port 673 nsew +flabel metal3 s 675407 779641 675887 779711 0 FreeSans 400 0 0 0 gpio_dm0[12] +port 585 nsew +flabel metal3 s 675407 783321 675887 783391 0 FreeSans 400 0 0 0 gpio_analog_sel[12] +port 497 nsew +flabel metal3 s 675407 780285 675887 780355 0 FreeSans 400 0 0 0 gpio_analog_pol[12] +port 541 nsew +flabel metal3 s 675407 778997 675887 779067 0 FreeSans 400 0 0 0 gpio_analog_en[12] +port 453 nsew +flabel metal3 s 675407 777801 675887 777871 0 FreeSans 400 0 0 0 gpio_dm1[12] +port 629 nsew +flabel metal3 s 675407 774121 675887 774191 0 FreeSans 400 0 0 0 gpio_in[12] +port 717 nsew +flabel metal3 s 675407 775961 675887 776031 0 FreeSans 400 0 0 0 gpio_slow_sel[12] +port 365 nsew +flabel metal3 s 675407 743841 675887 743911 0 FreeSans 400 0 0 0 gpio_in_h[11] +port 762 nsew +flabel metal3 s 675407 738965 675887 739035 0 FreeSans 400 0 0 0 gpio_dm2[11] +port 674 nsew +flabel metal3 s 675407 734641 675887 734711 0 FreeSans 400 0 0 0 gpio_dm0[11] +port 586 nsew +flabel metal3 s 675407 738321 675887 738391 0 FreeSans 400 0 0 0 gpio_analog_sel[11] +port 498 nsew +flabel metal3 s 675407 735285 675887 735355 0 FreeSans 400 0 0 0 gpio_analog_pol[11] +port 542 nsew +flabel metal3 s 675407 733997 675887 734067 0 FreeSans 400 0 0 0 gpio_analog_en[11] +port 454 nsew +flabel metal3 s 675407 742001 675887 742071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] +port 322 nsew +flabel metal3 s 675407 740161 675887 740231 0 FreeSans 400 0 0 0 gpio_out[11] +port 146 nsew +flabel metal3 s 675407 743289 675887 743359 0 FreeSans 400 0 0 0 gpio_oeb[11] +port 190 nsew +flabel metal3 s 675407 735837 675887 735907 0 FreeSans 400 0 0 0 gpio_inp_dis[11] +port 234 nsew +flabel metal3 s 675407 742645 675887 742715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] +port 278 nsew +flabel metal3 s 675407 739609 675887 739679 0 FreeSans 400 0 0 0 gpio_holdover[11] +port 410 nsew +flabel metal3 s 675407 732801 675887 732871 0 FreeSans 400 0 0 0 gpio_dm1[11] +port 630 nsew +flabel metal3 s 675407 729121 675887 729191 0 FreeSans 400 0 0 0 gpio_in[11] +port 718 nsew +flabel metal3 s 675407 730961 675887 731031 0 FreeSans 400 0 0 0 gpio_slow_sel[11] +port 366 nsew +flabel metal3 s 675407 698841 675887 698911 0 FreeSans 400 0 0 0 gpio_in_h[10] +port 763 nsew +flabel metal3 s 675407 697001 675887 697071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] +port 323 nsew +flabel metal3 s 675407 695161 675887 695231 0 FreeSans 400 0 0 0 gpio_out[10] +port 147 nsew +flabel metal3 s 675407 698289 675887 698359 0 FreeSans 400 0 0 0 gpio_oeb[10] +port 191 nsew +flabel metal3 s 675407 690837 675887 690907 0 FreeSans 400 0 0 0 gpio_inp_dis[10] +port 235 nsew +flabel metal3 s 675407 697645 675887 697715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] +port 279 nsew +flabel metal3 s 675407 694609 675887 694679 0 FreeSans 400 0 0 0 gpio_holdover[10] +port 411 nsew +flabel metal3 s 675407 693965 675887 694035 0 FreeSans 400 0 0 0 gpio_dm2[10] +port 675 nsew +flabel metal3 s 675407 689641 675887 689711 0 FreeSans 400 0 0 0 gpio_dm0[10] +port 587 nsew +flabel metal3 s 675407 693321 675887 693391 0 FreeSans 400 0 0 0 gpio_analog_sel[10] +port 499 nsew +flabel metal3 s 675407 690285 675887 690355 0 FreeSans 400 0 0 0 gpio_analog_pol[10] +port 543 nsew +flabel metal3 s 675407 688997 675887 689067 0 FreeSans 400 0 0 0 gpio_analog_en[10] +port 455 nsew +flabel metal3 s 675407 687801 675887 687871 0 FreeSans 400 0 0 0 gpio_dm1[10] +port 631 nsew +flabel metal3 s 675407 684121 675887 684191 0 FreeSans 400 0 0 0 gpio_in[10] +port 719 nsew +flabel metal3 s 675407 685961 675887 686031 0 FreeSans 400 0 0 0 gpio_slow_sel[10] +port 367 nsew +flabel metal3 s 675407 653641 675887 653711 0 FreeSans 400 0 0 0 gpio_in_h[9] +port 764 nsew +flabel metal3 s 675407 651801 675887 651871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] +port 324 nsew +flabel metal3 s 675407 649961 675887 650031 0 FreeSans 400 0 0 0 gpio_out[9] +port 148 nsew +flabel metal3 s 675407 653089 675887 653159 0 FreeSans 400 0 0 0 gpio_oeb[9] +port 192 nsew +flabel metal3 s 675407 645637 675887 645707 0 FreeSans 400 0 0 0 gpio_inp_dis[9] +port 236 nsew +flabel metal3 s 675407 652445 675887 652515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] +port 280 nsew +flabel metal3 s 675407 649409 675887 649479 0 FreeSans 400 0 0 0 gpio_holdover[9] +port 412 nsew +flabel metal3 s 675407 648765 675887 648835 0 FreeSans 400 0 0 0 gpio_dm2[9] +port 676 nsew +flabel metal3 s 675407 644441 675887 644511 0 FreeSans 400 0 0 0 gpio_dm0[9] +port 588 nsew +flabel metal3 s 675407 648121 675887 648191 0 FreeSans 400 0 0 0 gpio_analog_sel[9] +port 500 nsew +flabel metal3 s 675407 645085 675887 645155 0 FreeSans 400 0 0 0 gpio_analog_pol[9] +port 544 nsew +flabel metal3 s 675407 643797 675887 643867 0 FreeSans 400 0 0 0 gpio_analog_en[9] +port 456 nsew +flabel metal3 s 675407 642601 675887 642671 0 FreeSans 400 0 0 0 gpio_dm1[9] +port 632 nsew +flabel metal3 s 675407 638921 675887 638991 0 FreeSans 400 0 0 0 gpio_in[9] +port 720 nsew +flabel metal3 s 675407 640761 675887 640831 0 FreeSans 400 0 0 0 gpio_slow_sel[9] +port 368 nsew +flabel metal3 s 675407 608641 675887 608711 0 FreeSans 400 0 0 0 gpio_in_h[8] +port 765 nsew +flabel metal3 s 675407 606801 675887 606871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] +port 325 nsew +flabel metal3 s 675407 604961 675887 605031 0 FreeSans 400 0 0 0 gpio_out[8] +port 149 nsew +flabel metal3 s 675407 608089 675887 608159 0 FreeSans 400 0 0 0 gpio_oeb[8] +port 193 nsew +flabel metal3 s 675407 600637 675887 600707 0 FreeSans 400 0 0 0 gpio_inp_dis[8] +port 237 nsew +flabel metal3 s 675407 607445 675887 607515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] +port 281 nsew +flabel metal3 s 675407 604409 675887 604479 0 FreeSans 400 0 0 0 gpio_holdover[8] +port 413 nsew +flabel metal3 s 675407 603765 675887 603835 0 FreeSans 400 0 0 0 gpio_dm2[8] +port 677 nsew +flabel metal3 s 675407 599441 675887 599511 0 FreeSans 400 0 0 0 gpio_dm0[8] +port 589 nsew +flabel metal3 s 675407 603121 675887 603191 0 FreeSans 400 0 0 0 gpio_analog_sel[8] +port 501 nsew +flabel metal3 s 675407 600085 675887 600155 0 FreeSans 400 0 0 0 gpio_analog_pol[8] +port 545 nsew +flabel metal3 s 675407 598797 675887 598867 0 FreeSans 400 0 0 0 gpio_analog_en[8] +port 457 nsew +flabel metal3 s 675407 597601 675887 597671 0 FreeSans 400 0 0 0 gpio_dm1[8] +port 633 nsew +flabel metal3 s 675407 593921 675887 593991 0 FreeSans 400 0 0 0 gpio_in[8] +port 721 nsew +flabel metal3 s 675407 595761 675887 595831 0 FreeSans 400 0 0 0 gpio_slow_sel[8] +port 369 nsew +flabel metal3 s 675407 563441 675887 563511 0 FreeSans 400 0 0 0 gpio_in_h[7] +port 766 nsew +flabel metal3 s 675407 561601 675887 561671 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] +port 326 nsew +flabel metal3 s 675407 559761 675887 559831 0 FreeSans 400 0 0 0 gpio_out[7] +port 150 nsew +flabel metal3 s 675407 562889 675887 562959 0 FreeSans 400 0 0 0 gpio_oeb[7] +port 194 nsew +flabel metal3 s 675407 555437 675887 555507 0 FreeSans 400 0 0 0 gpio_inp_dis[7] +port 238 nsew +flabel metal3 s 675407 562245 675887 562315 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] +port 282 nsew +flabel metal3 s 675407 559209 675887 559279 0 FreeSans 400 0 0 0 gpio_holdover[7] +port 414 nsew +flabel metal3 s 675407 558565 675887 558635 0 FreeSans 400 0 0 0 gpio_dm2[7] +port 678 nsew +flabel metal3 s 675407 554241 675887 554311 0 FreeSans 400 0 0 0 gpio_dm0[7] +port 590 nsew +flabel metal3 s 675407 557921 675887 557991 0 FreeSans 400 0 0 0 gpio_analog_sel[7] +port 502 nsew +flabel metal3 s 675407 554885 675887 554955 0 FreeSans 400 0 0 0 gpio_analog_pol[7] +port 546 nsew +flabel metal3 s 675407 553597 675887 553667 0 FreeSans 400 0 0 0 gpio_analog_en[7] +port 458 nsew +flabel metal3 s 675407 552401 675887 552471 0 FreeSans 400 0 0 0 gpio_dm1[7] +port 634 nsew +flabel metal3 s 675407 548721 675887 548791 0 FreeSans 400 0 0 0 gpio_in[7] +port 722 nsew +flabel metal3 s 675407 550561 675887 550631 0 FreeSans 400 0 0 0 gpio_slow_sel[7] +port 370 nsew +flabel metal3 675407 386241 675887 386311 0 FreeSans 400 0 0 0 gpio_in_h[6] +port 767 nsew +flabel metal3 s 675407 384401 675887 384471 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] +port 327 nsew +flabel metal3 s 675407 382561 675887 382631 0 FreeSans 400 0 0 0 gpio_out[6] +port 151 nsew +flabel metal3 s 675407 385689 675887 385759 0 FreeSans 400 0 0 0 gpio_oeb[6] +port 195 nsew +flabel metal3 s 675407 378237 675887 378307 0 FreeSans 400 0 0 0 gpio_inp_dis[6] +port 239 nsew +flabel metal3 s 675407 385045 675887 385115 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] +port 283 nsew +flabel metal3 s 675407 382009 675887 382079 0 FreeSans 400 0 0 0 gpio_holdover[6] +port 415 nsew +flabel metal3 s 675407 381365 675887 381435 0 FreeSans 400 0 0 0 gpio_dm2[6] +port 679 nsew +flabel metal3 s 675407 377041 675887 377111 0 FreeSans 400 0 0 0 gpio_dm0[6] +port 591 nsew +flabel metal3 s 675407 380721 675887 380791 0 FreeSans 400 0 0 0 gpio_analog_sel[6] +port 503 nsew +flabel metal3 s 675407 377685 675887 377755 0 FreeSans 400 0 0 0 gpio_analog_pol[6] +port 547 nsew +flabel metal3 s 675407 376397 675887 376467 0 FreeSans 400 0 0 0 gpio_analog_en[6] +port 459 nsew +flabel metal3 s 675407 375201 675887 375271 0 FreeSans 400 0 0 0 gpio_dm1[6] +port 635 nsew +flabel metal3 s 675407 371521 675887 371591 0 FreeSans 400 0 0 0 gpio_in[6] +port 723 nsew +flabel metal3 s 675407 373361 675887 373431 0 FreeSans 400 0 0 0 gpio_slow_sel[6] +port 371 nsew +flabel metal3 675407 341041 675887 341111 0 FreeSans 400 0 0 0 gpio_in_h[5] +port 768 nsew +flabel metal3 s 675407 339201 675887 339271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] +port 328 nsew +flabel metal3 s 675407 337361 675887 337431 0 FreeSans 400 0 0 0 gpio_out[5] +port 152 nsew +flabel metal3 s 675407 340489 675887 340559 0 FreeSans 400 0 0 0 gpio_oeb[5] +port 196 nsew +flabel metal3 s 675407 333037 675887 333107 0 FreeSans 400 0 0 0 gpio_inp_dis[5] +port 240 nsew +flabel metal3 s 675407 339845 675887 339915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] +port 284 nsew +flabel metal3 s 675407 336809 675887 336879 0 FreeSans 400 0 0 0 gpio_holdover[5] +port 416 nsew +flabel metal3 s 675407 336165 675887 336235 0 FreeSans 400 0 0 0 gpio_dm2[5] +port 680 nsew +flabel metal3 s 675407 331841 675887 331911 0 FreeSans 400 0 0 0 gpio_dm0[5] +port 592 nsew +flabel metal3 s 675407 335521 675887 335591 0 FreeSans 400 0 0 0 gpio_analog_sel[5] +port 504 nsew +flabel metal3 s 675407 332485 675887 332555 0 FreeSans 400 0 0 0 gpio_analog_pol[5] +port 548 nsew +flabel metal3 s 675407 331197 675887 331267 0 FreeSans 400 0 0 0 gpio_analog_en[5] +port 460 nsew +flabel metal3 s 675407 330001 675887 330071 0 FreeSans 400 0 0 0 gpio_dm1[5] +port 636 nsew +flabel metal3 s 675407 326321 675887 326391 0 FreeSans 400 0 0 0 gpio_in[5] port 724 nsew +flabel metal3 s 675407 328161 675887 328231 0 FreeSans 400 0 0 0 gpio_slow_sel[5] +port 372 nsew +flabel metal3 675407 296041 675887 296111 0 FreeSans 400 0 0 0 gpio_in_h[4] +port 769 nsew +flabel metal3 s 675407 294201 675887 294271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] +port 329 nsew +flabel metal3 s 675407 292361 675887 292431 0 FreeSans 400 0 0 0 gpio_out[4] +port 153 nsew +flabel metal3 s 675407 295489 675887 295559 0 FreeSans 400 0 0 0 gpio_oeb[4] +port 197 nsew +flabel metal3 s 675407 288037 675887 288107 0 FreeSans 400 0 0 0 gpio_inp_dis[4] +port 241 nsew +flabel metal3 s 675407 294845 675887 294915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] +port 285 nsew +flabel metal3 s 675407 291809 675887 291879 0 FreeSans 400 0 0 0 gpio_holdover[4] +port 417 nsew +flabel metal3 s 675407 291165 675887 291235 0 FreeSans 400 0 0 0 gpio_dm2[4] +port 681 nsew +flabel metal3 s 675407 286841 675887 286911 0 FreeSans 400 0 0 0 gpio_dm0[4] +port 593 nsew +flabel metal3 s 675407 290521 675887 290591 0 FreeSans 400 0 0 0 gpio_analog_sel[4] +port 505 nsew +flabel metal3 s 675407 287485 675887 287555 0 FreeSans 400 0 0 0 gpio_analog_pol[4] +port 549 nsew +flabel metal3 s 675407 286197 675887 286267 0 FreeSans 400 0 0 0 gpio_analog_en[4] +port 461 nsew +flabel metal3 s 675407 285001 675887 285071 0 FreeSans 400 0 0 0 gpio_dm1[4] +port 637 nsew +flabel metal3 s 675407 281321 675887 281391 0 FreeSans 400 0 0 0 gpio_in[4] +port 725 nsew +flabel metal3 s 675407 283161 675887 283231 0 FreeSans 400 0 0 0 gpio_slow_sel[4] +port 373 nsew +flabel metal3 675407 251041 675887 251111 0 FreeSans 400 0 0 0 gpio_in_h[3] +port 770 nsew +flabel metal3 s 675407 249201 675887 249271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] +port 330 nsew +flabel metal3 s 675407 247361 675887 247431 0 FreeSans 400 0 0 0 gpio_out[3] +port 154 nsew +flabel metal3 s 675407 250489 675887 250559 0 FreeSans 400 0 0 0 gpio_oeb[3] +port 198 nsew +flabel metal3 s 675407 243037 675887 243107 0 FreeSans 400 0 0 0 gpio_inp_dis[3] +port 242 nsew +flabel metal3 s 675407 249845 675887 249915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] +port 286 nsew +flabel metal3 s 675407 246809 675887 246879 0 FreeSans 400 0 0 0 gpio_holdover[3] +port 418 nsew +flabel metal3 s 675407 241841 675887 241911 0 FreeSans 400 0 0 0 gpio_dm0[3] +port 594 nsew +flabel metal3 s 675407 246165 675887 246235 0 FreeSans 400 0 0 0 gpio_dm2[3] +port 682 nsew +flabel metal3 s 675407 245521 675887 245591 0 FreeSans 400 0 0 0 gpio_analog_sel[3] +port 506 nsew +flabel metal3 s 675407 242485 675887 242555 0 FreeSans 400 0 0 0 gpio_analog_pol[3] +port 550 nsew +flabel metal3 s 675407 241197 675887 241267 0 FreeSans 400 0 0 0 gpio_analog_en[3] +port 462 nsew +flabel metal3 s 675407 240001 675887 240071 0 FreeSans 400 0 0 0 gpio_dm1[3] +port 638 nsew +flabel metal3 s 675407 236321 675887 236391 0 FreeSans 400 0 0 0 gpio_in[3] +port 726 nsew +flabel metal3 s 675407 238161 675887 238231 0 FreeSans 400 0 0 0 gpio_slow_sel[3] +port 374 nsew +flabel metal3 675407 205841 675887 205911 0 FreeSans 400 0 0 0 gpio_in_h[2] +port 771 nsew +flabel metal3 s 675407 204001 675887 204071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] +port 331 nsew +flabel metal3 s 675407 202161 675887 202231 0 FreeSans 400 0 0 0 gpio_out[2] +port 155 nsew +flabel metal3 s 675407 205289 675887 205359 0 FreeSans 400 0 0 0 gpio_oeb[2] +port 199 nsew +flabel metal3 s 675407 197837 675887 197907 0 FreeSans 400 0 0 0 gpio_inp_dis[2] +port 243 nsew +flabel metal3 s 675407 204645 675887 204715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] +port 287 nsew +flabel metal3 s 675407 201609 675887 201679 0 FreeSans 400 0 0 0 gpio_holdover[2] +port 419 nsew +flabel metal3 s 675407 200965 675887 201035 0 FreeSans 400 0 0 0 gpio_dm2[2] +port 683 nsew +flabel metal3 s 675407 196641 675887 196711 0 FreeSans 400 0 0 0 gpio_dm0[2] +port 595 nsew +flabel metal3 s 675407 200321 675887 200391 0 FreeSans 400 0 0 0 gpio_analog_sel[2] +port 507 nsew +flabel metal3 s 675407 197285 675887 197355 0 FreeSans 400 0 0 0 gpio_analog_pol[2] +port 551 nsew +flabel metal3 s 675407 195997 675887 196067 0 FreeSans 400 0 0 0 gpio_analog_en[2] +port 463 nsew +flabel metal3 s 675407 194801 675887 194871 0 FreeSans 400 0 0 0 gpio_dm1[2] +port 639 nsew +flabel metal3 s 675407 191121 675887 191191 0 FreeSans 400 0 0 0 gpio_in[2] +port 727 nsew +flabel metal3 s 675407 192961 675887 193031 0 FreeSans 400 0 0 0 gpio_slow_sel[2] +port 375 nsew +flabel metal3 675407 160841 675887 160911 0 FreeSans 400 0 0 0 gpio_in_h[1] +port 772 nsew +flabel metal3 s 675407 159001 675887 159071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] +port 332 nsew +flabel metal3 s 675407 157161 675887 157231 0 FreeSans 400 0 0 0 gpio_out[1] +port 156 nsew +flabel metal3 s 675407 160289 675887 160359 0 FreeSans 400 0 0 0 gpio_oeb[1] +port 200 nsew +flabel metal3 s 675407 152837 675887 152907 0 FreeSans 400 0 0 0 gpio_inp_dis[1] +port 244 nsew +flabel metal3 s 675407 159645 675887 159715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] +port 288 nsew +flabel metal3 s 675407 156609 675887 156679 0 FreeSans 400 0 0 0 gpio_holdover[1] +port 420 nsew +flabel metal3 s 675407 155965 675887 156035 0 FreeSans 400 0 0 0 gpio_dm2[1] +port 684 nsew +flabel metal3 s 675407 151641 675887 151711 0 FreeSans 400 0 0 0 gpio_dm0[1] +port 596 nsew +flabel metal3 s 675407 155321 675887 155391 0 FreeSans 400 0 0 0 gpio_analog_sel[1] +port 508 nsew +flabel metal3 s 675407 152285 675887 152355 0 FreeSans 400 0 0 0 gpio_analog_pol[1] +port 552 nsew +flabel metal3 s 675407 150997 675887 151067 0 FreeSans 400 0 0 0 gpio_analog_en[1] +port 464 nsew +flabel metal3 s 675407 149801 675887 149871 0 FreeSans 400 0 0 0 gpio_dm1[1] +port 640 nsew +flabel metal3 s 675407 147961 675887 148031 0 FreeSans 400 0 0 0 gpio_slow_sel[1] +port 376 nsew +flabel metal3 s 675407 146121 675887 146191 0 FreeSans 400 0 0 0 gpio_in[1] +port 728 nsew +flabel metal3 675407 969143 675727 969205 0 FreeSans 400 0 0 0 gpio_loopback_one[14] +port 847 nsew +flabel metal3 675407 879143 675727 879205 0 FreeSans 400 0 0 0 gpio_loopback_one[13] +port 848 nsew +flabel metal3 675407 792143 675727 792205 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] +port 805 nsew +flabel metal3 675407 790143 675727 790205 0 FreeSans 400 0 0 0 gpio_loopback_one[12] +port 849 nsew +flabel metal3 675407 747143 675727 747205 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] +port 806 nsew +flabel metal3 675407 745143 675727 745205 0 FreeSans 400 0 0 0 gpio_loopback_one[11] +port 850 nsew +flabel metal3 675407 702143 675727 702205 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] +port 807 nsew +flabel metal3 675407 700143 675727 700205 0 FreeSans 400 0 0 0 gpio_loopback_one[10] +port 851 nsew +flabel metal3 675407 657143 675727 657205 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] +port 808 nsew +flabel metal3 675407 655143 675727 655205 0 FreeSans 400 0 0 0 gpio_loopback_one[9] +port 852 nsew +flabel metal3 675407 612143 675727 612205 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] +port 809 nsew +flabel metal3 675407 610143 675727 610205 0 FreeSans 400 0 0 0 gpio_loopback_one[8] +port 853 nsew +flabel metal3 675407 567143 675727 567205 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] +port 810 nsew +flabel metal3 675407 565142 675727 565204 0 FreeSans 400 0 0 0 gpio_loopback_one[7] +port 854 nsew +flabel metal3 675407 390143 675727 390205 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] +port 811 nsew +flabel metal3 675407 345143 675727 345205 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] +port 812 nsew +flabel metal3 675407 300143 675727 300205 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] +port 813 nsew +flabel metal3 675407 255143 675727 255205 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] +port 814 nsew +flabel metal3 675407 210143 675727 210205 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] +port 815 nsew +flabel metal3 675407 165143 675727 165205 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] +port 816 nsew +flabel metal3 s 675407 917699 675907 922499 0 FreeSans 3200 0 0 0 vccd1 +port 28 nsew +flabel metal3 s 675407 912747 675907 917409 0 FreeSans 3200 0 0 0 vssd1 +port 30 nsew +flabel metal3 s 675407 907659 675907 912449 0 FreeSans 3200 0 0 0 vccd1 +port 28 nsew +flabel metal3 s 675407 818543 675907 823323 0 FreeSans 3200 0 0 0 vdda1 +port 24 nsew +flabel metal3 s 675407 503941 675907 508721 0 FreeSans 3200 0 0 0 vdda1 +port 24 nsew +flabel metal3 675407 469899 675907 474699 0 FreeSans 3200 90 0 0 vssd1 +port 30 nsew +flabel metal3 675407 464947 675907 469609 0 FreeSans 3200 90 0 0 vccd1 +port 28 nsew +flabel metal3 675407 459859 675907 464649 0 FreeSans 3200 90 0 0 vssd1 +port 30 nsew +flabel metal3 s 675407 415743 675907 420523 0 FreeSans 3200 0 0 0 vssa1 +port 26 nsew +flabel metal3 622943 41693 627723 42193 0 FreeSans 3200 0 0 0 vdda +port 22 nsew +flabel metal3 569143 41693 573923 42193 0 FreeSans 3200 0 0 0 vssio +port 19 nsew +flabel metal3 251301 41693 256101 42193 0 FreeSans 3200 0 0 0 vssd +port 21 nsew +flabel metal3 241421 41693 246051 42193 0 FreeSans 3200 0 0 0 vssd +port 21 nsew +flabel metal3 78943 41693 83723 42193 0 FreeSans 3200 0 0 0 vssa +port 23 nsew +flabel metal3 41693 68099 42193 72899 0 FreeSans 3200 90 0 0 vccd +port 20 nsew +flabel metal3 41693 78151 42193 82941 0 FreeSans 3200 90 0 0 vccd +port 20 nsew +flabel metal3 41693 120277 42193 125057 0 FreeSans 3200 90 0 0 vddio +port 18 nsew +flabel metal3 41693 440899 42193 445699 0 FreeSans 3200 90 0 0 vssd2 +port 31 nsew +flabel metal3 41693 445999 42193 450651 0 FreeSans 3200 90 0 0 vccd2 +port 29 nsew +flabel metal3 41693 450951 42193 455741 0 FreeSans 3200 90 0 0 vssd2 +port 31 nsew +flabel metal3 41693 493077 42193 497857 0 FreeSans 3200 90 0 0 vdda2 +port 25 nsew +flabel metal3 41693 837679 42193 842459 0 FreeSans 3200 90 0 0 vssa2 +port 27 nsew +flabel metal3 41693 879879 42193 884659 0 FreeSans 3200 90 0 0 vddio +port 18 nsew +flabel space 41693 912101 42193 916901 0 FreeSans 3200 90 0 0 vccd2 +port 29 nsew +flabel metal3 41693 917191 42193 921853 0 FreeSans 3200 90 0 0 vssd2 +port 31 nsew +flabel metal3 41693 922151 42193 926941 0 FreeSans 3200 90 0 0 vccd2 +port 29 nsew +flabel metal3 s 41713 799409 42193 799479 0 FreeSans 400 0 0 0 gpio_in[25] +port 704 nsew +flabel metal3 s 41713 797569 42193 797639 0 FreeSans 400 0 0 0 gpio_slow_sel[25] +port 352 nsew +flabel metal3 s 41713 795729 42193 795799 0 FreeSans 400 0 0 0 gpio_dm1[25] +port 616 nsew +flabel metal3 s 41713 784689 42193 784759 0 FreeSans 400 0 0 0 gpio_in_h[25] +port 748 nsew +flabel metal3 s 41713 786529 42193 786599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] +port 308 nsew +flabel metal3 s 41713 788369 42193 788439 0 FreeSans 400 0 0 0 gpio_out[25] +port 132 nsew +flabel metal3 s 41713 785241 42193 785311 0 FreeSans 400 0 0 0 gpio_oeb[25] +port 176 nsew +flabel metal3 s 41713 792693 42193 792763 0 FreeSans 400 0 0 0 gpio_inp_dis[25] +port 220 nsew +flabel metal3 s 41713 785885 42193 785955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] +port 264 nsew +flabel metal3 s 41713 788921 42193 788991 0 FreeSans 400 0 0 0 gpio_holdover[25] +port 396 nsew +flabel metal3 s 41713 789565 42193 789635 0 FreeSans 400 0 0 0 gpio_dm2[25] +port 660 nsew +flabel metal3 s 41713 793889 42193 793959 0 FreeSans 400 0 0 0 gpio_dm0[25] +port 572 nsew +flabel metal3 s 41713 790209 42193 790279 0 FreeSans 400 0 0 0 gpio_analog_sel[25] +port 484 nsew +flabel metal3 s 41713 793245 42193 793315 0 FreeSans 400 0 0 0 gpio_analog_pol[25] +port 528 nsew +flabel metal3 s 41713 794533 42193 794603 0 FreeSans 400 0 0 0 gpio_analog_en[25] +port 440 nsew +flabel metal3 s 41713 756209 42193 756279 0 FreeSans 400 0 0 0 gpio_in[26] +port 703 nsew +flabel metal3 s 41713 754369 42193 754439 0 FreeSans 400 0 0 0 gpio_slow_sel[26] +port 351 nsew +flabel metal3 s 41713 752529 42193 752599 0 FreeSans 400 0 0 0 gpio_dm1[26] +port 615 nsew +flabel metal3 s 41713 741489 42193 741559 0 FreeSans 400 0 0 0 gpio_in_h[26] +port 747 nsew +flabel metal3 s 41713 743329 42193 743399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] +port 307 nsew +flabel metal3 s 41713 745169 42193 745239 0 FreeSans 400 0 0 0 gpio_out[26] +port 131 nsew +flabel metal3 s 41713 742041 42193 742111 0 FreeSans 400 0 0 0 gpio_oeb[26] +port 175 nsew +flabel metal3 s 41713 749493 42193 749563 0 FreeSans 400 0 0 0 gpio_inp_dis[26] +port 219 nsew +flabel metal3 s 41713 742685 42193 742755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] +port 263 nsew +flabel metal3 s 41713 745721 42193 745791 0 FreeSans 400 0 0 0 gpio_holdover[26] +port 395 nsew +flabel metal3 s 41713 746365 42193 746435 0 FreeSans 400 0 0 0 gpio_dm2[26] +port 659 nsew +flabel metal3 s 41713 750689 42193 750759 0 FreeSans 400 0 0 0 gpio_dm0[26] +port 571 nsew +flabel metal3 s 41713 747009 42193 747079 0 FreeSans 400 0 0 0 gpio_analog_sel[26] +port 483 nsew +flabel metal3 s 41713 750045 42193 750115 0 FreeSans 400 0 0 0 gpio_analog_pol[26] +port 527 nsew +flabel metal3 s 41713 751333 42193 751403 0 FreeSans 400 0 0 0 gpio_analog_en[26] +port 439 nsew +flabel metal3 s 41713 713009 42193 713079 0 FreeSans 400 0 0 0 gpio_in[27] +port 702 nsew +flabel metal3 s 41713 711169 42193 711239 0 FreeSans 400 0 0 0 gpio_slow_sel[27] +port 350 nsew +flabel metal3 s 41713 709329 42193 709399 0 FreeSans 400 0 0 0 gpio_dm1[27] +port 614 nsew +flabel metal3 s 41713 698289 42193 698359 0 FreeSans 400 0 0 0 gpio_in_h[27] +port 746 nsew +flabel metal3 s 41713 700129 42193 700199 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] +port 306 nsew +flabel metal3 s 41713 701969 42193 702039 0 FreeSans 400 0 0 0 gpio_out[27] +port 130 nsew +flabel metal3 s 41713 698841 42193 698911 0 FreeSans 400 0 0 0 gpio_oeb[27] +port 174 nsew +flabel metal3 s 41713 706293 42193 706363 0 FreeSans 400 0 0 0 gpio_inp_dis[27] +port 218 nsew +flabel metal3 s 41713 699485 42193 699555 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] +port 262 nsew +flabel metal3 s 41713 702521 42193 702591 0 FreeSans 400 0 0 0 gpio_holdover[27] +port 394 nsew +flabel metal3 s 41713 703165 42193 703235 0 FreeSans 400 0 0 0 gpio_dm2[27] +port 658 nsew +flabel metal3 s 41713 707489 42193 707559 0 FreeSans 400 0 0 0 gpio_dm0[27] +port 570 nsew +flabel metal3 s 41713 703809 42193 703879 0 FreeSans 400 0 0 0 gpio_analog_sel[27] +port 482 nsew +flabel metal3 s 41713 706845 42193 706915 0 FreeSans 400 0 0 0 gpio_analog_pol[27] +port 526 nsew +flabel metal3 s 41713 708133 42193 708203 0 FreeSans 400 0 0 0 gpio_analog_en[27] +port 438 nsew +flabel metal3 s 41713 669809 42193 669879 0 FreeSans 400 0 0 0 gpio_in[28] +port 701 nsew +flabel metal3 s 41713 667969 42193 668039 0 FreeSans 400 0 0 0 gpio_slow_sel[28] +port 349 nsew +flabel metal3 s 41713 666129 42193 666199 0 FreeSans 400 0 0 0 gpio_dm1[28] +port 613 nsew +flabel metal3 s 41713 655089 42193 655159 0 FreeSans 400 0 0 0 gpio_in_h[28] +port 745 nsew +flabel metal3 s 41713 656929 42193 656999 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] +port 305 nsew +flabel metal3 s 41713 658769 42193 658839 0 FreeSans 400 0 0 0 gpio_out[28] +port 129 nsew +flabel metal3 s 41713 655641 42193 655711 0 FreeSans 400 0 0 0 gpio_oeb[28] +port 173 nsew +flabel metal3 s 41713 663093 42193 663163 0 FreeSans 400 0 0 0 gpio_inp_dis[28] +port 217 nsew +flabel metal3 s 41713 656285 42193 656355 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] +port 261 nsew +flabel metal3 s 41713 659321 42193 659391 0 FreeSans 400 0 0 0 gpio_holdover[28] +port 393 nsew +flabel metal3 s 41713 659965 42193 660035 0 FreeSans 400 0 0 0 gpio_dm2[28] +port 657 nsew +flabel metal3 s 41713 664289 42193 664359 0 FreeSans 400 0 0 0 gpio_dm0[28] +port 569 nsew +flabel metal3 s 41713 660609 42193 660679 0 FreeSans 400 0 0 0 gpio_analog_sel[28] +port 481 nsew +flabel metal3 s 41713 663645 42193 663715 0 FreeSans 400 0 0 0 gpio_analog_pol[28] +port 525 nsew +flabel metal3 s 41713 664933 42193 665003 0 FreeSans 400 0 0 0 gpio_analog_en[28] +port 437 nsew +flabel metal3 s 41713 626609 42193 626679 0 FreeSans 400 0 0 0 gpio_in[29] +port 700 nsew +flabel metal3 s 41713 624769 42193 624839 0 FreeSans 400 0 0 0 gpio_slow_sel[29] +port 348 nsew +flabel metal3 s 41713 622929 42193 622999 0 FreeSans 400 0 0 0 gpio_dm1[29] +port 612 nsew +flabel metal3 s 41713 611889 42193 611959 0 FreeSans 400 0 0 0 gpio_in_h[29] +port 744 nsew +flabel metal3 s 41713 613729 42193 613799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] +port 304 nsew +flabel metal3 s 41713 615569 42193 615639 0 FreeSans 400 0 0 0 gpio_out[29] +port 128 nsew +flabel metal3 s 41713 612441 42193 612511 0 FreeSans 400 0 0 0 gpio_oeb[29] +port 172 nsew +flabel metal3 s 41713 619893 42193 619963 0 FreeSans 400 0 0 0 gpio_inp_dis[29] +port 216 nsew +flabel metal3 s 41713 613085 42193 613155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] +port 260 nsew +flabel metal3 s 41713 616121 42193 616191 0 FreeSans 400 0 0 0 gpio_holdover[29] +port 392 nsew +flabel metal3 s 41713 616765 42193 616835 0 FreeSans 400 0 0 0 gpio_dm2[29] +port 656 nsew +flabel metal3 s 41713 621089 42193 621159 0 FreeSans 400 0 0 0 gpio_dm0[29] +port 568 nsew +flabel metal3 s 41713 617409 42193 617479 0 FreeSans 400 0 0 0 gpio_analog_sel[29] +port 480 nsew +flabel metal3 s 41713 620445 42193 620515 0 FreeSans 400 0 0 0 gpio_analog_pol[29] +port 524 nsew +flabel metal3 s 41713 621733 42193 621803 0 FreeSans 400 0 0 0 gpio_analog_en[29] +port 436 nsew +flabel metal3 s 41713 583409 42193 583479 0 FreeSans 400 0 0 0 gpio_in[30] +port 699 nsew +flabel metal3 s 41713 581569 42193 581639 0 FreeSans 400 0 0 0 gpio_slow_sel[30] +port 347 nsew +flabel metal3 s 41713 579729 42193 579799 0 FreeSans 400 0 0 0 gpio_dm1[30] +port 611 nsew +flabel metal3 s 41713 568689 42193 568759 0 FreeSans 400 0 0 0 gpio_in_h[30] +port 743 nsew +flabel metal3 s 41713 574209 42193 574279 0 FreeSans 400 0 0 0 gpio_analog_sel[30] +port 479 nsew +flabel metal3 s 41713 577245 42193 577315 0 FreeSans 400 0 0 0 gpio_analog_pol[30] +port 523 nsew +flabel metal3 s 41713 578533 42193 578603 0 FreeSans 400 0 0 0 gpio_analog_en[30] +port 435 nsew +flabel metal3 s 41713 570529 42193 570599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] +port 303 nsew +flabel metal3 s 41713 572369 42193 572439 0 FreeSans 400 0 0 0 gpio_out[30] +port 127 nsew +flabel metal3 s 41713 569241 42193 569311 0 FreeSans 400 0 0 0 gpio_oeb[30] +port 171 nsew +flabel metal3 s 41713 576693 42193 576763 0 FreeSans 400 0 0 0 gpio_inp_dis[30] +port 215 nsew +flabel metal3 s 41713 569885 42193 569955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] +port 259 nsew +flabel metal3 s 41713 572921 42193 572991 0 FreeSans 400 0 0 0 gpio_holdover[30] +port 391 nsew +flabel metal3 s 41713 573565 42193 573635 0 FreeSans 400 0 0 0 gpio_dm2[30] +port 655 nsew +flabel metal3 s 41713 577889 42193 577959 0 FreeSans 400 0 0 0 gpio_dm0[30] +port 567 nsew +flabel metal3 s 41713 540209 42193 540279 0 FreeSans 400 0 0 0 gpio_in[31] +port 698 nsew +flabel metal3 s 41713 538369 42193 538439 0 FreeSans 400 0 0 0 gpio_slow_sel[31] +port 346 nsew +flabel metal3 s 41713 536529 42193 536599 0 FreeSans 400 0 0 0 gpio_dm1[31] +port 610 nsew +flabel metal3 s 41713 525489 42193 525559 0 FreeSans 400 0 0 0 gpio_in_h[31] +port 742 nsew +flabel metal3 s 41713 527329 42193 527399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] +port 302 nsew +flabel metal3 s 41713 529169 42193 529239 0 FreeSans 400 0 0 0 gpio_out[31] +port 126 nsew +flabel metal3 s 41713 526041 42193 526111 0 FreeSans 400 0 0 0 gpio_oeb[31] +port 170 nsew +flabel metal3 s 41713 533493 42193 533563 0 FreeSans 400 0 0 0 gpio_inp_dis[31] +port 214 nsew +flabel metal3 s 41713 526685 42193 526755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] +port 258 nsew +flabel metal3 s 41713 529721 42193 529791 0 FreeSans 400 0 0 0 gpio_holdover[31] +port 390 nsew +flabel metal3 s 41713 530365 42193 530435 0 FreeSans 400 0 0 0 gpio_dm2[31] +port 654 nsew +flabel metal3 s 41713 534689 42193 534759 0 FreeSans 400 0 0 0 gpio_dm0[31] +port 566 nsew +flabel metal3 s 41713 531009 42193 531079 0 FreeSans 400 0 0 0 gpio_analog_sel[31] +port 478 nsew +flabel metal3 s 41713 534045 42193 534115 0 FreeSans 400 0 0 0 gpio_analog_pol[31] +port 522 nsew +flabel metal3 s 41713 535333 42193 535403 0 FreeSans 400 0 0 0 gpio_analog_en[31] +port 434 nsew +flabel metal3 s 41713 412609 42193 412679 0 FreeSans 400 0 0 0 gpio_in[32] +port 697 nsew +flabel metal3 s 41713 410769 42193 410839 0 FreeSans 400 0 0 0 gpio_slow_sel[32] +port 345 nsew +flabel metal3 s 41713 408929 42193 408999 0 FreeSans 400 0 0 0 gpio_dm1[32] +port 609 nsew +flabel metal3 s 41713 397889 42193 397959 0 FreeSans 400 0 0 0 gpio_in_h[32] +port 741 nsew +flabel metal3 s 41713 399729 42193 399799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] +port 301 nsew +flabel metal3 s 41713 401569 42193 401639 0 FreeSans 400 0 0 0 gpio_out[32] +port 125 nsew +flabel metal3 s 41713 398441 42193 398511 0 FreeSans 400 0 0 0 gpio_oeb[32] +port 169 nsew +flabel metal3 s 41713 405893 42193 405963 0 FreeSans 400 0 0 0 gpio_inp_dis[32] +port 213 nsew +flabel metal3 s 41713 399085 42193 399155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] +port 257 nsew +flabel metal3 s 41713 402121 42193 402191 0 FreeSans 400 0 0 0 gpio_holdover[32] +port 389 nsew +flabel metal3 s 41713 402765 42193 402835 0 FreeSans 400 0 0 0 gpio_dm2[32] +port 653 nsew +flabel metal3 s 41713 407089 42193 407159 0 FreeSans 400 0 0 0 gpio_dm0[32] +port 565 nsew +flabel metal3 s 41713 403409 42193 403479 0 FreeSans 400 0 0 0 gpio_analog_sel[32] +port 477 nsew +flabel metal3 s 41713 406445 42193 406515 0 FreeSans 400 0 0 0 gpio_analog_pol[32] +port 521 nsew +flabel metal3 s 41713 407733 42193 407803 0 FreeSans 400 0 0 0 gpio_analog_en[32] +port 433 nsew +flabel metal3 s 41713 369409 42193 369479 0 FreeSans 400 0 0 0 gpio_in[33] +port 696 nsew +flabel metal3 s 41713 367569 42193 367639 0 FreeSans 400 0 0 0 gpio_slow_sel[33] +port 344 nsew +flabel metal3 s 41713 365729 42193 365799 0 FreeSans 400 0 0 0 gpio_dm1[33] +port 608 nsew +flabel metal3 s 41713 354689 42193 354759 0 FreeSans 400 0 0 0 gpio_in_h[33] +port 740 nsew +flabel metal3 s 41713 356529 42193 356599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] +port 300 nsew +flabel metal3 s 41713 358369 42193 358439 0 FreeSans 400 0 0 0 gpio_out[33] +port 124 nsew +flabel metal3 s 41713 355241 42193 355311 0 FreeSans 400 0 0 0 gpio_oeb[33] +port 168 nsew +flabel metal3 s 41713 362693 42193 362763 0 FreeSans 400 0 0 0 gpio_inp_dis[33] +port 212 nsew +flabel metal3 s 41713 355885 42193 355955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] +port 256 nsew +flabel metal3 s 41713 358921 42193 358991 0 FreeSans 400 0 0 0 gpio_holdover[33] +port 388 nsew +flabel metal3 s 41713 363889 42193 363959 0 FreeSans 400 0 0 0 gpio_dm0[33] +port 564 nsew +flabel metal3 s 41713 359565 42193 359635 0 FreeSans 400 0 0 0 gpio_dm2[33] +port 652 nsew +flabel metal3 s 41713 360209 42193 360279 0 FreeSans 400 0 0 0 gpio_analog_sel[33] +port 476 nsew +flabel metal3 s 41713 363245 42193 363315 0 FreeSans 400 0 0 0 gpio_analog_pol[33] +port 520 nsew +flabel metal3 s 41713 364533 42193 364603 0 FreeSans 400 0 0 0 gpio_analog_en[33] +port 432 nsew +flabel metal3 s 41713 326209 42193 326279 0 FreeSans 400 0 0 0 gpio_in[34] +port 695 nsew +flabel metal3 s 41713 324369 42193 324439 0 FreeSans 400 0 0 0 gpio_slow_sel[34] +port 343 nsew +flabel metal3 s 41713 322529 42193 322599 0 FreeSans 400 0 0 0 gpio_dm1[34] +port 607 nsew +flabel metal3 s 41713 311489 42193 311559 0 FreeSans 400 0 0 0 gpio_in_h[34] +port 739 nsew +flabel metal3 s 41713 313329 42193 313399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] +port 299 nsew +flabel metal3 s 41713 315169 42193 315239 0 FreeSans 400 0 0 0 gpio_out[34] +port 123 nsew +flabel metal3 s 41713 312041 42193 312111 0 FreeSans 400 0 0 0 gpio_oeb[34] +port 167 nsew +flabel metal3 s 41713 319493 42193 319563 0 FreeSans 400 0 0 0 gpio_inp_dis[34] +port 211 nsew +flabel metal3 s 41713 312685 42193 312755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] +port 255 nsew +flabel metal3 s 41713 315721 42193 315791 0 FreeSans 400 0 0 0 gpio_holdover[34] +port 387 nsew +flabel metal3 s 41713 316365 42193 316435 0 FreeSans 400 0 0 0 gpio_dm2[34] +port 651 nsew +flabel metal3 s 41713 320689 42193 320759 0 FreeSans 400 0 0 0 gpio_dm0[34] +port 563 nsew +flabel metal3 s 41713 317009 42193 317079 0 FreeSans 400 0 0 0 gpio_analog_sel[34] +port 475 nsew +flabel metal3 s 41713 320045 42193 320115 0 FreeSans 400 0 0 0 gpio_analog_pol[34] +port 519 nsew +flabel metal3 s 41713 321333 42193 321403 0 FreeSans 400 0 0 0 gpio_analog_en[34] +port 431 nsew +flabel metal3 s 41713 283009 42193 283079 0 FreeSans 400 0 0 0 gpio_in[35] +port 694 nsew +flabel metal3 s 41713 281169 42193 281239 0 FreeSans 400 0 0 0 gpio_slow_sel[35] +port 342 nsew +flabel metal3 s 41713 279329 42193 279399 0 FreeSans 400 0 0 0 gpio_dm1[35] +port 606 nsew +flabel metal3 s 41713 268289 42193 268359 0 FreeSans 400 0 0 0 gpio_in_h[35] +port 738 nsew +flabel metal3 s 41713 270129 42193 270199 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] +port 298 nsew +flabel metal3 s 41713 271969 42193 272039 0 FreeSans 400 0 0 0 gpio_out[35] +port 122 nsew +flabel metal3 s 41713 268841 42193 268911 0 FreeSans 400 0 0 0 gpio_oeb[35] +port 166 nsew +flabel metal3 s 41713 276293 42193 276363 0 FreeSans 400 0 0 0 gpio_inp_dis[35] +port 210 nsew +flabel metal3 s 41713 269485 42193 269555 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] +port 254 nsew +flabel metal3 s 41713 272521 42193 272591 0 FreeSans 400 0 0 0 gpio_holdover[35] +port 386 nsew +flabel metal3 s 41713 273165 42193 273235 0 FreeSans 400 0 0 0 gpio_dm2[35] +port 650 nsew +flabel metal3 s 41713 277489 42193 277559 0 FreeSans 400 0 0 0 gpio_dm0[35] +port 562 nsew +flabel metal3 s 41713 273809 42193 273879 0 FreeSans 400 0 0 0 gpio_analog_sel[35] +port 474 nsew +flabel metal3 s 41713 276845 42193 276915 0 FreeSans 400 0 0 0 gpio_analog_pol[35] +port 518 nsew +flabel metal3 s 41713 278133 42193 278203 0 FreeSans 400 0 0 0 gpio_analog_en[35] +port 430 nsew +flabel metal3 s 41713 239809 42193 239879 0 FreeSans 400 0 0 0 gpio_in[36] +port 693 nsew +flabel metal3 s 41713 237969 42193 238039 0 FreeSans 400 0 0 0 gpio_slow_sel[36] +port 341 nsew +flabel metal3 s 41713 236129 42193 236199 0 FreeSans 400 0 0 0 gpio_dm1[36] +port 605 nsew +flabel metal3 s 41713 225089 42193 225159 0 FreeSans 400 0 0 0 gpio_in_h[36] +port 737 nsew +flabel metal3 s 41713 234289 42193 234359 0 FreeSans 400 0 0 0 gpio_dm0[36] +port 561 nsew +flabel metal3 s 41713 230609 42193 230679 0 FreeSans 400 0 0 0 gpio_analog_sel[36] +port 473 nsew +flabel metal3 s 41713 233645 42193 233715 0 FreeSans 400 0 0 0 gpio_analog_pol[36] +port 517 nsew +flabel metal3 s 41713 234933 42193 235003 0 FreeSans 400 0 0 0 gpio_analog_en[36] +port 429 nsew +flabel metal3 s 41713 226929 42193 226999 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] +port 297 nsew +flabel metal3 s 41713 228769 42193 228839 0 FreeSans 400 0 0 0 gpio_out[36] +port 121 nsew +flabel metal3 s 41713 225641 42193 225711 0 FreeSans 400 0 0 0 gpio_oeb[36] +port 165 nsew +flabel metal3 s 41713 233093 42193 233163 0 FreeSans 400 0 0 0 gpio_inp_dis[36] +port 209 nsew +flabel metal3 s 41713 226285 42193 226355 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] +port 253 nsew +flabel metal3 s 41713 229321 42193 229391 0 FreeSans 400 0 0 0 gpio_holdover[36] +port 385 nsew +flabel metal3 s 41713 229965 42193 230035 0 FreeSans 400 0 0 0 gpio_dm2[36] +port 649 nsew +flabel metal3 s 41713 196609 42193 196679 0 FreeSans 400 0 0 0 gpio_in[37] +port 692 nsew +flabel metal3 s 41713 194769 42193 194839 0 FreeSans 400 0 0 0 gpio_slow_sel[37] +port 340 nsew +flabel metal3 s 41713 192929 42193 192999 0 FreeSans 400 0 0 0 gpio_dm1[37] +port 604 nsew +flabel metal3 s 41713 181889 42193 181959 0 FreeSans 400 0 0 0 gpio_in_h[37] +port 736 nsew +flabel metal3 s 41713 189893 42193 189963 0 FreeSans 400 0 0 0 gpio_inp_dis[37] +port 208 nsew +flabel metal3 s 41713 183729 42193 183799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] +port 296 nsew +flabel metal3 s 41713 185569 42193 185639 0 FreeSans 400 0 0 0 gpio_out[37] +port 120 nsew +flabel metal3 s 41713 182441 42193 182511 0 FreeSans 400 0 0 0 gpio_oeb[37] +port 164 nsew +flabel metal3 s 41713 183085 42193 183155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] +port 252 nsew +flabel metal3 s 41713 186121 42193 186191 0 FreeSans 400 0 0 0 gpio_holdover[37] +port 384 nsew +flabel metal3 s 41713 186765 42193 186835 0 FreeSans 400 0 0 0 gpio_dm2[37] +port 648 nsew +flabel metal3 s 41713 191089 42193 191159 0 FreeSans 400 0 0 0 gpio_dm0[37] +port 560 nsew +flabel metal3 s 41713 187409 42193 187479 0 FreeSans 400 0 0 0 gpio_analog_sel[37] +port 472 nsew +flabel metal3 s 41713 190445 42193 190515 0 FreeSans 400 0 0 0 gpio_analog_pol[37] +port 516 nsew +flabel metal3 s 41713 191733 42193 191803 0 FreeSans 400 0 0 0 gpio_analog_en[37] +port 428 nsew +flabel metal3 s 41713 969209 42193 969279 0 FreeSans 400 0 0 0 gpio_in[24] +port 705 nsew +flabel metal3 s 41713 967369 42193 967439 0 FreeSans 400 0 0 0 gpio_slow_sel[24] +port 353 nsew +flabel metal3 s 41713 965529 42193 965599 0 FreeSans 400 0 0 0 gpio_dm1[24] +port 617 nsew +flabel metal3 s 41713 954489 42193 954559 0 FreeSans 400 0 0 0 gpio_in_h[24] +port 749 nsew +flabel metal3 s 41713 956329 42193 956399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] +port 309 nsew +flabel metal3 s 41713 958169 42193 958239 0 FreeSans 400 0 0 0 gpio_out[24] +port 133 nsew +flabel metal3 s 41713 955041 42193 955111 0 FreeSans 400 0 0 0 gpio_oeb[24] +port 177 nsew +flabel metal3 s 41713 962493 42193 962563 0 FreeSans 400 0 0 0 gpio_inp_dis[24] +port 221 nsew +flabel metal3 s 41713 955685 42193 955755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] +port 265 nsew +flabel metal3 s 41713 958721 42193 958791 0 FreeSans 400 0 0 0 gpio_holdover[24] +port 397 nsew +flabel metal3 s 41713 959365 42193 959435 0 FreeSans 400 0 0 0 gpio_dm2[24] +port 661 nsew +flabel metal3 s 41713 963689 42193 963759 0 FreeSans 400 0 0 0 gpio_dm0[24] +port 573 nsew +flabel metal3 s 41713 960009 42193 960079 0 FreeSans 400 0 0 0 gpio_analog_sel[24] +port 485 nsew +flabel metal3 s 41713 963045 42193 963115 0 FreeSans 400 0 0 0 gpio_analog_pol[24] +port 529 nsew +flabel metal3 s 41713 964333 42193 964403 0 FreeSans 400 0 0 0 gpio_analog_en[24] +port 441 nsew +flabel metal3 s 41713 964814 42193 965028 0 FreeSans 400 0 0 0 analog_noesd_io[24] +port 925 nsew +flabel metal3 s 41713 966697 42193 966825 0 FreeSans 400 0 0 0 analog_io[24] +port 881 nsew << properties >> string FIXED_BBOX 0 0 717600 1037600 << end >> diff --git a/mag/constant_block.mag b/mag/constant_block.mag index ab8221af..67ff5227 100644 --- a/mag/constant_block.mag +++ b/mag/constant_block.mag @@ -2,6 +2,8 @@ magic tech sky130A magscale 1 2 timestamp 1665254080 +<< checkpaint >> +rect -1206 -764 3966 3484 << viali >> rect 581 1853 615 1887 rect 1409 1717 1443 1751 @@ -486,70 +488,70 @@ rect 2202 1056 2220 1120 rect 2284 1056 2300 1120 rect 2364 1056 2382 1120 rect 2202 496 2382 1056 +use sky130_fd_sc_hd__buf_16 const_one_buf $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1692890899 +transform 1 0 276 0 1 1632 +box -38 -48 2062 592 +use sky130_fd_sc_hd__conb_1 const_source $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1692890899 +transform -1 0 828 0 -1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__buf_16 const_zero_buf +timestamp 1692890899 +transform 1 0 276 0 1 544 +box -38 -48 2062 592 use sky130_fd_sc_hd__fill_2 FILLER_0_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1663720911 +timestamp 1692890899 transform 1 0 92 0 1 544 box -38 -48 222 592 use sky130_fd_sc_hd__fill_2 FILLER_0_24 -timestamp 1663720911 +timestamp 1692890899 transform 1 0 2300 0 1 544 box -38 -48 222 592 use sky130_fd_sc_hd__fill_1 FILLER_0_27 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1663720911 +timestamp 1692890899 transform 1 0 2576 0 1 544 box -38 -48 130 592 use sky130_fd_sc_hd__fill_4 FILLER_1_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1663720911 +timestamp 1692890899 transform 1 0 92 0 -1 1632 box -38 -48 406 592 use sky130_fd_sc_hd__fill_1 FILLER_1_4 -timestamp 1663720911 +timestamp 1692890899 transform 1 0 460 0 -1 1632 box -38 -48 130 592 use sky130_fd_sc_hd__fill_8 FILLER_1_8 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1663720911 +timestamp 1692890899 transform 1 0 828 0 -1 1632 box -38 -48 774 592 use sky130_fd_sc_hd__fill_8 FILLER_1_16 -timestamp 1663720911 +timestamp 1692890899 transform 1 0 1564 0 -1 1632 box -38 -48 774 592 use sky130_fd_sc_hd__fill_4 FILLER_1_24 -timestamp 1663720911 +timestamp 1692890899 transform 1 0 2300 0 -1 1632 box -38 -48 406 592 use sky130_fd_sc_hd__fill_2 FILLER_2_0 -timestamp 1663720911 +timestamp 1692890899 transform 1 0 92 0 1 1632 box -38 -48 222 592 use sky130_fd_sc_hd__fill_2 FILLER_2_24 -timestamp 1663720911 +timestamp 1692890899 transform 1 0 2300 0 1 1632 box -38 -48 222 592 use sky130_fd_sc_hd__fill_1 FILLER_2_27 -timestamp 1663720911 +timestamp 1692890899 transform 1 0 2576 0 1 1632 box -38 -48 130 592 use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_0 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1663720911 +timestamp 1692890899 transform 1 0 2484 0 1 544 box -38 -48 130 592 use sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_1 -timestamp 1663720911 +timestamp 1692890899 transform 1 0 2484 0 1 1632 box -38 -48 130 592 -use sky130_fd_sc_hd__buf_16 const_one_buf $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1663720911 -transform 1 0 276 0 1 1632 -box -38 -48 2062 592 -use sky130_fd_sc_hd__conb_1 const_source $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1663720911 -transform -1 0 828 0 -1 1632 -box -38 -48 314 592 -use sky130_fd_sc_hd__buf_16 const_zero_buf -timestamp 1663720911 -transform 1 0 276 0 1 544 -box -38 -48 2062 592 << labels >> flabel metal3 s 2000 1232 2800 1352 0 FreeSans 480 0 0 0 one port 0 nsew signal tristate diff --git a/mag/openframe_project_wrapper.mag b/mag/openframe_project_wrapper.mag index b7e6a37c..04133c1e 100644 --- a/mag/openframe_project_wrapper.mag +++ b/mag/openframe_project_wrapper.mag @@ -1,2486 +1,398 @@ magic tech sky130A magscale 1 2 -timestamp 1686252151 -<< obsm1 >> -rect 4 953326 633378 953378 -rect 4 0 56 953326 -rect 633326 0 633378 953326 -rect 4 -52 633378 0 +timestamp 1695675240 +<< checkpaint >> +rect 26297 954638 30878 954986 +rect 77497 954638 82078 954986 +rect 128697 954638 133278 954986 +rect 179897 954638 184478 954986 +rect 231097 954638 235678 954986 +rect 300081 954638 307382 955030 +rect 335497 954638 340078 954986 +rect 424497 954638 429078 954986 +rect 475697 954638 480278 954986 +rect 542281 954638 549582 955030 +rect 577098 954986 579696 955035 +rect 575097 954638 579696 954986 +rect -1312 952066 634638 954638 +rect -1312 929363 1260 952066 +rect 26297 952010 30878 952066 +rect 77497 952010 82078 952066 +rect 128697 952010 133278 952066 +rect 179897 952010 184478 952066 +rect 231097 952010 235678 952066 +rect 300081 952010 307382 952066 +rect 335497 952010 340078 952066 +rect 424497 952010 429078 952066 +rect 475697 952010 480278 952066 +rect 542281 952010 549582 952066 +rect 575097 952010 579696 952066 +rect 577098 952009 579696 952010 +rect 632066 930329 634638 952066 +rect -1778 910398 1409 929363 +rect 631808 927737 635052 930329 +rect 631817 926433 635042 927737 +rect 631817 925735 635103 926433 +rect -1312 880976 1260 910398 +rect -1704 868703 1316 880976 +rect -1312 843782 1260 868703 +rect -1704 836481 1316 843782 +rect 631916 840329 635103 925735 +rect 631808 837737 635103 840329 +rect -1312 801582 1260 836481 +rect 631817 835735 635103 837737 +rect -1704 794281 1316 801582 +rect -1312 758603 1260 794281 +rect -1751 749403 1382 758603 +rect 631916 751329 635103 835735 +rect -1778 741287 1409 749403 +rect 631808 748737 635103 751329 +rect 631817 746735 635103 748737 +rect -1312 715403 1260 741287 +rect -1778 698087 1409 715403 +rect 631916 706329 635103 746735 +rect 631808 703737 635103 706329 +rect 631817 701735 635103 703737 +rect -1312 672203 1260 698087 +rect -1778 611687 1409 672203 +rect 631916 661329 635103 701735 +rect 631808 658737 635103 661329 +rect 631817 656735 635103 658737 +rect 631916 616329 635103 656735 +rect 631828 613737 635103 616329 +rect 631836 611735 635103 613737 +rect -1312 585803 1260 611687 +rect -1778 138487 1409 585803 +rect 631916 571329 635103 611735 +rect 631828 568737 635103 571329 +rect 631836 566735 635103 568737 +rect 631916 526329 635103 566735 +rect 631828 523737 635103 526329 +rect 631916 433822 635103 523737 +rect 631916 416462 635532 433822 +rect 631916 349329 635103 416462 +rect 631828 346737 635103 349329 +rect 631916 304329 635103 346737 +rect 631828 301737 635103 304329 +rect 631916 259329 635103 301737 +rect 631828 256737 635103 259329 +rect 631916 214329 635103 256737 +rect 631828 211737 635103 214329 +rect 631916 169329 635103 211737 +rect 631828 166737 635103 169329 +rect -1312 84181 1260 138487 +rect 631916 124329 635103 166737 +rect 631828 121737 635103 124329 +rect -1704 76880 1316 84181 +rect 631916 79329 635103 121737 +rect -1312 32023 1260 76880 +rect 631828 76737 635103 79329 +rect 631916 57109 635103 76737 +rect -1704 24702 1316 32023 +rect -1312 1260 1260 24702 +rect 35545 1260 42846 1316 +rect 148862 1260 151405 1330 +rect 198023 1260 205174 1316 +rect 207903 1260 215224 1316 +rect 525745 1260 533046 1316 +rect 579545 1260 586846 1316 +rect 632066 1260 634638 57109 +rect -1312 -1312 634638 1260 +rect 35545 -1704 42846 -1312 +rect 98313 -1660 100834 -1312 +rect 148862 -1536 151405 -1312 +rect 198023 -1704 205174 -1312 +rect 207903 -1704 215224 -1312 +rect 525745 -1704 533046 -1312 +rect 579545 -1704 586846 -1312 << metal2 >> -rect 27497 953270 27558 953726 -rect 29498 953270 29559 953726 -rect 34054 953689 34102 953726 -rect 34046 953637 34110 953689 +rect 27497 953270 27557 953726 +rect 29498 953270 29558 953726 rect 34360 953270 34416 953750 rect 34912 953270 34968 953750 rect 35556 953270 35612 953750 rect 36200 953270 36256 953750 -rect 36752 953603 36808 953726 -rect 36692 953539 36864 953603 -rect 36752 953270 36808 953539 -rect 37396 953507 37452 953726 -rect 37396 953443 37570 953507 -rect 37396 953270 37452 953443 rect 38040 953270 38096 953750 rect 38592 953270 38648 953750 rect 39236 953270 39292 953750 rect 39880 953270 39936 953750 -rect 40432 953411 40488 953726 -rect 41076 953603 41132 953726 -rect 41013 953539 41197 953603 -rect 40432 953347 40605 953411 -rect 40432 953270 40488 953347 -rect 41076 953270 41132 953539 -rect 41720 953507 41776 953726 -rect 41720 953443 41894 953507 -rect 41720 953270 41776 953443 rect 42364 953270 42420 953750 rect 42916 953270 42972 953750 rect 43560 953270 43616 953750 rect 44204 953270 44260 953750 -rect 44756 953270 44812 953750 +rect 44677 953270 44891 953750 rect 45400 953270 45456 953750 -rect 46044 953270 46100 953726 -rect 46596 953270 46652 953750 +rect 46560 953270 46688 953750 rect 47240 953270 47296 953750 -rect 47884 953270 47940 953726 -rect 48436 953270 48492 953726 rect 49080 953270 49136 953750 -rect 49724 953507 49780 953726 -rect 49607 953443 49780 953507 -rect 49724 953270 49780 953443 -rect 78697 953270 78758 953726 -rect 80698 953270 80759 953726 -rect 85454 953689 85502 953726 -rect 85446 953637 85510 953689 +rect 78697 953270 78757 953726 +rect 80698 953270 80758 953726 rect 85760 953270 85816 953750 rect 86312 953270 86368 953750 rect 86956 953270 87012 953750 rect 87600 953270 87656 953750 -rect 88152 953603 88208 953726 -rect 88092 953539 88264 953603 -rect 88152 953270 88208 953539 -rect 88796 953507 88852 953726 -rect 88796 953443 88970 953507 -rect 88796 953270 88852 953443 rect 89440 953270 89496 953750 rect 89992 953270 90048 953750 rect 90636 953270 90692 953750 rect 91280 953270 91336 953750 -rect 91832 953411 91888 953726 -rect 92476 953603 92532 953726 -rect 92413 953539 92597 953603 -rect 91832 953347 92005 953411 -rect 91832 953270 91888 953347 -rect 92476 953270 92532 953539 -rect 93120 953507 93176 953726 -rect 93120 953443 93294 953507 -rect 93120 953270 93176 953443 rect 93764 953270 93820 953750 rect 94316 953270 94372 953750 rect 94960 953270 95016 953750 rect 95604 953270 95660 953750 -rect 96156 953270 96212 953750 +rect 96077 953270 96291 953750 rect 96800 953270 96856 953750 -rect 97444 953270 97500 953726 -rect 97996 953270 98052 953750 +rect 97960 953270 98088 953750 rect 98640 953270 98696 953750 -rect 99284 953270 99340 953726 -rect 99836 953270 99892 953726 rect 100480 953270 100536 953750 -rect 101124 953507 101180 953726 -rect 101007 953443 101180 953507 -rect 101124 953270 101180 953443 -rect 129897 953270 129958 953726 -rect 131898 953270 131959 953726 -rect 136854 953689 136902 953726 -rect 136846 953637 136910 953689 +rect 129897 953270 129957 953726 +rect 131898 953270 131958 953726 rect 137160 953270 137216 953750 rect 137712 953270 137768 953750 rect 138356 953270 138412 953750 rect 139000 953270 139056 953750 -rect 139552 953603 139608 953726 -rect 139492 953539 139664 953603 -rect 139552 953270 139608 953539 -rect 140196 953507 140252 953726 -rect 140196 953443 140370 953507 -rect 140196 953270 140252 953443 rect 140840 953270 140896 953750 rect 141392 953270 141448 953750 rect 142036 953270 142092 953750 rect 142680 953270 142736 953750 -rect 143232 953411 143288 953726 -rect 143876 953603 143932 953726 -rect 143813 953539 143997 953603 -rect 143232 953347 143405 953411 -rect 143232 953270 143288 953347 -rect 143876 953270 143932 953539 -rect 144520 953507 144576 953726 -rect 144520 953443 144694 953507 -rect 144520 953270 144576 953443 rect 145164 953270 145220 953750 rect 145716 953270 145772 953750 rect 146360 953270 146416 953750 rect 147004 953270 147060 953750 -rect 147556 953270 147612 953750 +rect 147477 953270 147691 953750 rect 148200 953270 148256 953750 -rect 148844 953270 148900 953726 -rect 149396 953270 149452 953750 +rect 149360 953270 149488 953750 rect 150040 953270 150096 953750 -rect 150684 953270 150740 953726 -rect 151236 953270 151292 953726 rect 151880 953270 151936 953750 -rect 152524 953507 152580 953726 -rect 152407 953443 152580 953507 -rect 152524 953270 152580 953443 -rect 181097 953270 181158 953726 -rect 183098 953270 183159 953726 -rect 188254 953689 188302 953726 -rect 188246 953637 188310 953689 +rect 181097 953270 181157 953726 +rect 183098 953270 183158 953726 rect 188560 953270 188616 953750 rect 189112 953270 189168 953750 rect 189756 953270 189812 953750 rect 190400 953270 190456 953750 -rect 190952 953603 191008 953726 -rect 190892 953539 191064 953603 -rect 190952 953270 191008 953539 -rect 191596 953507 191652 953726 -rect 191596 953443 191770 953507 -rect 191596 953270 191652 953443 rect 192240 953270 192296 953750 rect 192792 953270 192848 953750 rect 193436 953270 193492 953750 rect 194080 953270 194136 953750 -rect 194632 953411 194688 953726 -rect 195276 953603 195332 953726 -rect 195213 953539 195397 953603 -rect 194632 953347 194805 953411 -rect 194632 953270 194688 953347 -rect 195276 953270 195332 953539 -rect 195920 953507 195976 953726 -rect 195920 953443 196094 953507 -rect 195920 953270 195976 953443 rect 196564 953270 196620 953750 rect 197116 953270 197172 953750 rect 197760 953270 197816 953750 rect 198404 953270 198460 953750 -rect 198956 953270 199012 953750 +rect 198877 953270 199091 953750 rect 199600 953270 199656 953750 -rect 200244 953270 200300 953726 -rect 200796 953270 200852 953750 +rect 200760 953270 200888 953750 rect 201440 953270 201496 953750 -rect 202084 953270 202140 953726 -rect 202636 953270 202692 953726 rect 203280 953270 203336 953750 -rect 203924 953507 203980 953726 -rect 203807 953443 203980 953507 -rect 203924 953270 203980 953443 -rect 232297 953270 232358 953726 -rect 234298 953270 234359 953726 -rect 239854 953689 239902 953726 -rect 239846 953637 239910 953689 +rect 232297 953270 232357 953726 +rect 234298 953270 234358 953726 rect 240160 953270 240216 953750 rect 240712 953270 240768 953750 rect 241356 953270 241412 953750 rect 242000 953270 242056 953750 -rect 242552 953603 242608 953726 -rect 242492 953539 242664 953603 -rect 242552 953270 242608 953539 -rect 243196 953507 243252 953726 -rect 243196 953443 243370 953507 -rect 243196 953270 243252 953443 rect 243840 953270 243896 953750 rect 244392 953270 244448 953750 rect 245036 953270 245092 953750 rect 245680 953270 245736 953750 -rect 246232 953411 246288 953726 -rect 246876 953603 246932 953726 -rect 246813 953539 246997 953603 -rect 246232 953347 246405 953411 -rect 246232 953270 246288 953347 -rect 246876 953270 246932 953539 -rect 247520 953507 247576 953726 -rect 247520 953443 247694 953507 -rect 247520 953270 247576 953443 rect 248164 953270 248220 953750 rect 248716 953270 248772 953750 rect 249360 953270 249416 953750 rect 250004 953270 250060 953750 -rect 250556 953270 250612 953750 +rect 250477 953270 250691 953750 rect 251200 953270 251256 953750 -rect 251844 953270 251900 953726 -rect 252396 953270 252452 953750 +rect 252360 953270 252488 953750 rect 253040 953270 253096 953750 -rect 253684 953270 253740 953726 -rect 254236 953270 254292 953726 rect 254880 953270 254936 953750 -rect 255524 953507 255580 953726 -rect 255407 953443 255580 953507 -rect 255524 953270 255580 953443 -rect 336697 953270 336758 953726 -rect 338698 953270 338759 953726 -rect 341654 953689 341702 953726 -rect 341646 953637 341710 953689 +rect 336697 953270 336757 953726 +rect 338698 953270 338758 953726 rect 341960 953270 342016 953750 rect 342512 953270 342568 953750 rect 343156 953270 343212 953750 rect 343800 953270 343856 953750 -rect 344352 953603 344408 953726 -rect 344292 953539 344464 953603 -rect 344352 953270 344408 953539 -rect 344996 953507 345052 953726 -rect 344996 953443 345170 953507 -rect 344996 953270 345052 953443 rect 345640 953270 345696 953750 rect 346192 953270 346248 953750 rect 346836 953270 346892 953750 rect 347480 953270 347536 953750 -rect 348032 953411 348088 953726 -rect 348676 953603 348732 953726 -rect 348613 953539 348797 953603 -rect 348032 953347 348205 953411 -rect 348032 953270 348088 953347 -rect 348676 953270 348732 953539 -rect 349320 953507 349376 953726 -rect 349320 953443 349494 953507 -rect 349320 953270 349376 953443 rect 349964 953270 350020 953750 rect 350516 953270 350572 953750 rect 351160 953270 351216 953750 rect 351804 953270 351860 953750 -rect 352356 953270 352412 953750 +rect 352277 953270 352491 953750 rect 353000 953270 353056 953750 -rect 353644 953270 353700 953726 -rect 354196 953270 354252 953750 +rect 354160 953270 354288 953750 rect 354840 953270 354896 953750 -rect 355484 953270 355540 953726 -rect 356036 953270 356092 953726 rect 356680 953270 356736 953750 -rect 357324 953507 357380 953726 -rect 357207 953443 357380 953507 -rect 357324 953270 357380 953443 -rect 425697 953270 425758 953726 -rect 427698 953270 427759 953726 -rect 430654 953689 430702 953726 -rect 430646 953637 430710 953689 +rect 425697 953270 425757 953726 +rect 427698 953270 427758 953726 rect 430960 953270 431016 953750 rect 431512 953270 431568 953750 rect 432156 953270 432212 953750 rect 432800 953270 432856 953750 -rect 433352 953603 433408 953726 -rect 433292 953539 433464 953603 -rect 433352 953270 433408 953539 -rect 433996 953507 434052 953726 -rect 433996 953443 434170 953507 -rect 433996 953270 434052 953443 rect 434640 953270 434696 953750 rect 435192 953270 435248 953750 rect 435836 953270 435892 953750 rect 436480 953270 436536 953750 -rect 437032 953411 437088 953726 -rect 437676 953603 437732 953726 -rect 437613 953539 437797 953603 -rect 437032 953347 437205 953411 -rect 437032 953270 437088 953347 -rect 437676 953270 437732 953539 -rect 438320 953507 438376 953726 -rect 438320 953443 438494 953507 -rect 438320 953270 438376 953443 rect 438964 953270 439020 953750 rect 439516 953270 439572 953750 rect 440160 953270 440216 953750 rect 440804 953270 440860 953750 -rect 441356 953270 441412 953750 +rect 441277 953270 441491 953750 rect 442000 953270 442056 953750 -rect 442644 953270 442700 953726 -rect 443196 953270 443252 953750 +rect 443160 953270 443288 953750 rect 443840 953270 443896 953750 -rect 444484 953270 444540 953726 -rect 445036 953270 445092 953726 rect 445680 953270 445736 953750 -rect 446324 953507 446380 953726 -rect 446207 953443 446380 953507 -rect 446324 953270 446380 953443 -rect 476897 953270 476958 953726 -rect 478898 953270 478959 953726 -rect 482054 953689 482102 953726 -rect 482046 953637 482110 953689 +rect 476897 953270 476957 953726 +rect 478898 953270 478958 953726 rect 482360 953270 482416 953750 rect 482912 953270 482968 953750 rect 483556 953270 483612 953750 rect 484200 953270 484256 953750 -rect 484752 953603 484808 953726 -rect 484692 953539 484864 953603 -rect 484752 953270 484808 953539 -rect 485396 953507 485452 953726 -rect 485396 953443 485570 953507 -rect 485396 953270 485452 953443 rect 486040 953270 486096 953750 rect 486592 953270 486648 953750 rect 487236 953270 487292 953750 rect 487880 953270 487936 953750 -rect 488432 953411 488488 953726 -rect 489076 953603 489132 953726 -rect 489013 953539 489197 953603 -rect 488432 953347 488605 953411 -rect 488432 953270 488488 953347 -rect 489076 953270 489132 953539 -rect 489720 953507 489776 953726 -rect 489720 953443 489894 953507 -rect 489720 953270 489776 953443 rect 490364 953270 490420 953750 rect 490916 953270 490972 953750 rect 491560 953270 491616 953750 rect 492204 953270 492260 953750 -rect 492756 953270 492812 953750 +rect 492677 953270 492891 953750 rect 493400 953270 493456 953750 -rect 494044 953270 494100 953726 -rect 494596 953270 494652 953750 +rect 494560 953270 494688 953750 rect 495240 953270 495296 953750 -rect 495884 953270 495940 953726 -rect 496436 953270 496492 953726 rect 497080 953270 497136 953750 -rect 497724 953507 497780 953726 -rect 497607 953443 497780 953507 -rect 497724 953270 497780 953443 -rect 576297 953270 576358 953726 -rect 578298 953270 578359 953726 -rect 583854 953689 583902 953726 -rect 583846 953637 583910 953689 +rect 576297 953270 576357 953726 +rect 578298 953270 578358 953726 rect 584160 953270 584216 953750 rect 584712 953270 584768 953750 rect 585356 953270 585412 953750 rect 586000 953270 586056 953750 -rect 586552 953603 586608 953726 -rect 586492 953539 586664 953603 -rect 586552 953270 586608 953539 -rect 587196 953507 587252 953726 -rect 587196 953443 587370 953507 -rect 587196 953270 587252 953443 rect 587840 953270 587896 953750 rect 588392 953270 588448 953750 rect 589036 953270 589092 953750 rect 589680 953270 589736 953750 -rect 590232 953411 590288 953726 -rect 590876 953603 590932 953726 -rect 590813 953539 590997 953603 -rect 590232 953347 590405 953411 -rect 590232 953270 590288 953347 -rect 590876 953270 590932 953539 -rect 591520 953507 591576 953726 -rect 591520 953443 591694 953507 -rect 591520 953270 591576 953443 rect 592164 953270 592220 953750 rect 592716 953270 592772 953750 rect 593360 953270 593416 953750 rect 594004 953270 594060 953750 -rect 594556 953270 594612 953750 +rect 594477 953270 594691 953750 rect 595200 953270 595256 953750 -rect 595844 953270 595900 953726 -rect 596396 953270 596452 953750 +rect 596360 953270 596488 953750 rect 597040 953270 597096 953750 -rect 597684 953270 597740 953726 -rect 598236 953270 598292 953726 rect 598880 953270 598936 953750 -rect 599524 953507 599580 953726 -rect 599407 953443 599580 953507 -rect 599524 953270 599580 953443 -rect -400 927724 56 927780 -rect -181 927607 -117 927724 -rect -274 927136 56 927143 -rect -400 927080 56 927136 -rect -274 927073 56 927080 -rect -400 926436 56 926492 -rect -400 925884 56 925940 -rect -274 925296 56 925303 -rect -400 925240 56 925296 -rect -274 925233 56 925240 -rect 633270 925110 633726 925166 -rect -274 924652 56 924659 -rect -400 924596 56 924652 -rect -274 924589 56 924596 -rect 633270 924614 633600 924621 -rect 633270 924558 633726 924614 -rect 633270 924551 633600 924558 -rect -400 924044 56 924100 -rect 633270 923970 633600 923977 -rect 633270 923914 633726 923970 -rect 633270 923907 633600 923914 -rect -274 923456 56 923463 -rect -400 923400 56 923456 -rect -274 923393 56 923400 -rect 633270 923326 633600 923333 -rect 633270 923270 633726 923326 -rect 633270 923263 633600 923270 -rect -400 922756 56 922812 -rect 633539 922774 633603 922834 -rect 633270 922718 633726 922774 -rect 633539 922662 633603 922718 -rect -274 922260 56 922267 -rect -400 922204 56 922260 -rect -274 922197 56 922204 -rect 633270 922074 633726 922130 -rect 633443 921956 633507 922074 -rect -274 921616 56 921623 -rect -400 921560 56 921616 -rect -274 921553 56 921560 -rect 633270 921486 633600 921493 -rect 633270 921430 633726 921486 -rect 633270 921423 633600 921430 -rect -274 920972 56 920979 -rect -400 920916 56 920972 -rect -274 920909 56 920916 -rect 633270 920934 633600 920941 -rect 633270 920878 633726 920934 -rect 633270 920871 633600 920878 -rect -274 920420 56 920427 -rect -400 920364 56 920420 -rect -274 920357 56 920364 -rect 633270 920290 633600 920297 -rect 633270 920234 633726 920290 -rect 633270 920227 633600 920234 -rect -181 919776 -117 919894 -rect -400 919720 56 919776 -rect 633270 919646 633600 919653 -rect 633270 919590 633726 919646 -rect 633270 919583 633600 919590 -rect -277 919132 -213 919197 -rect -400 919076 56 919132 -rect -277 919013 -213 919076 -rect 633270 919038 633726 919094 -rect 633347 918921 633411 919038 -rect -85 918488 -21 918605 -rect -400 918432 56 918488 -rect 633539 918450 633603 918513 -rect 633270 918394 633726 918450 -rect 633539 918329 633603 918394 -rect -274 917936 56 917943 -rect -400 917880 56 917936 -rect -274 917873 56 917880 -rect 633270 917750 633726 917806 -rect 633443 917632 633507 917750 -rect -274 917292 56 917299 -rect -400 917236 56 917292 -rect -274 917229 56 917236 -rect 633270 917162 633600 917169 -rect 633270 917106 633726 917162 -rect 633270 917099 633600 917106 -rect -274 916648 56 916655 -rect -400 916592 56 916648 -rect -274 916585 56 916592 -rect 633270 916610 633600 916617 -rect 633270 916554 633726 916610 -rect 633270 916547 633600 916554 -rect -274 916096 56 916103 -rect -400 916040 56 916096 -rect -274 916033 56 916040 -rect 633270 915966 633600 915973 -rect 633270 915910 633726 915966 -rect 633270 915903 633600 915910 -rect -181 915452 -117 915570 -rect -400 915396 56 915452 -rect 633270 915322 633600 915329 -rect 633270 915266 633726 915322 -rect 633270 915259 633600 915266 -rect -277 914808 -213 914864 -rect -400 914752 56 914808 -rect -277 914692 -213 914752 -rect 633270 914714 633726 914770 -rect -274 914256 56 914263 -rect -400 914200 56 914256 -rect -274 914193 56 914200 -rect 633270 914126 633600 914133 -rect 633270 914070 633726 914126 -rect 633270 914063 633600 914070 -rect -274 913612 56 913619 -rect -400 913556 56 913612 -rect -274 913549 56 913556 -rect 633270 913426 633726 913482 -rect -274 912968 56 912975 -rect -400 912912 56 912968 -rect -274 912905 56 912912 -rect 633270 912930 633600 912937 -rect 633270 912874 633726 912930 -rect 633270 912867 633600 912874 -rect -400 912360 56 912416 -rect 633270 912286 633600 912293 -rect 633270 912230 633726 912286 -rect 633270 912223 633600 912230 -rect 633270 911586 633726 911642 -rect 633270 911034 633726 911090 -rect 633270 910446 633600 910453 -rect 633270 910390 633726 910446 -rect 633270 910383 633600 910390 -rect 633443 909802 633507 909919 -rect 633270 909746 633726 909802 -rect 633270 835910 633726 835966 -rect 633270 835414 633600 835421 -rect 633270 835358 633726 835414 -rect 633270 835351 633600 835358 -rect 633270 834770 633600 834777 -rect 633270 834714 633726 834770 -rect 633270 834707 633600 834714 -rect 633270 834126 633600 834133 -rect 633270 834070 633726 834126 -rect 633270 834063 633600 834070 -rect 633539 833574 633603 833634 -rect 633270 833518 633726 833574 -rect 633539 833462 633603 833518 -rect 633270 832874 633726 832930 -rect 633443 832756 633507 832874 -rect 633270 832286 633600 832293 -rect 633270 832230 633726 832286 -rect 633270 832223 633600 832230 -rect 633270 831734 633600 831741 -rect 633270 831678 633726 831734 -rect 633270 831671 633600 831678 -rect 633270 831090 633600 831097 -rect 633270 831034 633726 831090 -rect 633270 831027 633600 831034 -rect 633270 830446 633600 830453 -rect 633270 830390 633726 830446 -rect 633270 830383 633600 830390 -rect 633270 829838 633726 829894 -rect 633347 829721 633411 829838 -rect 633539 829250 633603 829313 -rect 633270 829194 633726 829250 -rect 633539 829129 633603 829194 -rect 633270 828550 633726 828606 -rect 633443 828432 633507 828550 -rect 633270 827962 633600 827969 -rect 633270 827906 633726 827962 -rect 633270 827899 633600 827906 -rect 633270 827410 633600 827417 -rect 633270 827354 633726 827410 -rect 633270 827347 633600 827354 -rect 633270 826766 633600 826773 -rect 633270 826710 633726 826766 -rect 633270 826703 633600 826710 -rect 633270 826122 633600 826129 -rect 633270 826066 633726 826122 -rect 633270 826059 633600 826066 -rect 633270 825514 633726 825570 -rect 633270 824926 633600 824933 -rect 633270 824870 633726 824926 -rect 633270 824863 633600 824870 -rect 633270 824226 633726 824282 -rect 633270 823730 633600 823737 -rect 633270 823674 633726 823730 -rect 633270 823667 633600 823674 -rect 633270 823086 633600 823093 -rect 633270 823030 633726 823086 -rect 633270 823023 633600 823030 -rect 633270 822386 633726 822442 -rect 633270 821834 633726 821890 -rect 633270 821246 633600 821253 -rect 633270 821190 633726 821246 -rect 633270 821183 633600 821190 -rect 633443 820602 633507 820719 -rect 633270 820546 633726 820602 -rect -400 757924 56 757980 -rect -181 757807 -117 757924 -rect -274 757336 56 757343 -rect -400 757280 56 757336 -rect -274 757273 56 757280 -rect -400 756636 56 756692 -rect -400 756084 56 756140 -rect -274 755496 56 755503 -rect -400 755440 56 755496 -rect -274 755433 56 755440 -rect -274 754852 56 754859 -rect -400 754796 56 754852 -rect -274 754789 56 754796 -rect -400 754244 56 754300 -rect -274 753656 56 753663 -rect -400 753600 56 753656 -rect -274 753593 56 753600 -rect -400 752956 56 753012 -rect -274 752460 56 752467 -rect -400 752404 56 752460 -rect -274 752397 56 752404 -rect -274 751816 56 751823 -rect -400 751760 56 751816 -rect -274 751753 56 751760 -rect -274 751172 56 751179 -rect -400 751116 56 751172 -rect -274 751109 56 751116 -rect -274 750620 56 750627 -rect -400 750564 56 750620 -rect -274 750557 56 750564 -rect -181 749976 -117 750094 -rect -400 749920 56 749976 -rect -277 749332 -213 749397 -rect -400 749276 56 749332 -rect -277 749213 -213 749276 -rect -85 748688 -21 748805 -rect -400 748632 56 748688 -rect -274 748136 56 748143 -rect -400 748080 56 748136 -rect -274 748073 56 748080 -rect -274 747492 56 747499 -rect -400 747436 56 747492 -rect -274 747429 56 747436 -rect -274 746848 56 746855 -rect -400 746792 56 746848 -rect -274 746785 56 746792 -rect 633270 746710 633726 746766 -rect -274 746296 56 746303 -rect -400 746240 56 746296 -rect -274 746233 56 746240 -rect 633270 746214 633600 746221 -rect 633270 746158 633726 746214 -rect 633270 746151 633600 746158 -rect -181 745652 -117 745770 -rect -400 745596 56 745652 -rect 633270 745570 633600 745577 -rect 633270 745514 633726 745570 -rect 633270 745507 633600 745514 -rect -277 745008 -213 745064 -rect -400 744952 56 745008 -rect -277 744892 -213 744952 -rect 633270 744926 633600 744933 -rect 633270 744870 633726 744926 -rect 633270 744863 633600 744870 -rect -274 744456 56 744463 -rect -400 744400 56 744456 -rect -274 744393 56 744400 -rect 633539 744374 633603 744434 -rect 633270 744318 633726 744374 -rect 633539 744262 633603 744318 -rect -274 743812 56 743819 -rect -400 743756 56 743812 -rect -274 743749 56 743756 -rect 633270 743674 633726 743730 -rect 633443 743556 633507 743674 -rect -274 743168 56 743175 -rect -400 743112 56 743168 -rect -274 743105 56 743112 -rect 633270 743086 633600 743093 -rect 633270 743030 633726 743086 -rect 633270 743023 633600 743030 -rect -400 742560 56 742616 -rect 633270 742534 633600 742541 -rect 633270 742478 633726 742534 -rect 633270 742471 633600 742478 -rect 633270 741890 633600 741897 -rect 633270 741834 633726 741890 -rect 633270 741827 633600 741834 -rect 633270 741246 633600 741253 -rect 633270 741190 633726 741246 -rect 633270 741183 633600 741190 -rect 633270 740638 633726 740694 -rect 633347 740521 633411 740638 -rect 633539 740050 633603 740113 -rect 633270 739994 633726 740050 -rect 633539 739929 633603 739994 -rect 633270 739350 633726 739406 -rect 633443 739232 633507 739350 -rect 633270 738762 633600 738769 -rect 633270 738706 633726 738762 -rect 633270 738699 633600 738706 -rect 633270 738210 633600 738217 -rect 633270 738154 633726 738210 -rect 633270 738147 633600 738154 -rect 633270 737566 633600 737573 -rect 633270 737510 633726 737566 -rect 633270 737503 633600 737510 -rect 633270 736922 633600 736929 -rect 633270 736866 633726 736922 -rect 633270 736859 633600 736866 -rect 633270 736314 633726 736370 -rect 633270 735726 633600 735733 -rect 633270 735670 633726 735726 -rect 633270 735663 633600 735670 -rect 633270 735026 633726 735082 -rect 633270 734530 633600 734537 -rect 633270 734474 633726 734530 -rect 633270 734467 633600 734474 -rect 633270 733886 633600 733893 -rect 633270 733830 633726 733886 -rect 633270 733823 633600 733830 -rect 633270 733186 633726 733242 -rect 633270 732634 633726 732690 -rect 633270 732046 633600 732053 -rect 633270 731990 633726 732046 -rect 633270 731983 633600 731990 -rect 633443 731402 633507 731519 -rect 633270 731346 633726 731402 -rect -400 714724 56 714780 -rect -181 714607 -117 714724 -rect -274 714136 56 714143 -rect -400 714080 56 714136 -rect -274 714073 56 714080 -rect -400 713436 56 713492 -rect -400 712884 56 712940 -rect -274 712296 56 712303 -rect -400 712240 56 712296 -rect -274 712233 56 712240 -rect -274 711652 56 711659 -rect -400 711596 56 711652 -rect -274 711589 56 711596 -rect -400 711044 56 711100 -rect -274 710456 56 710463 -rect -400 710400 56 710456 -rect -274 710393 56 710400 -rect -400 709756 56 709812 -rect -274 709260 56 709267 -rect -400 709204 56 709260 -rect -274 709197 56 709204 -rect -274 708616 56 708623 -rect -400 708560 56 708616 -rect -274 708553 56 708560 -rect -274 707972 56 707979 -rect -400 707916 56 707972 -rect -274 707909 56 707916 -rect -274 707420 56 707427 -rect -400 707364 56 707420 -rect -274 707357 56 707364 -rect -181 706776 -117 706894 -rect -400 706720 56 706776 -rect -277 706132 -213 706197 -rect -400 706076 56 706132 -rect -277 706013 -213 706076 -rect -85 705488 -21 705605 -rect -400 705432 56 705488 -rect -274 704936 56 704943 -rect -400 704880 56 704936 -rect -274 704873 56 704880 -rect -274 704292 56 704299 -rect -400 704236 56 704292 -rect -274 704229 56 704236 -rect -274 703648 56 703655 -rect -400 703592 56 703648 -rect -274 703585 56 703592 -rect -274 703096 56 703103 -rect -400 703040 56 703096 -rect -274 703033 56 703040 -rect -181 702452 -117 702570 -rect -400 702396 56 702452 -rect -277 701808 -213 701864 -rect -400 701752 56 701808 -rect -277 701692 -213 701752 -rect 633270 701710 633726 701766 -rect -274 701256 56 701263 -rect -400 701200 56 701256 -rect -274 701193 56 701200 -rect 633270 701214 633600 701221 -rect 633270 701158 633726 701214 -rect 633270 701151 633600 701158 -rect -274 700612 56 700619 -rect -400 700556 56 700612 -rect -274 700549 56 700556 -rect 633270 700570 633600 700577 -rect 633270 700514 633726 700570 -rect 633270 700507 633600 700514 -rect -274 699968 56 699975 -rect -400 699912 56 699968 -rect -274 699905 56 699912 -rect 633270 699926 633600 699933 -rect 633270 699870 633726 699926 -rect 633270 699863 633600 699870 -rect -400 699360 56 699416 -rect 633539 699374 633603 699434 -rect 633270 699318 633726 699374 -rect 633539 699262 633603 699318 -rect 633270 698674 633726 698730 -rect 633443 698556 633507 698674 -rect 633270 698086 633600 698093 -rect 633270 698030 633726 698086 -rect 633270 698023 633600 698030 -rect 633270 697534 633600 697541 -rect 633270 697478 633726 697534 -rect 633270 697471 633600 697478 -rect 633270 696890 633600 696897 -rect 633270 696834 633726 696890 -rect 633270 696827 633600 696834 -rect 633270 696246 633600 696253 -rect 633270 696190 633726 696246 -rect 633270 696183 633600 696190 -rect 633270 695638 633726 695694 -rect 633347 695521 633411 695638 -rect 633539 695050 633603 695113 -rect 633270 694994 633726 695050 -rect 633539 694929 633603 694994 -rect 633270 694350 633726 694406 -rect 633443 694232 633507 694350 -rect 633270 693762 633600 693769 -rect 633270 693706 633726 693762 -rect 633270 693699 633600 693706 -rect 633270 693210 633600 693217 -rect 633270 693154 633726 693210 -rect 633270 693147 633600 693154 -rect 633270 692566 633600 692573 -rect 633270 692510 633726 692566 -rect 633270 692503 633600 692510 -rect 633270 691922 633600 691929 -rect 633270 691866 633726 691922 -rect 633270 691859 633600 691866 -rect 633270 691314 633726 691370 -rect 633270 690726 633600 690733 -rect 633270 690670 633726 690726 -rect 633270 690663 633600 690670 -rect 633270 690026 633726 690082 -rect 633270 689530 633600 689537 -rect 633270 689474 633726 689530 -rect 633270 689467 633600 689474 -rect 633270 688886 633600 688893 -rect 633270 688830 633726 688886 -rect 633270 688823 633600 688830 -rect 633270 688186 633726 688242 -rect 633270 687634 633726 687690 -rect 633270 687046 633600 687053 -rect 633270 686990 633726 687046 -rect 633270 686983 633600 686990 -rect 633443 686402 633507 686519 -rect 633270 686346 633726 686402 -rect -400 671524 56 671580 -rect -181 671407 -117 671524 -rect -274 670936 56 670943 -rect -400 670880 56 670936 -rect -274 670873 56 670880 -rect -400 670236 56 670292 -rect -400 669684 56 669740 -rect -274 669096 56 669103 -rect -400 669040 56 669096 -rect -274 669033 56 669040 -rect -274 668452 56 668459 -rect -400 668396 56 668452 -rect -274 668389 56 668396 -rect -400 667844 56 667900 -rect -274 667256 56 667263 -rect -400 667200 56 667256 -rect -274 667193 56 667200 -rect -400 666556 56 666612 -rect -274 666060 56 666067 -rect -400 666004 56 666060 -rect -274 665997 56 666004 -rect -274 665416 56 665423 -rect -400 665360 56 665416 -rect -274 665353 56 665360 -rect -274 664772 56 664779 -rect -400 664716 56 664772 -rect -274 664709 56 664716 -rect -274 664220 56 664227 -rect -400 664164 56 664220 -rect -274 664157 56 664164 -rect -181 663576 -117 663694 -rect -400 663520 56 663576 -rect -277 662932 -213 662997 -rect -400 662876 56 662932 -rect -277 662813 -213 662876 -rect -85 662288 -21 662405 -rect -400 662232 56 662288 -rect -274 661736 56 661743 -rect -400 661680 56 661736 -rect -274 661673 56 661680 -rect -274 661092 56 661099 -rect -400 661036 56 661092 -rect -274 661029 56 661036 -rect -274 660448 56 660455 -rect -400 660392 56 660448 -rect -274 660385 56 660392 -rect -274 659896 56 659903 -rect -400 659840 56 659896 -rect -274 659833 56 659840 -rect -181 659252 -117 659370 -rect -400 659196 56 659252 -rect -277 658608 -213 658664 -rect -400 658552 56 658608 -rect -277 658492 -213 658552 -rect -274 658056 56 658063 -rect -400 658000 56 658056 -rect -274 657993 56 658000 -rect -274 657412 56 657419 -rect -400 657356 56 657412 -rect -274 657349 56 657356 -rect -274 656768 56 656775 -rect -400 656712 56 656768 -rect -274 656705 56 656712 -rect 633270 656710 633726 656766 -rect -400 656160 56 656216 -rect 633270 656214 633600 656221 -rect 633270 656158 633726 656214 -rect 633270 656151 633600 656158 -rect 633270 655570 633600 655577 -rect 633270 655514 633726 655570 -rect 633270 655507 633600 655514 -rect 633270 654926 633600 654933 -rect 633270 654870 633726 654926 -rect 633270 654863 633600 654870 -rect 633539 654374 633603 654434 -rect 633270 654318 633726 654374 -rect 633539 654262 633603 654318 -rect 633270 653674 633726 653730 -rect 633443 653556 633507 653674 -rect 633270 653086 633600 653093 -rect 633270 653030 633726 653086 -rect 633270 653023 633600 653030 -rect 633270 652534 633600 652541 -rect 633270 652478 633726 652534 -rect 633270 652471 633600 652478 -rect 633270 651890 633600 651897 -rect 633270 651834 633726 651890 -rect 633270 651827 633600 651834 -rect 633270 651246 633600 651253 -rect 633270 651190 633726 651246 -rect 633270 651183 633600 651190 -rect 633270 650638 633726 650694 -rect 633347 650521 633411 650638 -rect 633539 650050 633603 650113 -rect 633270 649994 633726 650050 -rect 633539 649929 633603 649994 -rect 633270 649350 633726 649406 -rect 633443 649232 633507 649350 -rect 633270 648762 633600 648769 -rect 633270 648706 633726 648762 -rect 633270 648699 633600 648706 -rect 633270 648210 633600 648217 -rect 633270 648154 633726 648210 -rect 633270 648147 633600 648154 -rect 633270 647566 633600 647573 -rect 633270 647510 633726 647566 -rect 633270 647503 633600 647510 -rect 633270 646922 633600 646929 -rect 633270 646866 633726 646922 -rect 633270 646859 633600 646866 -rect 633270 646314 633726 646370 -rect 633270 645726 633600 645733 -rect 633270 645670 633726 645726 -rect 633270 645663 633600 645670 -rect 633270 645026 633726 645082 -rect 633270 644530 633600 644537 -rect 633270 644474 633726 644530 -rect 633270 644467 633600 644474 -rect 633270 643886 633600 643893 -rect 633270 643830 633726 643886 -rect 633270 643823 633600 643830 -rect 633270 643186 633726 643242 -rect 633270 642634 633726 642690 -rect 633270 642046 633600 642053 -rect 633270 641990 633726 642046 -rect 633270 641983 633600 641990 -rect 633443 641402 633507 641519 -rect 633270 641346 633726 641402 -rect -400 628324 56 628380 -rect -181 628207 -117 628324 -rect -274 627736 56 627743 -rect -400 627680 56 627736 -rect -274 627673 56 627680 -rect -400 627036 56 627092 -rect -400 626484 56 626540 -rect -274 625896 56 625903 -rect -400 625840 56 625896 -rect -274 625833 56 625840 -rect -274 625252 56 625259 -rect -400 625196 56 625252 -rect -274 625189 56 625196 -rect -400 624644 56 624700 -rect -274 624056 56 624063 -rect -400 624000 56 624056 -rect -274 623993 56 624000 -rect -400 623356 56 623412 -rect -274 622860 56 622867 -rect -400 622804 56 622860 -rect -274 622797 56 622804 -rect -274 622216 56 622223 -rect -400 622160 56 622216 -rect -274 622153 56 622160 -rect -274 621572 56 621579 -rect -400 621516 56 621572 -rect -274 621509 56 621516 -rect -274 621020 56 621027 -rect -400 620964 56 621020 -rect -274 620957 56 620964 -rect -181 620376 -117 620494 -rect -400 620320 56 620376 -rect -277 619732 -213 619797 -rect -400 619676 56 619732 -rect -277 619613 -213 619676 -rect -85 619088 -21 619205 -rect -400 619032 56 619088 -rect -274 618536 56 618543 -rect -400 618480 56 618536 -rect -274 618473 56 618480 -rect -274 617892 56 617899 -rect -400 617836 56 617892 -rect -274 617829 56 617836 -rect -274 617248 56 617255 -rect -400 617192 56 617248 -rect -274 617185 56 617192 -rect -274 616696 56 616703 -rect -400 616640 56 616696 -rect -274 616633 56 616640 -rect -181 616052 -117 616170 -rect -400 615996 56 616052 -rect -277 615408 -213 615464 -rect -400 615352 56 615408 -rect -277 615292 -213 615352 -rect -274 614856 56 614863 -rect -400 614800 56 614856 -rect -274 614793 56 614800 -rect -274 614212 56 614219 -rect -400 614156 56 614212 -rect -274 614149 56 614156 -rect -274 613568 56 613575 -rect -400 613512 56 613568 -rect -274 613505 56 613512 -rect -400 612960 56 613016 -rect 633270 611510 633726 611566 -rect 633270 611014 633600 611021 -rect 633270 610958 633726 611014 -rect 633270 610951 633600 610958 -rect 633270 610370 633600 610377 -rect 633270 610314 633726 610370 -rect 633270 610307 633600 610314 -rect 633270 609726 633600 609733 -rect 633270 609670 633726 609726 -rect 633270 609663 633600 609670 -rect 633539 609174 633603 609234 -rect 633270 609118 633726 609174 -rect 633539 609062 633603 609118 -rect 633270 608474 633726 608530 -rect 633443 608356 633507 608474 -rect 633270 607886 633600 607893 -rect 633270 607830 633726 607886 -rect 633270 607823 633600 607830 -rect 633270 607334 633600 607341 -rect 633270 607278 633726 607334 -rect 633270 607271 633600 607278 -rect 633270 606690 633600 606697 -rect 633270 606634 633726 606690 -rect 633270 606627 633600 606634 -rect 633270 606046 633600 606053 -rect 633270 605990 633726 606046 -rect 633270 605983 633600 605990 -rect 633270 605438 633726 605494 -rect 633347 605321 633411 605438 -rect 633539 604850 633603 604913 -rect 633270 604794 633726 604850 -rect 633539 604729 633603 604794 -rect 633270 604150 633726 604206 -rect 633443 604032 633507 604150 -rect 633270 603562 633600 603569 -rect 633270 603506 633726 603562 -rect 633270 603499 633600 603506 -rect 633270 603010 633600 603017 -rect 633270 602954 633726 603010 -rect 633270 602947 633600 602954 -rect 633270 602366 633600 602373 -rect 633270 602310 633726 602366 -rect 633270 602303 633600 602310 -rect 633270 601722 633600 601729 -rect 633270 601666 633726 601722 -rect 633270 601659 633600 601666 -rect 633270 601114 633726 601170 -rect 633270 600526 633600 600533 -rect 633270 600470 633726 600526 -rect 633270 600463 633600 600470 -rect 633270 599826 633726 599882 -rect 633270 599330 633600 599337 -rect 633270 599274 633726 599330 -rect 633270 599267 633600 599274 -rect 633270 598686 633600 598693 -rect 633270 598630 633726 598686 -rect 633270 598623 633600 598630 -rect 633270 597986 633726 598042 -rect 633270 597434 633726 597490 -rect 633270 596846 633600 596853 -rect 633270 596790 633726 596846 -rect 633270 596783 633600 596790 -rect 633443 596202 633507 596319 -rect 633270 596146 633726 596202 -rect -400 585124 56 585180 -rect -181 585007 -117 585124 -rect -274 584536 56 584543 -rect -400 584480 56 584536 -rect -274 584473 56 584480 -rect -400 583836 56 583892 -rect -400 583284 56 583340 -rect -274 582696 56 582703 -rect -400 582640 56 582696 -rect -274 582633 56 582640 -rect -274 582052 56 582059 -rect -400 581996 56 582052 -rect -274 581989 56 581996 -rect -400 581444 56 581500 -rect -274 580856 56 580863 -rect -400 580800 56 580856 -rect -274 580793 56 580800 -rect -400 580156 56 580212 -rect -274 579660 56 579667 -rect -400 579604 56 579660 -rect -274 579597 56 579604 -rect -274 579016 56 579023 -rect -400 578960 56 579016 -rect -274 578953 56 578960 -rect -274 578372 56 578379 -rect -400 578316 56 578372 -rect -274 578309 56 578316 -rect -274 577820 56 577827 -rect -400 577764 56 577820 -rect -274 577757 56 577764 -rect -181 577176 -117 577294 -rect -400 577120 56 577176 -rect -277 576532 -213 576597 -rect -400 576476 56 576532 -rect -277 576413 -213 576476 -rect -85 575888 -21 576005 -rect -400 575832 56 575888 -rect -274 575336 56 575343 -rect -400 575280 56 575336 -rect -274 575273 56 575280 -rect -274 574692 56 574699 -rect -400 574636 56 574692 -rect -274 574629 56 574636 -rect -274 574048 56 574055 -rect -400 573992 56 574048 -rect -274 573985 56 573992 -rect -274 573496 56 573503 -rect -400 573440 56 573496 -rect -274 573433 56 573440 -rect -181 572852 -117 572970 -rect -400 572796 56 572852 -rect -277 572208 -213 572264 -rect -400 572152 56 572208 -rect -277 572092 -213 572152 -rect -274 571656 56 571663 -rect -400 571600 56 571656 -rect -274 571593 56 571600 -rect -274 571012 56 571019 -rect -400 570956 56 571012 -rect -274 570949 56 570956 -rect -274 570368 56 570375 -rect -400 570312 56 570368 -rect -274 570305 56 570312 -rect -400 569760 56 569816 -rect 633270 566510 633726 566566 -rect 633270 566014 633600 566021 -rect 633270 565958 633726 566014 -rect 633270 565951 633600 565958 -rect 633270 565370 633600 565377 -rect 633270 565314 633726 565370 -rect 633270 565307 633600 565314 -rect 633270 564726 633600 564733 -rect 633270 564670 633726 564726 -rect 633270 564663 633600 564670 -rect 633539 564174 633603 564234 -rect 633270 564118 633726 564174 -rect 633539 564062 633603 564118 -rect 633270 563474 633726 563530 -rect 633443 563356 633507 563474 -rect 633270 562886 633600 562893 -rect 633270 562830 633726 562886 -rect 633270 562823 633600 562830 -rect 633270 562334 633600 562341 -rect 633270 562278 633726 562334 -rect 633270 562271 633600 562278 -rect 633270 561690 633600 561697 -rect 633270 561634 633726 561690 -rect 633270 561627 633600 561634 -rect 633270 561046 633600 561053 -rect 633270 560990 633726 561046 -rect 633270 560983 633600 560990 -rect 633270 560438 633726 560494 -rect 633347 560321 633411 560438 -rect 633539 559850 633603 559913 -rect 633270 559794 633726 559850 -rect 633539 559729 633603 559794 -rect 633270 559150 633726 559206 -rect 633443 559032 633507 559150 -rect 633270 558562 633600 558569 -rect 633270 558506 633726 558562 -rect 633270 558499 633600 558506 -rect 633270 558010 633600 558017 -rect 633270 557954 633726 558010 -rect 633270 557947 633600 557954 -rect 633270 557366 633600 557373 -rect 633270 557310 633726 557366 -rect 633270 557303 633600 557310 -rect 633270 556722 633600 556729 -rect 633270 556666 633726 556722 -rect 633270 556659 633600 556666 -rect 633270 556114 633726 556170 -rect 633270 555526 633600 555533 -rect 633270 555470 633726 555526 -rect 633270 555463 633600 555470 -rect 633270 554826 633726 554882 -rect 633270 554330 633600 554337 -rect 633270 554274 633726 554330 -rect 633270 554267 633600 554274 -rect 633270 553686 633600 553693 -rect 633270 553630 633726 553686 -rect 633270 553623 633600 553630 -rect 633270 552986 633726 553042 -rect 633270 552434 633726 552490 -rect 633270 551846 633600 551853 -rect 633270 551790 633726 551846 -rect 633270 551783 633600 551790 -rect 633443 551202 633507 551319 -rect 633270 551146 633726 551202 -rect -400 541924 56 541980 -rect -181 541807 -117 541924 -rect -274 541336 56 541343 -rect -400 541280 56 541336 -rect -274 541273 56 541280 -rect -400 540636 56 540692 -rect -400 540084 56 540140 -rect -274 539496 56 539503 -rect -400 539440 56 539496 -rect -274 539433 56 539440 -rect -274 538852 56 538859 -rect -400 538796 56 538852 -rect -274 538789 56 538796 -rect -400 538244 56 538300 -rect -274 537656 56 537663 -rect -400 537600 56 537656 -rect -274 537593 56 537600 -rect -400 536956 56 537012 -rect -274 536460 56 536467 -rect -400 536404 56 536460 -rect -274 536397 56 536404 -rect -274 535816 56 535823 -rect -400 535760 56 535816 -rect -274 535753 56 535760 -rect -274 535172 56 535179 -rect -400 535116 56 535172 -rect -274 535109 56 535116 -rect -274 534620 56 534627 -rect -400 534564 56 534620 -rect -274 534557 56 534564 -rect -181 533976 -117 534094 -rect -400 533920 56 533976 -rect -277 533332 -213 533397 -rect -400 533276 56 533332 -rect -277 533213 -213 533276 -rect -85 532688 -21 532805 -rect -400 532632 56 532688 -rect -274 532136 56 532143 -rect -400 532080 56 532136 -rect -274 532073 56 532080 -rect -274 531492 56 531499 -rect -400 531436 56 531492 -rect -274 531429 56 531436 -rect -274 530848 56 530855 -rect -400 530792 56 530848 -rect -274 530785 56 530792 -rect -274 530296 56 530303 -rect -400 530240 56 530296 -rect -274 530233 56 530240 -rect -181 529652 -117 529770 -rect -400 529596 56 529652 -rect -277 529008 -213 529064 -rect -400 528952 56 529008 -rect -277 528892 -213 528952 -rect -274 528456 56 528463 -rect -400 528400 56 528456 -rect -274 528393 56 528400 -rect -274 527812 56 527819 -rect -400 527756 56 527812 -rect -274 527749 56 527756 -rect -274 527168 56 527175 -rect -400 527112 56 527168 -rect -274 527105 56 527112 -rect -400 526560 56 526616 -rect 633270 521310 633726 521366 -rect 633270 520814 633600 520821 -rect 633270 520758 633726 520814 -rect 633270 520751 633600 520758 -rect 633270 520170 633600 520177 -rect 633270 520114 633726 520170 -rect 633270 520107 633600 520114 -rect 633270 519526 633600 519533 -rect 633270 519470 633726 519526 -rect 633270 519463 633600 519470 -rect 633539 518974 633603 519034 -rect 633270 518918 633726 518974 -rect 633539 518862 633603 518918 -rect 633270 518274 633726 518330 -rect 633443 518156 633507 518274 -rect 633270 517686 633600 517693 -rect 633270 517630 633726 517686 -rect 633270 517623 633600 517630 -rect 633270 517134 633600 517141 -rect 633270 517078 633726 517134 -rect 633270 517071 633600 517078 -rect 633270 516490 633600 516497 -rect 633270 516434 633726 516490 -rect 633270 516427 633600 516434 -rect 633270 515846 633600 515853 -rect 633270 515790 633726 515846 -rect 633270 515783 633600 515790 -rect 633270 515238 633726 515294 -rect 633347 515121 633411 515238 -rect 633539 514650 633603 514713 -rect 633270 514594 633726 514650 -rect 633539 514529 633603 514594 -rect 633270 513950 633726 514006 -rect 633443 513832 633507 513950 -rect 633270 513362 633600 513369 -rect 633270 513306 633726 513362 -rect 633270 513299 633600 513306 -rect 633270 512810 633600 512817 -rect 633270 512754 633726 512810 -rect 633270 512747 633600 512754 -rect 633270 512166 633600 512173 -rect 633270 512110 633726 512166 -rect 633270 512103 633600 512110 -rect 633270 511522 633600 511529 -rect 633270 511466 633726 511522 -rect 633270 511459 633600 511466 -rect 633270 510914 633726 510970 -rect 633270 510326 633600 510333 -rect 633270 510270 633726 510326 -rect 633270 510263 633600 510270 -rect 633270 509626 633726 509682 -rect 633270 509130 633600 509137 -rect 633270 509074 633726 509130 -rect 633270 509067 633600 509074 -rect 633270 508486 633600 508493 -rect 633270 508430 633726 508486 -rect 633270 508423 633600 508430 -rect 633270 507786 633726 507842 -rect 633270 507234 633726 507290 -rect 633270 506646 633600 506653 -rect 633270 506590 633726 506646 -rect 633270 506583 633600 506590 -rect 633443 506002 633507 506119 -rect 633270 505946 633726 506002 -rect -400 498724 56 498780 -rect -181 498607 -117 498724 -rect -274 498136 56 498143 -rect -400 498080 56 498136 -rect -274 498073 56 498080 -rect -400 497436 56 497492 -rect -400 496884 56 496940 -rect -274 496296 56 496303 -rect -400 496240 56 496296 -rect -274 496233 56 496240 -rect -274 495652 56 495659 -rect -400 495596 56 495652 -rect -274 495589 56 495596 -rect -400 495044 56 495100 -rect -274 494456 56 494463 -rect -400 494400 56 494456 -rect -274 494393 56 494400 -rect -400 493756 56 493812 -rect -274 493260 56 493267 -rect -400 493204 56 493260 -rect -274 493197 56 493204 -rect -274 492616 56 492623 -rect -400 492560 56 492616 -rect -274 492553 56 492560 -rect -274 491972 56 491979 -rect -400 491916 56 491972 -rect -274 491909 56 491916 -rect -274 491420 56 491427 -rect -400 491364 56 491420 -rect -274 491357 56 491364 -rect -181 490776 -117 490894 -rect -400 490720 56 490776 -rect -277 490132 -213 490197 -rect -400 490076 56 490132 -rect -277 490013 -213 490076 -rect -85 489488 -21 489605 -rect -400 489432 56 489488 -rect -274 488936 56 488943 -rect -400 488880 56 488936 -rect -274 488873 56 488880 -rect -274 488292 56 488299 -rect -400 488236 56 488292 -rect -274 488229 56 488236 -rect -274 487648 56 487655 -rect -400 487592 56 487648 -rect -274 487585 56 487592 -rect -274 487096 56 487103 -rect -400 487040 56 487096 -rect -274 487033 56 487040 -rect -181 486452 -117 486570 -rect -400 486396 56 486452 -rect -277 485808 -213 485864 -rect -400 485752 56 485808 -rect -277 485692 -213 485752 -rect -274 485256 56 485263 -rect -400 485200 56 485256 -rect -274 485193 56 485200 -rect -274 484612 56 484619 -rect -400 484556 56 484612 -rect -274 484549 56 484556 -rect -274 483968 56 483975 -rect -400 483912 56 483968 -rect -274 483905 56 483912 -rect -400 483360 56 483416 -rect -400 371124 56 371180 -rect -181 371007 -117 371124 -rect -274 370536 56 370543 -rect -400 370480 56 370536 -rect -274 370473 56 370480 -rect -400 369836 56 369892 -rect -400 369284 56 369340 -rect -274 368696 56 368703 -rect -400 368640 56 368696 -rect -274 368633 56 368640 -rect -274 368052 56 368059 -rect -400 367996 56 368052 -rect -274 367989 56 367996 -rect -400 367444 56 367500 -rect -274 366856 56 366863 -rect -400 366800 56 366856 -rect -274 366793 56 366800 -rect -400 366156 56 366212 -rect -274 365660 56 365667 -rect -400 365604 56 365660 -rect -274 365597 56 365604 -rect -274 365016 56 365023 -rect -400 364960 56 365016 -rect -274 364953 56 364960 -rect -274 364372 56 364379 -rect -400 364316 56 364372 -rect -274 364309 56 364316 -rect -274 363820 56 363827 -rect -400 363764 56 363820 -rect -274 363757 56 363764 -rect -181 363176 -117 363294 -rect -400 363120 56 363176 -rect -277 362532 -213 362597 -rect -400 362476 56 362532 -rect -277 362413 -213 362476 -rect -85 361888 -21 362005 -rect -400 361832 56 361888 -rect -274 361336 56 361343 -rect -400 361280 56 361336 -rect -274 361273 56 361280 -rect -274 360692 56 360699 -rect -400 360636 56 360692 -rect -274 360629 56 360636 -rect -274 360048 56 360055 -rect -400 359992 56 360048 -rect -274 359985 56 359992 -rect -274 359496 56 359503 -rect -400 359440 56 359496 -rect -274 359433 56 359440 -rect -181 358852 -117 358970 -rect -400 358796 56 358852 -rect -277 358208 -213 358264 -rect -400 358152 56 358208 -rect -277 358092 -213 358152 -rect -274 357656 56 357663 -rect -400 357600 56 357656 -rect -274 357593 56 357600 -rect -274 357012 56 357019 -rect -400 356956 56 357012 -rect -274 356949 56 356956 -rect -274 356368 56 356375 -rect -400 356312 56 356368 -rect -274 356305 56 356312 -rect -400 355760 56 355816 -rect 633270 344110 633726 344166 -rect 633270 343614 633600 343621 -rect 633270 343558 633726 343614 -rect 633270 343551 633600 343558 -rect 633270 342970 633600 342977 -rect 633270 342914 633726 342970 -rect 633270 342907 633600 342914 -rect 633270 342326 633600 342333 -rect 633270 342270 633726 342326 -rect 633270 342263 633600 342270 -rect 633539 341774 633603 341834 -rect 633270 341718 633726 341774 -rect 633539 341662 633603 341718 -rect 633270 341074 633726 341130 -rect 633443 340956 633507 341074 -rect 633270 340486 633600 340493 -rect 633270 340430 633726 340486 -rect 633270 340423 633600 340430 -rect 633270 339934 633600 339941 -rect 633270 339878 633726 339934 -rect 633270 339871 633600 339878 -rect 633270 339290 633600 339297 -rect 633270 339234 633726 339290 -rect 633270 339227 633600 339234 -rect 633270 338646 633600 338653 -rect 633270 338590 633726 338646 -rect 633270 338583 633600 338590 -rect 633270 338038 633726 338094 -rect 633347 337921 633411 338038 -rect 633539 337450 633603 337513 -rect 633270 337394 633726 337450 -rect 633539 337329 633603 337394 -rect 633270 336750 633726 336806 -rect 633443 336632 633507 336750 -rect 633270 336162 633600 336169 -rect 633270 336106 633726 336162 -rect 633270 336099 633600 336106 -rect 633270 335610 633600 335617 -rect 633270 335554 633726 335610 -rect 633270 335547 633600 335554 -rect 633270 334966 633600 334973 -rect 633270 334910 633726 334966 -rect 633270 334903 633600 334910 -rect 633270 334322 633600 334329 -rect 633270 334266 633726 334322 -rect 633270 334259 633600 334266 -rect 633270 333714 633726 333770 -rect 633270 333126 633600 333133 -rect 633270 333070 633726 333126 -rect 633270 333063 633600 333070 -rect 633270 332426 633726 332482 -rect 633270 331874 633726 331930 -rect 633270 331286 633600 331293 -rect 633270 331230 633726 331286 -rect 633270 331223 633600 331230 -rect 633270 330586 633726 330642 -rect 633270 330034 633726 330090 -rect 633270 329446 633600 329453 -rect 633270 329390 633726 329446 -rect 633270 329383 633600 329390 -rect 633443 328802 633507 328919 -rect 633270 328746 633726 328802 -rect -400 327924 56 327980 -rect -181 327807 -117 327924 -rect -274 327336 56 327343 -rect -400 327280 56 327336 -rect -274 327273 56 327280 -rect -400 326636 56 326692 -rect -400 326084 56 326140 -rect -274 325496 56 325503 -rect -400 325440 56 325496 -rect -274 325433 56 325440 -rect -274 324852 56 324859 -rect -400 324796 56 324852 -rect -274 324789 56 324796 -rect -400 324244 56 324300 -rect -274 323656 56 323663 -rect -400 323600 56 323656 -rect -274 323593 56 323600 -rect -400 322956 56 323012 -rect -274 322460 56 322467 -rect -400 322404 56 322460 -rect -274 322397 56 322404 -rect -274 321816 56 321823 -rect -400 321760 56 321816 -rect -274 321753 56 321760 -rect -274 321172 56 321179 -rect -400 321116 56 321172 -rect -274 321109 56 321116 -rect -274 320620 56 320627 -rect -400 320564 56 320620 -rect -274 320557 56 320564 -rect -181 319976 -117 320094 -rect -400 319920 56 319976 -rect -277 319332 -213 319397 -rect -400 319276 56 319332 -rect -277 319213 -213 319276 -rect -85 318688 -21 318805 -rect -400 318632 56 318688 -rect -274 318136 56 318143 -rect -400 318080 56 318136 -rect -274 318073 56 318080 -rect -274 317492 56 317499 -rect -400 317436 56 317492 -rect -274 317429 56 317436 -rect -274 316848 56 316855 -rect -400 316792 56 316848 -rect -274 316785 56 316792 -rect -274 316296 56 316303 -rect -400 316240 56 316296 -rect -274 316233 56 316240 -rect -181 315652 -117 315770 -rect -400 315596 56 315652 -rect -277 315008 -213 315064 -rect -400 314952 56 315008 -rect -277 314892 -213 314952 -rect -274 314456 56 314463 -rect -400 314400 56 314456 -rect -274 314393 56 314400 -rect -274 313812 56 313819 -rect -400 313756 56 313812 -rect -274 313749 56 313756 -rect -274 313168 56 313175 -rect -400 313112 56 313168 -rect -274 313105 56 313112 -rect -400 312560 56 312616 -rect 633270 298910 633726 298966 -rect 633270 298414 633600 298421 -rect 633270 298358 633726 298414 -rect 633270 298351 633600 298358 -rect 633270 297770 633600 297777 -rect 633270 297714 633726 297770 -rect 633270 297707 633600 297714 -rect 633270 297126 633600 297133 -rect 633270 297070 633726 297126 -rect 633270 297063 633600 297070 -rect 633539 296574 633603 296634 -rect 633270 296518 633726 296574 -rect 633539 296462 633603 296518 -rect 633270 295874 633726 295930 -rect 633443 295756 633507 295874 -rect 633270 295286 633600 295293 -rect 633270 295230 633726 295286 -rect 633270 295223 633600 295230 -rect 633270 294734 633600 294741 -rect 633270 294678 633726 294734 -rect 633270 294671 633600 294678 -rect 633270 294090 633600 294097 -rect 633270 294034 633726 294090 -rect 633270 294027 633600 294034 -rect 633270 293446 633600 293453 -rect 633270 293390 633726 293446 -rect 633270 293383 633600 293390 -rect 633270 292838 633726 292894 -rect 633347 292721 633411 292838 -rect 633539 292250 633603 292313 -rect 633270 292194 633726 292250 -rect 633539 292129 633603 292194 -rect 633270 291550 633726 291606 -rect 633443 291432 633507 291550 -rect 633270 290962 633600 290969 -rect 633270 290906 633726 290962 -rect 633270 290899 633600 290906 -rect 633270 290410 633600 290417 -rect 633270 290354 633726 290410 -rect 633270 290347 633600 290354 -rect 633270 289766 633600 289773 -rect 633270 289710 633726 289766 -rect 633270 289703 633600 289710 -rect 633270 289122 633600 289129 -rect 633270 289066 633726 289122 -rect 633270 289059 633600 289066 -rect 633270 288514 633726 288570 -rect 633270 287926 633600 287933 -rect 633270 287870 633726 287926 -rect 633270 287863 633600 287870 -rect 633270 287226 633726 287282 -rect 633270 286674 633726 286730 -rect 633270 286086 633600 286093 -rect 633270 286030 633726 286086 -rect 633270 286023 633600 286030 -rect 633270 285386 633726 285442 -rect 633270 284834 633726 284890 -rect -400 284724 56 284780 -rect -181 284607 -117 284724 -rect 633270 284246 633600 284253 -rect 633270 284190 633726 284246 -rect 633270 284183 633600 284190 -rect -274 284136 56 284143 -rect -400 284080 56 284136 -rect -274 284073 56 284080 -rect 633443 283602 633507 283719 -rect 633270 283546 633726 283602 -rect -400 283436 56 283492 -rect -400 282884 56 282940 -rect -274 282296 56 282303 -rect -400 282240 56 282296 -rect -274 282233 56 282240 -rect -274 281652 56 281659 -rect -400 281596 56 281652 -rect -274 281589 56 281596 -rect -400 281044 56 281100 -rect -274 280456 56 280463 -rect -400 280400 56 280456 -rect -274 280393 56 280400 -rect -400 279756 56 279812 -rect -274 279260 56 279267 -rect -400 279204 56 279260 -rect -274 279197 56 279204 -rect -274 278616 56 278623 -rect -400 278560 56 278616 -rect -274 278553 56 278560 -rect -274 277972 56 277979 -rect -400 277916 56 277972 -rect -274 277909 56 277916 -rect -274 277420 56 277427 -rect -400 277364 56 277420 -rect -274 277357 56 277364 -rect -181 276776 -117 276894 -rect -400 276720 56 276776 -rect -277 276132 -213 276197 -rect -400 276076 56 276132 -rect -277 276013 -213 276076 -rect -85 275488 -21 275605 -rect -400 275432 56 275488 -rect -274 274936 56 274943 -rect -400 274880 56 274936 -rect -274 274873 56 274880 -rect -274 274292 56 274299 -rect -400 274236 56 274292 -rect -274 274229 56 274236 -rect -274 273648 56 273655 -rect -400 273592 56 273648 -rect -274 273585 56 273592 -rect -274 273096 56 273103 -rect -400 273040 56 273096 -rect -274 273033 56 273040 -rect -181 272452 -117 272570 -rect -400 272396 56 272452 -rect -277 271808 -213 271864 -rect -400 271752 56 271808 -rect -277 271692 -213 271752 -rect -274 271256 56 271263 -rect -400 271200 56 271256 -rect -274 271193 56 271200 -rect -274 270612 56 270619 -rect -400 270556 56 270612 -rect -274 270549 56 270556 -rect -274 269968 56 269975 -rect -400 269912 56 269968 -rect -274 269905 56 269912 -rect -400 269360 56 269416 -rect 633270 253910 633726 253966 -rect 633270 253414 633600 253421 -rect 633270 253358 633726 253414 -rect 633270 253351 633600 253358 -rect 633270 252770 633600 252777 -rect 633270 252714 633726 252770 -rect 633270 252707 633600 252714 -rect 633270 252126 633600 252133 -rect 633270 252070 633726 252126 -rect 633270 252063 633600 252070 -rect 633539 251574 633603 251634 -rect 633270 251518 633726 251574 -rect 633539 251462 633603 251518 -rect 633270 250874 633726 250930 -rect 633443 250756 633507 250874 -rect 633270 250286 633600 250293 -rect 633270 250230 633726 250286 -rect 633270 250223 633600 250230 -rect 633270 249734 633600 249741 -rect 633270 249678 633726 249734 -rect 633270 249671 633600 249678 -rect 633270 249090 633600 249097 -rect 633270 249034 633726 249090 -rect 633270 249027 633600 249034 -rect 633270 248446 633600 248453 -rect 633270 248390 633726 248446 -rect 633270 248383 633600 248390 -rect 633270 247838 633726 247894 -rect 633347 247721 633411 247838 -rect 633539 247250 633603 247313 -rect 633270 247194 633726 247250 -rect 633539 247129 633603 247194 -rect 633270 246550 633726 246606 -rect 633443 246432 633507 246550 -rect 633270 245962 633600 245969 -rect 633270 245906 633726 245962 -rect 633270 245899 633600 245906 -rect 633270 245410 633600 245417 -rect 633270 245354 633726 245410 -rect 633270 245347 633600 245354 -rect 633270 244766 633600 244773 -rect 633270 244710 633726 244766 -rect 633270 244703 633600 244710 -rect 633270 244122 633600 244129 -rect 633270 244066 633726 244122 -rect 633270 244059 633600 244066 -rect 633270 243514 633726 243570 -rect 633270 242926 633600 242933 -rect 633270 242870 633726 242926 -rect 633270 242863 633600 242870 -rect 633270 242226 633726 242282 -rect 633270 241674 633726 241730 -rect -400 241524 56 241580 -rect -181 241407 -117 241524 -rect 633270 241086 633600 241093 -rect 633270 241030 633726 241086 -rect 633270 241023 633600 241030 -rect -274 240936 56 240943 -rect -400 240880 56 240936 -rect -274 240873 56 240880 -rect 633270 240386 633726 240442 -rect -400 240236 56 240292 -rect 633270 239834 633726 239890 -rect -400 239684 56 239740 -rect 633270 239246 633600 239253 -rect 633270 239190 633726 239246 -rect 633270 239183 633600 239190 -rect -274 239096 56 239103 -rect -400 239040 56 239096 -rect -274 239033 56 239040 -rect 633443 238602 633507 238719 -rect 633270 238546 633726 238602 -rect -274 238452 56 238459 -rect -400 238396 56 238452 -rect -274 238389 56 238396 -rect -400 237844 56 237900 -rect -274 237256 56 237263 -rect -400 237200 56 237256 -rect -274 237193 56 237200 -rect -400 236556 56 236612 -rect -274 236060 56 236067 -rect -400 236004 56 236060 -rect -274 235997 56 236004 -rect -274 235416 56 235423 -rect -400 235360 56 235416 -rect -274 235353 56 235360 -rect -274 234772 56 234779 -rect -400 234716 56 234772 -rect -274 234709 56 234716 -rect -274 234220 56 234227 -rect -400 234164 56 234220 -rect -274 234157 56 234164 -rect -181 233576 -117 233694 -rect -400 233520 56 233576 -rect -277 232932 -213 232997 -rect -400 232876 56 232932 -rect -277 232813 -213 232876 -rect -85 232288 -21 232405 -rect -400 232232 56 232288 -rect -274 231736 56 231743 -rect -400 231680 56 231736 -rect -274 231673 56 231680 -rect -274 231092 56 231099 -rect -400 231036 56 231092 -rect -274 231029 56 231036 -rect -274 230448 56 230455 -rect -400 230392 56 230448 -rect -274 230385 56 230392 -rect -274 229896 56 229903 -rect -400 229840 56 229896 -rect -274 229833 56 229840 -rect -181 229252 -117 229370 -rect -400 229196 56 229252 -rect -277 228608 -213 228664 -rect -400 228552 56 228608 -rect -277 228492 -213 228552 -rect -274 228056 56 228063 -rect -400 228000 56 228056 -rect -274 227993 56 228000 -rect -274 227412 56 227419 -rect -400 227356 56 227412 -rect -274 227349 56 227356 -rect -274 226768 56 226775 -rect -400 226712 56 226768 -rect -274 226705 56 226712 -rect -400 226160 56 226216 -rect 633270 208910 633726 208966 -rect 633270 208414 633600 208421 -rect 633270 208358 633726 208414 -rect 633270 208351 633600 208358 -rect 633270 207770 633600 207777 -rect 633270 207714 633726 207770 -rect 633270 207707 633600 207714 -rect 633270 207126 633600 207133 -rect 633270 207070 633726 207126 -rect 633270 207063 633600 207070 -rect 633539 206574 633603 206634 -rect 633270 206518 633726 206574 -rect 633539 206462 633603 206518 -rect 633270 205874 633726 205930 -rect 633443 205756 633507 205874 -rect 633270 205286 633600 205293 -rect 633270 205230 633726 205286 -rect 633270 205223 633600 205230 -rect 633270 204734 633600 204741 -rect 633270 204678 633726 204734 -rect 633270 204671 633600 204678 -rect 633270 204090 633600 204097 -rect 633270 204034 633726 204090 -rect 633270 204027 633600 204034 -rect 633270 203446 633600 203453 -rect 633270 203390 633726 203446 -rect 633270 203383 633600 203390 -rect 633270 202838 633726 202894 -rect 633347 202721 633411 202838 -rect 633539 202250 633603 202313 -rect 633270 202194 633726 202250 -rect 633539 202129 633603 202194 -rect 633270 201550 633726 201606 -rect 633443 201432 633507 201550 -rect 633270 200962 633600 200969 -rect 633270 200906 633726 200962 -rect 633270 200899 633600 200906 -rect 633270 200410 633600 200417 -rect 633270 200354 633726 200410 -rect 633270 200347 633600 200354 -rect 633270 199766 633600 199773 -rect 633270 199710 633726 199766 -rect 633270 199703 633600 199710 -rect 633270 199122 633600 199129 -rect 633270 199066 633726 199122 -rect 633270 199059 633600 199066 -rect 633270 198514 633726 198570 -rect -400 198324 56 198380 -rect -181 198207 -117 198324 -rect 633270 197926 633600 197933 -rect 633270 197870 633726 197926 -rect 633270 197863 633600 197870 -rect -274 197736 56 197743 -rect -400 197680 56 197736 -rect -274 197673 56 197680 -rect 633270 197226 633726 197282 -rect -400 197036 56 197092 -rect 633270 196674 633726 196730 -rect -400 196484 56 196540 -rect 633270 196086 633600 196093 -rect 633270 196030 633726 196086 -rect 633270 196023 633600 196030 -rect -274 195896 56 195903 -rect -400 195840 56 195896 -rect -274 195833 56 195840 -rect 633270 195386 633726 195442 -rect -400 195196 56 195252 -rect 633270 194834 633726 194890 -rect -400 194644 56 194700 -rect 633270 194246 633600 194253 -rect 633270 194190 633726 194246 -rect 633270 194183 633600 194190 -rect -274 194056 56 194063 -rect -400 194000 56 194056 -rect -274 193993 56 194000 -rect 633443 193602 633507 193719 -rect 633270 193546 633726 193602 -rect -400 193356 56 193412 -rect -274 192860 56 192867 -rect -400 192804 56 192860 -rect -274 192797 56 192804 -rect -274 192216 56 192223 -rect -400 192160 56 192216 -rect -274 192153 56 192160 -rect -274 191572 56 191579 -rect -400 191516 56 191572 -rect -274 191509 56 191516 -rect -274 191020 56 191027 -rect -400 190964 56 191020 -rect -274 190957 56 190964 -rect -181 190376 -117 190494 -rect -400 190320 56 190376 -rect -277 189732 -213 189797 -rect -400 189676 56 189732 -rect -277 189613 -213 189676 -rect -85 189088 -21 189205 -rect -400 189032 56 189088 -rect -274 188536 56 188543 -rect -400 188480 56 188536 -rect -274 188473 56 188480 -rect -274 187892 56 187899 -rect -400 187836 56 187892 -rect -274 187829 56 187836 -rect -274 187248 56 187255 -rect -400 187192 56 187248 -rect -274 187185 56 187192 -rect -274 186696 56 186703 -rect -400 186640 56 186696 -rect -274 186633 56 186640 -rect -181 186052 -117 186170 -rect -400 185996 56 186052 -rect -277 185408 -213 185464 -rect -400 185352 56 185408 -rect -277 185292 -213 185352 -rect -274 184856 56 184863 -rect -400 184800 56 184856 -rect -274 184793 56 184800 -rect -274 184212 56 184219 -rect -400 184156 56 184212 -rect -274 184149 56 184156 -rect -274 183568 56 183575 -rect -400 183512 56 183568 -rect -274 183505 56 183512 -rect -400 182960 56 183016 -rect 633270 163710 633726 163766 -rect 633270 163214 633600 163221 -rect 633270 163158 633726 163214 -rect 633270 163151 633600 163158 -rect 633270 162570 633600 162577 -rect 633270 162514 633726 162570 -rect 633270 162507 633600 162514 -rect 633270 161926 633600 161933 -rect 633270 161870 633726 161926 -rect 633270 161863 633600 161870 -rect 633539 161374 633603 161434 -rect 633270 161318 633726 161374 -rect 633539 161262 633603 161318 -rect 633270 160674 633726 160730 -rect 633443 160556 633507 160674 -rect 633270 160086 633600 160093 -rect 633270 160030 633726 160086 -rect 633270 160023 633600 160030 -rect 633270 159534 633600 159541 -rect 633270 159478 633726 159534 -rect 633270 159471 633600 159478 -rect 633270 158890 633600 158897 -rect 633270 158834 633726 158890 -rect 633270 158827 633600 158834 -rect 633270 158246 633600 158253 -rect 633270 158190 633726 158246 -rect 633270 158183 633600 158190 -rect 633270 157638 633726 157694 -rect 633347 157521 633411 157638 -rect 633539 157050 633603 157113 -rect 633270 156994 633726 157050 -rect 633539 156929 633603 156994 -rect 633270 156350 633726 156406 -rect 633443 156232 633507 156350 -rect 633270 155762 633600 155769 -rect 633270 155706 633726 155762 -rect 633270 155699 633600 155706 -rect 633270 155210 633600 155217 -rect -400 155124 56 155180 -rect 633270 155154 633726 155210 -rect 633270 155147 633600 155154 -rect -181 155007 -117 155124 -rect 633270 154566 633600 154573 -rect -274 154536 56 154543 -rect -400 154480 56 154536 -rect 633270 154510 633726 154566 -rect 633270 154503 633600 154510 -rect -274 154473 56 154480 -rect 633270 153922 633600 153929 -rect -400 153836 56 153892 -rect 633270 153866 633726 153922 -rect 633270 153859 633600 153866 -rect -400 153284 56 153340 -rect 633270 153314 633726 153370 -rect 633270 152726 633600 152733 -rect -274 152696 56 152703 -rect -400 152640 56 152696 -rect 633270 152670 633726 152726 -rect 633270 152663 633600 152670 -rect -274 152633 56 152640 -rect -400 151996 56 152052 -rect 633270 152026 633726 152082 -rect -400 151444 56 151500 -rect 633270 151474 633726 151530 -rect 633270 150886 633600 150893 -rect -274 150856 56 150863 -rect -400 150800 56 150856 -rect 633270 150830 633726 150886 -rect 633270 150823 633600 150830 -rect -274 150793 56 150800 -rect -400 150156 56 150212 -rect 633270 150186 633726 150242 -rect -274 149660 56 149667 -rect -400 149604 56 149660 -rect 633270 149634 633726 149690 -rect -274 149597 56 149604 -rect 633270 149046 633600 149053 -rect -274 149016 56 149023 -rect -400 148960 56 149016 -rect 633270 148990 633726 149046 -rect 633270 148983 633600 148990 -rect -274 148953 56 148960 -rect 633443 148402 633507 148519 -rect -274 148372 56 148379 -rect -400 148316 56 148372 -rect 633270 148346 633726 148402 -rect -274 148309 56 148316 -rect -274 147820 56 147827 -rect -400 147764 56 147820 -rect -274 147757 56 147764 -rect -181 147176 -117 147294 -rect -400 147120 56 147176 -rect -277 146532 -213 146597 -rect -400 146476 56 146532 -rect -277 146413 -213 146476 -rect -85 145888 -21 146005 -rect -400 145832 56 145888 -rect -274 145336 56 145343 -rect -400 145280 56 145336 -rect -274 145273 56 145280 -rect -274 144692 56 144699 -rect -400 144636 56 144692 -rect -274 144629 56 144636 -rect -274 144048 56 144055 -rect -400 143992 56 144048 -rect -274 143985 56 143992 -rect -274 143496 56 143503 -rect -400 143440 56 143496 -rect -274 143433 56 143440 -rect -181 142852 -117 142970 -rect -400 142796 56 142852 -rect -277 142208 -213 142264 -rect -400 142152 56 142208 -rect -277 142092 -213 142152 -rect -274 141656 56 141663 -rect -400 141600 56 141656 -rect -274 141593 56 141600 -rect -274 141012 56 141019 -rect -400 140956 56 141012 -rect -274 140949 56 140956 -rect -274 140368 56 140375 -rect -400 140312 56 140368 -rect -274 140305 56 140312 -rect -400 139760 56 139816 -rect 633270 118710 633726 118766 -rect 633270 118214 633600 118221 -rect 633270 118158 633726 118214 -rect 633270 118151 633600 118158 -rect 633270 117570 633600 117577 -rect 633270 117514 633726 117570 -rect 633270 117507 633600 117514 -rect 633270 116926 633600 116933 -rect 633270 116870 633726 116926 -rect 633270 116863 633600 116870 -rect 633539 116374 633603 116434 -rect 633270 116318 633726 116374 -rect 633539 116262 633603 116318 -rect 633270 115674 633726 115730 -rect 633443 115556 633507 115674 -rect 633270 115086 633600 115093 -rect 633270 115030 633726 115086 -rect 633270 115023 633600 115030 -rect 633270 114534 633600 114541 -rect 633270 114478 633726 114534 -rect 633270 114471 633600 114478 -rect 633270 113890 633600 113897 -rect 633270 113834 633726 113890 -rect 633270 113827 633600 113834 -rect 633270 113246 633600 113253 -rect 633270 113190 633726 113246 -rect 633270 113183 633600 113190 -rect 633270 112638 633726 112694 -rect 633347 112521 633411 112638 -rect 633539 112050 633603 112113 -rect 633270 111994 633726 112050 -rect 633539 111929 633603 111994 -rect 633270 111350 633726 111406 -rect 633443 111232 633507 111350 -rect 633270 110762 633600 110769 -rect 633270 110706 633726 110762 -rect 633270 110699 633600 110706 -rect 633270 110210 633600 110217 -rect 633270 110154 633726 110210 -rect 633270 110147 633600 110154 -rect 633270 109566 633600 109573 -rect 633270 109510 633726 109566 -rect 633270 109503 633600 109510 -rect 633270 108922 633600 108929 -rect 633270 108866 633726 108922 -rect 633270 108859 633600 108866 -rect 633270 108314 633726 108370 -rect 633270 107726 633600 107733 -rect 633270 107670 633726 107726 -rect 633270 107663 633600 107670 -rect 633270 107026 633726 107082 -rect 633270 106474 633726 106530 -rect 633270 105886 633600 105893 -rect 633270 105830 633726 105886 -rect 633270 105823 633600 105830 -rect 633270 105242 633600 105249 -rect 633270 105186 633726 105242 -rect 633270 105179 633600 105186 -rect 633270 104634 633726 104690 -rect 633270 104046 633600 104053 -rect 633270 103990 633726 104046 -rect 633270 103983 633600 103990 -rect 633443 103402 633507 103519 -rect 633270 103346 633726 103402 -rect 633270 73510 633726 73566 -rect 633270 73014 633600 73021 -rect 633270 72958 633726 73014 -rect 633270 72951 633600 72958 -rect 633270 72370 633600 72377 -rect 633270 72314 633726 72370 -rect 633270 72307 633600 72314 -rect 633270 71726 633600 71733 -rect 633270 71670 633726 71726 -rect 633270 71663 633600 71670 -rect 633539 71174 633603 71234 -rect 633270 71118 633726 71174 -rect 633539 71062 633603 71118 -rect 633270 70474 633726 70530 -rect 633443 70356 633507 70474 -rect 633270 69886 633600 69893 -rect 633270 69830 633726 69886 -rect 633270 69823 633600 69830 -rect 633270 69334 633600 69341 -rect 633270 69278 633726 69334 -rect 633270 69271 633600 69278 -rect 633270 68690 633600 68697 -rect 633270 68634 633726 68690 -rect 633270 68627 633600 68634 -rect 633270 68046 633600 68053 -rect 633270 67990 633726 68046 -rect 633270 67983 633600 67990 -rect 633270 67438 633726 67494 -rect 633347 67321 633411 67438 -rect 633539 66850 633603 66913 -rect 633270 66794 633726 66850 -rect 633539 66729 633603 66794 -rect 633270 66150 633726 66206 -rect 633443 66032 633507 66150 -rect 633270 65562 633600 65569 -rect 633270 65506 633726 65562 -rect 633270 65499 633600 65506 -rect 633270 65010 633600 65017 -rect 633270 64954 633726 65010 -rect 633270 64947 633600 64954 -rect 633270 64366 633600 64373 -rect 633270 64310 633726 64366 -rect 633270 64303 633600 64310 -rect 633270 63722 633600 63729 -rect 633270 63666 633726 63722 -rect 633270 63659 633600 63666 -rect 633270 63114 633726 63170 -rect 633270 62526 633600 62533 -rect 633270 62470 633726 62526 -rect 633270 62463 633600 62470 -rect 633270 61826 633726 61882 -rect 633270 61274 633726 61330 -rect 633270 60686 633600 60693 -rect 633270 60630 633726 60686 -rect 633270 60623 633600 60630 -rect 633270 59986 633726 60042 -rect 633270 59434 633726 59490 -rect 633270 58846 633600 58853 -rect 633270 58790 633726 58846 -rect 633270 58783 633600 58790 -rect 633443 58202 633507 58319 -rect 633270 58146 633726 58202 -rect -400 53602 -292 53658 -rect -400 53378 -292 53434 -rect -400 53154 -292 53210 rect 99571 -90 99637 56 -rect 99573 -400 99634 -90 +rect 99574 -400 99634 -90 rect 110164 -400 110220 56 -rect 144546 -117 144602 56 -rect 144546 -181 144719 -117 -rect 144546 -400 144602 -181 rect 145190 -424 145246 56 -rect 145834 -400 145890 56 -rect 146386 -400 146442 56 rect 147030 -424 147086 56 -rect 147674 -424 147730 56 -rect 148226 -400 148282 56 +rect 147638 -424 147766 56 rect 148870 -424 148926 56 -rect 149514 -424 149570 56 -rect 150066 -274 150123 56 -rect 150066 -424 150122 -274 +rect 149435 -424 149649 56 +rect 150066 -424 150122 56 rect 150710 -424 150766 56 rect 151354 -424 151410 56 rect 151906 -424 151962 56 -rect 152550 -117 152606 56 -rect 152432 -181 152606 -117 -rect 152550 -400 152606 -181 -rect 153194 -213 153250 56 -rect 153838 -21 153894 56 -rect 153721 -85 153894 -21 -rect 153129 -277 153313 -213 -rect 153194 -400 153250 -277 -rect 153838 -400 153894 -85 rect 154390 -424 154446 56 rect 155034 -424 155090 56 rect 155678 -424 155734 56 rect 156230 -424 156286 56 -rect 156874 -117 156930 56 -rect 156756 -181 156930 -117 -rect 156874 -400 156930 -181 -rect 157518 -213 157574 56 -rect 157462 -277 157634 -213 -rect 157518 -400 157574 -277 rect 158070 -424 158126 56 rect 158714 -424 158770 56 rect 159358 -424 159414 56 rect 159910 -424 159966 56 rect 160580 -400 160632 56 rect 163791 -400 163843 56 -rect 253146 -117 253202 56 -rect 253146 -181 253319 -117 -rect 253146 -400 253202 -181 rect 253790 -424 253846 56 -rect 254434 -400 254490 56 -rect 254986 -400 255042 56 rect 255630 -424 255686 56 -rect 256274 -424 256330 56 -rect 256826 -400 256882 56 +rect 256238 -424 256366 56 rect 257470 -424 257526 56 -rect 258114 -424 258170 56 +rect 258035 -424 258249 56 rect 258666 -424 258722 56 rect 259310 -424 259366 56 rect 259954 -424 260010 56 rect 260506 -424 260562 56 -rect 261150 -117 261206 56 -rect 261032 -181 261206 -117 -rect 261150 -400 261206 -181 -rect 261794 -213 261850 56 -rect 262438 -21 262494 56 -rect 262321 -85 262494 -21 -rect 261729 -277 261913 -213 -rect 261794 -400 261850 -277 -rect 262438 -400 262494 -85 rect 262990 -424 263046 56 rect 263634 -424 263690 56 rect 264278 -424 264334 56 rect 264830 -424 264886 56 -rect 265474 -117 265530 56 -rect 265356 -181 265530 -117 -rect 265474 -400 265530 -181 -rect 266118 -213 266174 56 -rect 266062 -277 266234 -213 -rect 266118 -400 266174 -277 rect 266670 -424 266726 56 rect 267314 -424 267370 56 rect 267958 -424 268014 56 rect 268510 -424 268566 56 -rect 268816 -363 268880 -311 -rect 268824 -400 268872 -363 rect 269180 -400 269232 56 rect 273360 -400 273412 56 -rect 307946 -117 308002 56 -rect 307946 -181 308119 -117 -rect 307946 -400 308002 -181 rect 308590 -424 308646 56 -rect 309234 -400 309290 56 -rect 309786 -400 309842 56 rect 310430 -424 310486 56 -rect 311074 -424 311130 56 -rect 311626 -400 311682 56 +rect 311038 -424 311166 56 rect 312270 -424 312326 56 -rect 312914 -424 312970 56 +rect 312835 -424 313049 56 rect 313466 -424 313522 56 rect 314110 -424 314166 56 rect 314754 -424 314810 56 rect 315306 -424 315362 56 -rect 315950 -117 316006 56 -rect 315832 -181 316006 -117 -rect 315950 -400 316006 -181 -rect 316594 -213 316650 56 -rect 317238 -21 317294 56 -rect 317121 -85 317294 -21 -rect 316529 -277 316713 -213 -rect 316594 -400 316650 -277 -rect 317238 -400 317294 -85 rect 317790 -424 317846 56 rect 318434 -424 318490 56 rect 319078 -424 319134 56 rect 319630 -424 319686 56 -rect 320274 -117 320330 56 -rect 320156 -181 320330 -117 -rect 320274 -400 320330 -181 -rect 320918 -213 320974 56 -rect 320862 -277 321034 -213 -rect 320918 -400 320974 -277 rect 321470 -424 321526 56 rect 322114 -424 322170 56 rect 322758 -424 322814 56 rect 323310 -424 323366 56 -rect 323616 -363 323680 -311 -rect 323624 -400 323672 -363 rect 323980 -400 324032 56 rect 328165 -400 328217 34 -rect 362746 -117 362802 56 -rect 362746 -181 362919 -117 -rect 362746 -400 362802 -181 rect 363390 -424 363446 56 -rect 364034 -400 364090 56 -rect 364586 -400 364642 56 rect 365230 -424 365286 56 -rect 365874 -424 365930 56 -rect 366426 -400 366482 56 +rect 365838 -424 365966 56 rect 367070 -424 367126 56 -rect 367714 -424 367770 56 +rect 367635 -424 367849 56 rect 368266 -424 368322 56 rect 368910 -424 368966 56 rect 369554 -424 369610 56 rect 370106 -424 370162 56 -rect 370750 -117 370806 56 -rect 370632 -181 370806 -117 -rect 370750 -400 370806 -181 -rect 371394 -213 371450 56 -rect 372038 -21 372094 56 -rect 371921 -85 372094 -21 -rect 371329 -277 371513 -213 -rect 371394 -400 371450 -277 -rect 372038 -400 372094 -85 rect 372590 -424 372646 56 rect 373234 -424 373290 56 rect 373878 -424 373934 56 rect 374430 -424 374486 56 -rect 375074 -117 375130 56 -rect 374956 -181 375130 -117 -rect 375074 -400 375130 -181 -rect 375718 -213 375774 56 -rect 375662 -277 375834 -213 -rect 375718 -400 375774 -277 rect 376270 -424 376326 56 rect 376914 -424 376970 56 rect 377558 -424 377614 56 rect 378110 -424 378166 56 -rect 378416 -363 378480 -311 -rect 378424 -400 378472 -363 rect 378780 -400 378832 56 rect 382978 -400 383030 56 -rect 417546 -117 417602 56 -rect 417546 -181 417719 -117 -rect 417546 -400 417602 -181 rect 418190 -424 418246 56 -rect 418834 -400 418890 56 -rect 419386 -400 419442 56 rect 420030 -424 420086 56 -rect 420674 -424 420730 56 -rect 421226 -400 421282 56 +rect 420638 -424 420766 56 rect 421870 -424 421926 56 -rect 422514 -424 422570 56 +rect 422435 -424 422649 56 rect 423066 -424 423122 56 rect 423710 -424 423766 56 rect 424354 -424 424410 56 rect 424906 -424 424962 56 -rect 425550 -117 425606 56 -rect 425432 -181 425606 -117 -rect 425550 -400 425606 -181 -rect 426194 -213 426250 56 -rect 426838 -21 426894 56 -rect 426721 -85 426894 -21 -rect 426129 -277 426313 -213 -rect 426194 -400 426250 -277 -rect 426838 -400 426894 -85 rect 427390 -424 427446 56 rect 428034 -424 428090 56 rect 428678 -424 428734 56 rect 429230 -424 429286 56 -rect 429874 -117 429930 56 -rect 429756 -181 429930 -117 -rect 429874 -400 429930 -181 -rect 430518 -213 430574 56 -rect 430462 -277 430634 -213 -rect 430518 -400 430574 -277 rect 431070 -424 431126 56 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483534 56 rect 484030 -424 484086 56 -rect 484674 -117 484730 56 -rect 484556 -181 484730 -117 -rect 484674 -400 484730 -181 -rect 485318 -213 485374 56 -rect 485262 -277 485434 -213 -rect 485318 -400 485374 -277 rect 485870 -424 485926 56 rect 486514 -424 486570 56 rect 487158 -424 487214 56 rect 487710 -424 487766 56 -rect 488016 -363 488080 -311 -rect 488024 -400 488072 -363 rect 488380 -400 488432 56 rect 492635 -400 492687 56 rect 605082 -260 605134 56 @@ -2549,605 +461,601 @@ rect 611813 -400 611841 -260 rect 612037 -400 612065 -260 << metal3 >> rect 291362 953270 296142 953770 -rect 301341 953270 306121 953770 +rect 301342 953270 306122 953770 rect 533562 953270 538342 953770 -rect 543541 953270 548321 953770 -rect 633270 929007 633726 929069 -rect -424 927073 56 927143 -rect 633270 927005 633726 927067 -rect -424 925233 56 925303 -rect 633270 925103 633750 925173 -rect -424 924589 56 924659 -rect 633270 924551 633750 924621 -rect 633270 923907 633750 923977 -rect -424 923393 56 923463 -rect 633270 923263 633750 923333 -rect -424 922749 57 922819 -rect -424 922197 56 922267 -rect -424 921553 56 921623 -rect 633270 921423 633750 921493 -rect -424 920909 56 920979 -rect 633270 920871 633750 920941 -rect -424 920357 56 920427 -rect 633270 920227 633750 920297 -rect 633270 919583 633750 919653 -rect -424 917873 56 917943 -rect -424 917229 56 917299 -rect 633270 917099 633750 917169 -rect -424 916585 56 916655 -rect 633270 916547 633750 916617 -rect -424 916033 56 916103 -rect 633270 915903 633750 915973 -rect 633270 915259 633750 915329 -rect 633269 914707 633750 914777 -rect -424 914193 56 914263 -rect 633270 914063 633750 914133 -rect -424 913549 56 913619 -rect -424 912905 56 912975 -rect 633270 912867 633750 912937 -rect -424 912353 56 912423 -rect 633270 912223 633750 912293 -rect 633270 910383 633750 910453 +rect 543542 953270 548322 953770 +rect 633270 929006 633726 929068 +rect -424 927072 56 927142 +rect 633270 927006 633726 927068 +rect -424 925232 56 925302 +rect 633270 925104 633750 925174 +rect -424 924560 56 924688 +rect 633270 924552 633750 924622 +rect 633270 923908 633750 923978 +rect -424 923392 56 923462 +rect 633270 923264 633750 923334 +rect -424 922677 56 922891 +rect -424 922196 56 922266 +rect -424 921552 56 921622 +rect 633270 921424 633750 921494 +rect -424 920908 56 920978 +rect 633270 920872 633750 920942 +rect -424 920356 56 920426 +rect 633270 920228 633750 920298 +rect 633270 919584 633750 919654 +rect -424 917872 56 917942 +rect -424 917228 56 917298 +rect 633270 917100 633750 917170 +rect -424 916584 56 916654 +rect 633270 916548 633750 916618 +rect -424 916032 56 916102 +rect 633270 915904 633750 915974 +rect 633270 915260 633750 915330 +rect 633270 914635 633750 914849 +rect -424 914192 56 914262 +rect 633270 914064 633750 914134 +rect -424 913548 56 913618 +rect -424 912904 56 912974 +rect 633270 912838 633750 912966 +rect -424 912352 56 912422 +rect 633270 912224 633750 912294 +rect 633270 910384 633750 910454 rect -400 906644 56 906704 rect -400 904644 56 904704 -rect -444 880014 56 884803 -rect -444 875053 56 879715 -rect 633270 875563 633770 880363 -rect -444 869963 56 874763 -rect 633270 870611 633770 875273 -rect 633270 865523 633770 870312 -rect -444 837741 56 842521 -rect 633270 839007 633726 839069 -rect 633270 837005 633726 837067 -rect 633270 835903 633750 835973 -rect 633270 835351 633750 835421 -rect 633270 834707 633750 834777 -rect 633270 834063 633750 834133 +rect -444 880014 56 884804 +rect -444 875054 56 879716 +rect -444 869964 56 874764 +rect -444 837742 56 842522 +rect 633270 839006 633726 839068 +rect 633270 837006 633726 837068 +rect 633270 835904 633750 835974 +rect 633270 835352 633750 835422 +rect 633270 834708 633750 834778 +rect 633270 834064 633750 834134 rect -444 827762 56 832542 -rect 633270 832223 633750 832293 -rect 633270 831671 633750 831741 -rect 633270 831027 633750 831097 -rect 633270 830383 633750 830453 -rect 633270 827899 633750 827969 -rect 633270 827347 633750 827417 -rect 633270 826703 633750 826773 -rect 633270 826059 633750 826129 -rect 633269 825507 633750 825577 -rect 633270 824863 633750 824933 -rect 633270 823667 633750 823737 -rect 633270 823023 633750 823093 -rect 633270 821183 633750 821253 -rect -444 795541 56 800321 +rect 633270 832224 633750 832294 +rect 633270 831672 633750 831742 +rect 633270 831028 633750 831098 +rect 633270 830384 633750 830454 +rect 633270 827900 633750 827970 +rect 633270 827348 633750 827418 +rect 633270 826704 633750 826774 +rect 633270 826060 633750 826130 +rect 633270 825435 633750 825649 +rect 633270 824864 633750 824934 +rect 633270 823638 633750 823766 +rect 633270 823024 633750 823094 +rect 633270 821184 633750 821254 +rect -444 795542 56 800322 rect -444 785562 56 790342 rect 633270 786384 633770 791164 -rect 633270 776405 633770 781185 -rect -424 757273 56 757343 -rect -424 755433 56 755503 -rect -424 754789 56 754859 -rect -424 753593 56 753663 -rect -424 752949 57 753019 -rect -424 752397 56 752467 -rect -424 751753 56 751823 -rect -424 751109 56 751179 -rect -424 750557 56 750627 -rect 633270 750007 633726 750069 -rect -424 748073 56 748143 -rect 633270 748005 633726 748067 -rect -424 747429 56 747499 -rect -424 746785 56 746855 -rect 633270 746703 633750 746773 -rect -424 746233 56 746303 -rect 633270 746151 633750 746221 -rect 633270 745507 633750 745577 -rect 633270 744863 633750 744933 -rect -424 744393 56 744463 -rect -424 743749 56 743819 -rect -424 743105 56 743175 -rect 633270 743023 633750 743093 -rect -424 742553 56 742623 -rect 633270 742471 633750 742541 -rect 633270 741827 633750 741897 -rect 633270 741183 633750 741253 -rect 633270 738699 633750 738769 -rect 633270 738147 633750 738217 -rect 633270 737503 633750 737573 -rect 633270 736859 633750 736929 +rect 633270 776406 633770 781186 +rect -424 757272 56 757342 +rect -424 755432 56 755502 +rect -424 754760 56 754888 +rect -424 753592 56 753662 +rect -424 752877 56 753091 +rect -424 752396 56 752466 +rect -424 751752 56 751822 +rect -424 751108 56 751178 +rect -424 750556 56 750626 +rect 633270 750006 633726 750068 +rect -424 748072 56 748142 +rect 633270 748006 633726 748068 +rect -424 747428 56 747498 +rect -424 746784 56 746854 +rect 633270 746704 633750 746774 +rect -424 746232 56 746302 +rect 633270 746152 633750 746222 +rect 633270 745508 633750 745578 +rect 633270 744864 633750 744934 +rect -424 744392 56 744462 +rect -424 743748 56 743818 +rect -424 743104 56 743174 +rect 633270 743024 633750 743094 +rect -424 742552 56 742622 +rect 633270 742472 633750 742542 +rect 633270 741828 633750 741898 +rect 633270 741184 633750 741254 +rect 633270 738700 633750 738770 +rect 633270 738148 633750 738218 +rect 633270 737504 633750 737574 +rect 633270 736860 633750 736930 rect -400 736644 56 736704 -rect 633269 736307 633750 736377 -rect 633270 735663 633750 735733 +rect 633270 736235 633750 736449 +rect 633270 735664 633750 735734 rect -400 734644 56 734704 -rect 633270 734467 633750 734537 -rect 633270 733823 633750 733893 -rect 633270 731983 633750 732053 -rect -424 714073 56 714143 -rect -424 712233 56 712303 -rect -424 711589 56 711659 -rect -424 710393 56 710463 -rect -424 709749 57 709819 -rect -424 709197 56 709267 -rect -424 708553 56 708623 -rect -424 707909 56 707979 -rect -424 707357 56 707427 -rect 633270 705007 633726 705069 -rect -424 704873 56 704943 -rect -424 704229 56 704299 -rect -424 703585 56 703655 -rect -424 703033 56 703103 -rect 633270 703005 633726 703067 -rect 633270 701703 633750 701773 -rect -424 701193 56 701263 -rect 633270 701151 633750 701221 -rect -424 700549 56 700619 -rect 633270 700507 633750 700577 -rect -424 699905 56 699975 -rect 633270 699863 633750 699933 -rect -424 699353 56 699423 -rect 633270 698023 633750 698093 -rect 633270 697471 633750 697541 -rect 633270 696827 633750 696897 -rect 633270 696183 633750 696253 +rect 633270 734438 633750 734566 +rect 633270 733824 633750 733894 +rect 633270 731984 633750 732054 +rect -424 714072 56 714142 +rect -424 712232 56 712302 +rect -424 711560 56 711688 +rect -424 710392 56 710462 +rect -424 709677 56 709891 +rect -424 709196 56 709266 +rect -424 708552 56 708622 +rect -424 707908 56 707978 +rect -424 707356 56 707426 +rect 633270 705006 633726 705068 +rect -424 704872 56 704942 +rect -424 704228 56 704298 +rect -424 703584 56 703654 +rect -424 703032 56 703102 +rect 633270 703006 633726 703068 +rect 633270 701704 633750 701774 +rect -424 701192 56 701262 +rect 633270 701152 633750 701222 +rect -424 700548 56 700618 +rect 633270 700508 633750 700578 +rect -424 699904 56 699974 +rect 633270 699864 633750 699934 +rect -424 699352 56 699422 +rect 633270 698024 633750 698094 +rect 633270 697472 633750 697542 +rect 633270 696828 633750 696898 +rect 633270 696184 633750 696254 rect -400 693644 56 693704 -rect 633270 693699 633750 693769 -rect 633270 693147 633750 693217 -rect 633270 692503 633750 692573 -rect 633270 691859 633750 691929 +rect 633270 693700 633750 693770 +rect 633270 693148 633750 693218 +rect 633270 692504 633750 692574 +rect 633270 691860 633750 691930 rect -400 691644 56 691704 -rect 633269 691307 633750 691377 -rect 633270 690663 633750 690733 -rect 633270 689467 633750 689537 -rect 633270 688823 633750 688893 -rect 633270 686983 633750 687053 -rect -424 670873 56 670943 -rect -424 669033 56 669103 -rect -424 668389 56 668459 -rect -424 667193 56 667263 -rect -424 666549 57 666619 -rect -424 665997 56 666067 -rect -424 665353 56 665423 -rect -424 664709 56 664779 -rect -424 664157 56 664227 -rect -424 661673 56 661743 -rect -424 661029 56 661099 -rect -424 660385 56 660455 -rect 633270 660007 633726 660069 -rect -424 659833 56 659903 -rect -424 657993 56 658063 -rect 633270 658005 633726 658067 -rect -424 657349 56 657419 -rect -424 656705 56 656775 -rect 633270 656703 633750 656773 -rect -424 656153 56 656223 -rect 633270 656151 633750 656221 -rect 633270 655507 633750 655577 -rect 633270 654863 633750 654933 -rect 633270 653023 633750 653093 -rect 633270 652471 633750 652541 -rect 633270 651827 633750 651897 -rect 633270 651183 633750 651253 +rect 633270 691235 633750 691449 +rect 633270 690664 633750 690734 +rect 633270 689438 633750 689566 +rect 633270 688824 633750 688894 +rect 633270 686984 633750 687054 +rect -424 670872 56 670942 +rect -424 669032 56 669102 +rect -424 668360 56 668488 +rect -424 667192 56 667262 +rect -424 666477 56 666691 +rect -424 665996 56 666066 +rect -424 665352 56 665422 +rect -424 664708 56 664778 +rect -424 664156 56 664226 +rect -424 661672 56 661742 +rect -424 661028 56 661098 +rect -424 660384 56 660454 +rect 633270 660006 633726 660068 +rect -424 659832 56 659902 +rect -424 657992 56 658062 +rect 633270 658006 633726 658068 +rect -424 657348 56 657418 +rect -424 656704 56 656774 +rect 633270 656704 633750 656774 +rect -424 656152 56 656222 +rect 633270 656152 633750 656222 +rect 633270 655508 633750 655578 +rect 633270 654864 633750 654934 +rect 633270 653024 633750 653094 +rect 633270 652472 633750 652542 +rect 633270 651828 633750 651898 +rect 633270 651184 633750 651254 rect -400 650644 56 650704 rect -400 648644 56 648704 -rect 633270 648699 633750 648769 -rect 633270 648147 633750 648217 -rect 633270 647503 633750 647573 -rect 633270 646859 633750 646929 -rect 633269 646307 633750 646377 -rect 633270 645663 633750 645733 -rect 633270 644467 633750 644537 -rect 633270 643823 633750 643893 -rect 633270 641983 633750 642053 -rect -424 627673 56 627743 -rect -424 625833 56 625903 -rect -424 625189 56 625259 -rect -424 623993 56 624063 -rect -424 623349 57 623419 -rect -424 622797 56 622867 -rect -424 622153 56 622223 -rect -424 621509 56 621579 -rect -424 620957 56 621027 -rect -424 618473 56 618543 -rect -424 617829 56 617899 -rect -424 617185 56 617255 -rect -424 616633 56 616703 -rect 633270 615007 633726 615069 -rect -424 614793 56 614863 -rect -424 614149 56 614219 -rect -424 613505 56 613575 -rect -424 612953 56 613023 -rect 633270 613005 633726 613067 -rect 633270 611503 633750 611573 -rect 633270 610951 633750 611021 -rect 633270 610307 633750 610377 -rect 633270 609663 633750 609733 -rect 633270 607823 633750 607893 +rect 633270 648700 633750 648770 +rect 633270 648148 633750 648218 +rect 633270 647504 633750 647574 +rect 633270 646860 633750 646930 +rect 633270 646235 633750 646449 +rect 633270 645664 633750 645734 +rect 633270 644438 633750 644566 +rect 633270 643824 633750 643894 +rect 633270 641984 633750 642054 +rect -424 627672 56 627742 +rect -424 625832 56 625902 +rect -424 625160 56 625288 +rect -424 623992 56 624062 +rect -424 623277 56 623491 +rect -424 622796 56 622866 +rect -424 622152 56 622222 +rect -424 621508 56 621578 +rect -424 620956 56 621026 +rect -424 618472 56 618542 +rect -424 617828 56 617898 +rect -424 617184 56 617254 +rect -424 616632 56 616702 +rect 633270 615006 633726 615068 +rect -424 614792 56 614862 +rect -424 614148 56 614218 +rect -424 613504 56 613574 +rect -424 612952 56 613022 +rect 633270 613006 633726 613068 +rect 633270 611504 633750 611574 +rect 633270 610952 633750 611022 +rect 633270 610308 633750 610378 +rect 633270 609664 633750 609734 +rect 633270 607824 633750 607894 rect -400 607644 56 607704 -rect 633270 607271 633750 607341 -rect 633270 606627 633750 606697 -rect 633270 605983 633750 606053 +rect 633270 607272 633750 607342 +rect 633270 606628 633750 606698 +rect 633270 605984 633750 606054 rect -400 605644 56 605704 -rect 633270 603499 633750 603569 -rect 633270 602947 633750 603017 -rect 633270 602303 633750 602373 -rect 633270 601659 633750 601729 -rect 633269 601107 633750 601177 -rect 633270 600463 633750 600533 -rect 633270 599267 633750 599337 -rect 633270 598623 633750 598693 -rect 633270 596783 633750 596853 -rect -424 584473 56 584543 -rect -424 582633 56 582703 -rect -424 581989 56 582059 -rect -424 580793 56 580863 -rect -424 580149 57 580219 -rect -424 579597 56 579667 -rect -424 578953 56 579023 -rect -424 578309 56 578379 -rect -424 577757 56 577827 -rect -424 575273 56 575343 -rect -424 574629 56 574699 -rect -424 573985 56 574055 -rect -424 573433 56 573503 -rect -424 571593 56 571663 -rect -424 570949 56 571019 -rect -424 570305 56 570375 -rect 633270 570007 633726 570069 -rect -424 569753 56 569823 -rect 633270 568005 633726 568067 -rect 633270 566503 633750 566573 -rect 633270 565951 633750 566021 -rect 633270 565307 633750 565377 +rect 633270 603500 633750 603570 +rect 633270 602948 633750 603018 +rect 633270 602304 633750 602374 +rect 633270 601660 633750 601730 +rect 633270 601035 633750 601249 +rect 633270 600464 633750 600534 +rect 633270 599238 633750 599366 +rect 633270 598624 633750 598694 +rect 633270 596784 633750 596854 +rect -424 584472 56 584542 +rect -424 582632 56 582702 +rect -424 581960 56 582088 +rect -424 580792 56 580862 +rect -424 580077 56 580291 +rect -424 579596 56 579666 +rect -424 578952 56 579022 +rect -424 578308 56 578378 +rect -424 577756 56 577826 +rect -424 575272 56 575342 +rect -424 574628 56 574698 +rect -424 573984 56 574054 +rect -424 573432 56 573502 +rect -424 571592 56 571662 +rect -424 570948 56 571018 +rect -424 570304 56 570374 +rect 633270 570006 633726 570068 +rect -424 569752 56 569822 +rect 633270 568006 633726 568068 +rect 633270 566504 633750 566574 +rect 633270 565952 633750 566022 +rect 633270 565308 633750 565378 rect -400 564644 56 564704 -rect 633270 564663 633750 564733 -rect 633270 562823 633750 562893 +rect 633270 564664 633750 564734 +rect 633270 562824 633750 562894 rect -400 562644 56 562704 -rect 633270 562271 633750 562341 -rect 633270 561627 633750 561697 -rect 633270 560983 633750 561053 -rect 633270 558499 633750 558569 -rect 633270 557947 633750 558017 -rect 633270 557303 633750 557373 -rect 633270 556659 633750 556729 -rect 633269 556107 633750 556177 -rect 633270 555463 633750 555533 -rect 633270 554267 633750 554337 -rect 633270 553623 633750 553693 -rect 633270 551783 633750 551853 -rect -424 541273 56 541343 -rect -424 539433 56 539503 -rect -424 538789 56 538859 -rect -424 537593 56 537663 -rect -424 536949 57 537019 -rect -424 536397 56 536467 -rect -424 535753 56 535823 -rect -424 535109 56 535179 -rect -424 534557 56 534627 -rect -424 532073 56 532143 -rect -424 531429 56 531499 -rect -424 530785 56 530855 -rect -424 530233 56 530303 -rect -424 528393 56 528463 -rect -424 527749 56 527819 -rect -424 527105 56 527175 -rect -424 526553 56 526623 -rect 633270 525007 633726 525069 +rect 633270 562272 633750 562342 +rect 633270 561628 633750 561698 +rect 633270 560984 633750 561054 +rect 633270 558500 633750 558570 +rect 633270 557948 633750 558018 +rect 633270 557304 633750 557374 +rect 633270 556660 633750 556730 +rect 633270 556035 633750 556249 +rect 633270 555464 633750 555534 +rect 633270 554238 633750 554366 +rect 633270 553624 633750 553694 +rect 633270 551784 633750 551854 +rect -424 541272 56 541342 +rect -424 539432 56 539502 +rect -424 538760 56 538888 +rect -424 537592 56 537662 +rect -424 536877 56 537091 +rect -424 536396 56 536466 +rect -424 535752 56 535822 +rect -424 535108 56 535178 +rect -424 534556 56 534626 +rect -424 532072 56 532142 +rect -424 531428 56 531498 +rect -424 530784 56 530854 +rect -424 530232 56 530302 +rect -424 528392 56 528462 +rect -424 527748 56 527818 +rect -424 527104 56 527174 +rect -424 526552 56 526622 +rect 633270 525006 633726 525068 rect 633270 523005 633726 523067 rect -400 521644 56 521704 -rect 633270 521303 633750 521373 -rect 633270 520751 633750 520821 -rect 633270 520107 633750 520177 +rect 633270 521304 633750 521374 +rect 633270 520752 633750 520822 +rect 633270 520108 633750 520178 rect -400 519644 56 519704 -rect 633270 519463 633750 519533 -rect 633270 517623 633750 517693 -rect 633270 517071 633750 517141 -rect 633270 516427 633750 516497 -rect 633270 515783 633750 515853 -rect 633270 513299 633750 513369 -rect 633270 512747 633750 512817 -rect 633270 512103 633750 512173 -rect 633270 511459 633750 511529 -rect 633269 510907 633750 510977 -rect 633270 510263 633750 510333 -rect 633270 509067 633750 509137 -rect 633270 508423 633750 508493 -rect 633270 506583 633750 506653 -rect -424 498073 56 498143 -rect -424 496233 56 496303 -rect -424 495589 56 495659 -rect -424 494393 56 494463 -rect -424 493749 57 493819 -rect -424 493197 56 493267 -rect -424 492553 56 492623 -rect -424 491909 56 491979 -rect -424 491357 56 491427 -rect -424 488873 56 488943 -rect -424 488229 56 488299 -rect -424 487585 56 487655 -rect -424 487033 56 487103 -rect -424 485193 56 485263 -rect -424 484549 56 484619 -rect -424 483905 56 483975 -rect -424 483353 56 483423 +rect 633270 519464 633750 519534 +rect 633270 517624 633750 517694 +rect 633270 517072 633750 517142 +rect 633270 516428 633750 516498 +rect 633270 515784 633750 515854 +rect 633270 513300 633750 513370 +rect 633270 512748 633750 512818 +rect 633270 512104 633750 512174 +rect 633270 511460 633750 511530 +rect 633270 510835 633750 511049 +rect 633270 510264 633750 510334 +rect 633270 509038 633750 509166 +rect 633270 508424 633750 508494 +rect 633270 506584 633750 506654 +rect -424 498072 56 498142 +rect -424 496232 56 496302 +rect -424 495560 56 495688 +rect -424 494392 56 494462 +rect -424 493677 56 493891 +rect -424 493196 56 493266 +rect -424 492552 56 492622 +rect -424 491908 56 491978 +rect -424 491356 56 491426 +rect -424 488872 56 488942 +rect -424 488228 56 488298 +rect -424 487584 56 487654 +rect -424 487032 56 487102 +rect -424 485192 56 485262 +rect -424 484548 56 484618 +rect -424 483904 56 483974 +rect -424 483352 56 483422 rect -400 478644 56 478704 rect -400 476644 56 476704 rect 633270 471784 633770 476564 -rect 633270 461805 633770 466585 -rect -444 450941 56 455721 +rect 633270 461804 633770 466584 +rect -444 450940 56 455720 rect -444 440962 56 445742 -rect 633270 427763 633770 432563 -rect 633270 422812 633770 427463 -rect 633270 417723 633770 422512 -rect -444 408814 56 413603 -rect -444 403863 56 408514 -rect -444 398763 56 403563 +rect 633270 427762 633770 432562 +rect 633270 422810 633770 427472 +rect 633270 417722 633770 422512 +rect -444 408814 56 413604 +rect -444 403862 56 408514 +rect -444 398762 56 403562 rect 633270 383584 633770 388364 -rect 633270 373605 633770 378385 -rect -424 370473 56 370543 -rect -424 368633 56 368703 -rect -424 367989 56 368059 -rect -424 366793 56 366863 -rect -424 366149 57 366219 -rect -424 365597 56 365667 -rect -424 364953 56 365023 -rect -424 364309 56 364379 -rect -424 363757 56 363827 -rect -424 361273 56 361343 -rect -424 360629 56 360699 -rect -424 359985 56 360055 -rect -424 359433 56 359503 -rect -424 357593 56 357663 -rect -424 356949 56 357019 -rect -424 356305 56 356375 -rect -424 355753 56 355823 +rect 633270 373606 633770 378386 +rect -424 370472 56 370542 +rect -424 368632 56 368702 +rect -424 367960 56 368088 +rect -424 366792 56 366862 +rect -424 366077 56 366291 +rect -424 365596 56 365666 +rect -424 364952 56 365022 +rect -424 364308 56 364378 +rect -424 363756 56 363826 +rect -424 361272 56 361342 +rect -424 360628 56 360698 +rect -424 359984 56 360054 +rect -424 359432 56 359502 +rect -424 357592 56 357662 +rect -424 356948 56 357018 +rect -424 356304 56 356374 +rect -424 355752 56 355822 rect -400 349644 56 349704 -rect 633270 348007 633726 348069 +rect 633270 348006 633726 348068 rect -400 347644 56 347704 rect 633270 346005 633726 346067 -rect 633270 344103 633750 344173 -rect 633270 343551 633750 343621 -rect 633270 342907 633750 342977 -rect 633270 342263 633750 342333 -rect 633270 340423 633750 340493 -rect 633270 339871 633750 339941 -rect 633270 339227 633750 339297 -rect 633270 338583 633750 338653 -rect 633270 336099 633750 336169 -rect 633270 335547 633750 335617 -rect 633270 334903 633750 334973 -rect 633270 334259 633750 334329 -rect 633269 333707 633750 333777 -rect 633270 333063 633750 333133 -rect 633270 331867 633750 331937 -rect 633270 331223 633750 331293 -rect 633270 329383 633750 329453 -rect -424 327273 56 327343 -rect -424 325433 56 325503 -rect -424 324789 56 324859 -rect -424 323593 56 323663 -rect -424 322949 57 323019 -rect -424 322397 56 322467 -rect -424 321753 56 321823 -rect -424 321109 56 321179 -rect -424 320557 56 320627 -rect -424 318073 56 318143 -rect -424 317429 56 317499 -rect -424 316785 56 316855 -rect -424 316233 56 316303 -rect -424 314393 56 314463 -rect -424 313749 56 313819 -rect -424 313105 56 313175 -rect -424 312553 56 312623 +rect 633270 344104 633750 344174 +rect 633270 343552 633750 343622 +rect 633270 342908 633750 342978 +rect 633270 342264 633750 342334 +rect 633270 340424 633750 340494 +rect 633270 339872 633750 339942 +rect 633270 339228 633750 339298 +rect 633270 338584 633750 338654 +rect 633270 336100 633750 336170 +rect 633270 335548 633750 335618 +rect 633270 334904 633750 334974 +rect 633270 334260 633750 334330 +rect 633270 333635 633750 333849 +rect 633270 333064 633750 333134 +rect 633270 331838 633750 331966 +rect 633270 331224 633750 331294 +rect 633270 329384 633750 329454 +rect -424 327272 56 327342 +rect -424 325432 56 325502 +rect -424 324760 56 324888 +rect -424 323592 56 323662 +rect -424 322877 56 323091 +rect -424 322396 56 322466 +rect -424 321752 56 321822 +rect -424 321108 56 321178 +rect -424 320556 56 320626 +rect -424 318072 56 318142 +rect -424 317428 56 317498 +rect -424 316784 56 316854 +rect -424 316232 56 316302 +rect -424 314392 56 314462 +rect -424 313748 56 313818 +rect -424 313104 56 313174 +rect -424 312552 56 312622 rect -400 306644 56 306704 rect -400 304644 56 304704 -rect 633270 303007 633726 303069 +rect 633270 303006 633726 303068 rect 633270 301005 633726 301067 -rect 633270 298903 633750 298973 -rect 633270 298351 633750 298421 -rect 633270 297707 633750 297777 -rect 633270 297063 633750 297133 -rect 633270 295223 633750 295293 -rect 633270 294671 633750 294741 -rect 633270 294027 633750 294097 -rect 633270 293383 633750 293453 -rect 633270 290899 633750 290969 -rect 633270 290347 633750 290417 -rect 633270 289703 633750 289773 -rect 633270 289059 633750 289129 -rect 633269 288507 633750 288577 -rect 633270 287863 633750 287933 -rect 633270 286667 633750 286737 -rect 633270 286023 633750 286093 -rect 633270 284183 633750 284253 -rect -424 284073 56 284143 -rect -424 282233 56 282303 -rect -424 281589 56 281659 -rect -424 280393 56 280463 -rect -424 279749 57 279819 -rect -424 279197 56 279267 -rect -424 278553 56 278623 -rect -424 277909 56 277979 -rect -424 277357 56 277427 -rect -424 274873 56 274943 -rect -424 274229 56 274299 -rect -424 273585 56 273655 -rect -424 273033 56 273103 -rect -424 271193 56 271263 -rect -424 270549 56 270619 -rect -424 269905 56 269975 -rect -424 269353 56 269423 +rect 633270 298904 633750 298974 +rect 633270 298352 633750 298422 +rect 633270 297708 633750 297778 +rect 633270 297064 633750 297134 +rect 633270 295224 633750 295294 +rect 633270 294672 633750 294742 +rect 633270 294028 633750 294098 +rect 633270 293384 633750 293454 +rect 633270 290900 633750 290970 +rect 633270 290348 633750 290418 +rect 633270 289704 633750 289774 +rect 633270 289060 633750 289130 +rect 633270 288435 633750 288649 +rect 633270 287864 633750 287934 +rect 633270 286638 633750 286766 +rect 633270 286024 633750 286094 +rect 633270 284184 633750 284254 +rect -424 284072 56 284142 +rect -424 282232 56 282302 +rect -424 281560 56 281688 +rect -424 280392 56 280462 +rect -424 279677 56 279891 +rect -424 279196 56 279266 +rect -424 278552 56 278622 +rect -424 277908 56 277978 +rect -424 277356 56 277426 +rect -424 274872 56 274942 +rect -424 274228 56 274298 +rect -424 273584 56 273654 +rect -424 273032 56 273102 +rect -424 271192 56 271262 +rect -424 270548 56 270618 +rect -424 269904 56 269974 +rect -424 269352 56 269422 rect -400 263644 56 263704 rect -400 261644 56 261704 -rect 633270 258007 633726 258069 +rect 633270 258006 633726 258068 rect 633270 256005 633726 256067 -rect 633270 253903 633750 253973 -rect 633270 253351 633750 253421 -rect 633270 252707 633750 252777 -rect 633270 252063 633750 252133 -rect 633270 250223 633750 250293 -rect 633270 249671 633750 249741 -rect 633270 249027 633750 249097 -rect 633270 248383 633750 248453 -rect 633270 245899 633750 245969 -rect 633270 245347 633750 245417 -rect 633270 244703 633750 244773 -rect 633270 244059 633750 244129 -rect 633269 243507 633750 243577 -rect 633270 242863 633750 242933 -rect 633270 241667 633750 241737 -rect 633270 241023 633750 241093 -rect -424 240873 56 240943 -rect 633270 239183 633750 239253 -rect -424 239033 56 239103 -rect -424 238389 56 238459 -rect -424 237193 56 237263 -rect -424 236549 57 236619 -rect -424 235997 56 236067 -rect -424 235353 56 235423 -rect -424 234709 56 234779 -rect -424 234157 56 234227 -rect -424 231673 56 231743 -rect -424 231029 56 231099 -rect -424 230385 56 230455 -rect -424 229833 56 229903 -rect -424 227993 56 228063 -rect -424 227349 56 227419 -rect -424 226705 56 226775 -rect -424 226153 56 226223 +rect 633270 253904 633750 253974 +rect 633270 253352 633750 253422 +rect 633270 252708 633750 252778 +rect 633270 252064 633750 252134 +rect 633270 250224 633750 250294 +rect 633270 249672 633750 249742 +rect 633270 249028 633750 249098 +rect 633270 248384 633750 248454 +rect 633270 245900 633750 245970 +rect 633270 245348 633750 245418 +rect 633270 244704 633750 244774 +rect 633270 244060 633750 244130 +rect 633270 243435 633750 243649 +rect 633270 242864 633750 242934 +rect 633270 241638 633750 241766 +rect 633270 241024 633750 241094 +rect -424 240872 56 240942 +rect 633270 239184 633750 239254 +rect -424 239032 56 239102 +rect -424 238360 56 238488 +rect -424 237192 56 237262 +rect -424 236477 56 236691 +rect -424 235996 56 236066 +rect -424 235352 56 235422 +rect -424 234708 56 234778 +rect -424 234156 56 234226 +rect -424 231672 56 231742 +rect -424 231028 56 231098 +rect -424 230384 56 230454 +rect -424 229832 56 229902 +rect -424 227992 56 228062 +rect -424 227348 56 227418 +rect -424 226704 56 226774 +rect -424 226152 56 226222 rect -400 220644 56 220704 rect -400 218644 56 218704 -rect 633270 213007 633726 213069 +rect 633270 213006 633726 213068 rect 633270 211005 633726 211067 -rect 633270 208903 633750 208973 -rect 633270 208351 633750 208421 -rect 633270 207707 633750 207777 -rect 633270 207063 633750 207133 -rect 633270 205223 633750 205293 -rect 633270 204671 633750 204741 -rect 633270 204027 633750 204097 -rect 633270 203383 633750 203453 -rect 633270 200899 633750 200969 -rect 633270 200347 633750 200417 -rect 633270 199703 633750 199773 -rect 633270 199059 633750 199129 -rect 633269 198507 633750 198577 -rect 633270 197863 633750 197933 -rect -424 197673 56 197744 -rect 633270 196667 633750 196737 -rect 633270 196023 633750 196093 -rect -424 195833 56 195904 -rect -424 195189 56 195260 -rect 633270 194183 633750 194253 -rect -424 193993 56 194064 -rect -424 193419 56 193420 -rect -424 193349 57 193419 -rect -424 192797 56 192868 -rect -424 192153 56 192224 -rect -424 191509 56 191580 -rect -424 190957 56 191028 -rect -424 188473 56 188544 -rect -424 187829 56 187900 -rect -424 187185 56 187256 -rect -424 186633 56 186704 -rect -424 184793 56 184864 -rect -424 184149 56 184220 -rect -424 183505 56 183576 -rect -424 182953 56 183024 +rect 633270 208904 633750 208974 +rect 633270 208352 633750 208422 +rect 633270 207708 633750 207778 +rect 633270 207064 633750 207134 +rect 633270 205224 633750 205294 +rect 633270 204672 633750 204742 +rect 633270 204028 633750 204098 +rect 633270 203384 633750 203454 +rect 633270 200900 633750 200970 +rect 633270 200348 633750 200418 +rect 633270 199704 633750 199774 +rect 633270 199060 633750 199130 +rect 633270 198435 633750 198649 +rect 633270 197864 633750 197934 +rect -424 197672 56 197742 +rect 633270 196638 633750 196766 +rect 633270 196024 633750 196094 +rect -424 195832 56 195902 +rect -424 195160 56 195288 +rect 633270 194184 633750 194254 +rect -424 193992 56 194062 +rect -424 193277 56 193491 +rect -424 192796 56 192866 +rect -424 192152 56 192222 +rect -424 191508 56 191578 +rect -424 190956 56 191026 +rect -424 188472 56 188542 +rect -424 187828 56 187898 +rect -424 187184 56 187254 +rect -424 186632 56 186702 +rect -424 184792 56 184862 +rect -424 184148 56 184218 +rect -424 183504 56 183574 +rect -424 182952 56 183022 rect -400 177644 56 177704 rect -400 175644 56 175704 -rect 633270 168007 633726 168069 +rect 633270 168006 633726 168068 rect 633270 166005 633726 166067 -rect 633270 163703 633750 163773 -rect 633270 163151 633750 163221 -rect 633270 162507 633750 162577 -rect 633270 161863 633750 161933 -rect 633270 160023 633750 160093 -rect 633270 159471 633750 159541 -rect 633270 158827 633750 158897 -rect 633270 158183 633750 158253 -rect 633270 155699 633750 155769 -rect 633270 155147 633750 155217 -rect -424 154473 56 154544 -rect 633270 154503 633750 154573 -rect 633270 153859 633750 153929 -rect 633269 153307 633750 153377 -rect -424 152633 56 152704 -rect 633270 152663 633750 152733 -rect -424 151989 56 152060 -rect 633270 151467 633750 151537 -rect -424 150793 56 150864 -rect 633270 150823 633750 150893 -rect -424 150219 56 150220 -rect -424 150149 57 150219 -rect -424 149597 56 149668 -rect -424 148953 56 149024 -rect 633270 148983 633750 149053 -rect -424 148309 56 148380 -rect -424 147757 56 147828 -rect -424 145273 56 145344 -rect -424 144629 56 144700 -rect -424 143985 56 144056 -rect -424 143433 56 143504 -rect -424 141592 56 141663 -rect -424 140949 56 141020 -rect -424 140305 56 140376 -rect -424 139753 56 139824 +rect 633270 163704 633750 163774 +rect 633270 163152 633750 163222 +rect 633270 162508 633750 162578 +rect 633270 161864 633750 161934 +rect 633270 160024 633750 160094 +rect 633270 159472 633750 159542 +rect 633270 158828 633750 158898 +rect 633270 158184 633750 158254 +rect 633270 155700 633750 155770 +rect 633270 155148 633750 155218 +rect -424 154472 56 154542 +rect 633270 154504 633750 154574 +rect 633270 153860 633750 153930 +rect 633270 153235 633750 153449 +rect -424 152632 56 152702 +rect 633270 152664 633750 152734 +rect -424 151960 56 152088 +rect 633270 151438 633750 151566 +rect -424 150792 56 150862 +rect 633270 150824 633750 150894 +rect -424 150077 56 150291 +rect -424 149596 56 149666 +rect -424 148952 56 149022 +rect 633270 148984 633750 149054 +rect -424 148308 56 148378 +rect -424 147756 56 147826 +rect -424 145272 56 145342 +rect -424 144628 56 144698 +rect -424 143984 56 144054 +rect -424 143432 56 143502 +rect -424 141592 56 141662 +rect -424 140948 56 141018 +rect -424 140304 56 140374 +rect -424 139752 56 139822 rect -400 134644 56 134704 rect -400 132644 56 132704 -rect 633270 123007 633726 123069 +rect 633270 123006 633726 123068 rect 633270 121005 633726 121067 -rect 633270 118703 633750 118773 -rect 633270 118151 633750 118221 -rect 633270 117507 633750 117577 -rect 633270 116863 633750 116933 -rect 633270 115023 633750 115093 -rect 633270 114471 633750 114541 -rect 633270 113827 633750 113897 -rect 633270 113183 633750 113253 -rect 633270 110699 633750 110769 -rect 633270 110147 633750 110217 -rect 633270 109503 633750 109573 -rect 633270 108859 633750 108929 -rect 633269 108307 633750 108377 -rect 633270 107663 633750 107733 -rect 633270 106467 633750 106537 -rect 633270 105823 633750 105893 -rect 633270 103983 633750 104053 -rect -444 78141 56 82921 -rect 633270 78007 633726 78069 +rect 633270 118704 633750 118774 +rect 633270 118152 633750 118222 +rect 633270 117508 633750 117578 +rect 633270 116864 633750 116934 +rect 633270 115024 633750 115094 +rect 633270 114472 633750 114542 +rect 633270 113828 633750 113898 +rect 633270 113184 633750 113254 +rect 633270 110700 633750 110770 +rect 633270 110148 633750 110218 +rect 633270 109504 633750 109574 +rect 633270 108860 633750 108930 +rect 633270 108235 633750 108449 +rect 633270 107664 633750 107734 +rect 633270 106438 633750 106566 +rect 633270 105824 633750 105894 +rect 633270 103984 633750 104054 +rect -444 78140 56 82920 +rect 633270 78006 633726 78068 rect 633270 76005 633726 76067 -rect 633270 73503 633750 73573 -rect 633270 72951 633750 73021 +rect 633270 73504 633750 73574 +rect 633270 72952 633750 73022 rect -444 68162 56 72942 -rect 633270 72307 633750 72377 -rect 633270 71663 633750 71733 -rect 633270 69823 633750 69893 -rect 633270 69271 633750 69341 -rect 633270 68627 633750 68697 -rect 633270 67983 633750 68053 -rect 633270 65499 633750 65569 -rect 633270 64947 633750 65017 -rect 633270 64303 633750 64373 -rect 633270 63659 633750 63729 -rect 633269 63107 633750 63177 -rect 633270 62463 633750 62533 -rect 633270 61267 633750 61337 -rect 633270 60623 633750 60693 -rect 633270 58783 633750 58853 +rect 633270 72308 633750 72378 +rect 633270 71664 633750 71734 +rect 633270 69824 633750 69894 +rect 633270 69272 633750 69342 +rect 633270 68628 633750 68698 +rect 633270 67984 633750 68054 +rect 633270 65500 633750 65570 +rect 633270 64948 633750 65018 +rect 633270 64304 633750 64374 +rect 633270 63660 633750 63730 +rect 633270 63035 633750 63249 +rect 633270 62464 633750 62534 +rect 633270 61238 633750 61366 +rect 633270 60624 633750 60694 +rect 633270 58784 633750 58854 rect -400 53595 56 53665 rect -400 53372 56 53442 rect -400 53147 56 53217 -rect -444 36014 56 40803 -rect -444 25963 56 30763 -rect 36805 -444 41585 56 -rect 46784 -444 51564 57 -rect 199283 -444 203912 56 -rect 209163 -444 213963 56 -rect 527005 -444 531785 56 +rect -444 36014 56 40804 +rect -444 25962 56 30762 +rect 36806 -444 41586 56 +rect 46784 -444 51564 56 +rect 199284 -444 203914 56 +rect 209164 -444 213964 56 +rect 527006 -444 531786 56 rect 536984 -444 541764 56 -rect 580805 -444 585585 56 +rect 580806 -444 585586 56 rect 590784 -444 595564 56 << comment >> rect -400 953326 633726 953726 rect -400 0 0 953326 -rect 633326 0 633726 953326 +rect 633326 58370 633726 953326 +rect 633326 0 633726 58369 rect -400 -400 633726 0 << labels >> flabel metal2 485870 -424 485926 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[43] @@ -3404,14 +1312,6 @@ flabel metal2 s 150040 953270 150096 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[ port 356 nsew flabel metal2 s 139000 953270 139056 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[21] port 312 nsew -flabel metal2 145190 -424 145246 56 0 FreeSans 400 270 0 0 gpio_in[38] -port 691 nsew -flabel metal2 147030 -424 147086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[38] -port 339 nsew -flabel metal2 148870 -424 148926 56 0 FreeSans 400 270 0 0 gpio_dm0[38] -port 559 nsew -flabel metal2 150710 -424 150766 56 0 FreeSans 400 270 0 0 gpio_dm1[38] -port 603 nsew flabel metal2 151354 -424 151410 56 0 FreeSans 400 270 0 0 gpio_analog_pol[38] port 515 nsew flabel metal2 150066 -424 150122 56 0 FreeSans 400 270 0 0 gpio_analog_en[38] @@ -3600,1383 +1500,1385 @@ flabel metal2 s 432910 -424 432966 56 0 FreeSans 400 90 0 0 gpio_in_h[42] port 731 nsew flabel metal2 s 487710 -424 487766 56 0 FreeSans 400 90 0 0 gpio_in_h[43] port 730 nsew -flabel metal2 s 596396 953270 596452 953750 0 FreeSans 400 90 0 0 analog_io[15] -port 890 nsew -flabel metal2 s 494596 953270 494652 953750 0 FreeSans 400 90 0 0 analog_io[16] -port 889 nsew -flabel metal2 s 443196 953270 443252 953750 0 FreeSans 400 90 0 0 analog_io[17] -port 888 nsew -flabel metal2 s 354196 953270 354252 953750 0 FreeSans 400 90 0 0 analog_io[18] -port 887 nsew -flabel metal2 s 252396 953270 252452 953750 0 FreeSans 400 90 0 0 analog_io[19] -port 886 nsew -flabel metal2 s 200796 953270 200852 953750 0 FreeSans 400 90 0 0 analog_io[20] -port 885 nsew -flabel metal2 s 149396 953270 149452 953750 0 FreeSans 400 90 0 0 analog_io[21] -port 884 nsew -flabel metal2 s 97996 953270 98052 953750 0 FreeSans 400 90 0 0 analog_io[22] -port 883 nsew -flabel metal2 s 46596 953270 46652 953750 0 FreeSans 400 90 0 0 analog_io[23] -port 882 nsew -flabel metal2 s 147674 -424 147730 56 0 FreeSans 400 90 0 0 analog_io[38] -port 867 nsew -flabel metal2 s 256274 -424 256330 56 0 FreeSans 400 90 0 0 analog_io[39] -port 866 nsew -flabel metal2 s 311074 -424 311130 56 0 FreeSans 400 90 0 0 analog_io[40] -port 865 nsew -flabel metal2 s 365874 -424 365930 56 0 FreeSans 400 90 0 0 analog_io[41] -port 864 nsew -flabel metal2 s 420674 -424 420730 56 0 FreeSans 400 90 0 0 analog_io[42] -port 863 nsew -flabel metal2 s 475474 -424 475530 56 0 FreeSans 400 90 0 0 analog_io[43] -port 862 nsew -flabel metal2 s 594556 953270 594612 953750 0 FreeSans 400 90 0 0 analog_noesd_io[15] -port 934 nsew -flabel metal2 s 492756 953270 492812 953750 0 FreeSans 400 90 0 0 analog_noesd_io[16] -port 933 nsew -flabel metal2 s 441356 953270 441412 953750 0 FreeSans 400 90 0 0 analog_noesd_io[17] -port 932 nsew -flabel metal2 s 352356 953270 352412 953750 0 FreeSans 400 90 0 0 analog_noesd_io[18] -port 931 nsew -flabel metal2 s 250556 953270 250612 953750 0 FreeSans 400 90 0 0 analog_noesd_io[19] -port 930 nsew -flabel metal2 s 198956 953270 199012 953750 0 FreeSans 400 90 0 0 analog_noesd_io[20] -port 929 nsew -flabel metal2 s 147556 953270 147612 953750 0 FreeSans 400 90 0 0 analog_noesd_io[21] -port 928 nsew -flabel metal2 s 96156 953270 96212 953750 0 FreeSans 400 90 0 0 analog_noesd_io[22] -port 927 nsew -flabel metal2 s 44756 953270 44812 953750 0 FreeSans 400 90 0 0 analog_noesd_io[23] -port 926 nsew -flabel metal2 s 149514 -424 149570 56 0 FreeSans 400 90 0 0 analog_noesd_io[38] -port 911 nsew -flabel metal2 s 258114 -424 258170 56 0 FreeSans 400 90 0 0 analog_noesd_io[39] -port 910 nsew -flabel metal2 s 312914 -424 312970 56 0 FreeSans 400 90 0 0 analog_noesd_io[40] -port 909 nsew -flabel metal2 s 367714 -424 367770 56 0 FreeSans 400 90 0 0 analog_noesd_io[41] -port 908 nsew -flabel metal2 s 422514 -424 422570 56 0 FreeSans 400 90 0 0 analog_noesd_io[42] -port 907 nsew -flabel metal2 s 477314 -424 477370 56 0 FreeSans 400 90 0 0 analog_noesd_io[43] -port 906 nsew -flabel metal3 s -424 141592 56 141663 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] -port 296 nsew -flabel metal3 633270 422812 633770 427463 0 FreeSans 3200 90 0 0 vccd1 -port 28 nsew -flabel metal3 633270 427763 633770 432563 0 FreeSans 3200 90 0 0 vssd1 -port 30 nsew -flabel metal3 633270 417723 633770 422512 0 FreeSans 3200 90 0 0 vssd1 -port 30 nsew -flabel metal3 s 633270 870611 633770 875273 0 FreeSans 3200 90 0 0 vssd1 -port 30 nsew -flabel metal3 s 633270 875563 633770 880363 0 FreeSans 3200 90 0 0 vccd1 -port 28 nsew -flabel metal3 s 633270 865523 633770 870312 0 FreeSans 3200 90 0 0 vccd1 +flabel metal3 633270 422810 633770 427472 0 FreeSans 3200 90 0 0 vccd1 port 28 nsew flabel metal3 s 633270 786384 633770 791164 0 FreeSans 3200 90 0 0 vdda1 port 24 nsew -flabel metal3 s 633270 776405 633770 781185 0 FreeSans 3200 90 0 0 vdda1 -port 24 nsew flabel metal3 s 633270 471784 633770 476564 0 FreeSans 3200 90 0 0 vdda1 port 24 nsew -flabel metal3 s 633270 461805 633770 466585 0 FreeSans 3200 90 0 0 vdda1 -port 24 nsew flabel metal3 s 633270 383584 633770 388364 0 FreeSans 3200 90 0 0 vssa1 port 26 nsew -flabel metal3 s 633270 373605 633770 378385 0 FreeSans 3200 90 0 0 vssa1 -port 26 nsew -flabel metal3 s 543541 953270 548321 953770 0 FreeSans 3200 0 0 0 vssa1 -port 26 nsew flabel metal3 s 533562 953270 538342 953770 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 301341 953270 306121 953770 0 FreeSans 3200 0 0 0 vssio -port 19 nsew flabel metal3 291362 953270 296142 953770 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 -444 875053 56 879715 0 FreeSans 3200 90 0 0 vssd2 -port 31 nsew -flabel metal3 -444 880014 56 884803 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 -444 880014 56 884804 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 -444 869963 56 874763 0 FreeSans 3200 90 0 0 vccd2 -port 29 nsew -flabel metal3 -444 837741 56 842521 0 FreeSans 3200 90 0 0 vddio -port 18 nsew flabel metal3 -444 827762 56 832542 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 -444 795541 56 800321 0 FreeSans 3200 90 0 0 vssa2 -port 27 nsew flabel metal3 -444 785562 56 790342 0 FreeSans 3200 90 0 0 vssa2 port 27 nsew -flabel metal3 -444 450941 56 455721 0 FreeSans 3200 90 0 0 vdda2 -port 25 nsew flabel metal3 -444 440962 56 445742 0 FreeSans 3200 90 0 0 vdda2 port 25 nsew -flabel metal3 -444 403863 56 408514 0 FreeSans 3200 90 0 0 vccd2 -port 29 nsew -flabel metal3 -444 408814 56 413603 0 FreeSans 3200 90 0 0 vssd2 -port 31 nsew -flabel metal3 -444 398763 56 403563 0 FreeSans 3200 90 0 0 vssd2 -port 31 nsew -flabel metal3 -444 78141 56 82921 0 FreeSans 3200 90 0 0 vddio -port 18 nsew flabel metal3 -444 68162 56 72942 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 -444 36014 56 40803 0 FreeSans 3200 90 0 0 vccd -port 20 nsew -flabel metal3 -444 25963 56 30763 0 FreeSans 3200 90 0 0 vccd -port 20 nsew -flabel metal3 46784 -443 51564 57 0 FreeSans 3200 0 0 0 vssa -port 23 nsew -flabel metal3 36805 -444 41585 56 0 FreeSans 3200 0 0 0 vssa -port 23 nsew -flabel metal3 209163 -444 213963 56 0 FreeSans 3200 0 0 0 vssd -port 21 nsew -flabel metal3 199283 -444 203912 56 0 FreeSans 3200 0 0 0 vssd -port 21 nsew flabel metal3 536984 -444 541764 56 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 527005 -444 531785 56 0 FreeSans 3200 0 0 0 vssio -port 19 nsew -flabel metal3 580805 -444 585585 56 0 FreeSans 3200 0 0 0 vdda -port 22 nsew flabel metal3 590784 -444 595564 56 0 FreeSans 3200 0 0 0 vdda port 22 nsew flabel comment s 107715 141850 108715 141850 0 FreeSans 1120000 60 0 0 example -flabel metal3 s 633270 736859 633750 736929 0 FreeSans 400 0 0 0 gpio_analog_en[12] -port 453 nsew -flabel metal3 s 633270 738147 633750 738217 0 FreeSans 400 0 0 0 gpio_analog_pol[12] -port 541 nsew -flabel metal3 s 633270 741183 633750 741253 0 FreeSans 400 0 0 0 gpio_analog_sel[12] -port 497 nsew -flabel metal3 s 633270 737503 633750 737573 0 FreeSans 400 0 0 0 gpio_dm0[12] -port 585 nsew -flabel metal3 s 633270 735663 633750 735733 0 FreeSans 400 0 0 0 gpio_dm1[12] -port 629 nsew -flabel metal3 s 633270 741827 633750 741897 0 FreeSans 400 0 0 0 gpio_dm2[12] -port 673 nsew -flabel metal3 s 633270 742471 633750 742541 0 FreeSans 400 0 0 0 gpio_holdover[12] -port 409 nsew -flabel metal3 s 633270 745507 633750 745577 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] -port 277 nsew -flabel metal3 s 633270 738699 633750 738769 0 FreeSans 400 0 0 0 gpio_inp_dis[12] -port 233 nsew -flabel metal3 s 633270 746151 633750 746221 0 FreeSans 400 0 0 0 gpio_oeb[12] -port 189 nsew -flabel metal3 s 633270 743023 633750 743093 0 FreeSans 400 0 0 0 gpio_out[12] -port 145 nsew -flabel metal3 s 633270 733823 633750 733893 0 FreeSans 400 0 0 0 gpio_slow_sel[12] -port 365 nsew -flabel metal3 s 633270 744863 633750 744933 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] -port 321 nsew -flabel metal3 s 633270 731983 633750 732053 0 FreeSans 400 0 0 0 gpio_in[12] -port 717 nsew -flabel metal3 s 633270 826059 633750 826129 0 FreeSans 400 0 0 0 gpio_analog_en[13] -port 452 nsew -flabel metal3 s 633270 827347 633750 827417 0 FreeSans 400 0 0 0 gpio_analog_pol[13] -port 540 nsew -flabel metal3 s 633270 830383 633750 830453 0 FreeSans 400 0 0 0 gpio_analog_sel[13] -port 496 nsew -flabel metal3 s 633270 826703 633750 826773 0 FreeSans 400 0 0 0 gpio_dm0[13] -port 584 nsew -flabel metal3 s 633270 824863 633750 824933 0 FreeSans 400 0 0 0 gpio_dm1[13] -port 628 nsew -flabel metal3 s 633270 831027 633750 831097 0 FreeSans 400 0 0 0 gpio_dm2[13] -port 672 nsew -flabel metal3 s 633270 831671 633750 831741 0 FreeSans 400 0 0 0 gpio_holdover[13] -port 408 nsew -flabel metal3 s 633270 834707 633750 834777 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] -port 276 nsew -flabel metal3 s 633270 827899 633750 827969 0 FreeSans 400 0 0 0 gpio_inp_dis[13] -port 232 nsew -flabel metal3 s 633270 835351 633750 835421 0 FreeSans 400 0 0 0 gpio_oeb[13] -port 188 nsew -flabel metal3 s 633270 832223 633750 832293 0 FreeSans 400 0 0 0 gpio_out[13] -port 144 nsew -flabel metal3 s 633270 823023 633750 823093 0 FreeSans 400 0 0 0 gpio_slow_sel[13] -port 364 nsew -flabel metal3 s 633270 834063 633750 834133 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] -port 320 nsew -flabel metal3 s 633270 821183 633750 821253 0 FreeSans 400 0 0 0 gpio_in[13] -port 716 nsew -flabel metal3 s 633270 915259 633750 915329 0 FreeSans 400 0 0 0 gpio_analog_en[14] -port 451 nsew -flabel metal3 s 633270 916547 633750 916617 0 FreeSans 400 0 0 0 gpio_analog_pol[14] -port 539 nsew -flabel metal3 s 633270 919583 633750 919653 0 FreeSans 400 0 0 0 gpio_analog_sel[14] -port 495 nsew -flabel metal3 s 633270 915903 633750 915973 0 FreeSans 400 0 0 0 gpio_dm0[14] -port 583 nsew -flabel metal3 s 633270 914063 633750 914133 0 FreeSans 400 0 0 0 gpio_dm1[14] -port 627 nsew -flabel metal3 s 633270 920227 633750 920297 0 FreeSans 400 0 0 0 gpio_dm2[14] -port 671 nsew -flabel metal3 s 633270 920871 633750 920941 0 FreeSans 400 0 0 0 gpio_holdover[14] -port 407 nsew -flabel metal3 s 633270 923907 633750 923977 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] -port 275 nsew -flabel metal3 s 633270 917099 633750 917169 0 FreeSans 400 0 0 0 gpio_inp_dis[14] -port 231 nsew -flabel metal3 s 633270 924551 633750 924621 0 FreeSans 400 0 0 0 gpio_oeb[14] -port 187 nsew -flabel metal3 s 633270 921423 633750 921493 0 FreeSans 400 0 0 0 gpio_out[14] -port 143 nsew -flabel metal3 s 633270 912223 633750 912293 0 FreeSans 400 0 0 0 gpio_slow_sel[14] -port 363 nsew -flabel metal3 s 633270 923263 633750 923333 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] -port 319 nsew -flabel metal3 s 633270 910383 633750 910453 0 FreeSans 400 0 0 0 gpio_in[14] -port 715 nsew -flabel metal3 s 633270 697471 633750 697541 0 FreeSans 400 0 0 0 gpio_holdover[11] -port 410 nsew -flabel metal3 s 633270 700507 633750 700577 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] -port 278 nsew -flabel metal3 s 633270 693699 633750 693769 0 FreeSans 400 0 0 0 gpio_inp_dis[11] -port 234 nsew -flabel metal3 s 633270 701151 633750 701221 0 FreeSans 400 0 0 0 gpio_oeb[11] -port 190 nsew -flabel metal3 s 633270 698023 633750 698093 0 FreeSans 400 0 0 0 gpio_out[11] -port 146 nsew -flabel metal3 s 633270 688823 633750 688893 0 FreeSans 400 0 0 0 gpio_slow_sel[11] -port 366 nsew -flabel metal3 s 633270 699863 633750 699933 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] -port 322 nsew -flabel metal3 s 633270 686983 633750 687053 0 FreeSans 400 0 0 0 gpio_in[11] -port 718 nsew -flabel metal3 s 633270 646859 633750 646929 0 FreeSans 400 0 0 0 gpio_analog_en[10] -port 455 nsew -flabel metal3 s 633270 648147 633750 648217 0 FreeSans 400 0 0 0 gpio_analog_pol[10] -port 543 nsew -flabel metal3 s 633270 651183 633750 651253 0 FreeSans 400 0 0 0 gpio_analog_sel[10] -port 499 nsew -flabel metal3 s 633270 647503 633750 647573 0 FreeSans 400 0 0 0 gpio_dm0[10] -port 587 nsew -flabel metal3 s 633270 645663 633750 645733 0 FreeSans 400 0 0 0 gpio_dm1[10] -port 631 nsew -flabel metal3 s 633270 651827 633750 651897 0 FreeSans 400 0 0 0 gpio_dm2[10] -port 675 nsew -flabel metal3 s 633270 652471 633750 652541 0 FreeSans 400 0 0 0 gpio_holdover[10] -port 411 nsew -flabel metal3 s 633270 655507 633750 655577 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] -port 279 nsew -flabel metal3 s 633270 648699 633750 648769 0 FreeSans 400 0 0 0 gpio_inp_dis[10] -port 235 nsew -flabel metal3 s 633270 656151 633750 656221 0 FreeSans 400 0 0 0 gpio_oeb[10] -port 191 nsew -flabel metal3 s 633270 653023 633750 653093 0 FreeSans 400 0 0 0 gpio_out[10] -port 147 nsew -flabel metal3 s 633270 643823 633750 643893 0 FreeSans 400 0 0 0 gpio_slow_sel[10] -port 367 nsew -flabel metal3 s 633270 654863 633750 654933 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] -port 323 nsew -flabel metal3 s 633270 641983 633750 642053 0 FreeSans 400 0 0 0 gpio_in[10] -port 719 nsew -flabel metal3 s 633270 511459 633750 511529 0 FreeSans 400 0 0 0 gpio_analog_en[7] -port 458 nsew -flabel metal3 s 633270 512747 633750 512817 0 FreeSans 400 0 0 0 gpio_analog_pol[7] -port 546 nsew -flabel metal3 s 633270 515783 633750 515853 0 FreeSans 400 0 0 0 gpio_analog_sel[7] -port 502 nsew -flabel metal3 s 633270 512103 633750 512173 0 FreeSans 400 0 0 0 gpio_dm0[7] -port 590 nsew -flabel metal3 s 633270 510263 633750 510333 0 FreeSans 400 0 0 0 gpio_dm1[7] -port 634 nsew -flabel metal3 s 633270 516427 633750 516497 0 FreeSans 400 0 0 0 gpio_dm2[7] -port 678 nsew -flabel metal3 s 633270 517071 633750 517141 0 FreeSans 400 0 0 0 gpio_holdover[7] -port 414 nsew -flabel metal3 s 633270 520107 633750 520177 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] -port 282 nsew -flabel metal3 s 633270 513299 633750 513369 0 FreeSans 400 0 0 0 gpio_inp_dis[7] -port 238 nsew -flabel metal3 s 633270 520751 633750 520821 0 FreeSans 400 0 0 0 gpio_oeb[7] -port 194 nsew -flabel metal3 s 633270 517623 633750 517693 0 FreeSans 400 0 0 0 gpio_out[7] -port 150 nsew -flabel metal3 s 633270 508423 633750 508493 0 FreeSans 400 0 0 0 gpio_slow_sel[7] -port 370 nsew -flabel metal3 s 633270 519463 633750 519533 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] -port 326 nsew -flabel metal3 s 633270 506583 633750 506653 0 FreeSans 400 0 0 0 gpio_in[7] -port 722 nsew -flabel metal3 s 633270 556659 633750 556729 0 FreeSans 400 0 0 0 gpio_analog_en[8] -port 457 nsew -flabel metal3 s 633270 557947 633750 558017 0 FreeSans 400 0 0 0 gpio_analog_pol[8] -port 545 nsew -flabel metal3 s 633270 560983 633750 561053 0 FreeSans 400 0 0 0 gpio_analog_sel[8] -port 501 nsew -flabel metal3 s 633270 557303 633750 557373 0 FreeSans 400 0 0 0 gpio_dm0[8] -port 589 nsew -flabel metal3 s 633270 555463 633750 555533 0 FreeSans 400 0 0 0 gpio_dm1[8] -port 633 nsew -flabel metal3 s 633270 561627 633750 561697 0 FreeSans 400 0 0 0 gpio_dm2[8] -port 677 nsew -flabel metal3 s 633270 562271 633750 562341 0 FreeSans 400 0 0 0 gpio_holdover[8] -port 413 nsew -flabel metal3 s 633270 565307 633750 565377 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] -port 281 nsew -flabel metal3 s 633270 558499 633750 558569 0 FreeSans 400 0 0 0 gpio_inp_dis[8] -port 237 nsew -flabel metal3 s 633270 565951 633750 566021 0 FreeSans 400 0 0 0 gpio_oeb[8] -port 193 nsew -flabel metal3 s 633270 562823 633750 562893 0 FreeSans 400 0 0 0 gpio_out[8] -port 149 nsew -flabel metal3 s 633270 553623 633750 553693 0 FreeSans 400 0 0 0 gpio_slow_sel[8] -port 369 nsew -flabel metal3 s 633270 564663 633750 564733 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] -port 325 nsew -flabel metal3 s 633270 551783 633750 551853 0 FreeSans 400 0 0 0 gpio_in[8] -port 721 nsew -flabel metal3 s 633270 601659 633750 601729 0 FreeSans 400 0 0 0 gpio_analog_en[9] -port 456 nsew -flabel metal3 s 633270 602947 633750 603017 0 FreeSans 400 0 0 0 gpio_analog_pol[9] -port 544 nsew -flabel metal3 s 633270 605983 633750 606053 0 FreeSans 400 0 0 0 gpio_analog_sel[9] -port 500 nsew -flabel metal3 s 633270 602303 633750 602373 0 FreeSans 400 0 0 0 gpio_dm0[9] -port 588 nsew -flabel metal3 s 633270 600463 633750 600533 0 FreeSans 400 0 0 0 gpio_dm1[9] -port 632 nsew -flabel metal3 s 633270 606627 633750 606697 0 FreeSans 400 0 0 0 gpio_dm2[9] -port 676 nsew -flabel metal3 s 633270 607271 633750 607341 0 FreeSans 400 0 0 0 gpio_holdover[9] -port 412 nsew -flabel metal3 s 633270 610307 633750 610377 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] -port 280 nsew -flabel metal3 s 633270 603499 633750 603569 0 FreeSans 400 0 0 0 gpio_inp_dis[9] -port 236 nsew -flabel metal3 s 633270 610951 633750 611021 0 FreeSans 400 0 0 0 gpio_oeb[9] -port 192 nsew -flabel metal3 s 633270 607823 633750 607893 0 FreeSans 400 0 0 0 gpio_out[9] -port 148 nsew -flabel metal3 s 633270 598623 633750 598693 0 FreeSans 400 0 0 0 gpio_slow_sel[9] -port 368 nsew -flabel metal3 s 633270 609663 633750 609733 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] -port 324 nsew -flabel metal3 s 633270 596783 633750 596853 0 FreeSans 400 0 0 0 gpio_in[9] -port 720 nsew -flabel metal3 s 633270 691859 633750 691929 0 FreeSans 400 0 0 0 gpio_analog_en[11] -port 454 nsew -flabel metal3 s 633270 693147 633750 693217 0 FreeSans 400 0 0 0 gpio_analog_pol[11] -port 542 nsew -flabel metal3 s 633270 696183 633750 696253 0 FreeSans 400 0 0 0 gpio_analog_sel[11] -port 498 nsew -flabel metal3 s 633270 692503 633750 692573 0 FreeSans 400 0 0 0 gpio_dm0[11] -port 586 nsew -flabel metal3 s 633270 690663 633750 690733 0 FreeSans 400 0 0 0 gpio_dm1[11] -port 630 nsew -flabel metal3 s 633270 696827 633750 696897 0 FreeSans 400 0 0 0 gpio_dm2[11] -port 674 nsew -flabel metal3 s 633270 244059 633750 244129 0 FreeSans 400 0 0 0 gpio_analog_en[4] -port 461 nsew -flabel metal3 s 633270 245347 633750 245417 0 FreeSans 400 0 0 0 gpio_analog_pol[4] -port 549 nsew -flabel metal3 s 633270 248383 633750 248453 0 FreeSans 400 0 0 0 gpio_analog_sel[4] -port 505 nsew -flabel metal3 s 633270 244703 633750 244773 0 FreeSans 400 0 0 0 gpio_dm0[4] -port 593 nsew -flabel metal3 s 633270 242863 633750 242933 0 FreeSans 400 0 0 0 gpio_dm1[4] -port 637 nsew -flabel metal3 s 633270 249027 633750 249097 0 FreeSans 400 0 0 0 gpio_dm2[4] -port 681 nsew -flabel metal3 s 633270 249671 633750 249741 0 FreeSans 400 0 0 0 gpio_holdover[4] -port 417 nsew -flabel metal3 s 633270 252707 633750 252777 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] -port 285 nsew -flabel metal3 s 633270 245899 633750 245969 0 FreeSans 400 0 0 0 gpio_inp_dis[4] -port 241 nsew -flabel metal3 s 633270 253351 633750 253421 0 FreeSans 400 0 0 0 gpio_oeb[4] -port 197 nsew -flabel metal3 s 633270 250223 633750 250293 0 FreeSans 400 0 0 0 gpio_out[4] -port 153 nsew -flabel metal3 s 633270 241023 633750 241093 0 FreeSans 400 0 0 0 gpio_slow_sel[4] -port 373 nsew -flabel metal3 s 633270 252063 633750 252133 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] -port 329 nsew -flabel metal3 s 633270 239183 633750 239253 0 FreeSans 400 0 0 0 gpio_in[4] -port 725 nsew -flabel metal3 s 633270 289059 633750 289129 0 FreeSans 400 0 0 0 gpio_analog_en[5] -port 460 nsew -flabel metal3 s 633270 290347 633750 290417 0 FreeSans 400 0 0 0 gpio_analog_pol[5] -port 548 nsew -flabel metal3 s 633270 293383 633750 293453 0 FreeSans 400 0 0 0 gpio_analog_sel[5] -port 504 nsew -flabel metal3 s 633270 289703 633750 289773 0 FreeSans 400 0 0 0 gpio_dm0[5] -port 592 nsew -flabel metal3 s 633270 287863 633750 287933 0 FreeSans 400 0 0 0 gpio_dm1[5] -port 636 nsew -flabel metal3 s 633270 294027 633750 294097 0 FreeSans 400 0 0 0 gpio_dm2[5] -port 680 nsew -flabel metal3 s 633270 294671 633750 294741 0 FreeSans 400 0 0 0 gpio_holdover[5] -port 416 nsew -flabel metal3 s 633270 297707 633750 297777 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] -port 284 nsew -flabel metal3 s 633270 290899 633750 290969 0 FreeSans 400 0 0 0 gpio_inp_dis[5] -port 240 nsew -flabel metal3 s 633270 298351 633750 298421 0 FreeSans 400 0 0 0 gpio_oeb[5] -port 196 nsew -flabel metal3 s 633270 295223 633750 295293 0 FreeSans 400 0 0 0 gpio_out[5] -port 152 nsew -flabel metal3 s 633270 286023 633750 286093 0 FreeSans 400 0 0 0 gpio_slow_sel[5] -port 372 nsew -flabel metal3 s 633270 297063 633750 297133 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] -port 328 nsew -flabel metal3 s 633270 284183 633750 284253 0 FreeSans 400 0 0 0 gpio_in[5] -port 724 nsew -flabel metal3 s 633270 334259 633750 334329 0 FreeSans 400 0 0 0 gpio_analog_en[6] -port 459 nsew -flabel metal3 s 633270 335547 633750 335617 0 FreeSans 400 0 0 0 gpio_analog_pol[6] -port 547 nsew -flabel metal3 s 633270 338583 633750 338653 0 FreeSans 400 0 0 0 gpio_analog_sel[6] -port 503 nsew -flabel metal3 s 633270 334903 633750 334973 0 FreeSans 400 0 0 0 gpio_dm0[6] -port 591 nsew -flabel metal3 s 633270 333063 633750 333133 0 FreeSans 400 0 0 0 gpio_dm1[6] -port 635 nsew -flabel metal3 s 633270 339227 633750 339297 0 FreeSans 400 0 0 0 gpio_dm2[6] -port 679 nsew -flabel metal3 s 633270 339871 633750 339941 0 FreeSans 400 0 0 0 gpio_holdover[6] -port 415 nsew -flabel metal3 s 633270 342907 633750 342977 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] -port 283 nsew -flabel metal3 s 633270 336099 633750 336169 0 FreeSans 400 0 0 0 gpio_inp_dis[6] -port 239 nsew -flabel metal3 s 633270 343551 633750 343621 0 FreeSans 400 0 0 0 gpio_oeb[6] -port 195 nsew -flabel metal3 s 633270 340423 633750 340493 0 FreeSans 400 0 0 0 gpio_out[6] -port 151 nsew -flabel metal3 s 633270 331223 633750 331293 0 FreeSans 400 0 0 0 gpio_slow_sel[6] -port 371 nsew -flabel metal3 s 633270 342263 633750 342333 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] -port 327 nsew -flabel metal3 s 633270 329383 633750 329453 0 FreeSans 400 0 0 0 gpio_in[6] -port 723 nsew -flabel metal3 s 633270 108859 633750 108929 0 FreeSans 400 0 0 0 gpio_analog_en[1] -port 464 nsew -flabel metal3 s 633270 110147 633750 110217 0 FreeSans 400 0 0 0 gpio_analog_pol[1] -port 552 nsew -flabel metal3 s 633270 113183 633750 113253 0 FreeSans 400 0 0 0 gpio_analog_sel[1] -port 508 nsew -flabel metal3 s 633270 109503 633750 109573 0 FreeSans 400 0 0 0 gpio_dm0[1] -port 596 nsew -flabel metal3 s 633270 107663 633750 107733 0 FreeSans 400 0 0 0 gpio_dm1[1] -port 640 nsew -flabel metal3 s 633270 113827 633750 113897 0 FreeSans 400 0 0 0 gpio_dm2[1] -port 684 nsew -flabel metal3 s 633270 114471 633750 114541 0 FreeSans 400 0 0 0 gpio_holdover[1] -port 420 nsew -flabel metal3 s 633270 117507 633750 117577 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] -port 288 nsew -flabel metal3 s 633270 110699 633750 110769 0 FreeSans 400 0 0 0 gpio_inp_dis[1] -port 244 nsew -flabel metal3 s 633270 118151 633750 118221 0 FreeSans 400 0 0 0 gpio_oeb[1] -port 200 nsew -flabel metal3 s 633270 115023 633750 115093 0 FreeSans 400 0 0 0 gpio_out[1] -port 156 nsew -flabel metal3 s 633270 105823 633750 105893 0 FreeSans 400 0 0 0 gpio_slow_sel[1] -port 376 nsew -flabel metal3 s 633270 116863 633750 116933 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] -port 332 nsew -flabel metal3 s 633270 103983 633750 104053 0 FreeSans 400 0 0 0 gpio_in[1] -port 728 nsew -flabel metal3 s 633270 153859 633750 153929 0 FreeSans 400 0 0 0 gpio_analog_en[2] -port 463 nsew -flabel metal3 s 633270 155147 633750 155217 0 FreeSans 400 0 0 0 gpio_analog_pol[2] -port 551 nsew -flabel metal3 s 633270 158183 633750 158253 0 FreeSans 400 0 0 0 gpio_analog_sel[2] -port 507 nsew -flabel metal3 s 633270 154503 633750 154573 0 FreeSans 400 0 0 0 gpio_dm0[2] -port 595 nsew -flabel metal3 s 633270 152663 633750 152733 0 FreeSans 400 0 0 0 gpio_dm1[2] -port 639 nsew -flabel metal3 s 633270 158827 633750 158897 0 FreeSans 400 0 0 0 gpio_dm2[2] -port 683 nsew -flabel metal3 s 633270 159471 633750 159541 0 FreeSans 400 0 0 0 gpio_holdover[2] -port 419 nsew -flabel metal3 s 633270 162507 633750 162577 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] -port 287 nsew -flabel metal3 s 633270 155699 633750 155769 0 FreeSans 400 0 0 0 gpio_inp_dis[2] -port 243 nsew -flabel metal3 s 633270 163151 633750 163221 0 FreeSans 400 0 0 0 gpio_oeb[2] -port 199 nsew -flabel metal3 s 633270 160023 633750 160093 0 FreeSans 400 0 0 0 gpio_out[2] -port 155 nsew -flabel metal3 s 633270 150823 633750 150893 0 FreeSans 400 0 0 0 gpio_slow_sel[2] -port 375 nsew -flabel metal3 s 633270 161863 633750 161933 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] -port 331 nsew -flabel metal3 s 633270 148983 633750 149053 0 FreeSans 400 0 0 0 gpio_in[2] -port 727 nsew -flabel metal3 s 633270 199059 633750 199129 0 FreeSans 400 0 0 0 gpio_analog_en[3] -port 462 nsew -flabel metal3 s 633270 200347 633750 200417 0 FreeSans 400 0 0 0 gpio_analog_pol[3] -port 550 nsew -flabel metal3 s 633270 203383 633750 203453 0 FreeSans 400 0 0 0 gpio_analog_sel[3] -port 506 nsew -flabel metal3 s 633270 197863 633750 197933 0 FreeSans 400 0 0 0 gpio_dm1[3] -port 638 nsew -flabel metal3 s 633270 204027 633750 204097 0 FreeSans 400 0 0 0 gpio_dm2[3] -port 682 nsew -flabel metal3 s 633270 199703 633750 199773 0 FreeSans 400 0 0 0 gpio_dm0[3] -port 594 nsew -flabel metal3 s 633270 204671 633750 204741 0 FreeSans 400 0 0 0 gpio_holdover[3] -port 418 nsew -flabel metal3 s 633270 207707 633750 207777 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] -port 286 nsew -flabel metal3 s 633270 200899 633750 200969 0 FreeSans 400 0 0 0 gpio_inp_dis[3] -port 242 nsew -flabel metal3 s 633270 208351 633750 208421 0 FreeSans 400 0 0 0 gpio_oeb[3] -port 198 nsew -flabel metal3 s 633270 205223 633750 205293 0 FreeSans 400 0 0 0 gpio_out[3] -port 154 nsew -flabel metal3 s 633270 196023 633750 196093 0 FreeSans 400 0 0 0 gpio_slow_sel[3] -port 374 nsew -flabel metal3 s 633270 207063 633750 207133 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] -port 330 nsew -flabel metal3 s 633270 63659 633750 63729 0 FreeSans 400 0 0 0 gpio_analog_en[0] -port 465 nsew -flabel metal3 s 633270 64947 633750 65017 0 FreeSans 400 0 0 0 gpio_analog_pol[0] -port 553 nsew -flabel metal3 s 633270 67983 633750 68053 0 FreeSans 400 0 0 0 gpio_analog_sel[0] -port 509 nsew -flabel metal3 s 633270 64303 633750 64373 0 FreeSans 400 0 0 0 gpio_dm0[0] -port 597 nsew -flabel metal3 s 633270 62463 633750 62533 0 FreeSans 400 0 0 0 gpio_dm1[0] -port 641 nsew -flabel metal3 s 633270 68627 633750 68697 0 FreeSans 400 0 0 0 gpio_dm2[0] -port 685 nsew -flabel metal3 s 633270 69271 633750 69341 0 FreeSans 400 0 0 0 gpio_holdover[0] -port 421 nsew -flabel metal3 s 633270 72307 633750 72377 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] -port 289 nsew -flabel metal3 s 633270 65499 633750 65569 0 FreeSans 400 0 0 0 gpio_inp_dis[0] -port 245 nsew -flabel metal3 s 633270 72951 633750 73021 0 FreeSans 400 0 0 0 gpio_oeb[0] -port 201 nsew -flabel metal3 s 633270 69823 633750 69893 0 FreeSans 400 0 0 0 gpio_out[0] -port 157 nsew -flabel metal3 s 633270 60623 633750 60693 0 FreeSans 400 0 0 0 gpio_slow_sel[0] -port 377 nsew -flabel metal3 s 633270 71663 633750 71733 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] -port 333 nsew -flabel metal3 s 633270 58783 633750 58853 0 FreeSans 400 0 0 0 gpio_in[0] -port 729 nsew -flabel metal3 s 633270 194183 633750 194253 0 FreeSans 400 0 0 0 gpio_in[3] -port 726 nsew -flabel metal3 633270 61267 633750 61337 0 FreeSans 400 0 0 0 analog_io[0] +flabel metal3 s 633270 556035 633750 556249 0 FreeSans 400 0 0 0 analog_noesd_io[8] +port 941 nsew +flabel metal3 -264 906644 56 906704 0 FreeSans 400 0 0 0 gpio_loopback_one[24] +port 837 nsew +flabel metal3 -264 736644 56 736704 0 FreeSans 400 0 0 0 gpio_loopback_one[25] +port 836 nsew +flabel metal3 -264 693644 56 693704 0 FreeSans 400 0 0 0 gpio_loopback_one[26] +port 835 nsew +flabel metal3 -264 650644 56 650704 0 FreeSans 400 0 0 0 gpio_loopback_one[27] +port 834 nsew +flabel metal3 -264 607644 56 607704 0 FreeSans 400 0 0 0 gpio_loopback_one[28] +port 833 nsew +flabel metal3 -264 564644 56 564704 0 FreeSans 400 0 0 0 gpio_loopback_one[29] +port 832 nsew +flabel metal3 -264 521644 56 521704 0 FreeSans 400 0 0 0 gpio_loopback_one[30] +port 831 nsew +flabel metal3 -264 478644 56 478704 0 FreeSans 400 0 0 0 gpio_loopback_one[31] +port 830 nsew +flabel metal3 -264 349644 56 349704 0 FreeSans 400 0 0 0 gpio_loopback_one[32] +port 829 nsew +flabel metal3 -264 306644 56 306704 0 FreeSans 400 0 0 0 gpio_loopback_one[33] +port 828 nsew +flabel metal3 -264 263644 56 263704 0 FreeSans 400 0 0 0 gpio_loopback_one[34] +port 827 nsew +flabel metal3 -264 220644 56 220704 0 FreeSans 400 0 0 0 gpio_loopback_one[35] +port 826 nsew +flabel metal3 -264 177644 56 177704 0 FreeSans 400 0 0 0 gpio_loopback_one[36] +port 825 nsew +flabel metal3 -264 134644 56 134704 0 FreeSans 400 0 0 0 gpio_loopback_one[37] +port 824 nsew +flabel metal2 s 488380 -260 488432 56 0 FreeSans 400 90 0 0 gpio_loopback_one[43] +port 818 nsew +flabel metal2 s 492635 -260 492687 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[43] +port 774 nsew +flabel metal2 s 433580 -260 433632 56 0 FreeSans 400 90 0 0 gpio_loopback_one[42] +port 819 nsew +flabel metal2 s 437778 -260 437830 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[42] +port 775 nsew +flabel metal2 s 378780 -260 378832 56 0 FreeSans 400 90 0 0 gpio_loopback_one[41] +port 820 nsew +flabel metal2 s 382978 -260 383030 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[41] +port 776 nsew +flabel metal2 s 323980 -260 324032 56 0 FreeSans 400 90 0 0 gpio_loopback_one[40] +port 821 nsew +flabel metal2 s 328165 -282 328217 34 0 FreeSans 400 90 0 0 gpio_loopback_zero[40] +port 777 nsew +flabel metal2 s 269180 -260 269232 56 0 FreeSans 400 90 0 0 gpio_loopback_one[39] +port 822 nsew +flabel metal2 s 273360 -260 273412 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[39] +port 778 nsew +flabel metal2 s 160580 -260 160632 56 0 FreeSans 400 90 0 0 gpio_loopback_one[38] +port 823 nsew +flabel metal2 s 163791 -259 163843 57 0 FreeSans 400 90 0 0 gpio_loopback_zero[38] +port 779 nsew +flabel metal2 s 110164 -116 110220 56 0 FreeSans 400 90 0 0 resetb_l +port 37 nsew +flabel metal2 s 99571 -90 99637 56 0 FreeSans 400 90 0 0 resetb_h +port 36 nsew +flabel metal3 -284 53372 56 53442 0 FreeSans 400 0 0 0 por_l +port 35 nsew +flabel metal3 -284 53595 56 53665 0 FreeSans 400 0 0 0 porb_l +port 34 nsew +flabel metal2 s 605082 -260 605134 56 0 FreeSans 400 90 0 0 mask_rev[0] +port 69 nsew +flabel metal3 -284 53147 56 53217 0 FreeSans 400 0 0 0 porb_h +port 33 nsew +flabel metal2 578298 953270 578358 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[15] +port 846 nsew +flabel metal2 478898 953270 478958 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[16] +port 845 nsew +flabel metal2 427698 953270 427758 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[17] +port 844 nsew +flabel metal2 338698 953270 338758 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[18] +port 843 nsew +flabel metal2 234298 953270 234358 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[19] +port 842 nsew +flabel metal2 183098 953270 183158 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[20] +port 841 nsew +flabel metal2 131898 953270 131958 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[21] +port 840 nsew +flabel metal2 80698 953270 80758 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[22] +port 839 nsew +flabel metal2 29498 953270 29558 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[23] +port 838 nsew +flabel metal3 633270 523005 633590 523067 0 FreeSans 400 0 0 0 gpio_loopback_one[7] +port 854 nsew +flabel metal3 633270 346005 633590 346067 0 FreeSans 400 0 0 0 gpio_loopback_one[6] +port 855 nsew +flabel metal3 633270 301005 633590 301067 0 FreeSans 400 0 0 0 gpio_loopback_one[5] +port 856 nsew +flabel metal3 633270 256005 633590 256067 0 FreeSans 400 0 0 0 gpio_loopback_one[4] +port 857 nsew +flabel metal3 633270 211005 633590 211067 0 FreeSans 400 0 0 0 gpio_loopback_one[3] +port 858 nsew +flabel metal3 633270 166005 633590 166067 0 FreeSans 400 0 0 0 gpio_loopback_one[2] +port 859 nsew +flabel metal3 633270 121005 633590 121067 0 FreeSans 400 0 0 0 gpio_loopback_one[1] +port 860 nsew +flabel metal3 633270 76005 633590 76067 0 FreeSans 400 0 0 0 gpio_loopback_one[0] +port 861 nsew +flabel metal2 s 605978 -260 606030 56 0 FreeSans 400 90 0 0 mask_rev[4] +port 65 nsew +flabel metal2 s 606202 -260 606254 56 0 FreeSans 400 90 0 0 mask_rev[5] +port 64 nsew +flabel metal2 s 606426 -260 606478 56 0 FreeSans 400 90 0 0 mask_rev[6] +port 63 nsew +flabel metal2 s 606650 -260 606702 56 0 FreeSans 400 90 0 0 mask_rev[7] +port 62 nsew +flabel metal2 s 606874 -260 606926 56 0 FreeSans 400 90 0 0 mask_rev[8] +port 61 nsew +flabel metal2 s 607098 -260 607150 56 0 FreeSans 400 90 0 0 mask_rev[9] +port 60 nsew +flabel metal2 s 607322 -260 607374 56 0 FreeSans 400 90 0 0 mask_rev[10] +port 59 nsew +flabel metal2 s 607546 -260 607598 56 0 FreeSans 400 90 0 0 mask_rev[11] +port 58 nsew +flabel metal2 s 607770 -260 607822 56 0 FreeSans 400 90 0 0 mask_rev[12] +port 57 nsew +flabel metal2 s 607994 -260 608046 56 0 FreeSans 400 90 0 0 mask_rev[13] +port 56 nsew +flabel metal2 s 608218 -260 608270 56 0 FreeSans 400 90 0 0 mask_rev[14] +port 55 nsew +flabel metal2 s 608442 -260 608494 56 0 FreeSans 400 90 0 0 mask_rev[15] +port 54 nsew +flabel metal2 s 608666 -260 608718 56 0 FreeSans 400 90 0 0 mask_rev[16] +port 53 nsew +flabel metal2 s 608890 -260 608942 56 0 FreeSans 400 90 0 0 mask_rev[17] +port 52 nsew +flabel metal2 s 609114 -260 609166 56 0 FreeSans 400 90 0 0 mask_rev[18] +port 51 nsew +flabel metal2 s 609338 -260 609390 56 0 FreeSans 400 90 0 0 mask_rev[19] +port 50 nsew +flabel metal2 s 609562 -260 609614 56 0 FreeSans 400 90 0 0 mask_rev[20] +port 49 nsew +flabel metal2 s 609786 -260 609838 56 0 FreeSans 400 90 0 0 mask_rev[21] +port 48 nsew +flabel metal2 s 610010 -260 610062 56 0 FreeSans 400 90 0 0 mask_rev[22] +port 47 nsew +flabel metal2 s 610234 -260 610286 56 0 FreeSans 400 90 0 0 mask_rev[23] +port 46 nsew +flabel metal2 s 610458 -260 610510 56 0 FreeSans 400 90 0 0 mask_rev[24] +port 45 nsew +flabel metal2 s 610682 -260 610734 56 0 FreeSans 400 90 0 0 mask_rev[25] +port 44 nsew +flabel metal2 s 610906 -260 610958 56 0 FreeSans 400 90 0 0 mask_rev[26] +port 43 nsew +flabel metal2 s 611130 -260 611182 56 0 FreeSans 400 90 0 0 mask_rev[27] +port 42 nsew +flabel metal2 s 611354 -260 611406 56 0 FreeSans 400 90 0 0 mask_rev[28] +port 41 nsew +flabel metal2 s 611578 -260 611630 56 0 FreeSans 400 90 0 0 mask_rev[29] +port 40 nsew +flabel metal2 s 611802 -260 611854 56 0 FreeSans 400 90 0 0 mask_rev[30] +port 39 nsew +flabel metal2 s 612026 -260 612078 56 0 FreeSans 400 90 0 0 mask_rev[31] +port 38 nsew +flabel metal2 s 605754 -260 605806 56 0 FreeSans 400 90 0 0 mask_rev[3] +port 66 nsew +flabel metal2 s 605530 -260 605582 56 0 FreeSans 400 90 0 0 mask_rev[2] +port 67 nsew +flabel metal2 s 605306 -260 605358 56 0 FreeSans 400 90 0 0 mask_rev[1] +port 68 nsew +flabel metal3 -264 734644 56 734704 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] +port 792 nsew +flabel metal3 -264 648644 56 648704 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] +port 790 nsew +flabel metal3 -264 562644 56 562704 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] +port 788 nsew +flabel metal3 -264 476644 56 476704 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] +port 786 nsew +flabel metal3 -264 304644 56 304704 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] +port 784 nsew +flabel metal3 -264 218644 56 218704 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] +port 782 nsew +flabel metal3 -264 132644 56 132704 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] +port 780 nsew +flabel metal3 -264 904644 56 904704 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] +port 793 nsew +flabel metal3 -264 691644 56 691704 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] +port 791 nsew +flabel metal3 -264 605644 56 605704 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] +port 789 nsew +flabel metal3 -264 519644 56 519704 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] +port 787 nsew +flabel metal3 -264 347644 56 347704 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] +port 785 nsew +flabel metal3 -264 261644 56 261704 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] +port 783 nsew +flabel metal3 -264 175644 56 175704 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] +port 781 nsew +flabel metal2 27497 953270 27557 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[23] +port 794 nsew +flabel metal2 78697 953270 78757 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[22] +port 795 nsew +flabel metal2 129897 953270 129957 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[21] +port 796 nsew +flabel metal2 181097 953270 181157 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[20] +port 797 nsew +flabel metal2 232297 953270 232357 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[19] +port 798 nsew +flabel metal2 336697 953270 336757 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[18] +port 799 nsew +flabel metal2 425697 953270 425757 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[17] +port 800 nsew +flabel metal2 476897 953270 476957 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[16] +port 801 nsew +flabel metal2 576297 953270 576357 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[15] +port 802 nsew +flabel metal2 147030 -424 147086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[38] +port 339 nsew +flabel metal2 145190 -424 145246 56 0 FreeSans 400 270 0 0 gpio_in[38] +port 691 nsew +flabel metal3 46784 -444 51564 56 0 FreeSans 3200 0 0 0 vssa +port 23 nsew +flabel metal3 633270 61238 633750 61366 0 FreeSans 400 0 0 0 analog_io[0] port 905 nsew -flabel metal3 633270 63107 633750 63177 0 FreeSans 400 0 0 0 analog_noesd_io[0] +flabel metal3 633270 63035 633750 63249 0 FreeSans 400 0 0 0 analog_noesd_io[0] port 949 nsew -flabel metal3 633270 108307 633750 108377 0 FreeSans 400 0 0 0 analog_noesd_io[1] +flabel metal3 633270 108235 633750 108449 0 FreeSans 400 0 0 0 analog_noesd_io[1] port 948 nsew -flabel metal3 633270 106467 633750 106537 0 FreeSans 400 0 0 0 analog_io[1] +flabel metal3 633270 106438 633750 106566 0 FreeSans 400 0 0 0 analog_io[1] port 904 nsew -flabel metal3 633270 73503 633750 73573 0 FreeSans 400 0 0 0 gpio_in_h[0] -port 773 nsew -flabel metal3 633270 118703 633750 118773 0 FreeSans 400 0 0 0 gpio_in_h[1] -port 772 nsew -flabel metal3 633270 151467 633750 151537 0 FreeSans 400 0 0 0 analog_io[2] +flabel metal3 633270 151438 633750 151566 0 FreeSans 400 0 0 0 analog_io[2] port 903 nsew -flabel metal3 633270 153307 633750 153377 0 FreeSans 400 0 0 0 analog_noesd_io[2] +flabel metal3 633270 153235 633750 153449 0 FreeSans 400 0 0 0 analog_noesd_io[2] port 947 nsew -flabel metal3 633270 163703 633750 163773 0 FreeSans 400 0 0 0 gpio_in_h[2] -port 771 nsew -flabel metal3 633270 196667 633750 196737 0 FreeSans 400 0 0 0 analog_io[3] +flabel metal3 633270 196638 633750 196766 0 FreeSans 400 0 0 0 analog_io[3] port 902 nsew -flabel metal3 633270 198507 633750 198577 0 FreeSans 400 0 0 0 analog_noesd_io[3] +flabel metal3 633270 198435 633750 198649 0 FreeSans 400 0 0 0 analog_noesd_io[3] port 946 nsew -flabel metal3 633270 208903 633750 208973 0 FreeSans 400 0 0 0 gpio_in_h[3] -port 770 nsew -flabel metal3 633270 241667 633750 241737 0 FreeSans 400 0 0 0 analog_io[4] +flabel metal3 633270 241638 633750 241766 0 FreeSans 400 0 0 0 analog_io[4] port 901 nsew -flabel metal3 633270 243507 633750 243577 0 FreeSans 400 0 0 0 analog_noesd_io[4] +flabel metal3 633270 243435 633750 243649 0 FreeSans 400 0 0 0 analog_noesd_io[4] port 945 nsew -flabel metal3 633270 253903 633750 253973 0 FreeSans 400 0 0 0 gpio_in_h[4] -port 769 nsew -flabel metal3 633270 286667 633750 286737 0 FreeSans 400 0 0 0 analog_io[5] +flabel metal3 633270 286638 633750 286766 0 FreeSans 400 0 0 0 analog_io[5] port 900 nsew -flabel metal3 633270 288507 633750 288577 0 FreeSans 400 0 0 0 analog_noesd_io[5] +flabel metal3 633270 288435 633750 288649 0 FreeSans 400 0 0 0 analog_noesd_io[5] port 944 nsew -flabel metal3 633270 298903 633750 298973 0 FreeSans 400 0 0 0 gpio_in_h[5] -port 768 nsew -flabel metal3 633270 331867 633750 331937 0 FreeSans 400 0 0 0 analog_io[6] +flabel metal3 633270 331838 633750 331966 0 FreeSans 400 0 0 0 analog_io[6] port 899 nsew -flabel metal3 633270 333707 633750 333777 0 FreeSans 400 0 0 0 analog_noesd_io[6] +flabel metal3 633270 333635 633750 333849 0 FreeSans 400 0 0 0 analog_noesd_io[6] port 943 nsew -flabel metal3 633270 344103 633750 344173 0 FreeSans 400 0 0 0 gpio_in_h[6] -port 767 nsew -flabel metal3 s 633270 509067 633750 509137 0 FreeSans 400 0 0 0 analog_io[7] +flabel metal3 s 633270 509038 633750 509166 0 FreeSans 400 0 0 0 analog_io[7] port 898 nsew -flabel metal3 s 633270 510907 633750 510977 0 FreeSans 400 0 0 0 analog_noesd_io[7] +flabel metal3 s 633270 510835 633750 511049 0 FreeSans 400 0 0 0 analog_noesd_io[7] port 942 nsew -flabel metal3 s 633270 521303 633750 521373 0 FreeSans 400 0 0 0 gpio_in_h[7] -port 766 nsew -flabel metal3 s 633270 554267 633750 554337 0 FreeSans 400 0 0 0 analog_io[8] +flabel metal3 s 633270 554238 633750 554366 0 FreeSans 400 0 0 0 analog_io[8] port 897 nsew -flabel metal3 s 633270 556107 633750 556177 0 FreeSans 400 0 0 0 analog_noesd_io[8] -port 941 nsew -flabel metal3 s 633270 566503 633750 566573 0 FreeSans 400 0 0 0 gpio_in_h[8] -port 765 nsew -flabel metal3 s 633270 599267 633750 599337 0 FreeSans 400 0 0 0 analog_io[9] +flabel metal3 s 633270 599238 633750 599366 0 FreeSans 400 0 0 0 analog_io[9] port 896 nsew -flabel metal3 s 633270 601107 633750 601177 0 FreeSans 400 0 0 0 analog_noesd_io[9] +flabel metal3 s 633270 601035 633750 601249 0 FreeSans 400 0 0 0 analog_noesd_io[9] port 940 nsew -flabel metal3 s 633270 611503 633750 611573 0 FreeSans 400 0 0 0 gpio_in_h[9] -port 764 nsew -flabel metal3 s 633270 644467 633750 644537 0 FreeSans 400 0 0 0 analog_io[10] +flabel metal3 s 633270 644438 633750 644566 0 FreeSans 400 0 0 0 analog_io[10] port 895 nsew -flabel metal3 s 633270 646307 633750 646377 0 FreeSans 400 0 0 0 analog_noesd_io[10] +flabel metal3 s 633270 646235 633750 646449 0 FreeSans 400 0 0 0 analog_noesd_io[10] port 939 nsew -flabel metal3 s 633270 656703 633750 656773 0 FreeSans 400 0 0 0 gpio_in_h[10] -port 763 nsew -flabel metal3 s 633270 689467 633750 689537 0 FreeSans 400 0 0 0 analog_io[11] +flabel metal3 s 633270 689438 633750 689566 0 FreeSans 400 0 0 0 analog_io[11] port 894 nsew -flabel metal3 s 633270 691307 633750 691377 0 FreeSans 400 0 0 0 analog_noesd_io[11] +flabel metal3 s 633270 691235 633750 691449 0 FreeSans 400 0 0 0 analog_noesd_io[11] port 938 nsew -flabel metal3 s 633270 701703 633750 701773 0 FreeSans 400 0 0 0 gpio_in_h[11] -port 762 nsew -flabel metal3 s 633270 746703 633750 746773 0 FreeSans 400 0 0 0 gpio_in_h[12] -port 761 nsew -flabel metal3 s 633270 835903 633750 835973 0 FreeSans 400 0 0 0 gpio_in_h[13] -port 760 nsew -flabel metal3 s 633270 925103 633750 925173 0 FreeSans 400 0 0 0 gpio_in_h[14] -port 759 nsew -flabel metal3 s 633270 734467 633750 734537 0 FreeSans 400 0 0 0 analog_io[12] +flabel metal3 s 633270 734438 633750 734566 0 FreeSans 400 0 0 0 analog_io[12] port 893 nsew -flabel metal3 s 633270 823667 633750 823737 0 FreeSans 400 0 0 0 analog_io[13] +flabel metal3 s 633270 823638 633750 823766 0 FreeSans 400 0 0 0 analog_io[13] port 892 nsew -flabel metal3 s 633270 912867 633750 912937 0 FreeSans 400 0 0 0 analog_io[14] +flabel metal3 s 633270 912838 633750 912966 0 FreeSans 400 0 0 0 analog_io[14] port 891 nsew -flabel metal3 s 633270 736307 633750 736377 0 FreeSans 400 0 0 0 analog_noesd_io[12] +flabel metal3 s 633270 736235 633750 736449 0 FreeSans 400 0 0 0 analog_noesd_io[12] port 937 nsew -flabel metal3 s 633270 825507 633750 825577 0 FreeSans 400 0 0 0 analog_noesd_io[13] +flabel metal3 s 633270 825435 633750 825649 0 FreeSans 400 0 0 0 analog_noesd_io[13] port 936 nsew -flabel metal3 s 633270 914707 633750 914777 0 FreeSans 400 0 0 0 analog_noesd_io[14] +flabel metal3 s 633270 914635 633750 914849 0 FreeSans 400 0 0 0 analog_noesd_io[14] port 935 nsew -flabel metal3 s -424 922197 56 922267 0 FreeSans 400 0 0 0 gpio_analog_en[24] -port 441 nsew -flabel metal3 s -424 920909 56 920979 0 FreeSans 400 0 0 0 gpio_analog_pol[24] -port 529 nsew -flabel metal3 s -424 917873 56 917943 0 FreeSans 400 0 0 0 gpio_analog_sel[24] -port 485 nsew -flabel metal3 s -424 921553 56 921623 0 FreeSans 400 0 0 0 gpio_dm0[24] -port 573 nsew -flabel metal3 s -424 923393 56 923463 0 FreeSans 400 0 0 0 gpio_dm1[24] -port 617 nsew -flabel metal3 s -424 917229 56 917299 0 FreeSans 400 0 0 0 gpio_dm2[24] -port 661 nsew -flabel metal3 s -424 916585 56 916655 0 FreeSans 400 0 0 0 gpio_holdover[24] -port 397 nsew -flabel metal3 s -424 913549 56 913619 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] -port 265 nsew -flabel metal3 s -424 920357 56 920427 0 FreeSans 400 0 0 0 gpio_inp_dis[24] -port 221 nsew -flabel metal3 s -424 912905 56 912975 0 FreeSans 400 0 0 0 gpio_oeb[24] -port 177 nsew -flabel metal3 s -424 916033 56 916103 0 FreeSans 400 0 0 0 gpio_out[24] -port 133 nsew -flabel metal3 s -424 925233 56 925303 0 FreeSans 400 0 0 0 gpio_slow_sel[24] -port 353 nsew -flabel metal3 s -424 914193 56 914263 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] -port 309 nsew -flabel metal3 s -424 927073 56 927143 0 FreeSans 400 0 0 0 gpio_in[24] -port 705 nsew -flabel metal3 s -424 912353 56 912423 0 FreeSans 400 0 0 0 gpio_in_h[24] -port 749 nsew -flabel metal3 s -424 924589 56 924659 0 FreeSans 400 0 0 0 analog_io[24] -port 881 nsew -flabel metal3 s -424 922749 56 922819 0 FreeSans 400 0 0 0 analog_noesd_io[24] -port 925 nsew -flabel metal3 s -424 752397 56 752467 0 FreeSans 400 0 0 0 gpio_analog_en[25] -port 440 nsew -flabel metal3 s -424 751109 56 751179 0 FreeSans 400 0 0 0 gpio_analog_pol[25] -port 528 nsew -flabel metal3 s -424 748073 56 748143 0 FreeSans 400 0 0 0 gpio_analog_sel[25] -port 484 nsew -flabel metal3 s -424 751753 56 751823 0 FreeSans 400 0 0 0 gpio_dm0[25] -port 572 nsew -flabel metal3 s -424 753593 56 753663 0 FreeSans 400 0 0 0 gpio_dm1[25] -port 616 nsew -flabel metal3 s -424 747429 56 747499 0 FreeSans 400 0 0 0 gpio_dm2[25] -port 660 nsew -flabel metal3 s -424 746785 56 746855 0 FreeSans 400 0 0 0 gpio_holdover[25] -port 396 nsew -flabel metal3 s -424 743749 56 743819 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] -port 264 nsew -flabel metal3 s -424 750557 56 750627 0 FreeSans 400 0 0 0 gpio_inp_dis[25] -port 220 nsew -flabel metal3 s -424 743105 56 743175 0 FreeSans 400 0 0 0 gpio_oeb[25] -port 176 nsew -flabel metal3 s -424 746233 56 746303 0 FreeSans 400 0 0 0 gpio_out[25] -port 132 nsew -flabel metal3 s -424 755433 56 755503 0 FreeSans 400 0 0 0 gpio_slow_sel[25] -port 352 nsew -flabel metal3 s -424 757273 56 757343 0 FreeSans 400 0 0 0 gpio_in[25] -port 704 nsew -flabel metal3 s -424 535753 56 535823 0 FreeSans 400 0 0 0 gpio_dm0[30] -port 567 nsew -flabel metal3 s -424 537593 56 537663 0 FreeSans 400 0 0 0 gpio_dm1[30] -port 611 nsew -flabel metal3 s -424 531429 56 531499 0 FreeSans 400 0 0 0 gpio_dm2[30] -port 655 nsew -flabel metal3 s -424 530785 56 530855 0 FreeSans 400 0 0 0 gpio_holdover[30] -port 391 nsew -flabel metal3 s -424 527749 56 527819 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] -port 259 nsew -flabel metal3 s -424 534557 56 534627 0 FreeSans 400 0 0 0 gpio_inp_dis[30] -port 215 nsew -flabel metal3 s -424 527105 56 527175 0 FreeSans 400 0 0 0 gpio_oeb[30] -port 171 nsew -flabel metal3 s -424 530233 56 530303 0 FreeSans 400 0 0 0 gpio_out[30] -port 127 nsew -flabel metal3 s -424 539433 56 539503 0 FreeSans 400 0 0 0 gpio_slow_sel[30] -port 347 nsew -flabel metal3 s -424 528393 56 528463 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] -port 303 nsew -flabel metal3 s -424 541273 56 541343 0 FreeSans 400 0 0 0 gpio_in[30] -port 699 nsew -flabel metal3 s -424 493197 56 493267 0 FreeSans 400 0 0 0 gpio_analog_en[31] -port 434 nsew -flabel metal3 s -424 491909 56 491979 0 FreeSans 400 0 0 0 gpio_analog_pol[31] -port 522 nsew -flabel metal3 s -424 488873 56 488943 0 FreeSans 400 0 0 0 gpio_analog_sel[31] -port 478 nsew -flabel metal3 s -424 492553 56 492623 0 FreeSans 400 0 0 0 gpio_dm0[31] -port 566 nsew -flabel metal3 s -424 494393 56 494463 0 FreeSans 400 0 0 0 gpio_dm1[31] -port 610 nsew -flabel metal3 s -424 488229 56 488299 0 FreeSans 400 0 0 0 gpio_dm2[31] -port 654 nsew -flabel metal3 s -424 487585 56 487655 0 FreeSans 400 0 0 0 gpio_holdover[31] -port 390 nsew -flabel metal3 s -424 484549 56 484619 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] -port 258 nsew -flabel metal3 s -424 491357 56 491427 0 FreeSans 400 0 0 0 gpio_inp_dis[31] -port 214 nsew -flabel metal3 s -424 483905 56 483975 0 FreeSans 400 0 0 0 gpio_oeb[31] -port 170 nsew -flabel metal3 s -424 487033 56 487103 0 FreeSans 400 0 0 0 gpio_out[31] -port 126 nsew -flabel metal3 s -424 496233 56 496303 0 FreeSans 400 0 0 0 gpio_slow_sel[31] -port 346 nsew -flabel metal3 s -424 485193 56 485263 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] -port 302 nsew -flabel metal3 s -424 498073 56 498143 0 FreeSans 400 0 0 0 gpio_in[31] -port 698 nsew -flabel metal3 s -424 709197 56 709267 0 FreeSans 400 0 0 0 gpio_analog_en[26] +flabel metal2 s 596360 953270 596488 953750 0 FreeSans 400 90 0 0 analog_io[15] +port 890 nsew +flabel metal2 s 494560 953270 494688 953750 0 FreeSans 400 90 0 0 analog_io[16] +port 889 nsew +flabel metal2 s 443160 953270 443288 953750 0 FreeSans 400 90 0 0 analog_io[17] +port 888 nsew +flabel metal2 s 354160 953270 354288 953750 0 FreeSans 400 90 0 0 analog_io[18] +port 887 nsew +flabel metal2 s 252360 953270 252488 953750 0 FreeSans 400 90 0 0 analog_io[19] +port 886 nsew +flabel metal2 s 200760 953270 200888 953750 0 FreeSans 400 90 0 0 analog_io[20] +port 885 nsew +flabel metal2 s 149360 953270 149488 953750 0 FreeSans 400 90 0 0 analog_io[21] +port 884 nsew +flabel metal2 s 97960 953270 98088 953750 0 FreeSans 400 90 0 0 analog_io[22] +port 883 nsew +flabel metal2 s 46560 953270 46688 953750 0 FreeSans 400 90 0 0 analog_io[23] +port 882 nsew +flabel metal2 s 594477 953270 594691 953750 0 FreeSans 400 90 0 0 analog_noesd_io[15] +port 934 nsew +flabel metal2 s 492677 953270 492891 953750 0 FreeSans 400 90 0 0 analog_noesd_io[16] +port 933 nsew +flabel metal2 s 441277 953270 441491 953750 0 FreeSans 400 90 0 0 analog_noesd_io[17] +port 932 nsew +flabel metal2 s 352277 953270 352491 953750 0 FreeSans 400 90 0 0 analog_noesd_io[18] +port 931 nsew +flabel metal2 s 250477 953270 250691 953750 0 FreeSans 400 90 0 0 analog_noesd_io[19] +port 930 nsew +flabel metal2 s 198877 953270 199091 953750 0 FreeSans 400 90 0 0 analog_noesd_io[20] +port 929 nsew +flabel metal2 s 147477 953270 147691 953750 0 FreeSans 400 90 0 0 analog_noesd_io[21] +port 928 nsew +flabel metal2 s 96077 953270 96291 953750 0 FreeSans 400 90 0 0 analog_noesd_io[22] +port 927 nsew +flabel metal2 s 44677 953270 44891 953750 0 FreeSans 400 90 0 0 analog_noesd_io[23] +port 926 nsew +flabel metal3 s -424 754760 56 754888 0 FreeSans 400 0 0 0 analog_io[25] +port 880 nsew +flabel metal3 s -424 711560 56 711688 0 FreeSans 400 0 0 0 analog_io[26] +port 879 nsew +flabel metal3 s -424 668360 56 668488 0 FreeSans 400 0 0 0 analog_io[27] +port 878 nsew +flabel metal3 s -424 625160 56 625288 0 FreeSans 400 0 0 0 analog_io[28] +port 877 nsew +flabel metal3 s -424 581960 56 582088 0 FreeSans 400 0 0 0 analog_io[29] +port 876 nsew +flabel metal3 s -424 538760 56 538888 0 FreeSans 400 0 0 0 analog_io[30] +port 875 nsew +flabel metal3 s -424 495560 56 495688 0 FreeSans 400 0 0 0 analog_io[31] +port 874 nsew +flabel metal3 s -424 367960 56 368088 0 FreeSans 400 0 0 0 analog_io[32] +port 873 nsew +flabel metal3 s -424 324760 56 324888 0 FreeSans 400 0 0 0 analog_io[33] +port 872 nsew +flabel metal3 s -424 281560 56 281688 0 FreeSans 400 0 0 0 analog_io[34] +port 871 nsew +flabel metal3 s -424 238360 56 238488 0 FreeSans 400 0 0 0 analog_io[35] +port 870 nsew +flabel metal3 s -424 195160 56 195288 0 FreeSans 400 0 0 0 analog_io[36] +port 869 nsew +flabel metal3 s -424 151960 56 152088 0 FreeSans 400 0 0 0 analog_io[37] +port 868 nsew +flabel metal3 s -424 752877 56 753091 0 FreeSans 400 0 0 0 analog_noesd_io[25] +port 924 nsew +flabel metal3 s -424 709677 56 709891 0 FreeSans 400 0 0 0 analog_noesd_io[26] +port 923 nsew +flabel metal3 s -424 666477 56 666691 0 FreeSans 400 0 0 0 analog_noesd_io[27] +port 922 nsew +flabel metal3 s -424 623277 56 623491 0 FreeSans 400 0 0 0 analog_noesd_io[28] +port 921 nsew +flabel metal3 s -424 580077 56 580291 0 FreeSans 400 0 0 0 analog_noesd_io[29] +port 920 nsew +flabel metal3 s -424 536877 56 537091 0 FreeSans 400 0 0 0 analog_noesd_io[30] +port 919 nsew +flabel metal3 s -424 366077 56 366291 0 FreeSans 400 0 0 0 analog_noesd_io[32] +port 917 nsew +flabel metal3 s -424 322877 56 323091 0 FreeSans 400 0 0 0 analog_noesd_io[33] +port 916 nsew +flabel metal3 s -424 279677 56 279891 0 FreeSans 400 0 0 0 analog_noesd_io[34] +port 915 nsew +flabel metal3 s -424 236477 56 236691 0 FreeSans 400 0 0 0 analog_noesd_io[35] +port 914 nsew +flabel metal3 s -424 193277 56 193491 0 FreeSans 400 0 0 0 analog_noesd_io[36] +port 913 nsew +flabel metal3 s -424 150077 56 150291 0 FreeSans 400 0 0 0 analog_noesd_io[37] +port 912 nsew +flabel metal2 s 256238 -424 256366 56 0 FreeSans 400 90 0 0 analog_io[39] +port 866 nsew +flabel metal2 s 311038 -424 311166 56 0 FreeSans 400 90 0 0 analog_io[40] +port 865 nsew +flabel metal2 s 365838 -424 365966 56 0 FreeSans 400 90 0 0 analog_io[41] +port 864 nsew +flabel metal2 s 420638 -424 420766 56 0 FreeSans 400 90 0 0 analog_io[42] +port 863 nsew +flabel metal2 s 475438 -424 475566 56 0 FreeSans 400 90 0 0 analog_io[43] +port 862 nsew +flabel metal2 s 258035 -424 258249 56 0 FreeSans 400 90 0 0 analog_noesd_io[39] +port 910 nsew +flabel metal2 s 312835 -424 313049 56 0 FreeSans 400 90 0 0 analog_noesd_io[40] +port 909 nsew +flabel metal2 s 367635 -424 367849 56 0 FreeSans 400 90 0 0 analog_noesd_io[41] +port 908 nsew +flabel metal2 s 422435 -424 422649 56 0 FreeSans 400 90 0 0 analog_noesd_io[42] +port 907 nsew +flabel metal2 s 477235 -424 477449 56 0 FreeSans 400 90 0 0 analog_noesd_io[43] +port 906 nsew +flabel metal2 s 149435 -424 149649 56 0 FreeSans 400 90 0 0 analog_noesd_io[38] +port 911 nsew +flabel metal2 s 147638 -424 147766 56 0 FreeSans 400 90 0 0 analog_io[38] +port 867 nsew +flabel metal2 148870 -424 148926 56 0 FreeSans 400 270 0 0 gpio_dm1[38] +port 603 nsew +flabel metal2 150710 -424 150766 56 0 FreeSans 400 270 0 0 gpio_dm0[38] +port 559 nsew +flabel metal3 s -424 493677 56 493891 0 FreeSans 400 0 0 0 analog_noesd_io[31] +port 918 nsew +flabel metal3 s 633270 373606 633770 378386 0 FreeSans 3200 90 0 0 vssa1 +port 26 nsew +flabel metal3 633270 417722 633770 422512 0 FreeSans 3200 90 0 0 vssd1 +port 30 nsew +flabel metal3 633270 427762 633770 432562 0 FreeSans 3200 90 0 0 vssd1 +port 30 nsew +flabel metal3 s 633270 461804 633770 466584 0 FreeSans 3200 90 0 0 vdda1 +port 24 nsew +flabel metal3 633270 568006 633590 568068 0 FreeSans 400 0 0 0 gpio_loopback_one[8] +port 853 nsew +flabel metal3 633270 613006 633590 613068 0 FreeSans 400 0 0 0 gpio_loopback_one[9] +port 852 nsew +flabel metal3 633270 658006 633590 658068 0 FreeSans 400 0 0 0 gpio_loopback_one[10] +port 851 nsew +flabel metal3 633270 703006 633590 703068 0 FreeSans 400 0 0 0 gpio_loopback_one[11] +port 850 nsew +flabel metal3 633270 748006 633590 748068 0 FreeSans 400 0 0 0 gpio_loopback_one[12] +port 849 nsew +flabel metal3 s 633270 776406 633770 781186 0 FreeSans 3200 90 0 0 vdda1 +port 24 nsew +flabel metal3 633270 837006 633590 837068 0 FreeSans 400 0 0 0 gpio_loopback_one[13] +port 848 nsew +flabel metal3 633270 927006 633590 927068 0 FreeSans 400 0 0 0 gpio_loopback_one[14] +port 847 nsew +flabel metal3 s 543542 953270 548322 953770 0 FreeSans 3200 0 0 0 vssa1 +port 26 nsew +flabel metal3 301342 953270 306122 953770 0 FreeSans 3200 0 0 0 vssio +port 19 nsew +flabel metal3 -444 875054 56 879716 0 FreeSans 3200 90 0 0 vssd2 +port 31 nsew +flabel metal3 -444 869964 56 874764 0 FreeSans 3200 90 0 0 vccd2 +port 29 nsew +flabel metal3 -444 837742 56 842522 0 FreeSans 3200 90 0 0 vddio +port 18 nsew +flabel metal3 -444 795542 56 800322 0 FreeSans 3200 90 0 0 vssa2 +port 27 nsew +flabel metal3 s -424 757272 56 757342 0 FreeSans 400 0 0 0 gpio_in[25] +port 704 nsew +flabel metal3 s -424 755432 56 755502 0 FreeSans 400 0 0 0 gpio_slow_sel[25] +port 352 nsew +flabel metal3 s -424 753592 56 753662 0 FreeSans 400 0 0 0 gpio_dm1[25] +port 616 nsew +flabel metal3 s -424 752396 56 752466 0 FreeSans 400 0 0 0 gpio_analog_en[25] +port 440 nsew +flabel metal3 s -424 751752 56 751822 0 FreeSans 400 0 0 0 gpio_dm0[25] +port 572 nsew +flabel metal3 s -424 751108 56 751178 0 FreeSans 400 0 0 0 gpio_analog_pol[25] +port 528 nsew +flabel metal3 s -424 750556 56 750626 0 FreeSans 400 0 0 0 gpio_inp_dis[25] +port 220 nsew +flabel metal3 s -424 748072 56 748142 0 FreeSans 400 0 0 0 gpio_analog_sel[25] +port 484 nsew +flabel metal3 s -424 747428 56 747498 0 FreeSans 400 0 0 0 gpio_dm2[25] +port 660 nsew +flabel metal3 s -424 746784 56 746854 0 FreeSans 400 0 0 0 gpio_holdover[25] +port 396 nsew +flabel metal3 s -424 746232 56 746302 0 FreeSans 400 0 0 0 gpio_out[25] +port 132 nsew +flabel metal3 s -424 744392 56 744462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] +port 308 nsew +flabel metal3 s -424 743748 56 743818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] +port 264 nsew +flabel metal3 s -424 743104 56 743174 0 FreeSans 400 0 0 0 gpio_oeb[25] +port 176 nsew +flabel metal3 s -424 742552 56 742622 0 FreeSans 400 0 0 0 gpio_in_h[25] +port 748 nsew +flabel metal3 s -424 714072 56 714142 0 FreeSans 400 0 0 0 gpio_in[26] +port 703 nsew +flabel metal3 s -424 712232 56 712302 0 FreeSans 400 0 0 0 gpio_slow_sel[26] +port 351 nsew +flabel metal3 s -424 710392 56 710462 0 FreeSans 400 0 0 0 gpio_dm1[26] +port 615 nsew +flabel metal3 s -424 709196 56 709266 0 FreeSans 400 0 0 0 gpio_analog_en[26] port 439 nsew -flabel metal3 s -424 707909 56 707979 0 FreeSans 400 0 0 0 gpio_analog_pol[26] +flabel metal3 s -424 708552 56 708622 0 FreeSans 400 0 0 0 gpio_dm0[26] +port 571 nsew +flabel metal3 s -424 707908 56 707978 0 FreeSans 400 0 0 0 gpio_analog_pol[26] port 527 nsew -flabel metal3 s -424 704873 56 704943 0 FreeSans 400 0 0 0 gpio_analog_sel[26] +flabel metal3 s -424 707356 56 707426 0 FreeSans 400 0 0 0 gpio_inp_dis[26] +port 219 nsew +flabel metal3 s -424 704872 56 704942 0 FreeSans 400 0 0 0 gpio_analog_sel[26] port 483 nsew -flabel metal3 s -424 708553 56 708623 0 FreeSans 400 0 0 0 gpio_dm0[26] -port 571 nsew -flabel metal3 s -424 710393 56 710463 0 FreeSans 400 0 0 0 gpio_dm1[26] -port 615 nsew -flabel metal3 s -424 704229 56 704299 0 FreeSans 400 0 0 0 gpio_dm2[26] +flabel metal3 s -424 704228 56 704298 0 FreeSans 400 0 0 0 gpio_dm2[26] port 659 nsew -flabel metal3 s -424 703585 56 703655 0 FreeSans 400 0 0 0 gpio_holdover[26] +flabel metal3 s -424 703584 56 703654 0 FreeSans 400 0 0 0 gpio_holdover[26] port 395 nsew -flabel metal3 s -424 700549 56 700619 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] -port 263 nsew -flabel metal3 s -424 707357 56 707427 0 FreeSans 400 0 0 0 gpio_inp_dis[26] -port 219 nsew -flabel metal3 s -424 699905 56 699975 0 FreeSans 400 0 0 0 gpio_oeb[26] -port 175 nsew -flabel metal3 s -424 703033 56 703103 0 FreeSans 400 0 0 0 gpio_out[26] +flabel metal3 s -424 703032 56 703102 0 FreeSans 400 0 0 0 gpio_out[26] port 131 nsew -flabel metal3 s -424 712233 56 712303 0 FreeSans 400 0 0 0 gpio_slow_sel[26] -port 351 nsew -flabel metal3 s -424 701193 56 701263 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] +flabel metal3 s -424 701192 56 701262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] port 307 nsew -flabel metal3 s -424 714073 56 714143 0 FreeSans 400 0 0 0 gpio_in[26] -port 703 nsew -flabel metal3 s -424 665997 56 666067 0 FreeSans 400 0 0 0 gpio_analog_en[27] -port 438 nsew -flabel metal3 s -424 664709 56 664779 0 FreeSans 400 0 0 0 gpio_analog_pol[27] -port 526 nsew -flabel metal3 s -424 661673 56 661743 0 FreeSans 400 0 0 0 gpio_analog_sel[27] -port 482 nsew -flabel metal3 s -424 665353 56 665423 0 FreeSans 400 0 0 0 gpio_dm0[27] -port 570 nsew -flabel metal3 s -424 667193 56 667263 0 FreeSans 400 0 0 0 gpio_dm1[27] -port 614 nsew -flabel metal3 s -424 661029 56 661099 0 FreeSans 400 0 0 0 gpio_dm2[27] -port 658 nsew -flabel metal3 s -424 660385 56 660455 0 FreeSans 400 0 0 0 gpio_holdover[27] -port 394 nsew -flabel metal3 s -424 657349 56 657419 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] -port 262 nsew -flabel metal3 s -424 664157 56 664227 0 FreeSans 400 0 0 0 gpio_inp_dis[27] -port 218 nsew -flabel metal3 s -424 656705 56 656775 0 FreeSans 400 0 0 0 gpio_oeb[27] -port 174 nsew -flabel metal3 s -424 659833 56 659903 0 FreeSans 400 0 0 0 gpio_out[27] -port 130 nsew -flabel metal3 s -424 669033 56 669103 0 FreeSans 400 0 0 0 gpio_slow_sel[27] -port 350 nsew -flabel metal3 s -424 657993 56 658063 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] -port 306 nsew -flabel metal3 s -424 670873 56 670943 0 FreeSans 400 0 0 0 gpio_in[27] -port 702 nsew -flabel metal3 s -424 622797 56 622867 0 FreeSans 400 0 0 0 gpio_analog_en[28] -port 437 nsew -flabel metal3 s -424 621509 56 621579 0 FreeSans 400 0 0 0 gpio_analog_pol[28] -port 525 nsew -flabel metal3 s -424 618473 56 618543 0 FreeSans 400 0 0 0 gpio_analog_sel[28] -port 481 nsew -flabel metal3 s -424 622153 56 622223 0 FreeSans 400 0 0 0 gpio_dm0[28] -port 569 nsew -flabel metal3 s -424 623993 56 624063 0 FreeSans 400 0 0 0 gpio_dm1[28] -port 613 nsew -flabel metal3 s -424 617829 56 617899 0 FreeSans 400 0 0 0 gpio_dm2[28] -port 657 nsew -flabel metal3 s -424 617185 56 617255 0 FreeSans 400 0 0 0 gpio_holdover[28] -port 393 nsew -flabel metal3 s -424 614149 56 614219 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] -port 261 nsew -flabel metal3 s -424 620957 56 621027 0 FreeSans 400 0 0 0 gpio_inp_dis[28] -port 217 nsew -flabel metal3 s -424 613505 56 613575 0 FreeSans 400 0 0 0 gpio_oeb[28] -port 173 nsew -flabel metal3 s -424 616633 56 616703 0 FreeSans 400 0 0 0 gpio_out[28] -port 129 nsew -flabel metal3 s -424 625833 56 625903 0 FreeSans 400 0 0 0 gpio_slow_sel[28] -port 349 nsew -flabel metal3 s -424 614793 56 614863 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] -port 305 nsew -flabel metal3 s -424 627673 56 627743 0 FreeSans 400 0 0 0 gpio_in[28] -port 701 nsew -flabel metal3 s -424 579597 56 579667 0 FreeSans 400 0 0 0 gpio_analog_en[29] -port 436 nsew -flabel metal3 s -424 578309 56 578379 0 FreeSans 400 0 0 0 gpio_analog_pol[29] -port 524 nsew -flabel metal3 s -424 575273 56 575343 0 FreeSans 400 0 0 0 gpio_analog_sel[29] -port 480 nsew -flabel metal3 s -424 578953 56 579023 0 FreeSans 400 0 0 0 gpio_dm0[29] -port 568 nsew -flabel metal3 s -424 580793 56 580863 0 FreeSans 400 0 0 0 gpio_dm1[29] -port 612 nsew -flabel metal3 s -424 574629 56 574699 0 FreeSans 400 0 0 0 gpio_dm2[29] -port 656 nsew -flabel metal3 s -424 573985 56 574055 0 FreeSans 400 0 0 0 gpio_holdover[29] -port 392 nsew -flabel metal3 s -424 570949 56 571019 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] -port 260 nsew -flabel metal3 s -424 577757 56 577827 0 FreeSans 400 0 0 0 gpio_inp_dis[29] -port 216 nsew -flabel metal3 s -424 570305 56 570375 0 FreeSans 400 0 0 0 gpio_oeb[29] -port 172 nsew -flabel metal3 s -424 573433 56 573503 0 FreeSans 400 0 0 0 gpio_out[29] -port 128 nsew -flabel metal3 s -424 582633 56 582703 0 FreeSans 400 0 0 0 gpio_slow_sel[29] -port 348 nsew -flabel metal3 s -424 571593 56 571663 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] -port 304 nsew -flabel metal3 s -424 584473 56 584543 0 FreeSans 400 0 0 0 gpio_in[29] -port 700 nsew -flabel metal3 s -424 536397 56 536467 0 FreeSans 400 0 0 0 gpio_analog_en[30] -port 435 nsew -flabel metal3 s -424 535109 56 535179 0 FreeSans 400 0 0 0 gpio_analog_pol[30] -port 523 nsew -flabel metal3 s -424 532073 56 532143 0 FreeSans 400 0 0 0 gpio_analog_sel[30] -port 479 nsew -flabel metal3 s -424 193993 56 194064 0 FreeSans 400 0 0 0 gpio_dm1[36] -port 605 nsew -flabel metal3 s -424 187829 56 187900 0 FreeSans 400 0 0 0 gpio_dm2[36] -port 649 nsew -flabel metal3 s -424 187185 56 187256 0 FreeSans 400 0 0 0 gpio_holdover[36] -port 385 nsew -flabel metal3 s -424 184149 56 184220 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] -port 253 nsew -flabel metal3 s -424 190957 56 191028 0 FreeSans 400 0 0 0 gpio_inp_dis[36] -port 209 nsew -flabel metal3 s -424 183505 56 183576 0 FreeSans 400 0 0 0 gpio_oeb[36] -port 165 nsew -flabel metal3 s -424 186633 56 186704 0 FreeSans 400 0 0 0 gpio_out[36] -port 121 nsew -flabel metal3 s -424 195833 56 195904 0 FreeSans 400 0 0 0 gpio_slow_sel[36] -port 341 nsew -flabel metal3 s -424 184793 56 184864 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] -port 297 nsew -flabel metal3 s -424 197673 56 197744 0 FreeSans 400 0 0 0 gpio_in[36] -port 693 nsew -flabel metal3 s -424 149597 56 149668 0 FreeSans 400 0 0 0 gpio_analog_en[37] +flabel metal3 s -424 700548 56 700618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] +port 263 nsew +flabel metal3 s -424 699904 56 699974 0 FreeSans 400 0 0 0 gpio_oeb[26] +port 175 nsew +flabel metal3 s -424 699352 56 699422 0 FreeSans 400 0 0 0 gpio_in_h[26] +port 747 nsew +flabel metal3 s -424 141592 56 141662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] +port 296 nsew +flabel metal3 s -424 149596 56 149666 0 FreeSans 400 0 0 0 gpio_analog_en[37] port 428 nsew -flabel metal3 s -424 148309 56 148380 0 FreeSans 400 0 0 0 gpio_analog_pol[37] +flabel metal3 s -424 148308 56 148378 0 FreeSans 400 0 0 0 gpio_analog_pol[37] port 516 nsew -flabel metal3 s -424 145273 56 145344 0 FreeSans 400 0 0 0 gpio_analog_sel[37] +flabel metal3 s -424 145272 56 145342 0 FreeSans 400 0 0 0 gpio_analog_sel[37] port 472 nsew -flabel metal3 s -424 148953 56 149024 0 FreeSans 400 0 0 0 gpio_dm0[37] +flabel metal3 s -424 148952 56 149022 0 FreeSans 400 0 0 0 gpio_dm0[37] port 560 nsew -flabel metal3 s -424 150793 56 150864 0 FreeSans 400 0 0 0 gpio_dm1[37] -port 604 nsew -flabel metal3 s -424 144629 56 144700 0 FreeSans 400 0 0 0 gpio_dm2[37] +flabel metal3 s -424 144628 56 144698 0 FreeSans 400 0 0 0 gpio_dm2[37] port 648 nsew -flabel metal3 s -424 143985 56 144056 0 FreeSans 400 0 0 0 gpio_holdover[37] +flabel metal3 s -424 143984 56 144054 0 FreeSans 400 0 0 0 gpio_holdover[37] port 384 nsew -flabel metal3 s -424 140949 56 141020 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] +flabel metal3 s -424 140948 56 141018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] port 252 nsew -flabel metal3 s -424 140305 56 140376 0 FreeSans 400 0 0 0 gpio_oeb[37] +flabel metal3 s -424 140304 56 140374 0 FreeSans 400 0 0 0 gpio_oeb[37] port 164 nsew -flabel metal3 s -424 143433 56 143504 0 FreeSans 400 0 0 0 gpio_out[37] +flabel metal3 s -424 143432 56 143502 0 FreeSans 400 0 0 0 gpio_out[37] port 120 nsew -flabel metal3 s -424 152633 56 152704 0 FreeSans 400 0 0 0 gpio_slow_sel[37] +flabel metal3 s -424 147756 56 147826 0 FreeSans 400 0 0 0 gpio_inp_dis[37] +port 208 nsew +flabel metal3 s -424 139752 56 139822 0 FreeSans 400 0 0 0 gpio_in_h[37] +port 736 nsew +flabel metal3 s -424 150792 56 150862 0 FreeSans 400 0 0 0 gpio_dm1[37] +port 604 nsew +flabel metal3 s -424 152632 56 152702 0 FreeSans 400 0 0 0 gpio_slow_sel[37] port 340 nsew -flabel metal3 s -424 154473 56 154544 0 FreeSans 400 0 0 0 gpio_in[37] +flabel metal3 s -424 154472 56 154542 0 FreeSans 400 0 0 0 gpio_in[37] port 692 nsew -flabel metal3 s -424 365597 56 365667 0 FreeSans 400 0 0 0 gpio_analog_en[32] -port 433 nsew -flabel metal3 s -424 364309 56 364379 0 FreeSans 400 0 0 0 gpio_analog_pol[32] -port 521 nsew -flabel metal3 s -424 361273 56 361343 0 FreeSans 400 0 0 0 gpio_analog_sel[32] -port 477 nsew -flabel metal3 s -424 364953 56 365023 0 FreeSans 400 0 0 0 gpio_dm0[32] -port 565 nsew -flabel metal3 s -424 366793 56 366863 0 FreeSans 400 0 0 0 gpio_dm1[32] -port 609 nsew -flabel metal3 s -424 360629 56 360699 0 FreeSans 400 0 0 0 gpio_dm2[32] -port 653 nsew -flabel metal3 s -424 359985 56 360055 0 FreeSans 400 0 0 0 gpio_holdover[32] -port 389 nsew -flabel metal3 s -424 356949 56 357019 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] -port 257 nsew -flabel metal3 s -424 363757 56 363827 0 FreeSans 400 0 0 0 gpio_inp_dis[32] -port 213 nsew -flabel metal3 s -424 356305 56 356375 0 FreeSans 400 0 0 0 gpio_oeb[32] -port 169 nsew -flabel metal3 s -424 359433 56 359503 0 FreeSans 400 0 0 0 gpio_out[32] -port 125 nsew -flabel metal3 s -424 368633 56 368703 0 FreeSans 400 0 0 0 gpio_slow_sel[32] -port 345 nsew -flabel metal3 s -424 357593 56 357663 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] -port 301 nsew -flabel metal3 s -424 370473 56 370543 0 FreeSans 400 0 0 0 gpio_in[32] -port 697 nsew -flabel metal3 s -424 322397 56 322467 0 FreeSans 400 0 0 0 gpio_analog_en[33] -port 432 nsew -flabel metal3 s -424 318073 56 318143 0 FreeSans 400 0 0 0 gpio_analog_sel[33] -port 476 nsew -flabel metal3 s -424 323593 56 323663 0 FreeSans 400 0 0 0 gpio_dm1[33] -port 608 nsew -flabel metal3 s -424 317429 56 317499 0 FreeSans 400 0 0 0 gpio_dm2[33] -port 652 nsew -flabel metal3 s -424 321753 56 321823 0 FreeSans 400 0 0 0 gpio_dm0[33] -port 564 nsew -flabel metal3 s -424 316785 56 316855 0 FreeSans 400 0 0 0 gpio_holdover[33] -port 388 nsew -flabel metal3 s -424 313749 56 313819 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] -port 256 nsew -flabel metal3 s -424 320557 56 320627 0 FreeSans 400 0 0 0 gpio_inp_dis[33] -port 212 nsew -flabel metal3 s -424 313105 56 313175 0 FreeSans 400 0 0 0 gpio_oeb[33] -port 168 nsew -flabel metal3 s -424 316233 56 316303 0 FreeSans 400 0 0 0 gpio_out[33] -port 124 nsew -flabel metal3 s -424 325433 56 325503 0 FreeSans 400 0 0 0 gpio_slow_sel[33] -port 344 nsew -flabel metal3 s -424 314393 56 314463 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] -port 300 nsew -flabel metal3 s -424 327273 56 327343 0 FreeSans 400 0 0 0 gpio_in[33] -port 696 nsew -flabel metal3 s -424 279197 56 279267 0 FreeSans 400 0 0 0 gpio_analog_en[34] -port 431 nsew -flabel metal3 s -424 277909 56 277979 0 FreeSans 400 0 0 0 gpio_analog_pol[34] -port 519 nsew -flabel metal3 s -424 274873 56 274943 0 FreeSans 400 0 0 0 gpio_analog_sel[34] -port 475 nsew -flabel metal3 s -424 278553 56 278623 0 FreeSans 400 0 0 0 gpio_dm0[34] -port 563 nsew -flabel metal3 s -424 280393 56 280463 0 FreeSans 400 0 0 0 gpio_dm1[34] -port 607 nsew -flabel metal3 s -424 274229 56 274299 0 FreeSans 400 0 0 0 gpio_dm2[34] -port 651 nsew -flabel metal3 s -424 273585 56 273655 0 FreeSans 400 0 0 0 gpio_holdover[34] -port 387 nsew -flabel metal3 s -424 270549 56 270619 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] -port 255 nsew -flabel metal3 s -424 277357 56 277427 0 FreeSans 400 0 0 0 gpio_inp_dis[34] -port 211 nsew -flabel metal3 s -424 269905 56 269975 0 FreeSans 400 0 0 0 gpio_oeb[34] -port 167 nsew -flabel metal3 s -424 273033 56 273103 0 FreeSans 400 0 0 0 gpio_out[34] -port 123 nsew -flabel metal3 s -424 282233 56 282303 0 FreeSans 400 0 0 0 gpio_slow_sel[34] -port 343 nsew -flabel metal3 s -424 271193 56 271263 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] -port 299 nsew -flabel metal3 s -424 284073 56 284143 0 FreeSans 400 0 0 0 gpio_in[34] -port 695 nsew -flabel metal3 s -424 235997 56 236067 0 FreeSans 400 0 0 0 gpio_analog_en[35] +flabel metal3 s -424 187828 56 187898 0 FreeSans 400 0 0 0 gpio_dm2[36] +port 649 nsew +flabel metal3 s -424 187184 56 187254 0 FreeSans 400 0 0 0 gpio_holdover[36] +port 385 nsew +flabel metal3 s -424 184148 56 184218 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] +port 253 nsew +flabel metal3 s -424 190956 56 191026 0 FreeSans 400 0 0 0 gpio_inp_dis[36] +port 209 nsew +flabel metal3 s -424 183504 56 183574 0 FreeSans 400 0 0 0 gpio_oeb[36] +port 165 nsew +flabel metal3 s -424 186632 56 186702 0 FreeSans 400 0 0 0 gpio_out[36] +port 121 nsew +flabel metal3 s -424 184792 56 184862 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] +port 297 nsew +flabel metal3 s -424 192796 56 192866 0 FreeSans 400 0 0 0 gpio_analog_en[36] +port 429 nsew +flabel metal3 s -424 191508 56 191578 0 FreeSans 400 0 0 0 gpio_analog_pol[36] +port 517 nsew +flabel metal3 s -424 188472 56 188542 0 FreeSans 400 0 0 0 gpio_analog_sel[36] +port 473 nsew +flabel metal3 s -424 192152 56 192222 0 FreeSans 400 0 0 0 gpio_dm0[36] +port 561 nsew +flabel metal3 s -424 182952 56 183022 0 FreeSans 400 0 0 0 gpio_in_h[36] +port 737 nsew +flabel metal3 s -424 193992 56 194062 0 FreeSans 400 0 0 0 gpio_dm1[36] +port 605 nsew +flabel metal3 s -424 195832 56 195902 0 FreeSans 400 0 0 0 gpio_slow_sel[36] +port 341 nsew +flabel metal3 s -424 197672 56 197742 0 FreeSans 400 0 0 0 gpio_in[36] +port 693 nsew +flabel metal3 s -424 235996 56 236066 0 FreeSans 400 0 0 0 gpio_analog_en[35] port 430 nsew -flabel metal3 s -424 234709 56 234779 0 FreeSans 400 0 0 0 gpio_analog_pol[35] +flabel metal3 s -424 234708 56 234778 0 FreeSans 400 0 0 0 gpio_analog_pol[35] port 518 nsew -flabel metal3 s -424 231673 56 231743 0 FreeSans 400 0 0 0 gpio_analog_sel[35] +flabel metal3 s -424 231672 56 231742 0 FreeSans 400 0 0 0 gpio_analog_sel[35] port 474 nsew -flabel metal3 s -424 235353 56 235423 0 FreeSans 400 0 0 0 gpio_dm0[35] +flabel metal3 s -424 235352 56 235422 0 FreeSans 400 0 0 0 gpio_dm0[35] port 562 nsew -flabel metal3 s -424 237193 56 237263 0 FreeSans 400 0 0 0 gpio_dm1[35] -port 606 nsew -flabel metal3 s -424 231029 56 231099 0 FreeSans 400 0 0 0 gpio_dm2[35] +flabel metal3 s -424 231028 56 231098 0 FreeSans 400 0 0 0 gpio_dm2[35] port 650 nsew -flabel metal3 s -424 230385 56 230455 0 FreeSans 400 0 0 0 gpio_holdover[35] +flabel metal3 s -424 230384 56 230454 0 FreeSans 400 0 0 0 gpio_holdover[35] port 386 nsew -flabel metal3 s -424 227349 56 227419 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] +flabel metal3 s -424 227348 56 227418 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] port 254 nsew -flabel metal3 s -424 234157 56 234227 0 FreeSans 400 0 0 0 gpio_inp_dis[35] +flabel metal3 s -424 234156 56 234226 0 FreeSans 400 0 0 0 gpio_inp_dis[35] port 210 nsew -flabel metal3 s -424 226705 56 226775 0 FreeSans 400 0 0 0 gpio_oeb[35] +flabel metal3 s -424 226704 56 226774 0 FreeSans 400 0 0 0 gpio_oeb[35] port 166 nsew -flabel metal3 s -424 229833 56 229903 0 FreeSans 400 0 0 0 gpio_out[35] +flabel metal3 s -424 229832 56 229902 0 FreeSans 400 0 0 0 gpio_out[35] port 122 nsew -flabel metal3 s -424 239033 56 239103 0 FreeSans 400 0 0 0 gpio_slow_sel[35] -port 342 nsew -flabel metal3 s -424 227993 56 228063 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] +flabel metal3 s -424 227992 56 228062 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] port 298 nsew -flabel metal3 s -424 240873 56 240943 0 FreeSans 400 0 0 0 gpio_in[35] +flabel metal3 s -424 226152 56 226222 0 FreeSans 400 0 0 0 gpio_in_h[35] +port 738 nsew +flabel metal3 s -424 237192 56 237262 0 FreeSans 400 0 0 0 gpio_dm1[35] +port 606 nsew +flabel metal3 s -424 239032 56 239102 0 FreeSans 400 0 0 0 gpio_slow_sel[35] +port 342 nsew +flabel metal3 s -424 240872 56 240942 0 FreeSans 400 0 0 0 gpio_in[35] port 694 nsew -flabel metal3 s -424 192797 56 192868 0 FreeSans 400 0 0 0 gpio_analog_en[36] -port 429 nsew -flabel metal3 s -424 191509 56 191580 0 FreeSans 400 0 0 0 gpio_analog_pol[36] -port 517 nsew -flabel metal3 s -424 188473 56 188544 0 FreeSans 400 0 0 0 gpio_analog_sel[36] -port 473 nsew -flabel metal3 s -424 192153 56 192224 0 FreeSans 400 0 0 0 gpio_dm0[36] -port 561 nsew -flabel metal3 s -424 147757 56 147828 0 FreeSans 400 0 0 0 gpio_inp_dis[37] -port 208 nsew -flabel metal3 s -424 742553 56 742623 0 FreeSans 400 0 0 0 gpio_in_h[25] -port 748 nsew -flabel metal3 s -424 699353 56 699423 0 FreeSans 400 0 0 0 gpio_in_h[26] -port 747 nsew -flabel metal3 s -424 656153 56 656223 0 FreeSans 400 0 0 0 gpio_in_h[27] -port 746 nsew -flabel metal3 s -424 612953 56 613023 0 FreeSans 400 0 0 0 gpio_in_h[28] -port 745 nsew -flabel metal3 s -424 569753 56 569823 0 FreeSans 400 0 0 0 gpio_in_h[29] -port 744 nsew -flabel metal3 s -424 526553 56 526623 0 FreeSans 400 0 0 0 gpio_in_h[30] -port 743 nsew -flabel metal3 s -424 483353 56 483423 0 FreeSans 400 0 0 0 gpio_in_h[31] -port 742 nsew -flabel metal3 s -424 355753 56 355823 0 FreeSans 400 0 0 0 gpio_in_h[32] -port 741 nsew -flabel metal3 s -424 312553 56 312623 0 FreeSans 400 0 0 0 gpio_in_h[33] -port 740 nsew -flabel metal3 s -424 269353 56 269423 0 FreeSans 400 0 0 0 gpio_in_h[34] +flabel metal3 s -424 279196 56 279266 0 FreeSans 400 0 0 0 gpio_analog_en[34] +port 431 nsew +flabel metal3 s -424 277908 56 277978 0 FreeSans 400 0 0 0 gpio_analog_pol[34] +port 519 nsew +flabel metal3 s -424 274872 56 274942 0 FreeSans 400 0 0 0 gpio_analog_sel[34] +port 475 nsew +flabel metal3 s -424 278552 56 278622 0 FreeSans 400 0 0 0 gpio_dm0[34] +port 563 nsew +flabel metal3 s -424 274228 56 274298 0 FreeSans 400 0 0 0 gpio_dm2[34] +port 651 nsew +flabel metal3 s -424 273584 56 273654 0 FreeSans 400 0 0 0 gpio_holdover[34] +port 387 nsew +flabel metal3 s -424 270548 56 270618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] +port 255 nsew +flabel metal3 s -424 277356 56 277426 0 FreeSans 400 0 0 0 gpio_inp_dis[34] +port 211 nsew +flabel metal3 s -424 269904 56 269974 0 FreeSans 400 0 0 0 gpio_oeb[34] +port 167 nsew +flabel metal3 s -424 273032 56 273102 0 FreeSans 400 0 0 0 gpio_out[34] +port 123 nsew +flabel metal3 s -424 271192 56 271262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] +port 299 nsew +flabel metal3 s -424 269352 56 269422 0 FreeSans 400 0 0 0 gpio_in_h[34] port 739 nsew -flabel metal3 s -424 226153 56 226223 0 FreeSans 400 0 0 0 gpio_in_h[35] -port 738 nsew -flabel metal3 s -424 182953 56 183024 0 FreeSans 400 0 0 0 gpio_in_h[36] -port 737 nsew -flabel metal3 s -424 139753 56 139824 0 FreeSans 400 0 0 0 gpio_in_h[37] -port 736 nsew -flabel metal3 s -424 754789 56 754859 0 FreeSans 400 0 0 0 analog_io[25] -port 880 nsew -flabel metal3 s -424 711589 56 711659 0 FreeSans 400 0 0 0 analog_io[26] -port 879 nsew -flabel metal3 s -424 668389 56 668459 0 FreeSans 400 0 0 0 analog_io[27] -port 878 nsew -flabel metal3 s -424 625189 56 625259 0 FreeSans 400 0 0 0 analog_io[28] -port 877 nsew -flabel metal3 s -424 581989 56 582059 0 FreeSans 400 0 0 0 analog_io[29] -port 876 nsew -flabel metal3 s -424 538789 56 538859 0 FreeSans 400 0 0 0 analog_io[30] -port 875 nsew -flabel metal3 s -424 495589 56 495659 0 FreeSans 400 0 0 0 analog_io[31] -port 874 nsew -flabel metal3 s -424 367989 56 368059 0 FreeSans 400 0 0 0 analog_io[32] -port 873 nsew -flabel metal3 s -424 324789 56 324859 0 FreeSans 400 0 0 0 analog_io[33] -port 872 nsew -flabel metal3 s -424 281589 56 281659 0 FreeSans 400 0 0 0 analog_io[34] -port 871 nsew -flabel metal3 s -424 238389 56 238459 0 FreeSans 400 0 0 0 analog_io[35] -port 870 nsew -flabel metal3 s -424 195189 56 195260 0 FreeSans 400 0 0 0 analog_io[36] -port 869 nsew -flabel metal3 s -424 151989 56 152060 0 FreeSans 400 0 0 0 analog_io[37] -port 868 nsew -flabel metal3 s -424 752949 56 753019 0 FreeSans 400 0 0 0 analog_noesd_io[25] -port 924 nsew -flabel metal3 s -424 709749 56 709819 0 FreeSans 400 0 0 0 analog_noesd_io[26] -port 923 nsew -flabel metal3 s -424 666549 56 666619 0 FreeSans 400 0 0 0 analog_noesd_io[27] -port 922 nsew -flabel metal3 s -424 623349 56 623419 0 FreeSans 400 0 0 0 analog_noesd_io[28] -port 921 nsew -flabel metal3 s -424 580149 56 580219 0 FreeSans 400 0 0 0 analog_noesd_io[29] -port 920 nsew -flabel metal3 s -424 536949 56 537019 0 FreeSans 400 0 0 0 analog_noesd_io[30] -port 919 nsew -flabel metal3 s -424 493749 56 493819 0 FreeSans 400 0 0 0 analog_noesd_io[31] -port 918 nsew -flabel metal3 s -424 366149 56 366219 0 FreeSans 400 0 0 0 analog_noesd_io[32] -port 917 nsew -flabel metal3 s -424 322949 56 323019 0 FreeSans 400 0 0 0 analog_noesd_io[33] -port 916 nsew -flabel metal3 s -424 279749 56 279819 0 FreeSans 400 0 0 0 analog_noesd_io[34] -port 915 nsew -flabel metal3 s -424 236549 56 236619 0 FreeSans 400 0 0 0 analog_noesd_io[35] -port 914 nsew -flabel metal3 s -424 193349 56 193420 0 FreeSans 400 0 0 0 analog_noesd_io[36] -port 913 nsew -flabel metal3 s -424 150149 56 150220 0 FreeSans 400 0 0 0 analog_noesd_io[37] -port 912 nsew -flabel metal3 s -424 744393 56 744463 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] -port 308 nsew -flabel metal3 s -424 321109 56 321179 0 FreeSans 400 0 0 0 gpio_analog_pol[33] +flabel metal3 s -424 280392 56 280462 0 FreeSans 400 0 0 0 gpio_dm1[34] +port 607 nsew +flabel metal3 s -424 282232 56 282302 0 FreeSans 400 0 0 0 gpio_slow_sel[34] +port 343 nsew +flabel metal3 s -424 284072 56 284142 0 FreeSans 400 0 0 0 gpio_in[34] +port 695 nsew +flabel metal3 s -424 322396 56 322466 0 FreeSans 400 0 0 0 gpio_analog_en[33] +port 432 nsew +flabel metal3 s -424 318072 56 318142 0 FreeSans 400 0 0 0 gpio_analog_sel[33] +port 476 nsew +flabel metal3 s -424 317428 56 317498 0 FreeSans 400 0 0 0 gpio_dm2[33] +port 652 nsew +flabel metal3 s -424 321752 56 321822 0 FreeSans 400 0 0 0 gpio_dm0[33] +port 564 nsew +flabel metal3 s -424 316784 56 316854 0 FreeSans 400 0 0 0 gpio_holdover[33] +port 388 nsew +flabel metal3 s -424 313748 56 313818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] +port 256 nsew +flabel metal3 s -424 320556 56 320626 0 FreeSans 400 0 0 0 gpio_inp_dis[33] +port 212 nsew +flabel metal3 s -424 313104 56 313174 0 FreeSans 400 0 0 0 gpio_oeb[33] +port 168 nsew +flabel metal3 s -424 316232 56 316302 0 FreeSans 400 0 0 0 gpio_out[33] +port 124 nsew +flabel metal3 s -424 314392 56 314462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] +port 300 nsew +flabel metal3 s -424 312552 56 312622 0 FreeSans 400 0 0 0 gpio_in_h[33] +port 740 nsew +flabel metal3 s -424 321108 56 321178 0 FreeSans 400 0 0 0 gpio_analog_pol[33] port 520 nsew -flabel metal3 -264 906644 56 906704 0 FreeSans 400 0 0 0 gpio_loopback_one[24] -port 837 nsew -flabel metal3 -264 736644 56 736704 0 FreeSans 400 0 0 0 gpio_loopback_one[25] -port 836 nsew -flabel metal3 -264 693644 56 693704 0 FreeSans 400 0 0 0 gpio_loopback_one[26] -port 835 nsew -flabel metal3 -264 650644 56 650704 0 FreeSans 400 0 0 0 gpio_loopback_one[27] -port 834 nsew -flabel metal3 -264 607644 56 607704 0 FreeSans 400 0 0 0 gpio_loopback_one[28] -port 833 nsew -flabel metal3 -264 564644 56 564704 0 FreeSans 400 0 0 0 gpio_loopback_one[29] -port 832 nsew -flabel metal3 -264 521644 56 521704 0 FreeSans 400 0 0 0 gpio_loopback_one[30] -port 831 nsew -flabel metal3 -264 478644 56 478704 0 FreeSans 400 0 0 0 gpio_loopback_one[31] -port 830 nsew -flabel metal3 -264 349644 56 349704 0 FreeSans 400 0 0 0 gpio_loopback_one[32] -port 829 nsew -flabel metal3 -264 306644 56 306704 0 FreeSans 400 0 0 0 gpio_loopback_one[33] -port 828 nsew -flabel metal3 -264 263644 56 263704 0 FreeSans 400 0 0 0 gpio_loopback_one[34] -port 827 nsew -flabel metal3 -264 220644 56 220704 0 FreeSans 400 0 0 0 gpio_loopback_one[35] -port 826 nsew -flabel metal3 -264 177644 56 177704 0 FreeSans 400 0 0 0 gpio_loopback_one[36] -port 825 nsew -flabel metal3 -264 134644 56 134704 0 FreeSans 400 0 0 0 gpio_loopback_one[37] -port 824 nsew -flabel metal2 s 488380 -260 488432 56 0 FreeSans 400 90 0 0 gpio_loopback_one[43] -port 818 nsew -flabel metal2 s 492635 -260 492687 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[43] -port 774 nsew -flabel metal2 s 433580 -260 433632 56 0 FreeSans 400 90 0 0 gpio_loopback_one[42] -port 819 nsew -flabel metal2 s 437778 -260 437830 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[42] -port 775 nsew -flabel metal2 s 378780 -260 378832 56 0 FreeSans 400 90 0 0 gpio_loopback_one[41] -port 820 nsew -flabel metal2 s 382978 -260 383030 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[41] -port 776 nsew -flabel metal2 s 323980 -260 324032 56 0 FreeSans 400 90 0 0 gpio_loopback_one[40] -port 821 nsew -flabel metal2 s 328165 -282 328217 34 0 FreeSans 400 90 0 0 gpio_loopback_zero[40] -port 777 nsew -flabel metal2 s 269180 -260 269232 56 0 FreeSans 400 90 0 0 gpio_loopback_one[39] -port 822 nsew -flabel metal2 s 273360 -260 273412 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[39] -port 778 nsew -flabel metal2 s 160580 -260 160632 56 0 FreeSans 400 90 0 0 gpio_loopback_one[38] -port 823 nsew -flabel metal2 s 163791 -259 163843 57 0 FreeSans 400 90 0 0 gpio_loopback_zero[38] -port 779 nsew -flabel metal2 s 110164 -116 110220 56 0 FreeSans 400 90 0 0 resetb_l -port 37 nsew -flabel metal2 s 99571 -90 99637 56 0 FreeSans 400 90 0 0 resetb_h -port 36 nsew -flabel metal3 -283 53372 56 53442 0 FreeSans 400 0 0 0 por_l -port 35 nsew -flabel metal3 -283 53595 56 53665 0 FreeSans 400 0 0 0 porb_l -port 34 nsew -flabel metal2 s 605082 -260 605134 56 0 FreeSans 400 90 0 0 mask_rev[0] -port 69 nsew -flabel metal3 -283 53147 56 53217 0 FreeSans 400 0 0 0 porb_h -port 33 nsew -flabel metal2 578298 953270 578359 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[15] -port 846 nsew -flabel metal2 478898 953270 478959 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[16] -port 845 nsew -flabel metal2 427698 953270 427759 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[17] -port 844 nsew -flabel metal2 338698 953270 338759 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[18] -port 843 nsew -flabel metal2 234298 953270 234359 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[19] -port 842 nsew -flabel metal2 183098 953270 183159 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[20] -port 841 nsew -flabel metal2 131898 953270 131959 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[21] -port 840 nsew -flabel metal2 80698 953270 80759 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[22] -port 839 nsew -flabel metal2 29498 953270 29559 953590 0 FreeSans 400 90 0 0 gpio_loopback_one[23] -port 838 nsew -flabel metal3 633270 927005 633590 927067 0 FreeSans 400 0 0 0 gpio_loopback_one[14] -port 847 nsew -flabel metal3 633270 837005 633590 837067 0 FreeSans 400 0 0 0 gpio_loopback_one[13] -port 848 nsew -flabel metal3 633270 748005 633590 748067 0 FreeSans 400 0 0 0 gpio_loopback_one[12] -port 849 nsew -flabel metal3 633270 703005 633590 703067 0 FreeSans 400 0 0 0 gpio_loopback_one[11] -port 850 nsew -flabel metal3 633270 658005 633590 658067 0 FreeSans 400 0 0 0 gpio_loopback_one[10] -port 851 nsew -flabel metal3 633270 613005 633590 613067 0 FreeSans 400 0 0 0 gpio_loopback_one[9] -port 852 nsew -flabel metal3 633270 568005 633590 568067 0 FreeSans 400 0 0 0 gpio_loopback_one[8] -port 853 nsew -flabel metal3 633270 523005 633590 523067 0 FreeSans 400 0 0 0 gpio_loopback_one[7] -port 854 nsew -flabel metal3 633270 346005 633590 346067 0 FreeSans 400 0 0 0 gpio_loopback_one[6] -port 855 nsew -flabel metal3 633270 301005 633590 301067 0 FreeSans 400 0 0 0 gpio_loopback_one[5] -port 856 nsew -flabel metal3 633270 256005 633590 256067 0 FreeSans 400 0 0 0 gpio_loopback_one[4] -port 857 nsew -flabel metal3 633270 211005 633590 211067 0 FreeSans 400 0 0 0 gpio_loopback_one[3] -port 858 nsew -flabel metal3 633270 166005 633590 166067 0 FreeSans 400 0 0 0 gpio_loopback_one[2] -port 859 nsew -flabel metal3 633270 121005 633590 121067 0 FreeSans 400 0 0 0 gpio_loopback_one[1] -port 860 nsew -flabel metal3 633270 76005 633590 76067 0 FreeSans 400 0 0 0 gpio_loopback_one[0] -port 861 nsew -flabel metal2 s 605978 -260 606030 56 0 FreeSans 400 90 0 0 mask_rev[4] -port 65 nsew -flabel metal2 s 606202 -260 606254 56 0 FreeSans 400 90 0 0 mask_rev[5] -port 64 nsew -flabel metal2 s 606426 -260 606478 56 0 FreeSans 400 90 0 0 mask_rev[6] -port 63 nsew -flabel metal2 s 606650 -260 606702 56 0 FreeSans 400 90 0 0 mask_rev[7] -port 62 nsew -flabel metal2 s 606874 -260 606926 56 0 FreeSans 400 90 0 0 mask_rev[8] -port 61 nsew -flabel metal2 s 607098 -260 607150 56 0 FreeSans 400 90 0 0 mask_rev[9] -port 60 nsew -flabel metal2 s 607322 -260 607374 56 0 FreeSans 400 90 0 0 mask_rev[10] -port 59 nsew -flabel metal2 s 607546 -260 607598 56 0 FreeSans 400 90 0 0 mask_rev[11] -port 58 nsew -flabel metal2 s 607770 -260 607822 56 0 FreeSans 400 90 0 0 mask_rev[12] -port 57 nsew -flabel metal2 s 607994 -260 608046 56 0 FreeSans 400 90 0 0 mask_rev[13] -port 56 nsew -flabel metal2 s 608218 -260 608270 56 0 FreeSans 400 90 0 0 mask_rev[14] -port 55 nsew -flabel metal2 s 608442 -260 608494 56 0 FreeSans 400 90 0 0 mask_rev[15] -port 54 nsew -flabel metal2 s 608666 -260 608718 56 0 FreeSans 400 90 0 0 mask_rev[16] -port 53 nsew -flabel metal2 s 608890 -260 608942 56 0 FreeSans 400 90 0 0 mask_rev[17] -port 52 nsew -flabel metal2 s 609114 -260 609166 56 0 FreeSans 400 90 0 0 mask_rev[18] -port 51 nsew -flabel metal2 s 609338 -260 609390 56 0 FreeSans 400 90 0 0 mask_rev[19] -port 50 nsew -flabel metal2 s 609562 -260 609614 56 0 FreeSans 400 90 0 0 mask_rev[20] -port 49 nsew -flabel metal2 s 609786 -260 609838 56 0 FreeSans 400 90 0 0 mask_rev[21] -port 48 nsew -flabel metal2 s 610010 -260 610062 56 0 FreeSans 400 90 0 0 mask_rev[22] -port 47 nsew -flabel metal2 s 610234 -260 610286 56 0 FreeSans 400 90 0 0 mask_rev[23] -port 46 nsew -flabel metal2 s 610458 -260 610510 56 0 FreeSans 400 90 0 0 mask_rev[24] -port 45 nsew -flabel metal2 s 610682 -260 610734 56 0 FreeSans 400 90 0 0 mask_rev[25] -port 44 nsew -flabel metal2 s 610906 -260 610958 56 0 FreeSans 400 90 0 0 mask_rev[26] -port 43 nsew -flabel metal2 s 611130 -260 611182 56 0 FreeSans 400 90 0 0 mask_rev[27] -port 42 nsew -flabel metal2 s 611354 -260 611406 56 0 FreeSans 400 90 0 0 mask_rev[28] -port 41 nsew -flabel metal2 s 611578 -260 611630 56 0 FreeSans 400 90 0 0 mask_rev[29] -port 40 nsew -flabel metal2 s 611802 -260 611854 56 0 FreeSans 400 90 0 0 mask_rev[30] -port 39 nsew -flabel metal2 s 612026 -260 612078 56 0 FreeSans 400 90 0 0 mask_rev[31] -port 38 nsew -flabel metal2 s 605754 -260 605806 56 0 FreeSans 400 90 0 0 mask_rev[3] -port 66 nsew -flabel metal2 s 605530 -260 605582 56 0 FreeSans 400 90 0 0 mask_rev[2] -port 67 nsew -flabel metal2 s 605306 -260 605358 56 0 FreeSans 400 90 0 0 mask_rev[1] -port 68 nsew -flabel metal3 633270 78007 633590 78069 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] -port 817 nsew -flabel metal3 633270 123007 633590 123069 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] -port 816 nsew -flabel metal3 633270 168007 633590 168069 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] -port 815 nsew -flabel metal3 633270 213007 633590 213069 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] -port 814 nsew -flabel metal3 633270 258007 633590 258069 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] -port 813 nsew -flabel metal3 633270 303007 633590 303069 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] -port 812 nsew -flabel metal3 633270 348007 633590 348069 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] -port 811 nsew -flabel metal3 633270 525007 633590 525069 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] -port 810 nsew -flabel metal3 633270 570007 633590 570069 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] -port 809 nsew -flabel metal3 633270 615007 633590 615069 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] -port 808 nsew -flabel metal3 633270 660007 633590 660069 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] -port 807 nsew -flabel metal3 633270 705007 633590 705069 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] -port 806 nsew -flabel metal3 633270 750007 633590 750069 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] -port 805 nsew -flabel metal3 633270 839007 633590 839069 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] -port 804 nsew -flabel metal3 633270 929007 633590 929069 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] -port 803 nsew -flabel metal3 -264 734644 56 734704 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] -port 792 nsew -flabel metal3 -264 648644 56 648704 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] -port 790 nsew -flabel metal3 -264 562644 56 562704 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] -port 788 nsew -flabel metal3 -264 476644 56 476704 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] -port 786 nsew -flabel metal3 -264 304644 56 304704 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] -port 784 nsew -flabel metal3 -264 218644 56 218704 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] -port 782 nsew -flabel metal3 -264 132644 56 132704 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] -port 780 nsew -flabel metal3 -264 904644 56 904704 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] -port 793 nsew -flabel metal3 -264 691644 56 691704 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] -port 791 nsew -flabel metal3 -264 605644 56 605704 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] -port 789 nsew -flabel metal3 -264 519644 56 519704 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] -port 787 nsew -flabel metal3 -264 347644 56 347704 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] -port 785 nsew -flabel metal3 -264 261644 56 261704 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] -port 783 nsew -flabel metal3 -264 175644 56 175704 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] -port 781 nsew -flabel metal2 27497 953270 27558 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[23] -port 794 nsew -flabel metal2 78697 953270 78758 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[22] -port 795 nsew -flabel metal2 129897 953270 129958 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[21] -port 796 nsew -flabel metal2 181097 953270 181158 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[20] -port 797 nsew -flabel metal2 232297 953270 232358 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[19] -port 798 nsew -flabel metal2 336697 953270 336758 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[18] -port 799 nsew -flabel metal2 425697 953270 425758 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[17] -port 800 nsew -flabel metal2 476897 953270 476958 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[16] -port 801 nsew -flabel metal2 576297 953270 576358 953590 0 FreeSans 400 90 0 0 gpio_loopback_zero[15] -port 802 nsew +flabel metal3 s -424 323592 56 323662 0 FreeSans 400 0 0 0 gpio_dm1[33] +port 608 nsew +flabel metal3 s -424 325432 56 325502 0 FreeSans 400 0 0 0 gpio_slow_sel[33] +port 344 nsew +flabel metal3 s -424 327272 56 327342 0 FreeSans 400 0 0 0 gpio_in[33] +port 696 nsew +flabel metal3 s -424 365596 56 365666 0 FreeSans 400 0 0 0 gpio_analog_en[32] +port 433 nsew +flabel metal3 s -424 364308 56 364378 0 FreeSans 400 0 0 0 gpio_analog_pol[32] +port 521 nsew +flabel metal3 s -424 361272 56 361342 0 FreeSans 400 0 0 0 gpio_analog_sel[32] +port 477 nsew +flabel metal3 s -424 364952 56 365022 0 FreeSans 400 0 0 0 gpio_dm0[32] +port 565 nsew +flabel metal3 s -424 360628 56 360698 0 FreeSans 400 0 0 0 gpio_dm2[32] +port 653 nsew +flabel metal3 s -424 359984 56 360054 0 FreeSans 400 0 0 0 gpio_holdover[32] +port 389 nsew +flabel metal3 s -424 356948 56 357018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] +port 257 nsew +flabel metal3 s -424 363756 56 363826 0 FreeSans 400 0 0 0 gpio_inp_dis[32] +port 213 nsew +flabel metal3 s -424 356304 56 356374 0 FreeSans 400 0 0 0 gpio_oeb[32] +port 169 nsew +flabel metal3 s -424 359432 56 359502 0 FreeSans 400 0 0 0 gpio_out[32] +port 125 nsew +flabel metal3 s -424 357592 56 357662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] +port 301 nsew +flabel metal3 s -424 355752 56 355822 0 FreeSans 400 0 0 0 gpio_in_h[32] +port 741 nsew +flabel metal3 s -424 366792 56 366862 0 FreeSans 400 0 0 0 gpio_dm1[32] +port 609 nsew +flabel metal3 s -424 368632 56 368702 0 FreeSans 400 0 0 0 gpio_slow_sel[32] +port 345 nsew +flabel metal3 s -424 370472 56 370542 0 FreeSans 400 0 0 0 gpio_in[32] +port 697 nsew +flabel metal3 s -424 493196 56 493266 0 FreeSans 400 0 0 0 gpio_analog_en[31] +port 434 nsew +flabel metal3 s -424 491908 56 491978 0 FreeSans 400 0 0 0 gpio_analog_pol[31] +port 522 nsew +flabel metal3 s -424 488872 56 488942 0 FreeSans 400 0 0 0 gpio_analog_sel[31] +port 478 nsew +flabel metal3 s -424 492552 56 492622 0 FreeSans 400 0 0 0 gpio_dm0[31] +port 566 nsew +flabel metal3 s -424 488228 56 488298 0 FreeSans 400 0 0 0 gpio_dm2[31] +port 654 nsew +flabel metal3 s -424 487584 56 487654 0 FreeSans 400 0 0 0 gpio_holdover[31] +port 390 nsew +flabel metal3 s -424 484548 56 484618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] +port 258 nsew +flabel metal3 s -424 491356 56 491426 0 FreeSans 400 0 0 0 gpio_inp_dis[31] +port 214 nsew +flabel metal3 s -424 483904 56 483974 0 FreeSans 400 0 0 0 gpio_oeb[31] +port 170 nsew +flabel metal3 s -424 487032 56 487102 0 FreeSans 400 0 0 0 gpio_out[31] +port 126 nsew +flabel metal3 s -424 485192 56 485262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] +port 302 nsew +flabel metal3 s -424 483352 56 483422 0 FreeSans 400 0 0 0 gpio_in_h[31] +port 742 nsew +flabel metal3 s -424 494392 56 494462 0 FreeSans 400 0 0 0 gpio_dm1[31] +port 610 nsew +flabel metal3 s -424 496232 56 496302 0 FreeSans 400 0 0 0 gpio_slow_sel[31] +port 346 nsew +flabel metal3 s -424 498072 56 498142 0 FreeSans 400 0 0 0 gpio_in[31] +port 698 nsew +flabel metal3 s -424 535752 56 535822 0 FreeSans 400 0 0 0 gpio_dm0[30] +port 567 nsew +flabel metal3 s -424 531428 56 531498 0 FreeSans 400 0 0 0 gpio_dm2[30] +port 655 nsew +flabel metal3 s -424 530784 56 530854 0 FreeSans 400 0 0 0 gpio_holdover[30] +port 391 nsew +flabel metal3 s -424 527748 56 527818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] +port 259 nsew +flabel metal3 s -424 534556 56 534626 0 FreeSans 400 0 0 0 gpio_inp_dis[30] +port 215 nsew +flabel metal3 s -424 527104 56 527174 0 FreeSans 400 0 0 0 gpio_oeb[30] +port 171 nsew +flabel metal3 s -424 530232 56 530302 0 FreeSans 400 0 0 0 gpio_out[30] +port 127 nsew +flabel metal3 s -424 528392 56 528462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] +port 303 nsew +flabel metal3 s -424 536396 56 536466 0 FreeSans 400 0 0 0 gpio_analog_en[30] +port 435 nsew +flabel metal3 s -424 535108 56 535178 0 FreeSans 400 0 0 0 gpio_analog_pol[30] +port 523 nsew +flabel metal3 s -424 532072 56 532142 0 FreeSans 400 0 0 0 gpio_analog_sel[30] +port 479 nsew +flabel metal3 s -424 526552 56 526622 0 FreeSans 400 0 0 0 gpio_in_h[30] +port 743 nsew +flabel metal3 s -424 537592 56 537662 0 FreeSans 400 0 0 0 gpio_dm1[30] +port 611 nsew +flabel metal3 s -424 539432 56 539502 0 FreeSans 400 0 0 0 gpio_slow_sel[30] +port 347 nsew +flabel metal3 s -424 541272 56 541342 0 FreeSans 400 0 0 0 gpio_in[30] +port 699 nsew +flabel metal3 s -424 575272 56 575342 0 FreeSans 400 0 0 0 gpio_analog_sel[29] +port 480 nsew +flabel metal3 s -424 574628 56 574698 0 FreeSans 400 0 0 0 gpio_dm2[29] +port 656 nsew +flabel metal3 s -424 573984 56 574054 0 FreeSans 400 0 0 0 gpio_holdover[29] +port 392 nsew +flabel metal3 s -424 570948 56 571018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] +port 260 nsew +flabel metal3 s -424 570304 56 570374 0 FreeSans 400 0 0 0 gpio_oeb[29] +port 172 nsew +flabel metal3 s -424 573432 56 573502 0 FreeSans 400 0 0 0 gpio_out[29] +port 128 nsew +flabel metal3 s -424 571592 56 571662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] +port 304 nsew +flabel metal3 s -424 569752 56 569822 0 FreeSans 400 0 0 0 gpio_in_h[29] +port 744 nsew +flabel metal3 s -424 579596 56 579666 0 FreeSans 400 0 0 0 gpio_analog_en[29] +port 436 nsew +flabel metal3 s -424 578308 56 578378 0 FreeSans 400 0 0 0 gpio_analog_pol[29] +port 524 nsew +flabel metal3 s -424 578952 56 579022 0 FreeSans 400 0 0 0 gpio_dm0[29] +port 568 nsew +flabel metal3 s -424 577756 56 577826 0 FreeSans 400 0 0 0 gpio_inp_dis[29] +port 216 nsew +flabel metal3 s -424 580792 56 580862 0 FreeSans 400 0 0 0 gpio_dm1[29] +port 612 nsew +flabel metal3 s -424 582632 56 582702 0 FreeSans 400 0 0 0 gpio_slow_sel[29] +port 348 nsew +flabel metal3 s -424 584472 56 584542 0 FreeSans 400 0 0 0 gpio_in[29] +port 700 nsew +flabel metal3 s -424 622796 56 622866 0 FreeSans 400 0 0 0 gpio_analog_en[28] +port 437 nsew +flabel metal3 s -424 621508 56 621578 0 FreeSans 400 0 0 0 gpio_analog_pol[28] +port 525 nsew +flabel metal3 s -424 618472 56 618542 0 FreeSans 400 0 0 0 gpio_analog_sel[28] +port 481 nsew +flabel metal3 s -424 622152 56 622222 0 FreeSans 400 0 0 0 gpio_dm0[28] +port 569 nsew +flabel metal3 s -424 617828 56 617898 0 FreeSans 400 0 0 0 gpio_dm2[28] +port 657 nsew +flabel metal3 s -424 617184 56 617254 0 FreeSans 400 0 0 0 gpio_holdover[28] +port 393 nsew +flabel metal3 s -424 614148 56 614218 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] +port 261 nsew +flabel metal3 s -424 620956 56 621026 0 FreeSans 400 0 0 0 gpio_inp_dis[28] +port 217 nsew +flabel metal3 s -424 613504 56 613574 0 FreeSans 400 0 0 0 gpio_oeb[28] +port 173 nsew +flabel metal3 s -424 616632 56 616702 0 FreeSans 400 0 0 0 gpio_out[28] +port 129 nsew +flabel metal3 s -424 614792 56 614862 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] +port 305 nsew +flabel metal3 s -424 612952 56 613022 0 FreeSans 400 0 0 0 gpio_in_h[28] +port 745 nsew +flabel metal3 s -424 623992 56 624062 0 FreeSans 400 0 0 0 gpio_dm1[28] +port 613 nsew +flabel metal3 s -424 625832 56 625902 0 FreeSans 400 0 0 0 gpio_slow_sel[28] +port 349 nsew +flabel metal3 s -424 627672 56 627742 0 FreeSans 400 0 0 0 gpio_in[28] +port 701 nsew +flabel metal3 s -424 665996 56 666066 0 FreeSans 400 0 0 0 gpio_analog_en[27] +port 438 nsew +flabel metal3 s -424 664708 56 664778 0 FreeSans 400 0 0 0 gpio_analog_pol[27] +port 526 nsew +flabel metal3 s -424 661672 56 661742 0 FreeSans 400 0 0 0 gpio_analog_sel[27] +port 482 nsew +flabel metal3 s -424 665352 56 665422 0 FreeSans 400 0 0 0 gpio_dm0[27] +port 570 nsew +flabel metal3 s -424 661028 56 661098 0 FreeSans 400 0 0 0 gpio_dm2[27] +port 658 nsew +flabel metal3 s -424 660384 56 660454 0 FreeSans 400 0 0 0 gpio_holdover[27] +port 394 nsew +flabel metal3 s -424 657348 56 657418 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] +port 262 nsew +flabel metal3 s -424 664156 56 664226 0 FreeSans 400 0 0 0 gpio_inp_dis[27] +port 218 nsew +flabel metal3 s -424 656704 56 656774 0 FreeSans 400 0 0 0 gpio_oeb[27] +port 174 nsew +flabel metal3 s -424 659832 56 659902 0 FreeSans 400 0 0 0 gpio_out[27] +port 130 nsew +flabel metal3 s -424 657992 56 658062 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] +port 306 nsew +flabel metal3 s -424 656152 56 656222 0 FreeSans 400 0 0 0 gpio_in_h[27] +port 746 nsew +flabel metal3 s -424 667192 56 667262 0 FreeSans 400 0 0 0 gpio_dm1[27] +port 614 nsew +flabel metal3 s -424 669032 56 669102 0 FreeSans 400 0 0 0 gpio_slow_sel[27] +port 350 nsew +flabel metal3 s -424 670872 56 670942 0 FreeSans 400 0 0 0 gpio_in[27] +port 702 nsew +flabel metal3 -444 450940 56 455720 0 FreeSans 3200 90 0 0 vdda2 +port 25 nsew +flabel metal3 -444 408814 56 413604 0 FreeSans 3200 90 0 0 vssd2 +port 31 nsew +flabel metal3 -444 403862 56 408514 0 FreeSans 3200 90 0 0 vccd2 +port 29 nsew +flabel metal3 -444 398762 56 403562 0 FreeSans 3200 90 0 0 vssd2 +port 31 nsew +flabel metal3 -444 78140 56 82920 0 FreeSans 3200 90 0 0 vddio +port 18 nsew +flabel metal3 -444 36014 56 40804 0 FreeSans 3200 90 0 0 vccd +port 20 nsew +flabel metal3 -444 25962 56 30762 0 FreeSans 3200 90 0 0 vccd +port 20 nsew +flabel metal3 36806 -444 41586 56 0 FreeSans 3200 0 0 0 vssa +port 23 nsew +flabel metal3 199284 -444 203914 56 0 FreeSans 3200 0 0 0 vssd +port 21 nsew +flabel metal3 209164 -444 213964 56 0 FreeSans 3200 0 0 0 vssd +port 21 nsew +flabel metal3 527006 -444 531786 56 0 FreeSans 3200 0 0 0 vssio +port 19 nsew +flabel metal3 580806 -444 585586 56 0 FreeSans 3200 0 0 0 vdda +port 22 nsew +flabel metal3 633270 929006 633590 929068 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] +port 803 nsew +flabel metal3 633270 839006 633590 839068 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] +port 804 nsew +flabel metal3 633270 750006 633590 750068 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] +port 805 nsew +flabel metal3 633270 705006 633590 705068 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] +port 806 nsew +flabel metal3 633270 660006 633590 660068 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] +port 807 nsew +flabel metal3 633270 615006 633590 615068 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] +port 808 nsew +flabel metal3 633270 570006 633590 570068 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] +port 809 nsew +flabel metal3 633270 525006 633590 525068 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] +port 810 nsew +flabel metal3 633270 348006 633590 348068 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] +port 811 nsew +flabel metal3 633270 303006 633590 303068 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] +port 812 nsew +flabel metal3 633270 258006 633590 258068 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] +port 813 nsew +flabel metal3 633270 213006 633590 213068 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] +port 814 nsew +flabel metal3 633270 168006 633590 168068 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] +port 815 nsew +flabel metal3 633270 123006 633590 123068 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] +port 816 nsew +flabel metal3 633270 78006 633590 78068 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] +port 817 nsew +flabel metal3 s 633270 60624 633750 60694 0 FreeSans 400 0 0 0 gpio_slow_sel[0] +port 377 nsew +flabel metal3 s 633270 58784 633750 58854 0 FreeSans 400 0 0 0 gpio_in[0] +port 729 nsew +flabel metal3 s 633270 62464 633750 62534 0 FreeSans 400 0 0 0 gpio_dm1[0] +port 641 nsew +flabel metal3 s 633270 63660 633750 63730 0 FreeSans 400 0 0 0 gpio_analog_en[0] +port 465 nsew +flabel metal3 s 633270 64948 633750 65018 0 FreeSans 400 0 0 0 gpio_analog_pol[0] +port 553 nsew +flabel metal3 s 633270 67984 633750 68054 0 FreeSans 400 0 0 0 gpio_analog_sel[0] +port 509 nsew +flabel metal3 s 633270 64304 633750 64374 0 FreeSans 400 0 0 0 gpio_dm0[0] +port 597 nsew +flabel metal3 s 633270 68628 633750 68698 0 FreeSans 400 0 0 0 gpio_dm2[0] +port 685 nsew +flabel metal3 s 633270 69272 633750 69342 0 FreeSans 400 0 0 0 gpio_holdover[0] +port 421 nsew +flabel metal3 s 633270 72308 633750 72378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] +port 289 nsew +flabel metal3 s 633270 65500 633750 65570 0 FreeSans 400 0 0 0 gpio_inp_dis[0] +port 245 nsew +flabel metal3 s 633270 72952 633750 73022 0 FreeSans 400 0 0 0 gpio_oeb[0] +port 201 nsew +flabel metal3 s 633270 69824 633750 69894 0 FreeSans 400 0 0 0 gpio_out[0] +port 157 nsew +flabel metal3 s 633270 71664 633750 71734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] +port 333 nsew +flabel metal3 633270 73504 633750 73574 0 FreeSans 400 0 0 0 gpio_in_h[0] +port 773 nsew +flabel metal3 s 633270 105824 633750 105894 0 FreeSans 400 0 0 0 gpio_slow_sel[1] +port 376 nsew +flabel metal3 s 633270 103984 633750 104054 0 FreeSans 400 0 0 0 gpio_in[1] +port 728 nsew +flabel metal3 s 633270 107664 633750 107734 0 FreeSans 400 0 0 0 gpio_dm1[1] +port 640 nsew +flabel metal3 s 633270 108860 633750 108930 0 FreeSans 400 0 0 0 gpio_analog_en[1] +port 464 nsew +flabel metal3 s 633270 110148 633750 110218 0 FreeSans 400 0 0 0 gpio_analog_pol[1] +port 552 nsew +flabel metal3 s 633270 113184 633750 113254 0 FreeSans 400 0 0 0 gpio_analog_sel[1] +port 508 nsew +flabel metal3 s 633270 109504 633750 109574 0 FreeSans 400 0 0 0 gpio_dm0[1] +port 596 nsew +flabel metal3 s 633270 113828 633750 113898 0 FreeSans 400 0 0 0 gpio_dm2[1] +port 684 nsew +flabel metal3 s 633270 114472 633750 114542 0 FreeSans 400 0 0 0 gpio_holdover[1] +port 420 nsew +flabel metal3 s 633270 117508 633750 117578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] +port 288 nsew +flabel metal3 s 633270 110700 633750 110770 0 FreeSans 400 0 0 0 gpio_inp_dis[1] +port 244 nsew +flabel metal3 s 633270 118152 633750 118222 0 FreeSans 400 0 0 0 gpio_oeb[1] +port 200 nsew +flabel metal3 s 633270 115024 633750 115094 0 FreeSans 400 0 0 0 gpio_out[1] +port 156 nsew +flabel metal3 s 633270 116864 633750 116934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] +port 332 nsew +flabel metal3 633270 118704 633750 118774 0 FreeSans 400 0 0 0 gpio_in_h[1] +port 772 nsew +flabel metal3 s 633270 150824 633750 150894 0 FreeSans 400 0 0 0 gpio_slow_sel[2] +port 375 nsew +flabel metal3 s 633270 148984 633750 149054 0 FreeSans 400 0 0 0 gpio_in[2] +port 727 nsew +flabel metal3 s 633270 152664 633750 152734 0 FreeSans 400 0 0 0 gpio_dm1[2] +port 639 nsew +flabel metal3 s 633270 153860 633750 153930 0 FreeSans 400 0 0 0 gpio_analog_en[2] +port 463 nsew +flabel metal3 s 633270 155148 633750 155218 0 FreeSans 400 0 0 0 gpio_analog_pol[2] +port 551 nsew +flabel metal3 s 633270 158184 633750 158254 0 FreeSans 400 0 0 0 gpio_analog_sel[2] +port 507 nsew +flabel metal3 s 633270 154504 633750 154574 0 FreeSans 400 0 0 0 gpio_dm0[2] +port 595 nsew +flabel metal3 s 633270 158828 633750 158898 0 FreeSans 400 0 0 0 gpio_dm2[2] +port 683 nsew +flabel metal3 s 633270 159472 633750 159542 0 FreeSans 400 0 0 0 gpio_holdover[2] +port 419 nsew +flabel metal3 s 633270 162508 633750 162578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] +port 287 nsew +flabel metal3 s 633270 155700 633750 155770 0 FreeSans 400 0 0 0 gpio_inp_dis[2] +port 243 nsew +flabel metal3 s 633270 163152 633750 163222 0 FreeSans 400 0 0 0 gpio_oeb[2] +port 199 nsew +flabel metal3 s 633270 160024 633750 160094 0 FreeSans 400 0 0 0 gpio_out[2] +port 155 nsew +flabel metal3 s 633270 161864 633750 161934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] +port 331 nsew +flabel metal3 633270 163704 633750 163774 0 FreeSans 400 0 0 0 gpio_in_h[2] +port 771 nsew +flabel metal3 s 633270 196024 633750 196094 0 FreeSans 400 0 0 0 gpio_slow_sel[3] +port 374 nsew +flabel metal3 s 633270 194184 633750 194254 0 FreeSans 400 0 0 0 gpio_in[3] +port 726 nsew +flabel metal3 s 633270 197864 633750 197934 0 FreeSans 400 0 0 0 gpio_dm1[3] +port 638 nsew +flabel metal3 s 633270 199060 633750 199130 0 FreeSans 400 0 0 0 gpio_analog_en[3] +port 462 nsew +flabel metal3 s 633270 200348 633750 200418 0 FreeSans 400 0 0 0 gpio_analog_pol[3] +port 550 nsew +flabel metal3 s 633270 203384 633750 203454 0 FreeSans 400 0 0 0 gpio_analog_sel[3] +port 506 nsew +flabel metal3 s 633270 204028 633750 204098 0 FreeSans 400 0 0 0 gpio_dm2[3] +port 682 nsew +flabel metal3 s 633270 199704 633750 199774 0 FreeSans 400 0 0 0 gpio_dm0[3] +port 594 nsew +flabel metal3 s 633270 204672 633750 204742 0 FreeSans 400 0 0 0 gpio_holdover[3] +port 418 nsew +flabel metal3 s 633270 207708 633750 207778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] +port 286 nsew +flabel metal3 s 633270 200900 633750 200970 0 FreeSans 400 0 0 0 gpio_inp_dis[3] +port 242 nsew +flabel metal3 s 633270 208352 633750 208422 0 FreeSans 400 0 0 0 gpio_oeb[3] +port 198 nsew +flabel metal3 s 633270 205224 633750 205294 0 FreeSans 400 0 0 0 gpio_out[3] +port 154 nsew +flabel metal3 s 633270 207064 633750 207134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] +port 330 nsew +flabel metal3 633270 208904 633750 208974 0 FreeSans 400 0 0 0 gpio_in_h[3] +port 770 nsew +flabel metal3 s 633270 241024 633750 241094 0 FreeSans 400 0 0 0 gpio_slow_sel[4] +port 373 nsew +flabel metal3 s 633270 239184 633750 239254 0 FreeSans 400 0 0 0 gpio_in[4] +port 725 nsew +flabel metal3 s 633270 242864 633750 242934 0 FreeSans 400 0 0 0 gpio_dm1[4] +port 637 nsew +flabel metal3 s 633270 244060 633750 244130 0 FreeSans 400 0 0 0 gpio_analog_en[4] +port 461 nsew +flabel metal3 s 633270 245348 633750 245418 0 FreeSans 400 0 0 0 gpio_analog_pol[4] +port 549 nsew +flabel metal3 s 633270 248384 633750 248454 0 FreeSans 400 0 0 0 gpio_analog_sel[4] +port 505 nsew +flabel metal3 s 633270 244704 633750 244774 0 FreeSans 400 0 0 0 gpio_dm0[4] +port 593 nsew +flabel metal3 s 633270 249028 633750 249098 0 FreeSans 400 0 0 0 gpio_dm2[4] +port 681 nsew +flabel metal3 s 633270 249672 633750 249742 0 FreeSans 400 0 0 0 gpio_holdover[4] +port 417 nsew +flabel metal3 s 633270 252708 633750 252778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] +port 285 nsew +flabel metal3 s 633270 245900 633750 245970 0 FreeSans 400 0 0 0 gpio_inp_dis[4] +port 241 nsew +flabel metal3 s 633270 253352 633750 253422 0 FreeSans 400 0 0 0 gpio_oeb[4] +port 197 nsew +flabel metal3 s 633270 250224 633750 250294 0 FreeSans 400 0 0 0 gpio_out[4] +port 153 nsew +flabel metal3 s 633270 252064 633750 252134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] +port 329 nsew +flabel metal3 633270 253904 633750 253974 0 FreeSans 400 0 0 0 gpio_in_h[4] +port 769 nsew +flabel metal3 s 633270 286024 633750 286094 0 FreeSans 400 0 0 0 gpio_slow_sel[5] +port 372 nsew +flabel metal3 s 633270 284184 633750 284254 0 FreeSans 400 0 0 0 gpio_in[5] +port 724 nsew +flabel metal3 s 633270 287864 633750 287934 0 FreeSans 400 0 0 0 gpio_dm1[5] +port 636 nsew +flabel metal3 s 633270 289060 633750 289130 0 FreeSans 400 0 0 0 gpio_analog_en[5] +port 460 nsew +flabel metal3 s 633270 290348 633750 290418 0 FreeSans 400 0 0 0 gpio_analog_pol[5] +port 548 nsew +flabel metal3 s 633270 293384 633750 293454 0 FreeSans 400 0 0 0 gpio_analog_sel[5] +port 504 nsew +flabel metal3 s 633270 289704 633750 289774 0 FreeSans 400 0 0 0 gpio_dm0[5] +port 592 nsew +flabel metal3 s 633270 294028 633750 294098 0 FreeSans 400 0 0 0 gpio_dm2[5] +port 680 nsew +flabel metal3 s 633270 294672 633750 294742 0 FreeSans 400 0 0 0 gpio_holdover[5] +port 416 nsew +flabel metal3 s 633270 297708 633750 297778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] +port 284 nsew +flabel metal3 s 633270 290900 633750 290970 0 FreeSans 400 0 0 0 gpio_inp_dis[5] +port 240 nsew +flabel metal3 s 633270 298352 633750 298422 0 FreeSans 400 0 0 0 gpio_oeb[5] +port 196 nsew +flabel metal3 s 633270 295224 633750 295294 0 FreeSans 400 0 0 0 gpio_out[5] +port 152 nsew +flabel metal3 s 633270 297064 633750 297134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] +port 328 nsew +flabel metal3 633270 298904 633750 298974 0 FreeSans 400 0 0 0 gpio_in_h[5] +port 768 nsew +flabel metal3 s 633270 331224 633750 331294 0 FreeSans 400 0 0 0 gpio_slow_sel[6] +port 371 nsew +flabel metal3 s 633270 329384 633750 329454 0 FreeSans 400 0 0 0 gpio_in[6] +port 723 nsew +flabel metal3 s 633270 333064 633750 333134 0 FreeSans 400 0 0 0 gpio_dm1[6] +port 635 nsew +flabel metal3 s 633270 334260 633750 334330 0 FreeSans 400 0 0 0 gpio_analog_en[6] +port 459 nsew +flabel metal3 s 633270 335548 633750 335618 0 FreeSans 400 0 0 0 gpio_analog_pol[6] +port 547 nsew +flabel metal3 s 633270 338584 633750 338654 0 FreeSans 400 0 0 0 gpio_analog_sel[6] +port 503 nsew +flabel metal3 s 633270 334904 633750 334974 0 FreeSans 400 0 0 0 gpio_dm0[6] +port 591 nsew +flabel metal3 s 633270 339228 633750 339298 0 FreeSans 400 0 0 0 gpio_dm2[6] +port 679 nsew +flabel metal3 s 633270 339872 633750 339942 0 FreeSans 400 0 0 0 gpio_holdover[6] +port 415 nsew +flabel metal3 s 633270 342908 633750 342978 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] +port 283 nsew +flabel metal3 s 633270 336100 633750 336170 0 FreeSans 400 0 0 0 gpio_inp_dis[6] +port 239 nsew +flabel metal3 s 633270 343552 633750 343622 0 FreeSans 400 0 0 0 gpio_oeb[6] +port 195 nsew +flabel metal3 s 633270 340424 633750 340494 0 FreeSans 400 0 0 0 gpio_out[6] +port 151 nsew +flabel metal3 s 633270 342264 633750 342334 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] +port 327 nsew +flabel metal3 633270 344104 633750 344174 0 FreeSans 400 0 0 0 gpio_in_h[6] +port 767 nsew +flabel metal3 s 633270 508424 633750 508494 0 FreeSans 400 0 0 0 gpio_slow_sel[7] +port 370 nsew +flabel metal3 s 633270 506584 633750 506654 0 FreeSans 400 0 0 0 gpio_in[7] +port 722 nsew +flabel metal3 s 633270 510264 633750 510334 0 FreeSans 400 0 0 0 gpio_dm1[7] +port 634 nsew +flabel metal3 s 633270 511460 633750 511530 0 FreeSans 400 0 0 0 gpio_analog_en[7] +port 458 nsew +flabel metal3 s 633270 512748 633750 512818 0 FreeSans 400 0 0 0 gpio_analog_pol[7] +port 546 nsew +flabel metal3 s 633270 515784 633750 515854 0 FreeSans 400 0 0 0 gpio_analog_sel[7] +port 502 nsew +flabel metal3 s 633270 512104 633750 512174 0 FreeSans 400 0 0 0 gpio_dm0[7] +port 590 nsew +flabel metal3 s 633270 516428 633750 516498 0 FreeSans 400 0 0 0 gpio_dm2[7] +port 678 nsew +flabel metal3 s 633270 517072 633750 517142 0 FreeSans 400 0 0 0 gpio_holdover[7] +port 414 nsew +flabel metal3 s 633270 520108 633750 520178 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] +port 282 nsew +flabel metal3 s 633270 513300 633750 513370 0 FreeSans 400 0 0 0 gpio_inp_dis[7] +port 238 nsew +flabel metal3 s 633270 520752 633750 520822 0 FreeSans 400 0 0 0 gpio_oeb[7] +port 194 nsew +flabel metal3 s 633270 517624 633750 517694 0 FreeSans 400 0 0 0 gpio_out[7] +port 150 nsew +flabel metal3 s 633270 519464 633750 519534 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] +port 326 nsew +flabel metal3 s 633270 521304 633750 521374 0 FreeSans 400 0 0 0 gpio_in_h[7] +port 766 nsew +flabel metal3 s 633270 553624 633750 553694 0 FreeSans 400 0 0 0 gpio_slow_sel[8] +port 369 nsew +flabel metal3 s 633270 551784 633750 551854 0 FreeSans 400 0 0 0 gpio_in[8] +port 721 nsew +flabel metal3 s 633270 555464 633750 555534 0 FreeSans 400 0 0 0 gpio_dm1[8] +port 633 nsew +flabel metal3 s 633270 556660 633750 556730 0 FreeSans 400 0 0 0 gpio_analog_en[8] +port 457 nsew +flabel metal3 s 633270 557948 633750 558018 0 FreeSans 400 0 0 0 gpio_analog_pol[8] +port 545 nsew +flabel metal3 s 633270 560984 633750 561054 0 FreeSans 400 0 0 0 gpio_analog_sel[8] +port 501 nsew +flabel metal3 s 633270 557304 633750 557374 0 FreeSans 400 0 0 0 gpio_dm0[8] +port 589 nsew +flabel metal3 s 633270 561628 633750 561698 0 FreeSans 400 0 0 0 gpio_dm2[8] +port 677 nsew +flabel metal3 s 633270 562272 633750 562342 0 FreeSans 400 0 0 0 gpio_holdover[8] +port 413 nsew +flabel metal3 s 633270 565308 633750 565378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] +port 281 nsew +flabel metal3 s 633270 558500 633750 558570 0 FreeSans 400 0 0 0 gpio_inp_dis[8] +port 237 nsew +flabel metal3 s 633270 565952 633750 566022 0 FreeSans 400 0 0 0 gpio_oeb[8] +port 193 nsew +flabel metal3 s 633270 562824 633750 562894 0 FreeSans 400 0 0 0 gpio_out[8] +port 149 nsew +flabel metal3 s 633270 564664 633750 564734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] +port 325 nsew +flabel metal3 s 633270 566504 633750 566574 0 FreeSans 400 0 0 0 gpio_in_h[8] +port 765 nsew +flabel metal3 s 633270 598624 633750 598694 0 FreeSans 400 0 0 0 gpio_slow_sel[9] +port 368 nsew +flabel metal3 s 633270 596784 633750 596854 0 FreeSans 400 0 0 0 gpio_in[9] +port 720 nsew +flabel metal3 s 633270 600464 633750 600534 0 FreeSans 400 0 0 0 gpio_dm1[9] +port 632 nsew +flabel metal3 s 633270 601660 633750 601730 0 FreeSans 400 0 0 0 gpio_analog_en[9] +port 456 nsew +flabel metal3 s 633270 602948 633750 603018 0 FreeSans 400 0 0 0 gpio_analog_pol[9] +port 544 nsew +flabel metal3 s 633270 605984 633750 606054 0 FreeSans 400 0 0 0 gpio_analog_sel[9] +port 500 nsew +flabel metal3 s 633270 602304 633750 602374 0 FreeSans 400 0 0 0 gpio_dm0[9] +port 588 nsew +flabel metal3 s 633270 606628 633750 606698 0 FreeSans 400 0 0 0 gpio_dm2[9] +port 676 nsew +flabel metal3 s 633270 607272 633750 607342 0 FreeSans 400 0 0 0 gpio_holdover[9] +port 412 nsew +flabel metal3 s 633270 610308 633750 610378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] +port 280 nsew +flabel metal3 s 633270 603500 633750 603570 0 FreeSans 400 0 0 0 gpio_inp_dis[9] +port 236 nsew +flabel metal3 s 633270 610952 633750 611022 0 FreeSans 400 0 0 0 gpio_oeb[9] +port 192 nsew +flabel metal3 s 633270 607824 633750 607894 0 FreeSans 400 0 0 0 gpio_out[9] +port 148 nsew +flabel metal3 s 633270 609664 633750 609734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] +port 324 nsew +flabel metal3 s 633270 611504 633750 611574 0 FreeSans 400 0 0 0 gpio_in_h[9] +port 764 nsew +flabel metal3 s 633270 643824 633750 643894 0 FreeSans 400 0 0 0 gpio_slow_sel[10] +port 367 nsew +flabel metal3 s 633270 641984 633750 642054 0 FreeSans 400 0 0 0 gpio_in[10] +port 719 nsew +flabel metal3 s 633270 645664 633750 645734 0 FreeSans 400 0 0 0 gpio_dm1[10] +port 631 nsew +flabel metal3 s 633270 646860 633750 646930 0 FreeSans 400 0 0 0 gpio_analog_en[10] +port 455 nsew +flabel metal3 s 633270 648148 633750 648218 0 FreeSans 400 0 0 0 gpio_analog_pol[10] +port 543 nsew +flabel metal3 s 633270 651184 633750 651254 0 FreeSans 400 0 0 0 gpio_analog_sel[10] +port 499 nsew +flabel metal3 s 633270 647504 633750 647574 0 FreeSans 400 0 0 0 gpio_dm0[10] +port 587 nsew +flabel metal3 s 633270 651828 633750 651898 0 FreeSans 400 0 0 0 gpio_dm2[10] +port 675 nsew +flabel metal3 s 633270 652472 633750 652542 0 FreeSans 400 0 0 0 gpio_holdover[10] +port 411 nsew +flabel metal3 s 633270 655508 633750 655578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] +port 279 nsew +flabel metal3 s 633270 648700 633750 648770 0 FreeSans 400 0 0 0 gpio_inp_dis[10] +port 235 nsew +flabel metal3 s 633270 656152 633750 656222 0 FreeSans 400 0 0 0 gpio_oeb[10] +port 191 nsew +flabel metal3 s 633270 653024 633750 653094 0 FreeSans 400 0 0 0 gpio_out[10] +port 147 nsew +flabel metal3 s 633270 654864 633750 654934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] +port 323 nsew +flabel metal3 s 633270 656704 633750 656774 0 FreeSans 400 0 0 0 gpio_in_h[10] +port 763 nsew +flabel metal3 s 633270 688824 633750 688894 0 FreeSans 400 0 0 0 gpio_slow_sel[11] +port 366 nsew +flabel metal3 s 633270 686984 633750 687054 0 FreeSans 400 0 0 0 gpio_in[11] +port 718 nsew +flabel metal3 s 633270 690664 633750 690734 0 FreeSans 400 0 0 0 gpio_dm1[11] +port 630 nsew +flabel metal3 s 633270 697472 633750 697542 0 FreeSans 400 0 0 0 gpio_holdover[11] +port 410 nsew +flabel metal3 s 633270 700508 633750 700578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] +port 278 nsew +flabel metal3 s 633270 693700 633750 693770 0 FreeSans 400 0 0 0 gpio_inp_dis[11] +port 234 nsew +flabel metal3 s 633270 701152 633750 701222 0 FreeSans 400 0 0 0 gpio_oeb[11] +port 190 nsew +flabel metal3 s 633270 698024 633750 698094 0 FreeSans 400 0 0 0 gpio_out[11] +port 146 nsew +flabel metal3 s 633270 699864 633750 699934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] +port 322 nsew +flabel metal3 s 633270 691860 633750 691930 0 FreeSans 400 0 0 0 gpio_analog_en[11] +port 454 nsew +flabel metal3 s 633270 693148 633750 693218 0 FreeSans 400 0 0 0 gpio_analog_pol[11] +port 542 nsew +flabel metal3 s 633270 696184 633750 696254 0 FreeSans 400 0 0 0 gpio_analog_sel[11] +port 498 nsew +flabel metal3 s 633270 692504 633750 692574 0 FreeSans 400 0 0 0 gpio_dm0[11] +port 586 nsew +flabel metal3 s 633270 696828 633750 696898 0 FreeSans 400 0 0 0 gpio_dm2[11] +port 674 nsew +flabel metal3 s 633270 701704 633750 701774 0 FreeSans 400 0 0 0 gpio_in_h[11] +port 762 nsew +flabel metal3 s 633270 733824 633750 733894 0 FreeSans 400 0 0 0 gpio_slow_sel[12] +port 365 nsew +flabel metal3 s 633270 731984 633750 732054 0 FreeSans 400 0 0 0 gpio_in[12] +port 717 nsew +flabel metal3 s 633270 735664 633750 735734 0 FreeSans 400 0 0 0 gpio_dm1[12] +port 629 nsew +flabel metal3 s 633270 736860 633750 736930 0 FreeSans 400 0 0 0 gpio_analog_en[12] +port 453 nsew +flabel metal3 s 633270 738148 633750 738218 0 FreeSans 400 0 0 0 gpio_analog_pol[12] +port 541 nsew +flabel metal3 s 633270 741184 633750 741254 0 FreeSans 400 0 0 0 gpio_analog_sel[12] +port 497 nsew +flabel metal3 s 633270 737504 633750 737574 0 FreeSans 400 0 0 0 gpio_dm0[12] +port 585 nsew +flabel metal3 s 633270 741828 633750 741898 0 FreeSans 400 0 0 0 gpio_dm2[12] +port 673 nsew +flabel metal3 s 633270 742472 633750 742542 0 FreeSans 400 0 0 0 gpio_holdover[12] +port 409 nsew +flabel metal3 s 633270 745508 633750 745578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] +port 277 nsew +flabel metal3 s 633270 738700 633750 738770 0 FreeSans 400 0 0 0 gpio_inp_dis[12] +port 233 nsew +flabel metal3 s 633270 746152 633750 746222 0 FreeSans 400 0 0 0 gpio_oeb[12] +port 189 nsew +flabel metal3 s 633270 743024 633750 743094 0 FreeSans 400 0 0 0 gpio_out[12] +port 145 nsew +flabel metal3 s 633270 744864 633750 744934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] +port 321 nsew +flabel metal3 s 633270 746704 633750 746774 0 FreeSans 400 0 0 0 gpio_in_h[12] +port 761 nsew +flabel metal3 s 633270 823024 633750 823094 0 FreeSans 400 0 0 0 gpio_slow_sel[13] +port 364 nsew +flabel metal3 s 633270 821184 633750 821254 0 FreeSans 400 0 0 0 gpio_in[13] +port 716 nsew +flabel metal3 s 633270 824864 633750 824934 0 FreeSans 400 0 0 0 gpio_dm1[13] +port 628 nsew +flabel metal3 s 633270 826060 633750 826130 0 FreeSans 400 0 0 0 gpio_analog_en[13] +port 452 nsew +flabel metal3 s 633270 827348 633750 827418 0 FreeSans 400 0 0 0 gpio_analog_pol[13] +port 540 nsew +flabel metal3 s 633270 830384 633750 830454 0 FreeSans 400 0 0 0 gpio_analog_sel[13] +port 496 nsew +flabel metal3 s 633270 826704 633750 826774 0 FreeSans 400 0 0 0 gpio_dm0[13] +port 584 nsew +flabel metal3 s 633270 831028 633750 831098 0 FreeSans 400 0 0 0 gpio_dm2[13] +port 672 nsew +flabel metal3 s 633270 831672 633750 831742 0 FreeSans 400 0 0 0 gpio_holdover[13] +port 408 nsew +flabel metal3 s 633270 834708 633750 834778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] +port 276 nsew +flabel metal3 s 633270 827900 633750 827970 0 FreeSans 400 0 0 0 gpio_inp_dis[13] +port 232 nsew +flabel metal3 s 633270 835352 633750 835422 0 FreeSans 400 0 0 0 gpio_oeb[13] +port 188 nsew +flabel metal3 s 633270 832224 633750 832294 0 FreeSans 400 0 0 0 gpio_out[13] +port 144 nsew +flabel metal3 s 633270 834064 633750 834134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] +port 320 nsew +flabel metal3 s 633270 835904 633750 835974 0 FreeSans 400 0 0 0 gpio_in_h[13] +port 760 nsew +flabel metal3 s 633270 912224 633750 912294 0 FreeSans 400 0 0 0 gpio_slow_sel[14] +port 363 nsew +flabel metal3 s 633270 910384 633750 910454 0 FreeSans 400 0 0 0 gpio_in[14] +port 715 nsew +flabel metal3 s 633270 914064 633750 914134 0 FreeSans 400 0 0 0 gpio_dm1[14] +port 627 nsew +flabel metal3 s 633270 915260 633750 915330 0 FreeSans 400 0 0 0 gpio_analog_en[14] +port 451 nsew +flabel metal3 s 633270 916548 633750 916618 0 FreeSans 400 0 0 0 gpio_analog_pol[14] +port 539 nsew +flabel metal3 s 633270 919584 633750 919654 0 FreeSans 400 0 0 0 gpio_analog_sel[14] +port 495 nsew +flabel metal3 s 633270 915904 633750 915974 0 FreeSans 400 0 0 0 gpio_dm0[14] +port 583 nsew +flabel metal3 s 633270 920228 633750 920298 0 FreeSans 400 0 0 0 gpio_dm2[14] +port 671 nsew +flabel metal3 s 633270 920872 633750 920942 0 FreeSans 400 0 0 0 gpio_holdover[14] +port 407 nsew +flabel metal3 s 633270 923908 633750 923978 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] +port 275 nsew +flabel metal3 s 633270 917100 633750 917170 0 FreeSans 400 0 0 0 gpio_inp_dis[14] +port 231 nsew +flabel metal3 s 633270 924552 633750 924622 0 FreeSans 400 0 0 0 gpio_oeb[14] +port 187 nsew +flabel metal3 s 633270 921424 633750 921494 0 FreeSans 400 0 0 0 gpio_out[14] +port 143 nsew +flabel metal3 s 633270 923264 633750 923334 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] +port 319 nsew +flabel metal3 s 633270 925104 633750 925174 0 FreeSans 400 0 0 0 gpio_in_h[14] +port 759 nsew +flabel metal3 s -424 927072 56 927142 0 FreeSans 400 0 0 0 gpio_in[24] +port 705 nsew +flabel metal3 s -424 925232 56 925302 0 FreeSans 400 0 0 0 gpio_slow_sel[24] +port 353 nsew +flabel metal3 s -424 923392 56 923462 0 FreeSans 400 0 0 0 gpio_dm1[24] +port 617 nsew +flabel metal3 s -424 922196 56 922266 0 FreeSans 400 0 0 0 gpio_analog_en[24] +port 441 nsew +flabel metal3 s -424 921552 56 921622 0 FreeSans 400 0 0 0 gpio_dm0[24] +port 573 nsew +flabel metal3 s -424 920908 56 920978 0 FreeSans 400 0 0 0 gpio_analog_pol[24] +port 529 nsew +flabel metal3 s -424 920356 56 920426 0 FreeSans 400 0 0 0 gpio_inp_dis[24] +port 221 nsew +flabel metal3 s -424 917872 56 917942 0 FreeSans 400 0 0 0 gpio_analog_sel[24] +port 485 nsew +flabel metal3 s -424 917228 56 917298 0 FreeSans 400 0 0 0 gpio_dm2[24] +port 661 nsew +flabel metal3 s -424 916584 56 916654 0 FreeSans 400 0 0 0 gpio_holdover[24] +port 397 nsew +flabel metal3 s -424 916032 56 916102 0 FreeSans 400 0 0 0 gpio_out[24] +port 133 nsew +flabel metal3 s -424 914192 56 914262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] +port 309 nsew +flabel metal3 s -424 913548 56 913618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] +port 265 nsew +flabel metal3 s -424 912904 56 912974 0 FreeSans 400 0 0 0 gpio_oeb[24] +port 177 nsew +flabel metal3 s -424 912352 56 912422 0 FreeSans 400 0 0 0 gpio_in_h[24] +port 749 nsew +flabel metal3 s -424 924560 56 924688 0 FreeSans 400 0 0 0 analog_io[24] +port 881 nsew +flabel metal3 s -424 922677 56 922891 0 FreeSans 400 0 0 0 analog_noesd_io[24] +port 925 nsew << properties >> -string FIXED_BBOX 0 0 633326 953326 +string FIXED_BBOX 56 56 633270 953270 << end >> diff --git a/mag/simple_por.mag b/mag/simple_por.mag index ea0a8cc9..496cfd05 100644 --- a/mag/simple_por.mag +++ b/mag/simple_por.mag @@ -2,6 +2,10 @@ magic tech sky130A magscale 1 2 timestamp 1680223961 +<< checkpaint >> +rect 6151 8561 12163 9595 +rect 6141 6135 12163 8561 +rect 6141 5101 12153 6135 << isosubstrate >> rect -52 7354 7222 8450 rect -52 -62 11288 7354 @@ -615,23 +619,23 @@ timestamp 1606074388 transform 1 0 5446 0 1 3098 box -5446 -3098 5446 3098 use sky130_fd_sc_hvl__buf_8 sky130_fd_sc_hvl__buf_8_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1679235063 +timestamp 1692890899 transform 1 0 8523 0 1 6404 box -66 -43 1986 897 use sky130_fd_sc_hvl__buf_8 sky130_fd_sc_hvl__buf_8_1 -timestamp 1679235063 +timestamp 1692890899 transform 1 0 7477 0 1 7438 box -66 -43 1986 897 use sky130_fd_sc_hvl__fill_4 sky130_fd_sc_hvl__fill_4_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1679235063 +timestamp 1692890899 transform 1 0 10443 0 1 6404 box -66 -43 450 897 use sky130_fd_sc_hvl__inv_8 sky130_fd_sc_hvl__inv_8_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1679235063 +timestamp 1692890899 transform 1 0 9397 0 1 7438 box -66 -43 1506 897 use sky130_fd_sc_hvl__schmittbuf_1 sky130_fd_sc_hvl__schmittbuf_1_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1679235063 +timestamp 1692890899 transform 1 0 7467 0 1 6404 box -66 -43 1122 897 << labels >> diff --git a/mag/user_id_programming.mag b/mag/user_id_programming.mag index 6ad139cc..f2254553 100644 --- a/mag/user_id_programming.mag +++ b/mag/user_id_programming.mag @@ -2,6 +2,8 @@ magic tech sky130A magscale 1 2 timestamp 1650371074 +<< checkpaint >> +rect -194 -220 7278 7292 << nwell >> rect 2304 2369 2397 2389 << viali >> @@ -37,39 +39,6 @@ rect 5641 1853 5675 1887 rect 1685 1377 1719 1411 rect 2973 1377 3007 1411 rect 4629 1377 4663 1411 -<< locali >> -rect 4353 5117 4387 5151 -rect 5273 5117 5307 5151 -rect 2145 4641 2179 4675 -rect 3249 4641 3283 4675 -rect 3617 4641 3651 4675 -rect 4721 4641 4755 4675 -rect 1593 4029 1627 4063 -rect 2053 4029 2087 4063 -rect 4445 4029 4479 4063 -rect 4721 4029 4755 4063 -rect 5549 4029 5583 4063 -rect 1685 3553 1719 3587 -rect 1961 3553 1995 3587 -rect 2697 3553 2731 3587 -rect 3157 3553 3191 3587 -rect 3433 3553 3467 3587 -rect 4261 3553 4295 3587 -rect 4813 3553 4847 3587 -rect 5273 3553 5307 3587 -rect 1593 2941 1627 2975 -rect 4813 2397 4847 2431 -rect 5089 2397 5123 2431 -rect 1593 1853 1627 1887 -rect 2145 1853 2179 1887 -rect 2605 1853 2639 1887 -rect 2881 1853 2915 1887 -rect 3249 1853 3283 1887 -rect 4077 1853 4111 1887 -rect 5641 1853 5675 1887 -rect 1685 1377 1719 1411 -rect 2973 1377 3007 1411 -rect 4629 1377 4663 1411 << metal1 >> rect 1104 6010 5980 6032 rect 1104 5958 2607 6010 @@ -100,19 +69,25 @@ rect 1104 5392 5980 5414 rect 4062 5108 4068 5160 rect 4120 5148 4126 5160 rect 4157 5148 4215 5157 -rect 4341 5148 4399 5157 -rect 4120 5120 4399 5148 +rect 4341 5151 4399 5157 +rect 4341 5148 4353 5151 +rect 4120 5120 4353 5148 rect 4120 5108 4126 5120 rect 4157 5111 4215 5120 -rect 4341 5111 4399 5120 +rect 4341 5117 4353 5120 +rect 4387 5117 4399 5151 +rect 4341 5111 4399 5117 rect 4614 5108 4620 5160 rect 4672 5148 4678 5160 rect 5077 5148 5135 5157 -rect 5261 5148 5319 5157 -rect 4672 5120 5319 5148 +rect 5261 5151 5319 5157 +rect 5261 5148 5273 5151 +rect 4672 5120 5273 5148 rect 4672 5108 4678 5120 rect 5077 5111 5135 5120 -rect 5261 5111 5319 5120 +rect 5261 5117 5273 5120 +rect 5307 5117 5319 5151 +rect 5261 5111 5319 5117 rect 1104 4922 5980 4944 rect 1104 4870 2607 4922 rect 2659 4870 2671 4922 @@ -125,11 +100,16 @@ rect 4412 4870 4424 4922 rect 4476 4870 5980 4922 rect 1104 4848 5980 4870 rect 1949 4672 2007 4681 -rect 2133 4672 2191 4681 -rect 2958 4672 2964 4684 -rect 1949 4644 2964 4672 +rect 2133 4675 2191 4681 +rect 2133 4672 2145 4675 +rect 1949 4644 2145 4672 rect 1949 4635 2007 4644 -rect 2133 4635 2191 4644 +rect 2133 4641 2145 4644 +rect 2179 4672 2191 4675 +rect 2958 4672 2964 4684 +rect 2179 4644 2964 4672 +rect 2179 4641 2191 4644 +rect 2133 4635 2191 4641 rect 2958 4632 2964 4644 rect 3016 4632 3022 4684 rect 3050 4672 3114 4684 @@ -139,15 +119,21 @@ rect 3050 4632 3114 4644 rect 3234 4632 3240 4644 rect 3292 4632 3298 4684 rect 3418 4672 3482 4684 -rect 3602 4672 3666 4684 -rect 3418 4644 3666 4672 +rect 3602 4675 3666 4684 +rect 3602 4672 3617 4675 +rect 3418 4644 3617 4672 rect 3418 4632 3482 4644 -rect 3602 4632 3666 4644 +rect 3602 4641 3617 4644 +rect 3651 4641 3666 4675 +rect 3602 4632 3666 4641 rect 4522 4674 4586 4684 -rect 4706 4674 4770 4684 -rect 4522 4644 4770 4674 +rect 4706 4675 4770 4684 +rect 4706 4674 4721 4675 +rect 4522 4644 4721 4674 rect 4522 4632 4586 4644 -rect 4706 4632 4770 4644 +rect 4706 4641 4721 4644 +rect 4755 4641 4770 4675 +rect 4706 4632 4770 4641 rect 3620 4468 3648 4632 rect 4720 4539 4755 4632 rect 4720 4505 4754 4539 @@ -193,31 +179,43 @@ rect 2280 4128 2286 4140 rect 2280 4100 3924 4128 rect 2280 4088 2286 4100 rect 1857 4059 1915 4069 -rect 2041 4059 2099 4069 -rect 1857 4031 2099 4059 +rect 2041 4063 2099 4069 +rect 2041 4059 2053 4063 +rect 1857 4031 2053 4059 rect 1857 4023 1915 4031 -rect 2041 4023 2099 4031 +rect 2041 4029 2053 4031 +rect 2087 4029 2099 4063 +rect 2041 4023 2099 4029 rect 3896 3992 3924 4100 rect 4062 4020 4068 4072 rect 4120 4060 4126 4072 rect 4540 4069 4568 4236 rect 4249 4060 4307 4069 -rect 4433 4060 4491 4069 -rect 4120 4032 4491 4060 +rect 4433 4063 4491 4069 +rect 4433 4060 4445 4063 +rect 4120 4032 4445 4060 rect 4120 4020 4126 4032 rect 4249 4023 4307 4032 -rect 4433 4023 4491 4032 +rect 4433 4029 4445 4032 +rect 4479 4029 4491 4063 +rect 4433 4023 4491 4029 rect 4525 4060 4583 4069 -rect 4709 4060 4767 4069 -rect 4525 4032 4767 4060 +rect 4709 4063 4767 4069 +rect 4709 4060 4721 4063 +rect 4525 4032 4721 4060 rect 4525 4023 4583 4032 -rect 4709 4023 4767 4032 +rect 4709 4029 4721 4032 +rect 4755 4029 4767 4063 +rect 4709 4023 4767 4029 rect 5350 4020 5356 4072 rect 5408 4060 5414 4072 -rect 5537 4060 5595 4069 -rect 5408 4031 5595 4060 +rect 5537 4063 5595 4069 +rect 5537 4060 5549 4063 +rect 5408 4031 5549 4060 rect 5408 4020 5414 4031 -rect 5537 4023 5595 4031 +rect 5537 4029 5549 4031 +rect 5583 4029 5595 4063 +rect 5537 4023 5595 4029 rect 4890 3992 4896 4004 rect 3896 3964 4896 3992 rect 4890 3952 4896 3964 @@ -252,16 +250,24 @@ rect 1964 3593 1992 3624 rect 5902 3612 5908 3624 rect 5960 3612 5966 3664 rect 1765 3584 1823 3593 -rect 1949 3584 2007 3593 -rect 1765 3556 2007 3584 +rect 1949 3587 2007 3593 +rect 1949 3584 1961 3587 +rect 1765 3556 1961 3584 rect 1765 3547 1823 3556 -rect 1949 3547 2007 3556 +rect 1949 3553 1961 3556 +rect 1995 3553 2007 3587 +rect 1949 3547 2007 3553 rect 2501 3586 2559 3593 -rect 2685 3586 2743 3593 -rect 2774 3586 2780 3596 -rect 2501 3555 2780 3586 +rect 2685 3587 2743 3593 +rect 2685 3586 2697 3587 +rect 2501 3555 2697 3586 rect 2501 3547 2559 3555 -rect 2685 3547 2743 3555 +rect 2685 3553 2697 3555 +rect 2731 3586 2743 3587 +rect 2774 3586 2780 3596 +rect 2731 3555 2780 3586 +rect 2731 3553 2743 3555 +rect 2685 3547 2743 3553 rect 2774 3544 2780 3555 rect 2832 3544 2838 3596 rect 2958 3584 3022 3596 @@ -271,31 +277,45 @@ rect 2958 3544 3022 3556 rect 3142 3544 3148 3556 rect 3200 3544 3206 3596 rect 3234 3585 3298 3596 -rect 3418 3585 3482 3596 -rect 3234 3557 3482 3585 +rect 3418 3587 3482 3596 +rect 3418 3585 3433 3587 +rect 3234 3557 3433 3585 rect 3234 3544 3298 3557 -rect 3418 3544 3482 3557 +rect 3418 3553 3433 3557 +rect 3467 3553 3482 3587 +rect 3418 3544 3482 3553 rect 4065 3584 4123 3593 -rect 4249 3584 4307 3593 -rect 4522 3584 4528 3596 -rect 4065 3556 4528 3584 +rect 4249 3587 4307 3593 +rect 4249 3584 4261 3587 +rect 4065 3556 4261 3584 rect 4065 3547 4123 3556 -rect 4249 3547 4307 3556 +rect 4249 3553 4261 3556 +rect 4295 3584 4307 3587 +rect 4522 3584 4528 3596 +rect 4295 3556 4528 3584 +rect 4295 3553 4307 3556 +rect 4249 3547 4307 3553 rect 4522 3544 4528 3556 rect 4580 3544 4586 3596 rect 4614 3585 4678 3596 -rect 4798 3585 4862 3596 -rect 4614 3557 4862 3585 +rect 4798 3587 4862 3596 +rect 4798 3585 4813 3587 +rect 4614 3557 4813 3585 rect 4614 3544 4678 3557 -rect 4798 3544 4862 3557 +rect 4798 3553 4813 3557 +rect 4847 3553 4862 3587 +rect 4798 3544 4862 3553 rect 4982 3544 4988 3596 rect 5040 3584 5046 3596 rect 5077 3584 5135 3593 -rect 5261 3584 5319 3593 -rect 5040 3556 5319 3584 +rect 5261 3587 5319 3593 +rect 5261 3584 5273 3587 +rect 5040 3556 5273 3584 rect 5040 3544 5046 3556 rect 5077 3547 5135 3556 -rect 5261 3547 5319 3556 +rect 5261 3553 5273 3556 +rect 5307 3553 5319 3587 +rect 5261 3547 5319 3553 rect 2222 3408 2228 3460 rect 2280 3448 2286 3460 rect 3438 3448 3466 3544 @@ -335,11 +355,16 @@ rect 2831 3131 2837 3143 rect 5902 3136 5908 3143 rect 5960 3136 5966 3188 rect 1397 2972 1455 2981 -rect 1581 2972 1639 2981 -rect 3050 2972 3056 2984 -rect 1397 2944 3056 2972 +rect 1581 2975 1639 2981 +rect 1581 2972 1593 2975 +rect 1397 2944 1593 2972 rect 1397 2935 1455 2944 -rect 1581 2935 1639 2944 +rect 1581 2941 1593 2944 +rect 1627 2972 1639 2975 +rect 3050 2972 3056 2984 +rect 1627 2944 3056 2972 +rect 1627 2941 1639 2944 +rect 1581 2935 1639 2941 rect 3050 2932 3056 2944 rect 3108 2932 3114 2984 rect 1670 2796 1676 2848 @@ -366,16 +391,22 @@ rect 4815 2437 4843 2468 rect 5442 2456 5448 2468 rect 5500 2456 5506 2508 rect 4617 2429 4675 2437 -rect 4801 2429 4859 2437 -rect 4617 2401 4859 2429 +rect 4801 2431 4859 2437 +rect 4801 2429 4813 2431 +rect 4617 2401 4813 2429 rect 4617 2391 4675 2401 -rect 4801 2391 4859 2401 +rect 4801 2397 4813 2401 +rect 4847 2397 4859 2431 +rect 4801 2391 4859 2397 rect 4890 2388 4896 2440 rect 4948 2428 4954 2440 -rect 5077 2428 5135 2437 -rect 4948 2400 5135 2428 +rect 5077 2431 5135 2437 +rect 5077 2428 5089 2431 +rect 4948 2400 5089 2428 rect 4948 2388 4954 2400 -rect 5077 2391 5135 2400 +rect 5077 2397 5089 2400 +rect 5123 2397 5135 2431 +rect 5077 2391 5135 2397 rect 2314 2320 2320 2372 rect 2372 2360 2378 2372 rect 6454 2360 6460 2372 @@ -405,47 +436,66 @@ rect 1268 1952 1274 1964 rect 1268 1924 2452 1952 rect 1268 1912 1274 1924 rect 1397 1884 1455 1893 -rect 1581 1884 1639 1893 -rect 1397 1856 1639 1884 +rect 1581 1887 1639 1893 +rect 1581 1884 1593 1887 +rect 1397 1856 1593 1884 rect 1397 1847 1455 1856 -rect 1581 1847 1639 1856 +rect 1581 1853 1593 1856 +rect 1627 1853 1639 1887 +rect 1581 1847 1639 1853 rect 1949 1884 2007 1893 -rect 2133 1884 2191 1893 -rect 2314 1884 2320 1896 -rect 1949 1856 2320 1884 +rect 2133 1887 2191 1893 +rect 2133 1884 2145 1887 +rect 1949 1856 2145 1884 rect 1949 1847 2007 1856 -rect 2133 1847 2191 1856 +rect 2133 1853 2145 1856 +rect 2179 1884 2191 1887 +rect 2314 1884 2320 1896 +rect 2179 1856 2320 1884 +rect 2179 1853 2191 1856 +rect 2133 1847 2191 1853 rect 1596 1816 1624 1847 rect 2314 1844 2320 1856 rect 2372 1844 2378 1896 rect 2424 1893 2452 1924 rect 2409 1884 2467 1893 -rect 2593 1884 2651 1893 -rect 2409 1856 2651 1884 +rect 2593 1887 2651 1893 +rect 2593 1884 2605 1887 +rect 2409 1856 2605 1884 rect 2409 1847 2467 1856 -rect 2593 1847 2651 1856 +rect 2593 1853 2605 1856 +rect 2639 1853 2651 1887 +rect 2593 1847 2651 1853 rect 2685 1884 2743 1893 -rect 2869 1884 2927 1893 +rect 2869 1887 2927 1893 +rect 2869 1884 2881 1887 +rect 2685 1856 2881 1884 +rect 2685 1847 2743 1856 +rect 2869 1853 2881 1856 +rect 2915 1884 2927 1887 rect 2976 1884 3004 1992 rect 3970 1980 3976 1992 rect 4028 1980 4034 2032 -rect 2685 1856 3004 1884 +rect 2915 1856 3004 1884 rect 3050 1884 3114 1896 rect 3234 1884 3240 1896 rect 3050 1856 3240 1884 -rect 2685 1847 2743 1856 -rect 2869 1847 2927 1856 +rect 2915 1853 2927 1856 +rect 2869 1847 2927 1853 rect 3050 1844 3114 1856 rect 3234 1844 3240 1856 rect 3292 1844 3298 1896 rect 3786 1844 3792 1896 rect 3844 1884 3850 1896 rect 3881 1884 3939 1893 -rect 4065 1884 4123 1893 -rect 3844 1856 4123 1884 +rect 4065 1887 4123 1893 +rect 4065 1884 4077 1887 +rect 3844 1856 4077 1884 rect 3844 1844 3850 1856 rect 3881 1847 3939 1856 -rect 4065 1847 4123 1856 +rect 4065 1853 4077 1856 +rect 4111 1853 4123 1887 +rect 4065 1847 4123 1853 rect 5442 1884 5506 1896 rect 5626 1884 5632 1896 rect 5442 1856 5632 1884 @@ -472,11 +522,14 @@ rect 1104 1584 5980 1606 rect 1118 1368 1124 1420 rect 1176 1408 1182 1420 rect 1489 1408 1547 1417 -rect 1673 1408 1731 1417 -rect 1176 1380 1731 1408 +rect 1673 1411 1731 1417 +rect 1673 1408 1685 1411 +rect 1176 1380 1685 1408 rect 1176 1368 1182 1380 rect 1489 1371 1547 1380 -rect 1673 1371 1731 1380 +rect 1673 1377 1685 1380 +rect 1719 1377 1731 1411 +rect 1673 1371 1731 1377 rect 2774 1408 2838 1420 rect 2958 1408 2964 1420 rect 2774 1380 2964 1408 @@ -536,7 +589,11 @@ rect 4296 4870 4348 4922 rect 4360 4870 4412 4922 rect 4424 4870 4476 4922 rect 2964 4632 3016 4684 -rect 3240 4632 3292 4684 +rect 3240 4675 3292 4684 +rect 3240 4641 3249 4675 +rect 3249 4641 3283 4675 +rect 3283 4641 3292 4675 +rect 3240 4632 3292 4641 rect 3884 4428 3936 4480 rect 4712 4428 4764 4480 rect 1794 4326 1846 4378 @@ -553,7 +610,11 @@ rect 5173 4326 5225 4378 rect 5237 4326 5289 4378 rect 3056 4224 3108 4276 rect 1400 4156 1452 4208 -rect 1584 4020 1636 4072 +rect 1584 4063 1636 4072 +rect 1584 4029 1593 4063 +rect 1593 4029 1627 4063 +rect 1627 4029 1636 4063 +rect 1584 4020 1636 4029 rect 2228 4088 2280 4140 rect 4068 4020 4120 4072 rect 5356 4020 5408 4072 @@ -568,10 +629,18 @@ rect 4360 3782 4412 3834 rect 4424 3782 4476 3834 rect 572 3680 624 3732 rect 4712 3680 4764 3732 -rect 1676 3544 1728 3596 +rect 1676 3587 1728 3596 +rect 1676 3553 1685 3587 +rect 1685 3553 1719 3587 +rect 1719 3553 1728 3587 +rect 1676 3544 1728 3553 rect 5908 3612 5960 3664 rect 2780 3544 2832 3596 -rect 3148 3544 3200 3596 +rect 3148 3587 3200 3596 +rect 3148 3553 3157 3587 +rect 3157 3553 3191 3587 +rect 3191 3553 3200 3587 +rect 3148 3544 3200 3553 rect 4528 3544 4580 3596 rect 4988 3544 5040 3596 rect 2228 3408 2280 3460 @@ -620,9 +689,17 @@ rect 5237 2150 5289 2202 rect 1216 1912 1268 1964 rect 2320 1844 2372 1896 rect 3976 1980 4028 2032 -rect 3240 1844 3292 1896 +rect 3240 1887 3292 1896 +rect 3240 1853 3249 1887 +rect 3249 1853 3283 1887 +rect 3283 1853 3292 1887 +rect 3240 1844 3292 1853 rect 3792 1844 3844 1896 -rect 5632 1844 5684 1896 +rect 5632 1887 5684 1896 +rect 5632 1853 5641 1887 +rect 5641 1853 5675 1887 +rect 5675 1853 5684 1887 +rect 5632 1844 5684 1853 rect 3240 1708 3292 1760 rect 2607 1606 2659 1658 rect 2671 1606 2723 1658 @@ -633,8 +710,16 @@ rect 4296 1606 4348 1658 rect 4360 1606 4412 1658 rect 4424 1606 4476 1658 rect 1124 1368 1176 1420 -rect 2964 1368 3016 1420 -rect 4620 1368 4672 1420 +rect 2964 1411 3016 1420 +rect 2964 1377 2973 1411 +rect 2973 1377 3007 1411 +rect 3007 1377 3016 1411 +rect 2964 1368 3016 1377 +rect 4620 1411 4672 1420 +rect 4620 1377 4629 1411 +rect 4629 1377 4663 1411 +rect 4663 1377 4672 1411 +rect 4620 1368 4672 1377 rect 1794 1062 1846 1114 rect 1858 1062 1910 1114 rect 1922 1062 1974 1114 @@ -2549,457 +2634,457 @@ rect 3660 1738 5049 1974 rect 5285 1738 5980 1974 rect 1104 1696 5980 1738 use sky130_fd_sc_hd__fill_1 FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1638025753 +timestamp 1692890899 transform 1 0 1380 0 -1 1632 box -38 -48 130 592 use sky130_fd_sc_hd__decap_8 FILLER_0_7 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1748 0 -1 1632 box -38 -48 774 592 use sky130_fd_sc_hd__decap_3 FILLER_0_15 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2484 0 -1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__decap_8 FILLER_0_21 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3036 0 -1 1632 box -38 -48 774 592 use sky130_fd_sc_hd__fill_2 FILLER_0_29 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3772 0 -1 1632 box -38 -48 222 592 use sky130_fd_sc_hd__decap_4 FILLER_0_32 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4048 0 -1 1632 box -38 -48 406 592 use sky130_fd_sc_hd__decap_8 FILLER_0_39 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4692 0 -1 1632 box -38 -48 774 592 use sky130_fd_sc_hd__decap_3 FILLER_0_47 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 5428 0 -1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__decap_3 FILLER_1_6 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 1656 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__fill_2 FILLER_1_12 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2208 0 1 1632 box -38 -48 222 592 use sky130_fd_sc_hd__fill_1 FILLER_1_20 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2944 0 1 1632 box -38 -48 130 592 use sky130_fd_sc_hd__decap_6 FILLER_1_24 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3312 0 1 1632 box -38 -48 590 592 use sky130_fd_sc_hd__decap_12 FILLER_1_33 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4140 0 1 1632 box -38 -48 1142 592 use sky130_fd_sc_hd__fill_2 FILLER_1_45 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 5244 0 1 1632 box -38 -48 222 592 use sky130_fd_sc_hd__decap_12 FILLER_2_3 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 1380 0 -1 2720 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_12 FILLER_2_15 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2484 0 -1 2720 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_4 FILLER_2_27 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3588 0 -1 2720 box -38 -48 406 592 use sky130_fd_sc_hd__decap_6 FILLER_2_32 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4048 0 -1 2720 box -38 -48 590 592 use sky130_fd_sc_hd__decap_6 FILLER_2_44 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 5152 0 -1 2720 box -38 -48 590 592 use sky130_fd_sc_hd__decap_12 FILLER_3_6 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 1656 0 1 2720 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_12 FILLER_3_18 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2760 0 1 2720 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_12 FILLER_3_30 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3864 0 1 2720 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_8 FILLER_3_42 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4968 0 1 2720 box -38 -48 774 592 use sky130_fd_sc_hd__fill_1 FILLER_4_3 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 1380 0 -1 3808 box -38 -48 130 592 use sky130_fd_sc_hd__decap_4 FILLER_4_10 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2024 0 -1 3808 box -38 -48 406 592 use sky130_fd_sc_hd__fill_1 FILLER_4_14 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2392 0 -1 3808 box -38 -48 130 592 use sky130_fd_sc_hd__fill_2 FILLER_4_18 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2760 0 -1 3808 box -38 -48 222 592 use sky130_fd_sc_hd__decap_4 FILLER_4_26 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3496 0 -1 3808 box -38 -48 406 592 use sky130_fd_sc_hd__fill_1 FILLER_4_30 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3864 0 -1 3808 box -38 -48 130 592 use sky130_fd_sc_hd__decap_3 FILLER_4_35 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4324 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__fill_2 FILLER_4_41 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4876 0 -1 3808 box -38 -48 222 592 use sky130_fd_sc_hd__decap_4 FILLER_4_46 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 5336 0 -1 3808 box -38 -48 406 592 use sky130_fd_sc_hd__fill_2 FILLER_5_6 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 1656 0 1 3808 box -38 -48 222 592 use sky130_fd_sc_hd__decap_12 FILLER_5_11 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2116 0 1 3808 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_8 FILLER_5_23 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3220 0 1 3808 box -38 -48 774 592 use sky130_fd_sc_hd__decap_3 FILLER_5_31 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3956 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__decap_6 FILLER_5_40 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4784 0 1 3808 box -38 -48 590 592 use sky130_fd_sc_hd__fill_1 FILLER_5_49 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 5612 0 1 3808 box -38 -48 130 592 use sky130_fd_sc_hd__decap_6 FILLER_6_3 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 1380 0 -1 4896 box -38 -48 590 592 use sky130_fd_sc_hd__decap_8 FILLER_6_12 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 2208 0 -1 4896 box -38 -48 774 592 use sky130_fd_sc_hd__fill_1 FILLER_6_20 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2944 0 -1 4896 box -38 -48 130 592 use sky130_fd_sc_hd__fill_1 FILLER_6_24 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3312 0 -1 4896 box -38 -48 130 592 use sky130_fd_sc_hd__decap_3 FILLER_6_28 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3680 0 -1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__decap_4 FILLER_6_32 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4048 0 -1 4896 box -38 -48 406 592 use sky130_fd_sc_hd__fill_1 FILLER_6_36 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4416 0 -1 4896 box -38 -48 130 592 use sky130_fd_sc_hd__decap_8 FILLER_6_40 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4784 0 -1 4896 box -38 -48 774 592 use sky130_fd_sc_hd__fill_2 FILLER_6_48 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 5520 0 -1 4896 box -38 -48 222 592 use sky130_fd_sc_hd__decap_12 FILLER_7_3 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 1380 0 1 4896 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_12 FILLER_7_15 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2484 0 1 4896 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_6 FILLER_7_27 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3588 0 1 4896 box -38 -48 590 592 use sky130_fd_sc_hd__decap_6 FILLER_7_36 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4416 0 1 4896 box -38 -48 590 592 use sky130_fd_sc_hd__fill_1 FILLER_7_42 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4968 0 1 4896 box -38 -48 130 592 use sky130_fd_sc_hd__decap_4 FILLER_7_46 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 5336 0 1 4896 box -38 -48 406 592 use sky130_fd_sc_hd__decap_12 FILLER_8_3 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 1380 0 -1 5984 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_12 FILLER_8_15 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 2484 0 -1 5984 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_4 FILLER_8_27 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 3588 0 -1 5984 box -38 -48 406 592 use sky130_fd_sc_hd__decap_12 FILLER_8_32 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 4048 0 -1 5984 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_6 FILLER_8_44 -timestamp 1638025753 +timestamp 1692890899 transform 1 0 5152 0 -1 5984 box -38 -48 590 592 -use sky130_fd_sc_hd__decap_3 PHY_0 -timestamp 1638025753 -transform 1 0 1104 0 -1 1632 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_1 -timestamp 1638025753 -transform -1 0 5980 0 -1 1632 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_2 -timestamp 1638025753 -transform 1 0 1104 0 1 1632 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_3 -timestamp 1638025753 -transform -1 0 5980 0 1 1632 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_4 -timestamp 1638025753 -transform 1 0 1104 0 -1 2720 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_5 -timestamp 1638025753 -transform -1 0 5980 0 -1 2720 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_6 -timestamp 1638025753 -transform 1 0 1104 0 1 2720 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_7 -timestamp 1638025753 -transform -1 0 5980 0 1 2720 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_8 -timestamp 1638025753 -transform 1 0 1104 0 -1 3808 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_9 -timestamp 1638025753 -transform -1 0 5980 0 -1 3808 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_10 -timestamp 1638025753 -transform 1 0 1104 0 1 3808 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_11 -timestamp 1638025753 -transform -1 0 5980 0 1 3808 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_12 -timestamp 1638025753 -transform 1 0 1104 0 -1 4896 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_13 -timestamp 1638025753 -transform -1 0 5980 0 -1 4896 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_14 -timestamp 1638025753 -transform 1 0 1104 0 1 4896 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_15 -timestamp 1638025753 -transform -1 0 5980 0 1 4896 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_16 -timestamp 1638025753 -transform 1 0 1104 0 -1 5984 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_17 -timestamp 1638025753 -transform -1 0 5980 0 -1 5984 -box -38 -48 314 592 -use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_18 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1638025753 -transform 1 0 3956 0 -1 1632 -box -38 -48 130 592 -use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_19 -timestamp 1638025753 -transform 1 0 3956 0 -1 2720 -box -38 -48 130 592 -use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_20 -timestamp 1638025753 -transform 1 0 3956 0 -1 3808 -box -38 -48 130 592 -use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_21 -timestamp 1638025753 -transform 1 0 3956 0 -1 4896 -box -38 -48 130 592 -use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_22 -timestamp 1638025753 -transform 1 0 3956 0 -1 5984 -box -38 -48 130 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1648946573 +timestamp 1692890899 transform 1 0 2392 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[1\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3036 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[2\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1840 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[3\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1380 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[4\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 5428 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[5\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4140 0 1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[6\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1380 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[7\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3864 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[8\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3220 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[9\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4876 0 -1 2720 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[10\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4232 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[11\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 2668 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[12\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4508 0 -1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[13\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4600 0 -1 2720 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[14\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 2484 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[15\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4416 0 -1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[16\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4600 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[17\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1472 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[18\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4508 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[19\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1932 0 -1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[20\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 2760 0 -1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[21\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3404 0 -1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[22\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 4048 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[23\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 5060 0 1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[24\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1748 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[25\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 2944 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[26\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 5060 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[27\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1472 0 -1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[28\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1932 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[29\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 5336 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[30\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3036 0 -1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[31\] -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1380 0 1 2720 box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_0 +timestamp 1692890899 +transform 1 0 1104 0 -1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_1 +timestamp 1692890899 +transform -1 0 5980 0 -1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_2 +timestamp 1692890899 +transform 1 0 1104 0 1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_3 +timestamp 1692890899 +transform -1 0 5980 0 1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_4 +timestamp 1692890899 +transform 1 0 1104 0 -1 2720 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_5 +timestamp 1692890899 +transform -1 0 5980 0 -1 2720 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_6 +timestamp 1692890899 +transform 1 0 1104 0 1 2720 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_7 +timestamp 1692890899 +transform -1 0 5980 0 1 2720 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_8 +timestamp 1692890899 +transform 1 0 1104 0 -1 3808 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_9 +timestamp 1692890899 +transform -1 0 5980 0 -1 3808 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_10 +timestamp 1692890899 +transform 1 0 1104 0 1 3808 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_11 +timestamp 1692890899 +transform -1 0 5980 0 1 3808 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_12 +timestamp 1692890899 +transform 1 0 1104 0 -1 4896 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_13 +timestamp 1692890899 +transform -1 0 5980 0 -1 4896 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_14 +timestamp 1692890899 +transform 1 0 1104 0 1 4896 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_15 +timestamp 1692890899 +transform -1 0 5980 0 1 4896 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_16 +timestamp 1692890899 +transform 1 0 1104 0 -1 5984 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_17 +timestamp 1692890899 +transform -1 0 5980 0 -1 5984 +box -38 -48 314 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_18 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1692890899 +transform 1 0 3956 0 -1 1632 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_19 +timestamp 1692890899 +transform 1 0 3956 0 -1 2720 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_20 +timestamp 1692890899 +transform 1 0 3956 0 -1 3808 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_21 +timestamp 1692890899 +transform 1 0 3956 0 -1 4896 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_22 +timestamp 1692890899 +transform 1 0 3956 0 -1 5984 +box -38 -48 130 592 << labels >> rlabel metal2 s 4066 6277 4122 7077 4 mask_rev[0] port 1 nsew diff --git a/mag/xres_buf.mag b/mag/xres_buf.mag index 70636ffb..f31eec12 100644 --- a/mag/xres_buf.mag +++ b/mag/xres_buf.mag @@ -2,6 +2,8 @@ magic tech sky130A magscale 1 2 timestamp 1678062433 +<< checkpaint >> +rect -846 -529 4782 4559 << isosubstrate >> rect 0 0 4000 3400 << viali >> @@ -236,67 +238,67 @@ rect 790 763 970 782 rect 2090 763 2270 1596 rect 2970 814 3150 3256 use sky130_fd_sc_hvl__diode_2 ANTENNA_lvlshiftdown_A $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1536 0 -1 3256 box -66 -43 258 897 use sky130_fd_sc_hvl__decap_8 FILLER_0_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1648946573 +timestamp 1692890899 transform 1 0 480 0 -1 1628 box -66 -43 834 897 use sky130_fd_sc_hvl__decap_8 FILLER_0_8 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1248 0 -1 1628 box -66 -43 834 897 use sky130_fd_sc_hvl__decap_8 FILLER_0_16 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 2016 0 -1 1628 box -66 -43 834 897 use sky130_fd_sc_hvl__decap_4 FILLER_0_24 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1648946573 +timestamp 1692890899 transform 1 0 2784 0 -1 1628 box -66 -43 450 897 use sky130_fd_sc_hvl__fill_2 FILLER_0_28 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3168 0 -1 1628 box -66 -43 258 897 use sky130_fd_sc_hvl__fill_1 FILLER_0_30 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3360 0 -1 1628 box -66 -43 162 897 use sky130_fd_sc_hvl__decap_8 FILLER_1_0 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 480 0 1 1628 box -66 -43 834 897 use sky130_fd_sc_hvl__decap_4 FILLER_1_8 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1248 0 1 1628 box -66 -43 450 897 use sky130_fd_sc_hvl__fill_1 FILLER_1_12 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1632 0 1 1628 box -66 -43 162 897 use sky130_fd_sc_hvl__fill_1 FILLER_1_30 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3360 0 1 1628 box -66 -43 162 897 use sky130_fd_sc_hvl__decap_8 FILLER_2_0 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 480 0 -1 3256 box -66 -43 834 897 use sky130_fd_sc_hvl__fill_2 FILLER_2_8 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1248 0 -1 3256 box -66 -43 258 897 use sky130_fd_sc_hvl__fill_1 FILLER_2_10 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1440 0 -1 3256 box -66 -43 162 897 use sky130_fd_sc_hvl__fill_1 FILLER_2_30 -timestamp 1648946573 +timestamp 1692890899 transform 1 0 3360 0 -1 3256 box -66 -43 162 897 use sky130_fd_sc_hvl__lsbufhv2lv_1 lvlshiftdown $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1648946573 +timestamp 1692890899 transform 1 0 1728 0 1 1628 box -66 -43 1698 1671 << labels >> diff --git a/scripts/run_chip_io_openframe_lvs.sh b/scripts/run_chip_io_openframe_lvs.sh index 4ace7136..a12d2220 100755 --- a/scripts/run_chip_io_openframe_lvs.sh +++ b/scripts/run_chip_io_openframe_lvs.sh @@ -2,7 +2,7 @@ # # Run LVS on the Openframe padframe layout and verilog. # If the layout netlist does not exist, then generate it from the -# extracted .mag layout of the caravel_openframe top level. The +# extracted .mag layout of the chip_io_openframe top level. The # LVS script for netgen will read both top level netlists and then # compare the padframe cell. # @@ -11,11 +11,11 @@ echo ${PDK_ROOT:=/usr/share/pdk} > /dev/null echo ${PDK:=sky130A} > /dev/null -if [ ! -f caravel_openframe.spice ]; then +if [ ! -f chip_io_openframe.spice ]; then magic -dnull -noconsole -rcfile $PDK_ROOT/$PDK/libs.tech/magic/$PDK.magicrc << EOF drc off crashbackups stop -load caravel_openframe +load chip_io_openframe select top cell expand extract do local @@ -40,11 +40,11 @@ cat > netgen.tcl << EOF # Load top level netlists puts stdout "Reading layout netlist:" -set circuit1 [readnet spice caravel_openframe.spice] +set circuit1 [readnet spice chip_io_openframe.spice] puts stdout "Reading verilog and schematic netlists:" puts stdout "Reading SPICE netlists of I/O:" set circuit2 [readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_fd_io.spice] -readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_ef_io.spice \$circuit2 +readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/cdl/sky130_ef_io.cdl \$circuit2 readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice \$circuit2 readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap_12.spice \$circuit2 readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice \$circuit2 @@ -61,8 +61,8 @@ readnet verilog ../verilog/gl/constant_block.v \$circuit2 readnet verilog ../verilog/gl/xres_buf.v \$circuit2 # ALSO NOTE: Top-level modules are in the RTL directory but are purely gate level. -readnet verilog ../verilog/rtl/chip_io_openframe.v \$circuit2 -readnet verilog ../verilog/rtl/caravel_openframe.v \$circuit2 +# readnet verilog ../verilog/rtl/chip_io_openframe.v \$circuit2 +readnet verilog ../verilog/gl/chip_io_openframe.v \$circuit2 puts stdout "Done reading netlists." # Run LVS on the chip_io_openframe cells in layout and verilog. diff --git a/scripts/run_openframe_lvs.sh b/scripts/run_openframe_lvs.sh index afb63a65..a7bbbfbe 100755 --- a/scripts/run_openframe_lvs.sh +++ b/scripts/run_openframe_lvs.sh @@ -44,7 +44,7 @@ set circuit1 [readnet spice caravel_openframe.spice] puts stdout "Reading verilog and schematic netlists:" puts stdout "Reading SPICE netlists of I/O:" set circuit2 [readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_fd_io.spice] -readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/spice/sky130_ef_io.spice \$circuit2 +readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/cdl/sky130_ef_io.cdl \$circuit2 readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_fd_sc_hd.spice \$circuit2 readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hd/spice/sky130_ef_sc_hd__decap_12.spice \$circuit2 readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice \$circuit2 diff --git a/verilog/rtl/chip_io_openframe.v b/verilog/rtl/chip_io_openframe.v index 9b5b5a3b..7ab67271 100644 --- a/verilog/rtl/chip_io_openframe.v +++ b/verilog/rtl/chip_io_openframe.v @@ -415,7 +415,7 @@ module chip_io_openframe #( /* Openframe pads (right side, power domain 1) */ - sky130_ef_io__gpiov2_pad_wrapped area1_gpio_pad [`MPRJ_IO_PADS_1 - 1:0] ( + sky130_ef_io__gpiov2_pad area1_gpio_pad [`MPRJ_IO_PADS_1 - 1:0] ( `USER1_ABUTMENT_PINS `ifndef TOP_ROUTING .PAD(gpio[`MPRJ_IO_PADS_1 - 1:0]), @@ -448,7 +448,7 @@ module chip_io_openframe #( /* Openframe pads (left side, power domain 2) */ - sky130_ef_io__gpiov2_pad_wrapped area2_gpio_pad [`MPRJ_IO_PADS_2 - 1:0] ( + sky130_ef_io__gpiov2_pad area2_gpio_pad [`MPRJ_IO_PADS_2 - 1:0] ( `USER2_ABUTMENT_PINS `ifndef TOP_ROUTING .PAD(gpio[`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2 - 1:`MPRJ_IO_PADS_1]), @@ -481,7 +481,7 @@ module chip_io_openframe #( /* Openframe pads (bottom side, power domain 0) */ - sky130_ef_io__gpiov2_pad_wrapped area0_gpio_pad [`OPENFRAME_IO_PADS - (`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2) - 1:0] ( + sky130_ef_io__gpiov2_pad area0_gpio_pad [`OPENFRAME_IO_PADS - (`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2) - 1:0] ( `MGMT_ABUTMENT_PINS `ifndef TOP_ROUTING .PAD(gpio[`OPENFRAME_IO_PADS - 1:`MPRJ_IO_PADS_1 + `MPRJ_IO_PADS_2]), From 849419d2e5d2fbaf2b38a164181b21867dd1e08e Mon Sep 17 00:00:00 2001 From: RTimothyEdwards Date: Mon, 25 Sep 2023 23:51:16 +0000 Subject: [PATCH 121/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index 367c1b6b..b404cdc5 100644 --- a/manifest +++ b/manifest @@ -22,7 +22,7 @@ ae07f0d87e69f4dd2026ed841e3a962facac847b verilog/rtl/caravel_openframe.v d97cb60c8d125d6098111d4f0aa00410515770eb verilog/rtl/caravel_power_routing.v bc1e961e41d1d3a383a018279a08bf4108911f53 verilog/rtl/chip_io.v f2242e1f295ee5efeacea51698f706a2cfd97c28 verilog/rtl/chip_io_alt.v -09740344da1a9bb76438165247c49b4795b94b9b verilog/rtl/chip_io_openframe.v +f97affcdbf268c61ada91eed6a2238e52e1b9889 verilog/rtl/chip_io_openframe.v 126aff02aa229dc346301c552d785dec76a4d68e verilog/rtl/clock_div.v 941bd7636e7558b045faa3d8c6ba2d91b4c4b798 verilog/rtl/constant_block.v 58fd210a64e502fb231d843eada4052f923d788d verilog/rtl/copyright_block.v From 7bfab382d8cdf7b91e24d2195b97c90bc2b7c8d2 Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Mon, 25 Sep 2023 20:10:37 -0400 Subject: [PATCH 122/138] After updating from the PR that adds the gate level chip_io_openframe.v, modified it so that it matches the modified chip_io_openframe layout in this PR (namely, the GPIO "_wrapped" pads are replaced with the equivalent non-wrapped base cells). --- verilog/gl/chip_io_openframe.v | 88 +++++++++++++++++----------------- 1 file changed, 44 insertions(+), 44 deletions(-) diff --git a/verilog/gl/chip_io_openframe.v b/verilog/gl/chip_io_openframe.v index 4c6baa57..1cfde7eb 100644 --- a/verilog/gl/chip_io_openframe.v +++ b/verilog/gl/chip_io_openframe.v @@ -393,7 +393,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, wire xres_loopback_zero; wire xres_vss_loop; wire xresloop; - sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[0] ( + sky130_ef_io__gpiov2_pad \area0_gpio_pad[0] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[38]), @@ -431,7 +431,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[38]) ); - sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[1] ( + sky130_ef_io__gpiov2_pad \area0_gpio_pad[1] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[39]), @@ -469,7 +469,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[39]) ); - sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[2] ( + sky130_ef_io__gpiov2_pad \area0_gpio_pad[2] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[40]), @@ -507,7 +507,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[40]) ); - sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[3] ( + sky130_ef_io__gpiov2_pad \area0_gpio_pad[3] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[41]), @@ -545,7 +545,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[41]) ); - sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[4] ( + sky130_ef_io__gpiov2_pad \area0_gpio_pad[4] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[42]), @@ -583,7 +583,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[42]) ); - sky130_ef_io__gpiov2_pad_wrapped \area0_gpio_pad[5] ( + sky130_ef_io__gpiov2_pad \area0_gpio_pad[5] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[43]), @@ -621,7 +621,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[43]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[0] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[0] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[0]), @@ -659,7 +659,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[0]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[10] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[10] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[10]), @@ -697,7 +697,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[10]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[11] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[11] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[11]), @@ -735,7 +735,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[11]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[12] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[12] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[12]), @@ -773,7 +773,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[12]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[13] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[13] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[13]), @@ -811,7 +811,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[13]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[14] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[14] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[14]), @@ -849,7 +849,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[14]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[15] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[15] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[15]), @@ -887,7 +887,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[15]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[16] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[16] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[16]), @@ -925,7 +925,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[16]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[17] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[17] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[17]), @@ -963,7 +963,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[17]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[18] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[18] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[18]), @@ -1001,7 +1001,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[18]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[1] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[1] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[1]), @@ -1039,7 +1039,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[1]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[2] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[2] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[2]), @@ -1077,7 +1077,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[2]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[3] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[3] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[3]), @@ -1115,7 +1115,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[3]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[4] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[4] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[4]), @@ -1153,7 +1153,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[4]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[5] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[5] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[5]), @@ -1191,7 +1191,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[5]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[6] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[6] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[6]), @@ -1229,7 +1229,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[6]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[7] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[7] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[7]), @@ -1267,7 +1267,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[7]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[8] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[8] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[8]), @@ -1305,7 +1305,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[8]) ); - sky130_ef_io__gpiov2_pad_wrapped \area1_gpio_pad[9] ( + sky130_ef_io__gpiov2_pad \area1_gpio_pad[9] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[9]), @@ -1343,7 +1343,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[9]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[0] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[0] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[19]), @@ -1381,7 +1381,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[19]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[10] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[10] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[29]), @@ -1419,7 +1419,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[29]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[11] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[11] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[30]), @@ -1457,7 +1457,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[30]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[12] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[12] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[31]), @@ -1495,7 +1495,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[31]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[13] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[13] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[32]), @@ -1533,7 +1533,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[32]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[14] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[14] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[33]), @@ -1571,7 +1571,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[33]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[15] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[15] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[34]), @@ -1609,7 +1609,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[34]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[16] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[16] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[35]), @@ -1647,7 +1647,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[35]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[17] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[17] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[36]), @@ -1685,7 +1685,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[36]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[18] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[18] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[37]), @@ -1723,7 +1723,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[37]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[1] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[1] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[20]), @@ -1761,7 +1761,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[20]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[2] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[2] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[21]), @@ -1799,7 +1799,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[21]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[3] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[3] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[22]), @@ -1837,7 +1837,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[22]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[4] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[4] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[23]), @@ -1875,7 +1875,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[23]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[5] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[5] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[24]), @@ -1913,7 +1913,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[24]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[6] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[6] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[25]), @@ -1951,7 +1951,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[25]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[7] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[7] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[26]), @@ -1989,7 +1989,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[26]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[8] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[8] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[27]), @@ -2027,7 +2027,7 @@ module chip_io_openframe(vddio_pad, vddio_pad2, vssio_pad, vssio_pad2, vccd_pad, .VSWITCH(vddio), .VTRIP_SEL(gpio_vtrip_sel[27]) ); - sky130_ef_io__gpiov2_pad_wrapped \area2_gpio_pad[9] ( + sky130_ef_io__gpiov2_pad \area2_gpio_pad[9] ( .AMUXBUS_A(analog_a), .AMUXBUS_B(analog_b), .ANALOG_EN(gpio_analog_en[28]), From 2251bad60f2f8515ee9ed993d258443a9d15dd5a Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Tue, 26 Sep 2023 12:50:50 -0400 Subject: [PATCH 123/138] Additional tidying up. All pins on the openframe wrapper are now consistent (all metal2 pins the same width and length and all metal3 pins the same width and length). The PR boundary was moved back to where it was, 0.28um from the pin ends; that causes overlap with the padframe but should not be an issue since the openframe wrapper is manually placed. All pins reach from 0.28um inside the boundary to the bottom of the comment layer (which is 2um wide). Some remaining pins which were not on a 10nm grid were corrected. --- def/openframe_project_wrapper.def | 3716 +++++++-------------------- mag/caravel_openframe.mag | 19 - mag/chip_io_gpio_connects.mag | 21 +- mag/chip_io_gpio_connects_horiz.mag | 14 +- mag/chip_io_openframe.mag | 2083 +++++++-------- mag/openframe_project_wrapper.mag | 3622 +++++++++++++------------- 6 files changed, 3672 insertions(+), 5803 deletions(-) diff --git a/def/openframe_project_wrapper.def b/def/openframe_project_wrapper.def index 12f219cb..806848c6 100644 --- a/def/openframe_project_wrapper.def +++ b/def/openframe_project_wrapper.def @@ -5,7 +5,7 @@ VERSION 5.7 ; DESIGN openframe_project_wrapper ; TECHNOLOGY sky130A ; UNITS DISTANCE MICRONS 1000 ; - DIEAREA ( 280 280 ) ( 3166350 4766350 ) ; + DIEAREA ( 0 0 ) ( 3166630 4766630 ) ; VIAS 0 ; END VIAS @@ -13,808 +13,820 @@ END VIAS COMPONENTS 0 ; END COMPONENTS -PINS 910 ; +PINS 914 ; - gpio_vtrip_sel[43] + NET gpio_vtrip_sel[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2429490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2429490 -860 ) N ; - gpio_analog_en[15] + NET gpio_analog_en[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2970160 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2970160 4767490 ) N ; - gpio_analog_pol[15] + NET gpio_analog_pol[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2963720 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2963720 4767490 ) N ; - gpio_analog_sel[15] + NET gpio_analog_sel[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2948540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2948540 4767490 ) N ; - gpio_dm0[15] + NET gpio_dm0[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2966940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2966940 4767490 ) N ; - gpio_dm1[15] + NET gpio_dm1[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2976140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2976140 4767490 ) N ; - gpio_dm2[15] + NET gpio_dm2[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2945320 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2945320 4767490 ) N ; - gpio_holdover[15] + NET gpio_holdover[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2942100 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2942100 4767490 ) N ; - gpio_ib_mode_sel[15] + NET gpio_ib_mode_sel[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2926920 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2926920 4767490 ) N ; - gpio_inp_dis[15] + NET gpio_inp_dis[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2960960 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2960960 4767490 ) N ; - gpio_oeb[15] + NET gpio_oeb[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2923700 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2923700 4767490 ) N ; - gpio_out[15] + NET gpio_out[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2939340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2939340 4767490 ) N ; - gpio_slow_sel[15] + NET gpio_slow_sel[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2985340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2985340 4767490 ) N ; - gpio_vtrip_sel[15] + NET gpio_vtrip_sel[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2930140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2930140 4767490 ) N ; - gpio_in[15] + NET gpio_in[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2994540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2994540 4767490 ) N ; - gpio_analog_en[16] + NET gpio_analog_en[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2461160 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2461160 4767490 ) N ; - gpio_analog_pol[16] + NET gpio_analog_pol[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2454720 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2454720 4767490 ) N ; - gpio_analog_sel[16] + NET gpio_analog_sel[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2439540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2439540 4767490 ) N ; - gpio_dm0[16] + NET gpio_dm0[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2457940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2457940 4767490 ) N ; - gpio_dm1[16] + NET gpio_dm1[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2467140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2467140 4767490 ) N ; - gpio_dm2[16] + NET gpio_dm2[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2436320 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2436320 4767490 ) N ; - gpio_holdover[16] + NET gpio_holdover[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2433100 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2433100 4767490 ) N ; - gpio_ib_mode_sel[16] + NET gpio_ib_mode_sel[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2417920 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2417920 4767490 ) N ; - gpio_inp_dis[16] + NET gpio_inp_dis[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2451960 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2451960 4767490 ) N ; - gpio_oeb[16] + NET gpio_oeb[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2414700 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2414700 4767490 ) N ; - gpio_out[16] + NET gpio_out[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2430340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2430340 4767490 ) N ; - gpio_slow_sel[16] + NET gpio_slow_sel[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2476340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2476340 4767490 ) N ; - gpio_vtrip_sel[16] + NET gpio_vtrip_sel[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2421140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2421140 4767490 ) N ; - gpio_in[16] + NET gpio_in[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2485540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2485540 4767490 ) N ; - gpio_dm1[17] + NET gpio_dm1[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2210140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2210140 4767490 ) N ; - gpio_dm2[17] + NET gpio_dm2[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2179320 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2179320 4767490 ) N ; - gpio_holdover[17] + NET gpio_holdover[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2176100 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2176100 4767490 ) N ; - gpio_ib_mode_sel[17] + NET gpio_ib_mode_sel[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2160920 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2160920 4767490 ) N ; - gpio_inp_dis[17] + NET gpio_inp_dis[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2194960 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2194960 4767490 ) N ; - gpio_oeb[17] + NET gpio_oeb[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2157700 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2157700 4767490 ) N ; - gpio_out[17] + NET gpio_out[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2173340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2173340 4767490 ) N ; - gpio_slow_sel[17] + NET gpio_slow_sel[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2219340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2219340 4767490 ) N ; - gpio_vtrip_sel[17] + NET gpio_vtrip_sel[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2164140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2164140 4767490 ) N ; - gpio_in[17] + NET gpio_in[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2228540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2228540 4767490 ) N ; - gpio_analog_en[18] + NET gpio_analog_en[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1759160 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1759160 4767490 ) N ; - gpio_analog_pol[18] + NET gpio_analog_pol[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1752720 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1752720 4767490 ) N ; - gpio_analog_sel[18] + NET gpio_analog_sel[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1737540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1737540 4767490 ) N ; - gpio_dm0[18] + NET gpio_dm0[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1755940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1755940 4767490 ) N ; - gpio_dm1[18] + NET gpio_dm1[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1765140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1765140 4767490 ) N ; - gpio_dm2[18] + NET gpio_dm2[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1734320 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1734320 4767490 ) N ; - gpio_holdover[18] + NET gpio_holdover[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1731100 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1731100 4767490 ) N ; - gpio_ib_mode_sel[18] + NET gpio_ib_mode_sel[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1715920 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1715920 4767490 ) N ; - gpio_inp_dis[18] + NET gpio_inp_dis[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1749960 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1749960 4767490 ) N ; - gpio_oeb[18] + NET gpio_oeb[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1712700 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1712700 4767490 ) N ; - gpio_out[18] + NET gpio_out[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1728340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1728340 4767490 ) N ; - gpio_slow_sel[18] + NET gpio_slow_sel[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1774340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1774340 4767490 ) N ; - gpio_vtrip_sel[18] + NET gpio_vtrip_sel[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1719140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1719140 4767490 ) N ; - gpio_in[18] + NET gpio_in[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1783540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1783540 4767490 ) N ; - gpio_analog_en[17] + NET gpio_analog_en[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2204160 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2204160 4767490 ) N ; - gpio_analog_pol[17] + NET gpio_analog_pol[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2197720 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2197720 4767490 ) N ; - gpio_analog_sel[17] + NET gpio_analog_sel[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2182540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2182540 4767490 ) N ; - gpio_dm0[17] + NET gpio_dm0[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2200940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2200940 4767490 ) N ; - gpio_slow_sel[19] + NET gpio_slow_sel[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1265340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1265340 4767490 ) N ; - gpio_vtrip_sel[19] + NET gpio_vtrip_sel[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1210140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1210140 4767490 ) N ; - gpio_in[19] + NET gpio_in[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1274540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1274540 4767490 ) N ; - gpio_analog_en[20] + NET gpio_analog_en[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 992160 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 992160 4767490 ) N ; - gpio_analog_pol[20] + NET gpio_analog_pol[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 985720 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 985720 4767490 ) N ; - gpio_analog_sel[20] + NET gpio_analog_sel[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 970540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 970540 4767490 ) N ; - gpio_dm0[20] + NET gpio_dm0[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 988940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 988940 4767490 ) N ; - gpio_dm1[20] + NET gpio_dm1[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 998140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 998140 4767490 ) N ; - gpio_dm2[20] + NET gpio_dm2[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 967320 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 967320 4767490 ) N ; - gpio_holdover[20] + NET gpio_holdover[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 964100 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 964100 4767490 ) N ; - gpio_ib_mode_sel[20] + NET gpio_ib_mode_sel[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 948920 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 948920 4767490 ) N ; - gpio_inp_dis[20] + NET gpio_inp_dis[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 982960 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 982960 4767490 ) N ; - gpio_oeb[20] + NET gpio_oeb[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 945700 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 945700 4767490 ) N ; - gpio_out[20] + NET gpio_out[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 961340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 961340 4767490 ) N ; - gpio_slow_sel[20] + NET gpio_slow_sel[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1007340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1007340 4767490 ) N ; - gpio_vtrip_sel[20] + NET gpio_vtrip_sel[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 952140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 952140 4767490 ) N ; - gpio_in[20] + NET gpio_in[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1016540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1016540 4767490 ) N ; - gpio_analog_en[19] + NET gpio_analog_en[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1250160 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1250160 4767490 ) N ; - gpio_analog_pol[19] + NET gpio_analog_pol[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1243720 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1243720 4767490 ) N ; - gpio_analog_sel[19] + NET gpio_analog_sel[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1228540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1228540 4767490 ) N ; - gpio_dm0[19] + NET gpio_dm0[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1246940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1246940 4767490 ) N ; - gpio_dm1[19] + NET gpio_dm1[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1256140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1256140 4767490 ) N ; - gpio_dm2[19] + NET gpio_dm2[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1225320 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1225320 4767490 ) N ; - gpio_holdover[19] + NET gpio_holdover[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1222100 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1222100 4767490 ) N ; - gpio_ib_mode_sel[19] + NET gpio_ib_mode_sel[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1206920 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1206920 4767490 ) N ; - gpio_inp_dis[19] + NET gpio_inp_dis[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1240960 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1240960 4767490 ) N ; - gpio_oeb[19] + NET gpio_oeb[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1203700 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1203700 4767490 ) N ; - gpio_out[19] + NET gpio_out[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1219340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1219340 4767490 ) N ; - gpio_in[21] + NET gpio_in[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 759540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 759540 4767490 ) N ; - gpio_analog_en[22] + NET gpio_analog_en[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 478160 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 478160 4767490 ) N ; - gpio_analog_pol[22] + NET gpio_analog_pol[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 471720 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 471720 4767490 ) N ; - gpio_analog_sel[22] + NET gpio_analog_sel[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 456540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 456540 4767490 ) N ; - gpio_dm0[22] + NET gpio_dm0[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 474940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 474940 4767490 ) N ; - gpio_dm1[22] + NET gpio_dm1[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 484140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 484140 4767490 ) N ; - gpio_dm2[22] + NET gpio_dm2[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 453320 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 453320 4767490 ) N ; - gpio_holdover[22] + NET gpio_holdover[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 450100 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 450100 4767490 ) N ; - gpio_ib_mode_sel[22] + NET gpio_ib_mode_sel[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 434920 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 434920 4767490 ) N ; - gpio_inp_dis[22] + NET gpio_inp_dis[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 468960 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 468960 4767490 ) N ; - gpio_oeb[22] + NET gpio_oeb[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 431700 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 431700 4767490 ) N ; - gpio_out[22] + NET gpio_out[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 447340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 447340 4767490 ) N ; - gpio_slow_sel[22] + NET gpio_slow_sel[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 493340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 493340 4767490 ) N ; - gpio_vtrip_sel[22] + NET gpio_vtrip_sel[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 438140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 438140 4767490 ) N ; - gpio_in[22] + NET gpio_in[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 502540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 502540 4767490 ) N ; - gpio_analog_en[23] + NET gpio_analog_en[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 221160 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 221160 4767490 ) N ; - gpio_analog_pol[23] + NET gpio_analog_pol[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 214720 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 214720 4767490 ) N ; - gpio_analog_sel[23] + NET gpio_analog_sel[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 199540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 199540 4767490 ) N ; - gpio_dm0[23] + NET gpio_dm0[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 217940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 217940 4767490 ) N ; - gpio_dm1[23] + NET gpio_dm1[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 227140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 227140 4767490 ) N ; - gpio_dm2[23] + NET gpio_dm2[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 196320 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 196320 4767490 ) N ; - gpio_holdover[23] + NET gpio_holdover[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 193100 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 193100 4767490 ) N ; - gpio_ib_mode_sel[23] + NET gpio_ib_mode_sel[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 177920 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 177920 4767490 ) N ; - gpio_inp_dis[23] + NET gpio_inp_dis[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 211960 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 211960 4767490 ) N ; - gpio_oeb[23] + NET gpio_oeb[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 174700 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 174700 4767490 ) N ; - gpio_out[23] + NET gpio_out[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 190340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 190340 4767490 ) N ; - gpio_slow_sel[23] + NET gpio_slow_sel[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 236340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 236340 4767490 ) N ; - gpio_vtrip_sel[23] + NET gpio_vtrip_sel[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 181140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 181140 4767490 ) N ; - gpio_in[23] + NET gpio_in[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 245540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 245540 4767490 ) N ; - gpio_analog_en[21] + NET gpio_analog_en[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 735160 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 735160 4767490 ) N ; - gpio_analog_pol[21] + NET gpio_analog_pol[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 728720 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 728720 4767490 ) N ; - gpio_analog_sel[21] + NET gpio_analog_sel[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 713540 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 713540 4767490 ) N ; - gpio_dm0[21] + NET gpio_dm0[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 731940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 731940 4767490 ) N ; - gpio_dm1[21] + NET gpio_dm1[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 741140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 741140 4767490 ) N ; - gpio_dm2[21] + NET gpio_dm2[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 710320 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 710320 4767490 ) N ; - gpio_holdover[21] + NET gpio_holdover[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 707100 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 707100 4767490 ) N ; - gpio_ib_mode_sel[21] + NET gpio_ib_mode_sel[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 691920 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 691920 4767490 ) N ; - gpio_inp_dis[21] + NET gpio_inp_dis[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 725960 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 725960 4767490 ) N ; - gpio_oeb[21] + NET gpio_oeb[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 688700 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 688700 4767490 ) N ; - gpio_out[21] + NET gpio_out[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 704340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 704340 4767490 ) N ; - gpio_slow_sel[21] + NET gpio_slow_sel[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 750340 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 750340 4767490 ) N ; - gpio_vtrip_sel[21] + NET gpio_vtrip_sel[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 695140 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 695140 4767490 ) N ; + - gpio_in[38] + NET gpio_in[38] + + PORT + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 726090 -860 ) N ; + - gpio_slow_sel[38] + NET gpio_slow_sel[38] + + PORT + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 735290 -860 ) N ; + - gpio_dm1[38] + NET gpio_dm1[38] + + PORT + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 744490 -860 ) N ; + - gpio_dm0[38] + NET gpio_dm0[38] + + PORT + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 753690 -860 ) N ; - gpio_analog_pol[38] + NET gpio_analog_pol[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 756910 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 756910 -860 ) N ; - gpio_analog_en[38] + NET gpio_analog_en[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 750470 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 750470 -860 ) N ; - gpio_inp_dis[38] + NET gpio_inp_dis[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 759670 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 759670 -860 ) N ; - gpio_analog_sel[38] + NET gpio_analog_sel[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 772090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 772090 -860 ) N ; - gpio_dm2[38] + NET gpio_dm2[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 775310 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 775310 -860 ) N ; - gpio_holdover[38] + NET gpio_holdover[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 778530 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 778530 -860 ) N ; - gpio_out[38] + NET gpio_out[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 781290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 781290 -860 ) N ; - gpio_vtrip_sel[38] + NET gpio_vtrip_sel[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 790490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 790490 -860 ) N ; - gpio_ib_mode_sel[38] + NET gpio_ib_mode_sel[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 793710 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 793710 -860 ) N ; - gpio_oeb[38] + NET gpio_oeb[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 796930 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 796930 -860 ) N ; - gpio_in[39] + NET gpio_in[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1269090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1269090 -860 ) N ; - gpio_slow_sel[39] + NET gpio_slow_sel[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1278290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1278290 -860 ) N ; - gpio_dm1[39] + NET gpio_dm1[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1287490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1287490 -860 ) N ; - gpio_dm0[39] + NET gpio_dm0[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1296690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1296690 -860 ) N ; - gpio_analog_pol[39] + NET gpio_analog_pol[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1299910 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1299910 -860 ) N ; - gpio_analog_en[39] + NET gpio_analog_en[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1293470 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1293470 -860 ) N ; - gpio_inp_dis[39] + NET gpio_inp_dis[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1302670 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1302670 -860 ) N ; - gpio_analog_sel[39] + NET gpio_analog_sel[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1315090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1315090 -860 ) N ; - gpio_dm2[39] + NET gpio_dm2[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1318310 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1318310 -860 ) N ; - gpio_holdover[39] + NET gpio_holdover[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1321530 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1321530 -860 ) N ; - gpio_out[39] + NET gpio_out[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1324290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1324290 -860 ) N ; - gpio_vtrip_sel[39] + NET gpio_vtrip_sel[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1333490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1333490 -860 ) N ; - gpio_ib_mode_sel[39] + NET gpio_ib_mode_sel[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1336710 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1336710 -860 ) N ; - gpio_oeb[39] + NET gpio_oeb[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1339930 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1339930 -860 ) N ; - gpio_in[40] + NET gpio_in[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1543090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1543090 -860 ) N ; - gpio_slow_sel[40] + NET gpio_slow_sel[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1552290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1552290 -860 ) N ; - gpio_dm1[40] + NET gpio_dm1[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1561490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1561490 -860 ) N ; - gpio_dm0[40] + NET gpio_dm0[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1570690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1570690 -860 ) N ; - gpio_analog_pol[40] + NET gpio_analog_pol[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1573910 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1573910 -860 ) N ; - gpio_analog_en[40] + NET gpio_analog_en[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1567470 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1567470 -860 ) N ; - gpio_inp_dis[40] + NET gpio_inp_dis[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1576670 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1576670 -860 ) N ; - gpio_analog_sel[40] + NET gpio_analog_sel[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1589090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1589090 -860 ) N ; - gpio_dm2[40] + NET gpio_dm2[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1592310 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1592310 -860 ) N ; - gpio_holdover[40] + NET gpio_holdover[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1595530 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1595530 -860 ) N ; - gpio_out[40] + NET gpio_out[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1598290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1598290 -860 ) N ; - gpio_vtrip_sel[40] + NET gpio_vtrip_sel[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1607490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1607490 -860 ) N ; - gpio_ib_mode_sel[40] + NET gpio_ib_mode_sel[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1610710 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1610710 -860 ) N ; - gpio_oeb[40] + NET gpio_oeb[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1613930 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1613930 -860 ) N ; - gpio_in[41] + NET gpio_in[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1817090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1817090 -860 ) N ; - gpio_slow_sel[41] + NET gpio_slow_sel[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1826290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1826290 -860 ) N ; - gpio_dm1[41] + NET gpio_dm1[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1835490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1835490 -860 ) N ; - gpio_dm0[41] + NET gpio_dm0[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1844690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1844690 -860 ) N ; - gpio_analog_pol[41] + NET gpio_analog_pol[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1847910 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1847910 -860 ) N ; - gpio_analog_en[41] + NET gpio_analog_en[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1841470 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1841470 -860 ) N ; - gpio_inp_dis[41] + NET gpio_inp_dis[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1850670 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1850670 -860 ) N ; - gpio_analog_sel[41] + NET gpio_analog_sel[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1863090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1863090 -860 ) N ; - gpio_dm2[41] + NET gpio_dm2[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1866310 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1866310 -860 ) N ; - gpio_holdover[41] + NET gpio_holdover[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1869530 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1869530 -860 ) N ; - gpio_out[41] + NET gpio_out[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1872290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1872290 -860 ) N ; - gpio_vtrip_sel[41] + NET gpio_vtrip_sel[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1881490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1881490 -860 ) N ; - gpio_ib_mode_sel[41] + NET gpio_ib_mode_sel[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1884710 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1884710 -860 ) N ; - gpio_oeb[41] + NET gpio_oeb[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1887930 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1887930 -860 ) N ; - gpio_in[42] + NET gpio_in[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2091090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2091090 -860 ) N ; - gpio_slow_sel[42] + NET gpio_slow_sel[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2100290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2100290 -860 ) N ; - gpio_dm1[42] + NET gpio_dm1[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2109490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2109490 -860 ) N ; - gpio_dm0[42] + NET gpio_dm0[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2118690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2118690 -860 ) N ; - gpio_analog_pol[42] + NET gpio_analog_pol[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2121910 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2121910 -860 ) N ; - gpio_analog_en[42] + NET gpio_analog_en[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2115470 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2115470 -860 ) N ; - gpio_inp_dis[42] + NET gpio_inp_dis[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2124670 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2124670 -860 ) N ; - gpio_analog_sel[42] + NET gpio_analog_sel[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2137090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2137090 -860 ) N ; - gpio_dm2[42] + NET gpio_dm2[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2140310 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2140310 -860 ) N ; - gpio_holdover[42] + NET gpio_holdover[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2143530 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2143530 -860 ) N ; - gpio_out[42] + NET gpio_out[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2146290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2146290 -860 ) N ; - gpio_vtrip_sel[42] + NET gpio_vtrip_sel[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2155490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2155490 -860 ) N ; - gpio_ib_mode_sel[42] + NET gpio_ib_mode_sel[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2158710 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2158710 -860 ) N ; - gpio_oeb[42] + NET gpio_oeb[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2161930 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2161930 -860 ) N ; - gpio_in[43] + NET gpio_in[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2365090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2365090 -860 ) N ; - gpio_slow_sel[43] + NET gpio_slow_sel[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2374290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2374290 -860 ) N ; - gpio_dm1[43] + NET gpio_dm1[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2383490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2383490 -860 ) N ; - gpio_dm0[43] + NET gpio_dm0[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2392690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2392690 -860 ) N ; - gpio_analog_pol[43] + NET gpio_analog_pol[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2395910 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2395910 -860 ) N ; - gpio_analog_en[43] + NET gpio_analog_en[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2389470 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2389470 -860 ) N ; - gpio_inp_dis[43] + NET gpio_inp_dis[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2398670 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2398670 -860 ) N ; - gpio_analog_sel[43] + NET gpio_analog_sel[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2411090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2411090 -860 ) N ; - gpio_dm2[43] + NET gpio_dm2[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2414310 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2414310 -860 ) N ; - gpio_holdover[43] + NET gpio_holdover[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2417530 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2417530 -860 ) N ; - gpio_out[43] + NET gpio_out[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2420290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2420290 -860 ) N ; - gpio_ib_mode_sel[43] + NET gpio_ib_mode_sel[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2432710 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2432710 -860 ) N ; - gpio_oeb[43] + NET gpio_oeb[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2435930 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2435930 -860 ) N ; - gpio_in_h[15] + NET gpio_in_h[15] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2920940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2920940 4767490 ) N ; - gpio_in_h[16] + NET gpio_in_h[16] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2411940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2411940 4767490 ) N ; - gpio_in_h[17] + NET gpio_in_h[17] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2154940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2154940 4767490 ) N ; - gpio_in_h[18] + NET gpio_in_h[18] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1709940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1709940 4767490 ) N ; - gpio_in_h[19] + NET gpio_in_h[19] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1200940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1200940 4767490 ) N ; - gpio_in_h[20] + NET gpio_in_h[20] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 942940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 942940 4767490 ) N ; - gpio_in_h[21] + NET gpio_in_h[21] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 685940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 685940 4767490 ) N ; - gpio_in_h[22] + NET gpio_in_h[22] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 428940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 428940 4767490 ) N ; - gpio_in_h[23] + NET gpio_in_h[23] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 171940 4767550 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 171940 4767490 ) N ; - gpio_in_h[38] + NET gpio_in_h[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 799690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 799690 -860 ) N ; - gpio_in_h[39] + NET gpio_in_h[39] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1342690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1342690 -860 ) N ; - gpio_in_h[40] + NET gpio_in_h[40] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1616690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1616690 -860 ) N ; - gpio_in_h[41] + NET gpio_in_h[41] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1890690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 1890690 -860 ) N ; - gpio_in_h[42] + NET gpio_in_h[42] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2164690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2164690 -860 ) N ; - gpio_in_h[43] + NET gpio_in_h[43] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 2438690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2438690 -860 ) N ; - vccd1 + NET vccd1 + PORT - + LAYER met3 ( -1250 -11655 ) ( 1250 11655 ) + PLACED ( 3167600 2125705 ) N ; + + LAYER met3 ( -1140 -11655 ) ( 1140 11655 ) + PLACED ( 3167490 2125705 ) N ; - vdda1 + NET vdda1 + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 3943870 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 3943870 ) N ; - vdda1 + NET vdda1 + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 2370870 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 2370870 ) N ; - vssa1 + NET vssa1 + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 1929870 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 1929870 ) N ; - vssa1 + NET vssa1 + PORT - + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2679760 4767600 ) N ; + + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2679760 4767490 ) N ; - vssio + NET vssio + PORT - + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 1468760 4767600 ) N ; + + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 1468760 4767490 ) N ; - vccd2 + NET vccd2 + PORT - + LAYER met3 ( -1250 -11975 ) ( 1250 11975 ) + PLACED ( -970 4412045 ) N ; + + LAYER met3 ( -1140 -11975 ) ( 1140 11975 ) + PLACED ( -860 4412045 ) N ; - vddio + NET vddio + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 4150760 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 4150760 ) N ; - vssa2 + NET vssa2 + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 3939760 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 3939760 ) N ; - vdda2 + NET vdda2 + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 2216760 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 2216760 ) N ; - vddio + NET vddio + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 352760 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 352760 ) N ; - vssio + NET vssio + PORT - + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2696870 -970 ) N ; + + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2696870 -860 ) N ; - vdda + NET vdda + PORT - + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2965870 -970 ) N ; + + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2965870 -860 ) N ; - analog_noesd_io[8] + NET analog_noesd_io[8] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 2780710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 2780710 ) N ; - gpio_loopback_one[24] + NET gpio_loopback_one[24] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 4533370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 4533370 ) N ; - gpio_loopback_one[25] + NET gpio_loopback_one[25] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3683370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3683370 ) N ; - gpio_loopback_one[26] + NET gpio_loopback_one[26] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3468370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3468370 ) N ; - gpio_loopback_one[27] + NET gpio_loopback_one[27] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3253370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3253370 ) N ; - gpio_loopback_one[28] + NET gpio_loopback_one[28] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3038370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3038370 ) N ; - gpio_loopback_one[29] + NET gpio_loopback_one[29] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2823370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2823370 ) N ; - gpio_loopback_one[30] + NET gpio_loopback_one[30] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2608370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2608370 ) N ; - gpio_loopback_one[31] + NET gpio_loopback_one[31] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2393370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2393370 ) N ; - gpio_loopback_one[32] + NET gpio_loopback_one[32] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1748370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1748370 ) N ; - gpio_loopback_one[33] + NET gpio_loopback_one[33] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1533370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1533370 ) N ; - gpio_loopback_one[34] + NET gpio_loopback_one[34] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1318370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1318370 ) N ; - gpio_loopback_one[35] + NET gpio_loopback_one[35] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1103370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1103370 ) N ; - gpio_loopback_one[36] + NET gpio_loopback_one[36] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 888370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 888370 ) N ; - gpio_loopback_one[37] + NET gpio_loopback_one[37] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 673370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 673370 ) N ; - gpio_loopback_one[43] + NET gpio_loopback_one[43] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 2442030 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 2442030 -860 ) N ; - gpio_loopback_zero[43] + NET gpio_loopback_zero[43] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 2463305 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 2463305 -860 ) N ; - gpio_loopback_one[42] + NET gpio_loopback_one[42] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 2168030 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 2168030 -860 ) N ; - gpio_loopback_zero[42] + NET gpio_loopback_zero[42] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 2189020 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 2189020 -860 ) N ; - gpio_loopback_one[41] + NET gpio_loopback_one[41] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1894030 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 1894030 -860 ) N ; - gpio_loopback_zero[41] + NET gpio_loopback_zero[41] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1915020 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 1915020 -860 ) N ; - gpio_loopback_one[40] + NET gpio_loopback_one[40] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1620030 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 1620030 -860 ) N ; - gpio_loopback_zero[40] + NET gpio_loopback_zero[40] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1640955 -620 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 1640955 -860 ) N ; - gpio_loopback_one[39] + NET gpio_loopback_one[39] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1346030 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 1346030 -860 ) N ; - gpio_loopback_zero[39] + NET gpio_loopback_zero[39] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 1366930 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 1366930 -860 ) N ; - gpio_loopback_one[38] + NET gpio_loopback_one[38] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 803030 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 803030 -860 ) N ; - gpio_loopback_zero[38] + NET gpio_loopback_zero[38] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 819085 -505 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 819085 -860 ) N ; - resetb_l + NET resetb_l + PORT - + LAYER met2 ( -140 -430 ) ( 140 430 ) + PLACED ( 550960 -150 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 550960 -860 ) N ; - resetb_h + NET resetb_h + PORT - + LAYER met2 ( -165 -365 ) ( 165 365 ) + PLACED ( 498020 -85 ) N ; + + LAYER met2 ( -165 -1140 ) ( 165 1140 ) + PLACED ( 498020 -860 ) N ; - por_l + NET por_l + PORT - + LAYER met3 ( -850 -175 ) ( 850 175 ) + PLACED ( -570 267035 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 267035 ) N ; - porb_l + NET porb_l + PORT - + LAYER met3 ( -850 -175 ) ( 850 175 ) + PLACED ( -570 268150 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 268150 ) N ; - mask_rev[0] + NET mask_rev[0] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3025540 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3025540 -860 ) N ; - porb_h + NET porb_h + PORT - + LAYER met3 ( -850 -175 ) ( 850 175 ) + PLACED ( -570 265910 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 265910 ) N ; - gpio_loopback_one[15] + NET gpio_loopback_one[15] + PORT + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2891640 4767490 ) N ; @@ -844,3769 +856,1907 @@ PINS 910 ; + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 147640 4767490 ) N ; - gpio_loopback_one[7] + NET gpio_loopback_one[7] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 2615180 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 2615180 ) N ; - gpio_loopback_one[6] + NET gpio_loopback_one[6] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1730180 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1730180 ) N ; - gpio_loopback_one[5] + NET gpio_loopback_one[5] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1505180 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1505180 ) N ; - gpio_loopback_one[4] + NET gpio_loopback_one[4] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1280180 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1280180 ) N ; - gpio_loopback_one[3] + NET gpio_loopback_one[3] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1055180 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1055180 ) N ; - gpio_loopback_one[2] + NET gpio_loopback_one[2] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 830180 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 830180 ) N ; - gpio_loopback_one[1] + NET gpio_loopback_one[1] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 605180 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 605180 ) N ; - gpio_loopback_one[0] + NET gpio_loopback_one[0] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 380180 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 380180 ) N ; - mask_rev[4] + NET mask_rev[4] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3030020 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3030020 -860 ) N ; - mask_rev[5] + NET mask_rev[5] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3031140 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3031140 -860 ) N ; - mask_rev[6] + NET mask_rev[6] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3032260 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3032260 -860 ) N ; - mask_rev[7] + NET mask_rev[7] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3033380 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3033380 -860 ) N ; - mask_rev[8] + NET mask_rev[8] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3034500 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3034500 -860 ) N ; - mask_rev[9] + NET mask_rev[9] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3035620 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3035620 -860 ) N ; - mask_rev[10] + NET mask_rev[10] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3036740 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3036740 -860 ) N ; - mask_rev[11] + NET mask_rev[11] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3037860 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3037860 -860 ) N ; - mask_rev[12] + NET mask_rev[12] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3038980 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3038980 -860 ) N ; - mask_rev[13] + NET mask_rev[13] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3040100 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3040100 -860 ) N ; - mask_rev[14] + NET mask_rev[14] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3041220 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3041220 -860 ) N ; - mask_rev[15] + NET mask_rev[15] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3042340 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3042340 -860 ) N ; - mask_rev[16] + NET mask_rev[16] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3043460 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3043460 -860 ) N ; - mask_rev[17] + NET mask_rev[17] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3044580 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3044580 -860 ) N ; - mask_rev[18] + NET mask_rev[18] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3045700 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3045700 -860 ) N ; - mask_rev[19] + NET mask_rev[19] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3046820 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3046820 -860 ) N ; - mask_rev[20] + NET mask_rev[20] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3047940 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3047940 -860 ) N ; - mask_rev[21] + NET mask_rev[21] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3049060 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3049060 -860 ) N ; - mask_rev[22] + NET mask_rev[22] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3050180 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3050180 -860 ) N ; - mask_rev[23] + NET mask_rev[23] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3051300 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3051300 -860 ) N ; - mask_rev[24] + NET mask_rev[24] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3052420 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3052420 -860 ) N ; - mask_rev[25] + NET mask_rev[25] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3053540 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3053540 -860 ) N ; - mask_rev[26] + NET mask_rev[26] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3054660 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3054660 -860 ) N ; - mask_rev[27] + NET mask_rev[27] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3055780 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3055780 -860 ) N ; - mask_rev[28] + NET mask_rev[28] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3056900 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3056900 -860 ) N ; - mask_rev[29] + NET mask_rev[29] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3058020 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3058020 -860 ) N ; - mask_rev[30] + NET mask_rev[30] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3059140 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3059140 -860 ) N ; - mask_rev[31] + NET mask_rev[31] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3060260 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3060260 -860 ) N ; - mask_rev[3] + NET mask_rev[3] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3028900 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3028900 -860 ) N ; - mask_rev[2] + NET mask_rev[2] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3027780 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3027780 -860 ) N ; - mask_rev[1] + NET mask_rev[1] + PORT - + LAYER met2 ( -130 -790 ) ( 130 790 ) + PLACED ( 3026660 -510 ) N ; + + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3026660 -860 ) N ; - gpio_loopback_zero[25] + NET gpio_loopback_zero[25] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3673370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3673370 ) N ; - gpio_loopback_zero[27] + NET gpio_loopback_zero[27] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3243370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3243370 ) N ; - gpio_loopback_zero[29] + NET gpio_loopback_zero[29] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2813370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2813370 ) N ; - gpio_loopback_zero[31] + NET gpio_loopback_zero[31] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2383370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2383370 ) N ; - gpio_loopback_zero[33] + NET gpio_loopback_zero[33] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1523370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1523370 ) N ; - gpio_loopback_zero[35] + NET gpio_loopback_zero[35] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1093370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1093370 ) N ; - gpio_loopback_zero[37] + NET gpio_loopback_zero[37] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 663370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 663370 ) N ; - gpio_loopback_zero[24] + NET gpio_loopback_zero[24] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 4523370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 4523370 ) N ; - gpio_loopback_zero[26] + NET gpio_loopback_zero[26] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3458370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3458370 ) N ; - gpio_loopback_zero[28] + NET gpio_loopback_zero[28] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 3028370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3028370 ) N ; - gpio_loopback_zero[30] + NET gpio_loopback_zero[30] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 2598370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2598370 ) N ; - gpio_loopback_zero[32] + NET gpio_loopback_zero[32] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1738370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1738370 ) N ; - gpio_loopback_zero[34] + NET gpio_loopback_zero[34] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 1308370 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1308370 ) N ; - gpio_loopback_zero[36] + NET gpio_loopback_zero[36] + PORT - + LAYER met3 ( -800 -150 ) ( 800 150 ) + PLACED ( -520 878370 ) N ; - - gpio_loopback_zero[23] + NET gpio_loopback_zero[23] - + PORT - + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 137635 4767490 ) N ; - - gpio_loopback_zero[22] + NET gpio_loopback_zero[22] - + PORT - + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 393635 4767490 ) N ; - - gpio_loopback_zero[21] + NET gpio_loopback_zero[21] - + PORT - + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 649635 4767490 ) N ; - - gpio_loopback_zero[20] + NET gpio_loopback_zero[20] - + PORT - + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 905635 4767490 ) N ; - - gpio_loopback_zero[19] + NET gpio_loopback_zero[19] - + PORT - + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 1161635 4767490 ) N ; - - gpio_loopback_zero[18] + NET gpio_loopback_zero[18] - + PORT - + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 1683635 4767490 ) N ; - - gpio_loopback_zero[17] + NET gpio_loopback_zero[17] - + PORT - + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2128635 4767490 ) N ; - - gpio_loopback_zero[16] + NET gpio_loopback_zero[16] - + PORT - + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2384635 4767490 ) N ; - - gpio_loopback_zero[15] + NET gpio_loopback_zero[15] - + PORT - + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2881635 4767490 ) N ; + + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 878370 ) N ; - gpio_slow_sel[38] + NET gpio_slow_sel[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 735290 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 735290 -860 ) N ; - gpio_in[38] + NET gpio_in[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 726090 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 726090 -860 ) N ; - vssa + NET vssa + PORT - + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 245870 -970 ) N ; + + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 245870 -860 ) N ; - analog_io[0] + NET analog_io[0] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 306510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 306510 ) N ; - analog_noesd_io[0] + NET analog_noesd_io[0] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 315710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 315710 ) N ; - analog_noesd_io[1] + NET analog_noesd_io[1] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 541710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 541710 ) N ; - analog_io[1] + NET analog_io[1] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 532510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 532510 ) N ; - analog_io[2] + NET analog_io[2] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 757510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 757510 ) N ; - analog_noesd_io[2] + NET analog_noesd_io[2] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 766710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 766710 ) N ; - analog_io[3] + NET analog_io[3] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 983510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 983510 ) N ; - analog_noesd_io[3] + NET analog_noesd_io[3] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 992710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 992710 ) N ; - analog_io[4] + NET analog_io[4] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 1208510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 1208510 ) N ; - analog_noesd_io[4] + NET analog_noesd_io[4] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 1217710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 1217710 ) N ; - analog_io[5] + NET analog_io[5] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 1433510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 1433510 ) N ; - analog_noesd_io[5] + NET analog_noesd_io[5] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 1442710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 1442710 ) N ; - analog_io[6] + NET analog_io[6] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 1659510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 1659510 ) N ; - analog_noesd_io[6] + NET analog_noesd_io[6] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 1668710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 1668710 ) N ; - analog_io[7] + NET analog_io[7] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 2545510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 2545510 ) N ; - analog_noesd_io[7] + NET analog_noesd_io[7] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 2554710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 2554710 ) N ; - analog_io[8] + NET analog_io[8] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 2771510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 2771510 ) N ; - analog_io[9] + NET analog_io[9] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 2996510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 2996510 ) N ; - analog_noesd_io[9] + NET analog_noesd_io[9] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 3005710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 3005710 ) N ; - analog_io[10] + NET analog_io[10] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 3222510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 3222510 ) N ; - analog_noesd_io[10] + NET analog_noesd_io[10] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 3231710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 3231710 ) N ; - analog_io[11] + NET analog_io[11] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 3447510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 3447510 ) N ; - analog_noesd_io[11] + NET analog_noesd_io[11] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 3456710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 3456710 ) N ; - analog_io[12] + NET analog_io[12] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 3672510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 3672510 ) N ; - analog_io[13] + NET analog_io[13] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 4118510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 4118510 ) N ; - analog_io[14] + NET analog_io[14] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( 3167550 4564510 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 4564510 ) N ; - analog_noesd_io[12] + NET analog_noesd_io[12] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 3681710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 3681710 ) N ; - analog_noesd_io[13] + NET analog_noesd_io[13] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 4127710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 4127710 ) N ; - analog_noesd_io[14] + NET analog_noesd_io[14] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( 3167550 4573710 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 4573710 ) N ; - analog_io[15] + NET analog_io[15] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 2982120 4767550 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 2982120 4767490 ) N ; - analog_io[16] + NET analog_io[16] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 2473120 4767550 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 2473120 4767490 ) N ; - analog_io[17] + NET analog_io[17] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 2216120 4767550 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 2216120 4767490 ) N ; - analog_io[18] + NET analog_io[18] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1771120 4767550 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 1771120 4767490 ) N ; - analog_io[19] + NET analog_io[19] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1262120 4767550 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 1262120 4767490 ) N ; - analog_io[20] + NET analog_io[20] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1004120 4767550 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 1004120 4767490 ) N ; - analog_io[21] + NET analog_io[21] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 747120 4767550 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 747120 4767490 ) N ; - analog_io[22] + NET analog_io[22] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 490120 4767550 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 490120 4767490 ) N ; - analog_io[23] + NET analog_io[23] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 233120 4767550 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 233120 4767490 ) N ; - analog_noesd_io[15] + NET analog_noesd_io[15] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 2972920 4767550 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 2972920 4767490 ) N ; - analog_noesd_io[16] + NET analog_noesd_io[16] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 2463920 4767550 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 2463920 4767490 ) N ; - analog_noesd_io[17] + NET analog_noesd_io[17] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 2206920 4767550 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 2206920 4767490 ) N ; - analog_noesd_io[18] + NET analog_noesd_io[18] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 1761920 4767550 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 1761920 4767490 ) N ; - analog_noesd_io[19] + NET analog_noesd_io[19] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 1252920 4767550 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 1252920 4767490 ) N ; - analog_noesd_io[20] + NET analog_noesd_io[20] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 994920 4767550 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 994920 4767490 ) N ; - analog_noesd_io[21] + NET analog_noesd_io[21] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 737920 4767550 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 737920 4767490 ) N ; - analog_noesd_io[22] + NET analog_noesd_io[22] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 480920 4767550 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 480920 4767490 ) N ; - analog_noesd_io[23] + NET analog_noesd_io[23] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 223920 4767550 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 223920 4767490 ) N ; - analog_io[25] + NET analog_io[25] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 3774120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 3774120 ) N ; - analog_io[26] + NET analog_io[26] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 3558120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 3558120 ) N ; - analog_io[27] + NET analog_io[27] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 3342120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 3342120 ) N ; - analog_io[28] + NET analog_io[28] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 3126120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 3126120 ) N ; - analog_io[29] + NET analog_io[29] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 2910120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 2910120 ) N ; - analog_io[30] + NET analog_io[30] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 2694120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 2694120 ) N ; - analog_io[31] + NET analog_io[31] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 2478120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 2478120 ) N ; - analog_io[32] + NET analog_io[32] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 1840120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 1840120 ) N ; - analog_io[33] + NET analog_io[33] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 1624120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 1624120 ) N ; - analog_io[34] + NET analog_io[34] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 1408120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 1408120 ) N ; - analog_io[35] + NET analog_io[35] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 1192120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 1192120 ) N ; - analog_io[36] + NET analog_io[36] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 976120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 976120 ) N ; - analog_io[37] + NET analog_io[37] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 760120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 760120 ) N ; - analog_noesd_io[25] + NET analog_noesd_io[25] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 3764920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 3764920 ) N ; - analog_noesd_io[26] + NET analog_noesd_io[26] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 3548920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 3548920 ) N ; - analog_noesd_io[27] + NET analog_noesd_io[27] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 3332920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 3332920 ) N ; - analog_noesd_io[28] + NET analog_noesd_io[28] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 3116920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 3116920 ) N ; - analog_noesd_io[29] + NET analog_noesd_io[29] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 2900920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 2900920 ) N ; - analog_noesd_io[30] + NET analog_noesd_io[30] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 2684920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 2684920 ) N ; - analog_noesd_io[32] + NET analog_noesd_io[32] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 1830920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 1830920 ) N ; - analog_noesd_io[33] + NET analog_noesd_io[33] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 1614920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 1614920 ) N ; - analog_noesd_io[34] + NET analog_noesd_io[34] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 1398920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 1398920 ) N ; - analog_noesd_io[35] + NET analog_noesd_io[35] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 1182920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 1182920 ) N ; - analog_noesd_io[36] + NET analog_noesd_io[36] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 966920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 966920 ) N ; - analog_noesd_io[37] + NET analog_noesd_io[37] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 750920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 750920 ) N ; - analog_io[39] + NET analog_io[39] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1281510 -920 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 1281510 -860 ) N ; - analog_io[40] + NET analog_io[40] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1555510 -920 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 1555510 -860 ) N ; - analog_io[41] + NET analog_io[41] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 1829510 -920 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 1829510 -860 ) N ; - analog_io[42] + NET analog_io[42] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 2103510 -920 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 2103510 -860 ) N ; - analog_io[43] + NET analog_io[43] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 2377510 -920 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 2377510 -860 ) N ; - analog_noesd_io[39] + NET analog_noesd_io[39] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 1290710 -920 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 1290710 -860 ) N ; - analog_noesd_io[40] + NET analog_noesd_io[40] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 1564710 -920 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 1564710 -860 ) N ; - analog_noesd_io[41] + NET analog_noesd_io[41] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 1838710 -920 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 1838710 -860 ) N ; - analog_noesd_io[42] + NET analog_noesd_io[42] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 2112710 -920 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 2112710 -860 ) N ; - analog_noesd_io[43] + NET analog_noesd_io[43] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 2386710 -920 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 2386710 -860 ) N ; - analog_noesd_io[38] + NET analog_noesd_io[38] + PORT - + LAYER met2 ( -535 -1200 ) ( 535 1200 ) + PLACED ( 747710 -920 ) N ; + + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 747710 -860 ) N ; - analog_io[38] + NET analog_io[38] + PORT - + LAYER met2 ( -320 -1200 ) ( 320 1200 ) + PLACED ( 738510 -920 ) N ; + + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 738510 -860 ) N ; - gpio_dm1[38] + NET gpio_dm1[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 744490 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 744490 -860 ) N ; - gpio_dm0[38] + NET gpio_dm0[38] + PORT - + LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 753690 -920 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 753690 -860 ) N ; - analog_noesd_io[31] + NET analog_noesd_io[31] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 2468920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 2468920 ) N ; - vssa1 + NET vssa1 + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 1879980 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 1879980 ) N ; - vssd1 + NET vssd1 + PORT - + LAYER met3 ( -1250 -11975 ) ( 1250 11975 ) + PLACED ( 3167600 2100585 ) N ; + + LAYER met3 ( -1140 -11975 ) ( 1140 11975 ) + PLACED ( 3167490 2100585 ) N ; - vssd1 + NET vssd1 + PORT - + LAYER met3 ( -1250 -12000 ) ( 1250 12000 ) + PLACED ( 3167600 2150810 ) N ; + + LAYER met3 ( -1140 -12000 ) ( 1140 12000 ) + PLACED ( 3167490 2150810 ) N ; - vdda1 + NET vdda1 + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 2320970 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 2320970 ) N ; - gpio_loopback_one[8] + NET gpio_loopback_one[8] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 2840185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 2840185 ) N ; - gpio_loopback_one[9] + NET gpio_loopback_one[9] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3065185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3065185 ) N ; - gpio_loopback_one[10] + NET gpio_loopback_one[10] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3290185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3290185 ) N ; - gpio_loopback_one[11] + NET gpio_loopback_one[11] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3515185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3515185 ) N ; - gpio_loopback_one[12] + NET gpio_loopback_one[12] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3740185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3740185 ) N ; - vdda1 + NET vdda1 + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( 3167600 3893980 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 3893980 ) N ; - gpio_loopback_one[13] + NET gpio_loopback_one[13] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 4185185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 4185185 ) N ; - gpio_loopback_one[14] + NET gpio_loopback_one[14] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 4635185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 4635185 ) N ; - vssa1 + NET vssa1 + PORT - + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2729660 4767600 ) N ; + + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2729660 4767490 ) N ; - vssio + NET vssio + PORT - + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 1518660 4767600 ) N ; + + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 1518660 4767490 ) N ; - vssd2 + NET vssd2 + PORT - + LAYER met3 ( -1250 -11655 ) ( 1250 11655 ) + PLACED ( -970 4386925 ) N ; + + LAYER met3 ( -1140 -11655 ) ( 1140 11655 ) + PLACED ( -860 4386925 ) N ; - vccd2 + NET vccd2 + PORT - + LAYER met3 ( -1250 -12000 ) ( 1250 12000 ) + PLACED ( -970 4361820 ) N ; + + LAYER met3 ( -1140 -12000 ) ( 1140 12000 ) + PLACED ( -860 4361820 ) N ; - vddio + NET vddio + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 4200660 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 4200660 ) N ; - vssa2 + NET vssa2 + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 3989660 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 3989660 ) N ; - gpio_in[25] + NET gpio_in[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3786535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3786535 ) N ; - gpio_slow_sel[25] + NET gpio_slow_sel[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3777335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3777335 ) N ; - gpio_dm1[25] + NET gpio_dm1[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3768135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3768135 ) N ; - gpio_analog_en[25] + NET gpio_analog_en[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3762155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3762155 ) N ; - gpio_dm0[25] + NET gpio_dm0[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3758935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3758935 ) N ; - gpio_analog_pol[25] + NET gpio_analog_pol[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3755715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3755715 ) N ; - gpio_inp_dis[25] + NET gpio_inp_dis[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3752955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3752955 ) N ; - gpio_analog_sel[25] + NET gpio_analog_sel[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3740535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3740535 ) N ; - gpio_dm2[25] + NET gpio_dm2[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3737315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3737315 ) N ; - gpio_holdover[25] + NET gpio_holdover[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3734095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3734095 ) N ; - gpio_out[25] + NET gpio_out[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3731335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3731335 ) N ; - gpio_vtrip_sel[25] + NET gpio_vtrip_sel[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3722135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3722135 ) N ; - gpio_ib_mode_sel[25] + NET gpio_ib_mode_sel[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3718915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3718915 ) N ; - gpio_oeb[25] + NET gpio_oeb[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3715695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3715695 ) N ; - gpio_in_h[25] + NET gpio_in_h[25] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3712935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3712935 ) N ; - gpio_in[26] + NET gpio_in[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3570535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3570535 ) N ; - gpio_slow_sel[26] + NET gpio_slow_sel[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3561335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3561335 ) N ; - gpio_dm1[26] + NET gpio_dm1[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3552135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3552135 ) N ; - gpio_analog_en[26] + NET gpio_analog_en[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3546155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3546155 ) N ; - gpio_dm0[26] + NET gpio_dm0[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3542935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3542935 ) N ; - gpio_analog_pol[26] + NET gpio_analog_pol[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3539715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3539715 ) N ; - gpio_inp_dis[26] + NET gpio_inp_dis[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3536955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3536955 ) N ; - gpio_analog_sel[26] + NET gpio_analog_sel[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3524535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3524535 ) N ; - gpio_dm2[26] + NET gpio_dm2[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3521315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3521315 ) N ; - gpio_holdover[26] + NET gpio_holdover[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3518095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3518095 ) N ; - gpio_out[26] + NET gpio_out[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3515335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3515335 ) N ; - gpio_vtrip_sel[26] + NET gpio_vtrip_sel[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3506135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3506135 ) N ; - gpio_ib_mode_sel[26] + NET gpio_ib_mode_sel[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3502915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3502915 ) N ; - gpio_oeb[26] + NET gpio_oeb[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3499695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3499695 ) N ; - gpio_in_h[26] + NET gpio_in_h[26] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3496935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3496935 ) N ; - gpio_vtrip_sel[37] + NET gpio_vtrip_sel[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 708135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 708135 ) N ; - gpio_analog_en[37] + NET gpio_analog_en[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 748155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 748155 ) N ; - gpio_analog_pol[37] + NET gpio_analog_pol[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 741715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 741715 ) N ; - gpio_analog_sel[37] + NET gpio_analog_sel[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 726535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 726535 ) N ; - gpio_dm0[37] + NET gpio_dm0[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 744935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 744935 ) N ; - gpio_dm2[37] + NET gpio_dm2[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 723315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 723315 ) N ; - gpio_holdover[37] + NET gpio_holdover[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 720095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 720095 ) N ; - gpio_ib_mode_sel[37] + NET gpio_ib_mode_sel[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 704915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 704915 ) N ; - gpio_oeb[37] + NET gpio_oeb[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 701695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 701695 ) N ; - gpio_out[37] + NET gpio_out[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 717335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 717335 ) N ; - gpio_inp_dis[37] + NET gpio_inp_dis[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 738955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 738955 ) N ; - gpio_in_h[37] + NET gpio_in_h[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 698935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 698935 ) N ; - gpio_dm1[37] + NET gpio_dm1[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 754135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 754135 ) N ; - gpio_slow_sel[37] + NET gpio_slow_sel[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 763335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 763335 ) N ; - gpio_in[37] + NET gpio_in[37] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 772535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 772535 ) N ; - gpio_dm2[36] + NET gpio_dm2[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 939315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 939315 ) N ; - gpio_holdover[36] + NET gpio_holdover[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 936095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 936095 ) N ; - gpio_ib_mode_sel[36] + NET gpio_ib_mode_sel[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 920915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 920915 ) N ; - gpio_inp_dis[36] + NET gpio_inp_dis[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 954955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 954955 ) N ; - gpio_oeb[36] + NET gpio_oeb[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 917695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 917695 ) N ; - gpio_out[36] + NET gpio_out[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 933335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 933335 ) N ; - gpio_vtrip_sel[36] + NET gpio_vtrip_sel[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 924135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 924135 ) N ; - gpio_analog_en[36] + NET gpio_analog_en[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 964155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 964155 ) N ; - gpio_analog_pol[36] + NET gpio_analog_pol[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 957715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 957715 ) N ; - gpio_analog_sel[36] + NET gpio_analog_sel[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 942535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 942535 ) N ; - gpio_dm0[36] + NET gpio_dm0[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 960935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 960935 ) N ; - gpio_in_h[36] + NET gpio_in_h[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 914935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 914935 ) N ; - gpio_dm1[36] + NET gpio_dm1[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 970135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 970135 ) N ; - gpio_slow_sel[36] + NET gpio_slow_sel[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 979335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 979335 ) N ; - gpio_in[36] + NET gpio_in[36] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 988535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 988535 ) N ; - gpio_analog_en[35] + NET gpio_analog_en[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1180155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1180155 ) N ; - gpio_analog_pol[35] + NET gpio_analog_pol[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1173715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1173715 ) N ; - gpio_analog_sel[35] + NET gpio_analog_sel[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1158535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1158535 ) N ; - gpio_dm0[35] + NET gpio_dm0[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1176935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1176935 ) N ; - gpio_dm2[35] + NET gpio_dm2[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1155315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1155315 ) N ; - gpio_holdover[35] + NET gpio_holdover[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1152095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1152095 ) N ; - gpio_ib_mode_sel[35] + NET gpio_ib_mode_sel[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1136915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1136915 ) N ; - gpio_inp_dis[35] + NET gpio_inp_dis[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1170955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1170955 ) N ; - gpio_oeb[35] + NET gpio_oeb[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1133695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1133695 ) N ; - gpio_out[35] + NET gpio_out[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1149335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1149335 ) N ; - gpio_vtrip_sel[35] + NET gpio_vtrip_sel[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1140135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1140135 ) N ; - gpio_in_h[35] + NET gpio_in_h[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1130935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1130935 ) N ; - gpio_dm1[35] + NET gpio_dm1[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1186135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1186135 ) N ; - gpio_slow_sel[35] + NET gpio_slow_sel[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1195335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1195335 ) N ; - gpio_in[35] + NET gpio_in[35] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1204535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1204535 ) N ; - gpio_analog_en[34] + NET gpio_analog_en[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1396155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1396155 ) N ; - gpio_analog_pol[34] + NET gpio_analog_pol[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1389715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1389715 ) N ; - gpio_analog_sel[34] + NET gpio_analog_sel[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1374535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1374535 ) N ; - gpio_dm0[34] + NET gpio_dm0[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1392935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1392935 ) N ; - gpio_dm2[34] + NET gpio_dm2[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1371315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1371315 ) N ; - gpio_holdover[34] + NET gpio_holdover[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1368095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1368095 ) N ; - gpio_ib_mode_sel[34] + NET gpio_ib_mode_sel[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1352915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1352915 ) N ; - gpio_inp_dis[34] + NET gpio_inp_dis[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1386955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1386955 ) N ; - gpio_oeb[34] + NET gpio_oeb[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1349695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1349695 ) N ; - gpio_out[34] + NET gpio_out[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1365335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1365335 ) N ; - gpio_vtrip_sel[34] + NET gpio_vtrip_sel[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1356135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1356135 ) N ; - gpio_in_h[34] + NET gpio_in_h[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1346935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1346935 ) N ; - gpio_dm1[34] + NET gpio_dm1[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1402135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1402135 ) N ; - gpio_slow_sel[34] + NET gpio_slow_sel[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1411335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1411335 ) N ; - gpio_in[34] + NET gpio_in[34] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1420535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1420535 ) N ; - gpio_analog_en[33] + NET gpio_analog_en[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1612155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1612155 ) N ; - gpio_analog_sel[33] + NET gpio_analog_sel[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1590535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1590535 ) N ; - gpio_dm2[33] + NET gpio_dm2[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1587315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1587315 ) N ; - gpio_dm0[33] + NET gpio_dm0[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1608935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1608935 ) N ; - gpio_holdover[33] + NET gpio_holdover[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1584095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1584095 ) N ; - gpio_ib_mode_sel[33] + NET gpio_ib_mode_sel[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1568915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1568915 ) N ; - gpio_inp_dis[33] + NET gpio_inp_dis[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1602955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1602955 ) N ; - gpio_oeb[33] + NET gpio_oeb[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1565695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1565695 ) N ; - gpio_out[33] + NET gpio_out[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1581335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1581335 ) N ; - gpio_vtrip_sel[33] + NET gpio_vtrip_sel[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1572135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1572135 ) N ; - gpio_in_h[33] + NET gpio_in_h[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1562935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1562935 ) N ; - gpio_analog_pol[33] + NET gpio_analog_pol[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1605715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1605715 ) N ; - gpio_dm1[33] + NET gpio_dm1[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1618135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1618135 ) N ; - gpio_slow_sel[33] + NET gpio_slow_sel[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1627335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1627335 ) N ; - gpio_in[33] + NET gpio_in[33] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1636535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1636535 ) N ; - gpio_analog_en[32] + NET gpio_analog_en[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1828155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1828155 ) N ; - gpio_analog_pol[32] + NET gpio_analog_pol[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1821715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1821715 ) N ; - gpio_analog_sel[32] + NET gpio_analog_sel[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1806535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1806535 ) N ; - gpio_dm0[32] + NET gpio_dm0[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1824935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1824935 ) N ; - gpio_dm2[32] + NET gpio_dm2[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1803315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1803315 ) N ; - gpio_holdover[32] + NET gpio_holdover[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1800095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1800095 ) N ; - gpio_ib_mode_sel[32] + NET gpio_ib_mode_sel[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1784915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1784915 ) N ; - gpio_inp_dis[32] + NET gpio_inp_dis[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1818955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1818955 ) N ; - gpio_oeb[32] + NET gpio_oeb[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1781695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1781695 ) N ; - gpio_out[32] + NET gpio_out[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1797335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1797335 ) N ; - gpio_vtrip_sel[32] + NET gpio_vtrip_sel[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1788135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1788135 ) N ; - gpio_in_h[32] + NET gpio_in_h[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1778935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1778935 ) N ; - gpio_dm1[32] + NET gpio_dm1[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1834135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1834135 ) N ; - gpio_slow_sel[32] + NET gpio_slow_sel[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1843335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1843335 ) N ; - gpio_in[32] + NET gpio_in[32] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 1852535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1852535 ) N ; - gpio_analog_en[31] + NET gpio_analog_en[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2466155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2466155 ) N ; - gpio_analog_pol[31] + NET gpio_analog_pol[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2459715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2459715 ) N ; - gpio_analog_sel[31] + NET gpio_analog_sel[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2444535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2444535 ) N ; - gpio_dm0[31] + NET gpio_dm0[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2462935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2462935 ) N ; - gpio_dm2[31] + NET gpio_dm2[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2441315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2441315 ) N ; - gpio_holdover[31] + NET gpio_holdover[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2438095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2438095 ) N ; - gpio_ib_mode_sel[31] + NET gpio_ib_mode_sel[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2422915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2422915 ) N ; - gpio_inp_dis[31] + NET gpio_inp_dis[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2456955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2456955 ) N ; - gpio_oeb[31] + NET gpio_oeb[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2419695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2419695 ) N ; - gpio_out[31] + NET gpio_out[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2435335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2435335 ) N ; - gpio_vtrip_sel[31] + NET gpio_vtrip_sel[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2426135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2426135 ) N ; - gpio_in_h[31] + NET gpio_in_h[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2416935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2416935 ) N ; - gpio_dm1[31] + NET gpio_dm1[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2472135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2472135 ) N ; - gpio_slow_sel[31] + NET gpio_slow_sel[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2481335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2481335 ) N ; - gpio_in[31] + NET gpio_in[31] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2490535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2490535 ) N ; - gpio_dm0[30] + NET gpio_dm0[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2678935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2678935 ) N ; - gpio_dm2[30] + NET gpio_dm2[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2657315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2657315 ) N ; - gpio_holdover[30] + NET gpio_holdover[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2654095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2654095 ) N ; - gpio_ib_mode_sel[30] + NET gpio_ib_mode_sel[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2638915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2638915 ) N ; - gpio_inp_dis[30] + NET gpio_inp_dis[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2672955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2672955 ) N ; - gpio_oeb[30] + NET gpio_oeb[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2635695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2635695 ) N ; - gpio_out[30] + NET gpio_out[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2651335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2651335 ) N ; - gpio_vtrip_sel[30] + NET gpio_vtrip_sel[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2642135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2642135 ) N ; - gpio_analog_en[30] + NET gpio_analog_en[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2682155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2682155 ) N ; - gpio_analog_pol[30] + NET gpio_analog_pol[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2675715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2675715 ) N ; - gpio_analog_sel[30] + NET gpio_analog_sel[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2660535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2660535 ) N ; - gpio_in_h[30] + NET gpio_in_h[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2632935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2632935 ) N ; - gpio_dm1[30] + NET gpio_dm1[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2688135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2688135 ) N ; - gpio_slow_sel[30] + NET gpio_slow_sel[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2697335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2697335 ) N ; - gpio_in[30] + NET gpio_in[30] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2706535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2706535 ) N ; - gpio_analog_sel[29] + NET gpio_analog_sel[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2876535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2876535 ) N ; - gpio_dm2[29] + NET gpio_dm2[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2873315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2873315 ) N ; - gpio_holdover[29] + NET gpio_holdover[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2870095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2870095 ) N ; - gpio_ib_mode_sel[29] + NET gpio_ib_mode_sel[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2854915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2854915 ) N ; - gpio_oeb[29] + NET gpio_oeb[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2851695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2851695 ) N ; - gpio_out[29] + NET gpio_out[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2867335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2867335 ) N ; - gpio_vtrip_sel[29] + NET gpio_vtrip_sel[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2858135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2858135 ) N ; - gpio_in_h[29] + NET gpio_in_h[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2848935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2848935 ) N ; - gpio_analog_en[29] + NET gpio_analog_en[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2898155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2898155 ) N ; - gpio_analog_pol[29] + NET gpio_analog_pol[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2891715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2891715 ) N ; - gpio_dm0[29] + NET gpio_dm0[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2894935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2894935 ) N ; - gpio_inp_dis[29] + NET gpio_inp_dis[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2888955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2888955 ) N ; - gpio_dm1[29] + NET gpio_dm1[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2904135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2904135 ) N ; - gpio_slow_sel[29] + NET gpio_slow_sel[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2913335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2913335 ) N ; - gpio_in[29] + NET gpio_in[29] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 2922535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2922535 ) N ; - gpio_analog_en[28] + NET gpio_analog_en[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3114155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3114155 ) N ; - gpio_analog_pol[28] + NET gpio_analog_pol[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3107715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3107715 ) N ; - gpio_analog_sel[28] + NET gpio_analog_sel[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3092535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3092535 ) N ; - gpio_dm0[28] + NET gpio_dm0[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3110935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3110935 ) N ; - gpio_dm2[28] + NET gpio_dm2[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3089315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3089315 ) N ; - gpio_holdover[28] + NET gpio_holdover[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3086095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3086095 ) N ; - gpio_ib_mode_sel[28] + NET gpio_ib_mode_sel[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3070915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3070915 ) N ; - gpio_inp_dis[28] + NET gpio_inp_dis[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3104955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3104955 ) N ; - gpio_oeb[28] + NET gpio_oeb[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3067695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3067695 ) N ; - gpio_out[28] + NET gpio_out[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3083335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3083335 ) N ; - gpio_vtrip_sel[28] + NET gpio_vtrip_sel[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3074135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3074135 ) N ; - gpio_in_h[28] + NET gpio_in_h[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3064935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3064935 ) N ; - gpio_dm1[28] + NET gpio_dm1[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3120135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3120135 ) N ; - gpio_slow_sel[28] + NET gpio_slow_sel[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3129335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3129335 ) N ; - gpio_in[28] + NET gpio_in[28] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3138535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3138535 ) N ; - gpio_analog_en[27] + NET gpio_analog_en[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3330155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3330155 ) N ; - gpio_analog_pol[27] + NET gpio_analog_pol[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3323715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3323715 ) N ; - gpio_analog_sel[27] + NET gpio_analog_sel[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3308535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3308535 ) N ; - gpio_dm0[27] + NET gpio_dm0[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3326935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3326935 ) N ; - gpio_dm2[27] + NET gpio_dm2[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3305315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3305315 ) N ; - gpio_holdover[27] + NET gpio_holdover[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3302095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3302095 ) N ; - gpio_ib_mode_sel[27] + NET gpio_ib_mode_sel[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3286915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3286915 ) N ; - gpio_inp_dis[27] + NET gpio_inp_dis[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3320955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3320955 ) N ; - gpio_oeb[27] + NET gpio_oeb[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3283695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3283695 ) N ; - gpio_out[27] + NET gpio_out[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3299335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3299335 ) N ; - gpio_vtrip_sel[27] + NET gpio_vtrip_sel[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3290135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3290135 ) N ; - gpio_in_h[27] + NET gpio_in_h[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3280935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3280935 ) N ; - gpio_dm1[27] + NET gpio_dm1[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3336135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3336135 ) N ; - gpio_slow_sel[27] + NET gpio_slow_sel[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3345335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3345335 ) N ; - gpio_in[27] + NET gpio_in[27] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 3354535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3354535 ) N ; - vdda2 + NET vdda2 + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 2266650 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 2266650 ) N ; - vssd2 + NET vssd2 + PORT - + LAYER met3 ( -1250 -11975 ) ( 1250 11975 ) + PLACED ( -970 2056045 ) N ; + + LAYER met3 ( -1140 -11975 ) ( 1140 11975 ) + PLACED ( -860 2056045 ) N ; - vccd2 + NET vccd2 + PORT - + LAYER met3 ( -1250 -11630 ) ( 1250 11630 ) + PLACED ( -970 2030940 ) N ; + + LAYER met3 ( -1140 -11630 ) ( 1140 11630 ) + PLACED ( -860 2030940 ) N ; - vssd2 + NET vssd2 + PORT - + LAYER met3 ( -1250 -12000 ) ( 1250 12000 ) + PLACED ( -970 2005810 ) N ; + + LAYER met3 ( -1140 -12000 ) ( 1140 12000 ) + PLACED ( -860 2005810 ) N ; - vddio + NET vddio + PORT - + LAYER met3 ( -1250 -11950 ) ( 1250 11950 ) + PLACED ( -970 402650 ) N ; + + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 402650 ) N ; - vccd + NET vccd + PORT - + LAYER met3 ( -1250 -11975 ) ( 1250 11975 ) + PLACED ( -970 192045 ) N ; + + LAYER met3 ( -1140 -11975 ) ( 1140 11975 ) + PLACED ( -860 192045 ) N ; - vccd + NET vccd + PORT - + LAYER met3 ( -1250 -12000 ) ( 1250 12000 ) + PLACED ( -970 141810 ) N ; + + LAYER met3 ( -1140 -12000 ) ( 1140 12000 ) + PLACED ( -860 141810 ) N ; - vssa + NET vssa + PORT - + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 195980 -970 ) N ; + + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 195980 -860 ) N ; - vssd + NET vssd + PORT - + LAYER met3 ( -11575 -1250 ) ( 11575 1250 ) + PLACED ( 1007995 -970 ) N ; + + LAYER met3 ( -11575 -1140 ) ( 11575 1140 ) + PLACED ( 1007995 -860 ) N ; - vssd + NET vssd + PORT - + LAYER met3 ( -12000 -1250 ) ( 12000 1250 ) + PLACED ( 1057820 -970 ) N ; + + LAYER met3 ( -12000 -1140 ) ( 12000 1140 ) + PLACED ( 1057820 -860 ) N ; - vssio + NET vssio + PORT - + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2646980 -970 ) N ; + + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2646980 -860 ) N ; - vdda + NET vdda + PORT - + LAYER met3 ( -11950 -1250 ) ( 11950 1250 ) + PLACED ( 2915980 -970 ) N ; + + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2915980 -860 ) N ; - gpio_loopback_zero[14] + NET gpio_loopback_zero[14] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 4645185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 4645185 ) N ; - gpio_loopback_zero[13] + NET gpio_loopback_zero[13] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 4195185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 4195185 ) N ; - gpio_loopback_zero[12] + NET gpio_loopback_zero[12] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3750185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3750185 ) N ; - gpio_loopback_zero[11] + NET gpio_loopback_zero[11] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3525185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3525185 ) N ; - gpio_loopback_zero[10] + NET gpio_loopback_zero[10] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3300185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3300185 ) N ; - gpio_loopback_zero[9] + NET gpio_loopback_zero[9] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 3075185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3075185 ) N ; - gpio_loopback_zero[8] + NET gpio_loopback_zero[8] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 2850185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 2850185 ) N ; - gpio_loopback_zero[7] + NET gpio_loopback_zero[7] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 2625185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 2625185 ) N ; - gpio_loopback_zero[6] + NET gpio_loopback_zero[6] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1740185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1740185 ) N ; - gpio_loopback_zero[5] + NET gpio_loopback_zero[5] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1515185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1515185 ) N ; - gpio_loopback_zero[4] + NET gpio_loopback_zero[4] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1290185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1290185 ) N ; - gpio_loopback_zero[3] + NET gpio_loopback_zero[3] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 1065185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1065185 ) N ; - gpio_loopback_zero[2] + NET gpio_loopback_zero[2] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 840185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 840185 ) N ; - gpio_loopback_zero[1] + NET gpio_loopback_zero[1] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 615185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 615185 ) N ; - gpio_loopback_zero[0] + NET gpio_loopback_zero[0] + PORT - + LAYER met3 ( -800 -155 ) ( 800 155 ) + PLACED ( 3167150 390185 ) N ; + + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 390185 ) N ; - gpio_slow_sel[0] + NET gpio_slow_sel[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 303295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 303295 ) N ; - gpio_in[0] + NET gpio_in[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 294095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 294095 ) N ; - gpio_dm1[0] + NET gpio_dm1[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 312495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 312495 ) N ; - gpio_analog_en[0] + NET gpio_analog_en[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 318475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 318475 ) N ; - gpio_analog_pol[0] + NET gpio_analog_pol[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 324915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 324915 ) N ; - gpio_analog_sel[0] + NET gpio_analog_sel[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 340095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 340095 ) N ; - gpio_dm0[0] + NET gpio_dm0[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 321695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 321695 ) N ; - gpio_dm2[0] + NET gpio_dm2[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 343315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 343315 ) N ; - gpio_holdover[0] + NET gpio_holdover[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 346535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 346535 ) N ; - gpio_ib_mode_sel[0] + NET gpio_ib_mode_sel[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 361715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 361715 ) N ; - gpio_inp_dis[0] + NET gpio_inp_dis[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 327675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 327675 ) N ; - gpio_oeb[0] + NET gpio_oeb[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 364935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 364935 ) N ; - gpio_out[0] + NET gpio_out[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 349295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 349295 ) N ; - gpio_vtrip_sel[0] + NET gpio_vtrip_sel[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 358495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 358495 ) N ; - gpio_in_h[0] + NET gpio_in_h[0] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 367695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 367695 ) N ; - gpio_slow_sel[1] + NET gpio_slow_sel[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 529295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 529295 ) N ; - gpio_in[1] + NET gpio_in[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 520095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 520095 ) N ; - gpio_dm1[1] + NET gpio_dm1[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 538495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 538495 ) N ; - gpio_analog_en[1] + NET gpio_analog_en[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 544475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 544475 ) N ; - gpio_analog_pol[1] + NET gpio_analog_pol[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 550915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 550915 ) N ; - gpio_analog_sel[1] + NET gpio_analog_sel[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 566095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 566095 ) N ; - gpio_dm0[1] + NET gpio_dm0[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 547695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 547695 ) N ; - gpio_dm2[1] + NET gpio_dm2[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 569315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 569315 ) N ; - gpio_holdover[1] + NET gpio_holdover[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 572535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 572535 ) N ; - gpio_ib_mode_sel[1] + NET gpio_ib_mode_sel[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 587715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 587715 ) N ; - gpio_inp_dis[1] + NET gpio_inp_dis[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 553675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 553675 ) N ; - gpio_oeb[1] + NET gpio_oeb[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 590935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 590935 ) N ; - gpio_out[1] + NET gpio_out[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 575295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 575295 ) N ; - gpio_vtrip_sel[1] + NET gpio_vtrip_sel[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 584495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 584495 ) N ; - gpio_in_h[1] + NET gpio_in_h[1] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 593695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 593695 ) N ; - gpio_slow_sel[2] + NET gpio_slow_sel[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 754295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 754295 ) N ; - gpio_in[2] + NET gpio_in[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 745095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 745095 ) N ; - gpio_dm1[2] + NET gpio_dm1[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 763495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 763495 ) N ; - gpio_analog_en[2] + NET gpio_analog_en[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 769475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 769475 ) N ; - gpio_analog_pol[2] + NET gpio_analog_pol[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 775915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 775915 ) N ; - gpio_analog_sel[2] + NET gpio_analog_sel[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 791095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 791095 ) N ; - gpio_dm0[2] + NET gpio_dm0[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 772695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 772695 ) N ; - gpio_dm2[2] + NET gpio_dm2[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 794315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 794315 ) N ; - gpio_holdover[2] + NET gpio_holdover[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 797535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 797535 ) N ; - gpio_ib_mode_sel[2] + NET gpio_ib_mode_sel[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 812715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 812715 ) N ; - gpio_inp_dis[2] + NET gpio_inp_dis[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 778675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 778675 ) N ; - gpio_oeb[2] + NET gpio_oeb[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 815935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 815935 ) N ; - gpio_out[2] + NET gpio_out[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 800295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 800295 ) N ; - gpio_vtrip_sel[2] + NET gpio_vtrip_sel[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 809495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 809495 ) N ; - gpio_in_h[2] + NET gpio_in_h[2] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 818695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 818695 ) N ; - gpio_slow_sel[3] + NET gpio_slow_sel[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 980295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 980295 ) N ; - gpio_in[3] + NET gpio_in[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 971095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 971095 ) N ; - gpio_dm1[3] + NET gpio_dm1[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 989495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 989495 ) N ; - gpio_analog_en[3] + NET gpio_analog_en[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 995475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 995475 ) N ; - gpio_analog_pol[3] + NET gpio_analog_pol[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1001915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1001915 ) N ; - gpio_analog_sel[3] + NET gpio_analog_sel[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1017095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1017095 ) N ; - gpio_dm2[3] + NET gpio_dm2[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1020315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1020315 ) N ; - gpio_dm0[3] + NET gpio_dm0[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 998695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 998695 ) N ; - gpio_holdover[3] + NET gpio_holdover[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1023535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1023535 ) N ; - gpio_ib_mode_sel[3] + NET gpio_ib_mode_sel[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1038715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1038715 ) N ; - gpio_inp_dis[3] + NET gpio_inp_dis[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1004675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1004675 ) N ; - gpio_oeb[3] + NET gpio_oeb[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1041935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1041935 ) N ; - gpio_out[3] + NET gpio_out[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1026295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1026295 ) N ; - gpio_vtrip_sel[3] + NET gpio_vtrip_sel[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1035495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1035495 ) N ; - gpio_in_h[3] + NET gpio_in_h[3] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1044695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1044695 ) N ; - gpio_slow_sel[4] + NET gpio_slow_sel[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1205295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1205295 ) N ; - gpio_in[4] + NET gpio_in[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1196095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1196095 ) N ; - gpio_dm1[4] + NET gpio_dm1[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1214495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1214495 ) N ; - gpio_analog_en[4] + NET gpio_analog_en[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1220475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1220475 ) N ; - gpio_analog_pol[4] + NET gpio_analog_pol[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1226915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1226915 ) N ; - gpio_analog_sel[4] + NET gpio_analog_sel[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1242095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1242095 ) N ; - gpio_dm0[4] + NET gpio_dm0[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1223695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1223695 ) N ; - gpio_dm2[4] + NET gpio_dm2[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1245315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1245315 ) N ; - gpio_holdover[4] + NET gpio_holdover[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1248535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1248535 ) N ; - gpio_ib_mode_sel[4] + NET gpio_ib_mode_sel[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1263715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1263715 ) N ; - gpio_inp_dis[4] + NET gpio_inp_dis[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1229675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1229675 ) N ; - gpio_oeb[4] + NET gpio_oeb[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1266935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1266935 ) N ; - gpio_out[4] + NET gpio_out[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1251295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1251295 ) N ; - gpio_vtrip_sel[4] + NET gpio_vtrip_sel[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1260495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1260495 ) N ; - gpio_in_h[4] + NET gpio_in_h[4] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1269695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1269695 ) N ; - gpio_slow_sel[5] + NET gpio_slow_sel[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1430295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1430295 ) N ; - gpio_in[5] + NET gpio_in[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1421095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1421095 ) N ; - gpio_dm1[5] + NET gpio_dm1[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1439495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1439495 ) N ; - gpio_analog_en[5] + NET gpio_analog_en[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1445475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1445475 ) N ; - gpio_analog_pol[5] + NET gpio_analog_pol[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1451915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1451915 ) N ; - gpio_analog_sel[5] + NET gpio_analog_sel[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1467095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1467095 ) N ; - gpio_dm0[5] + NET gpio_dm0[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1448695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1448695 ) N ; - gpio_dm2[5] + NET gpio_dm2[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1470315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1470315 ) N ; - gpio_holdover[5] + NET gpio_holdover[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1473535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1473535 ) N ; - gpio_ib_mode_sel[5] + NET gpio_ib_mode_sel[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1488715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1488715 ) N ; - gpio_inp_dis[5] + NET gpio_inp_dis[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1454675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1454675 ) N ; - gpio_oeb[5] + NET gpio_oeb[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1491935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1491935 ) N ; - gpio_out[5] + NET gpio_out[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1476295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1476295 ) N ; - gpio_vtrip_sel[5] + NET gpio_vtrip_sel[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1485495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1485495 ) N ; - gpio_in_h[5] + NET gpio_in_h[5] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1494695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1494695 ) N ; - gpio_slow_sel[6] + NET gpio_slow_sel[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1656295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1656295 ) N ; - gpio_in[6] + NET gpio_in[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1647095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1647095 ) N ; - gpio_dm1[6] + NET gpio_dm1[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1665495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1665495 ) N ; - gpio_analog_en[6] + NET gpio_analog_en[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1671475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1671475 ) N ; - gpio_analog_pol[6] + NET gpio_analog_pol[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1677915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1677915 ) N ; - gpio_analog_sel[6] + NET gpio_analog_sel[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1693095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1693095 ) N ; - gpio_dm0[6] + NET gpio_dm0[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1674695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1674695 ) N ; - gpio_dm2[6] + NET gpio_dm2[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1696315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1696315 ) N ; - gpio_holdover[6] + NET gpio_holdover[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1699535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1699535 ) N ; - gpio_ib_mode_sel[6] + NET gpio_ib_mode_sel[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1714715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1714715 ) N ; - gpio_inp_dis[6] + NET gpio_inp_dis[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1680675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1680675 ) N ; - gpio_oeb[6] + NET gpio_oeb[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1717935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1717935 ) N ; - gpio_out[6] + NET gpio_out[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1702295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1702295 ) N ; - gpio_vtrip_sel[6] + NET gpio_vtrip_sel[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1711495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1711495 ) N ; - gpio_in_h[6] + NET gpio_in_h[6] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 1720695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1720695 ) N ; - gpio_slow_sel[7] + NET gpio_slow_sel[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2542295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2542295 ) N ; - gpio_in[7] + NET gpio_in[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2533095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2533095 ) N ; - gpio_dm1[7] + NET gpio_dm1[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2551495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2551495 ) N ; - gpio_analog_en[7] + NET gpio_analog_en[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2557475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2557475 ) N ; - gpio_analog_pol[7] + NET gpio_analog_pol[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2563915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2563915 ) N ; - gpio_analog_sel[7] + NET gpio_analog_sel[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2579095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2579095 ) N ; - gpio_dm0[7] + NET gpio_dm0[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2560695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2560695 ) N ; - gpio_dm2[7] + NET gpio_dm2[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2582315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2582315 ) N ; - gpio_holdover[7] + NET gpio_holdover[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2585535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2585535 ) N ; - gpio_ib_mode_sel[7] + NET gpio_ib_mode_sel[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2600715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2600715 ) N ; - gpio_inp_dis[7] + NET gpio_inp_dis[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2566675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2566675 ) N ; - gpio_oeb[7] + NET gpio_oeb[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2603935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2603935 ) N ; - gpio_out[7] + NET gpio_out[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2588295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2588295 ) N ; - gpio_vtrip_sel[7] + NET gpio_vtrip_sel[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2597495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2597495 ) N ; - gpio_in_h[7] + NET gpio_in_h[7] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2606695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2606695 ) N ; - gpio_slow_sel[8] + NET gpio_slow_sel[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2768295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2768295 ) N ; - gpio_in[8] + NET gpio_in[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2759095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2759095 ) N ; - gpio_dm1[8] + NET gpio_dm1[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2777495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2777495 ) N ; - gpio_analog_en[8] + NET gpio_analog_en[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2783475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2783475 ) N ; - gpio_analog_pol[8] + NET gpio_analog_pol[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2789915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2789915 ) N ; - gpio_analog_sel[8] + NET gpio_analog_sel[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2805095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2805095 ) N ; - gpio_dm0[8] + NET gpio_dm0[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2786695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2786695 ) N ; - gpio_dm2[8] + NET gpio_dm2[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2808315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2808315 ) N ; - gpio_holdover[8] + NET gpio_holdover[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2811535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2811535 ) N ; - gpio_ib_mode_sel[8] + NET gpio_ib_mode_sel[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2826715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2826715 ) N ; - gpio_inp_dis[8] + NET gpio_inp_dis[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2792675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2792675 ) N ; - gpio_oeb[8] + NET gpio_oeb[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2829935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2829935 ) N ; - gpio_out[8] + NET gpio_out[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2814295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2814295 ) N ; - gpio_vtrip_sel[8] + NET gpio_vtrip_sel[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2823495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2823495 ) N ; - gpio_in_h[8] + NET gpio_in_h[8] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2832695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2832695 ) N ; - gpio_slow_sel[9] + NET gpio_slow_sel[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2993295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2993295 ) N ; - gpio_in[9] + NET gpio_in[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 2984095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2984095 ) N ; - gpio_dm1[9] + NET gpio_dm1[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3002495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3002495 ) N ; - gpio_analog_en[9] + NET gpio_analog_en[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3008475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3008475 ) N ; - gpio_analog_pol[9] + NET gpio_analog_pol[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3014915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3014915 ) N ; - gpio_analog_sel[9] + NET gpio_analog_sel[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3030095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3030095 ) N ; - gpio_dm0[9] + NET gpio_dm0[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3011695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3011695 ) N ; - gpio_dm2[9] + NET gpio_dm2[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3033315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3033315 ) N ; - gpio_holdover[9] + NET gpio_holdover[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3036535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3036535 ) N ; - gpio_ib_mode_sel[9] + NET gpio_ib_mode_sel[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3051715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3051715 ) N ; - gpio_inp_dis[9] + NET gpio_inp_dis[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3017675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3017675 ) N ; - gpio_oeb[9] + NET gpio_oeb[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3054935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3054935 ) N ; - gpio_out[9] + NET gpio_out[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3039295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3039295 ) N ; - gpio_vtrip_sel[9] + NET gpio_vtrip_sel[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3048495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3048495 ) N ; - gpio_in_h[9] + NET gpio_in_h[9] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3057695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3057695 ) N ; - gpio_slow_sel[10] + NET gpio_slow_sel[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3219295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3219295 ) N ; - gpio_in[10] + NET gpio_in[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3210095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3210095 ) N ; - gpio_dm1[10] + NET gpio_dm1[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3228495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3228495 ) N ; - gpio_analog_en[10] + NET gpio_analog_en[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3234475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3234475 ) N ; - gpio_analog_pol[10] + NET gpio_analog_pol[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3240915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3240915 ) N ; - gpio_analog_sel[10] + NET gpio_analog_sel[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3256095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3256095 ) N ; - gpio_dm0[10] + NET gpio_dm0[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3237695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3237695 ) N ; - gpio_dm2[10] + NET gpio_dm2[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3259315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3259315 ) N ; - gpio_holdover[10] + NET gpio_holdover[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3262535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3262535 ) N ; - gpio_ib_mode_sel[10] + NET gpio_ib_mode_sel[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3277715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3277715 ) N ; - gpio_inp_dis[10] + NET gpio_inp_dis[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3243675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3243675 ) N ; - gpio_oeb[10] + NET gpio_oeb[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3280935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3280935 ) N ; - gpio_out[10] + NET gpio_out[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3265295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3265295 ) N ; - gpio_vtrip_sel[10] + NET gpio_vtrip_sel[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3274495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3274495 ) N ; - gpio_in_h[10] + NET gpio_in_h[10] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3283695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3283695 ) N ; - gpio_slow_sel[11] + NET gpio_slow_sel[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3444295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3444295 ) N ; - gpio_in[11] + NET gpio_in[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3435095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3435095 ) N ; - gpio_dm1[11] + NET gpio_dm1[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3453495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3453495 ) N ; - gpio_holdover[11] + NET gpio_holdover[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3487535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3487535 ) N ; - gpio_ib_mode_sel[11] + NET gpio_ib_mode_sel[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3502715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3502715 ) N ; - gpio_inp_dis[11] + NET gpio_inp_dis[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3468675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3468675 ) N ; - gpio_oeb[11] + NET gpio_oeb[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3505935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3505935 ) N ; - gpio_out[11] + NET gpio_out[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3490295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3490295 ) N ; - gpio_vtrip_sel[11] + NET gpio_vtrip_sel[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3499495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3499495 ) N ; - gpio_analog_en[11] + NET gpio_analog_en[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3459475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3459475 ) N ; - gpio_analog_pol[11] + NET gpio_analog_pol[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3465915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3465915 ) N ; - gpio_analog_sel[11] + NET gpio_analog_sel[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3481095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3481095 ) N ; - gpio_dm0[11] + NET gpio_dm0[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3462695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3462695 ) N ; - gpio_dm2[11] + NET gpio_dm2[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3484315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3484315 ) N ; - gpio_in_h[11] + NET gpio_in_h[11] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3508695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3508695 ) N ; - gpio_slow_sel[12] + NET gpio_slow_sel[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3669295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3669295 ) N ; - gpio_in[12] + NET gpio_in[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3660095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3660095 ) N ; - gpio_dm1[12] + NET gpio_dm1[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3678495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3678495 ) N ; - gpio_analog_en[12] + NET gpio_analog_en[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3684475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3684475 ) N ; - gpio_analog_pol[12] + NET gpio_analog_pol[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3690915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3690915 ) N ; - gpio_analog_sel[12] + NET gpio_analog_sel[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3706095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3706095 ) N ; - gpio_dm0[12] + NET gpio_dm0[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3687695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3687695 ) N ; - gpio_dm2[12] + NET gpio_dm2[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3709315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3709315 ) N ; - gpio_holdover[12] + NET gpio_holdover[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3712535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3712535 ) N ; - gpio_ib_mode_sel[12] + NET gpio_ib_mode_sel[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3727715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3727715 ) N ; - gpio_inp_dis[12] + NET gpio_inp_dis[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3693675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3693675 ) N ; - gpio_oeb[12] + NET gpio_oeb[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3730935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3730935 ) N ; - gpio_out[12] + NET gpio_out[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3715295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3715295 ) N ; - gpio_vtrip_sel[12] + NET gpio_vtrip_sel[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3724495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3724495 ) N ; - gpio_in_h[12] + NET gpio_in_h[12] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 3733695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3733695 ) N ; - gpio_slow_sel[13] + NET gpio_slow_sel[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4115295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4115295 ) N ; - gpio_in[13] + NET gpio_in[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4106095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4106095 ) N ; - gpio_dm1[13] + NET gpio_dm1[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4124495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4124495 ) N ; - gpio_analog_en[13] + NET gpio_analog_en[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4130475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4130475 ) N ; - gpio_analog_pol[13] + NET gpio_analog_pol[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4136915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4136915 ) N ; - gpio_analog_sel[13] + NET gpio_analog_sel[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4152095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4152095 ) N ; - gpio_dm0[13] + NET gpio_dm0[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4133695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4133695 ) N ; - gpio_dm2[13] + NET gpio_dm2[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4155315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4155315 ) N ; - gpio_holdover[13] + NET gpio_holdover[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4158535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4158535 ) N ; - gpio_ib_mode_sel[13] + NET gpio_ib_mode_sel[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4173715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4173715 ) N ; - gpio_inp_dis[13] + NET gpio_inp_dis[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4139675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4139675 ) N ; - gpio_oeb[13] + NET gpio_oeb[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4176935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4176935 ) N ; - gpio_out[13] + NET gpio_out[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4161295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4161295 ) N ; - gpio_vtrip_sel[13] + NET gpio_vtrip_sel[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4170495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4170495 ) N ; - gpio_in_h[13] + NET gpio_in_h[13] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4179695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4179695 ) N ; - gpio_slow_sel[14] + NET gpio_slow_sel[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4561295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4561295 ) N ; - gpio_in[14] + NET gpio_in[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4552095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4552095 ) N ; - gpio_dm1[14] + NET gpio_dm1[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4570495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4570495 ) N ; - gpio_analog_en[14] + NET gpio_analog_en[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4576475 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4576475 ) N ; - gpio_analog_pol[14] + NET gpio_analog_pol[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4582915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4582915 ) N ; - gpio_analog_sel[14] + NET gpio_analog_sel[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4598095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4598095 ) N ; - gpio_dm0[14] + NET gpio_dm0[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4579695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4579695 ) N ; - gpio_dm2[14] + NET gpio_dm2[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4601315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4601315 ) N ; - gpio_holdover[14] + NET gpio_holdover[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4604535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4604535 ) N ; - gpio_ib_mode_sel[14] + NET gpio_ib_mode_sel[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4619715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4619715 ) N ; - gpio_inp_dis[14] + NET gpio_inp_dis[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4585675 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4585675 ) N ; - gpio_oeb[14] + NET gpio_oeb[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4622935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4622935 ) N ; - gpio_out[14] + NET gpio_out[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4607295 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4607295 ) N ; - gpio_vtrip_sel[14] + NET gpio_vtrip_sel[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4616495 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4616495 ) N ; - gpio_in_h[14] + NET gpio_in_h[14] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( 3167550 4625695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4625695 ) N ; - gpio_in[24] + NET gpio_in[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4635535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4635535 ) N ; - gpio_slow_sel[24] + NET gpio_slow_sel[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4626335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4626335 ) N ; - gpio_dm1[24] + NET gpio_dm1[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4617135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4617135 ) N ; - gpio_analog_en[24] + NET gpio_analog_en[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4611155 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4611155 ) N ; - gpio_dm0[24] + NET gpio_dm0[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4607935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4607935 ) N ; - gpio_analog_pol[24] + NET gpio_analog_pol[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4604715 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4604715 ) N ; - gpio_inp_dis[24] + NET gpio_inp_dis[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4601955 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4601955 ) N ; - gpio_analog_sel[24] + NET gpio_analog_sel[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4589535 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4589535 ) N ; - gpio_dm2[24] + NET gpio_dm2[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4586315 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4586315 ) N ; - gpio_holdover[24] + NET gpio_holdover[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4583095 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4583095 ) N ; - gpio_out[24] + NET gpio_out[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4580335 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4580335 ) N ; - gpio_vtrip_sel[24] + NET gpio_vtrip_sel[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4571135 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4571135 ) N ; - gpio_ib_mode_sel[24] + NET gpio_ib_mode_sel[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4567915 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4567915 ) N ; - gpio_oeb[24] + NET gpio_oeb[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4564695 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4564695 ) N ; - gpio_in_h[24] + NET gpio_in_h[24] + PORT - + LAYER met3 ( -1200 -175 ) ( 1200 175 ) + PLACED ( -920 4561935 ) N ; + + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4561935 ) N ; - analog_io[24] + NET analog_io[24] + PORT - + LAYER met3 ( -1200 -320 ) ( 1200 320 ) + PLACED ( -920 4623120 ) N ; + + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 4623120 ) N ; - analog_noesd_io[24] + NET analog_noesd_io[24] + PORT - + LAYER met3 ( -1200 -535 ) ( 1200 535 ) + PLACED ( -920 4613920 ) N ; + + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 4613920 ) N ; + - gpio_loopback_zero[23] + NET gpio_loopback_zero[23] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 137640 4767490 ) N ; + - gpio_loopback_zero[22] + NET gpio_loopback_zero[22] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 393640 4767490 ) N ; + - gpio_loopback_zero[21] + NET gpio_loopback_zero[21] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 649640 4767490 ) N ; + - gpio_loopback_zero[20] + NET gpio_loopback_zero[20] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 905640 4767490 ) N ; + - gpio_loopback_zero[19] + NET gpio_loopback_zero[19] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 1161640 4767490 ) N ; + - gpio_loopback_zero[18] + NET gpio_loopback_zero[18] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 1683640 4767490 ) N ; + - gpio_loopback_zero[17] + NET gpio_loopback_zero[17] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2128640 4767490 ) N ; + - gpio_loopback_zero[16] + NET gpio_loopback_zero[16] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2384640 4767490 ) N ; + - gpio_loopback_zero[15] + NET gpio_loopback_zero[15] + + PORT + + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2881640 4767490 ) N ; END PINS -NONDEFAULTRULES 13 ; - - met3_width_310 - + LAYER met3 WIDTH 310 ; - - met3_width_2500 - + LAYER met3 WIDTH 2500 ; - - met2_width_330 - + LAYER met2 WIDTH 330 ; - - met3_width_1070 - + LAYER met3 WIDTH 1070 ; - - met2_width_300 - + LAYER met2 WIDTH 300 ; - - met3_width_640 - + LAYER met3 WIDTH 640 ; - - met2_width_1070 - + LAYER met2 WIDTH 1070 ; - - met2_width_305 - + LAYER met2 WIDTH 305 ; - - met2_width_640 - + LAYER met2 WIDTH 640 ; - - met2_width_280 - + LAYER met2 WIDTH 280 ; - - met2_width_260 - + LAYER met2 WIDTH 260 ; - - met2_width_285 - + LAYER met2 WIDTH 285 ; - - met3_width_350 - + LAYER met3 WIDTH 350 ; -END NONDEFAULTRULES - -NETS 887 ; - - vdda ( PIN vdda ) - + ROUTED met3 TAPERRULE met3_width_2500 ( 2953920 -970 ) ( 2977820 * ) - NEW met3 TAPERRULE met3_width_2500 ( 2904030 -970 ) ( 2927930 * ) ; - - vssio ( PIN vssio ) - + ROUTED met3 TAPERRULE met3_width_2500 ( 2684920 -970 ) ( 2708820 * ) - NEW met3 TAPERRULE met3_width_2500 ( 2635030 -970 ) ( 2658930 * ) - NEW met3 TAPERRULE met3_width_2500 ( 1506710 4767600 ) ( 1530610 * ) - NEW met3 TAPERRULE met3_width_2500 ( 1456810 4767600 ) ( 1480710 * ) ; - - vssd ( PIN vssd ) - + ROUTED met3 TAPERRULE met3_width_2500 ( 1045820 -970 ) ( 1069820 * ) - NEW met3 TAPERRULE met3_width_2500 ( 996420 -970 ) ( 1019570 * ) ; - - vssa ( PIN vssa ) - + ROUTED met3 TAPERRULE met3_width_2500 ( 233920 -970 ) ( 257820 * ) - NEW met3 TAPERRULE met3_width_2500 ( 184030 -970 ) ( 207930 * ) ; - - vccd ( PIN vccd ) - + ROUTED met3 TAPERRULE met3_width_2500 ( -970 129810 ) ( * 153810 ) - NEW met3 TAPERRULE met3_width_2500 ( -970 180070 ) ( * 204020 ) ; - - porb_h ( PIN porb_h ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2000 265910 ) ( 280 * ) ; - - por_l ( PIN por_l ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2000 267035 ) ( 280 * ) ; - - porb_l ( PIN porb_l ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2000 268150 ) ( 280 * ) ; - - gpio_in[0] ( PIN gpio_in[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 294095 ) ( 3168750 * ) ; - - gpio_slow_sel[0] ( PIN gpio_slow_sel[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 303295 ) ( 3168750 * ) ; - - analog_io[0] ( PIN analog_io[0] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 306510 ) ( 3168750 * ) ; - - gpio_dm1[0] ( PIN gpio_dm1[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 312495 ) ( 3168750 * ) ; - - analog_noesd_io[0] ( PIN analog_noesd_io[0] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 315710 ) ( 3168750 * ) ; - - gpio_analog_en[0] ( PIN gpio_analog_en[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 318475 ) ( 3168750 * ) ; - - gpio_dm0[0] ( PIN gpio_dm0[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 321695 ) ( 3168750 * ) ; - - gpio_analog_pol[0] ( PIN gpio_analog_pol[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 324915 ) ( 3168750 * ) ; - - gpio_inp_dis[0] ( PIN gpio_inp_dis[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 327675 ) ( 3168750 * ) ; - - gpio_analog_sel[0] ( PIN gpio_analog_sel[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 340095 ) ( 3168750 * ) ; - - gpio_dm2[0] ( PIN gpio_dm2[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 343315 ) ( 3168750 * ) ; - - gpio_holdover[0] ( PIN gpio_holdover[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 346535 ) ( 3168750 * ) ; - - gpio_out[0] ( PIN gpio_out[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 349295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[0] ( PIN gpio_vtrip_sel[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 358495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[0] ( PIN gpio_ib_mode_sel[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 361715 ) ( 3168750 * ) ; - - vddio ( PIN vddio ) - + ROUTED met3 TAPERRULE met3_width_2500 ( -970 340810 ) ( * 364710 ) - NEW met3 TAPERRULE met3_width_2500 ( -970 390700 ) ( * 414600 ) - NEW met3 TAPERRULE met3_width_2500 ( -970 4138810 ) ( * 4162710 ) - NEW met3 TAPERRULE met3_width_2500 ( -970 4188710 ) ( * 4212610 ) ; - - gpio_oeb[0] ( PIN gpio_oeb[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 364935 ) ( 3168750 * ) ; - - gpio_in_h[0] ( PIN gpio_in_h[0] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 367695 ) ( 3168750 * ) ; - - gpio_loopback_one[0] ( PIN gpio_loopback_one[0] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 380180 ) ( 3168630 * ) ; - - gpio_loopback_zero[0] ( PIN gpio_loopback_zero[0] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 390185 ) ( 3168630 * ) ; - - gpio_in[1] ( PIN gpio_in[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 520095 ) ( 3168750 * ) ; - - gpio_slow_sel[1] ( PIN gpio_slow_sel[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 529295 ) ( 3168750 * ) ; - - analog_io[1] ( PIN analog_io[1] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 532510 ) ( 3168750 * ) ; - - gpio_dm1[1] ( PIN gpio_dm1[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 538495 ) ( 3168750 * ) ; - - analog_noesd_io[1] ( PIN analog_noesd_io[1] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 541710 ) ( 3168750 * ) ; - - gpio_analog_en[1] ( PIN gpio_analog_en[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 544475 ) ( 3168750 * ) ; - - gpio_dm0[1] ( PIN gpio_dm0[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 547695 ) ( 3168750 * ) ; - - gpio_analog_pol[1] ( PIN gpio_analog_pol[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 550915 ) ( 3168750 * ) ; - - gpio_inp_dis[1] ( PIN gpio_inp_dis[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 553675 ) ( 3168750 * ) ; - - gpio_analog_sel[1] ( PIN gpio_analog_sel[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 566095 ) ( 3168750 * ) ; - - gpio_dm2[1] ( PIN gpio_dm2[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 569315 ) ( 3168750 * ) ; - - gpio_holdover[1] ( PIN gpio_holdover[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 572535 ) ( 3168750 * ) ; - - gpio_out[1] ( PIN gpio_out[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 575295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[1] ( PIN gpio_vtrip_sel[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 584495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[1] ( PIN gpio_ib_mode_sel[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 587715 ) ( 3168750 * ) ; - - gpio_oeb[1] ( PIN gpio_oeb[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 590935 ) ( 3168750 * ) ; - - gpio_in_h[1] ( PIN gpio_in_h[1] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 593695 ) ( 3168750 * ) ; - - gpio_loopback_one[1] ( PIN gpio_loopback_one[1] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 605180 ) ( 3168630 * ) ; - - gpio_loopback_zero[1] ( PIN gpio_loopback_zero[1] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 615185 ) ( 3168630 * ) ; - - gpio_loopback_zero[37] ( PIN gpio_loopback_zero[37] ) - + ROUTED met3 ( -1850 663370 ) ( 130 * ) ; - - gpio_loopback_one[37] ( PIN gpio_loopback_one[37] ) - + ROUTED met3 ( -1850 673370 ) ( 130 * ) ; - - gpio_in_h[37] ( PIN gpio_in_h[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 698935 ) ( 280 * ) ; - - gpio_oeb[37] ( PIN gpio_oeb[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 701695 ) ( 280 * ) ; - - gpio_ib_mode_sel[37] ( PIN gpio_ib_mode_sel[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 704915 ) ( 280 * ) ; - - gpio_vtrip_sel[37] ( PIN gpio_vtrip_sel[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 708135 ) ( 280 * ) ; - - gpio_out[37] ( PIN gpio_out[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 717335 ) ( 280 * ) ; - - gpio_holdover[37] ( PIN gpio_holdover[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 720095 ) ( 280 * ) ; - - gpio_dm2[37] ( PIN gpio_dm2[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 723315 ) ( 280 * ) ; - - gpio_analog_sel[37] ( PIN gpio_analog_sel[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 726535 ) ( 280 * ) ; - - gpio_inp_dis[37] ( PIN gpio_inp_dis[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 738955 ) ( 280 * ) ; - - gpio_analog_pol[37] ( PIN gpio_analog_pol[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 741715 ) ( 280 * ) ; - - gpio_in[2] ( PIN gpio_in[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 745095 ) ( 3168750 * ) ; - - gpio_dm0[37] ( PIN gpio_dm0[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 744935 ) ( 280 * ) ; - - gpio_analog_en[37] ( PIN gpio_analog_en[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 748155 ) ( 280 * ) ; - - analog_noesd_io[37] ( PIN analog_noesd_io[37] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 750920 ) ( 280 * ) ; - - gpio_slow_sel[2] ( PIN gpio_slow_sel[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 754295 ) ( 3168750 * ) ; - - gpio_dm1[37] ( PIN gpio_dm1[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 754135 ) ( 280 * ) ; - - analog_io[2] ( PIN analog_io[2] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 757510 ) ( 3168750 * ) ; - - analog_io[37] ( PIN analog_io[37] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 760120 ) ( 280 * ) ; - - gpio_dm1[2] ( PIN gpio_dm1[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 763495 ) ( 3168750 * ) ; - - gpio_slow_sel[37] ( PIN gpio_slow_sel[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 763335 ) ( 280 * ) ; - - analog_noesd_io[2] ( PIN analog_noesd_io[2] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 766710 ) ( 3168750 * ) ; - - gpio_analog_en[2] ( PIN gpio_analog_en[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 769475 ) ( 3168750 * ) ; - - gpio_dm0[2] ( PIN gpio_dm0[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 772695 ) ( 3168750 * ) ; - - gpio_in[37] ( PIN gpio_in[37] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 772535 ) ( 280 * ) ; - - gpio_analog_pol[2] ( PIN gpio_analog_pol[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 775915 ) ( 3168750 * ) ; - - gpio_inp_dis[2] ( PIN gpio_inp_dis[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 778675 ) ( 3168750 * ) ; - - gpio_analog_sel[2] ( PIN gpio_analog_sel[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 791095 ) ( 3168750 * ) ; - - gpio_dm2[2] ( PIN gpio_dm2[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 794315 ) ( 3168750 * ) ; - - gpio_holdover[2] ( PIN gpio_holdover[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 797535 ) ( 3168750 * ) ; - - gpio_out[2] ( PIN gpio_out[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 800295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[2] ( PIN gpio_vtrip_sel[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 809495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[2] ( PIN gpio_ib_mode_sel[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 812715 ) ( 3168750 * ) ; - - gpio_oeb[2] ( PIN gpio_oeb[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 815935 ) ( 3168750 * ) ; - - gpio_in_h[2] ( PIN gpio_in_h[2] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 818695 ) ( 3168750 * ) ; - - gpio_loopback_one[2] ( PIN gpio_loopback_one[2] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 830180 ) ( 3168630 * ) ; - - gpio_loopback_zero[2] ( PIN gpio_loopback_zero[2] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 840185 ) ( 3168630 * ) ; - - gpio_loopback_zero[36] ( PIN gpio_loopback_zero[36] ) - + ROUTED met3 ( -1850 878370 ) ( 130 * ) ; - - gpio_loopback_one[36] ( PIN gpio_loopback_one[36] ) - + ROUTED met3 ( -1850 888370 ) ( 130 * ) ; - - gpio_in_h[36] ( PIN gpio_in_h[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 914935 ) ( 280 * ) ; - - gpio_oeb[36] ( PIN gpio_oeb[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 917695 ) ( 280 * ) ; - - gpio_ib_mode_sel[36] ( PIN gpio_ib_mode_sel[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 920915 ) ( 280 * ) ; - - gpio_vtrip_sel[36] ( PIN gpio_vtrip_sel[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 924135 ) ( 280 * ) ; - - gpio_out[36] ( PIN gpio_out[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 933335 ) ( 280 * ) ; - - gpio_holdover[36] ( PIN gpio_holdover[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 936095 ) ( 280 * ) ; - - gpio_dm2[36] ( PIN gpio_dm2[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 939315 ) ( 280 * ) ; - - gpio_analog_sel[36] ( PIN gpio_analog_sel[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 942535 ) ( 280 * ) ; - - gpio_inp_dis[36] ( PIN gpio_inp_dis[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 954955 ) ( 280 * ) ; - - gpio_analog_pol[36] ( PIN gpio_analog_pol[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 957715 ) ( 280 * ) ; - - gpio_dm0[36] ( PIN gpio_dm0[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 960935 ) ( 280 * ) ; - - gpio_analog_en[36] ( PIN gpio_analog_en[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 964155 ) ( 280 * ) ; - - analog_noesd_io[36] ( PIN analog_noesd_io[36] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 966920 ) ( 280 * ) ; - - gpio_dm1[36] ( PIN gpio_dm1[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 970135 ) ( 280 * ) ; - - gpio_in[3] ( PIN gpio_in[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 971095 ) ( 3168750 * ) ; - - analog_io[36] ( PIN analog_io[36] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 976120 ) ( 280 * ) ; - - gpio_slow_sel[36] ( PIN gpio_slow_sel[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 979335 ) ( 280 * ) ; - - gpio_slow_sel[3] ( PIN gpio_slow_sel[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 980295 ) ( 3168750 * ) ; - - analog_io[3] ( PIN analog_io[3] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 983510 ) ( 3168750 * ) ; - - gpio_in[36] ( PIN gpio_in[36] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 988535 ) ( 280 * ) ; - - gpio_dm1[3] ( PIN gpio_dm1[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 989495 ) ( 3168750 * ) ; - - analog_noesd_io[3] ( PIN analog_noesd_io[3] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 992710 ) ( 3168750 * ) ; - - gpio_analog_en[3] ( PIN gpio_analog_en[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 995475 ) ( 3168750 * ) ; - - gpio_dm0[3] ( PIN gpio_dm0[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 998695 ) ( 3168750 * ) ; - - gpio_analog_pol[3] ( PIN gpio_analog_pol[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1001915 ) ( 3168750 * ) ; - - gpio_inp_dis[3] ( PIN gpio_inp_dis[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1004675 ) ( 3168750 * ) ; - - gpio_analog_sel[3] ( PIN gpio_analog_sel[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1017095 ) ( 3168750 * ) ; - - gpio_dm2[3] ( PIN gpio_dm2[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1020315 ) ( 3168750 * ) ; - - gpio_holdover[3] ( PIN gpio_holdover[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1023535 ) ( 3168750 * ) ; - - gpio_out[3] ( PIN gpio_out[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1026295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[3] ( PIN gpio_vtrip_sel[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1035495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[3] ( PIN gpio_ib_mode_sel[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1038715 ) ( 3168750 * ) ; - - gpio_oeb[3] ( PIN gpio_oeb[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1041935 ) ( 3168750 * ) ; - - gpio_in_h[3] ( PIN gpio_in_h[3] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1044695 ) ( 3168750 * ) ; - - gpio_loopback_one[3] ( PIN gpio_loopback_one[3] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1055180 ) ( 3168630 * ) ; - - gpio_loopback_zero[3] ( PIN gpio_loopback_zero[3] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1065185 ) ( 3168630 * ) ; - - gpio_loopback_zero[35] ( PIN gpio_loopback_zero[35] ) - + ROUTED met3 ( -1850 1093370 ) ( 130 * ) ; - - gpio_loopback_one[35] ( PIN gpio_loopback_one[35] ) - + ROUTED met3 ( -1850 1103370 ) ( 130 * ) ; - - gpio_in_h[35] ( PIN gpio_in_h[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1130935 ) ( 280 * ) ; - - gpio_oeb[35] ( PIN gpio_oeb[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1133695 ) ( 280 * ) ; - - gpio_ib_mode_sel[35] ( PIN gpio_ib_mode_sel[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1136915 ) ( 280 * ) ; - - gpio_vtrip_sel[35] ( PIN gpio_vtrip_sel[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1140135 ) ( 280 * ) ; - - gpio_out[35] ( PIN gpio_out[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1149335 ) ( 280 * ) ; - - gpio_holdover[35] ( PIN gpio_holdover[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1152095 ) ( 280 * ) ; - - gpio_dm2[35] ( PIN gpio_dm2[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1155315 ) ( 280 * ) ; - - gpio_analog_sel[35] ( PIN gpio_analog_sel[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1158535 ) ( 280 * ) ; - - gpio_inp_dis[35] ( PIN gpio_inp_dis[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1170955 ) ( 280 * ) ; - - gpio_analog_pol[35] ( PIN gpio_analog_pol[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1173715 ) ( 280 * ) ; - - gpio_dm0[35] ( PIN gpio_dm0[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1176935 ) ( 280 * ) ; - - gpio_analog_en[35] ( PIN gpio_analog_en[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1180155 ) ( 280 * ) ; - - analog_noesd_io[35] ( PIN analog_noesd_io[35] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 1182920 ) ( 280 * ) ; - - gpio_dm1[35] ( PIN gpio_dm1[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1186135 ) ( 280 * ) ; - - analog_io[35] ( PIN analog_io[35] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 1192120 ) ( 280 * ) ; - - gpio_slow_sel[35] ( PIN gpio_slow_sel[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1195335 ) ( 280 * ) ; - - gpio_in[4] ( PIN gpio_in[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1196095 ) ( 3168750 * ) ; - - gpio_in[35] ( PIN gpio_in[35] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1204535 ) ( 280 * ) ; - - gpio_slow_sel[4] ( PIN gpio_slow_sel[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1205295 ) ( 3168750 * ) ; - - analog_io[4] ( PIN analog_io[4] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 1208510 ) ( 3168750 * ) ; - - gpio_dm1[4] ( PIN gpio_dm1[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1214495 ) ( 3168750 * ) ; - - analog_noesd_io[4] ( PIN analog_noesd_io[4] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 1217710 ) ( 3168750 * ) ; - - gpio_analog_en[4] ( PIN gpio_analog_en[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1220475 ) ( 3168750 * ) ; - - gpio_dm0[4] ( PIN gpio_dm0[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1223695 ) ( 3168750 * ) ; - - gpio_analog_pol[4] ( PIN gpio_analog_pol[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1226915 ) ( 3168750 * ) ; - - gpio_inp_dis[4] ( PIN gpio_inp_dis[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1229675 ) ( 3168750 * ) ; - - gpio_analog_sel[4] ( PIN gpio_analog_sel[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1242095 ) ( 3168750 * ) ; - - gpio_dm2[4] ( PIN gpio_dm2[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1245315 ) ( 3168750 * ) ; - - gpio_holdover[4] ( PIN gpio_holdover[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1248535 ) ( 3168750 * ) ; - - gpio_out[4] ( PIN gpio_out[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1251295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[4] ( PIN gpio_vtrip_sel[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1260495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[4] ( PIN gpio_ib_mode_sel[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1263715 ) ( 3168750 * ) ; - - gpio_oeb[4] ( PIN gpio_oeb[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1266935 ) ( 3168750 * ) ; - - gpio_in_h[4] ( PIN gpio_in_h[4] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1269695 ) ( 3168750 * ) ; - - gpio_loopback_one[4] ( PIN gpio_loopback_one[4] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1280180 ) ( 3168630 * ) ; - - gpio_loopback_zero[4] ( PIN gpio_loopback_zero[4] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1290185 ) ( 3168630 * ) ; - - gpio_loopback_zero[34] ( PIN gpio_loopback_zero[34] ) - + ROUTED met3 ( -1850 1308370 ) ( 130 * ) ; - - gpio_loopback_one[34] ( PIN gpio_loopback_one[34] ) - + ROUTED met3 ( -1850 1318370 ) ( 130 * ) ; - - gpio_in_h[34] ( PIN gpio_in_h[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1346935 ) ( 280 * ) ; - - gpio_oeb[34] ( PIN gpio_oeb[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1349695 ) ( 280 * ) ; - - gpio_ib_mode_sel[34] ( PIN gpio_ib_mode_sel[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1352915 ) ( 280 * ) ; - - gpio_vtrip_sel[34] ( PIN gpio_vtrip_sel[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1356135 ) ( 280 * ) ; - - gpio_out[34] ( PIN gpio_out[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1365335 ) ( 280 * ) ; - - gpio_holdover[34] ( PIN gpio_holdover[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1368095 ) ( 280 * ) ; - - gpio_dm2[34] ( PIN gpio_dm2[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1371315 ) ( 280 * ) ; - - gpio_analog_sel[34] ( PIN gpio_analog_sel[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1374535 ) ( 280 * ) ; - - gpio_inp_dis[34] ( PIN gpio_inp_dis[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1386955 ) ( 280 * ) ; - - gpio_analog_pol[34] ( PIN gpio_analog_pol[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1389715 ) ( 280 * ) ; - - gpio_dm0[34] ( PIN gpio_dm0[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1392935 ) ( 280 * ) ; - - gpio_analog_en[34] ( PIN gpio_analog_en[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1396155 ) ( 280 * ) ; - - analog_noesd_io[34] ( PIN analog_noesd_io[34] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 1398920 ) ( 280 * ) ; - - gpio_dm1[34] ( PIN gpio_dm1[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1402135 ) ( 280 * ) ; - - analog_io[34] ( PIN analog_io[34] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 1408120 ) ( 280 * ) ; - - gpio_slow_sel[34] ( PIN gpio_slow_sel[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1411335 ) ( 280 * ) ; - - gpio_in[34] ( PIN gpio_in[34] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1420535 ) ( 280 * ) ; - - gpio_in[5] ( PIN gpio_in[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1421095 ) ( 3168750 * ) ; - - gpio_slow_sel[5] ( PIN gpio_slow_sel[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1430295 ) ( 3168750 * ) ; - - analog_io[5] ( PIN analog_io[5] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 1433510 ) ( 3168750 * ) ; - - gpio_dm1[5] ( PIN gpio_dm1[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1439495 ) ( 3168750 * ) ; - - analog_noesd_io[5] ( PIN analog_noesd_io[5] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 1442710 ) ( 3168750 * ) ; - - gpio_analog_en[5] ( PIN gpio_analog_en[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1445475 ) ( 3168750 * ) ; - - gpio_dm0[5] ( PIN gpio_dm0[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1448695 ) ( 3168750 * ) ; - - gpio_analog_pol[5] ( PIN gpio_analog_pol[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1451915 ) ( 3168750 * ) ; - - gpio_inp_dis[5] ( PIN gpio_inp_dis[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1454675 ) ( 3168750 * ) ; - - gpio_analog_sel[5] ( PIN gpio_analog_sel[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1467095 ) ( 3168750 * ) ; - - gpio_dm2[5] ( PIN gpio_dm2[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1470315 ) ( 3168750 * ) ; - - gpio_holdover[5] ( PIN gpio_holdover[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1473535 ) ( 3168750 * ) ; - - gpio_out[5] ( PIN gpio_out[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1476295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[5] ( PIN gpio_vtrip_sel[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1485495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[5] ( PIN gpio_ib_mode_sel[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1488715 ) ( 3168750 * ) ; - - gpio_oeb[5] ( PIN gpio_oeb[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1491935 ) ( 3168750 * ) ; - - gpio_in_h[5] ( PIN gpio_in_h[5] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1494695 ) ( 3168750 * ) ; - - gpio_loopback_one[5] ( PIN gpio_loopback_one[5] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1505180 ) ( 3168630 * ) ; - - gpio_loopback_zero[5] ( PIN gpio_loopback_zero[5] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1515185 ) ( 3168630 * ) ; - - gpio_loopback_zero[33] ( PIN gpio_loopback_zero[33] ) - + ROUTED met3 ( -1850 1523370 ) ( 130 * ) ; - - gpio_loopback_one[33] ( PIN gpio_loopback_one[33] ) - + ROUTED met3 ( -1850 1533370 ) ( 130 * ) ; - - gpio_in_h[33] ( PIN gpio_in_h[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1562935 ) ( 280 * ) ; - - gpio_oeb[33] ( PIN gpio_oeb[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1565695 ) ( 280 * ) ; - - gpio_ib_mode_sel[33] ( PIN gpio_ib_mode_sel[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1568915 ) ( 280 * ) ; - - gpio_vtrip_sel[33] ( PIN gpio_vtrip_sel[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1572135 ) ( 280 * ) ; - - gpio_out[33] ( PIN gpio_out[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1581335 ) ( 280 * ) ; - - gpio_holdover[33] ( PIN gpio_holdover[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1584095 ) ( 280 * ) ; - - gpio_dm2[33] ( PIN gpio_dm2[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1587315 ) ( 280 * ) ; - - gpio_analog_sel[33] ( PIN gpio_analog_sel[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1590535 ) ( 280 * ) ; - - gpio_inp_dis[33] ( PIN gpio_inp_dis[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1602955 ) ( 280 * ) ; - - gpio_analog_pol[33] ( PIN gpio_analog_pol[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1605715 ) ( 280 * ) ; - - gpio_dm0[33] ( PIN gpio_dm0[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1608935 ) ( 280 * ) ; - - gpio_analog_en[33] ( PIN gpio_analog_en[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1612155 ) ( 280 * ) ; - - analog_noesd_io[33] ( PIN analog_noesd_io[33] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 1614920 ) ( 280 * ) ; - - gpio_dm1[33] ( PIN gpio_dm1[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1618135 ) ( 280 * ) ; - - analog_io[33] ( PIN analog_io[33] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 1624120 ) ( 280 * ) ; - - gpio_slow_sel[33] ( PIN gpio_slow_sel[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1627335 ) ( 280 * ) ; - - gpio_in[33] ( PIN gpio_in[33] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1636535 ) ( 280 * ) ; - - gpio_in[6] ( PIN gpio_in[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1647095 ) ( 3168750 * ) ; - - gpio_slow_sel[6] ( PIN gpio_slow_sel[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1656295 ) ( 3168750 * ) ; - - analog_io[6] ( PIN analog_io[6] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 1659510 ) ( 3168750 * ) ; - - gpio_dm1[6] ( PIN gpio_dm1[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1665495 ) ( 3168750 * ) ; - - analog_noesd_io[6] ( PIN analog_noesd_io[6] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 1668710 ) ( 3168750 * ) ; - - gpio_analog_en[6] ( PIN gpio_analog_en[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1671475 ) ( 3168750 * ) ; - - gpio_dm0[6] ( PIN gpio_dm0[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1674695 ) ( 3168750 * ) ; - - gpio_analog_pol[6] ( PIN gpio_analog_pol[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1677915 ) ( 3168750 * ) ; - - gpio_inp_dis[6] ( PIN gpio_inp_dis[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1680675 ) ( 3168750 * ) ; - - gpio_analog_sel[6] ( PIN gpio_analog_sel[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1693095 ) ( 3168750 * ) ; - - gpio_dm2[6] ( PIN gpio_dm2[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1696315 ) ( 3168750 * ) ; - - gpio_holdover[6] ( PIN gpio_holdover[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1699535 ) ( 3168750 * ) ; - - gpio_out[6] ( PIN gpio_out[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1702295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[6] ( PIN gpio_vtrip_sel[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1711495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[6] ( PIN gpio_ib_mode_sel[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1714715 ) ( 3168750 * ) ; - - gpio_oeb[6] ( PIN gpio_oeb[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1717935 ) ( 3168750 * ) ; - - gpio_in_h[6] ( PIN gpio_in_h[6] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 1720695 ) ( 3168750 * ) ; - - gpio_loopback_one[6] ( PIN gpio_loopback_one[6] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1730180 ) ( 3168630 * ) ; - - gpio_loopback_zero[32] ( PIN gpio_loopback_zero[32] ) - + ROUTED met3 ( -1850 1738370 ) ( 130 * ) ; - - gpio_loopback_zero[6] ( PIN gpio_loopback_zero[6] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 1740185 ) ( 3168630 * ) ; - - gpio_loopback_one[32] ( PIN gpio_loopback_one[32] ) - + ROUTED met3 ( -1850 1748370 ) ( 130 * ) ; - - gpio_in_h[32] ( PIN gpio_in_h[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1778935 ) ( 280 * ) ; - - gpio_oeb[32] ( PIN gpio_oeb[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1781695 ) ( 280 * ) ; - - gpio_ib_mode_sel[32] ( PIN gpio_ib_mode_sel[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1784915 ) ( 280 * ) ; - - gpio_vtrip_sel[32] ( PIN gpio_vtrip_sel[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1788135 ) ( 280 * ) ; - - gpio_out[32] ( PIN gpio_out[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1797335 ) ( 280 * ) ; - - gpio_holdover[32] ( PIN gpio_holdover[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1800095 ) ( 280 * ) ; - - gpio_dm2[32] ( PIN gpio_dm2[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1803315 ) ( 280 * ) ; - - gpio_analog_sel[32] ( PIN gpio_analog_sel[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1806535 ) ( 280 * ) ; - - gpio_inp_dis[32] ( PIN gpio_inp_dis[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1818955 ) ( 280 * ) ; - - gpio_analog_pol[32] ( PIN gpio_analog_pol[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1821715 ) ( 280 * ) ; - - gpio_dm0[32] ( PIN gpio_dm0[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1824935 ) ( 280 * ) ; - - gpio_analog_en[32] ( PIN gpio_analog_en[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1828155 ) ( 280 * ) ; - - analog_noesd_io[32] ( PIN analog_noesd_io[32] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 1830920 ) ( 280 * ) ; - - gpio_dm1[32] ( PIN gpio_dm1[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1834135 ) ( 280 * ) ; - - analog_io[32] ( PIN analog_io[32] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 1840120 ) ( 280 * ) ; - - gpio_slow_sel[32] ( PIN gpio_slow_sel[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1843335 ) ( 280 * ) ; - - gpio_in[32] ( PIN gpio_in[32] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 1852535 ) ( 280 * ) ; - - vssa1 ( PIN vssa1 ) - + ROUTED met3 TAPERRULE met3_width_2500 ( 3167600 1868030 ) ( * 1891930 ) - NEW met3 TAPERRULE met3_width_2500 ( 3167600 1917920 ) ( * 1941820 ) - NEW met3 TAPERRULE met3_width_2500 ( 2717710 4767600 ) ( 2741610 * ) - NEW met3 TAPERRULE met3_width_2500 ( 2667810 4767600 ) ( 2691710 * ) ; - - vssd2 ( PIN vssd2 ) - + ROUTED met3 TAPERRULE met3_width_2500 ( -970 1993810 ) ( * 2017810 ) - NEW met3 TAPERRULE met3_width_2500 ( -970 2044070 ) ( * 2068020 ) - NEW met3 TAPERRULE met3_width_2500 ( -970 4375270 ) ( * 4398580 ) ; - - vccd2 ( PIN vccd2 ) - + ROUTED met3 TAPERRULE met3_width_2500 ( -970 2019310 ) ( * 2042570 ) - NEW met3 TAPERRULE met3_width_2500 ( -970 4349820 ) ( * 4373820 ) - NEW met3 TAPERRULE met3_width_2500 ( -970 4400070 ) ( * 4424020 ) ; - - vssd1 ( PIN vssd1 ) - + ROUTED met3 TAPERRULE met3_width_2500 ( 3167600 2088610 ) ( * 2112560 ) - NEW met3 TAPERRULE met3_width_2500 ( 3167600 2138810 ) ( * 2162810 ) ; - - vccd1 ( PIN vccd1 ) - + ROUTED met3 TAPERRULE met3_width_2500 ( 3167600 2114050 ) ( * 2137360 ) ; - - vdda2 ( PIN vdda2 ) - + ROUTED met3 TAPERRULE met3_width_2500 ( -970 2204810 ) ( * 2228710 ) - NEW met3 TAPERRULE met3_width_2500 ( -970 2254700 ) ( * 2278600 ) ; - - vdda1 ( PIN vdda1 ) - + ROUTED met3 TAPERRULE met3_width_2500 ( 3167600 2309020 ) ( * 2332920 ) - NEW met3 TAPERRULE met3_width_2500 ( 3167600 2358920 ) ( * 2382820 ) - NEW met3 TAPERRULE met3_width_2500 ( 3167600 3882030 ) ( * 3905930 ) - NEW met3 TAPERRULE met3_width_2500 ( 3167600 3931920 ) ( * 3955820 ) ; - - gpio_loopback_zero[31] ( PIN gpio_loopback_zero[31] ) - + ROUTED met3 ( -1850 2383370 ) ( 130 * ) ; - - gpio_loopback_one[31] ( PIN gpio_loopback_one[31] ) - + ROUTED met3 ( -1850 2393370 ) ( 130 * ) ; - - gpio_in_h[31] ( PIN gpio_in_h[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2416935 ) ( 280 * ) ; - - gpio_oeb[31] ( PIN gpio_oeb[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2419695 ) ( 280 * ) ; - - gpio_ib_mode_sel[31] ( PIN gpio_ib_mode_sel[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2422915 ) ( 280 * ) ; - - gpio_vtrip_sel[31] ( PIN gpio_vtrip_sel[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2426135 ) ( 280 * ) ; - - gpio_out[31] ( PIN gpio_out[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2435335 ) ( 280 * ) ; - - gpio_holdover[31] ( PIN gpio_holdover[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2438095 ) ( 280 * ) ; - - gpio_dm2[31] ( PIN gpio_dm2[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2441315 ) ( 280 * ) ; - - gpio_analog_sel[31] ( PIN gpio_analog_sel[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2444535 ) ( 280 * ) ; - - gpio_inp_dis[31] ( PIN gpio_inp_dis[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2456955 ) ( 280 * ) ; - - gpio_analog_pol[31] ( PIN gpio_analog_pol[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2459715 ) ( 280 * ) ; - - gpio_dm0[31] ( PIN gpio_dm0[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2462935 ) ( 280 * ) ; - - gpio_analog_en[31] ( PIN gpio_analog_en[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2466155 ) ( 280 * ) ; - - analog_noesd_io[31] ( PIN analog_noesd_io[31] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 2468920 ) ( 280 * ) ; - - gpio_dm1[31] ( PIN gpio_dm1[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2472135 ) ( 280 * ) ; - - analog_io[31] ( PIN analog_io[31] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 2478120 ) ( 280 * ) ; - - gpio_slow_sel[31] ( PIN gpio_slow_sel[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2481335 ) ( 280 * ) ; - - gpio_in[31] ( PIN gpio_in[31] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2490535 ) ( 280 * ) ; - - gpio_in[7] ( PIN gpio_in[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2533095 ) ( 3168750 * ) ; - - gpio_slow_sel[7] ( PIN gpio_slow_sel[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2542295 ) ( 3168750 * ) ; - - analog_io[7] ( PIN analog_io[7] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 2545510 ) ( 3168750 * ) ; - - gpio_dm1[7] ( PIN gpio_dm1[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2551495 ) ( 3168750 * ) ; - - analog_noesd_io[7] ( PIN analog_noesd_io[7] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 2554710 ) ( 3168750 * ) ; - - gpio_analog_en[7] ( PIN gpio_analog_en[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2557475 ) ( 3168750 * ) ; - - gpio_dm0[7] ( PIN gpio_dm0[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2560695 ) ( 3168750 * ) ; - - gpio_analog_pol[7] ( PIN gpio_analog_pol[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2563915 ) ( 3168750 * ) ; - - gpio_inp_dis[7] ( PIN gpio_inp_dis[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2566675 ) ( 3168750 * ) ; - - gpio_analog_sel[7] ( PIN gpio_analog_sel[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2579095 ) ( 3168750 * ) ; - - gpio_dm2[7] ( PIN gpio_dm2[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2582315 ) ( 3168750 * ) ; - - gpio_holdover[7] ( PIN gpio_holdover[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2585535 ) ( 3168750 * ) ; - - gpio_out[7] ( PIN gpio_out[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2588295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[7] ( PIN gpio_vtrip_sel[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2597495 ) ( 3168750 * ) ; - - gpio_loopback_zero[30] ( PIN gpio_loopback_zero[30] ) - + ROUTED met3 ( -1850 2598370 ) ( 130 * ) ; - - gpio_ib_mode_sel[7] ( PIN gpio_ib_mode_sel[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2600715 ) ( 3168750 * ) ; - - gpio_oeb[7] ( PIN gpio_oeb[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2603935 ) ( 3168750 * ) ; - - gpio_in_h[7] ( PIN gpio_in_h[7] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2606695 ) ( 3168750 * ) ; - - gpio_loopback_one[30] ( PIN gpio_loopback_one[30] ) - + ROUTED met3 ( -1850 2608370 ) ( 130 * ) ; - - gpio_loopback_one[7] ( PIN gpio_loopback_one[7] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 2615180 ) ( 3168630 * ) ; - - gpio_loopback_zero[7] ( PIN gpio_loopback_zero[7] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 2625185 ) ( 3168630 * ) ; - - gpio_in_h[30] ( PIN gpio_in_h[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2632935 ) ( 280 * ) ; - - gpio_oeb[30] ( PIN gpio_oeb[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2635695 ) ( 280 * ) ; - - gpio_ib_mode_sel[30] ( PIN gpio_ib_mode_sel[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2638915 ) ( 280 * ) ; - - gpio_vtrip_sel[30] ( PIN gpio_vtrip_sel[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2642135 ) ( 280 * ) ; - - gpio_out[30] ( PIN gpio_out[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2651335 ) ( 280 * ) ; - - gpio_holdover[30] ( PIN gpio_holdover[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2654095 ) ( 280 * ) ; - - gpio_dm2[30] ( PIN gpio_dm2[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2657315 ) ( 280 * ) ; - - gpio_analog_sel[30] ( PIN gpio_analog_sel[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2660535 ) ( 280 * ) ; - - gpio_inp_dis[30] ( PIN gpio_inp_dis[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2672955 ) ( 280 * ) ; - - gpio_analog_pol[30] ( PIN gpio_analog_pol[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2675715 ) ( 280 * ) ; - - gpio_dm0[30] ( PIN gpio_dm0[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2678935 ) ( 280 * ) ; - - gpio_analog_en[30] ( PIN gpio_analog_en[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2682155 ) ( 280 * ) ; - - analog_noesd_io[30] ( PIN analog_noesd_io[30] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 2684920 ) ( 280 * ) ; - - gpio_dm1[30] ( PIN gpio_dm1[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2688135 ) ( 280 * ) ; - - analog_io[30] ( PIN analog_io[30] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 2694120 ) ( 280 * ) ; - - gpio_slow_sel[30] ( PIN gpio_slow_sel[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2697335 ) ( 280 * ) ; - - gpio_in[30] ( PIN gpio_in[30] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2706535 ) ( 280 * ) ; - - gpio_in[8] ( PIN gpio_in[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2759095 ) ( 3168750 * ) ; - - gpio_slow_sel[8] ( PIN gpio_slow_sel[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2768295 ) ( 3168750 * ) ; - - analog_io[8] ( PIN analog_io[8] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 2771510 ) ( 3168750 * ) ; - - gpio_dm1[8] ( PIN gpio_dm1[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2777495 ) ( 3168750 * ) ; - - analog_noesd_io[8] ( PIN analog_noesd_io[8] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 2780710 ) ( 3168750 * ) ; - - gpio_analog_en[8] ( PIN gpio_analog_en[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2783475 ) ( 3168750 * ) ; - - gpio_dm0[8] ( PIN gpio_dm0[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2786695 ) ( 3168750 * ) ; - - gpio_analog_pol[8] ( PIN gpio_analog_pol[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2789915 ) ( 3168750 * ) ; - - gpio_inp_dis[8] ( PIN gpio_inp_dis[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2792675 ) ( 3168750 * ) ; - - gpio_analog_sel[8] ( PIN gpio_analog_sel[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2805095 ) ( 3168750 * ) ; - - gpio_dm2[8] ( PIN gpio_dm2[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2808315 ) ( 3168750 * ) ; - - gpio_holdover[8] ( PIN gpio_holdover[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2811535 ) ( 3168750 * ) ; - - gpio_loopback_zero[29] ( PIN gpio_loopback_zero[29] ) - + ROUTED met3 ( -1850 2813370 ) ( 130 * ) ; - - gpio_out[8] ( PIN gpio_out[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2814295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[8] ( PIN gpio_vtrip_sel[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2823495 ) ( 3168750 * ) ; - - gpio_loopback_one[29] ( PIN gpio_loopback_one[29] ) - + ROUTED met3 ( -1850 2823370 ) ( 130 * ) ; - - gpio_ib_mode_sel[8] ( PIN gpio_ib_mode_sel[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2826715 ) ( 3168750 * ) ; - - gpio_oeb[8] ( PIN gpio_oeb[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2829935 ) ( 3168750 * ) ; - - gpio_in_h[8] ( PIN gpio_in_h[8] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2832695 ) ( 3168750 * ) ; - - gpio_loopback_one[8] ( PIN gpio_loopback_one[8] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 2840185 ) ( 3168630 * ) ; - - gpio_in_h[29] ( PIN gpio_in_h[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2848935 ) ( 280 * ) ; - - gpio_loopback_zero[8] ( PIN gpio_loopback_zero[8] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 2850185 ) ( 3168630 * ) ; - - gpio_oeb[29] ( PIN gpio_oeb[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2851695 ) ( 280 * ) ; - - gpio_ib_mode_sel[29] ( PIN gpio_ib_mode_sel[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2854915 ) ( 280 * ) ; - - gpio_vtrip_sel[29] ( PIN gpio_vtrip_sel[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2858135 ) ( 280 * ) ; - - gpio_out[29] ( PIN gpio_out[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2867335 ) ( 280 * ) ; - - gpio_holdover[29] ( PIN gpio_holdover[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2870095 ) ( 280 * ) ; - - gpio_dm2[29] ( PIN gpio_dm2[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2873315 ) ( 280 * ) ; - - gpio_analog_sel[29] ( PIN gpio_analog_sel[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2876535 ) ( 280 * ) ; - - gpio_inp_dis[29] ( PIN gpio_inp_dis[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2888955 ) ( 280 * ) ; - - gpio_analog_pol[29] ( PIN gpio_analog_pol[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2891715 ) ( 280 * ) ; - - gpio_dm0[29] ( PIN gpio_dm0[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2894935 ) ( 280 * ) ; - - gpio_analog_en[29] ( PIN gpio_analog_en[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2898155 ) ( 280 * ) ; - - analog_noesd_io[29] ( PIN analog_noesd_io[29] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 2900920 ) ( 280 * ) ; - - gpio_dm1[29] ( PIN gpio_dm1[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2904135 ) ( 280 * ) ; - - analog_io[29] ( PIN analog_io[29] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 2910120 ) ( 280 * ) ; - - gpio_slow_sel[29] ( PIN gpio_slow_sel[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2913335 ) ( 280 * ) ; - - gpio_in[29] ( PIN gpio_in[29] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 2922535 ) ( 280 * ) ; - - gpio_in[9] ( PIN gpio_in[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2984095 ) ( 3168750 * ) ; - - gpio_slow_sel[9] ( PIN gpio_slow_sel[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 2993295 ) ( 3168750 * ) ; - - analog_io[9] ( PIN analog_io[9] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 2996510 ) ( 3168750 * ) ; - - gpio_dm1[9] ( PIN gpio_dm1[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3002495 ) ( 3168750 * ) ; - - analog_noesd_io[9] ( PIN analog_noesd_io[9] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 3005710 ) ( 3168750 * ) ; - - gpio_analog_en[9] ( PIN gpio_analog_en[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3008475 ) ( 3168750 * ) ; - - gpio_dm0[9] ( PIN gpio_dm0[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3011695 ) ( 3168750 * ) ; - - gpio_analog_pol[9] ( PIN gpio_analog_pol[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3014915 ) ( 3168750 * ) ; - - gpio_inp_dis[9] ( PIN gpio_inp_dis[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3017675 ) ( 3168750 * ) ; - - gpio_loopback_zero[28] ( PIN gpio_loopback_zero[28] ) - + ROUTED met3 ( -1850 3028370 ) ( 130 * ) ; - - gpio_analog_sel[9] ( PIN gpio_analog_sel[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3030095 ) ( 3168750 * ) ; - - gpio_dm2[9] ( PIN gpio_dm2[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3033315 ) ( 3168750 * ) ; - - gpio_holdover[9] ( PIN gpio_holdover[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3036535 ) ( 3168750 * ) ; - - gpio_loopback_one[28] ( PIN gpio_loopback_one[28] ) - + ROUTED met3 ( -1850 3038370 ) ( 130 * ) ; - - gpio_out[9] ( PIN gpio_out[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3039295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[9] ( PIN gpio_vtrip_sel[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3048495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[9] ( PIN gpio_ib_mode_sel[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3051715 ) ( 3168750 * ) ; - - gpio_oeb[9] ( PIN gpio_oeb[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3054935 ) ( 3168750 * ) ; - - gpio_in_h[9] ( PIN gpio_in_h[9] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3057695 ) ( 3168750 * ) ; - - gpio_loopback_one[9] ( PIN gpio_loopback_one[9] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3065185 ) ( 3168630 * ) ; - - gpio_in_h[28] ( PIN gpio_in_h[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3064935 ) ( 280 * ) ; - - gpio_oeb[28] ( PIN gpio_oeb[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3067695 ) ( 280 * ) ; - - gpio_ib_mode_sel[28] ( PIN gpio_ib_mode_sel[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3070915 ) ( 280 * ) ; - - gpio_vtrip_sel[28] ( PIN gpio_vtrip_sel[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3074135 ) ( 280 * ) ; - - gpio_loopback_zero[9] ( PIN gpio_loopback_zero[9] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3075185 ) ( 3168630 * ) ; - - gpio_out[28] ( PIN gpio_out[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3083335 ) ( 280 * ) ; - - gpio_holdover[28] ( PIN gpio_holdover[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3086095 ) ( 280 * ) ; - - gpio_dm2[28] ( PIN gpio_dm2[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3089315 ) ( 280 * ) ; - - gpio_analog_sel[28] ( PIN gpio_analog_sel[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3092535 ) ( 280 * ) ; - - gpio_inp_dis[28] ( PIN gpio_inp_dis[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3104955 ) ( 280 * ) ; - - gpio_analog_pol[28] ( PIN gpio_analog_pol[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3107715 ) ( 280 * ) ; - - gpio_dm0[28] ( PIN gpio_dm0[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3110935 ) ( 280 * ) ; - - gpio_analog_en[28] ( PIN gpio_analog_en[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3114155 ) ( 280 * ) ; - - analog_noesd_io[28] ( PIN analog_noesd_io[28] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 3116920 ) ( 280 * ) ; - - gpio_dm1[28] ( PIN gpio_dm1[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3120135 ) ( 280 * ) ; - - analog_io[28] ( PIN analog_io[28] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 3126120 ) ( 280 * ) ; - - gpio_slow_sel[28] ( PIN gpio_slow_sel[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3129335 ) ( 280 * ) ; - - gpio_in[28] ( PIN gpio_in[28] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3138535 ) ( 280 * ) ; - - gpio_in[10] ( PIN gpio_in[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3210095 ) ( 3168750 * ) ; - - gpio_slow_sel[10] ( PIN gpio_slow_sel[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3219295 ) ( 3168750 * ) ; - - analog_io[10] ( PIN analog_io[10] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 3222510 ) ( 3168750 * ) ; - - gpio_dm1[10] ( PIN gpio_dm1[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3228495 ) ( 3168750 * ) ; - - analog_noesd_io[10] ( PIN analog_noesd_io[10] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 3231710 ) ( 3168750 * ) ; - - gpio_analog_en[10] ( PIN gpio_analog_en[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3234475 ) ( 3168750 * ) ; - - gpio_dm0[10] ( PIN gpio_dm0[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3237695 ) ( 3168750 * ) ; - - gpio_analog_pol[10] ( PIN gpio_analog_pol[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3240915 ) ( 3168750 * ) ; - - gpio_inp_dis[10] ( PIN gpio_inp_dis[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3243675 ) ( 3168750 * ) ; - - gpio_loopback_zero[27] ( PIN gpio_loopback_zero[27] ) - + ROUTED met3 ( -1850 3243370 ) ( 130 * ) ; - - gpio_loopback_one[27] ( PIN gpio_loopback_one[27] ) - + ROUTED met3 ( -1850 3253370 ) ( 130 * ) ; - - gpio_analog_sel[10] ( PIN gpio_analog_sel[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3256095 ) ( 3168750 * ) ; - - gpio_dm2[10] ( PIN gpio_dm2[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3259315 ) ( 3168750 * ) ; - - gpio_holdover[10] ( PIN gpio_holdover[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3262535 ) ( 3168750 * ) ; - - gpio_out[10] ( PIN gpio_out[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3265295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[10] ( PIN gpio_vtrip_sel[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3274495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[10] ( PIN gpio_ib_mode_sel[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3277715 ) ( 3168750 * ) ; - - gpio_oeb[10] ( PIN gpio_oeb[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3280935 ) ( 3168750 * ) ; - - gpio_in_h[27] ( PIN gpio_in_h[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3280935 ) ( 280 * ) ; - - gpio_in_h[10] ( PIN gpio_in_h[10] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3283695 ) ( 3168750 * ) ; - - gpio_oeb[27] ( PIN gpio_oeb[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3283695 ) ( 280 * ) ; - - gpio_ib_mode_sel[27] ( PIN gpio_ib_mode_sel[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3286915 ) ( 280 * ) ; - - gpio_loopback_one[10] ( PIN gpio_loopback_one[10] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3290185 ) ( 3168630 * ) ; - - gpio_vtrip_sel[27] ( PIN gpio_vtrip_sel[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3290135 ) ( 280 * ) ; - - gpio_out[27] ( PIN gpio_out[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3299335 ) ( 280 * ) ; - - gpio_loopback_zero[10] ( PIN gpio_loopback_zero[10] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3300185 ) ( 3168630 * ) ; - - gpio_holdover[27] ( PIN gpio_holdover[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3302095 ) ( 280 * ) ; - - gpio_dm2[27] ( PIN gpio_dm2[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3305315 ) ( 280 * ) ; - - gpio_analog_sel[27] ( PIN gpio_analog_sel[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3308535 ) ( 280 * ) ; - - gpio_inp_dis[27] ( PIN gpio_inp_dis[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3320955 ) ( 280 * ) ; - - gpio_analog_pol[27] ( PIN gpio_analog_pol[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3323715 ) ( 280 * ) ; - - gpio_dm0[27] ( PIN gpio_dm0[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3326935 ) ( 280 * ) ; - - gpio_analog_en[27] ( PIN gpio_analog_en[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3330155 ) ( 280 * ) ; - - analog_noesd_io[27] ( PIN analog_noesd_io[27] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 3332920 ) ( 280 * ) ; - - gpio_dm1[27] ( PIN gpio_dm1[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3336135 ) ( 280 * ) ; - - analog_io[27] ( PIN analog_io[27] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 3342120 ) ( 280 * ) ; - - gpio_slow_sel[27] ( PIN gpio_slow_sel[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3345335 ) ( 280 * ) ; - - gpio_in[27] ( PIN gpio_in[27] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3354535 ) ( 280 * ) ; - - gpio_in[11] ( PIN gpio_in[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3435095 ) ( 3168750 * ) ; - - gpio_slow_sel[11] ( PIN gpio_slow_sel[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3444295 ) ( 3168750 * ) ; - - analog_io[11] ( PIN analog_io[11] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 3447510 ) ( 3168750 * ) ; - - gpio_dm1[11] ( PIN gpio_dm1[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3453495 ) ( 3168750 * ) ; - - analog_noesd_io[11] ( PIN analog_noesd_io[11] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 3456710 ) ( 3168750 * ) ; - - gpio_loopback_zero[26] ( PIN gpio_loopback_zero[26] ) - + ROUTED met3 ( -1850 3458370 ) ( 130 * ) ; - - gpio_analog_en[11] ( PIN gpio_analog_en[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3459475 ) ( 3168750 * ) ; - - gpio_dm0[11] ( PIN gpio_dm0[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3462695 ) ( 3168750 * ) ; - - gpio_analog_pol[11] ( PIN gpio_analog_pol[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3465915 ) ( 3168750 * ) ; - - gpio_inp_dis[11] ( PIN gpio_inp_dis[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3468675 ) ( 3168750 * ) ; - - gpio_loopback_one[26] ( PIN gpio_loopback_one[26] ) - + ROUTED met3 ( -1850 3468370 ) ( 130 * ) ; - - gpio_analog_sel[11] ( PIN gpio_analog_sel[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3481095 ) ( 3168750 * ) ; - - gpio_dm2[11] ( PIN gpio_dm2[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3484315 ) ( 3168750 * ) ; - - gpio_holdover[11] ( PIN gpio_holdover[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3487535 ) ( 3168750 * ) ; - - gpio_out[11] ( PIN gpio_out[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3490295 ) ( 3168750 * ) ; - - gpio_in_h[26] ( PIN gpio_in_h[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3496935 ) ( 280 * ) ; - - gpio_vtrip_sel[11] ( PIN gpio_vtrip_sel[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3499495 ) ( 3168750 * ) ; - - gpio_oeb[26] ( PIN gpio_oeb[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3499695 ) ( 280 * ) ; - - gpio_ib_mode_sel[11] ( PIN gpio_ib_mode_sel[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3502715 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[26] ( PIN gpio_ib_mode_sel[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3502915 ) ( 280 * ) ; - - gpio_oeb[11] ( PIN gpio_oeb[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3505935 ) ( 3168750 * ) ; - - gpio_vtrip_sel[26] ( PIN gpio_vtrip_sel[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3506135 ) ( 280 * ) ; - - gpio_in_h[11] ( PIN gpio_in_h[11] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3508695 ) ( 3168750 * ) ; - - gpio_loopback_one[11] ( PIN gpio_loopback_one[11] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3515185 ) ( 3168630 * ) ; - - gpio_out[26] ( PIN gpio_out[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3515335 ) ( 280 * ) ; - - gpio_holdover[26] ( PIN gpio_holdover[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3518095 ) ( 280 * ) ; - - gpio_dm2[26] ( PIN gpio_dm2[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3521315 ) ( 280 * ) ; - - gpio_analog_sel[26] ( PIN gpio_analog_sel[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3524535 ) ( 280 * ) ; - - gpio_loopback_zero[11] ( PIN gpio_loopback_zero[11] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3525185 ) ( 3168630 * ) ; - - gpio_inp_dis[26] ( PIN gpio_inp_dis[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3536955 ) ( 280 * ) ; - - gpio_analog_pol[26] ( PIN gpio_analog_pol[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3539715 ) ( 280 * ) ; - - gpio_dm0[26] ( PIN gpio_dm0[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3542935 ) ( 280 * ) ; - - gpio_analog_en[26] ( PIN gpio_analog_en[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3546155 ) ( 280 * ) ; - - analog_noesd_io[26] ( PIN analog_noesd_io[26] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 3548920 ) ( 280 * ) ; - - gpio_dm1[26] ( PIN gpio_dm1[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3552135 ) ( 280 * ) ; - - analog_io[26] ( PIN analog_io[26] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 3558120 ) ( 280 * ) ; - - gpio_slow_sel[26] ( PIN gpio_slow_sel[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3561335 ) ( 280 * ) ; - - gpio_in[26] ( PIN gpio_in[26] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3570535 ) ( 280 * ) ; - - gpio_in[12] ( PIN gpio_in[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3660095 ) ( 3168750 * ) ; - - gpio_slow_sel[12] ( PIN gpio_slow_sel[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3669295 ) ( 3168750 * ) ; - - analog_io[12] ( PIN analog_io[12] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 3672510 ) ( 3168750 * ) ; - - gpio_loopback_zero[25] ( PIN gpio_loopback_zero[25] ) - + ROUTED met3 ( -1850 3673370 ) ( 130 * ) ; - - gpio_dm1[12] ( PIN gpio_dm1[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3678495 ) ( 3168750 * ) ; - - analog_noesd_io[12] ( PIN analog_noesd_io[12] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 3681710 ) ( 3168750 * ) ; - - gpio_loopback_one[25] ( PIN gpio_loopback_one[25] ) - + ROUTED met3 ( -1850 3683370 ) ( 130 * ) ; - - gpio_analog_en[12] ( PIN gpio_analog_en[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3684475 ) ( 3168750 * ) ; - - gpio_dm0[12] ( PIN gpio_dm0[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3687695 ) ( 3168750 * ) ; - - gpio_analog_pol[12] ( PIN gpio_analog_pol[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3690915 ) ( 3168750 * ) ; - - gpio_inp_dis[12] ( PIN gpio_inp_dis[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3693675 ) ( 3168750 * ) ; - - gpio_analog_sel[12] ( PIN gpio_analog_sel[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3706095 ) ( 3168750 * ) ; - - gpio_dm2[12] ( PIN gpio_dm2[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3709315 ) ( 3168750 * ) ; - - gpio_holdover[12] ( PIN gpio_holdover[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3712535 ) ( 3168750 * ) ; - - gpio_in_h[25] ( PIN gpio_in_h[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3712935 ) ( 280 * ) ; - - gpio_out[12] ( PIN gpio_out[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3715295 ) ( 3168750 * ) ; - - gpio_oeb[25] ( PIN gpio_oeb[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3715695 ) ( 280 * ) ; - - gpio_ib_mode_sel[25] ( PIN gpio_ib_mode_sel[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3718915 ) ( 280 * ) ; - - gpio_vtrip_sel[25] ( PIN gpio_vtrip_sel[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3722135 ) ( 280 * ) ; - - gpio_vtrip_sel[12] ( PIN gpio_vtrip_sel[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3724495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[12] ( PIN gpio_ib_mode_sel[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3727715 ) ( 3168750 * ) ; - - gpio_oeb[12] ( PIN gpio_oeb[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3730935 ) ( 3168750 * ) ; - - gpio_out[25] ( PIN gpio_out[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3731335 ) ( 280 * ) ; - - gpio_in_h[12] ( PIN gpio_in_h[12] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 3733695 ) ( 3168750 * ) ; - - gpio_holdover[25] ( PIN gpio_holdover[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3734095 ) ( 280 * ) ; - - gpio_dm2[25] ( PIN gpio_dm2[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3737315 ) ( 280 * ) ; - - gpio_loopback_one[12] ( PIN gpio_loopback_one[12] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3740185 ) ( 3168630 * ) ; - - gpio_analog_sel[25] ( PIN gpio_analog_sel[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3740535 ) ( 280 * ) ; - - gpio_loopback_zero[12] ( PIN gpio_loopback_zero[12] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 3750185 ) ( 3168630 * ) ; - - gpio_inp_dis[25] ( PIN gpio_inp_dis[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3752955 ) ( 280 * ) ; - - gpio_analog_pol[25] ( PIN gpio_analog_pol[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3755715 ) ( 280 * ) ; - - gpio_dm0[25] ( PIN gpio_dm0[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3758935 ) ( 280 * ) ; - - gpio_analog_en[25] ( PIN gpio_analog_en[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3762155 ) ( 280 * ) ; - - analog_noesd_io[25] ( PIN analog_noesd_io[25] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 3764920 ) ( 280 * ) ; - - gpio_dm1[25] ( PIN gpio_dm1[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3768135 ) ( 280 * ) ; - - analog_io[25] ( PIN analog_io[25] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 3774120 ) ( 280 * ) ; - - gpio_slow_sel[25] ( PIN gpio_slow_sel[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3777335 ) ( 280 * ) ; - - gpio_in[25] ( PIN gpio_in[25] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 3786535 ) ( 280 * ) ; - - vssa2 ( PIN vssa2 ) - + ROUTED met3 TAPERRULE met3_width_2500 ( -970 3927810 ) ( * 3951710 ) - NEW met3 TAPERRULE met3_width_2500 ( -970 3977710 ) ( * 4001610 ) ; - - gpio_in[13] ( PIN gpio_in[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4106095 ) ( 3168750 * ) ; - - gpio_slow_sel[13] ( PIN gpio_slow_sel[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4115295 ) ( 3168750 * ) ; - - analog_io[13] ( PIN analog_io[13] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 4118510 ) ( 3168750 * ) ; - - gpio_dm1[13] ( PIN gpio_dm1[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4124495 ) ( 3168750 * ) ; - - analog_noesd_io[13] ( PIN analog_noesd_io[13] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 4127710 ) ( 3168750 * ) ; - - gpio_analog_en[13] ( PIN gpio_analog_en[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4130475 ) ( 3168750 * ) ; - - gpio_dm0[13] ( PIN gpio_dm0[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4133695 ) ( 3168750 * ) ; - - gpio_analog_pol[13] ( PIN gpio_analog_pol[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4136915 ) ( 3168750 * ) ; - - gpio_inp_dis[13] ( PIN gpio_inp_dis[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4139675 ) ( 3168750 * ) ; - - gpio_analog_sel[13] ( PIN gpio_analog_sel[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4152095 ) ( 3168750 * ) ; - - gpio_dm2[13] ( PIN gpio_dm2[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4155315 ) ( 3168750 * ) ; - - gpio_holdover[13] ( PIN gpio_holdover[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4158535 ) ( 3168750 * ) ; - - gpio_out[13] ( PIN gpio_out[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4161295 ) ( 3168750 * ) ; - - gpio_vtrip_sel[13] ( PIN gpio_vtrip_sel[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4170495 ) ( 3168750 * ) ; - - gpio_ib_mode_sel[13] ( PIN gpio_ib_mode_sel[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4173715 ) ( 3168750 * ) ; - - gpio_oeb[13] ( PIN gpio_oeb[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4176935 ) ( 3168750 * ) ; - - gpio_in_h[13] ( PIN gpio_in_h[13] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4179695 ) ( 3168750 * ) ; - - gpio_loopback_one[13] ( PIN gpio_loopback_one[13] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 4185185 ) ( 3168630 * ) ; - - gpio_loopback_zero[13] ( PIN gpio_loopback_zero[13] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 4195185 ) ( 3168630 * ) ; - - gpio_loopback_zero[24] ( PIN gpio_loopback_zero[24] ) - + ROUTED met3 ( -1850 4523370 ) ( 130 * ) ; - - gpio_loopback_one[24] ( PIN gpio_loopback_one[24] ) - + ROUTED met3 ( -1850 4533370 ) ( 130 * ) ; - - gpio_in[14] ( PIN gpio_in[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4552095 ) ( 3168750 * ) ; - - gpio_slow_sel[14] ( PIN gpio_slow_sel[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4561295 ) ( 3168750 * ) ; - - gpio_in_h[24] ( PIN gpio_in_h[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4561935 ) ( 280 * ) ; - - analog_io[14] ( PIN analog_io[14] ) - + ROUTED met3 TAPERRULE met3_width_640 ( 3166350 4564510 ) ( 3168750 * ) ; - - gpio_oeb[24] ( PIN gpio_oeb[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4564695 ) ( 280 * ) ; - - gpio_ib_mode_sel[24] ( PIN gpio_ib_mode_sel[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4567915 ) ( 280 * ) ; - - gpio_dm1[14] ( PIN gpio_dm1[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4570495 ) ( 3168750 * ) ; - - gpio_vtrip_sel[24] ( PIN gpio_vtrip_sel[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4571135 ) ( 280 * ) ; - - analog_noesd_io[14] ( PIN analog_noesd_io[14] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( 3166350 4573710 ) ( 3168750 * ) ; - - gpio_analog_en[14] ( PIN gpio_analog_en[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4576475 ) ( 3168750 * ) ; - - gpio_dm0[14] ( PIN gpio_dm0[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4579695 ) ( 3168750 * ) ; - - gpio_out[24] ( PIN gpio_out[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4580335 ) ( 280 * ) ; - - gpio_analog_pol[14] ( PIN gpio_analog_pol[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4582915 ) ( 3168750 * ) ; - - gpio_holdover[24] ( PIN gpio_holdover[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4583095 ) ( 280 * ) ; - - gpio_inp_dis[14] ( PIN gpio_inp_dis[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4585675 ) ( 3168750 * ) ; - - gpio_dm2[24] ( PIN gpio_dm2[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4586315 ) ( 280 * ) ; - - gpio_analog_sel[24] ( PIN gpio_analog_sel[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4589535 ) ( 280 * ) ; - - gpio_analog_sel[14] ( PIN gpio_analog_sel[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4598095 ) ( 3168750 * ) ; - - gpio_dm2[14] ( PIN gpio_dm2[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4601315 ) ( 3168750 * ) ; - - gpio_inp_dis[24] ( PIN gpio_inp_dis[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4601955 ) ( 280 * ) ; - - gpio_holdover[14] ( PIN gpio_holdover[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4604535 ) ( 3168750 * ) ; - - gpio_analog_pol[24] ( PIN gpio_analog_pol[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4604715 ) ( 280 * ) ; - - gpio_out[14] ( PIN gpio_out[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4607295 ) ( 3168750 * ) ; - - gpio_dm0[24] ( PIN gpio_dm0[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4607935 ) ( 280 * ) ; - - gpio_analog_en[24] ( PIN gpio_analog_en[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4611155 ) ( 280 * ) ; - - analog_noesd_io[24] ( PIN analog_noesd_io[24] ) - + ROUTED met3 TAPERRULE met3_width_1070 ( -2120 4613920 ) ( 280 * ) ; - - gpio_vtrip_sel[14] ( PIN gpio_vtrip_sel[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4616495 ) ( 3168750 * ) ; - - gpio_dm1[24] ( PIN gpio_dm1[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4617135 ) ( 280 * ) ; - - gpio_ib_mode_sel[14] ( PIN gpio_ib_mode_sel[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4619715 ) ( 3168750 * ) ; - - gpio_oeb[14] ( PIN gpio_oeb[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4622935 ) ( 3168750 * ) ; - - analog_io[24] ( PIN analog_io[24] ) - + ROUTED met3 TAPERRULE met3_width_640 ( -2120 4623120 ) ( 280 * ) ; - - gpio_in_h[14] ( PIN gpio_in_h[14] ) - + ROUTED met3 TAPERRULE met3_width_350 ( 3166350 4625695 ) ( 3168750 * ) ; - - gpio_slow_sel[24] ( PIN gpio_slow_sel[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4626335 ) ( 280 * ) ; - - gpio_loopback_one[14] ( PIN gpio_loopback_one[14] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 4635185 ) ( 3168630 * ) ; - - gpio_in[24] ( PIN gpio_in[24] ) - + ROUTED met3 TAPERRULE met3_width_350 ( -2120 4635535 ) ( 280 * ) ; - - gpio_loopback_zero[14] ( PIN gpio_loopback_zero[14] ) - + ROUTED met3 TAPERRULE met3_width_310 ( 3166350 4645185 ) ( 3168630 * ) ; - - mask_rev[31] ( PIN mask_rev[31] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3060260 -1300 ) ( * 280 ) - NEW met2 ( 3060255 -1930 ) ( * -1370 ) ; - - mask_rev[30] ( PIN mask_rev[30] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3059140 -1300 ) ( * 280 ) - NEW met2 ( 3059135 -1930 ) ( * -1370 ) ; - - mask_rev[29] ( PIN mask_rev[29] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3058020 -1300 ) ( * 280 ) - NEW met2 ( 3058015 -1930 ) ( * -1370 ) ; - - mask_rev[28] ( PIN mask_rev[28] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3056900 -1300 ) ( * 280 ) - NEW met2 ( 3056895 -1930 ) ( * -1370 ) ; - - mask_rev[27] ( PIN mask_rev[27] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3055780 -1300 ) ( * 280 ) - NEW met2 ( 3055775 -1930 ) ( * -1370 ) ; - - mask_rev[26] ( PIN mask_rev[26] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3054660 -1300 ) ( * 280 ) - NEW met2 ( 3054655 -1930 ) ( * -1370 ) ; - - mask_rev[25] ( PIN mask_rev[25] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3053540 -1300 ) ( * 280 ) - NEW met2 ( 3053535 -1930 ) ( * -1370 ) ; - - mask_rev[24] ( PIN mask_rev[24] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3052420 -1300 ) ( * 280 ) - NEW met2 ( 3052415 -1930 ) ( * -1370 ) ; - - mask_rev[23] ( PIN mask_rev[23] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3051300 -1300 ) ( * 280 ) - NEW met2 ( 3051295 -1930 ) ( * -1370 ) ; - - mask_rev[22] ( PIN mask_rev[22] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3050180 -1300 ) ( * 280 ) - NEW met2 ( 3050175 -1930 ) ( * -1370 ) ; - - mask_rev[21] ( PIN mask_rev[21] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3049060 -1300 ) ( * 280 ) - NEW met2 ( 3049055 -1930 ) ( * -1370 ) ; - - mask_rev[20] ( PIN mask_rev[20] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3047940 -1300 ) ( * 280 ) - NEW met2 ( 3047935 -1930 ) ( * -1370 ) ; - - mask_rev[19] ( PIN mask_rev[19] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3046820 -1300 ) ( * 280 ) - NEW met2 ( 3046815 -1930 ) ( * -1370 ) ; - - mask_rev[18] ( PIN mask_rev[18] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3045700 -1300 ) ( * 280 ) - NEW met2 ( 3045695 -1930 ) ( * -1370 ) ; - - mask_rev[17] ( PIN mask_rev[17] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3044580 -1300 ) ( * 280 ) - NEW met2 ( 3044575 -1930 ) ( * -1370 ) ; - - mask_rev[16] ( PIN mask_rev[16] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3043460 -1300 ) ( * 280 ) - NEW met2 ( 3043455 -1930 ) ( * -1370 ) ; - - mask_rev[15] ( PIN mask_rev[15] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3042340 -1300 ) ( * 280 ) - NEW met2 ( 3042335 -1930 ) ( * -1370 ) ; - - mask_rev[14] ( PIN mask_rev[14] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3041220 -1300 ) ( * 280 ) - NEW met2 ( 3041215 -1930 ) ( * -1370 ) ; - - mask_rev[13] ( PIN mask_rev[13] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3040100 -1300 ) ( * 280 ) - NEW met2 ( 3040095 -1930 ) ( * -1370 ) ; - - mask_rev[12] ( PIN mask_rev[12] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3038980 -1300 ) ( * 280 ) - NEW met2 ( 3038975 -1930 ) ( * -1370 ) ; - - mask_rev[11] ( PIN mask_rev[11] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3037860 -1300 ) ( * 280 ) - NEW met2 ( 3037855 -1930 ) ( * -1370 ) ; - - mask_rev[10] ( PIN mask_rev[10] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3036740 -1300 ) ( * 280 ) - NEW met2 ( 3036735 -1930 ) ( * -1370 ) ; - - mask_rev[9] ( PIN mask_rev[9] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3035620 -1300 ) ( * 280 ) - NEW met2 ( 3035615 -1930 ) ( * -1370 ) ; - - mask_rev[8] ( PIN mask_rev[8] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3034500 -1300 ) ( * 280 ) - NEW met2 ( 3034495 -1930 ) ( * -1370 ) ; - - mask_rev[7] ( PIN mask_rev[7] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3033380 -1300 ) ( * 280 ) - NEW met2 ( 3033375 -1930 ) ( * -1370 ) ; - - mask_rev[6] ( PIN mask_rev[6] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3032260 -1300 ) ( * 280 ) - NEW met2 ( 3032255 -1930 ) ( * -1370 ) ; - - mask_rev[5] ( PIN mask_rev[5] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3031140 -1300 ) ( * 280 ) - NEW met2 ( 3031135 -1930 ) ( * -1370 ) ; - - mask_rev[4] ( PIN mask_rev[4] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3030020 -1300 ) ( * 280 ) - NEW met2 ( 3030015 -1930 ) ( * -1370 ) ; - - mask_rev[3] ( PIN mask_rev[3] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3028900 -1300 ) ( * 280 ) - NEW met2 ( 3028895 -1930 ) ( * -1370 ) ; - - mask_rev[2] ( PIN mask_rev[2] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3027780 -1300 ) ( * 280 ) - NEW met2 ( 3027775 -1930 ) ( * -1370 ) ; - - mask_rev[1] ( PIN mask_rev[1] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3026660 -1300 ) ( * 280 ) - NEW met2 ( 3026655 -1930 ) ( * -1370 ) ; - - mask_rev[0] ( PIN mask_rev[0] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 3025540 -1300 ) ( * 280 ) - NEW met2 ( 3025535 -1930 ) ( * -1370 ) ; - - gpio_loopback_zero[43] ( PIN gpio_loopback_zero[43] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 2463305 -2000 ) ( * 280 ) ; - - gpio_loopback_one[43] ( PIN gpio_loopback_one[43] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 2442030 -2000 ) ( * 280 ) ; - - gpio_in_h[43] ( PIN gpio_in_h[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2438690 -2120 ) ( * 280 ) ; - - gpio_oeb[43] ( PIN gpio_oeb[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2435930 -2120 ) ( * 280 ) ; - - gpio_ib_mode_sel[43] ( PIN gpio_ib_mode_sel[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2432710 -2120 ) ( * 280 ) ; - - gpio_vtrip_sel[43] ( PIN gpio_vtrip_sel[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2429490 -2120 ) ( * 280 ) ; - - gpio_out[43] ( PIN gpio_out[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2420290 -2120 ) ( * 280 ) ; - - gpio_holdover[43] ( PIN gpio_holdover[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2417530 -2120 ) ( * 280 ) ; - - gpio_dm2[43] ( PIN gpio_dm2[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2414310 -2120 ) ( * 280 ) ; - - gpio_analog_sel[43] ( PIN gpio_analog_sel[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2411090 -2120 ) ( * 280 ) ; - - gpio_inp_dis[43] ( PIN gpio_inp_dis[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2398670 -2120 ) ( * 280 ) ; - - gpio_analog_pol[43] ( PIN gpio_analog_pol[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2395910 -2120 ) ( * 280 ) ; - - gpio_dm0[43] ( PIN gpio_dm0[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2392690 -2120 ) ( * 280 ) ; - - gpio_analog_en[43] ( PIN gpio_analog_en[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2389470 -2120 ) ( * 280 ) ; - - analog_noesd_io[43] ( PIN analog_noesd_io[43] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 2386710 -2120 ) ( * 280 ) ; - - gpio_dm1[43] ( PIN gpio_dm1[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2383490 -2120 ) ( * 280 ) ; - - analog_io[43] ( PIN analog_io[43] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 2377510 -2120 ) ( * 280 ) ; - - gpio_slow_sel[43] ( PIN gpio_slow_sel[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2374290 -2120 ) ( * 280 ) ; - - gpio_in[43] ( PIN gpio_in[43] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2365090 -2120 ) ( * 280 ) ; - - gpio_loopback_zero[42] ( PIN gpio_loopback_zero[42] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 2189020 -2000 ) ( * 280 ) ; - - gpio_loopback_one[42] ( PIN gpio_loopback_one[42] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 2168030 -2000 ) ( * 280 ) ; - - gpio_in_h[42] ( PIN gpio_in_h[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2164690 -2120 ) ( * 280 ) ; - - gpio_oeb[42] ( PIN gpio_oeb[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2161930 -2120 ) ( * 280 ) ; - - gpio_ib_mode_sel[42] ( PIN gpio_ib_mode_sel[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2158710 -2120 ) ( * 280 ) ; - - gpio_vtrip_sel[42] ( PIN gpio_vtrip_sel[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2155490 -2120 ) ( * 280 ) ; - - gpio_out[42] ( PIN gpio_out[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2146290 -2120 ) ( * 280 ) ; - - gpio_holdover[42] ( PIN gpio_holdover[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2143530 -2120 ) ( * 280 ) ; - - gpio_dm2[42] ( PIN gpio_dm2[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2140310 -2120 ) ( * 280 ) ; - - gpio_analog_sel[42] ( PIN gpio_analog_sel[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2137090 -2120 ) ( * 280 ) ; - - gpio_inp_dis[42] ( PIN gpio_inp_dis[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2124670 -2120 ) ( * 280 ) ; - - gpio_analog_pol[42] ( PIN gpio_analog_pol[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2121910 -2120 ) ( * 280 ) ; - - gpio_dm0[42] ( PIN gpio_dm0[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2118690 -2120 ) ( * 280 ) ; - - gpio_analog_en[42] ( PIN gpio_analog_en[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2115470 -2120 ) ( * 280 ) ; - - analog_noesd_io[42] ( PIN analog_noesd_io[42] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 2112710 -2120 ) ( * 280 ) ; - - gpio_dm1[42] ( PIN gpio_dm1[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2109490 -2120 ) ( * 280 ) ; - - analog_io[42] ( PIN analog_io[42] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 2103510 -2120 ) ( * 280 ) ; - - gpio_slow_sel[42] ( PIN gpio_slow_sel[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2100290 -2120 ) ( * 280 ) ; - - gpio_in[42] ( PIN gpio_in[42] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2091090 -2120 ) ( * 280 ) ; - - gpio_loopback_zero[41] ( PIN gpio_loopback_zero[41] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 1915020 -2000 ) ( * 280 ) ; - - gpio_loopback_one[41] ( PIN gpio_loopback_one[41] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 1894030 -2000 ) ( * 280 ) ; - - gpio_in_h[41] ( PIN gpio_in_h[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1890690 -2120 ) ( * 280 ) ; - - gpio_oeb[41] ( PIN gpio_oeb[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1887930 -2120 ) ( * 280 ) ; - - gpio_ib_mode_sel[41] ( PIN gpio_ib_mode_sel[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1884710 -2120 ) ( * 280 ) ; - - gpio_vtrip_sel[41] ( PIN gpio_vtrip_sel[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1881490 -2120 ) ( * 280 ) ; - - gpio_out[41] ( PIN gpio_out[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1872290 -2120 ) ( * 280 ) ; - - gpio_holdover[41] ( PIN gpio_holdover[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1869530 -2120 ) ( * 280 ) ; - - gpio_dm2[41] ( PIN gpio_dm2[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1866310 -2120 ) ( * 280 ) ; - - gpio_analog_sel[41] ( PIN gpio_analog_sel[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1863090 -2120 ) ( * 280 ) ; - - gpio_inp_dis[41] ( PIN gpio_inp_dis[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1850670 -2120 ) ( * 280 ) ; - - gpio_analog_pol[41] ( PIN gpio_analog_pol[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1847910 -2120 ) ( * 280 ) ; - - gpio_dm0[41] ( PIN gpio_dm0[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1844690 -2120 ) ( * 280 ) ; - - gpio_analog_en[41] ( PIN gpio_analog_en[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1841470 -2120 ) ( * 280 ) ; - - analog_noesd_io[41] ( PIN analog_noesd_io[41] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 1838710 -2120 ) ( * 280 ) ; - - gpio_dm1[41] ( PIN gpio_dm1[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1835490 -2120 ) ( * 280 ) ; - - analog_io[41] ( PIN analog_io[41] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 1829510 -2120 ) ( * 280 ) ; - - gpio_slow_sel[41] ( PIN gpio_slow_sel[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1826290 -2120 ) ( * 280 ) ; - - gpio_in[41] ( PIN gpio_in[41] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1817090 -2120 ) ( * 280 ) ; - - gpio_loopback_zero[40] ( PIN gpio_loopback_zero[40] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 1640955 -2000 ) ( * 170 ) ; - - gpio_loopback_one[40] ( PIN gpio_loopback_one[40] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 1620030 -2000 ) ( * 280 ) ; - - gpio_in_h[40] ( PIN gpio_in_h[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1616690 -2120 ) ( * 280 ) ; - - gpio_oeb[40] ( PIN gpio_oeb[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1613930 -2120 ) ( * 280 ) ; - - gpio_ib_mode_sel[40] ( PIN gpio_ib_mode_sel[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1610710 -2120 ) ( * 280 ) ; - - gpio_vtrip_sel[40] ( PIN gpio_vtrip_sel[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1607490 -2120 ) ( * 280 ) ; - - gpio_out[40] ( PIN gpio_out[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1598290 -2120 ) ( * 280 ) ; - - gpio_holdover[40] ( PIN gpio_holdover[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1595530 -2120 ) ( * 280 ) ; - - gpio_dm2[40] ( PIN gpio_dm2[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1592310 -2120 ) ( * 280 ) ; - - gpio_analog_sel[40] ( PIN gpio_analog_sel[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1589090 -2120 ) ( * 280 ) ; - - gpio_inp_dis[40] ( PIN gpio_inp_dis[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1576670 -2120 ) ( * 280 ) ; - - gpio_analog_pol[40] ( PIN gpio_analog_pol[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1573910 -2120 ) ( * 280 ) ; - - gpio_dm0[40] ( PIN gpio_dm0[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1570690 -2120 ) ( * 280 ) ; - - gpio_analog_en[40] ( PIN gpio_analog_en[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1567470 -2120 ) ( * 280 ) ; - - analog_noesd_io[40] ( PIN analog_noesd_io[40] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 1564710 -2120 ) ( * 280 ) ; - - gpio_dm1[40] ( PIN gpio_dm1[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1561490 -2120 ) ( * 280 ) ; - - analog_io[40] ( PIN analog_io[40] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 1555510 -2120 ) ( * 280 ) ; - - gpio_slow_sel[40] ( PIN gpio_slow_sel[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1552290 -2120 ) ( * 280 ) ; - - gpio_in[40] ( PIN gpio_in[40] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1543090 -2120 ) ( * 280 ) ; - - gpio_loopback_zero[39] ( PIN gpio_loopback_zero[39] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 1366930 -2000 ) ( * 280 ) ; - - gpio_loopback_one[39] ( PIN gpio_loopback_one[39] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 1346030 -2000 ) ( * 280 ) ; - - gpio_in_h[39] ( PIN gpio_in_h[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1342690 -2120 ) ( * 280 ) ; - - gpio_oeb[39] ( PIN gpio_oeb[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1339930 -2120 ) ( * 280 ) ; - - gpio_ib_mode_sel[39] ( PIN gpio_ib_mode_sel[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1336710 -2120 ) ( * 280 ) ; - - gpio_vtrip_sel[39] ( PIN gpio_vtrip_sel[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1333490 -2120 ) ( * 280 ) ; - - gpio_out[39] ( PIN gpio_out[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1324290 -2120 ) ( * 280 ) ; - - gpio_holdover[39] ( PIN gpio_holdover[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1321530 -2120 ) ( * 280 ) ; - - gpio_dm2[39] ( PIN gpio_dm2[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1318310 -2120 ) ( * 280 ) ; - - gpio_analog_sel[39] ( PIN gpio_analog_sel[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1315090 -2120 ) ( * 280 ) ; - - gpio_inp_dis[39] ( PIN gpio_inp_dis[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1302670 -2120 ) ( * 280 ) ; - - gpio_analog_pol[39] ( PIN gpio_analog_pol[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1299910 -2120 ) ( * 280 ) ; - - gpio_dm0[39] ( PIN gpio_dm0[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1296690 -2120 ) ( * 280 ) ; - - gpio_analog_en[39] ( PIN gpio_analog_en[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1293470 -2120 ) ( * 280 ) ; - - analog_noesd_io[39] ( PIN analog_noesd_io[39] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 1290710 -2120 ) ( * 280 ) ; - - gpio_dm1[39] ( PIN gpio_dm1[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1287490 -2120 ) ( * 280 ) ; - - analog_io[39] ( PIN analog_io[39] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 1281510 -2120 ) ( * 280 ) ; - - gpio_slow_sel[39] ( PIN gpio_slow_sel[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1278290 -2120 ) ( * 280 ) ; - - gpio_in[39] ( PIN gpio_in[39] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1269090 -2120 ) ( * 280 ) ; - - gpio_loopback_zero[38] ( PIN gpio_loopback_zero[38] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 819085 -2000 ) ( * 280 ) ; - - gpio_loopback_one[38] ( PIN gpio_loopback_one[38] ) - + ROUTED met2 TAPERRULE met2_width_260 ( 803030 -2000 ) ( * 280 ) ; - - gpio_in_h[38] ( PIN gpio_in_h[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 799690 -2120 ) ( * 280 ) ; - - gpio_oeb[38] ( PIN gpio_oeb[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 796930 -2120 ) ( * 280 ) ; - - gpio_ib_mode_sel[38] ( PIN gpio_ib_mode_sel[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 793710 -2120 ) ( * 280 ) ; - - gpio_vtrip_sel[38] ( PIN gpio_vtrip_sel[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 790490 -2120 ) ( * 280 ) ; - - gpio_out[38] ( PIN gpio_out[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 781290 -2120 ) ( * 280 ) ; - - gpio_holdover[38] ( PIN gpio_holdover[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 778530 -2120 ) ( * 280 ) ; - - gpio_dm2[38] ( PIN gpio_dm2[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 775310 -2120 ) ( * 280 ) ; - - gpio_analog_sel[38] ( PIN gpio_analog_sel[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 772090 -2120 ) ( * 280 ) ; - - gpio_inp_dis[38] ( PIN gpio_inp_dis[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 759670 -2120 ) ( * 280 ) ; - - gpio_analog_pol[38] ( PIN gpio_analog_pol[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 756910 -2120 ) ( * 280 ) ; - - gpio_dm0[38] ( PIN gpio_dm0[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 753690 -2120 ) ( * 280 ) ; - - gpio_analog_en[38] ( PIN gpio_analog_en[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 750470 -2120 ) ( * 280 ) ; - - analog_noesd_io[38] ( PIN analog_noesd_io[38] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 747710 -2120 ) ( * 280 ) ; - - gpio_dm1[38] ( PIN gpio_dm1[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 744490 -2120 ) ( * 280 ) ; - - analog_io[38] ( PIN analog_io[38] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 738510 -2120 ) ( * 280 ) ; - - gpio_slow_sel[38] ( PIN gpio_slow_sel[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 735290 -2120 ) ( * 280 ) ; - - gpio_in[38] ( PIN gpio_in[38] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 726090 -2120 ) ( * 280 ) ; - - resetb_l ( PIN resetb_l ) - + ROUTED met2 TAPERRULE met2_width_280 ( 550960 -2000 ) ( * 280 ) ; - - resetb_h ( PIN resetb_h ) - + ROUTED met2 TAPERRULE met2_width_330 ( 498020 -450 ) ( * 280 ) - NEW met2 TAPERRULE met2_width_300 ( 498020 -2000 ) ( * -450 ) ; - - gpio_in[15] ( PIN gpio_in[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2994540 4766350 ) ( * 4768750 ) ; - - gpio_slow_sel[15] ( PIN gpio_slow_sel[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2985340 4766350 ) ( * 4768750 ) ; - - analog_io[15] ( PIN analog_io[15] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 2982120 4766350 ) ( * 4768750 ) ; - - gpio_dm1[15] ( PIN gpio_dm1[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2976140 4766350 ) ( * 4768750 ) ; - - analog_noesd_io[15] ( PIN analog_noesd_io[15] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 2972920 4766350 ) ( * 4768750 ) ; - - gpio_analog_en[15] ( PIN gpio_analog_en[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2970160 4766350 ) ( * 4768750 ) ; - - gpio_dm0[15] ( PIN gpio_dm0[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2966940 4766350 ) ( * 4768750 ) ; - - gpio_analog_pol[15] ( PIN gpio_analog_pol[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2963720 4766350 ) ( * 4768750 ) ; - - gpio_inp_dis[15] ( PIN gpio_inp_dis[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2960960 4766350 ) ( * 4768750 ) ; - - gpio_analog_sel[15] ( PIN gpio_analog_sel[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2948540 4766350 ) ( * 4768750 ) ; - - gpio_dm2[15] ( PIN gpio_dm2[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2945320 4766350 ) ( * 4768750 ) ; - - gpio_holdover[15] ( PIN gpio_holdover[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2942100 4766350 ) ( * 4768750 ) ; - - gpio_out[15] ( PIN gpio_out[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2939340 4766350 ) ( * 4768750 ) ; - - gpio_vtrip_sel[15] ( PIN gpio_vtrip_sel[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2930140 4766350 ) ( * 4768750 ) ; - - gpio_ib_mode_sel[15] ( PIN gpio_ib_mode_sel[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2926920 4766350 ) ( * 4768750 ) ; - - gpio_oeb[15] ( PIN gpio_oeb[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2923700 4766350 ) ( * 4768750 ) ; - - gpio_in_h[15] ( PIN gpio_in_h[15] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2920940 4766350 ) ( * 4768750 ) ; - - gpio_loopback_one[15] ( PIN gpio_loopback_one[15] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 2891640 4766350 ) ( * 4768630 ) ; - - gpio_loopback_zero[15] ( PIN gpio_loopback_zero[15] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 2881635 4766350 ) ( * 4768630 ) ; - - gpio_in[16] ( PIN gpio_in[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2485540 4766350 ) ( * 4768750 ) ; - - gpio_slow_sel[16] ( PIN gpio_slow_sel[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2476340 4766350 ) ( * 4768750 ) ; - - analog_io[16] ( PIN analog_io[16] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 2473120 4766350 ) ( * 4768750 ) ; - - gpio_dm1[16] ( PIN gpio_dm1[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2467140 4766350 ) ( * 4768750 ) ; - - analog_noesd_io[16] ( PIN analog_noesd_io[16] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 2463920 4766350 ) ( * 4768750 ) ; - - gpio_analog_en[16] ( PIN gpio_analog_en[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2461160 4766350 ) ( * 4768750 ) ; - - gpio_dm0[16] ( PIN gpio_dm0[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2457940 4766350 ) ( * 4768750 ) ; - - gpio_analog_pol[16] ( PIN gpio_analog_pol[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2454720 4766350 ) ( * 4768750 ) ; - - gpio_inp_dis[16] ( PIN gpio_inp_dis[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2451960 4766350 ) ( * 4768750 ) ; - - gpio_analog_sel[16] ( PIN gpio_analog_sel[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2439540 4766350 ) ( * 4768750 ) ; - - gpio_dm2[16] ( PIN gpio_dm2[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2436320 4766350 ) ( * 4768750 ) ; - - gpio_holdover[16] ( PIN gpio_holdover[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2433100 4766350 ) ( * 4768750 ) ; - - gpio_out[16] ( PIN gpio_out[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2430340 4766350 ) ( * 4768750 ) ; - - gpio_vtrip_sel[16] ( PIN gpio_vtrip_sel[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2421140 4766350 ) ( * 4768750 ) ; - - gpio_ib_mode_sel[16] ( PIN gpio_ib_mode_sel[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2417920 4766350 ) ( * 4768750 ) ; - - gpio_oeb[16] ( PIN gpio_oeb[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2414700 4766350 ) ( * 4768750 ) ; - - gpio_in_h[16] ( PIN gpio_in_h[16] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2411940 4766350 ) ( * 4768750 ) ; - - gpio_loopback_one[16] ( PIN gpio_loopback_one[16] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 2394640 4766350 ) ( * 4768630 ) ; - - gpio_loopback_zero[16] ( PIN gpio_loopback_zero[16] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 2384635 4766350 ) ( * 4768630 ) ; - - gpio_in[17] ( PIN gpio_in[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2228540 4766350 ) ( * 4768750 ) ; - - gpio_slow_sel[17] ( PIN gpio_slow_sel[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2219340 4766350 ) ( * 4768750 ) ; - - analog_io[17] ( PIN analog_io[17] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 2216120 4766350 ) ( * 4768750 ) ; - - gpio_dm1[17] ( PIN gpio_dm1[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2210140 4766350 ) ( * 4768750 ) ; - - analog_noesd_io[17] ( PIN analog_noesd_io[17] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 2206920 4766350 ) ( * 4768750 ) ; - - gpio_analog_en[17] ( PIN gpio_analog_en[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2204160 4766350 ) ( * 4768750 ) ; - - gpio_dm0[17] ( PIN gpio_dm0[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2200940 4766350 ) ( * 4768750 ) ; - - gpio_analog_pol[17] ( PIN gpio_analog_pol[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2197720 4766350 ) ( * 4768750 ) ; - - gpio_inp_dis[17] ( PIN gpio_inp_dis[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2194960 4766350 ) ( * 4768750 ) ; - - gpio_analog_sel[17] ( PIN gpio_analog_sel[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2182540 4766350 ) ( * 4768750 ) ; - - gpio_dm2[17] ( PIN gpio_dm2[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2179320 4766350 ) ( * 4768750 ) ; - - gpio_holdover[17] ( PIN gpio_holdover[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2176100 4766350 ) ( * 4768750 ) ; - - gpio_out[17] ( PIN gpio_out[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2173340 4766350 ) ( * 4768750 ) ; - - gpio_vtrip_sel[17] ( PIN gpio_vtrip_sel[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2164140 4766350 ) ( * 4768750 ) ; - - gpio_ib_mode_sel[17] ( PIN gpio_ib_mode_sel[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2160920 4766350 ) ( * 4768750 ) ; - - gpio_oeb[17] ( PIN gpio_oeb[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2157700 4766350 ) ( * 4768750 ) ; - - gpio_in_h[17] ( PIN gpio_in_h[17] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 2154940 4766350 ) ( * 4768750 ) ; - - gpio_loopback_one[17] ( PIN gpio_loopback_one[17] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 2138640 4766350 ) ( * 4768630 ) ; - - gpio_loopback_zero[17] ( PIN gpio_loopback_zero[17] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 2128635 4766350 ) ( * 4768630 ) ; - - gpio_in[18] ( PIN gpio_in[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1783540 4766350 ) ( * 4768750 ) ; - - gpio_slow_sel[18] ( PIN gpio_slow_sel[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1774340 4766350 ) ( * 4768750 ) ; - - analog_io[18] ( PIN analog_io[18] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 1771120 4766350 ) ( * 4768750 ) ; - - gpio_dm1[18] ( PIN gpio_dm1[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1765140 4766350 ) ( * 4768750 ) ; - - analog_noesd_io[18] ( PIN analog_noesd_io[18] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 1761920 4766350 ) ( * 4768750 ) ; - - gpio_analog_en[18] ( PIN gpio_analog_en[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1759160 4766350 ) ( * 4768750 ) ; - - gpio_dm0[18] ( PIN gpio_dm0[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1755940 4766350 ) ( * 4768750 ) ; - - gpio_analog_pol[18] ( PIN gpio_analog_pol[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1752720 4766350 ) ( * 4768750 ) ; - - gpio_inp_dis[18] ( PIN gpio_inp_dis[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1749960 4766350 ) ( * 4768750 ) ; - - gpio_analog_sel[18] ( PIN gpio_analog_sel[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1737540 4766350 ) ( * 4768750 ) ; - - gpio_dm2[18] ( PIN gpio_dm2[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1734320 4766350 ) ( * 4768750 ) ; - - gpio_holdover[18] ( PIN gpio_holdover[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1731100 4766350 ) ( * 4768750 ) ; - - gpio_out[18] ( PIN gpio_out[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1728340 4766350 ) ( * 4768750 ) ; - - gpio_vtrip_sel[18] ( PIN gpio_vtrip_sel[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1719140 4766350 ) ( * 4768750 ) ; - - gpio_ib_mode_sel[18] ( PIN gpio_ib_mode_sel[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1715920 4766350 ) ( * 4768750 ) ; - - gpio_oeb[18] ( PIN gpio_oeb[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1712700 4766350 ) ( * 4768750 ) ; - - gpio_in_h[18] ( PIN gpio_in_h[18] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1709940 4766350 ) ( * 4768750 ) ; - - gpio_loopback_one[18] ( PIN gpio_loopback_one[18] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 1693640 4766350 ) ( * 4768630 ) ; - - gpio_loopback_zero[18] ( PIN gpio_loopback_zero[18] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 1683635 4766350 ) ( * 4768630 ) ; - - gpio_in[19] ( PIN gpio_in[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1274540 4766350 ) ( * 4768750 ) ; - - gpio_slow_sel[19] ( PIN gpio_slow_sel[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1265340 4766350 ) ( * 4768750 ) ; - - analog_io[19] ( PIN analog_io[19] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 1262120 4766350 ) ( * 4768750 ) ; - - gpio_dm1[19] ( PIN gpio_dm1[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1256140 4766350 ) ( * 4768750 ) ; - - analog_noesd_io[19] ( PIN analog_noesd_io[19] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 1252920 4766350 ) ( * 4768750 ) ; - - gpio_analog_en[19] ( PIN gpio_analog_en[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1250160 4766350 ) ( * 4768750 ) ; - - gpio_dm0[19] ( PIN gpio_dm0[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1246940 4766350 ) ( * 4768750 ) ; - - gpio_analog_pol[19] ( PIN gpio_analog_pol[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1243720 4766350 ) ( * 4768750 ) ; - - gpio_inp_dis[19] ( PIN gpio_inp_dis[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1240960 4766350 ) ( * 4768750 ) ; - - gpio_analog_sel[19] ( PIN gpio_analog_sel[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1228540 4766350 ) ( * 4768750 ) ; - - gpio_dm2[19] ( PIN gpio_dm2[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1225320 4766350 ) ( * 4768750 ) ; - - gpio_holdover[19] ( PIN gpio_holdover[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1222100 4766350 ) ( * 4768750 ) ; - - gpio_out[19] ( PIN gpio_out[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1219340 4766350 ) ( * 4768750 ) ; - - gpio_vtrip_sel[19] ( PIN gpio_vtrip_sel[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1210140 4766350 ) ( * 4768750 ) ; - - gpio_ib_mode_sel[19] ( PIN gpio_ib_mode_sel[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1206920 4766350 ) ( * 4768750 ) ; - - gpio_oeb[19] ( PIN gpio_oeb[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1203700 4766350 ) ( * 4768750 ) ; - - gpio_in_h[19] ( PIN gpio_in_h[19] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1200940 4766350 ) ( * 4768750 ) ; - - gpio_loopback_one[19] ( PIN gpio_loopback_one[19] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 1171640 4766350 ) ( * 4768630 ) ; - - gpio_loopback_zero[19] ( PIN gpio_loopback_zero[19] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 1161635 4766350 ) ( * 4768630 ) ; - - gpio_in[20] ( PIN gpio_in[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1016540 4766350 ) ( * 4768750 ) ; - - gpio_slow_sel[20] ( PIN gpio_slow_sel[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 1007340 4766350 ) ( * 4768750 ) ; - - analog_io[20] ( PIN analog_io[20] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 1004120 4766350 ) ( * 4768750 ) ; - - gpio_dm1[20] ( PIN gpio_dm1[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 998140 4766350 ) ( * 4768750 ) ; - - analog_noesd_io[20] ( PIN analog_noesd_io[20] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 994920 4766350 ) ( * 4768750 ) ; - - gpio_analog_en[20] ( PIN gpio_analog_en[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 992160 4766350 ) ( * 4768750 ) ; - - gpio_dm0[20] ( PIN gpio_dm0[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 988940 4766350 ) ( * 4768750 ) ; - - gpio_analog_pol[20] ( PIN gpio_analog_pol[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 985720 4766350 ) ( * 4768750 ) ; - - gpio_inp_dis[20] ( PIN gpio_inp_dis[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 982960 4766350 ) ( * 4768750 ) ; - - gpio_analog_sel[20] ( PIN gpio_analog_sel[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 970540 4766350 ) ( * 4768750 ) ; - - gpio_dm2[20] ( PIN gpio_dm2[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 967320 4766350 ) ( * 4768750 ) ; - - gpio_holdover[20] ( PIN gpio_holdover[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 964100 4766350 ) ( * 4768750 ) ; - - gpio_out[20] ( PIN gpio_out[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 961340 4766350 ) ( * 4768750 ) ; - - gpio_vtrip_sel[20] ( PIN gpio_vtrip_sel[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 952140 4766350 ) ( * 4768750 ) ; - - gpio_ib_mode_sel[20] ( PIN gpio_ib_mode_sel[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 948920 4766350 ) ( * 4768750 ) ; - - gpio_oeb[20] ( PIN gpio_oeb[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 945700 4766350 ) ( * 4768750 ) ; - - gpio_in_h[20] ( PIN gpio_in_h[20] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 942940 4766350 ) ( * 4768750 ) ; - - gpio_loopback_one[20] ( PIN gpio_loopback_one[20] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 915640 4766350 ) ( * 4768630 ) ; - - gpio_loopback_zero[20] ( PIN gpio_loopback_zero[20] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 905635 4766350 ) ( * 4768630 ) ; - - gpio_in[21] ( PIN gpio_in[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 759540 4766350 ) ( * 4768750 ) ; - - gpio_slow_sel[21] ( PIN gpio_slow_sel[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 750340 4766350 ) ( * 4768750 ) ; - - analog_io[21] ( PIN analog_io[21] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 747120 4766350 ) ( * 4768750 ) ; - - gpio_dm1[21] ( PIN gpio_dm1[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 741140 4766350 ) ( * 4768750 ) ; - - analog_noesd_io[21] ( PIN analog_noesd_io[21] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 737920 4766350 ) ( * 4768750 ) ; - - gpio_analog_en[21] ( PIN gpio_analog_en[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 735160 4766350 ) ( * 4768750 ) ; - - gpio_dm0[21] ( PIN gpio_dm0[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 731940 4766350 ) ( * 4768750 ) ; - - gpio_analog_pol[21] ( PIN gpio_analog_pol[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 728720 4766350 ) ( * 4768750 ) ; - - gpio_inp_dis[21] ( PIN gpio_inp_dis[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 725960 4766350 ) ( * 4768750 ) ; - - gpio_analog_sel[21] ( PIN gpio_analog_sel[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 713540 4766350 ) ( * 4768750 ) ; - - gpio_dm2[21] ( PIN gpio_dm2[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 710320 4766350 ) ( * 4768750 ) ; - - gpio_holdover[21] ( PIN gpio_holdover[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 707100 4766350 ) ( * 4768750 ) ; - - gpio_out[21] ( PIN gpio_out[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 704340 4766350 ) ( * 4768750 ) ; - - gpio_vtrip_sel[21] ( PIN gpio_vtrip_sel[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 695140 4766350 ) ( * 4768750 ) ; - - gpio_ib_mode_sel[21] ( PIN gpio_ib_mode_sel[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 691920 4766350 ) ( * 4768750 ) ; - - gpio_oeb[21] ( PIN gpio_oeb[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 688700 4766350 ) ( * 4768750 ) ; - - gpio_in_h[21] ( PIN gpio_in_h[21] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 685940 4766350 ) ( * 4768750 ) ; - - gpio_loopback_one[21] ( PIN gpio_loopback_one[21] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 659640 4766350 ) ( * 4768630 ) ; - - gpio_loopback_zero[21] ( PIN gpio_loopback_zero[21] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 649635 4766350 ) ( * 4768630 ) ; - - gpio_in[22] ( PIN gpio_in[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 502540 4766350 ) ( * 4768750 ) ; - - gpio_slow_sel[22] ( PIN gpio_slow_sel[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 493340 4766350 ) ( * 4768750 ) ; - - analog_io[22] ( PIN analog_io[22] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 490120 4766350 ) ( * 4768750 ) ; - - gpio_dm1[22] ( PIN gpio_dm1[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 484140 4766350 ) ( * 4768750 ) ; - - analog_noesd_io[22] ( PIN analog_noesd_io[22] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 480920 4766350 ) ( * 4768750 ) ; - - gpio_analog_en[22] ( PIN gpio_analog_en[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 478160 4766350 ) ( * 4768750 ) ; - - gpio_dm0[22] ( PIN gpio_dm0[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 474940 4766350 ) ( * 4768750 ) ; - - gpio_analog_pol[22] ( PIN gpio_analog_pol[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 471720 4766350 ) ( * 4768750 ) ; - - gpio_inp_dis[22] ( PIN gpio_inp_dis[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 468960 4766350 ) ( * 4768750 ) ; - - gpio_analog_sel[22] ( PIN gpio_analog_sel[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 456540 4766350 ) ( * 4768750 ) ; - - gpio_dm2[22] ( PIN gpio_dm2[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 453320 4766350 ) ( * 4768750 ) ; - - gpio_holdover[22] ( PIN gpio_holdover[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 450100 4766350 ) ( * 4768750 ) ; - - gpio_out[22] ( PIN gpio_out[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 447340 4766350 ) ( * 4768750 ) ; - - gpio_vtrip_sel[22] ( PIN gpio_vtrip_sel[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 438140 4766350 ) ( * 4768750 ) ; - - gpio_ib_mode_sel[22] ( PIN gpio_ib_mode_sel[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 434920 4766350 ) ( * 4768750 ) ; - - gpio_oeb[22] ( PIN gpio_oeb[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 431700 4766350 ) ( * 4768750 ) ; - - gpio_in_h[22] ( PIN gpio_in_h[22] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 428940 4766350 ) ( * 4768750 ) ; - - gpio_loopback_one[22] ( PIN gpio_loopback_one[22] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 403640 4766350 ) ( * 4768630 ) ; - - gpio_loopback_zero[22] ( PIN gpio_loopback_zero[22] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 393635 4766350 ) ( * 4768630 ) ; - - gpio_in[23] ( PIN gpio_in[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 245540 4766350 ) ( * 4768750 ) ; - - gpio_slow_sel[23] ( PIN gpio_slow_sel[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 236340 4766350 ) ( * 4768750 ) ; - - analog_io[23] ( PIN analog_io[23] ) - + ROUTED met2 TAPERRULE met2_width_640 ( 233120 4766350 ) ( * 4768750 ) ; - - gpio_dm1[23] ( PIN gpio_dm1[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 227140 4766350 ) ( * 4768750 ) ; - - analog_noesd_io[23] ( PIN analog_noesd_io[23] ) - + ROUTED met2 TAPERRULE met2_width_1070 ( 223920 4766350 ) ( * 4768750 ) ; - - gpio_analog_en[23] ( PIN gpio_analog_en[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 221160 4766350 ) ( * 4768750 ) ; - - gpio_dm0[23] ( PIN gpio_dm0[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 217940 4766350 ) ( * 4768750 ) ; - - gpio_analog_pol[23] ( PIN gpio_analog_pol[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 214720 4766350 ) ( * 4768750 ) ; - - gpio_inp_dis[23] ( PIN gpio_inp_dis[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 211960 4766350 ) ( * 4768750 ) ; - - gpio_analog_sel[23] ( PIN gpio_analog_sel[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 199540 4766350 ) ( * 4768750 ) ; - - gpio_dm2[23] ( PIN gpio_dm2[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 196320 4766350 ) ( * 4768750 ) ; - - gpio_holdover[23] ( PIN gpio_holdover[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 193100 4766350 ) ( * 4768750 ) ; - - gpio_out[23] ( PIN gpio_out[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 190340 4766350 ) ( * 4768750 ) ; - - gpio_vtrip_sel[23] ( PIN gpio_vtrip_sel[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 181140 4766350 ) ( * 4768750 ) ; - - gpio_ib_mode_sel[23] ( PIN gpio_ib_mode_sel[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 177920 4766350 ) ( * 4768750 ) ; - - gpio_oeb[23] ( PIN gpio_oeb[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 174700 4766350 ) ( * 4768750 ) ; - - gpio_in_h[23] ( PIN gpio_in_h[23] ) - + ROUTED met2 TAPERRULE met2_width_280 ( 171940 4766350 ) ( * 4768750 ) ; - - gpio_loopback_one[23] ( PIN gpio_loopback_one[23] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 147640 4766350 ) ( * 4768630 ) ; - - gpio_loopback_zero[23] ( PIN gpio_loopback_zero[23] ) - + ROUTED met2 TAPERRULE met2_width_300 ( 137635 4766350 ) ( * 4768630 ) ; -END NETS - END DESIGN diff --git a/mag/caravel_openframe.mag b/mag/caravel_openframe.mag index 4abf31ee..8e087a36 100644 --- a/mag/caravel_openframe.mag +++ b/mag/caravel_openframe.mag @@ -2,25 +2,6 @@ magic tech sky130A magscale 1 2 timestamp 1695675344 -<< checkpaint >> -rect 40504 1532674 43088 1535246 -rect 40504 1443474 43088 1446046 -rect 40504 1354274 43088 1356846 -rect 40504 1309274 43088 1311846 -rect 40504 1264274 43088 1266846 -rect 40504 1219074 43088 1221646 -rect 40504 1174074 43088 1176646 -rect 40504 1128874 43088 1131446 -rect -1260 -1260 718860 1038860 -rect 674512 -42446 677096 -39874 -rect 674512 -170046 677096 -167474 -rect 674512 -213246 677096 -210674 -rect 674512 -256446 677096 -253874 -rect 674512 -299646 677096 -297074 -rect 674512 -342846 677096 -340274 -rect 674512 -386046 677096 -383474 -<< error_p >> -rect 149223 18082 150855 18116 << metal5 >> rect 78440 1018512 90960 1031002 rect 129840 1018512 142360 1031002 diff --git a/mag/chip_io_gpio_connects.mag b/mag/chip_io_gpio_connects.mag index 03a1df41..e149b496 100644 --- a/mag/chip_io_gpio_connects.mag +++ b/mag/chip_io_gpio_connects.mag @@ -1,12 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1695666643 -<< error_p >> -rect 675774 102379 675780 102383 -rect 675768 102371 675769 102377 -rect 675768 102125 675769 102131 -rect 675774 102119 675780 102123 +timestamp 1695745122 << metal1 >> rect 675768 115799 675774 116011 rect 675826 115799 675832 116011 @@ -91,20 +86,26 @@ rect 676836 110250 677614 110302 rect 675874 110127 676727 110183 rect 676671 109850 676727 110127 rect 676671 109798 677614 109850 +rect 675872 109637 675936 109643 rect 675872 109636 677614 109637 rect 675872 109458 675878 109636 rect 675930 109585 677614 109636 rect 675930 109581 676776 109585 rect 675930 109458 675936 109581 +rect 675872 109451 675936 109458 +rect 675676 108990 675740 108997 rect 675676 108806 675682 108990 rect 675734 108908 675740 108990 rect 675734 108856 677614 108908 rect 675734 108806 675740 108856 +rect 675676 108799 675740 108806 +rect 675580 108326 675644 108331 rect 675580 108324 677230 108326 rect 675580 108152 675586 108324 rect 675638 108322 677230 108324 rect 675638 108270 677614 108322 rect 675638 108152 675644 108270 +rect 675580 108145 675644 108152 rect 675874 107643 677216 107699 rect 675874 107091 677086 107147 rect 677020 106982 677086 107091 @@ -133,22 +134,26 @@ rect 677399 103456 677451 103462 rect 676466 103133 677240 103185 rect 676240 102910 677133 103038 rect 675874 102767 676909 102823 -rect 675769 102377 675832 102379 +rect 675769 102377 675832 102383 rect 675769 102125 675774 102377 rect 675826 102179 675832 102377 rect 675826 102125 676776 102179 rect 675769 102123 676776 102125 -rect 675871 101825 675936 101827 +rect 675769 102116 675832 102123 +rect 675871 101825 675936 101834 rect 675871 101573 675878 101825 rect 675930 101627 675936 101825 rect 675930 101573 676610 101627 rect 675871 101571 676610 101573 +rect 675871 101564 675936 101571 rect 675874 100927 676467 100983 +rect 675580 100456 675644 100463 rect 675580 100284 675586 100456 rect 675638 100339 675644 100456 rect 675638 100284 676255 100339 rect 676401 100307 676467 100927 rect 675580 100283 676255 100284 +rect 675580 100276 675644 100283 rect 676214 100057 676254 100283 rect 676397 100091 676406 100307 rect 676462 100091 676471 100307 diff --git a/mag/chip_io_gpio_connects_horiz.mag b/mag/chip_io_gpio_connects_horiz.mag index ca61c20f..6c7be94f 100644 --- a/mag/chip_io_gpio_connects_horiz.mag +++ b/mag/chip_io_gpio_connects_horiz.mag @@ -1,9 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1695675344 -<< checkpaint >> -rect 674054 99659 678702 116976 +timestamp 1695746973 << metal1 >> rect 675778 116066 675830 116072 rect 675778 115848 675830 115854 @@ -232,11 +230,11 @@ rect 675407 106441 677379 106505 rect 677374 106285 677379 106441 rect 677439 106285 677444 106505 rect 677374 106280 677444 106285 -rect 677375 105866 677445 105870 -rect 675407 105865 677445 105866 -rect 675407 105806 677380 105865 -rect 675407 105796 675887 105806 -rect 677375 105645 677380 105806 +rect 677375 105867 677445 105870 +rect 675407 105865 677445 105867 +rect 675407 105807 677380 105865 +rect 675407 105797 675887 105807 +rect 677375 105645 677380 105807 rect 677440 105645 677445 105865 rect 677375 105640 677445 105645 rect 675407 105172 677260 105386 diff --git a/mag/chip_io_openframe.mag b/mag/chip_io_openframe.mag index 0c4ebd8a..04297cef 100644 --- a/mag/chip_io_openframe.mag +++ b/mag/chip_io_openframe.mag @@ -1,154 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1695675801 -<< checkpaint >> -rect 68429 994534 73601 998782 -rect 119629 994534 124801 998782 -rect 170829 994534 176001 998782 -rect 222029 994534 227201 998782 -rect 273229 994534 278401 998782 -rect 377629 994534 382801 998782 -rect 466629 994534 471801 998782 -rect 517829 994534 523001 998782 -rect 617229 994534 622401 998782 -rect 674545 967239 678793 972411 -rect 38814 945575 43062 950747 -rect 674545 877239 678793 882411 -rect 674545 788239 678793 793411 -rect 38814 775575 43062 780747 -rect 674545 743239 678793 748411 -rect 38814 732575 43062 737747 -rect 674545 698239 678793 703411 -rect 38814 689575 43062 694747 -rect 674545 653239 678793 658411 -rect 38814 646575 43062 651747 -rect 38814 603575 43062 608747 -rect 674545 608239 678793 613411 -rect 38814 560575 43062 565747 -rect 674545 563239 678793 568411 -rect 38814 517575 43062 522747 -rect 38814 388575 43062 393747 -rect 674545 386239 678793 391411 -rect 38814 345575 43062 350747 -rect 674545 341239 678793 346411 -rect 38814 302575 43062 307747 -rect 674545 296239 678793 301411 -rect 38814 259575 43062 264747 -rect 674545 251239 678793 256411 -rect 38814 216575 43062 221747 -rect 674545 206239 678793 211411 -rect 38814 173575 43062 178747 -rect 674545 161239 678793 166411 -rect 674545 116239 678793 121411 -rect 16179 101085 19639 101095 -rect 16179 95083 20673 101085 -rect 17213 95073 20673 95083 -rect 147050 38788 152222 43036 -rect 201850 38788 207022 43036 -rect 311450 38788 316622 43036 -rect 366250 38788 371422 43036 -rect 421050 38788 426222 43036 -rect 475850 38788 481022 43036 -rect 530650 38788 535822 43036 -rect 147801 15942 153429 21030 -rect 642960 9026 650432 16538 -<< error_s >> -rect 85588 1012253 88730 1012287 -rect 136988 1012253 140130 1012287 -rect 188388 1012253 191530 1012287 -rect 239788 1012253 242930 1012287 -rect 291388 1012253 294530 1012287 -rect 393188 1012253 396330 1012287 -rect 482188 1012253 485330 1012287 -rect 533588 1012253 536730 1012287 -rect 635388 1012253 638530 1012287 -rect 78124 1009804 78907 1009922 -rect 129524 1009804 130307 1009922 -rect 180924 1009804 181707 1009922 -rect 232324 1009804 233107 1009922 -rect 283924 1009804 284707 1009922 -rect 385724 1009804 386507 1009922 -rect 474724 1009804 475507 1009922 -rect 526124 1009804 526907 1009922 -rect 627924 1009804 628707 1009922 -rect 25481 963588 25515 966898 -rect 689804 964893 689922 965676 -rect 27846 956292 27964 956907 -rect 692253 955070 692287 958212 -rect 41633 916901 41897 916960 -rect 41633 916900 41837 916901 -rect 41633 916899 41693 916900 -rect 41633 916840 41837 916899 -rect 689804 875693 689922 876476 -rect 692253 865870 692287 869012 -rect 25481 793788 25515 797098 -rect 27846 786492 27964 787107 -rect 689804 786493 689922 787276 -rect 692253 776670 692287 779812 -rect 25481 750588 25515 753898 -rect 27846 743292 27964 743907 -rect 689804 741493 689922 742276 -rect 692253 731670 692287 734812 -rect 25481 707388 25515 710698 -rect 27846 700092 27964 700707 -rect 689804 696493 689922 697276 -rect 692253 686670 692287 689812 -rect 25481 664188 25515 667498 -rect 27846 656892 27964 657507 -rect 689804 651293 689922 652076 -rect 692253 641470 692287 644612 -rect 25481 620988 25515 624298 -rect 27846 613692 27964 614307 -rect 689804 606293 689922 607076 -rect 692253 596470 692287 599612 -rect 25481 577788 25515 581098 -rect 27846 570492 27964 571107 -rect 689804 561093 689922 561876 -rect 692253 551270 692287 554412 -rect 25481 534588 25515 537898 -rect 27846 527292 27964 527907 -rect 25481 406988 25515 410298 -rect 27846 399692 27964 400307 -rect 689804 383893 689922 384676 -rect 692253 374070 692287 377212 -rect 25481 363788 25515 367098 -rect 27846 356492 27964 357107 -rect 689804 338693 689922 339476 -rect 692253 328870 692287 332012 -rect 25481 320588 25515 323898 -rect 27846 313292 27964 313907 -rect 689804 293693 689922 294476 -rect 692253 283870 692287 287012 -rect 25481 277388 25515 280698 -rect 27846 270092 27964 270707 -rect 689804 248693 689922 249476 -rect 692253 238870 692287 242012 -rect 25481 234188 25515 237498 -rect 27846 226892 27964 227507 -rect 689804 203493 689922 204276 -rect 25481 190988 25515 194298 -rect 692253 193670 692287 196812 -rect 27846 183692 27964 184307 -rect 689804 158493 689922 159276 -rect 692253 148670 692287 151812 -rect 689804 113293 689922 114076 -rect 692253 103470 692287 106612 -rect 246049 39564 246050 39673 -rect 246129 39484 246130 39593 -rect 199693 27846 200308 27964 -rect 308293 27846 308908 27964 -rect 363093 27846 363708 27964 -rect 417893 27846 418508 27964 -rect 472693 27846 473308 27964 -rect 527493 27846 528108 27964 -rect 189702 25481 193012 25515 -rect 298302 25481 301612 25515 -rect 353102 25481 356412 25515 -rect 407902 25481 411212 25515 -rect 462702 25481 466012 25515 -rect 517502 25481 520812 25515 -rect 149223 18082 150855 18116 +timestamp 1695745228 << metal1 >> rect 41866 995682 675734 995734 rect 41866 95347 41918 995682 @@ -531,10 +384,13 @@ rect 646117 9350 646169 9402 rect 652884 9350 652936 9402 << metal2 >> rect 69634 996754 69695 996786 -rect 69634 995407 69695 996693 +rect 69634 996657 69695 996693 +rect 69635 995407 69695 996657 rect 71635 996754 71696 996786 -rect 71635 995407 71696 996693 +rect 71635 996657 71696 996693 rect 120834 996754 120895 996786 +rect 120834 996657 120895 996693 +rect 71635 995407 71695 996657 rect 76497 995407 76553 995887 rect 77049 995407 77105 995887 rect 77693 995407 77749 995887 @@ -552,10 +408,12 @@ rect 87537 995407 87593 995887 rect 88697 995407 88825 995887 rect 89377 995407 89433 995887 rect 91217 995407 91273 995887 -rect 120834 995407 120895 996693 +rect 120835 995407 120895 996657 rect 122835 996748 122896 996786 -rect 122835 995407 122896 996687 +rect 122835 996651 122896 996687 rect 172034 996754 172095 996786 +rect 172034 996657 172095 996693 +rect 122835 995407 122895 996651 rect 127897 995407 127953 995887 rect 128449 995407 128505 995887 rect 129093 995407 129149 995887 @@ -573,10 +431,12 @@ rect 138937 995407 138993 995887 rect 140097 995407 140225 995887 rect 140777 995407 140833 995887 rect 142617 995407 142673 995887 -rect 172034 995407 172095 996693 +rect 172035 995407 172095 996657 rect 174035 996757 174096 996786 -rect 174035 995407 174096 996696 +rect 174035 996660 174096 996696 rect 223234 996760 223295 996786 +rect 223234 996663 223295 996699 +rect 174035 995407 174095 996660 rect 179297 995407 179353 995887 rect 179849 995407 179905 995887 rect 180493 995407 180549 995887 @@ -594,10 +454,12 @@ rect 190337 995407 190393 995887 rect 191497 995407 191625 995887 rect 192177 995407 192233 995887 rect 194017 995407 194073 995887 -rect 223234 995407 223295 996699 +rect 223235 995407 223295 996663 rect 225235 996746 225296 996786 -rect 225235 995407 225296 996685 +rect 225235 996649 225296 996685 rect 274434 996757 274495 996786 +rect 274434 996660 274495 996696 +rect 225235 995407 225295 996649 rect 230697 995407 230753 995887 rect 231249 995407 231305 995887 rect 231893 995407 231949 995887 @@ -615,10 +477,12 @@ rect 241737 995407 241793 995887 rect 242897 995407 243025 995887 rect 243577 995407 243633 995887 rect 245417 995407 245473 995887 -rect 274434 995407 274495 996696 +rect 274435 995407 274495 996660 rect 276435 996757 276496 996786 -rect 276435 995407 276496 996696 +rect 276435 996660 276496 996696 rect 378834 996763 378895 996786 +rect 378834 996666 378895 996702 +rect 276435 995407 276495 996660 rect 282297 995407 282353 995887 rect 282849 995407 282905 995887 rect 283493 995407 283549 995887 @@ -636,10 +500,12 @@ rect 293337 995407 293393 995887 rect 294497 995407 294625 995887 rect 295177 995407 295233 995887 rect 297017 995407 297073 995887 -rect 378834 995407 378895 996702 +rect 378835 995407 378895 996666 rect 380835 996760 380896 996786 -rect 380835 995407 380896 996699 +rect 380835 996663 380896 996699 rect 467834 996748 467895 996786 +rect 380835 995407 380895 996663 +rect 467834 996651 467895 996687 rect 384097 995407 384153 995887 rect 384649 995407 384705 995887 rect 385293 995407 385349 995887 @@ -657,10 +523,12 @@ rect 395137 995407 395193 995887 rect 396297 995407 396425 995887 rect 396977 995407 397033 995887 rect 398817 995407 398873 995887 -rect 467834 995407 467895 996687 +rect 467835 995407 467895 996651 rect 469835 996751 469896 996786 -rect 469835 995407 469896 996690 +rect 469835 996654 469896 996690 rect 519034 996751 519095 996786 +rect 519034 996654 519095 996690 +rect 469835 995407 469895 996654 rect 473097 995407 473153 995887 rect 473649 995407 473705 995887 rect 474293 995407 474349 995887 @@ -678,10 +546,12 @@ rect 484137 995407 484193 995887 rect 485297 995407 485425 995887 rect 485977 995407 486033 995887 rect 487817 995407 487873 995887 -rect 519034 995407 519095 996690 +rect 519035 995407 519095 996654 rect 521035 996754 521096 996786 -rect 521035 995407 521096 996693 +rect 521035 996657 521096 996693 rect 618434 996751 618495 996786 +rect 521035 995407 521095 996657 +rect 618434 996654 618495 996690 rect 524497 995407 524553 995887 rect 525049 995407 525105 995887 rect 525693 995407 525749 995887 @@ -699,9 +569,10 @@ rect 535537 995407 535593 995887 rect 536697 995407 536825 995887 rect 537377 995407 537433 995887 rect 539217 995407 539273 995887 -rect 618434 995407 618495 996690 +rect 618435 995407 618495 996654 rect 620435 996754 620496 996786 -rect 620435 995407 620496 996693 +rect 620435 996657 620496 996693 +rect 620435 995407 620495 996657 rect 626297 995407 626353 995887 rect 626849 995407 626905 995887 rect 627493 995407 627549 995887 @@ -843,7 +714,7 @@ rect 315484 40818 315495 40874 rect 315551 40818 315562 40874 rect 315484 40816 315562 40818 rect 366113 40871 366173 40882 -rect 370302 40881 370354 42171 +rect 370302 40881 370354 42193 rect 405527 41713 405583 42193 rect 407367 41713 407423 42193 rect 407975 41713 408103 42193 @@ -1584,9 +1455,9 @@ rect 675407 917699 675907 917700 rect 676907 917409 677778 917410 rect 39880 917190 40717 917191 rect 41693 916900 42193 916901 -rect 39880 916899 41693 916900 +rect 39880 916899 42193 916900 rect 39880 912101 41039 916899 -rect 41837 912101 42193 916900 +rect 41837 912101 42193 916899 rect 675407 912749 676907 917409 rect 677705 912749 677778 917409 rect 675407 912748 677778 912749 @@ -4685,63 +4556,63 @@ timestamp 1637698310 transform 1 0 -108943 0 1 -4710 box 373080 14838 395618 19242 use chip_io_gpio_connects chip_io_gpio_connects_0 -timestamp 1695666643 +timestamp 1695745122 transform 0 -1 742000 1 0 320000 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_1 -timestamp 1695666643 +timestamp 1695745122 transform 0 -1 640200 1 0 320000 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_2 -timestamp 1695666643 +timestamp 1695745122 transform 0 -1 588800 1 0 320000 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_3 -timestamp 1695666643 +timestamp 1695745122 transform 0 -1 499800 1 0 320000 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_4 -timestamp 1695666643 +timestamp 1695745122 transform 0 -1 398000 1 0 320000 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_5 -timestamp 1695666643 +timestamp 1695745122 transform 0 -1 346400 1 0 320000 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_6 -timestamp 1695666643 +timestamp 1695745122 transform 0 -1 295000 1 0 320000 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_7 -timestamp 1695666643 +timestamp 1695745122 transform 0 -1 243600 1 0 320000 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_8 -timestamp 1695666643 +timestamp 1695745122 transform 0 -1 192200 1 0 320000 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_35 -timestamp 1695666643 +timestamp 1695745122 transform 0 1 86400 -1 0 717600 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_39 -timestamp 1695666643 +timestamp 1695745122 transform 0 1 195000 -1 0 717600 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_40 -timestamp 1695666643 +timestamp 1695745122 transform 0 1 249800 -1 0 717600 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_41 -timestamp 1695666643 +timestamp 1695745122 transform 0 1 304600 -1 0 717600 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_42 -timestamp 1695666643 +timestamp 1695745122 transform 0 1 359400 -1 0 717600 box 675407 99896 677652 117658 use chip_io_gpio_connects chip_io_gpio_connects_43 -timestamp 1695666643 +timestamp 1695745122 transform 0 1 414200 -1 0 717600 box 675407 99896 677652 117658 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_0 @@ -7921,257 +7792,257 @@ timestamp 1678062433 transform -1 0 152583 0 1 16471 box 0 -400 4000 3800 << labels >> -flabel metal2 s 636141 995407 636197 995887 0 FreeSans 400 90 0 0 gpio_analog_en[15] +flabel metal2 s 636141 995407 636197 995863 0 FreeSans 400 90 0 0 gpio_analog_en[15] port 450 nsew -flabel metal2 s 634853 995407 634909 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[15] +flabel metal2 s 634853 995407 634909 995863 0 FreeSans 400 90 0 0 gpio_analog_pol[15] port 538 nsew -flabel metal2 s 631817 995407 631873 995887 0 FreeSans 400 90 0 0 gpio_analog_sel[15] +flabel metal2 s 631817 995407 631873 995863 0 FreeSans 400 90 0 0 gpio_analog_sel[15] port 494 nsew -flabel metal2 s 635497 995407 635553 995887 0 FreeSans 400 90 0 0 gpio_dm0[15] +flabel metal2 s 635497 995407 635553 995863 0 FreeSans 400 90 0 0 gpio_dm0[15] port 582 nsew -flabel metal2 s 637337 995407 637393 995887 0 FreeSans 400 90 0 0 gpio_dm1[15] +flabel metal2 s 637337 995407 637393 995863 0 FreeSans 400 90 0 0 gpio_dm1[15] port 626 nsew -flabel metal2 s 631173 995407 631229 995887 0 FreeSans 400 90 0 0 gpio_dm2[15] +flabel metal2 s 631173 995407 631229 995863 0 FreeSans 400 90 0 0 gpio_dm2[15] port 670 nsew -flabel metal2 s 630529 995407 630585 995887 0 FreeSans 400 90 0 0 gpio_holdover[15] +flabel metal2 s 630529 995407 630585 995863 0 FreeSans 400 90 0 0 gpio_holdover[15] port 406 nsew -flabel metal2 s 627493 995407 627549 995887 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[15] +flabel metal2 s 627493 995407 627549 995863 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[15] port 274 nsew -flabel metal2 s 634301 995407 634357 995887 0 FreeSans 400 90 0 0 gpio_inp_dis[15] +flabel metal2 s 634301 995407 634357 995863 0 FreeSans 400 90 0 0 gpio_inp_dis[15] port 230 nsew -flabel metal2 s 626849 995407 626905 995887 0 FreeSans 400 90 0 0 gpio_oeb[15] +flabel metal2 s 626849 995407 626905 995863 0 FreeSans 400 90 0 0 gpio_oeb[15] port 186 nsew -flabel metal2 s 629977 995407 630033 995887 0 FreeSans 400 90 0 0 gpio_out[15] +flabel metal2 s 629977 995407 630033 995863 0 FreeSans 400 90 0 0 gpio_out[15] port 142 nsew -flabel metal2 s 639177 995407 639233 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[15] +flabel metal2 s 639177 995407 639233 995863 0 FreeSans 400 90 0 0 gpio_slow_sel[15] port 362 nsew -flabel metal2 s 628137 995407 628193 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[15] +flabel metal2 s 628137 995407 628193 995863 0 FreeSans 400 90 0 0 gpio_vtrip_sel[15] port 318 nsew -flabel metal2 s 641017 995407 641073 995887 0 FreeSans 400 90 0 0 gpio_in[15] +flabel metal2 s 641017 995407 641073 995863 0 FreeSans 400 90 0 0 gpio_in[15] port 714 nsew -flabel metal2 s 534341 995407 534397 995887 0 FreeSans 400 90 0 0 gpio_analog_en[16] +flabel metal2 s 534341 995407 534397 995863 0 FreeSans 400 90 0 0 gpio_analog_en[16] port 449 nsew -flabel metal2 s 533053 995407 533109 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[16] +flabel metal2 s 533053 995407 533109 995863 0 FreeSans 400 90 0 0 gpio_analog_pol[16] port 537 nsew -flabel metal2 s 530017 995407 530073 995887 0 FreeSans 400 90 0 0 gpio_analog_sel[16] +flabel metal2 s 530017 995407 530073 995863 0 FreeSans 400 90 0 0 gpio_analog_sel[16] port 493 nsew -flabel metal2 s 533697 995407 533753 995887 0 FreeSans 400 90 0 0 gpio_dm0[16] +flabel metal2 s 533697 995407 533753 995863 0 FreeSans 400 90 0 0 gpio_dm0[16] port 581 nsew -flabel metal2 s 535537 995407 535593 995887 0 FreeSans 400 90 0 0 gpio_dm1[16] +flabel metal2 s 535537 995407 535593 995863 0 FreeSans 400 90 0 0 gpio_dm1[16] port 625 nsew -flabel metal2 s 529373 995407 529429 995887 0 FreeSans 400 90 0 0 gpio_dm2[16] +flabel metal2 s 529373 995407 529429 995863 0 FreeSans 400 90 0 0 gpio_dm2[16] port 669 nsew -flabel metal2 s 528729 995407 528785 995887 0 FreeSans 400 90 0 0 gpio_holdover[16] +flabel metal2 s 528729 995407 528785 995863 0 FreeSans 400 90 0 0 gpio_holdover[16] port 405 nsew -flabel metal2 s 525693 995407 525749 995887 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[16] +flabel metal2 s 525693 995407 525749 995863 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[16] port 273 nsew -flabel metal2 s 532501 995407 532557 995887 0 FreeSans 400 90 0 0 gpio_inp_dis[16] +flabel metal2 s 532501 995407 532557 995863 0 FreeSans 400 90 0 0 gpio_inp_dis[16] port 229 nsew -flabel metal2 s 525049 995407 525105 995887 0 FreeSans 400 90 0 0 gpio_oeb[16] +flabel metal2 s 525049 995407 525105 995863 0 FreeSans 400 90 0 0 gpio_oeb[16] port 185 nsew -flabel metal2 s 528177 995407 528233 995887 0 FreeSans 400 90 0 0 gpio_out[16] +flabel metal2 s 528177 995407 528233 995863 0 FreeSans 400 90 0 0 gpio_out[16] port 141 nsew -flabel metal2 s 537377 995407 537433 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[16] +flabel metal2 s 537377 995407 537433 995863 0 FreeSans 400 90 0 0 gpio_slow_sel[16] port 361 nsew -flabel metal2 s 526337 995407 526393 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[16] +flabel metal2 s 526337 995407 526393 995863 0 FreeSans 400 90 0 0 gpio_vtrip_sel[16] port 317 nsew -flabel metal2 s 539217 995407 539273 995887 0 FreeSans 400 90 0 0 gpio_in[16] +flabel metal2 s 539217 995407 539273 995863 0 FreeSans 400 90 0 0 gpio_in[16] port 713 nsew -flabel metal2 s 484137 995407 484193 995887 0 FreeSans 400 90 0 0 gpio_dm1[17] +flabel metal2 s 484137 995407 484193 995863 0 FreeSans 400 90 0 0 gpio_dm1[17] port 624 nsew -flabel metal2 s 477973 995407 478029 995887 0 FreeSans 400 90 0 0 gpio_dm2[17] +flabel metal2 s 477973 995407 478029 995863 0 FreeSans 400 90 0 0 gpio_dm2[17] port 668 nsew -flabel metal2 s 477329 995407 477385 995887 0 FreeSans 400 90 0 0 gpio_holdover[17] +flabel metal2 s 477329 995407 477385 995863 0 FreeSans 400 90 0 0 gpio_holdover[17] port 404 nsew -flabel metal2 s 474293 995407 474349 995887 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[17] +flabel metal2 s 474293 995407 474349 995863 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[17] port 272 nsew -flabel metal2 s 481101 995407 481157 995887 0 FreeSans 400 90 0 0 gpio_inp_dis[17] +flabel metal2 s 481101 995407 481157 995863 0 FreeSans 400 90 0 0 gpio_inp_dis[17] port 228 nsew -flabel metal2 s 473649 995407 473705 995887 0 FreeSans 400 90 0 0 gpio_oeb[17] +flabel metal2 s 473649 995407 473705 995863 0 FreeSans 400 90 0 0 gpio_oeb[17] port 184 nsew -flabel metal2 s 476777 995407 476833 995887 0 FreeSans 400 90 0 0 gpio_out[17] +flabel metal2 s 476777 995407 476833 995863 0 FreeSans 400 90 0 0 gpio_out[17] port 140 nsew -flabel metal2 s 485977 995407 486033 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[17] +flabel metal2 s 485977 995407 486033 995863 0 FreeSans 400 90 0 0 gpio_slow_sel[17] port 360 nsew -flabel metal2 s 474937 995407 474993 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[17] +flabel metal2 s 474937 995407 474993 995863 0 FreeSans 400 90 0 0 gpio_vtrip_sel[17] port 316 nsew -flabel metal2 s 487817 995407 487873 995887 0 FreeSans 400 90 0 0 gpio_in[17] +flabel metal2 s 487817 995407 487873 995863 0 FreeSans 400 90 0 0 gpio_in[17] port 712 nsew -flabel metal2 s 393941 995407 393997 995887 0 FreeSans 400 90 0 0 gpio_analog_en[18] +flabel metal2 s 393941 995407 393997 995863 0 FreeSans 400 90 0 0 gpio_analog_en[18] port 447 nsew -flabel metal2 s 392653 995407 392709 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[18] +flabel metal2 s 392653 995407 392709 995863 0 FreeSans 400 90 0 0 gpio_analog_pol[18] port 535 nsew -flabel metal2 s 389617 995407 389673 995887 0 FreeSans 400 90 0 0 gpio_analog_sel[18] +flabel metal2 s 389617 995407 389673 995863 0 FreeSans 400 90 0 0 gpio_analog_sel[18] port 491 nsew -flabel metal2 s 393297 995407 393353 995887 0 FreeSans 400 90 0 0 gpio_dm0[18] +flabel metal2 s 393297 995407 393353 995863 0 FreeSans 400 90 0 0 gpio_dm0[18] port 579 nsew -flabel metal2 s 395137 995407 395193 995887 0 FreeSans 400 90 0 0 gpio_dm1[18] +flabel metal2 s 395137 995407 395193 995863 0 FreeSans 400 90 0 0 gpio_dm1[18] port 623 nsew -flabel metal2 s 388973 995407 389029 995887 0 FreeSans 400 90 0 0 gpio_dm2[18] +flabel metal2 s 388973 995407 389029 995863 0 FreeSans 400 90 0 0 gpio_dm2[18] port 667 nsew -flabel metal2 s 388329 995407 388385 995887 0 FreeSans 400 90 0 0 gpio_holdover[18] +flabel metal2 s 388329 995407 388385 995863 0 FreeSans 400 90 0 0 gpio_holdover[18] port 403 nsew -flabel metal2 s 385293 995407 385349 995887 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[18] +flabel metal2 s 385293 995407 385349 995863 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[18] port 271 nsew -flabel metal2 s 392101 995407 392157 995887 0 FreeSans 400 90 0 0 gpio_inp_dis[18] +flabel metal2 s 392101 995407 392157 995863 0 FreeSans 400 90 0 0 gpio_inp_dis[18] port 227 nsew -flabel metal2 s 384649 995407 384705 995887 0 FreeSans 400 90 0 0 gpio_oeb[18] +flabel metal2 s 384649 995407 384705 995863 0 FreeSans 400 90 0 0 gpio_oeb[18] port 183 nsew -flabel metal2 s 387777 995407 387833 995887 0 FreeSans 400 90 0 0 gpio_out[18] +flabel metal2 s 387777 995407 387833 995863 0 FreeSans 400 90 0 0 gpio_out[18] port 139 nsew -flabel metal2 s 396977 995407 397033 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[18] +flabel metal2 s 396977 995407 397033 995863 0 FreeSans 400 90 0 0 gpio_slow_sel[18] port 359 nsew -flabel metal2 s 385937 995407 385993 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[18] +flabel metal2 s 385937 995407 385993 995863 0 FreeSans 400 90 0 0 gpio_vtrip_sel[18] port 315 nsew -flabel metal2 s 398817 995407 398873 995887 0 FreeSans 400 90 0 0 gpio_in[18] +flabel metal2 s 398817 995407 398873 995863 0 FreeSans 400 90 0 0 gpio_in[18] port 711 nsew -flabel metal2 s 482941 995407 482997 995887 0 FreeSans 400 90 0 0 gpio_analog_en[17] +flabel metal2 s 482941 995407 482997 995863 0 FreeSans 400 90 0 0 gpio_analog_en[17] port 448 nsew -flabel metal2 s 481653 995407 481709 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[17] +flabel metal2 s 481653 995407 481709 995863 0 FreeSans 400 90 0 0 gpio_analog_pol[17] port 536 nsew -flabel metal2 s 478617 995407 478673 995887 0 FreeSans 400 90 0 0 gpio_analog_sel[17] +flabel metal2 s 478617 995407 478673 995863 0 FreeSans 400 90 0 0 gpio_analog_sel[17] port 492 nsew -flabel metal2 s 482297 995407 482353 995887 0 FreeSans 400 90 0 0 gpio_dm0[17] +flabel metal2 s 482297 995407 482353 995863 0 FreeSans 400 90 0 0 gpio_dm0[17] port 580 nsew -flabel metal2 s 295177 995407 295233 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[19] +flabel metal2 s 295177 995407 295233 995863 0 FreeSans 400 90 0 0 gpio_slow_sel[19] port 358 nsew -flabel metal2 s 284137 995407 284193 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[19] +flabel metal2 s 284137 995407 284193 995863 0 FreeSans 400 90 0 0 gpio_vtrip_sel[19] port 314 nsew -flabel metal2 s 297017 995407 297073 995887 0 FreeSans 400 90 0 0 gpio_in[19] +flabel metal2 s 297017 995407 297073 995863 0 FreeSans 400 90 0 0 gpio_in[19] port 710 nsew -flabel metal2 s 240541 995407 240597 995887 0 FreeSans 400 90 0 0 gpio_analog_en[20] +flabel metal2 s 240541 995407 240597 995863 0 FreeSans 400 90 0 0 gpio_analog_en[20] port 445 nsew -flabel metal2 s 239253 995407 239309 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[20] +flabel metal2 s 239253 995407 239309 995863 0 FreeSans 400 90 0 0 gpio_analog_pol[20] port 533 nsew -flabel metal2 s 236217 995407 236273 995887 0 FreeSans 400 90 0 0 gpio_analog_sel[20] +flabel metal2 s 236217 995407 236273 995863 0 FreeSans 400 90 0 0 gpio_analog_sel[20] port 489 nsew -flabel metal2 s 239897 995407 239953 995887 0 FreeSans 400 90 0 0 gpio_dm0[20] +flabel metal2 s 239897 995407 239953 995863 0 FreeSans 400 90 0 0 gpio_dm0[20] port 577 nsew -flabel metal2 s 241737 995407 241793 995887 0 FreeSans 400 90 0 0 gpio_dm1[20] +flabel metal2 s 241737 995407 241793 995863 0 FreeSans 400 90 0 0 gpio_dm1[20] port 621 nsew -flabel metal2 s 235573 995407 235629 995887 0 FreeSans 400 90 0 0 gpio_dm2[20] +flabel metal2 s 235573 995407 235629 995863 0 FreeSans 400 90 0 0 gpio_dm2[20] port 665 nsew -flabel metal2 s 234929 995407 234985 995887 0 FreeSans 400 90 0 0 gpio_holdover[20] +flabel metal2 s 234929 995407 234985 995863 0 FreeSans 400 90 0 0 gpio_holdover[20] port 401 nsew -flabel metal2 s 231893 995407 231949 995887 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[20] +flabel metal2 s 231893 995407 231949 995863 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[20] port 269 nsew -flabel metal2 s 238701 995407 238757 995887 0 FreeSans 400 90 0 0 gpio_inp_dis[20] +flabel metal2 s 238701 995407 238757 995863 0 FreeSans 400 90 0 0 gpio_inp_dis[20] port 225 nsew -flabel metal2 s 231249 995407 231305 995887 0 FreeSans 400 90 0 0 gpio_oeb[20] +flabel metal2 s 231249 995407 231305 995863 0 FreeSans 400 90 0 0 gpio_oeb[20] port 181 nsew -flabel metal2 s 234377 995407 234433 995887 0 FreeSans 400 90 0 0 gpio_out[20] +flabel metal2 s 234377 995407 234433 995863 0 FreeSans 400 90 0 0 gpio_out[20] port 137 nsew -flabel metal2 s 243577 995407 243633 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[20] +flabel metal2 s 243577 995407 243633 995863 0 FreeSans 400 90 0 0 gpio_slow_sel[20] port 357 nsew -flabel metal2 s 232537 995407 232593 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[20] +flabel metal2 s 232537 995407 232593 995863 0 FreeSans 400 90 0 0 gpio_vtrip_sel[20] port 313 nsew -flabel metal2 s 245417 995407 245473 995887 0 FreeSans 400 90 0 0 gpio_in[20] +flabel metal2 s 245417 995407 245473 995863 0 FreeSans 400 90 0 0 gpio_in[20] port 709 nsew -flabel metal2 s 292141 995407 292197 995887 0 FreeSans 400 90 0 0 gpio_analog_en[19] +flabel metal2 s 292141 995407 292197 995863 0 FreeSans 400 90 0 0 gpio_analog_en[19] port 446 nsew -flabel metal2 s 290853 995407 290909 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[19] +flabel metal2 s 290853 995407 290909 995863 0 FreeSans 400 90 0 0 gpio_analog_pol[19] port 534 nsew -flabel metal2 s 287817 995407 287873 995887 0 FreeSans 400 90 0 0 gpio_analog_sel[19] +flabel metal2 s 287817 995407 287873 995863 0 FreeSans 400 90 0 0 gpio_analog_sel[19] port 490 nsew -flabel metal2 s 291497 995407 291553 995887 0 FreeSans 400 90 0 0 gpio_dm0[19] +flabel metal2 s 291497 995407 291553 995863 0 FreeSans 400 90 0 0 gpio_dm0[19] port 578 nsew -flabel metal2 s 293337 995407 293393 995887 0 FreeSans 400 90 0 0 gpio_dm1[19] +flabel metal2 s 293337 995407 293393 995863 0 FreeSans 400 90 0 0 gpio_dm1[19] port 622 nsew -flabel metal2 s 287173 995407 287229 995887 0 FreeSans 400 90 0 0 gpio_dm2[19] +flabel metal2 s 287173 995407 287229 995863 0 FreeSans 400 90 0 0 gpio_dm2[19] port 666 nsew -flabel metal2 s 286529 995407 286585 995887 0 FreeSans 400 90 0 0 gpio_holdover[19] +flabel metal2 s 286529 995407 286585 995863 0 FreeSans 400 90 0 0 gpio_holdover[19] port 402 nsew -flabel metal2 s 283493 995407 283549 995887 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[19] +flabel metal2 s 283493 995407 283549 995863 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[19] port 270 nsew -flabel metal2 s 290301 995407 290357 995887 0 FreeSans 400 90 0 0 gpio_inp_dis[19] +flabel metal2 s 290301 995407 290357 995863 0 FreeSans 400 90 0 0 gpio_inp_dis[19] port 226 nsew -flabel metal2 s 282849 995407 282905 995887 0 FreeSans 400 90 0 0 gpio_oeb[19] +flabel metal2 s 282849 995407 282905 995863 0 FreeSans 400 90 0 0 gpio_oeb[19] port 182 nsew -flabel metal2 s 285977 995407 286033 995887 0 FreeSans 400 90 0 0 gpio_out[19] +flabel metal2 s 285977 995407 286033 995863 0 FreeSans 400 90 0 0 gpio_out[19] port 138 nsew -flabel metal2 s 194017 995407 194073 995887 0 FreeSans 400 90 0 0 gpio_in[21] +flabel metal2 s 194017 995407 194073 995863 0 FreeSans 400 90 0 0 gpio_in[21] port 708 nsew -flabel metal2 s 137741 995407 137797 995887 0 FreeSans 400 90 0 0 gpio_analog_en[22] +flabel metal2 s 137741 995407 137797 995863 0 FreeSans 400 90 0 0 gpio_analog_en[22] port 443 nsew -flabel metal2 s 136453 995407 136509 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[22] +flabel metal2 s 136453 995407 136509 995863 0 FreeSans 400 90 0 0 gpio_analog_pol[22] port 531 nsew -flabel metal2 s 133417 995407 133473 995887 0 FreeSans 400 90 0 0 gpio_analog_sel[22] +flabel metal2 s 133417 995407 133473 995863 0 FreeSans 400 90 0 0 gpio_analog_sel[22] port 487 nsew -flabel metal2 s 137097 995407 137153 995887 0 FreeSans 400 90 0 0 gpio_dm0[22] +flabel metal2 s 137097 995407 137153 995863 0 FreeSans 400 90 0 0 gpio_dm0[22] port 575 nsew -flabel metal2 s 138937 995407 138993 995887 0 FreeSans 400 90 0 0 gpio_dm1[22] +flabel metal2 s 138937 995407 138993 995863 0 FreeSans 400 90 0 0 gpio_dm1[22] port 619 nsew -flabel metal2 s 132773 995407 132829 995887 0 FreeSans 400 90 0 0 gpio_dm2[22] +flabel metal2 s 132773 995407 132829 995863 0 FreeSans 400 90 0 0 gpio_dm2[22] port 663 nsew -flabel metal2 s 132129 995407 132185 995887 0 FreeSans 400 90 0 0 gpio_holdover[22] +flabel metal2 s 132129 995407 132185 995863 0 FreeSans 400 90 0 0 gpio_holdover[22] port 399 nsew -flabel metal2 s 129093 995407 129149 995887 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[22] +flabel metal2 s 129093 995407 129149 995863 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[22] port 267 nsew -flabel metal2 s 135901 995407 135957 995887 0 FreeSans 400 90 0 0 gpio_inp_dis[22] +flabel metal2 s 135901 995407 135957 995863 0 FreeSans 400 90 0 0 gpio_inp_dis[22] port 223 nsew -flabel metal2 s 128449 995407 128505 995887 0 FreeSans 400 90 0 0 gpio_oeb[22] +flabel metal2 s 128449 995407 128505 995863 0 FreeSans 400 90 0 0 gpio_oeb[22] port 179 nsew -flabel metal2 s 131577 995407 131633 995887 0 FreeSans 400 90 0 0 gpio_out[22] +flabel metal2 s 131577 995407 131633 995863 0 FreeSans 400 90 0 0 gpio_out[22] port 135 nsew -flabel metal2 s 140777 995407 140833 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[22] +flabel metal2 s 140777 995407 140833 995863 0 FreeSans 400 90 0 0 gpio_slow_sel[22] port 355 nsew -flabel metal2 s 129737 995407 129793 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[22] +flabel metal2 s 129737 995407 129793 995863 0 FreeSans 400 90 0 0 gpio_vtrip_sel[22] port 311 nsew -flabel metal2 s 142617 995407 142673 995887 0 FreeSans 400 90 0 0 gpio_in[22] +flabel metal2 s 142617 995407 142673 995863 0 FreeSans 400 90 0 0 gpio_in[22] port 707 nsew -flabel metal2 s 86341 995407 86397 995887 0 FreeSans 400 90 0 0 gpio_analog_en[23] +flabel metal2 s 86341 995407 86397 995863 0 FreeSans 400 90 0 0 gpio_analog_en[23] port 442 nsew -flabel metal2 s 85053 995407 85109 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[23] +flabel metal2 s 85053 995407 85109 995863 0 FreeSans 400 90 0 0 gpio_analog_pol[23] port 530 nsew -flabel metal2 s 82017 995407 82073 995887 0 FreeSans 400 90 0 0 gpio_analog_sel[23] +flabel metal2 s 82017 995407 82073 995863 0 FreeSans 400 90 0 0 gpio_analog_sel[23] port 486 nsew -flabel metal2 s 85697 995407 85753 995887 0 FreeSans 400 90 0 0 gpio_dm0[23] +flabel metal2 s 85697 995407 85753 995863 0 FreeSans 400 90 0 0 gpio_dm0[23] port 574 nsew -flabel metal2 s 87537 995407 87593 995887 0 FreeSans 400 90 0 0 gpio_dm1[23] +flabel metal2 s 87537 995407 87593 995863 0 FreeSans 400 90 0 0 gpio_dm1[23] port 618 nsew -flabel metal2 s 81373 995407 81429 995887 0 FreeSans 400 90 0 0 gpio_dm2[23] +flabel metal2 s 81373 995407 81429 995863 0 FreeSans 400 90 0 0 gpio_dm2[23] port 662 nsew -flabel metal2 s 80729 995407 80785 995887 0 FreeSans 400 90 0 0 gpio_holdover[23] +flabel metal2 s 80729 995407 80785 995863 0 FreeSans 400 90 0 0 gpio_holdover[23] port 398 nsew -flabel metal2 s 77693 995407 77749 995887 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[23] +flabel metal2 s 77693 995407 77749 995863 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[23] port 266 nsew -flabel metal2 s 84501 995407 84557 995887 0 FreeSans 400 90 0 0 gpio_inp_dis[23] +flabel metal2 s 84501 995407 84557 995863 0 FreeSans 400 90 0 0 gpio_inp_dis[23] port 222 nsew -flabel metal2 s 77049 995407 77105 995887 0 FreeSans 400 90 0 0 gpio_oeb[23] +flabel metal2 s 77049 995407 77105 995863 0 FreeSans 400 90 0 0 gpio_oeb[23] port 178 nsew -flabel metal2 s 80177 995407 80233 995887 0 FreeSans 400 90 0 0 gpio_out[23] +flabel metal2 s 80177 995407 80233 995863 0 FreeSans 400 90 0 0 gpio_out[23] port 134 nsew -flabel metal2 s 89377 995407 89433 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[23] +flabel metal2 s 89377 995407 89433 995863 0 FreeSans 400 90 0 0 gpio_slow_sel[23] port 354 nsew -flabel metal2 s 78337 995407 78393 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[23] +flabel metal2 s 78337 995407 78393 995863 0 FreeSans 400 90 0 0 gpio_vtrip_sel[23] port 310 nsew -flabel metal2 s 91217 995407 91273 995887 0 FreeSans 400 90 0 0 gpio_in[23] +flabel metal2 s 91217 995407 91273 995863 0 FreeSans 400 90 0 0 gpio_in[23] port 706 nsew -flabel metal2 s 189141 995407 189197 995887 0 FreeSans 400 90 0 0 gpio_analog_en[21] +flabel metal2 s 189141 995407 189197 995863 0 FreeSans 400 90 0 0 gpio_analog_en[21] port 444 nsew -flabel metal2 s 187853 995407 187909 995887 0 FreeSans 400 90 0 0 gpio_analog_pol[21] +flabel metal2 s 187853 995407 187909 995863 0 FreeSans 400 90 0 0 gpio_analog_pol[21] port 532 nsew -flabel metal2 s 184817 995407 184873 995887 0 FreeSans 400 90 0 0 gpio_analog_sel[21] +flabel metal2 s 184817 995407 184873 995863 0 FreeSans 400 90 0 0 gpio_analog_sel[21] port 488 nsew -flabel metal2 s 188497 995407 188553 995887 0 FreeSans 400 90 0 0 gpio_dm0[21] +flabel metal2 s 188497 995407 188553 995863 0 FreeSans 400 90 0 0 gpio_dm0[21] port 576 nsew -flabel metal2 s 190337 995407 190393 995887 0 FreeSans 400 90 0 0 gpio_dm1[21] +flabel metal2 s 190337 995407 190393 995863 0 FreeSans 400 90 0 0 gpio_dm1[21] port 620 nsew -flabel metal2 s 184173 995407 184229 995887 0 FreeSans 400 90 0 0 gpio_dm2[21] +flabel metal2 s 184173 995407 184229 995863 0 FreeSans 400 90 0 0 gpio_dm2[21] port 664 nsew -flabel metal2 s 183529 995407 183585 995887 0 FreeSans 400 90 0 0 gpio_holdover[21] +flabel metal2 s 183529 995407 183585 995863 0 FreeSans 400 90 0 0 gpio_holdover[21] port 400 nsew -flabel metal2 s 180493 995407 180549 995887 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[21] +flabel metal2 s 180493 995407 180549 995863 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[21] port 268 nsew -flabel metal2 s 187301 995407 187357 995887 0 FreeSans 400 90 0 0 gpio_inp_dis[21] +flabel metal2 s 187301 995407 187357 995863 0 FreeSans 400 90 0 0 gpio_inp_dis[21] port 224 nsew -flabel metal2 s 179849 995407 179905 995887 0 FreeSans 400 90 0 0 gpio_oeb[21] +flabel metal2 s 179849 995407 179905 995863 0 FreeSans 400 90 0 0 gpio_oeb[21] port 180 nsew -flabel metal2 s 182977 995407 183033 995887 0 FreeSans 400 90 0 0 gpio_out[21] +flabel metal2 s 182977 995407 183033 995863 0 FreeSans 400 90 0 0 gpio_out[21] port 136 nsew -flabel metal2 s 192177 995407 192233 995887 0 FreeSans 400 90 0 0 gpio_slow_sel[21] +flabel metal2 s 192177 995407 192233 995863 0 FreeSans 400 90 0 0 gpio_slow_sel[21] port 356 nsew -flabel metal2 s 181137 995407 181193 995887 0 FreeSans 400 90 0 0 gpio_vtrip_sel[21] +flabel metal2 s 181137 995407 181193 995863 0 FreeSans 400 90 0 0 gpio_vtrip_sel[21] port 312 nsew rlabel metal1 s 142538 40100 142538 40100 4 xres_vss_loop flabel metal4 s 36323 455607 37013 455799 6 FreeSans 400 0 0 0 vdda2 @@ -8313,1582 +8184,1582 @@ flabel metal5 s 6598 183840 19088 196360 0 FreeSans 16000 0 0 0 gpio[37] port 76 nsew flabel metal5 s 698512 101240 711002 113760 0 FreeSans 16000 0 0 0 gpio[0] port 113 nsew -flabel metal2 187327 41713 187383 42193 0 FreeSans 400 270 0 0 gpio_in[38] +flabel metal2 187327 41737 187383 42193 0 FreeSans 400 270 0 0 gpio_in[38] port 691 nsew -flabel metal2 189167 41713 189223 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[38] +flabel metal2 189167 41737 189223 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[38] port 339 nsew -flabel metal2 193491 41713 193547 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[38] +flabel metal2 193491 41737 193547 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[38] port 515 nsew -flabel metal2 192203 41713 192259 42193 0 FreeSans 400 270 0 0 gpio_analog_en[38] +flabel metal2 192203 41737 192259 42193 0 FreeSans 400 270 0 0 gpio_analog_en[38] port 427 nsew -flabel metal2 194043 41713 194099 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[38] +flabel metal2 194043 41737 194099 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[38] port 207 nsew -flabel metal2 196527 41713 196583 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[38] +flabel metal2 196527 41737 196583 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[38] port 471 nsew -flabel metal2 197171 41713 197227 42193 0 FreeSans 400 270 0 0 gpio_dm2[38] +flabel metal2 197171 41737 197227 42193 0 FreeSans 400 270 0 0 gpio_dm2[38] port 647 nsew -flabel metal2 197815 41713 197871 42193 0 FreeSans 400 270 0 0 gpio_holdover[38] +flabel metal2 197815 41737 197871 42193 0 FreeSans 400 270 0 0 gpio_holdover[38] port 383 nsew -flabel metal2 198367 41713 198423 42193 0 FreeSans 400 270 0 0 gpio_out[38] +flabel metal2 198367 41737 198423 42193 0 FreeSans 400 270 0 0 gpio_out[38] port 119 nsew -flabel metal2 200207 41713 200263 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[38] +flabel metal2 200207 41737 200263 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[38] port 295 nsew -flabel metal2 200851 41713 200907 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[38] +flabel metal2 200851 41737 200907 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[38] port 251 nsew -flabel metal2 201495 41713 201551 42193 0 FreeSans 400 270 0 0 gpio_oeb[38] +flabel metal2 201495 41737 201551 42193 0 FreeSans 400 270 0 0 gpio_oeb[38] port 163 nsew -flabel metal2 295927 41713 295983 42193 0 FreeSans 400 270 0 0 gpio_in[39] +flabel metal2 295927 41737 295983 42193 0 FreeSans 400 270 0 0 gpio_in[39] port 690 nsew -flabel metal2 297767 41713 297823 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[39] +flabel metal2 297767 41737 297823 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[39] port 338 nsew -flabel metal2 299607 41713 299663 42193 0 FreeSans 400 270 0 0 gpio_dm1[39] +flabel metal2 299607 41737 299663 42193 0 FreeSans 400 270 0 0 gpio_dm1[39] port 602 nsew -flabel metal2 301447 41713 301503 42193 0 FreeSans 400 270 0 0 gpio_dm0[39] +flabel metal2 301447 41737 301503 42193 0 FreeSans 400 270 0 0 gpio_dm0[39] port 558 nsew -flabel metal2 302091 41713 302147 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[39] +flabel metal2 302091 41737 302147 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[39] port 514 nsew -flabel metal2 300803 41713 300859 42193 0 FreeSans 400 270 0 0 gpio_analog_en[39] +flabel metal2 300803 41737 300859 42193 0 FreeSans 400 270 0 0 gpio_analog_en[39] port 426 nsew -flabel metal2 302643 41713 302699 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[39] +flabel metal2 302643 41737 302699 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[39] port 206 nsew -flabel metal2 305127 41713 305183 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[39] +flabel metal2 305127 41737 305183 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[39] port 470 nsew -flabel metal2 305771 41713 305827 42193 0 FreeSans 400 270 0 0 gpio_dm2[39] +flabel metal2 305771 41737 305827 42193 0 FreeSans 400 270 0 0 gpio_dm2[39] port 646 nsew -flabel metal2 306415 41713 306471 42193 0 FreeSans 400 270 0 0 gpio_holdover[39] +flabel metal2 306415 41737 306471 42193 0 FreeSans 400 270 0 0 gpio_holdover[39] port 382 nsew -flabel metal2 306967 41713 307023 42193 0 FreeSans 400 270 0 0 gpio_out[39] +flabel metal2 306967 41737 307023 42193 0 FreeSans 400 270 0 0 gpio_out[39] port 118 nsew -flabel metal2 308807 41713 308863 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[39] +flabel metal2 308807 41737 308863 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[39] port 294 nsew -flabel metal2 309451 41713 309507 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[39] +flabel metal2 309451 41737 309507 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[39] port 250 nsew -flabel metal2 310095 41713 310151 42193 0 FreeSans 400 270 0 0 gpio_oeb[39] +flabel metal2 310095 41737 310151 42193 0 FreeSans 400 270 0 0 gpio_oeb[39] port 162 nsew -flabel metal2 350727 41713 350783 42193 0 FreeSans 400 270 0 0 gpio_in[40] +flabel metal2 350727 41737 350783 42193 0 FreeSans 400 270 0 0 gpio_in[40] port 689 nsew -flabel metal2 352567 41713 352623 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[40] +flabel metal2 352567 41737 352623 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[40] port 337 nsew -flabel metal2 354407 41713 354463 42193 0 FreeSans 400 270 0 0 gpio_dm1[40] +flabel metal2 354407 41737 354463 42193 0 FreeSans 400 270 0 0 gpio_dm1[40] port 601 nsew -flabel metal2 356247 41713 356303 42193 0 FreeSans 400 270 0 0 gpio_dm0[40] +flabel metal2 356247 41737 356303 42193 0 FreeSans 400 270 0 0 gpio_dm0[40] port 557 nsew -flabel metal2 356891 41713 356947 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[40] +flabel metal2 356891 41737 356947 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[40] port 513 nsew -flabel metal2 355603 41713 355659 42193 0 FreeSans 400 270 0 0 gpio_analog_en[40] +flabel metal2 355603 41737 355659 42193 0 FreeSans 400 270 0 0 gpio_analog_en[40] port 425 nsew -flabel metal2 357443 41713 357499 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[40] +flabel metal2 357443 41737 357499 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[40] port 205 nsew -flabel metal2 359927 41713 359983 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[40] +flabel metal2 359927 41737 359983 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[40] port 469 nsew -flabel metal2 360571 41713 360627 42193 0 FreeSans 400 270 0 0 gpio_dm2[40] +flabel metal2 360571 41737 360627 42193 0 FreeSans 400 270 0 0 gpio_dm2[40] port 645 nsew -flabel metal2 361215 41713 361271 42193 0 FreeSans 400 270 0 0 gpio_holdover[40] +flabel metal2 361215 41737 361271 42193 0 FreeSans 400 270 0 0 gpio_holdover[40] port 381 nsew -flabel metal2 361767 41713 361823 42193 0 FreeSans 400 270 0 0 gpio_out[40] +flabel metal2 361767 41737 361823 42193 0 FreeSans 400 270 0 0 gpio_out[40] port 117 nsew -flabel metal2 363607 41713 363663 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[40] +flabel metal2 363607 41737 363663 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[40] port 293 nsew -flabel metal2 364251 41713 364307 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[40] +flabel metal2 364251 41737 364307 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[40] port 249 nsew -flabel metal2 364895 41713 364951 42193 0 FreeSans 400 270 0 0 gpio_oeb[40] +flabel metal2 364895 41737 364951 42193 0 FreeSans 400 270 0 0 gpio_oeb[40] port 161 nsew -flabel metal2 405527 41713 405583 42193 0 FreeSans 400 270 0 0 gpio_in[41] +flabel metal2 405527 41737 405583 42193 0 FreeSans 400 270 0 0 gpio_in[41] port 688 nsew -flabel metal2 407367 41713 407423 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[41] +flabel metal2 407367 41737 407423 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[41] port 336 nsew -flabel metal2 409207 41713 409263 42193 0 FreeSans 400 270 0 0 gpio_dm1[41] +flabel metal2 409207 41737 409263 42193 0 FreeSans 400 270 0 0 gpio_dm1[41] port 600 nsew -flabel metal2 411047 41713 411103 42193 0 FreeSans 400 270 0 0 gpio_dm0[41] +flabel metal2 411047 41737 411103 42193 0 FreeSans 400 270 0 0 gpio_dm0[41] port 556 nsew -flabel metal2 411691 41713 411747 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[41] +flabel metal2 411691 41737 411747 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[41] port 512 nsew -flabel metal2 410403 41713 410459 42193 0 FreeSans 400 270 0 0 gpio_analog_en[41] +flabel metal2 410403 41737 410459 42193 0 FreeSans 400 270 0 0 gpio_analog_en[41] port 424 nsew -flabel metal2 412243 41713 412299 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[41] +flabel metal2 412243 41737 412299 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[41] port 204 nsew -flabel metal2 414727 41713 414783 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[41] +flabel metal2 414727 41737 414783 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[41] port 468 nsew -flabel metal2 415371 41713 415427 42193 0 FreeSans 400 270 0 0 gpio_dm2[41] +flabel metal2 415371 41737 415427 42193 0 FreeSans 400 270 0 0 gpio_dm2[41] port 644 nsew -flabel metal2 416015 41713 416071 42193 0 FreeSans 400 270 0 0 gpio_holdover[41] +flabel metal2 416015 41737 416071 42193 0 FreeSans 400 270 0 0 gpio_holdover[41] port 380 nsew -flabel metal2 416567 41713 416623 42193 0 FreeSans 400 270 0 0 gpio_out[41] +flabel metal2 416567 41737 416623 42193 0 FreeSans 400 270 0 0 gpio_out[41] port 116 nsew -flabel metal2 418407 41713 418463 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[41] +flabel metal2 418407 41737 418463 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[41] port 292 nsew -flabel metal2 419051 41713 419107 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[41] +flabel metal2 419051 41737 419107 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[41] port 248 nsew -flabel metal2 419695 41713 419751 42193 0 FreeSans 400 270 0 0 gpio_oeb[41] +flabel metal2 419695 41737 419751 42193 0 FreeSans 400 270 0 0 gpio_oeb[41] port 160 nsew -flabel metal2 460327 41713 460383 42193 0 FreeSans 400 270 0 0 gpio_in[42] +flabel metal2 460327 41737 460383 42193 0 FreeSans 400 270 0 0 gpio_in[42] port 687 nsew -flabel metal2 462167 41713 462223 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[42] +flabel metal2 462167 41737 462223 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[42] port 335 nsew -flabel metal2 464007 41713 464063 42193 0 FreeSans 400 270 0 0 gpio_dm1[42] +flabel metal2 464007 41737 464063 42193 0 FreeSans 400 270 0 0 gpio_dm1[42] port 599 nsew -flabel metal2 465847 41713 465903 42193 0 FreeSans 400 270 0 0 gpio_dm0[42] +flabel metal2 465847 41737 465903 42193 0 FreeSans 400 270 0 0 gpio_dm0[42] port 555 nsew -flabel metal2 466491 41713 466547 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[42] +flabel metal2 466491 41737 466547 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[42] port 511 nsew -flabel metal2 465203 41713 465259 42193 0 FreeSans 400 270 0 0 gpio_analog_en[42] +flabel metal2 465203 41737 465259 42193 0 FreeSans 400 270 0 0 gpio_analog_en[42] port 423 nsew -flabel metal2 467043 41713 467099 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[42] +flabel metal2 467043 41737 467099 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[42] port 203 nsew -flabel metal2 469527 41713 469583 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[42] +flabel metal2 469527 41737 469583 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[42] port 467 nsew -flabel metal2 470171 41713 470227 42193 0 FreeSans 400 270 0 0 gpio_dm2[42] +flabel metal2 470171 41737 470227 42193 0 FreeSans 400 270 0 0 gpio_dm2[42] port 643 nsew -flabel metal2 470815 41713 470871 42193 0 FreeSans 400 270 0 0 gpio_holdover[42] +flabel metal2 470815 41737 470871 42193 0 FreeSans 400 270 0 0 gpio_holdover[42] port 379 nsew -flabel metal2 471367 41713 471423 42193 0 FreeSans 400 270 0 0 gpio_out[42] +flabel metal2 471367 41737 471423 42193 0 FreeSans 400 270 0 0 gpio_out[42] port 115 nsew -flabel metal2 473207 41713 473263 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[42] +flabel metal2 473207 41737 473263 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[42] port 291 nsew -flabel metal2 473851 41713 473907 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[42] +flabel metal2 473851 41737 473907 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[42] port 247 nsew -flabel metal2 474495 41713 474551 42193 0 FreeSans 400 270 0 0 gpio_oeb[42] +flabel metal2 474495 41737 474551 42193 0 FreeSans 400 270 0 0 gpio_oeb[42] port 159 nsew -flabel metal2 515127 41713 515183 42193 0 FreeSans 400 270 0 0 gpio_in[43] +flabel metal2 515127 41737 515183 42193 0 FreeSans 400 270 0 0 gpio_in[43] port 686 nsew -flabel metal2 516967 41713 517023 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[43] +flabel metal2 516967 41737 517023 42193 0 FreeSans 400 270 0 0 gpio_slow_sel[43] port 334 nsew -flabel metal2 518807 41713 518863 42193 0 FreeSans 400 270 0 0 gpio_dm1[43] +flabel metal2 518807 41737 518863 42193 0 FreeSans 400 270 0 0 gpio_dm1[43] port 598 nsew -flabel metal2 520647 41713 520703 42193 0 FreeSans 400 270 0 0 gpio_dm0[43] +flabel metal2 520647 41737 520703 42193 0 FreeSans 400 270 0 0 gpio_dm0[43] port 554 nsew -flabel metal2 521291 41713 521347 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[43] +flabel metal2 521291 41737 521347 42193 0 FreeSans 400 270 0 0 gpio_analog_pol[43] port 510 nsew -flabel metal2 520003 41713 520059 42193 0 FreeSans 400 270 0 0 gpio_analog_en[43] +flabel metal2 520003 41737 520059 42193 0 FreeSans 400 270 0 0 gpio_analog_en[43] port 422 nsew -flabel metal2 521843 41713 521899 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[43] +flabel metal2 521843 41737 521899 42193 0 FreeSans 400 270 0 0 gpio_inp_dis[43] port 202 nsew -flabel metal2 524327 41713 524383 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[43] +flabel metal2 524327 41737 524383 42193 0 FreeSans 400 270 0 0 gpio_analog_sel[43] port 466 nsew -flabel metal2 524971 41713 525027 42193 0 FreeSans 400 270 0 0 gpio_dm2[43] +flabel metal2 524971 41737 525027 42193 0 FreeSans 400 270 0 0 gpio_dm2[43] port 642 nsew -flabel metal2 525615 41713 525671 42193 0 FreeSans 400 270 0 0 gpio_holdover[43] +flabel metal2 525615 41737 525671 42193 0 FreeSans 400 270 0 0 gpio_holdover[43] port 378 nsew -flabel metal2 526167 41713 526223 42193 0 FreeSans 400 270 0 0 gpio_out[43] +flabel metal2 526167 41737 526223 42193 0 FreeSans 400 270 0 0 gpio_out[43] port 114 nsew -flabel metal2 528007 41713 528063 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[43] +flabel metal2 528007 41737 528063 42193 0 FreeSans 400 270 0 0 gpio_vtrip_sel[43] port 290 nsew -flabel metal2 528651 41713 528707 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[43] +flabel metal2 528651 41737 528707 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[43] port 246 nsew -flabel metal2 529295 41713 529351 42193 0 FreeSans 400 270 0 0 gpio_oeb[43] +flabel metal2 529295 41737 529351 42193 0 FreeSans 400 270 0 0 gpio_oeb[43] port 158 nsew -flabel metal3 675407 103375 675887 103503 0 FreeSans 400 0 0 0 analog_io[0] +flabel metal3 675407 103375 675863 103503 0 FreeSans 400 0 0 0 analog_io[0] port 905 nsew -flabel metal3 675407 105172 675887 105386 0 FreeSans 400 0 0 0 analog_noesd_io[0] +flabel metal3 675407 105172 675863 105386 0 FreeSans 400 0 0 0 analog_noesd_io[0] port 949 nsew -flabel metal3 675407 150372 675887 150586 0 FreeSans 400 0 0 0 analog_noesd_io[1] +flabel metal3 675407 150372 675863 150586 0 FreeSans 400 0 0 0 analog_noesd_io[1] port 948 nsew -flabel metal3 675407 148575 675887 148703 0 FreeSans 400 0 0 0 analog_io[1] +flabel metal3 675407 148575 675863 148703 0 FreeSans 400 0 0 0 analog_io[1] port 904 nsew -flabel metal3 675407 193575 675887 193703 0 FreeSans 400 0 0 0 analog_io[2] +flabel metal3 675407 193575 675863 193703 0 FreeSans 400 0 0 0 analog_io[2] port 903 nsew -flabel metal3 675407 195372 675887 195586 0 FreeSans 400 0 0 0 analog_noesd_io[2] +flabel metal3 675407 195372 675863 195586 0 FreeSans 400 0 0 0 analog_noesd_io[2] port 947 nsew -flabel metal3 675407 238775 675887 238903 0 FreeSans 400 0 0 0 analog_io[3] +flabel metal3 675407 238775 675863 238903 0 FreeSans 400 0 0 0 analog_io[3] port 902 nsew -flabel metal3 675407 283775 675887 283903 0 FreeSans 400 0 0 0 analog_io[4] +flabel metal3 675407 283775 675863 283903 0 FreeSans 400 0 0 0 analog_io[4] port 901 nsew -flabel metal3 675407 285572 675887 285786 0 FreeSans 400 0 0 0 analog_noesd_io[4] +flabel metal3 675407 285572 675863 285786 0 FreeSans 400 0 0 0 analog_noesd_io[4] port 945 nsew -flabel metal3 675407 328775 675887 328903 0 FreeSans 400 0 0 0 analog_io[5] +flabel metal3 675407 328775 675863 328903 0 FreeSans 400 0 0 0 analog_io[5] port 900 nsew -flabel metal3 675407 330572 675887 330786 0 FreeSans 400 0 0 0 analog_noesd_io[5] +flabel metal3 675407 330572 675863 330786 0 FreeSans 400 0 0 0 analog_noesd_io[5] port 944 nsew -flabel metal3 675407 373975 675887 374103 0 FreeSans 400 0 0 0 analog_io[6] +flabel metal3 675407 373975 675863 374103 0 FreeSans 400 0 0 0 analog_io[6] port 899 nsew -flabel metal3 675407 375772 675887 375986 0 FreeSans 400 0 0 0 analog_noesd_io[6] +flabel metal3 675407 375772 675863 375986 0 FreeSans 400 0 0 0 analog_noesd_io[6] port 943 nsew -flabel metal3 s 675407 551175 675887 551303 0 FreeSans 400 0 0 0 analog_io[7] +flabel metal3 s 675407 551175 675863 551303 0 FreeSans 400 0 0 0 analog_io[7] port 898 nsew -flabel metal3 s 675407 552972 675887 553186 0 FreeSans 400 0 0 0 analog_noesd_io[7] +flabel metal3 s 675407 552972 675863 553186 0 FreeSans 400 0 0 0 analog_noesd_io[7] port 942 nsew -flabel metal3 s 675407 596375 675887 596503 0 FreeSans 400 0 0 0 analog_io[8] +flabel metal3 s 675407 596375 675863 596503 0 FreeSans 400 0 0 0 analog_io[8] port 897 nsew -flabel metal3 s 675407 598172 675887 598386 0 FreeSans 400 0 0 0 analog_noesd_io[8] +flabel metal3 s 675407 598172 675863 598386 0 FreeSans 400 0 0 0 analog_noesd_io[8] port 941 nsew -flabel metal3 s 675407 641375 675887 641503 0 FreeSans 400 0 0 0 analog_io[9] +flabel metal3 s 675407 641375 675863 641503 0 FreeSans 400 0 0 0 analog_io[9] port 896 nsew -flabel metal3 s 675407 643172 675887 643386 0 FreeSans 400 0 0 0 analog_noesd_io[9] +flabel metal3 s 675407 643172 675863 643386 0 FreeSans 400 0 0 0 analog_noesd_io[9] port 940 nsew -flabel metal3 s 675407 686575 675887 686703 0 FreeSans 400 0 0 0 analog_io[10] +flabel metal3 s 675407 686575 675863 686703 0 FreeSans 400 0 0 0 analog_io[10] port 895 nsew -flabel metal3 s 675407 688372 675887 688586 0 FreeSans 400 0 0 0 analog_noesd_io[10] +flabel metal3 s 675407 688372 675863 688586 0 FreeSans 400 0 0 0 analog_noesd_io[10] port 939 nsew -flabel metal3 s 675407 731575 675887 731703 0 FreeSans 400 0 0 0 analog_io[11] +flabel metal3 s 675407 731575 675863 731703 0 FreeSans 400 0 0 0 analog_io[11] port 894 nsew -flabel metal3 s 675407 733372 675887 733586 0 FreeSans 400 0 0 0 analog_noesd_io[11] +flabel metal3 s 675407 733372 675863 733586 0 FreeSans 400 0 0 0 analog_noesd_io[11] port 938 nsew -flabel metal2 s 626297 995407 626353 995887 0 FreeSans 400 90 0 0 gpio_in_h[15] +flabel metal2 s 626297 995407 626353 995863 0 FreeSans 400 90 0 0 gpio_in_h[15] port 758 nsew -flabel metal2 s 524497 995407 524553 995887 0 FreeSans 400 90 0 0 gpio_in_h[16] +flabel metal2 s 524497 995407 524553 995863 0 FreeSans 400 90 0 0 gpio_in_h[16] port 757 nsew -flabel metal2 s 473097 995407 473153 995887 0 FreeSans 400 90 0 0 gpio_in_h[17] +flabel metal2 s 473097 995407 473153 995863 0 FreeSans 400 90 0 0 gpio_in_h[17] port 756 nsew -flabel metal2 s 384097 995407 384153 995887 0 FreeSans 400 90 0 0 gpio_in_h[18] +flabel metal2 s 384097 995407 384153 995863 0 FreeSans 400 90 0 0 gpio_in_h[18] port 755 nsew -flabel metal2 s 282297 995407 282353 995887 0 FreeSans 400 90 0 0 gpio_in_h[19] +flabel metal2 s 282297 995407 282353 995863 0 FreeSans 400 90 0 0 gpio_in_h[19] port 754 nsew -flabel metal2 s 230697 995407 230753 995887 0 FreeSans 400 90 0 0 gpio_in_h[20] +flabel metal2 s 230697 995407 230753 995863 0 FreeSans 400 90 0 0 gpio_in_h[20] port 753 nsew -flabel metal2 s 179297 995407 179353 995887 0 FreeSans 400 90 0 0 gpio_in_h[21] +flabel metal2 s 179297 995407 179353 995863 0 FreeSans 400 90 0 0 gpio_in_h[21] port 752 nsew -flabel metal2 s 127897 995407 127953 995887 0 FreeSans 400 90 0 0 gpio_in_h[22] +flabel metal2 s 127897 995407 127953 995863 0 FreeSans 400 90 0 0 gpio_in_h[22] port 751 nsew -flabel metal2 s 76497 995407 76553 995887 0 FreeSans 400 90 0 0 gpio_in_h[23] +flabel metal2 s 76497 995407 76553 995863 0 FreeSans 400 90 0 0 gpio_in_h[23] port 750 nsew -flabel metal2 s 202047 41713 202103 42193 0 FreeSans 400 90 0 0 gpio_in_h[38] +flabel metal2 s 202047 41737 202103 42193 0 FreeSans 400 90 0 0 gpio_in_h[38] port 735 nsew -flabel metal2 s 310647 41713 310703 42193 0 FreeSans 400 90 0 0 gpio_in_h[39] +flabel metal2 s 310647 41737 310703 42193 0 FreeSans 400 90 0 0 gpio_in_h[39] port 734 nsew -flabel metal2 s 365447 41713 365503 42193 0 FreeSans 400 90 0 0 gpio_in_h[40] +flabel metal2 s 365447 41737 365503 42193 0 FreeSans 400 90 0 0 gpio_in_h[40] port 733 nsew -flabel metal2 s 420247 41713 420303 42193 0 FreeSans 400 90 0 0 gpio_in_h[41] +flabel metal2 s 420247 41737 420303 42193 0 FreeSans 400 90 0 0 gpio_in_h[41] port 732 nsew -flabel metal2 s 475047 41713 475103 42193 0 FreeSans 400 90 0 0 gpio_in_h[42] +flabel metal2 s 475047 41737 475103 42193 0 FreeSans 400 90 0 0 gpio_in_h[42] port 731 nsew -flabel metal2 s 529847 41713 529903 42193 0 FreeSans 400 90 0 0 gpio_in_h[43] +flabel metal2 s 529847 41737 529903 42193 0 FreeSans 400 90 0 0 gpio_in_h[43] port 730 nsew -flabel metal3 s 675407 776575 675887 776703 0 FreeSans 400 0 0 0 analog_io[12] +flabel metal3 s 675407 776575 675863 776703 0 FreeSans 400 0 0 0 analog_io[12] port 893 nsew -flabel metal3 s 675407 865775 675887 865903 0 FreeSans 400 0 0 0 analog_io[13] +flabel metal3 s 675407 865775 675863 865903 0 FreeSans 400 0 0 0 analog_io[13] port 892 nsew -flabel metal3 s 675407 954975 675887 955103 0 FreeSans 400 0 0 0 analog_io[14] +flabel metal3 s 675407 954975 675863 955103 0 FreeSans 400 0 0 0 analog_io[14] port 891 nsew -flabel metal2 s 638497 995407 638625 995887 0 FreeSans 400 90 0 0 analog_io[15] +flabel metal2 s 638497 995407 638625 995863 0 FreeSans 400 90 0 0 analog_io[15] port 890 nsew -flabel metal2 s 536697 995407 536825 995887 0 FreeSans 400 90 0 0 analog_io[16] +flabel metal2 s 536697 995407 536825 995863 0 FreeSans 400 90 0 0 analog_io[16] port 889 nsew -flabel metal2 s 485297 995407 485425 995887 0 FreeSans 400 90 0 0 analog_io[17] +flabel metal2 s 485297 995407 485425 995863 0 FreeSans 400 90 0 0 analog_io[17] port 888 nsew -flabel metal2 s 396297 995407 396425 995887 0 FreeSans 400 90 0 0 analog_io[18] +flabel metal2 s 396297 995407 396425 995863 0 FreeSans 400 90 0 0 analog_io[18] port 887 nsew -flabel metal2 s 294497 995407 294625 995887 0 FreeSans 400 90 0 0 analog_io[19] +flabel metal2 s 294497 995407 294625 995863 0 FreeSans 400 90 0 0 analog_io[19] port 886 nsew -flabel metal2 s 242897 995407 243025 995887 0 FreeSans 400 90 0 0 analog_io[20] +flabel metal2 s 242897 995407 243025 995863 0 FreeSans 400 90 0 0 analog_io[20] port 885 nsew -flabel metal2 s 191497 995407 191625 995887 0 FreeSans 400 90 0 0 analog_io[21] +flabel metal2 s 191497 995407 191625 995863 0 FreeSans 400 90 0 0 analog_io[21] port 884 nsew -flabel metal2 s 140097 995407 140225 995887 0 FreeSans 400 90 0 0 analog_io[22] +flabel metal2 s 140097 995407 140225 995863 0 FreeSans 400 90 0 0 analog_io[22] port 883 nsew -flabel metal2 s 88697 995407 88825 995887 0 FreeSans 400 90 0 0 analog_io[23] +flabel metal2 s 88697 995407 88825 995863 0 FreeSans 400 90 0 0 analog_io[23] port 882 nsew -flabel metal3 s 41713 796897 42193 797025 0 FreeSans 400 0 0 0 analog_io[25] +flabel metal3 s 41737 796897 42193 797025 0 FreeSans 400 0 0 0 analog_io[25] port 880 nsew -flabel metal3 s 41713 710497 42193 710625 0 FreeSans 400 0 0 0 analog_io[27] +flabel metal3 s 41737 710497 42193 710625 0 FreeSans 400 0 0 0 analog_io[27] port 878 nsew -flabel metal3 s 41713 667297 42193 667425 0 FreeSans 400 0 0 0 analog_io[28] +flabel metal3 s 41737 667297 42193 667425 0 FreeSans 400 0 0 0 analog_io[28] port 877 nsew -flabel metal3 s 41713 624097 42193 624225 0 FreeSans 400 0 0 0 analog_io[29] +flabel metal3 s 41737 624097 42193 624225 0 FreeSans 400 0 0 0 analog_io[29] port 876 nsew -flabel metal3 s 41713 580897 42193 581025 0 FreeSans 400 0 0 0 analog_io[30] +flabel metal3 s 41737 580897 42193 581025 0 FreeSans 400 0 0 0 analog_io[30] port 875 nsew -flabel metal3 s 41713 537697 42193 537825 0 FreeSans 400 0 0 0 analog_io[31] +flabel metal3 s 41737 537697 42193 537825 0 FreeSans 400 0 0 0 analog_io[31] port 874 nsew -flabel metal3 s 41713 410097 42193 410225 0 FreeSans 400 0 0 0 analog_io[32] +flabel metal3 s 41737 410097 42193 410225 0 FreeSans 400 0 0 0 analog_io[32] port 873 nsew -flabel metal3 s 41713 366897 42193 367025 0 FreeSans 400 0 0 0 analog_io[33] +flabel metal3 s 41737 366897 42193 367025 0 FreeSans 400 0 0 0 analog_io[33] port 872 nsew -flabel metal3 s 41713 323697 42193 323825 0 FreeSans 400 0 0 0 analog_io[34] +flabel metal3 s 41737 323697 42193 323825 0 FreeSans 400 0 0 0 analog_io[34] port 871 nsew -flabel metal3 s 41713 280497 42193 280625 0 FreeSans 400 0 0 0 analog_io[35] +flabel metal3 s 41737 280497 42193 280625 0 FreeSans 400 0 0 0 analog_io[35] port 870 nsew -flabel metal3 s 41713 237297 42193 237425 0 FreeSans 400 0 0 0 analog_io[36] +flabel metal3 s 41737 237297 42193 237425 0 FreeSans 400 0 0 0 analog_io[36] port 869 nsew -flabel metal2 s 189775 41713 189903 42193 0 FreeSans 400 90 0 0 analog_io[38] +flabel metal2 s 189775 41737 189903 42193 0 FreeSans 400 90 0 0 analog_io[38] port 867 nsew -flabel metal2 s 353175 41713 353303 42193 0 FreeSans 400 90 0 0 analog_io[40] +flabel metal2 s 353175 41737 353303 42193 0 FreeSans 400 90 0 0 analog_io[40] port 865 nsew -flabel metal2 s 407975 41713 408103 42193 0 FreeSans 400 90 0 0 analog_io[41] +flabel metal2 s 407975 41737 408103 42193 0 FreeSans 400 90 0 0 analog_io[41] port 864 nsew -flabel metal2 s 462775 41713 462903 42193 0 FreeSans 400 90 0 0 analog_io[42] +flabel metal2 s 462775 41737 462903 42193 0 FreeSans 400 90 0 0 analog_io[42] port 863 nsew -flabel metal2 s 517575 41713 517703 42193 0 FreeSans 400 90 0 0 analog_io[43] +flabel metal2 s 517575 41737 517703 42193 0 FreeSans 400 90 0 0 analog_io[43] port 862 nsew -flabel metal3 s 675407 778372 675887 778586 0 FreeSans 400 0 0 0 analog_noesd_io[12] +flabel metal3 s 675407 778372 675863 778586 0 FreeSans 400 0 0 0 analog_noesd_io[12] port 937 nsew -flabel metal3 s 675407 867572 675887 867786 0 FreeSans 400 0 0 0 analog_noesd_io[13] +flabel metal3 s 675407 867572 675863 867786 0 FreeSans 400 0 0 0 analog_noesd_io[13] port 936 nsew -flabel metal3 s 675407 956772 675887 956986 0 FreeSans 400 0 0 0 analog_noesd_io[14] +flabel metal3 s 675407 956772 675863 956986 0 FreeSans 400 0 0 0 analog_noesd_io[14] port 935 nsew -flabel metal2 s 636614 995407 636828 995887 0 FreeSans 400 90 0 0 analog_noesd_io[15] +flabel metal2 s 636614 995407 636828 995863 0 FreeSans 400 90 0 0 analog_noesd_io[15] port 934 nsew -flabel metal2 s 534814 995407 535028 995887 0 FreeSans 400 90 0 0 analog_noesd_io[16] +flabel metal2 s 534814 995407 535028 995863 0 FreeSans 400 90 0 0 analog_noesd_io[16] port 933 nsew -flabel metal2 s 483414 995407 483628 995887 0 FreeSans 400 90 0 0 analog_noesd_io[17] +flabel metal2 s 483414 995407 483628 995863 0 FreeSans 400 90 0 0 analog_noesd_io[17] port 932 nsew -flabel metal2 s 394414 995407 394628 995887 0 FreeSans 400 90 0 0 analog_noesd_io[18] +flabel metal2 s 394414 995407 394628 995863 0 FreeSans 400 90 0 0 analog_noesd_io[18] port 931 nsew -flabel metal2 s 292614 995407 292828 995887 0 FreeSans 400 90 0 0 analog_noesd_io[19] +flabel metal2 s 292614 995407 292828 995863 0 FreeSans 400 90 0 0 analog_noesd_io[19] port 930 nsew -flabel metal2 s 241014 995407 241228 995887 0 FreeSans 400 90 0 0 analog_noesd_io[20] +flabel metal2 s 241014 995407 241228 995863 0 FreeSans 400 90 0 0 analog_noesd_io[20] port 929 nsew -flabel metal2 s 189614 995407 189828 995887 0 FreeSans 400 90 0 0 analog_noesd_io[21] +flabel metal2 s 189614 995407 189828 995863 0 FreeSans 400 90 0 0 analog_noesd_io[21] port 928 nsew -flabel metal2 s 138214 995407 138428 995887 0 FreeSans 400 90 0 0 analog_noesd_io[22] +flabel metal2 s 138214 995407 138428 995863 0 FreeSans 400 90 0 0 analog_noesd_io[22] port 927 nsew -flabel metal2 s 86814 995407 87028 995887 0 FreeSans 400 90 0 0 analog_noesd_io[23] +flabel metal2 s 86814 995407 87028 995863 0 FreeSans 400 90 0 0 analog_noesd_io[23] port 926 nsew -flabel metal3 s 41713 795014 42193 795228 0 FreeSans 400 0 0 0 analog_noesd_io[25] +flabel metal3 s 41737 795014 42193 795228 0 FreeSans 400 0 0 0 analog_noesd_io[25] port 924 nsew -flabel metal3 s 41713 751814 42193 752028 0 FreeSans 400 0 0 0 analog_noesd_io[26] +flabel metal3 s 41737 751814 42193 752028 0 FreeSans 400 0 0 0 analog_noesd_io[26] port 923 nsew -flabel metal3 s 41713 708614 42193 708828 0 FreeSans 400 0 0 0 analog_noesd_io[27] +flabel metal3 s 41737 708614 42193 708828 0 FreeSans 400 0 0 0 analog_noesd_io[27] port 922 nsew -flabel metal3 s 41713 622214 42193 622428 0 FreeSans 400 0 0 0 analog_noesd_io[29] +flabel metal3 s 41737 622214 42193 622428 0 FreeSans 400 0 0 0 analog_noesd_io[29] port 920 nsew -flabel metal3 s 41713 579014 42193 579228 0 FreeSans 400 0 0 0 analog_noesd_io[30] +flabel metal3 s 41737 579014 42193 579228 0 FreeSans 400 0 0 0 analog_noesd_io[30] port 919 nsew -flabel metal3 s 41713 408214 42193 408428 0 FreeSans 400 0 0 0 analog_noesd_io[32] +flabel metal3 s 41737 408214 42193 408428 0 FreeSans 400 0 0 0 analog_noesd_io[32] port 917 nsew -flabel metal3 s 41713 365014 42193 365228 0 FreeSans 400 0 0 0 analog_noesd_io[33] +flabel metal3 s 41737 365014 42193 365228 0 FreeSans 400 0 0 0 analog_noesd_io[33] port 916 nsew -flabel metal3 s 41713 321814 42193 322028 0 FreeSans 400 0 0 0 analog_noesd_io[34] +flabel metal3 s 41737 321814 42193 322028 0 FreeSans 400 0 0 0 analog_noesd_io[34] port 915 nsew -flabel metal3 s 41713 278614 42193 278828 0 FreeSans 400 0 0 0 analog_noesd_io[35] +flabel metal3 s 41737 278614 42193 278828 0 FreeSans 400 0 0 0 analog_noesd_io[35] port 914 nsew -flabel metal3 s 41713 235414 42193 235628 0 FreeSans 400 0 0 0 analog_noesd_io[36] +flabel metal3 s 41737 235414 42193 235628 0 FreeSans 400 0 0 0 analog_noesd_io[36] port 913 nsew -flabel metal3 s 41713 192214 42193 192428 0 FreeSans 400 0 0 0 analog_noesd_io[37] +flabel metal3 s 41737 192214 42193 192428 0 FreeSans 400 0 0 0 analog_noesd_io[37] port 912 nsew -flabel metal2 s 191572 41713 191786 42193 0 FreeSans 400 90 0 0 analog_noesd_io[38] +flabel metal2 s 191572 41737 191786 42193 0 FreeSans 400 90 0 0 analog_noesd_io[38] port 911 nsew -flabel metal2 s 300172 41713 300386 42193 0 FreeSans 400 90 0 0 analog_noesd_io[39] +flabel metal2 s 300172 41737 300386 42193 0 FreeSans 400 90 0 0 analog_noesd_io[39] port 910 nsew -flabel metal2 s 354972 41713 355186 42193 0 FreeSans 400 90 0 0 analog_noesd_io[40] +flabel metal2 s 354972 41737 355186 42193 0 FreeSans 400 90 0 0 analog_noesd_io[40] port 909 nsew -flabel metal2 s 409772 41713 409986 42193 0 FreeSans 400 90 0 0 analog_noesd_io[41] +flabel metal2 s 409772 41737 409986 42193 0 FreeSans 400 90 0 0 analog_noesd_io[41] port 908 nsew -flabel metal2 s 464572 41713 464786 42193 0 FreeSans 400 90 0 0 analog_noesd_io[42] +flabel metal2 s 464572 41737 464786 42193 0 FreeSans 400 90 0 0 analog_noesd_io[42] port 907 nsew -flabel metal2 s 519372 41713 519586 42193 0 FreeSans 400 90 0 0 analog_noesd_io[43] +flabel metal2 s 519372 41737 519586 42193 0 FreeSans 400 90 0 0 analog_noesd_io[43] port 906 nsew -flabel metal3 41873 948781 42193 948841 0 FreeSans 400 0 0 0 gpio_loopback_one[24] +flabel metal3 41737 948781 42193 948841 0 FreeSans 400 0 0 0 gpio_loopback_one[24] port 837 nsew -flabel metal3 41873 778781 42193 778841 0 FreeSans 400 0 0 0 gpio_loopback_one[25] +flabel metal3 41737 778781 42193 778841 0 FreeSans 400 0 0 0 gpio_loopback_one[25] port 836 nsew -flabel metal3 41873 735781 42193 735841 0 FreeSans 400 0 0 0 gpio_loopback_one[26] +flabel metal3 41737 735781 42193 735841 0 FreeSans 400 0 0 0 gpio_loopback_one[26] port 835 nsew -flabel metal3 41873 692781 42193 692841 0 FreeSans 400 0 0 0 gpio_loopback_one[27] +flabel metal3 41737 692781 42193 692841 0 FreeSans 400 0 0 0 gpio_loopback_one[27] port 834 nsew -flabel metal3 41873 649781 42193 649841 0 FreeSans 400 0 0 0 gpio_loopback_one[28] +flabel metal3 41737 649781 42193 649841 0 FreeSans 400 0 0 0 gpio_loopback_one[28] port 833 nsew -flabel metal3 41873 606781 42193 606841 0 FreeSans 400 0 0 0 gpio_loopback_one[29] +flabel metal3 41737 606781 42193 606841 0 FreeSans 400 0 0 0 gpio_loopback_one[29] port 832 nsew -flabel metal3 41873 563781 42193 563841 0 FreeSans 400 0 0 0 gpio_loopback_one[30] +flabel metal3 41737 563781 42193 563841 0 FreeSans 400 0 0 0 gpio_loopback_one[30] port 831 nsew -flabel metal3 41873 520781 42193 520841 0 FreeSans 400 0 0 0 gpio_loopback_one[31] +flabel metal3 41737 520781 42193 520841 0 FreeSans 400 0 0 0 gpio_loopback_one[31] port 830 nsew -flabel metal3 41873 391781 42193 391841 0 FreeSans 400 0 0 0 gpio_loopback_one[32] +flabel metal3 41737 391781 42193 391841 0 FreeSans 400 0 0 0 gpio_loopback_one[32] port 829 nsew -flabel metal3 41873 348781 42193 348841 0 FreeSans 400 0 0 0 gpio_loopback_one[33] +flabel metal3 41737 348781 42193 348841 0 FreeSans 400 0 0 0 gpio_loopback_one[33] port 828 nsew -flabel metal3 41873 305781 42193 305841 0 FreeSans 400 0 0 0 gpio_loopback_one[34] +flabel metal3 41737 305781 42193 305841 0 FreeSans 400 0 0 0 gpio_loopback_one[34] port 827 nsew -flabel metal3 41873 262781 42193 262841 0 FreeSans 400 0 0 0 gpio_loopback_one[35] +flabel metal3 41737 262781 42193 262841 0 FreeSans 400 0 0 0 gpio_loopback_one[35] port 826 nsew -flabel metal3 41873 219781 42193 219841 0 FreeSans 400 0 0 0 gpio_loopback_one[36] +flabel metal3 41737 219781 42193 219841 0 FreeSans 400 0 0 0 gpio_loopback_one[36] port 825 nsew -flabel metal3 41873 176781 42193 176841 0 FreeSans 400 0 0 0 gpio_loopback_one[37] +flabel metal3 41737 176781 42193 176841 0 FreeSans 400 0 0 0 gpio_loopback_one[37] port 824 nsew -flabel metal2 s 530517 41877 530569 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[43] +flabel metal2 s 530517 41737 530569 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[43] port 818 nsew -flabel metal2 s 534772 41877 534824 42193 0 FreeSans 400 90 0 0 gpio_loopback_zero[43] +flabel metal2 s 534772 41737 534824 42193 0 FreeSans 400 90 0 0 gpio_loopback_zero[43] port 774 nsew -flabel metal2 s 475717 41877 475769 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[42] +flabel metal2 s 475717 41737 475769 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[42] port 819 nsew -flabel metal2 s 479915 41877 479967 42193 0 FreeSans 400 90 0 0 gpio_loopback_zero[42] +flabel metal2 s 479915 41737 479967 42193 0 FreeSans 400 90 0 0 gpio_loopback_zero[42] port 775 nsew -flabel metal2 s 420917 41877 420969 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[41] +flabel metal2 s 420917 41737 420969 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[41] port 820 nsew -flabel metal2 s 425115 41877 425167 42193 0 FreeSans 400 90 0 0 gpio_loopback_zero[41] +flabel metal2 s 425115 41737 425167 42193 0 FreeSans 400 90 0 0 gpio_loopback_zero[41] port 776 nsew -flabel metal2 s 366117 41877 366169 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[40] +flabel metal2 s 366117 41737 366169 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[40] port 821 nsew -flabel metal2 s 370302 41855 370354 42171 0 FreeSans 400 90 0 0 gpio_loopback_zero[40] +flabel metal2 s 370302 41737 370354 42193 0 FreeSans 400 90 0 0 gpio_loopback_zero[40] port 777 nsew -flabel metal2 s 311317 41877 311369 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[39] +flabel metal2 s 311317 41737 311369 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[39] port 822 nsew -flabel metal2 s 315497 41877 315549 42193 0 FreeSans 400 90 0 0 gpio_loopback_zero[39] +flabel metal2 s 315497 41737 315549 42193 0 FreeSans 400 90 0 0 gpio_loopback_zero[39] port 778 nsew -flabel metal2 s 202717 41877 202769 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[38] +flabel metal2 s 202717 41737 202769 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[38] port 823 nsew -flabel metal2 s 205928 41878 205980 42194 0 FreeSans 400 90 0 0 gpio_loopback_zero[38] +flabel metal2 s 205928 41737 205980 42193 0 FreeSans 400 90 0 0 gpio_loopback_zero[38] port 779 nsew -flabel metal2 s 152301 42021 152357 42193 0 FreeSans 400 90 0 0 resetb_l +flabel metal2 s 152301 41737 152357 42193 0 FreeSans 400 90 0 0 resetb_l port 37 nsew -flabel metal2 s 141708 42047 141774 42193 0 FreeSans 400 90 0 0 resetb_h +flabel metal2 s 141708 41737 141774 42193 0 FreeSans 400 90 0 0 resetb_h port 36 nsew -flabel metal3 41854 95509 42193 95579 0 FreeSans 400 0 0 0 por_l +flabel metal3 41737 95509 42193 95579 0 FreeSans 400 0 0 0 por_l port 35 nsew -flabel metal3 41854 95732 42193 95802 0 FreeSans 400 0 0 0 porb_l +flabel metal3 41737 95732 42193 95802 0 FreeSans 400 0 0 0 porb_l port 34 nsew -flabel metal2 s 647219 41877 647271 42193 0 FreeSans 400 90 0 0 mask_rev[0] +flabel metal2 s 647219 41737 647271 42193 0 FreeSans 400 90 0 0 mask_rev[0] port 69 nsew -flabel metal3 41854 95284 42193 95354 0 FreeSans 400 0 0 0 porb_h +flabel metal3 41737 95284 42193 95354 0 FreeSans 400 0 0 0 porb_h port 33 nsew -flabel metal2 620435 995407 620496 995727 0 FreeSans 400 90 0 0 gpio_loopback_one[15] +flabel metal2 620435 995407 620495 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[15] port 846 nsew -flabel metal2 521035 995407 521096 995727 0 FreeSans 400 90 0 0 gpio_loopback_one[16] +flabel metal2 521035 995407 521095 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[16] port 845 nsew -flabel metal2 469835 995407 469896 995727 0 FreeSans 400 90 0 0 gpio_loopback_one[17] +flabel metal2 469835 995407 469895 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[17] port 844 nsew -flabel metal2 380835 995407 380896 995727 0 FreeSans 400 90 0 0 gpio_loopback_one[18] +flabel metal2 380835 995407 380895 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[18] port 843 nsew -flabel metal2 276435 995407 276496 995727 0 FreeSans 400 90 0 0 gpio_loopback_one[19] +flabel metal2 276435 995407 276495 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[19] port 842 nsew -flabel metal2 225235 995407 225296 995727 0 FreeSans 400 90 0 0 gpio_loopback_one[20] +flabel metal2 225235 995407 225295 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[20] port 841 nsew -flabel metal2 174035 995407 174096 995727 0 FreeSans 400 90 0 0 gpio_loopback_one[21] +flabel metal2 174035 995407 174095 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[21] port 840 nsew -flabel metal2 122835 995407 122896 995727 0 FreeSans 400 90 0 0 gpio_loopback_one[22] +flabel metal2 122835 995407 122895 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[22] port 839 nsew -flabel metal2 71635 995407 71696 995727 0 FreeSans 400 90 0 0 gpio_loopback_one[23] +flabel metal2 71635 995407 71695 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[23] port 838 nsew -flabel metal3 675407 388142 675727 388204 0 FreeSans 400 0 0 0 gpio_loopback_one[6] +flabel metal3 675407 388142 675863 388204 0 FreeSans 400 0 0 0 gpio_loopback_one[6] port 855 nsew -flabel metal3 675407 343142 675727 343204 0 FreeSans 400 0 0 0 gpio_loopback_one[5] +flabel metal3 675407 343142 675863 343204 0 FreeSans 400 0 0 0 gpio_loopback_one[5] port 856 nsew -flabel metal3 675407 298142 675727 298204 0 FreeSans 400 0 0 0 gpio_loopback_one[4] +flabel metal3 675407 298142 675863 298204 0 FreeSans 400 0 0 0 gpio_loopback_one[4] port 857 nsew -flabel metal3 675407 253142 675727 253204 0 FreeSans 400 0 0 0 gpio_loopback_one[3] +flabel metal3 675407 253142 675863 253204 0 FreeSans 400 0 0 0 gpio_loopback_one[3] port 858 nsew -flabel metal3 675407 208142 675727 208204 0 FreeSans 400 0 0 0 gpio_loopback_one[2] +flabel metal3 675407 208142 675863 208204 0 FreeSans 400 0 0 0 gpio_loopback_one[2] port 859 nsew -flabel metal3 675407 163142 675727 163204 0 FreeSans 400 0 0 0 gpio_loopback_one[1] +flabel metal3 675407 163142 675863 163204 0 FreeSans 400 0 0 0 gpio_loopback_one[1] port 860 nsew -flabel metal3 675407 118142 675727 118204 0 FreeSans 400 0 0 0 gpio_loopback_one[0] +flabel metal3 675407 118142 675863 118204 0 FreeSans 400 0 0 0 gpio_loopback_one[0] port 861 nsew -flabel metal3 632921 41693 637701 42193 0 FreeSans 3200 0 0 0 vdda +flabel metal3 632921 41737 637701 42193 0 FreeSans 3200 0 0 0 vdda port 22 nsew -flabel metal3 579121 41693 583901 42193 0 FreeSans 3200 0 0 0 vssio +flabel metal3 579121 41737 583901 42193 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 41693 110299 42193 115079 0 FreeSans 3200 90 0 0 vddio +flabel metal3 41737 110299 42193 115079 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 41693 483099 42193 487879 0 FreeSans 3200 90 0 0 vdda2 +flabel metal3 41737 483099 42193 487879 0 FreeSans 3200 90 0 0 vdda2 port 25 nsew -flabel metal3 41693 827699 42193 832479 0 FreeSans 3200 90 0 0 vssa2 +flabel metal3 41737 827699 42193 832479 0 FreeSans 3200 90 0 0 vssa2 port 27 nsew -flabel metal3 41693 869899 42193 874679 0 FreeSans 3200 90 0 0 vddio +flabel metal3 41737 869899 42193 874679 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 333499 995407 338279 995907 0 FreeSans 3200 0 0 0 vssio +flabel metal3 333499 995407 338279 995863 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 343478 995407 348258 995907 0 FreeSans 3200 0 0 0 vssio +flabel metal3 343478 995407 348258 995863 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 s 575699 995407 580479 995907 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 575699 995407 580479 995863 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 s 585678 995407 590458 995907 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 585678 995407 590458 995863 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 s 675407 425721 675907 430501 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 675407 425721 675863 430501 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 s 675407 513921 675907 518701 0 FreeSans 3200 0 0 0 vdda1 +flabel metal3 s 675407 513921 675863 518701 0 FreeSans 3200 0 0 0 vdda1 port 24 nsew -flabel metal3 s 675407 828521 675907 833301 0 FreeSans 3200 0 0 0 vdda1 +flabel metal3 s 675407 828521 675863 833301 0 FreeSans 3200 0 0 0 vdda1 port 24 nsew -flabel metal2 s 648115 41877 648167 42193 0 FreeSans 400 90 0 0 mask_rev[4] +flabel metal2 s 648115 41737 648167 42193 0 FreeSans 400 90 0 0 mask_rev[4] port 65 nsew -flabel metal2 s 648339 41877 648391 42193 0 FreeSans 400 90 0 0 mask_rev[5] +flabel metal2 s 648339 41737 648391 42193 0 FreeSans 400 90 0 0 mask_rev[5] port 64 nsew -flabel metal2 s 648563 41877 648615 42193 0 FreeSans 400 90 0 0 mask_rev[6] +flabel metal2 s 648563 41737 648615 42193 0 FreeSans 400 90 0 0 mask_rev[6] port 63 nsew -flabel metal2 s 648787 41877 648839 42193 0 FreeSans 400 90 0 0 mask_rev[7] +flabel metal2 s 648787 41737 648839 42193 0 FreeSans 400 90 0 0 mask_rev[7] port 62 nsew -flabel metal2 s 649011 41877 649063 42193 0 FreeSans 400 90 0 0 mask_rev[8] +flabel metal2 s 649011 41737 649063 42193 0 FreeSans 400 90 0 0 mask_rev[8] port 61 nsew -flabel metal2 s 649235 41877 649287 42193 0 FreeSans 400 90 0 0 mask_rev[9] +flabel metal2 s 649235 41737 649287 42193 0 FreeSans 400 90 0 0 mask_rev[9] port 60 nsew -flabel metal2 s 649459 41877 649511 42193 0 FreeSans 400 90 0 0 mask_rev[10] +flabel metal2 s 649459 41737 649511 42193 0 FreeSans 400 90 0 0 mask_rev[10] port 59 nsew -flabel metal2 s 649683 41877 649735 42193 0 FreeSans 400 90 0 0 mask_rev[11] +flabel metal2 s 649683 41737 649735 42193 0 FreeSans 400 90 0 0 mask_rev[11] port 58 nsew -flabel metal2 s 649907 41877 649959 42193 0 FreeSans 400 90 0 0 mask_rev[12] +flabel metal2 s 649907 41737 649959 42193 0 FreeSans 400 90 0 0 mask_rev[12] port 57 nsew -flabel metal2 s 650131 41877 650183 42193 0 FreeSans 400 90 0 0 mask_rev[13] +flabel metal2 s 650131 41737 650183 42193 0 FreeSans 400 90 0 0 mask_rev[13] port 56 nsew -flabel metal2 s 650355 41877 650407 42193 0 FreeSans 400 90 0 0 mask_rev[14] +flabel metal2 s 650355 41737 650407 42193 0 FreeSans 400 90 0 0 mask_rev[14] port 55 nsew -flabel metal2 s 650579 41877 650631 42193 0 FreeSans 400 90 0 0 mask_rev[15] +flabel metal2 s 650579 41737 650631 42193 0 FreeSans 400 90 0 0 mask_rev[15] port 54 nsew -flabel metal2 s 650803 41877 650855 42193 0 FreeSans 400 90 0 0 mask_rev[16] +flabel metal2 s 650803 41737 650855 42193 0 FreeSans 400 90 0 0 mask_rev[16] port 53 nsew -flabel metal2 s 651027 41877 651079 42193 0 FreeSans 400 90 0 0 mask_rev[17] +flabel metal2 s 651027 41737 651079 42193 0 FreeSans 400 90 0 0 mask_rev[17] port 52 nsew -flabel metal2 s 651251 41877 651303 42193 0 FreeSans 400 90 0 0 mask_rev[18] +flabel metal2 s 651251 41737 651303 42193 0 FreeSans 400 90 0 0 mask_rev[18] port 51 nsew -flabel metal2 s 651475 41877 651527 42193 0 FreeSans 400 90 0 0 mask_rev[19] +flabel metal2 s 651475 41737 651527 42193 0 FreeSans 400 90 0 0 mask_rev[19] port 50 nsew -flabel metal2 s 651699 41877 651751 42193 0 FreeSans 400 90 0 0 mask_rev[20] +flabel metal2 s 651699 41737 651751 42193 0 FreeSans 400 90 0 0 mask_rev[20] port 49 nsew -flabel metal2 s 651923 41877 651975 42193 0 FreeSans 400 90 0 0 mask_rev[21] +flabel metal2 s 651923 41737 651975 42193 0 FreeSans 400 90 0 0 mask_rev[21] port 48 nsew -flabel metal2 s 652147 41877 652199 42193 0 FreeSans 400 90 0 0 mask_rev[22] +flabel metal2 s 652147 41737 652199 42193 0 FreeSans 400 90 0 0 mask_rev[22] port 47 nsew -flabel metal2 s 652371 41877 652423 42193 0 FreeSans 400 90 0 0 mask_rev[23] +flabel metal2 s 652371 41737 652423 42193 0 FreeSans 400 90 0 0 mask_rev[23] port 46 nsew -flabel metal2 s 652595 41877 652647 42193 0 FreeSans 400 90 0 0 mask_rev[24] +flabel metal2 s 652595 41737 652647 42193 0 FreeSans 400 90 0 0 mask_rev[24] port 45 nsew -flabel metal2 s 652819 41877 652871 42193 0 FreeSans 400 90 0 0 mask_rev[25] +flabel metal2 s 652819 41737 652871 42193 0 FreeSans 400 90 0 0 mask_rev[25] port 44 nsew -flabel metal2 s 653043 41877 653095 42193 0 FreeSans 400 90 0 0 mask_rev[26] +flabel metal2 s 653043 41737 653095 42193 0 FreeSans 400 90 0 0 mask_rev[26] port 43 nsew -flabel metal2 s 653267 41877 653319 42193 0 FreeSans 400 90 0 0 mask_rev[27] +flabel metal2 s 653267 41737 653319 42193 0 FreeSans 400 90 0 0 mask_rev[27] port 42 nsew -flabel metal2 s 653491 41877 653543 42193 0 FreeSans 400 90 0 0 mask_rev[28] +flabel metal2 s 653491 41737 653543 42193 0 FreeSans 400 90 0 0 mask_rev[28] port 41 nsew -flabel metal2 s 653715 41877 653767 42193 0 FreeSans 400 90 0 0 mask_rev[29] +flabel metal2 s 653715 41737 653767 42193 0 FreeSans 400 90 0 0 mask_rev[29] port 40 nsew -flabel metal2 s 653939 41877 653991 42193 0 FreeSans 400 90 0 0 mask_rev[30] +flabel metal2 s 653939 41737 653991 42193 0 FreeSans 400 90 0 0 mask_rev[30] port 39 nsew -flabel metal2 s 654163 41877 654215 42193 0 FreeSans 400 90 0 0 mask_rev[31] +flabel metal2 s 654163 41737 654215 42193 0 FreeSans 400 90 0 0 mask_rev[31] port 38 nsew -flabel metal2 s 647891 41877 647943 42193 0 FreeSans 400 90 0 0 mask_rev[3] +flabel metal2 s 647891 41737 647943 42193 0 FreeSans 400 90 0 0 mask_rev[3] port 66 nsew -flabel metal2 s 647667 41877 647719 42193 0 FreeSans 400 90 0 0 mask_rev[2] +flabel metal2 s 647667 41737 647719 42193 0 FreeSans 400 90 0 0 mask_rev[2] port 67 nsew -flabel metal2 s 647443 41877 647495 42193 0 FreeSans 400 90 0 0 mask_rev[1] +flabel metal2 s 647443 41737 647495 42193 0 FreeSans 400 90 0 0 mask_rev[1] port 68 nsew flabel metal5 s 698512 952840 711002 965360 0 FreeSans 16000 0 0 0 gpio[14] port 99 nsew -flabel metal3 675407 881144 675727 881206 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] +flabel metal3 675407 881144 675863 881206 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] port 804 nsew -flabel metal3 675407 971144 675727 971206 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] +flabel metal3 675407 971144 675863 971206 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] port 803 nsew -flabel metal3 41873 776781 42193 776841 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] +flabel metal3 41737 776781 42193 776841 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] port 792 nsew -flabel metal3 41873 690781 42193 690841 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] +flabel metal3 41737 690781 42193 690841 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] port 790 nsew -flabel metal3 41873 604781 42193 604841 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] +flabel metal3 41737 604781 42193 604841 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] port 788 nsew -flabel metal3 41873 518781 42193 518841 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] +flabel metal3 41737 518781 42193 518841 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] port 786 nsew -flabel metal3 41873 346781 42193 346841 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] +flabel metal3 41737 346781 42193 346841 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] port 784 nsew -flabel metal3 41873 260781 42193 260841 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] +flabel metal3 41737 260781 42193 260841 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] port 782 nsew -flabel metal3 41873 174781 42193 174841 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] +flabel metal3 41737 174781 42193 174841 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] port 780 nsew -flabel metal3 41873 946781 42193 946841 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] +flabel metal3 41737 946781 42193 946841 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] port 793 nsew -flabel metal3 41873 733781 42193 733841 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] +flabel metal3 41737 733781 42193 733841 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] port 791 nsew -flabel metal3 41873 647781 42193 647841 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] +flabel metal3 41737 647781 42193 647841 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] port 789 nsew -flabel metal3 41873 561781 42193 561841 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] +flabel metal3 41737 561781 42193 561841 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] port 787 nsew -flabel metal3 41873 389781 42193 389841 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] +flabel metal3 41737 389781 42193 389841 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] port 785 nsew -flabel metal3 41873 303781 42193 303841 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] +flabel metal3 41737 303781 42193 303841 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] port 783 nsew -flabel metal3 41873 217781 42193 217841 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] +flabel metal3 41737 217781 42193 217841 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] port 781 nsew -flabel metal2 69634 995407 69695 995727 0 FreeSans 400 90 0 0 gpio_loopback_zero[23] -port 794 nsew -flabel metal2 120834 995407 120895 995727 0 FreeSans 400 90 0 0 gpio_loopback_zero[22] -port 795 nsew -flabel metal2 172034 995407 172095 995727 0 FreeSans 400 90 0 0 gpio_loopback_zero[21] -port 796 nsew -flabel metal2 223234 995407 223295 995727 0 FreeSans 400 90 0 0 gpio_loopback_zero[20] -port 797 nsew -flabel metal2 274434 995407 274495 995727 0 FreeSans 400 90 0 0 gpio_loopback_zero[19] -port 798 nsew -flabel metal2 378834 995407 378895 995727 0 FreeSans 400 90 0 0 gpio_loopback_zero[18] -port 799 nsew -flabel metal2 467834 995407 467895 995727 0 FreeSans 400 90 0 0 gpio_loopback_zero[17] -port 800 nsew -flabel metal2 519034 995407 519095 995727 0 FreeSans 400 90 0 0 gpio_loopback_zero[16] -port 801 nsew -flabel metal2 618434 995407 618495 995727 0 FreeSans 400 90 0 0 gpio_loopback_zero[15] -port 802 nsew -flabel metal3 s 41713 194097 42193 194225 0 FreeSans 400 0 0 0 analog_io[37] +flabel metal3 s 41737 194097 42193 194225 0 FreeSans 400 0 0 0 analog_io[37] port 868 nsew -flabel metal2 s 298375 41713 298503 42193 0 FreeSans 400 90 0 0 analog_io[39] +flabel metal2 s 298375 41737 298503 42193 0 FreeSans 400 90 0 0 analog_io[39] port 866 nsew -flabel metal2 192847 41713 192903 42193 0 FreeSans 400 270 0 0 gpio_dm0[38] +flabel metal2 192847 41737 192903 42193 0 FreeSans 400 270 0 0 gpio_dm0[38] port 559 nsew -flabel metal2 191007 41713 191063 42193 0 FreeSans 400 270 0 0 gpio_dm1[38] +flabel metal2 191007 41737 191063 42193 0 FreeSans 400 270 0 0 gpio_dm1[38] port 603 nsew -flabel metal3 88921 41693 93701 42193 0 FreeSans 3200 0 0 0 vssa +flabel metal3 88921 41737 93701 42193 0 FreeSans 3200 0 0 0 vssa port 23 nsew -flabel metal3 s 41713 535814 42193 536028 0 FreeSans 400 0 0 0 analog_noesd_io[31] +flabel metal3 s 41737 535814 42193 536028 0 FreeSans 400 0 0 0 analog_noesd_io[31] port 918 nsew -flabel metal3 s 41713 665414 42193 665628 0 FreeSans 400 0 0 0 analog_noesd_io[28] +flabel metal3 s 41737 665414 42193 665628 0 FreeSans 400 0 0 0 analog_noesd_io[28] port 921 nsew -flabel metal3 s 41713 753697 42193 753825 0 FreeSans 400 0 0 0 analog_io[26] +flabel metal3 s 41737 753697 42193 753825 0 FreeSans 400 0 0 0 analog_io[26] port 879 nsew -flabel metal3 675407 240572 675887 240786 0 FreeSans 400 0 0 0 analog_noesd_io[3] +flabel metal3 675407 240572 675863 240786 0 FreeSans 400 0 0 0 analog_noesd_io[3] port 946 nsew -flabel metal3 s 675407 100921 675887 100991 0 FreeSans 400 0 0 0 gpio_in[0] +flabel metal3 s 675407 100921 675863 100991 0 FreeSans 400 0 0 0 gpio_in[0] port 729 nsew -flabel metal3 s 675407 102761 675887 102831 0 FreeSans 400 0 0 0 gpio_slow_sel[0] +flabel metal3 s 675407 102761 675863 102831 0 FreeSans 400 0 0 0 gpio_slow_sel[0] port 377 nsew -flabel metal3 s 675407 104601 675887 104671 0 FreeSans 400 0 0 0 gpio_dm1[0] +flabel metal3 s 675407 104601 675863 104671 0 FreeSans 400 0 0 0 gpio_dm1[0] port 641 nsew -flabel metal3 s 675407 105797 675887 105867 0 FreeSans 400 0 0 0 gpio_analog_en[0] +flabel metal3 s 675407 105797 675863 105867 0 FreeSans 400 0 0 0 gpio_analog_en[0] port 465 nsew -flabel metal3 s 675407 107085 675887 107155 0 FreeSans 400 0 0 0 gpio_analog_pol[0] +flabel metal3 s 675407 107085 675863 107155 0 FreeSans 400 0 0 0 gpio_analog_pol[0] port 553 nsew -flabel metal3 s 675407 110121 675887 110191 0 FreeSans 400 0 0 0 gpio_analog_sel[0] +flabel metal3 s 675407 110121 675863 110191 0 FreeSans 400 0 0 0 gpio_analog_sel[0] port 509 nsew -flabel metal3 s 675407 106441 675887 106511 0 FreeSans 400 0 0 0 gpio_dm0[0] +flabel metal3 s 675407 106441 675863 106511 0 FreeSans 400 0 0 0 gpio_dm0[0] port 597 nsew -flabel metal3 s 675407 110765 675887 110835 0 FreeSans 400 0 0 0 gpio_dm2[0] +flabel metal3 s 675407 110765 675863 110835 0 FreeSans 400 0 0 0 gpio_dm2[0] port 685 nsew -flabel metal3 s 675407 111409 675887 111479 0 FreeSans 400 0 0 0 gpio_holdover[0] +flabel metal3 s 675407 111409 675863 111479 0 FreeSans 400 0 0 0 gpio_holdover[0] port 421 nsew -flabel metal3 s 675407 107637 675887 107707 0 FreeSans 400 0 0 0 gpio_inp_dis[0] +flabel metal3 s 675407 107637 675863 107707 0 FreeSans 400 0 0 0 gpio_inp_dis[0] port 245 nsew -flabel metal3 s 675407 115089 675887 115159 0 FreeSans 400 0 0 0 gpio_oeb[0] +flabel metal3 s 675407 115089 675863 115159 0 FreeSans 400 0 0 0 gpio_oeb[0] port 201 nsew -flabel metal3 s 675407 111961 675887 112031 0 FreeSans 400 0 0 0 gpio_out[0] +flabel metal3 s 675407 111961 675863 112031 0 FreeSans 400 0 0 0 gpio_out[0] port 157 nsew -flabel metal3 675407 115641 675887 115711 0 FreeSans 400 0 0 0 gpio_in_h[0] +flabel metal3 675407 115641 675863 115711 0 FreeSans 400 0 0 0 gpio_in_h[0] port 773 nsew -flabel metal3 s 675407 114445 675887 114515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] +flabel metal3 s 675407 114445 675863 114515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] port 289 nsew -flabel metal3 s 675407 113801 675887 113871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] +flabel metal3 s 675407 113801 675863 113871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] port 333 nsew -flabel metal3 675407 120143 675727 120205 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] +flabel metal3 675407 120143 675863 120205 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] port 817 nsew -flabel metal3 s 675407 967241 675887 967311 0 FreeSans 400 0 0 0 gpio_in_h[14] +flabel metal3 s 675407 967241 675863 967311 0 FreeSans 400 0 0 0 gpio_in_h[14] port 759 nsew -flabel metal3 s 675407 965401 675887 965471 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] +flabel metal3 s 675407 965401 675863 965471 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] port 319 nsew -flabel metal3 s 675407 963561 675887 963631 0 FreeSans 400 0 0 0 gpio_out[14] +flabel metal3 s 675407 963561 675863 963631 0 FreeSans 400 0 0 0 gpio_out[14] port 143 nsew -flabel metal3 s 675407 966689 675887 966759 0 FreeSans 400 0 0 0 gpio_oeb[14] +flabel metal3 s 675407 966689 675863 966759 0 FreeSans 400 0 0 0 gpio_oeb[14] port 187 nsew -flabel metal3 s 675407 959237 675887 959307 0 FreeSans 400 0 0 0 gpio_inp_dis[14] +flabel metal3 s 675407 959237 675863 959307 0 FreeSans 400 0 0 0 gpio_inp_dis[14] port 231 nsew -flabel metal3 s 675407 966045 675887 966115 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] +flabel metal3 s 675407 966045 675863 966115 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] port 275 nsew -flabel metal3 s 675407 963009 675887 963079 0 FreeSans 400 0 0 0 gpio_holdover[14] +flabel metal3 s 675407 963009 675863 963079 0 FreeSans 400 0 0 0 gpio_holdover[14] port 407 nsew -flabel metal3 s 675407 962365 675887 962435 0 FreeSans 400 0 0 0 gpio_dm2[14] +flabel metal3 s 675407 962365 675863 962435 0 FreeSans 400 0 0 0 gpio_dm2[14] port 671 nsew -flabel metal3 s 675407 958041 675887 958111 0 FreeSans 400 0 0 0 gpio_dm0[14] +flabel metal3 s 675407 958041 675863 958111 0 FreeSans 400 0 0 0 gpio_dm0[14] port 583 nsew -flabel metal3 s 675407 961721 675887 961791 0 FreeSans 400 0 0 0 gpio_analog_sel[14] +flabel metal3 s 675407 961721 675863 961791 0 FreeSans 400 0 0 0 gpio_analog_sel[14] port 495 nsew -flabel metal3 s 675407 958685 675887 958755 0 FreeSans 400 0 0 0 gpio_analog_pol[14] +flabel metal3 s 675407 958685 675863 958755 0 FreeSans 400 0 0 0 gpio_analog_pol[14] port 539 nsew -flabel metal3 s 675407 957397 675887 957467 0 FreeSans 400 0 0 0 gpio_analog_en[14] +flabel metal3 s 675407 957397 675863 957467 0 FreeSans 400 0 0 0 gpio_analog_en[14] port 451 nsew -flabel metal3 s 675407 956201 675887 956271 0 FreeSans 400 0 0 0 gpio_dm1[14] +flabel metal3 s 675407 956201 675863 956271 0 FreeSans 400 0 0 0 gpio_dm1[14] port 627 nsew -flabel metal3 s 675407 952521 675887 952591 0 FreeSans 400 0 0 0 gpio_in[14] +flabel metal3 s 675407 952521 675863 952591 0 FreeSans 400 0 0 0 gpio_in[14] port 715 nsew -flabel metal3 s 675407 954361 675887 954431 0 FreeSans 400 0 0 0 gpio_slow_sel[14] +flabel metal3 s 675407 954361 675863 954431 0 FreeSans 400 0 0 0 gpio_slow_sel[14] port 363 nsew -flabel metal3 s 675407 878041 675887 878111 0 FreeSans 400 0 0 0 gpio_in_h[13] +flabel metal3 s 675407 878041 675863 878111 0 FreeSans 400 0 0 0 gpio_in_h[13] port 760 nsew -flabel metal3 s 675407 876201 675887 876271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] +flabel metal3 s 675407 876201 675863 876271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] port 320 nsew -flabel metal3 s 675407 874361 675887 874431 0 FreeSans 400 0 0 0 gpio_out[13] +flabel metal3 s 675407 874361 675863 874431 0 FreeSans 400 0 0 0 gpio_out[13] port 144 nsew -flabel metal3 s 675407 877489 675887 877559 0 FreeSans 400 0 0 0 gpio_oeb[13] +flabel metal3 s 675407 877489 675863 877559 0 FreeSans 400 0 0 0 gpio_oeb[13] port 188 nsew -flabel metal3 s 675407 870037 675887 870107 0 FreeSans 400 0 0 0 gpio_inp_dis[13] +flabel metal3 s 675407 870037 675863 870107 0 FreeSans 400 0 0 0 gpio_inp_dis[13] port 232 nsew -flabel metal3 s 675407 876845 675887 876915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] +flabel metal3 s 675407 876845 675863 876915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] port 276 nsew -flabel metal3 s 675407 873809 675887 873879 0 FreeSans 400 0 0 0 gpio_holdover[13] +flabel metal3 s 675407 873809 675863 873879 0 FreeSans 400 0 0 0 gpio_holdover[13] port 408 nsew -flabel metal3 s 675407 873165 675887 873235 0 FreeSans 400 0 0 0 gpio_dm2[13] +flabel metal3 s 675407 873165 675863 873235 0 FreeSans 400 0 0 0 gpio_dm2[13] port 672 nsew -flabel metal3 s 675407 868841 675887 868911 0 FreeSans 400 0 0 0 gpio_dm0[13] +flabel metal3 s 675407 868841 675863 868911 0 FreeSans 400 0 0 0 gpio_dm0[13] port 584 nsew -flabel metal3 s 675407 872521 675887 872591 0 FreeSans 400 0 0 0 gpio_analog_sel[13] +flabel metal3 s 675407 872521 675863 872591 0 FreeSans 400 0 0 0 gpio_analog_sel[13] port 496 nsew -flabel metal3 s 675407 869485 675887 869555 0 FreeSans 400 0 0 0 gpio_analog_pol[13] +flabel metal3 s 675407 869485 675863 869555 0 FreeSans 400 0 0 0 gpio_analog_pol[13] port 540 nsew -flabel metal3 s 675407 868197 675887 868267 0 FreeSans 400 0 0 0 gpio_analog_en[13] +flabel metal3 s 675407 868197 675863 868267 0 FreeSans 400 0 0 0 gpio_analog_en[13] port 452 nsew -flabel metal3 s 675407 867001 675887 867071 0 FreeSans 400 0 0 0 gpio_dm1[13] +flabel metal3 s 675407 867001 675863 867071 0 FreeSans 400 0 0 0 gpio_dm1[13] port 628 nsew -flabel metal3 s 675407 863321 675887 863391 0 FreeSans 400 0 0 0 gpio_in[13] +flabel metal3 s 675407 863321 675863 863391 0 FreeSans 400 0 0 0 gpio_in[13] port 716 nsew -flabel metal3 s 675407 865161 675887 865231 0 FreeSans 400 0 0 0 gpio_slow_sel[13] +flabel metal3 s 675407 865161 675863 865231 0 FreeSans 400 0 0 0 gpio_slow_sel[13] port 364 nsew -flabel metal3 s 675407 788841 675887 788911 0 FreeSans 400 0 0 0 gpio_in_h[12] +flabel metal3 s 675407 788841 675863 788911 0 FreeSans 400 0 0 0 gpio_in_h[12] port 761 nsew -flabel metal3 s 675407 787001 675887 787071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] +flabel metal3 s 675407 787001 675863 787071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] port 321 nsew -flabel metal3 s 675407 785161 675887 785231 0 FreeSans 400 0 0 0 gpio_out[12] +flabel metal3 s 675407 785161 675863 785231 0 FreeSans 400 0 0 0 gpio_out[12] port 145 nsew -flabel metal3 s 675407 788289 675887 788359 0 FreeSans 400 0 0 0 gpio_oeb[12] +flabel metal3 s 675407 788289 675863 788359 0 FreeSans 400 0 0 0 gpio_oeb[12] port 189 nsew -flabel metal3 s 675407 780837 675887 780907 0 FreeSans 400 0 0 0 gpio_inp_dis[12] +flabel metal3 s 675407 780837 675863 780907 0 FreeSans 400 0 0 0 gpio_inp_dis[12] port 233 nsew -flabel metal3 s 675407 787645 675887 787715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] +flabel metal3 s 675407 787645 675863 787715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] port 277 nsew -flabel metal3 s 675407 784609 675887 784679 0 FreeSans 400 0 0 0 gpio_holdover[12] +flabel metal3 s 675407 784609 675863 784679 0 FreeSans 400 0 0 0 gpio_holdover[12] port 409 nsew -flabel metal3 s 675407 783965 675887 784035 0 FreeSans 400 0 0 0 gpio_dm2[12] +flabel metal3 s 675407 783965 675863 784035 0 FreeSans 400 0 0 0 gpio_dm2[12] port 673 nsew -flabel metal3 s 675407 779641 675887 779711 0 FreeSans 400 0 0 0 gpio_dm0[12] +flabel metal3 s 675407 779641 675863 779711 0 FreeSans 400 0 0 0 gpio_dm0[12] port 585 nsew -flabel metal3 s 675407 783321 675887 783391 0 FreeSans 400 0 0 0 gpio_analog_sel[12] +flabel metal3 s 675407 783321 675863 783391 0 FreeSans 400 0 0 0 gpio_analog_sel[12] port 497 nsew -flabel metal3 s 675407 780285 675887 780355 0 FreeSans 400 0 0 0 gpio_analog_pol[12] +flabel metal3 s 675407 780285 675863 780355 0 FreeSans 400 0 0 0 gpio_analog_pol[12] port 541 nsew -flabel metal3 s 675407 778997 675887 779067 0 FreeSans 400 0 0 0 gpio_analog_en[12] +flabel metal3 s 675407 778997 675863 779067 0 FreeSans 400 0 0 0 gpio_analog_en[12] port 453 nsew -flabel metal3 s 675407 777801 675887 777871 0 FreeSans 400 0 0 0 gpio_dm1[12] +flabel metal3 s 675407 777801 675863 777871 0 FreeSans 400 0 0 0 gpio_dm1[12] port 629 nsew -flabel metal3 s 675407 774121 675887 774191 0 FreeSans 400 0 0 0 gpio_in[12] +flabel metal3 s 675407 774121 675863 774191 0 FreeSans 400 0 0 0 gpio_in[12] port 717 nsew -flabel metal3 s 675407 775961 675887 776031 0 FreeSans 400 0 0 0 gpio_slow_sel[12] +flabel metal3 s 675407 775961 675863 776031 0 FreeSans 400 0 0 0 gpio_slow_sel[12] port 365 nsew -flabel metal3 s 675407 743841 675887 743911 0 FreeSans 400 0 0 0 gpio_in_h[11] +flabel metal3 s 675407 743841 675863 743911 0 FreeSans 400 0 0 0 gpio_in_h[11] port 762 nsew -flabel metal3 s 675407 738965 675887 739035 0 FreeSans 400 0 0 0 gpio_dm2[11] +flabel metal3 s 675407 738965 675863 739035 0 FreeSans 400 0 0 0 gpio_dm2[11] port 674 nsew -flabel metal3 s 675407 734641 675887 734711 0 FreeSans 400 0 0 0 gpio_dm0[11] +flabel metal3 s 675407 734641 675863 734711 0 FreeSans 400 0 0 0 gpio_dm0[11] port 586 nsew -flabel metal3 s 675407 738321 675887 738391 0 FreeSans 400 0 0 0 gpio_analog_sel[11] +flabel metal3 s 675407 738321 675863 738391 0 FreeSans 400 0 0 0 gpio_analog_sel[11] port 498 nsew -flabel metal3 s 675407 735285 675887 735355 0 FreeSans 400 0 0 0 gpio_analog_pol[11] +flabel metal3 s 675407 735285 675863 735355 0 FreeSans 400 0 0 0 gpio_analog_pol[11] port 542 nsew -flabel metal3 s 675407 733997 675887 734067 0 FreeSans 400 0 0 0 gpio_analog_en[11] +flabel metal3 s 675407 733997 675863 734067 0 FreeSans 400 0 0 0 gpio_analog_en[11] port 454 nsew -flabel metal3 s 675407 742001 675887 742071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] +flabel metal3 s 675407 742001 675863 742071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] port 322 nsew -flabel metal3 s 675407 740161 675887 740231 0 FreeSans 400 0 0 0 gpio_out[11] +flabel metal3 s 675407 740161 675863 740231 0 FreeSans 400 0 0 0 gpio_out[11] port 146 nsew -flabel metal3 s 675407 743289 675887 743359 0 FreeSans 400 0 0 0 gpio_oeb[11] +flabel metal3 s 675407 743289 675863 743359 0 FreeSans 400 0 0 0 gpio_oeb[11] port 190 nsew -flabel metal3 s 675407 735837 675887 735907 0 FreeSans 400 0 0 0 gpio_inp_dis[11] +flabel metal3 s 675407 735837 675863 735907 0 FreeSans 400 0 0 0 gpio_inp_dis[11] port 234 nsew -flabel metal3 s 675407 742645 675887 742715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] +flabel metal3 s 675407 742645 675863 742715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] port 278 nsew -flabel metal3 s 675407 739609 675887 739679 0 FreeSans 400 0 0 0 gpio_holdover[11] +flabel metal3 s 675407 739609 675863 739679 0 FreeSans 400 0 0 0 gpio_holdover[11] port 410 nsew -flabel metal3 s 675407 732801 675887 732871 0 FreeSans 400 0 0 0 gpio_dm1[11] +flabel metal3 s 675407 732801 675863 732871 0 FreeSans 400 0 0 0 gpio_dm1[11] port 630 nsew -flabel metal3 s 675407 729121 675887 729191 0 FreeSans 400 0 0 0 gpio_in[11] +flabel metal3 s 675407 729121 675863 729191 0 FreeSans 400 0 0 0 gpio_in[11] port 718 nsew -flabel metal3 s 675407 730961 675887 731031 0 FreeSans 400 0 0 0 gpio_slow_sel[11] +flabel metal3 s 675407 730961 675863 731031 0 FreeSans 400 0 0 0 gpio_slow_sel[11] port 366 nsew -flabel metal3 s 675407 698841 675887 698911 0 FreeSans 400 0 0 0 gpio_in_h[10] +flabel metal3 s 675407 698841 675863 698911 0 FreeSans 400 0 0 0 gpio_in_h[10] port 763 nsew -flabel metal3 s 675407 697001 675887 697071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] +flabel metal3 s 675407 697001 675863 697071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] port 323 nsew -flabel metal3 s 675407 695161 675887 695231 0 FreeSans 400 0 0 0 gpio_out[10] +flabel metal3 s 675407 695161 675863 695231 0 FreeSans 400 0 0 0 gpio_out[10] port 147 nsew -flabel metal3 s 675407 698289 675887 698359 0 FreeSans 400 0 0 0 gpio_oeb[10] +flabel metal3 s 675407 698289 675863 698359 0 FreeSans 400 0 0 0 gpio_oeb[10] port 191 nsew -flabel metal3 s 675407 690837 675887 690907 0 FreeSans 400 0 0 0 gpio_inp_dis[10] +flabel metal3 s 675407 690837 675863 690907 0 FreeSans 400 0 0 0 gpio_inp_dis[10] port 235 nsew -flabel metal3 s 675407 697645 675887 697715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] +flabel metal3 s 675407 697645 675863 697715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] port 279 nsew -flabel metal3 s 675407 694609 675887 694679 0 FreeSans 400 0 0 0 gpio_holdover[10] +flabel metal3 s 675407 694609 675863 694679 0 FreeSans 400 0 0 0 gpio_holdover[10] port 411 nsew -flabel metal3 s 675407 693965 675887 694035 0 FreeSans 400 0 0 0 gpio_dm2[10] +flabel metal3 s 675407 693965 675863 694035 0 FreeSans 400 0 0 0 gpio_dm2[10] port 675 nsew -flabel metal3 s 675407 689641 675887 689711 0 FreeSans 400 0 0 0 gpio_dm0[10] +flabel metal3 s 675407 689641 675863 689711 0 FreeSans 400 0 0 0 gpio_dm0[10] port 587 nsew -flabel metal3 s 675407 693321 675887 693391 0 FreeSans 400 0 0 0 gpio_analog_sel[10] +flabel metal3 s 675407 693321 675863 693391 0 FreeSans 400 0 0 0 gpio_analog_sel[10] port 499 nsew -flabel metal3 s 675407 690285 675887 690355 0 FreeSans 400 0 0 0 gpio_analog_pol[10] +flabel metal3 s 675407 690285 675863 690355 0 FreeSans 400 0 0 0 gpio_analog_pol[10] port 543 nsew -flabel metal3 s 675407 688997 675887 689067 0 FreeSans 400 0 0 0 gpio_analog_en[10] +flabel metal3 s 675407 688997 675863 689067 0 FreeSans 400 0 0 0 gpio_analog_en[10] port 455 nsew -flabel metal3 s 675407 687801 675887 687871 0 FreeSans 400 0 0 0 gpio_dm1[10] +flabel metal3 s 675407 687801 675863 687871 0 FreeSans 400 0 0 0 gpio_dm1[10] port 631 nsew -flabel metal3 s 675407 684121 675887 684191 0 FreeSans 400 0 0 0 gpio_in[10] +flabel metal3 s 675407 684121 675863 684191 0 FreeSans 400 0 0 0 gpio_in[10] port 719 nsew -flabel metal3 s 675407 685961 675887 686031 0 FreeSans 400 0 0 0 gpio_slow_sel[10] +flabel metal3 s 675407 685961 675863 686031 0 FreeSans 400 0 0 0 gpio_slow_sel[10] port 367 nsew -flabel metal3 s 675407 653641 675887 653711 0 FreeSans 400 0 0 0 gpio_in_h[9] +flabel metal3 s 675407 653641 675863 653711 0 FreeSans 400 0 0 0 gpio_in_h[9] port 764 nsew -flabel metal3 s 675407 651801 675887 651871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] +flabel metal3 s 675407 651801 675863 651871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] port 324 nsew -flabel metal3 s 675407 649961 675887 650031 0 FreeSans 400 0 0 0 gpio_out[9] +flabel metal3 s 675407 649961 675863 650031 0 FreeSans 400 0 0 0 gpio_out[9] port 148 nsew -flabel metal3 s 675407 653089 675887 653159 0 FreeSans 400 0 0 0 gpio_oeb[9] +flabel metal3 s 675407 653089 675863 653159 0 FreeSans 400 0 0 0 gpio_oeb[9] port 192 nsew -flabel metal3 s 675407 645637 675887 645707 0 FreeSans 400 0 0 0 gpio_inp_dis[9] +flabel metal3 s 675407 645637 675863 645707 0 FreeSans 400 0 0 0 gpio_inp_dis[9] port 236 nsew -flabel metal3 s 675407 652445 675887 652515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] +flabel metal3 s 675407 652445 675863 652515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] port 280 nsew -flabel metal3 s 675407 649409 675887 649479 0 FreeSans 400 0 0 0 gpio_holdover[9] +flabel metal3 s 675407 649409 675863 649479 0 FreeSans 400 0 0 0 gpio_holdover[9] port 412 nsew -flabel metal3 s 675407 648765 675887 648835 0 FreeSans 400 0 0 0 gpio_dm2[9] +flabel metal3 s 675407 648765 675863 648835 0 FreeSans 400 0 0 0 gpio_dm2[9] port 676 nsew -flabel metal3 s 675407 644441 675887 644511 0 FreeSans 400 0 0 0 gpio_dm0[9] +flabel metal3 s 675407 644441 675863 644511 0 FreeSans 400 0 0 0 gpio_dm0[9] port 588 nsew -flabel metal3 s 675407 648121 675887 648191 0 FreeSans 400 0 0 0 gpio_analog_sel[9] +flabel metal3 s 675407 648121 675863 648191 0 FreeSans 400 0 0 0 gpio_analog_sel[9] port 500 nsew -flabel metal3 s 675407 645085 675887 645155 0 FreeSans 400 0 0 0 gpio_analog_pol[9] +flabel metal3 s 675407 645085 675863 645155 0 FreeSans 400 0 0 0 gpio_analog_pol[9] port 544 nsew -flabel metal3 s 675407 643797 675887 643867 0 FreeSans 400 0 0 0 gpio_analog_en[9] +flabel metal3 s 675407 643797 675863 643867 0 FreeSans 400 0 0 0 gpio_analog_en[9] port 456 nsew -flabel metal3 s 675407 642601 675887 642671 0 FreeSans 400 0 0 0 gpio_dm1[9] +flabel metal3 s 675407 642601 675863 642671 0 FreeSans 400 0 0 0 gpio_dm1[9] port 632 nsew -flabel metal3 s 675407 638921 675887 638991 0 FreeSans 400 0 0 0 gpio_in[9] +flabel metal3 s 675407 638921 675863 638991 0 FreeSans 400 0 0 0 gpio_in[9] port 720 nsew -flabel metal3 s 675407 640761 675887 640831 0 FreeSans 400 0 0 0 gpio_slow_sel[9] +flabel metal3 s 675407 640761 675863 640831 0 FreeSans 400 0 0 0 gpio_slow_sel[9] port 368 nsew -flabel metal3 s 675407 608641 675887 608711 0 FreeSans 400 0 0 0 gpio_in_h[8] +flabel metal3 s 675407 608641 675863 608711 0 FreeSans 400 0 0 0 gpio_in_h[8] port 765 nsew -flabel metal3 s 675407 606801 675887 606871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] +flabel metal3 s 675407 606801 675863 606871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] port 325 nsew -flabel metal3 s 675407 604961 675887 605031 0 FreeSans 400 0 0 0 gpio_out[8] +flabel metal3 s 675407 604961 675863 605031 0 FreeSans 400 0 0 0 gpio_out[8] port 149 nsew -flabel metal3 s 675407 608089 675887 608159 0 FreeSans 400 0 0 0 gpio_oeb[8] +flabel metal3 s 675407 608089 675863 608159 0 FreeSans 400 0 0 0 gpio_oeb[8] port 193 nsew -flabel metal3 s 675407 600637 675887 600707 0 FreeSans 400 0 0 0 gpio_inp_dis[8] +flabel metal3 s 675407 600637 675863 600707 0 FreeSans 400 0 0 0 gpio_inp_dis[8] port 237 nsew -flabel metal3 s 675407 607445 675887 607515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] +flabel metal3 s 675407 607445 675863 607515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] port 281 nsew -flabel metal3 s 675407 604409 675887 604479 0 FreeSans 400 0 0 0 gpio_holdover[8] +flabel metal3 s 675407 604409 675863 604479 0 FreeSans 400 0 0 0 gpio_holdover[8] port 413 nsew -flabel metal3 s 675407 603765 675887 603835 0 FreeSans 400 0 0 0 gpio_dm2[8] +flabel metal3 s 675407 603765 675863 603835 0 FreeSans 400 0 0 0 gpio_dm2[8] port 677 nsew -flabel metal3 s 675407 599441 675887 599511 0 FreeSans 400 0 0 0 gpio_dm0[8] +flabel metal3 s 675407 599441 675863 599511 0 FreeSans 400 0 0 0 gpio_dm0[8] port 589 nsew -flabel metal3 s 675407 603121 675887 603191 0 FreeSans 400 0 0 0 gpio_analog_sel[8] +flabel metal3 s 675407 603121 675863 603191 0 FreeSans 400 0 0 0 gpio_analog_sel[8] port 501 nsew -flabel metal3 s 675407 600085 675887 600155 0 FreeSans 400 0 0 0 gpio_analog_pol[8] +flabel metal3 s 675407 600085 675863 600155 0 FreeSans 400 0 0 0 gpio_analog_pol[8] port 545 nsew -flabel metal3 s 675407 598797 675887 598867 0 FreeSans 400 0 0 0 gpio_analog_en[8] +flabel metal3 s 675407 598797 675863 598867 0 FreeSans 400 0 0 0 gpio_analog_en[8] port 457 nsew -flabel metal3 s 675407 597601 675887 597671 0 FreeSans 400 0 0 0 gpio_dm1[8] +flabel metal3 s 675407 597601 675863 597671 0 FreeSans 400 0 0 0 gpio_dm1[8] port 633 nsew -flabel metal3 s 675407 593921 675887 593991 0 FreeSans 400 0 0 0 gpio_in[8] +flabel metal3 s 675407 593921 675863 593991 0 FreeSans 400 0 0 0 gpio_in[8] port 721 nsew -flabel metal3 s 675407 595761 675887 595831 0 FreeSans 400 0 0 0 gpio_slow_sel[8] +flabel metal3 s 675407 595761 675863 595831 0 FreeSans 400 0 0 0 gpio_slow_sel[8] port 369 nsew -flabel metal3 s 675407 563441 675887 563511 0 FreeSans 400 0 0 0 gpio_in_h[7] +flabel metal3 s 675407 563441 675863 563511 0 FreeSans 400 0 0 0 gpio_in_h[7] port 766 nsew -flabel metal3 s 675407 561601 675887 561671 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] +flabel metal3 s 675407 561601 675863 561671 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] port 326 nsew -flabel metal3 s 675407 559761 675887 559831 0 FreeSans 400 0 0 0 gpio_out[7] +flabel metal3 s 675407 559761 675863 559831 0 FreeSans 400 0 0 0 gpio_out[7] port 150 nsew -flabel metal3 s 675407 562889 675887 562959 0 FreeSans 400 0 0 0 gpio_oeb[7] +flabel metal3 s 675407 562889 675863 562959 0 FreeSans 400 0 0 0 gpio_oeb[7] port 194 nsew -flabel metal3 s 675407 555437 675887 555507 0 FreeSans 400 0 0 0 gpio_inp_dis[7] +flabel metal3 s 675407 555437 675863 555507 0 FreeSans 400 0 0 0 gpio_inp_dis[7] port 238 nsew -flabel metal3 s 675407 562245 675887 562315 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] +flabel metal3 s 675407 562245 675863 562315 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] port 282 nsew -flabel metal3 s 675407 559209 675887 559279 0 FreeSans 400 0 0 0 gpio_holdover[7] +flabel metal3 s 675407 559209 675863 559279 0 FreeSans 400 0 0 0 gpio_holdover[7] port 414 nsew -flabel metal3 s 675407 558565 675887 558635 0 FreeSans 400 0 0 0 gpio_dm2[7] +flabel metal3 s 675407 558565 675863 558635 0 FreeSans 400 0 0 0 gpio_dm2[7] port 678 nsew -flabel metal3 s 675407 554241 675887 554311 0 FreeSans 400 0 0 0 gpio_dm0[7] +flabel metal3 s 675407 554241 675863 554311 0 FreeSans 400 0 0 0 gpio_dm0[7] port 590 nsew -flabel metal3 s 675407 557921 675887 557991 0 FreeSans 400 0 0 0 gpio_analog_sel[7] +flabel metal3 s 675407 557921 675863 557991 0 FreeSans 400 0 0 0 gpio_analog_sel[7] port 502 nsew -flabel metal3 s 675407 554885 675887 554955 0 FreeSans 400 0 0 0 gpio_analog_pol[7] +flabel metal3 s 675407 554885 675863 554955 0 FreeSans 400 0 0 0 gpio_analog_pol[7] port 546 nsew -flabel metal3 s 675407 553597 675887 553667 0 FreeSans 400 0 0 0 gpio_analog_en[7] +flabel metal3 s 675407 553597 675863 553667 0 FreeSans 400 0 0 0 gpio_analog_en[7] port 458 nsew -flabel metal3 s 675407 552401 675887 552471 0 FreeSans 400 0 0 0 gpio_dm1[7] +flabel metal3 s 675407 552401 675863 552471 0 FreeSans 400 0 0 0 gpio_dm1[7] port 634 nsew -flabel metal3 s 675407 548721 675887 548791 0 FreeSans 400 0 0 0 gpio_in[7] +flabel metal3 s 675407 548721 675863 548791 0 FreeSans 400 0 0 0 gpio_in[7] port 722 nsew -flabel metal3 s 675407 550561 675887 550631 0 FreeSans 400 0 0 0 gpio_slow_sel[7] +flabel metal3 s 675407 550561 675863 550631 0 FreeSans 400 0 0 0 gpio_slow_sel[7] port 370 nsew -flabel metal3 675407 386241 675887 386311 0 FreeSans 400 0 0 0 gpio_in_h[6] +flabel metal3 675407 386241 675863 386311 0 FreeSans 400 0 0 0 gpio_in_h[6] port 767 nsew -flabel metal3 s 675407 384401 675887 384471 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] +flabel metal3 s 675407 384401 675863 384471 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] port 327 nsew -flabel metal3 s 675407 382561 675887 382631 0 FreeSans 400 0 0 0 gpio_out[6] +flabel metal3 s 675407 382561 675863 382631 0 FreeSans 400 0 0 0 gpio_out[6] port 151 nsew -flabel metal3 s 675407 385689 675887 385759 0 FreeSans 400 0 0 0 gpio_oeb[6] +flabel metal3 s 675407 385689 675863 385759 0 FreeSans 400 0 0 0 gpio_oeb[6] port 195 nsew -flabel metal3 s 675407 378237 675887 378307 0 FreeSans 400 0 0 0 gpio_inp_dis[6] +flabel metal3 s 675407 378237 675863 378307 0 FreeSans 400 0 0 0 gpio_inp_dis[6] port 239 nsew -flabel metal3 s 675407 385045 675887 385115 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] +flabel metal3 s 675407 385045 675863 385115 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] port 283 nsew -flabel metal3 s 675407 382009 675887 382079 0 FreeSans 400 0 0 0 gpio_holdover[6] +flabel metal3 s 675407 382009 675863 382079 0 FreeSans 400 0 0 0 gpio_holdover[6] port 415 nsew -flabel metal3 s 675407 381365 675887 381435 0 FreeSans 400 0 0 0 gpio_dm2[6] +flabel metal3 s 675407 381365 675863 381435 0 FreeSans 400 0 0 0 gpio_dm2[6] port 679 nsew -flabel metal3 s 675407 377041 675887 377111 0 FreeSans 400 0 0 0 gpio_dm0[6] +flabel metal3 s 675407 377041 675863 377111 0 FreeSans 400 0 0 0 gpio_dm0[6] port 591 nsew -flabel metal3 s 675407 380721 675887 380791 0 FreeSans 400 0 0 0 gpio_analog_sel[6] +flabel metal3 s 675407 380721 675863 380791 0 FreeSans 400 0 0 0 gpio_analog_sel[6] port 503 nsew -flabel metal3 s 675407 377685 675887 377755 0 FreeSans 400 0 0 0 gpio_analog_pol[6] +flabel metal3 s 675407 377685 675863 377755 0 FreeSans 400 0 0 0 gpio_analog_pol[6] port 547 nsew -flabel metal3 s 675407 376397 675887 376467 0 FreeSans 400 0 0 0 gpio_analog_en[6] +flabel metal3 s 675407 376397 675863 376467 0 FreeSans 400 0 0 0 gpio_analog_en[6] port 459 nsew -flabel metal3 s 675407 375201 675887 375271 0 FreeSans 400 0 0 0 gpio_dm1[6] +flabel metal3 s 675407 375201 675863 375271 0 FreeSans 400 0 0 0 gpio_dm1[6] port 635 nsew -flabel metal3 s 675407 371521 675887 371591 0 FreeSans 400 0 0 0 gpio_in[6] +flabel metal3 s 675407 371521 675863 371591 0 FreeSans 400 0 0 0 gpio_in[6] port 723 nsew -flabel metal3 s 675407 373361 675887 373431 0 FreeSans 400 0 0 0 gpio_slow_sel[6] +flabel metal3 s 675407 373361 675863 373431 0 FreeSans 400 0 0 0 gpio_slow_sel[6] port 371 nsew -flabel metal3 675407 341041 675887 341111 0 FreeSans 400 0 0 0 gpio_in_h[5] +flabel metal3 675407 341041 675863 341111 0 FreeSans 400 0 0 0 gpio_in_h[5] port 768 nsew -flabel metal3 s 675407 339201 675887 339271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] +flabel metal3 s 675407 339201 675863 339271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] port 328 nsew -flabel metal3 s 675407 337361 675887 337431 0 FreeSans 400 0 0 0 gpio_out[5] +flabel metal3 s 675407 337361 675863 337431 0 FreeSans 400 0 0 0 gpio_out[5] port 152 nsew -flabel metal3 s 675407 340489 675887 340559 0 FreeSans 400 0 0 0 gpio_oeb[5] +flabel metal3 s 675407 340489 675863 340559 0 FreeSans 400 0 0 0 gpio_oeb[5] port 196 nsew -flabel metal3 s 675407 333037 675887 333107 0 FreeSans 400 0 0 0 gpio_inp_dis[5] +flabel metal3 s 675407 333037 675863 333107 0 FreeSans 400 0 0 0 gpio_inp_dis[5] port 240 nsew -flabel metal3 s 675407 339845 675887 339915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] +flabel metal3 s 675407 339845 675863 339915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] port 284 nsew -flabel metal3 s 675407 336809 675887 336879 0 FreeSans 400 0 0 0 gpio_holdover[5] +flabel metal3 s 675407 336809 675863 336879 0 FreeSans 400 0 0 0 gpio_holdover[5] port 416 nsew -flabel metal3 s 675407 336165 675887 336235 0 FreeSans 400 0 0 0 gpio_dm2[5] +flabel metal3 s 675407 336165 675863 336235 0 FreeSans 400 0 0 0 gpio_dm2[5] port 680 nsew -flabel metal3 s 675407 331841 675887 331911 0 FreeSans 400 0 0 0 gpio_dm0[5] +flabel metal3 s 675407 331841 675863 331911 0 FreeSans 400 0 0 0 gpio_dm0[5] port 592 nsew -flabel metal3 s 675407 335521 675887 335591 0 FreeSans 400 0 0 0 gpio_analog_sel[5] +flabel metal3 s 675407 335521 675863 335591 0 FreeSans 400 0 0 0 gpio_analog_sel[5] port 504 nsew -flabel metal3 s 675407 332485 675887 332555 0 FreeSans 400 0 0 0 gpio_analog_pol[5] +flabel metal3 s 675407 332485 675863 332555 0 FreeSans 400 0 0 0 gpio_analog_pol[5] port 548 nsew -flabel metal3 s 675407 331197 675887 331267 0 FreeSans 400 0 0 0 gpio_analog_en[5] +flabel metal3 s 675407 331197 675863 331267 0 FreeSans 400 0 0 0 gpio_analog_en[5] port 460 nsew -flabel metal3 s 675407 330001 675887 330071 0 FreeSans 400 0 0 0 gpio_dm1[5] +flabel metal3 s 675407 330001 675863 330071 0 FreeSans 400 0 0 0 gpio_dm1[5] port 636 nsew -flabel metal3 s 675407 326321 675887 326391 0 FreeSans 400 0 0 0 gpio_in[5] +flabel metal3 s 675407 326321 675863 326391 0 FreeSans 400 0 0 0 gpio_in[5] port 724 nsew -flabel metal3 s 675407 328161 675887 328231 0 FreeSans 400 0 0 0 gpio_slow_sel[5] +flabel metal3 s 675407 328161 675863 328231 0 FreeSans 400 0 0 0 gpio_slow_sel[5] port 372 nsew -flabel metal3 675407 296041 675887 296111 0 FreeSans 400 0 0 0 gpio_in_h[4] +flabel metal3 675407 296041 675863 296111 0 FreeSans 400 0 0 0 gpio_in_h[4] port 769 nsew -flabel metal3 s 675407 294201 675887 294271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] +flabel metal3 s 675407 294201 675863 294271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] port 329 nsew -flabel metal3 s 675407 292361 675887 292431 0 FreeSans 400 0 0 0 gpio_out[4] +flabel metal3 s 675407 292361 675863 292431 0 FreeSans 400 0 0 0 gpio_out[4] port 153 nsew -flabel metal3 s 675407 295489 675887 295559 0 FreeSans 400 0 0 0 gpio_oeb[4] +flabel metal3 s 675407 295489 675863 295559 0 FreeSans 400 0 0 0 gpio_oeb[4] port 197 nsew -flabel metal3 s 675407 288037 675887 288107 0 FreeSans 400 0 0 0 gpio_inp_dis[4] +flabel metal3 s 675407 288037 675863 288107 0 FreeSans 400 0 0 0 gpio_inp_dis[4] port 241 nsew -flabel metal3 s 675407 294845 675887 294915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] +flabel metal3 s 675407 294845 675863 294915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] port 285 nsew -flabel metal3 s 675407 291809 675887 291879 0 FreeSans 400 0 0 0 gpio_holdover[4] +flabel metal3 s 675407 291809 675863 291879 0 FreeSans 400 0 0 0 gpio_holdover[4] port 417 nsew -flabel metal3 s 675407 291165 675887 291235 0 FreeSans 400 0 0 0 gpio_dm2[4] +flabel metal3 s 675407 291165 675863 291235 0 FreeSans 400 0 0 0 gpio_dm2[4] port 681 nsew -flabel metal3 s 675407 286841 675887 286911 0 FreeSans 400 0 0 0 gpio_dm0[4] +flabel metal3 s 675407 286841 675863 286911 0 FreeSans 400 0 0 0 gpio_dm0[4] port 593 nsew -flabel metal3 s 675407 290521 675887 290591 0 FreeSans 400 0 0 0 gpio_analog_sel[4] +flabel metal3 s 675407 290521 675863 290591 0 FreeSans 400 0 0 0 gpio_analog_sel[4] port 505 nsew -flabel metal3 s 675407 287485 675887 287555 0 FreeSans 400 0 0 0 gpio_analog_pol[4] +flabel metal3 s 675407 287485 675863 287555 0 FreeSans 400 0 0 0 gpio_analog_pol[4] port 549 nsew -flabel metal3 s 675407 286197 675887 286267 0 FreeSans 400 0 0 0 gpio_analog_en[4] +flabel metal3 s 675407 286197 675863 286267 0 FreeSans 400 0 0 0 gpio_analog_en[4] port 461 nsew -flabel metal3 s 675407 285001 675887 285071 0 FreeSans 400 0 0 0 gpio_dm1[4] +flabel metal3 s 675407 285001 675863 285071 0 FreeSans 400 0 0 0 gpio_dm1[4] port 637 nsew -flabel metal3 s 675407 281321 675887 281391 0 FreeSans 400 0 0 0 gpio_in[4] +flabel metal3 s 675407 281321 675863 281391 0 FreeSans 400 0 0 0 gpio_in[4] port 725 nsew -flabel metal3 s 675407 283161 675887 283231 0 FreeSans 400 0 0 0 gpio_slow_sel[4] +flabel metal3 s 675407 283161 675863 283231 0 FreeSans 400 0 0 0 gpio_slow_sel[4] port 373 nsew -flabel metal3 675407 251041 675887 251111 0 FreeSans 400 0 0 0 gpio_in_h[3] +flabel metal3 675407 251041 675863 251111 0 FreeSans 400 0 0 0 gpio_in_h[3] port 770 nsew -flabel metal3 s 675407 249201 675887 249271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] +flabel metal3 s 675407 249201 675863 249271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] port 330 nsew -flabel metal3 s 675407 247361 675887 247431 0 FreeSans 400 0 0 0 gpio_out[3] +flabel metal3 s 675407 247361 675863 247431 0 FreeSans 400 0 0 0 gpio_out[3] port 154 nsew -flabel metal3 s 675407 250489 675887 250559 0 FreeSans 400 0 0 0 gpio_oeb[3] +flabel metal3 s 675407 250489 675863 250559 0 FreeSans 400 0 0 0 gpio_oeb[3] port 198 nsew -flabel metal3 s 675407 243037 675887 243107 0 FreeSans 400 0 0 0 gpio_inp_dis[3] +flabel metal3 s 675407 243037 675863 243107 0 FreeSans 400 0 0 0 gpio_inp_dis[3] port 242 nsew -flabel metal3 s 675407 249845 675887 249915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] +flabel metal3 s 675407 249845 675863 249915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] port 286 nsew -flabel metal3 s 675407 246809 675887 246879 0 FreeSans 400 0 0 0 gpio_holdover[3] +flabel metal3 s 675407 246809 675863 246879 0 FreeSans 400 0 0 0 gpio_holdover[3] port 418 nsew -flabel metal3 s 675407 241841 675887 241911 0 FreeSans 400 0 0 0 gpio_dm0[3] +flabel metal3 s 675407 241841 675863 241911 0 FreeSans 400 0 0 0 gpio_dm0[3] port 594 nsew -flabel metal3 s 675407 246165 675887 246235 0 FreeSans 400 0 0 0 gpio_dm2[3] +flabel metal3 s 675407 246165 675863 246235 0 FreeSans 400 0 0 0 gpio_dm2[3] port 682 nsew -flabel metal3 s 675407 245521 675887 245591 0 FreeSans 400 0 0 0 gpio_analog_sel[3] +flabel metal3 s 675407 245521 675863 245591 0 FreeSans 400 0 0 0 gpio_analog_sel[3] port 506 nsew -flabel metal3 s 675407 242485 675887 242555 0 FreeSans 400 0 0 0 gpio_analog_pol[3] +flabel metal3 s 675407 242485 675863 242555 0 FreeSans 400 0 0 0 gpio_analog_pol[3] port 550 nsew -flabel metal3 s 675407 241197 675887 241267 0 FreeSans 400 0 0 0 gpio_analog_en[3] +flabel metal3 s 675407 241197 675863 241267 0 FreeSans 400 0 0 0 gpio_analog_en[3] port 462 nsew -flabel metal3 s 675407 240001 675887 240071 0 FreeSans 400 0 0 0 gpio_dm1[3] +flabel metal3 s 675407 240001 675863 240071 0 FreeSans 400 0 0 0 gpio_dm1[3] port 638 nsew -flabel metal3 s 675407 236321 675887 236391 0 FreeSans 400 0 0 0 gpio_in[3] +flabel metal3 s 675407 236321 675863 236391 0 FreeSans 400 0 0 0 gpio_in[3] port 726 nsew -flabel metal3 s 675407 238161 675887 238231 0 FreeSans 400 0 0 0 gpio_slow_sel[3] +flabel metal3 s 675407 238161 675863 238231 0 FreeSans 400 0 0 0 gpio_slow_sel[3] port 374 nsew -flabel metal3 675407 205841 675887 205911 0 FreeSans 400 0 0 0 gpio_in_h[2] +flabel metal3 675407 205841 675863 205911 0 FreeSans 400 0 0 0 gpio_in_h[2] port 771 nsew -flabel metal3 s 675407 204001 675887 204071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] +flabel metal3 s 675407 204001 675863 204071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] port 331 nsew -flabel metal3 s 675407 202161 675887 202231 0 FreeSans 400 0 0 0 gpio_out[2] +flabel metal3 s 675407 202161 675863 202231 0 FreeSans 400 0 0 0 gpio_out[2] port 155 nsew -flabel metal3 s 675407 205289 675887 205359 0 FreeSans 400 0 0 0 gpio_oeb[2] +flabel metal3 s 675407 205289 675863 205359 0 FreeSans 400 0 0 0 gpio_oeb[2] port 199 nsew -flabel metal3 s 675407 197837 675887 197907 0 FreeSans 400 0 0 0 gpio_inp_dis[2] +flabel metal3 s 675407 197837 675863 197907 0 FreeSans 400 0 0 0 gpio_inp_dis[2] port 243 nsew -flabel metal3 s 675407 204645 675887 204715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] +flabel metal3 s 675407 204645 675863 204715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] port 287 nsew -flabel metal3 s 675407 201609 675887 201679 0 FreeSans 400 0 0 0 gpio_holdover[2] +flabel metal3 s 675407 201609 675863 201679 0 FreeSans 400 0 0 0 gpio_holdover[2] port 419 nsew -flabel metal3 s 675407 200965 675887 201035 0 FreeSans 400 0 0 0 gpio_dm2[2] +flabel metal3 s 675407 200965 675863 201035 0 FreeSans 400 0 0 0 gpio_dm2[2] port 683 nsew -flabel metal3 s 675407 196641 675887 196711 0 FreeSans 400 0 0 0 gpio_dm0[2] +flabel metal3 s 675407 196641 675863 196711 0 FreeSans 400 0 0 0 gpio_dm0[2] port 595 nsew -flabel metal3 s 675407 200321 675887 200391 0 FreeSans 400 0 0 0 gpio_analog_sel[2] +flabel metal3 s 675407 200321 675863 200391 0 FreeSans 400 0 0 0 gpio_analog_sel[2] port 507 nsew -flabel metal3 s 675407 197285 675887 197355 0 FreeSans 400 0 0 0 gpio_analog_pol[2] +flabel metal3 s 675407 197285 675863 197355 0 FreeSans 400 0 0 0 gpio_analog_pol[2] port 551 nsew -flabel metal3 s 675407 195997 675887 196067 0 FreeSans 400 0 0 0 gpio_analog_en[2] +flabel metal3 s 675407 195997 675863 196067 0 FreeSans 400 0 0 0 gpio_analog_en[2] port 463 nsew -flabel metal3 s 675407 194801 675887 194871 0 FreeSans 400 0 0 0 gpio_dm1[2] +flabel metal3 s 675407 194801 675863 194871 0 FreeSans 400 0 0 0 gpio_dm1[2] port 639 nsew -flabel metal3 s 675407 191121 675887 191191 0 FreeSans 400 0 0 0 gpio_in[2] +flabel metal3 s 675407 191121 675863 191191 0 FreeSans 400 0 0 0 gpio_in[2] port 727 nsew -flabel metal3 s 675407 192961 675887 193031 0 FreeSans 400 0 0 0 gpio_slow_sel[2] +flabel metal3 s 675407 192961 675863 193031 0 FreeSans 400 0 0 0 gpio_slow_sel[2] port 375 nsew -flabel metal3 675407 160841 675887 160911 0 FreeSans 400 0 0 0 gpio_in_h[1] +flabel metal3 675407 160841 675863 160911 0 FreeSans 400 0 0 0 gpio_in_h[1] port 772 nsew -flabel metal3 s 675407 159001 675887 159071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] +flabel metal3 s 675407 159001 675863 159071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] port 332 nsew -flabel metal3 s 675407 157161 675887 157231 0 FreeSans 400 0 0 0 gpio_out[1] +flabel metal3 s 675407 157161 675863 157231 0 FreeSans 400 0 0 0 gpio_out[1] port 156 nsew -flabel metal3 s 675407 160289 675887 160359 0 FreeSans 400 0 0 0 gpio_oeb[1] +flabel metal3 s 675407 160289 675863 160359 0 FreeSans 400 0 0 0 gpio_oeb[1] port 200 nsew -flabel metal3 s 675407 152837 675887 152907 0 FreeSans 400 0 0 0 gpio_inp_dis[1] +flabel metal3 s 675407 152837 675863 152907 0 FreeSans 400 0 0 0 gpio_inp_dis[1] port 244 nsew -flabel metal3 s 675407 159645 675887 159715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] +flabel metal3 s 675407 159645 675863 159715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] port 288 nsew -flabel metal3 s 675407 156609 675887 156679 0 FreeSans 400 0 0 0 gpio_holdover[1] +flabel metal3 s 675407 156609 675863 156679 0 FreeSans 400 0 0 0 gpio_holdover[1] port 420 nsew -flabel metal3 s 675407 155965 675887 156035 0 FreeSans 400 0 0 0 gpio_dm2[1] +flabel metal3 s 675407 155965 675863 156035 0 FreeSans 400 0 0 0 gpio_dm2[1] port 684 nsew -flabel metal3 s 675407 151641 675887 151711 0 FreeSans 400 0 0 0 gpio_dm0[1] +flabel metal3 s 675407 151641 675863 151711 0 FreeSans 400 0 0 0 gpio_dm0[1] port 596 nsew -flabel metal3 s 675407 155321 675887 155391 0 FreeSans 400 0 0 0 gpio_analog_sel[1] +flabel metal3 s 675407 155321 675863 155391 0 FreeSans 400 0 0 0 gpio_analog_sel[1] port 508 nsew -flabel metal3 s 675407 152285 675887 152355 0 FreeSans 400 0 0 0 gpio_analog_pol[1] +flabel metal3 s 675407 152285 675863 152355 0 FreeSans 400 0 0 0 gpio_analog_pol[1] port 552 nsew -flabel metal3 s 675407 150997 675887 151067 0 FreeSans 400 0 0 0 gpio_analog_en[1] +flabel metal3 s 675407 150997 675863 151067 0 FreeSans 400 0 0 0 gpio_analog_en[1] port 464 nsew -flabel metal3 s 675407 149801 675887 149871 0 FreeSans 400 0 0 0 gpio_dm1[1] +flabel metal3 s 675407 149801 675863 149871 0 FreeSans 400 0 0 0 gpio_dm1[1] port 640 nsew -flabel metal3 s 675407 147961 675887 148031 0 FreeSans 400 0 0 0 gpio_slow_sel[1] +flabel metal3 s 675407 147961 675863 148031 0 FreeSans 400 0 0 0 gpio_slow_sel[1] port 376 nsew -flabel metal3 s 675407 146121 675887 146191 0 FreeSans 400 0 0 0 gpio_in[1] +flabel metal3 s 675407 146121 675863 146191 0 FreeSans 400 0 0 0 gpio_in[1] port 728 nsew -flabel metal3 675407 969143 675727 969205 0 FreeSans 400 0 0 0 gpio_loopback_one[14] +flabel metal3 675407 969143 675863 969205 0 FreeSans 400 0 0 0 gpio_loopback_one[14] port 847 nsew -flabel metal3 675407 879143 675727 879205 0 FreeSans 400 0 0 0 gpio_loopback_one[13] +flabel metal3 675407 879143 675863 879205 0 FreeSans 400 0 0 0 gpio_loopback_one[13] port 848 nsew -flabel metal3 675407 792143 675727 792205 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] +flabel metal3 675407 792143 675863 792205 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] port 805 nsew -flabel metal3 675407 790143 675727 790205 0 FreeSans 400 0 0 0 gpio_loopback_one[12] +flabel metal3 675407 790143 675863 790205 0 FreeSans 400 0 0 0 gpio_loopback_one[12] port 849 nsew -flabel metal3 675407 747143 675727 747205 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] +flabel metal3 675407 747143 675863 747205 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] port 806 nsew -flabel metal3 675407 745143 675727 745205 0 FreeSans 400 0 0 0 gpio_loopback_one[11] +flabel metal3 675407 745143 675863 745205 0 FreeSans 400 0 0 0 gpio_loopback_one[11] port 850 nsew -flabel metal3 675407 702143 675727 702205 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] +flabel metal3 675407 702143 675863 702205 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] port 807 nsew -flabel metal3 675407 700143 675727 700205 0 FreeSans 400 0 0 0 gpio_loopback_one[10] +flabel metal3 675407 700143 675863 700205 0 FreeSans 400 0 0 0 gpio_loopback_one[10] port 851 nsew -flabel metal3 675407 657143 675727 657205 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] +flabel metal3 675407 657143 675863 657205 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] port 808 nsew -flabel metal3 675407 655143 675727 655205 0 FreeSans 400 0 0 0 gpio_loopback_one[9] +flabel metal3 675407 655143 675863 655205 0 FreeSans 400 0 0 0 gpio_loopback_one[9] port 852 nsew -flabel metal3 675407 612143 675727 612205 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] +flabel metal3 675407 612143 675863 612205 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] port 809 nsew -flabel metal3 675407 610143 675727 610205 0 FreeSans 400 0 0 0 gpio_loopback_one[8] +flabel metal3 675407 610143 675863 610205 0 FreeSans 400 0 0 0 gpio_loopback_one[8] port 853 nsew -flabel metal3 675407 567143 675727 567205 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] +flabel metal3 675407 567143 675863 567205 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] port 810 nsew -flabel metal3 675407 565142 675727 565204 0 FreeSans 400 0 0 0 gpio_loopback_one[7] +flabel metal3 675407 565142 675863 565204 0 FreeSans 400 0 0 0 gpio_loopback_one[7] port 854 nsew -flabel metal3 675407 390143 675727 390205 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] +flabel metal3 675407 390143 675863 390205 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] port 811 nsew -flabel metal3 675407 345143 675727 345205 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] +flabel metal3 675407 345143 675863 345205 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] port 812 nsew -flabel metal3 675407 300143 675727 300205 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] +flabel metal3 675407 300143 675863 300205 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] port 813 nsew -flabel metal3 675407 255143 675727 255205 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] +flabel metal3 675407 255143 675863 255205 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] port 814 nsew -flabel metal3 675407 210143 675727 210205 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] +flabel metal3 675407 210143 675863 210205 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] port 815 nsew -flabel metal3 675407 165143 675727 165205 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] +flabel metal3 675407 165143 675863 165205 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] port 816 nsew -flabel metal3 s 675407 917699 675907 922499 0 FreeSans 3200 0 0 0 vccd1 +flabel metal3 s 675407 917699 675863 922499 0 FreeSans 3200 0 0 0 vccd1 port 28 nsew -flabel metal3 s 675407 912747 675907 917409 0 FreeSans 3200 0 0 0 vssd1 +flabel metal3 s 675407 912747 675863 917409 0 FreeSans 3200 0 0 0 vssd1 port 30 nsew -flabel metal3 s 675407 907659 675907 912449 0 FreeSans 3200 0 0 0 vccd1 +flabel metal3 s 675407 907659 675863 912449 0 FreeSans 3200 0 0 0 vccd1 port 28 nsew -flabel metal3 s 675407 818543 675907 823323 0 FreeSans 3200 0 0 0 vdda1 +flabel metal3 s 675407 818543 675863 823323 0 FreeSans 3200 0 0 0 vdda1 port 24 nsew -flabel metal3 s 675407 503941 675907 508721 0 FreeSans 3200 0 0 0 vdda1 +flabel metal3 s 675407 503941 675863 508721 0 FreeSans 3200 0 0 0 vdda1 port 24 nsew -flabel metal3 675407 469899 675907 474699 0 FreeSans 3200 90 0 0 vssd1 +flabel metal3 675407 469899 675863 474699 0 FreeSans 3200 90 0 0 vssd1 port 30 nsew -flabel metal3 675407 464947 675907 469609 0 FreeSans 3200 90 0 0 vccd1 +flabel metal3 675407 464947 675863 469609 0 FreeSans 3200 90 0 0 vccd1 port 28 nsew -flabel metal3 675407 459859 675907 464649 0 FreeSans 3200 90 0 0 vssd1 +flabel metal3 675407 459859 675863 464649 0 FreeSans 3200 90 0 0 vssd1 port 30 nsew -flabel metal3 s 675407 415743 675907 420523 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 675407 415743 675863 420523 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 622943 41693 627723 42193 0 FreeSans 3200 0 0 0 vdda +flabel metal3 622943 41737 627723 42193 0 FreeSans 3200 0 0 0 vdda port 22 nsew -flabel metal3 569143 41693 573923 42193 0 FreeSans 3200 0 0 0 vssio +flabel metal3 569143 41737 573923 42193 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 251301 41693 256101 42193 0 FreeSans 3200 0 0 0 vssd +flabel metal3 251301 41737 256101 42193 0 FreeSans 3200 0 0 0 vssd port 21 nsew -flabel metal3 241421 41693 246051 42193 0 FreeSans 3200 0 0 0 vssd +flabel metal3 241421 41737 246051 42193 0 FreeSans 3200 0 0 0 vssd port 21 nsew -flabel metal3 78943 41693 83723 42193 0 FreeSans 3200 0 0 0 vssa +flabel metal3 78943 41737 83723 42193 0 FreeSans 3200 0 0 0 vssa port 23 nsew -flabel metal3 41693 68099 42193 72899 0 FreeSans 3200 90 0 0 vccd +flabel metal3 41737 68099 42193 72899 0 FreeSans 3200 90 0 0 vccd port 20 nsew -flabel metal3 41693 78151 42193 82941 0 FreeSans 3200 90 0 0 vccd +flabel metal3 41737 78151 42193 82941 0 FreeSans 3200 90 0 0 vccd port 20 nsew -flabel metal3 41693 120277 42193 125057 0 FreeSans 3200 90 0 0 vddio +flabel metal3 41737 120277 42193 125057 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 41693 440899 42193 445699 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 41737 440899 42193 445699 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 41693 445999 42193 450651 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 41737 445999 42193 450651 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 41693 450951 42193 455741 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 41737 450951 42193 455741 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 41693 493077 42193 497857 0 FreeSans 3200 90 0 0 vdda2 +flabel metal3 41737 493077 42193 497857 0 FreeSans 3200 90 0 0 vdda2 port 25 nsew -flabel metal3 41693 837679 42193 842459 0 FreeSans 3200 90 0 0 vssa2 +flabel metal3 41737 837679 42193 842459 0 FreeSans 3200 90 0 0 vssa2 port 27 nsew -flabel metal3 41693 879879 42193 884659 0 FreeSans 3200 90 0 0 vddio +flabel metal3 41737 879879 42193 884659 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel space 41693 912101 42193 916901 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 41737 912101 42193 916901 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 41693 917191 42193 921853 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 41737 917191 42193 921853 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 41693 922151 42193 926941 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 41737 922151 42193 926941 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 s 41713 799409 42193 799479 0 FreeSans 400 0 0 0 gpio_in[25] +flabel metal3 s 41737 799409 42193 799479 0 FreeSans 400 0 0 0 gpio_in[25] port 704 nsew -flabel metal3 s 41713 797569 42193 797639 0 FreeSans 400 0 0 0 gpio_slow_sel[25] +flabel metal3 s 41737 797569 42193 797639 0 FreeSans 400 0 0 0 gpio_slow_sel[25] port 352 nsew -flabel metal3 s 41713 795729 42193 795799 0 FreeSans 400 0 0 0 gpio_dm1[25] +flabel metal3 s 41737 795729 42193 795799 0 FreeSans 400 0 0 0 gpio_dm1[25] port 616 nsew -flabel metal3 s 41713 784689 42193 784759 0 FreeSans 400 0 0 0 gpio_in_h[25] +flabel metal3 s 41737 784689 42193 784759 0 FreeSans 400 0 0 0 gpio_in_h[25] port 748 nsew -flabel metal3 s 41713 786529 42193 786599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] +flabel metal3 s 41737 786529 42193 786599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] port 308 nsew -flabel metal3 s 41713 788369 42193 788439 0 FreeSans 400 0 0 0 gpio_out[25] +flabel metal3 s 41737 788369 42193 788439 0 FreeSans 400 0 0 0 gpio_out[25] port 132 nsew -flabel metal3 s 41713 785241 42193 785311 0 FreeSans 400 0 0 0 gpio_oeb[25] +flabel metal3 s 41737 785241 42193 785311 0 FreeSans 400 0 0 0 gpio_oeb[25] port 176 nsew -flabel metal3 s 41713 792693 42193 792763 0 FreeSans 400 0 0 0 gpio_inp_dis[25] +flabel metal3 s 41737 792693 42193 792763 0 FreeSans 400 0 0 0 gpio_inp_dis[25] port 220 nsew -flabel metal3 s 41713 785885 42193 785955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] +flabel metal3 s 41737 785885 42193 785955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] port 264 nsew -flabel metal3 s 41713 788921 42193 788991 0 FreeSans 400 0 0 0 gpio_holdover[25] +flabel metal3 s 41737 788921 42193 788991 0 FreeSans 400 0 0 0 gpio_holdover[25] port 396 nsew -flabel metal3 s 41713 789565 42193 789635 0 FreeSans 400 0 0 0 gpio_dm2[25] +flabel metal3 s 41737 789565 42193 789635 0 FreeSans 400 0 0 0 gpio_dm2[25] port 660 nsew -flabel metal3 s 41713 793889 42193 793959 0 FreeSans 400 0 0 0 gpio_dm0[25] +flabel metal3 s 41737 793889 42193 793959 0 FreeSans 400 0 0 0 gpio_dm0[25] port 572 nsew -flabel metal3 s 41713 790209 42193 790279 0 FreeSans 400 0 0 0 gpio_analog_sel[25] +flabel metal3 s 41737 790209 42193 790279 0 FreeSans 400 0 0 0 gpio_analog_sel[25] port 484 nsew -flabel metal3 s 41713 793245 42193 793315 0 FreeSans 400 0 0 0 gpio_analog_pol[25] +flabel metal3 s 41737 793245 42193 793315 0 FreeSans 400 0 0 0 gpio_analog_pol[25] port 528 nsew -flabel metal3 s 41713 794533 42193 794603 0 FreeSans 400 0 0 0 gpio_analog_en[25] +flabel metal3 s 41737 794533 42193 794603 0 FreeSans 400 0 0 0 gpio_analog_en[25] port 440 nsew -flabel metal3 s 41713 756209 42193 756279 0 FreeSans 400 0 0 0 gpio_in[26] +flabel metal3 s 41737 756209 42193 756279 0 FreeSans 400 0 0 0 gpio_in[26] port 703 nsew -flabel metal3 s 41713 754369 42193 754439 0 FreeSans 400 0 0 0 gpio_slow_sel[26] +flabel metal3 s 41737 754369 42193 754439 0 FreeSans 400 0 0 0 gpio_slow_sel[26] port 351 nsew -flabel metal3 s 41713 752529 42193 752599 0 FreeSans 400 0 0 0 gpio_dm1[26] +flabel metal3 s 41737 752529 42193 752599 0 FreeSans 400 0 0 0 gpio_dm1[26] port 615 nsew -flabel metal3 s 41713 741489 42193 741559 0 FreeSans 400 0 0 0 gpio_in_h[26] +flabel metal3 s 41737 741489 42193 741559 0 FreeSans 400 0 0 0 gpio_in_h[26] port 747 nsew -flabel metal3 s 41713 743329 42193 743399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] +flabel metal3 s 41737 743329 42193 743399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] port 307 nsew -flabel metal3 s 41713 745169 42193 745239 0 FreeSans 400 0 0 0 gpio_out[26] +flabel metal3 s 41737 745169 42193 745239 0 FreeSans 400 0 0 0 gpio_out[26] port 131 nsew -flabel metal3 s 41713 742041 42193 742111 0 FreeSans 400 0 0 0 gpio_oeb[26] +flabel metal3 s 41737 742041 42193 742111 0 FreeSans 400 0 0 0 gpio_oeb[26] port 175 nsew -flabel metal3 s 41713 749493 42193 749563 0 FreeSans 400 0 0 0 gpio_inp_dis[26] +flabel metal3 s 41737 749493 42193 749563 0 FreeSans 400 0 0 0 gpio_inp_dis[26] port 219 nsew -flabel metal3 s 41713 742685 42193 742755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] +flabel metal3 s 41737 742685 42193 742755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] port 263 nsew -flabel metal3 s 41713 745721 42193 745791 0 FreeSans 400 0 0 0 gpio_holdover[26] +flabel metal3 s 41737 745721 42193 745791 0 FreeSans 400 0 0 0 gpio_holdover[26] port 395 nsew -flabel metal3 s 41713 746365 42193 746435 0 FreeSans 400 0 0 0 gpio_dm2[26] +flabel metal3 s 41737 746365 42193 746435 0 FreeSans 400 0 0 0 gpio_dm2[26] port 659 nsew -flabel metal3 s 41713 750689 42193 750759 0 FreeSans 400 0 0 0 gpio_dm0[26] +flabel metal3 s 41737 750689 42193 750759 0 FreeSans 400 0 0 0 gpio_dm0[26] port 571 nsew -flabel metal3 s 41713 747009 42193 747079 0 FreeSans 400 0 0 0 gpio_analog_sel[26] +flabel metal3 s 41737 747009 42193 747079 0 FreeSans 400 0 0 0 gpio_analog_sel[26] port 483 nsew -flabel metal3 s 41713 750045 42193 750115 0 FreeSans 400 0 0 0 gpio_analog_pol[26] +flabel metal3 s 41737 750045 42193 750115 0 FreeSans 400 0 0 0 gpio_analog_pol[26] port 527 nsew -flabel metal3 s 41713 751333 42193 751403 0 FreeSans 400 0 0 0 gpio_analog_en[26] +flabel metal3 s 41737 751333 42193 751403 0 FreeSans 400 0 0 0 gpio_analog_en[26] port 439 nsew -flabel metal3 s 41713 713009 42193 713079 0 FreeSans 400 0 0 0 gpio_in[27] +flabel metal3 s 41737 713009 42193 713079 0 FreeSans 400 0 0 0 gpio_in[27] port 702 nsew -flabel metal3 s 41713 711169 42193 711239 0 FreeSans 400 0 0 0 gpio_slow_sel[27] +flabel metal3 s 41737 711169 42193 711239 0 FreeSans 400 0 0 0 gpio_slow_sel[27] port 350 nsew -flabel metal3 s 41713 709329 42193 709399 0 FreeSans 400 0 0 0 gpio_dm1[27] +flabel metal3 s 41737 709329 42193 709399 0 FreeSans 400 0 0 0 gpio_dm1[27] port 614 nsew -flabel metal3 s 41713 698289 42193 698359 0 FreeSans 400 0 0 0 gpio_in_h[27] +flabel metal3 s 41737 698289 42193 698359 0 FreeSans 400 0 0 0 gpio_in_h[27] port 746 nsew -flabel metal3 s 41713 700129 42193 700199 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] +flabel metal3 s 41737 700129 42193 700199 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] port 306 nsew -flabel metal3 s 41713 701969 42193 702039 0 FreeSans 400 0 0 0 gpio_out[27] +flabel metal3 s 41737 701969 42193 702039 0 FreeSans 400 0 0 0 gpio_out[27] port 130 nsew -flabel metal3 s 41713 698841 42193 698911 0 FreeSans 400 0 0 0 gpio_oeb[27] +flabel metal3 s 41737 698841 42193 698911 0 FreeSans 400 0 0 0 gpio_oeb[27] port 174 nsew -flabel metal3 s 41713 706293 42193 706363 0 FreeSans 400 0 0 0 gpio_inp_dis[27] +flabel metal3 s 41737 706293 42193 706363 0 FreeSans 400 0 0 0 gpio_inp_dis[27] port 218 nsew -flabel metal3 s 41713 699485 42193 699555 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] +flabel metal3 s 41737 699485 42193 699555 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] port 262 nsew -flabel metal3 s 41713 702521 42193 702591 0 FreeSans 400 0 0 0 gpio_holdover[27] +flabel metal3 s 41737 702521 42193 702591 0 FreeSans 400 0 0 0 gpio_holdover[27] port 394 nsew -flabel metal3 s 41713 703165 42193 703235 0 FreeSans 400 0 0 0 gpio_dm2[27] +flabel metal3 s 41737 703165 42193 703235 0 FreeSans 400 0 0 0 gpio_dm2[27] port 658 nsew -flabel metal3 s 41713 707489 42193 707559 0 FreeSans 400 0 0 0 gpio_dm0[27] +flabel metal3 s 41737 707489 42193 707559 0 FreeSans 400 0 0 0 gpio_dm0[27] port 570 nsew -flabel metal3 s 41713 703809 42193 703879 0 FreeSans 400 0 0 0 gpio_analog_sel[27] +flabel metal3 s 41737 703809 42193 703879 0 FreeSans 400 0 0 0 gpio_analog_sel[27] port 482 nsew -flabel metal3 s 41713 706845 42193 706915 0 FreeSans 400 0 0 0 gpio_analog_pol[27] +flabel metal3 s 41737 706845 42193 706915 0 FreeSans 400 0 0 0 gpio_analog_pol[27] port 526 nsew -flabel metal3 s 41713 708133 42193 708203 0 FreeSans 400 0 0 0 gpio_analog_en[27] +flabel metal3 s 41737 708133 42193 708203 0 FreeSans 400 0 0 0 gpio_analog_en[27] port 438 nsew -flabel metal3 s 41713 669809 42193 669879 0 FreeSans 400 0 0 0 gpio_in[28] +flabel metal3 s 41737 669809 42193 669879 0 FreeSans 400 0 0 0 gpio_in[28] port 701 nsew -flabel metal3 s 41713 667969 42193 668039 0 FreeSans 400 0 0 0 gpio_slow_sel[28] +flabel metal3 s 41737 667969 42193 668039 0 FreeSans 400 0 0 0 gpio_slow_sel[28] port 349 nsew -flabel metal3 s 41713 666129 42193 666199 0 FreeSans 400 0 0 0 gpio_dm1[28] +flabel metal3 s 41737 666129 42193 666199 0 FreeSans 400 0 0 0 gpio_dm1[28] port 613 nsew -flabel metal3 s 41713 655089 42193 655159 0 FreeSans 400 0 0 0 gpio_in_h[28] +flabel metal3 s 41737 655089 42193 655159 0 FreeSans 400 0 0 0 gpio_in_h[28] port 745 nsew -flabel metal3 s 41713 656929 42193 656999 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] +flabel metal3 s 41737 656929 42193 656999 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] port 305 nsew -flabel metal3 s 41713 658769 42193 658839 0 FreeSans 400 0 0 0 gpio_out[28] +flabel metal3 s 41737 658769 42193 658839 0 FreeSans 400 0 0 0 gpio_out[28] port 129 nsew -flabel metal3 s 41713 655641 42193 655711 0 FreeSans 400 0 0 0 gpio_oeb[28] +flabel metal3 s 41737 655641 42193 655711 0 FreeSans 400 0 0 0 gpio_oeb[28] port 173 nsew -flabel metal3 s 41713 663093 42193 663163 0 FreeSans 400 0 0 0 gpio_inp_dis[28] +flabel metal3 s 41737 663093 42193 663163 0 FreeSans 400 0 0 0 gpio_inp_dis[28] port 217 nsew -flabel metal3 s 41713 656285 42193 656355 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] +flabel metal3 s 41737 656285 42193 656355 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] port 261 nsew -flabel metal3 s 41713 659321 42193 659391 0 FreeSans 400 0 0 0 gpio_holdover[28] +flabel metal3 s 41737 659321 42193 659391 0 FreeSans 400 0 0 0 gpio_holdover[28] port 393 nsew -flabel metal3 s 41713 659965 42193 660035 0 FreeSans 400 0 0 0 gpio_dm2[28] +flabel metal3 s 41737 659965 42193 660035 0 FreeSans 400 0 0 0 gpio_dm2[28] port 657 nsew -flabel metal3 s 41713 664289 42193 664359 0 FreeSans 400 0 0 0 gpio_dm0[28] +flabel metal3 s 41737 664289 42193 664359 0 FreeSans 400 0 0 0 gpio_dm0[28] port 569 nsew -flabel metal3 s 41713 660609 42193 660679 0 FreeSans 400 0 0 0 gpio_analog_sel[28] +flabel metal3 s 41737 660609 42193 660679 0 FreeSans 400 0 0 0 gpio_analog_sel[28] port 481 nsew -flabel metal3 s 41713 663645 42193 663715 0 FreeSans 400 0 0 0 gpio_analog_pol[28] +flabel metal3 s 41737 663645 42193 663715 0 FreeSans 400 0 0 0 gpio_analog_pol[28] port 525 nsew -flabel metal3 s 41713 664933 42193 665003 0 FreeSans 400 0 0 0 gpio_analog_en[28] +flabel metal3 s 41737 664933 42193 665003 0 FreeSans 400 0 0 0 gpio_analog_en[28] port 437 nsew -flabel metal3 s 41713 626609 42193 626679 0 FreeSans 400 0 0 0 gpio_in[29] +flabel metal3 s 41737 626609 42193 626679 0 FreeSans 400 0 0 0 gpio_in[29] port 700 nsew -flabel metal3 s 41713 624769 42193 624839 0 FreeSans 400 0 0 0 gpio_slow_sel[29] +flabel metal3 s 41737 624769 42193 624839 0 FreeSans 400 0 0 0 gpio_slow_sel[29] port 348 nsew -flabel metal3 s 41713 622929 42193 622999 0 FreeSans 400 0 0 0 gpio_dm1[29] +flabel metal3 s 41737 622929 42193 622999 0 FreeSans 400 0 0 0 gpio_dm1[29] port 612 nsew -flabel metal3 s 41713 611889 42193 611959 0 FreeSans 400 0 0 0 gpio_in_h[29] +flabel metal3 s 41737 611889 42193 611959 0 FreeSans 400 0 0 0 gpio_in_h[29] port 744 nsew -flabel metal3 s 41713 613729 42193 613799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] +flabel metal3 s 41737 613729 42193 613799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] port 304 nsew -flabel metal3 s 41713 615569 42193 615639 0 FreeSans 400 0 0 0 gpio_out[29] +flabel metal3 s 41737 615569 42193 615639 0 FreeSans 400 0 0 0 gpio_out[29] port 128 nsew -flabel metal3 s 41713 612441 42193 612511 0 FreeSans 400 0 0 0 gpio_oeb[29] +flabel metal3 s 41737 612441 42193 612511 0 FreeSans 400 0 0 0 gpio_oeb[29] port 172 nsew -flabel metal3 s 41713 619893 42193 619963 0 FreeSans 400 0 0 0 gpio_inp_dis[29] +flabel metal3 s 41737 619893 42193 619963 0 FreeSans 400 0 0 0 gpio_inp_dis[29] port 216 nsew -flabel metal3 s 41713 613085 42193 613155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] +flabel metal3 s 41737 613085 42193 613155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] port 260 nsew -flabel metal3 s 41713 616121 42193 616191 0 FreeSans 400 0 0 0 gpio_holdover[29] +flabel metal3 s 41737 616121 42193 616191 0 FreeSans 400 0 0 0 gpio_holdover[29] port 392 nsew -flabel metal3 s 41713 616765 42193 616835 0 FreeSans 400 0 0 0 gpio_dm2[29] +flabel metal3 s 41737 616765 42193 616835 0 FreeSans 400 0 0 0 gpio_dm2[29] port 656 nsew -flabel metal3 s 41713 621089 42193 621159 0 FreeSans 400 0 0 0 gpio_dm0[29] +flabel metal3 s 41737 621089 42193 621159 0 FreeSans 400 0 0 0 gpio_dm0[29] port 568 nsew -flabel metal3 s 41713 617409 42193 617479 0 FreeSans 400 0 0 0 gpio_analog_sel[29] +flabel metal3 s 41737 617409 42193 617479 0 FreeSans 400 0 0 0 gpio_analog_sel[29] port 480 nsew -flabel metal3 s 41713 620445 42193 620515 0 FreeSans 400 0 0 0 gpio_analog_pol[29] +flabel metal3 s 41737 620445 42193 620515 0 FreeSans 400 0 0 0 gpio_analog_pol[29] port 524 nsew -flabel metal3 s 41713 621733 42193 621803 0 FreeSans 400 0 0 0 gpio_analog_en[29] +flabel metal3 s 41737 621733 42193 621803 0 FreeSans 400 0 0 0 gpio_analog_en[29] port 436 nsew -flabel metal3 s 41713 583409 42193 583479 0 FreeSans 400 0 0 0 gpio_in[30] +flabel metal3 s 41737 583409 42193 583479 0 FreeSans 400 0 0 0 gpio_in[30] port 699 nsew -flabel metal3 s 41713 581569 42193 581639 0 FreeSans 400 0 0 0 gpio_slow_sel[30] +flabel metal3 s 41737 581569 42193 581639 0 FreeSans 400 0 0 0 gpio_slow_sel[30] port 347 nsew -flabel metal3 s 41713 579729 42193 579799 0 FreeSans 400 0 0 0 gpio_dm1[30] +flabel metal3 s 41737 579729 42193 579799 0 FreeSans 400 0 0 0 gpio_dm1[30] port 611 nsew -flabel metal3 s 41713 568689 42193 568759 0 FreeSans 400 0 0 0 gpio_in_h[30] +flabel metal3 s 41737 568689 42193 568759 0 FreeSans 400 0 0 0 gpio_in_h[30] port 743 nsew -flabel metal3 s 41713 574209 42193 574279 0 FreeSans 400 0 0 0 gpio_analog_sel[30] +flabel metal3 s 41737 574209 42193 574279 0 FreeSans 400 0 0 0 gpio_analog_sel[30] port 479 nsew -flabel metal3 s 41713 577245 42193 577315 0 FreeSans 400 0 0 0 gpio_analog_pol[30] +flabel metal3 s 41737 577245 42193 577315 0 FreeSans 400 0 0 0 gpio_analog_pol[30] port 523 nsew -flabel metal3 s 41713 578533 42193 578603 0 FreeSans 400 0 0 0 gpio_analog_en[30] +flabel metal3 s 41737 578533 42193 578603 0 FreeSans 400 0 0 0 gpio_analog_en[30] port 435 nsew -flabel metal3 s 41713 570529 42193 570599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] +flabel metal3 s 41737 570529 42193 570599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] port 303 nsew -flabel metal3 s 41713 572369 42193 572439 0 FreeSans 400 0 0 0 gpio_out[30] +flabel metal3 s 41737 572369 42193 572439 0 FreeSans 400 0 0 0 gpio_out[30] port 127 nsew -flabel metal3 s 41713 569241 42193 569311 0 FreeSans 400 0 0 0 gpio_oeb[30] +flabel metal3 s 41737 569241 42193 569311 0 FreeSans 400 0 0 0 gpio_oeb[30] port 171 nsew -flabel metal3 s 41713 576693 42193 576763 0 FreeSans 400 0 0 0 gpio_inp_dis[30] +flabel metal3 s 41737 576693 42193 576763 0 FreeSans 400 0 0 0 gpio_inp_dis[30] port 215 nsew -flabel metal3 s 41713 569885 42193 569955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] +flabel metal3 s 41737 569885 42193 569955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] port 259 nsew -flabel metal3 s 41713 572921 42193 572991 0 FreeSans 400 0 0 0 gpio_holdover[30] +flabel metal3 s 41737 572921 42193 572991 0 FreeSans 400 0 0 0 gpio_holdover[30] port 391 nsew -flabel metal3 s 41713 573565 42193 573635 0 FreeSans 400 0 0 0 gpio_dm2[30] +flabel metal3 s 41737 573565 42193 573635 0 FreeSans 400 0 0 0 gpio_dm2[30] port 655 nsew -flabel metal3 s 41713 577889 42193 577959 0 FreeSans 400 0 0 0 gpio_dm0[30] +flabel metal3 s 41737 577889 42193 577959 0 FreeSans 400 0 0 0 gpio_dm0[30] port 567 nsew -flabel metal3 s 41713 540209 42193 540279 0 FreeSans 400 0 0 0 gpio_in[31] +flabel metal3 s 41737 540209 42193 540279 0 FreeSans 400 0 0 0 gpio_in[31] port 698 nsew -flabel metal3 s 41713 538369 42193 538439 0 FreeSans 400 0 0 0 gpio_slow_sel[31] +flabel metal3 s 41737 538369 42193 538439 0 FreeSans 400 0 0 0 gpio_slow_sel[31] port 346 nsew -flabel metal3 s 41713 536529 42193 536599 0 FreeSans 400 0 0 0 gpio_dm1[31] +flabel metal3 s 41737 536529 42193 536599 0 FreeSans 400 0 0 0 gpio_dm1[31] port 610 nsew -flabel metal3 s 41713 525489 42193 525559 0 FreeSans 400 0 0 0 gpio_in_h[31] +flabel metal3 s 41737 525489 42193 525559 0 FreeSans 400 0 0 0 gpio_in_h[31] port 742 nsew -flabel metal3 s 41713 527329 42193 527399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] +flabel metal3 s 41737 527329 42193 527399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] port 302 nsew -flabel metal3 s 41713 529169 42193 529239 0 FreeSans 400 0 0 0 gpio_out[31] +flabel metal3 s 41737 529169 42193 529239 0 FreeSans 400 0 0 0 gpio_out[31] port 126 nsew -flabel metal3 s 41713 526041 42193 526111 0 FreeSans 400 0 0 0 gpio_oeb[31] +flabel metal3 s 41737 526041 42193 526111 0 FreeSans 400 0 0 0 gpio_oeb[31] port 170 nsew -flabel metal3 s 41713 533493 42193 533563 0 FreeSans 400 0 0 0 gpio_inp_dis[31] +flabel metal3 s 41737 533493 42193 533563 0 FreeSans 400 0 0 0 gpio_inp_dis[31] port 214 nsew -flabel metal3 s 41713 526685 42193 526755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] +flabel metal3 s 41737 526685 42193 526755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] port 258 nsew -flabel metal3 s 41713 529721 42193 529791 0 FreeSans 400 0 0 0 gpio_holdover[31] +flabel metal3 s 41737 529721 42193 529791 0 FreeSans 400 0 0 0 gpio_holdover[31] port 390 nsew -flabel metal3 s 41713 530365 42193 530435 0 FreeSans 400 0 0 0 gpio_dm2[31] +flabel metal3 s 41737 530365 42193 530435 0 FreeSans 400 0 0 0 gpio_dm2[31] port 654 nsew -flabel metal3 s 41713 534689 42193 534759 0 FreeSans 400 0 0 0 gpio_dm0[31] +flabel metal3 s 41737 534689 42193 534759 0 FreeSans 400 0 0 0 gpio_dm0[31] port 566 nsew -flabel metal3 s 41713 531009 42193 531079 0 FreeSans 400 0 0 0 gpio_analog_sel[31] +flabel metal3 s 41737 531009 42193 531079 0 FreeSans 400 0 0 0 gpio_analog_sel[31] port 478 nsew -flabel metal3 s 41713 534045 42193 534115 0 FreeSans 400 0 0 0 gpio_analog_pol[31] +flabel metal3 s 41737 534045 42193 534115 0 FreeSans 400 0 0 0 gpio_analog_pol[31] port 522 nsew -flabel metal3 s 41713 535333 42193 535403 0 FreeSans 400 0 0 0 gpio_analog_en[31] +flabel metal3 s 41737 535333 42193 535403 0 FreeSans 400 0 0 0 gpio_analog_en[31] port 434 nsew -flabel metal3 s 41713 412609 42193 412679 0 FreeSans 400 0 0 0 gpio_in[32] +flabel metal3 s 41737 412609 42193 412679 0 FreeSans 400 0 0 0 gpio_in[32] port 697 nsew -flabel metal3 s 41713 410769 42193 410839 0 FreeSans 400 0 0 0 gpio_slow_sel[32] +flabel metal3 s 41737 410769 42193 410839 0 FreeSans 400 0 0 0 gpio_slow_sel[32] port 345 nsew -flabel metal3 s 41713 408929 42193 408999 0 FreeSans 400 0 0 0 gpio_dm1[32] +flabel metal3 s 41737 408929 42193 408999 0 FreeSans 400 0 0 0 gpio_dm1[32] port 609 nsew -flabel metal3 s 41713 397889 42193 397959 0 FreeSans 400 0 0 0 gpio_in_h[32] +flabel metal3 s 41737 397889 42193 397959 0 FreeSans 400 0 0 0 gpio_in_h[32] port 741 nsew -flabel metal3 s 41713 399729 42193 399799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] +flabel metal3 s 41737 399729 42193 399799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] port 301 nsew -flabel metal3 s 41713 401569 42193 401639 0 FreeSans 400 0 0 0 gpio_out[32] +flabel metal3 s 41737 401569 42193 401639 0 FreeSans 400 0 0 0 gpio_out[32] port 125 nsew -flabel metal3 s 41713 398441 42193 398511 0 FreeSans 400 0 0 0 gpio_oeb[32] +flabel metal3 s 41737 398441 42193 398511 0 FreeSans 400 0 0 0 gpio_oeb[32] port 169 nsew -flabel metal3 s 41713 405893 42193 405963 0 FreeSans 400 0 0 0 gpio_inp_dis[32] +flabel metal3 s 41737 405893 42193 405963 0 FreeSans 400 0 0 0 gpio_inp_dis[32] port 213 nsew -flabel metal3 s 41713 399085 42193 399155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] +flabel metal3 s 41737 399085 42193 399155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] port 257 nsew -flabel metal3 s 41713 402121 42193 402191 0 FreeSans 400 0 0 0 gpio_holdover[32] +flabel metal3 s 41737 402121 42193 402191 0 FreeSans 400 0 0 0 gpio_holdover[32] port 389 nsew -flabel metal3 s 41713 402765 42193 402835 0 FreeSans 400 0 0 0 gpio_dm2[32] +flabel metal3 s 41737 402765 42193 402835 0 FreeSans 400 0 0 0 gpio_dm2[32] port 653 nsew -flabel metal3 s 41713 407089 42193 407159 0 FreeSans 400 0 0 0 gpio_dm0[32] +flabel metal3 s 41737 407089 42193 407159 0 FreeSans 400 0 0 0 gpio_dm0[32] port 565 nsew -flabel metal3 s 41713 403409 42193 403479 0 FreeSans 400 0 0 0 gpio_analog_sel[32] +flabel metal3 s 41737 403409 42193 403479 0 FreeSans 400 0 0 0 gpio_analog_sel[32] port 477 nsew -flabel metal3 s 41713 406445 42193 406515 0 FreeSans 400 0 0 0 gpio_analog_pol[32] +flabel metal3 s 41737 406445 42193 406515 0 FreeSans 400 0 0 0 gpio_analog_pol[32] port 521 nsew -flabel metal3 s 41713 407733 42193 407803 0 FreeSans 400 0 0 0 gpio_analog_en[32] +flabel metal3 s 41737 407733 42193 407803 0 FreeSans 400 0 0 0 gpio_analog_en[32] port 433 nsew -flabel metal3 s 41713 369409 42193 369479 0 FreeSans 400 0 0 0 gpio_in[33] +flabel metal3 s 41737 369409 42193 369479 0 FreeSans 400 0 0 0 gpio_in[33] port 696 nsew -flabel metal3 s 41713 367569 42193 367639 0 FreeSans 400 0 0 0 gpio_slow_sel[33] +flabel metal3 s 41737 367569 42193 367639 0 FreeSans 400 0 0 0 gpio_slow_sel[33] port 344 nsew -flabel metal3 s 41713 365729 42193 365799 0 FreeSans 400 0 0 0 gpio_dm1[33] +flabel metal3 s 41737 365729 42193 365799 0 FreeSans 400 0 0 0 gpio_dm1[33] port 608 nsew -flabel metal3 s 41713 354689 42193 354759 0 FreeSans 400 0 0 0 gpio_in_h[33] +flabel metal3 s 41737 354689 42193 354759 0 FreeSans 400 0 0 0 gpio_in_h[33] port 740 nsew -flabel metal3 s 41713 356529 42193 356599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] +flabel metal3 s 41737 356529 42193 356599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] port 300 nsew -flabel metal3 s 41713 358369 42193 358439 0 FreeSans 400 0 0 0 gpio_out[33] +flabel metal3 s 41737 358369 42193 358439 0 FreeSans 400 0 0 0 gpio_out[33] port 124 nsew -flabel metal3 s 41713 355241 42193 355311 0 FreeSans 400 0 0 0 gpio_oeb[33] +flabel metal3 s 41737 355241 42193 355311 0 FreeSans 400 0 0 0 gpio_oeb[33] port 168 nsew -flabel metal3 s 41713 362693 42193 362763 0 FreeSans 400 0 0 0 gpio_inp_dis[33] +flabel metal3 s 41737 362693 42193 362763 0 FreeSans 400 0 0 0 gpio_inp_dis[33] port 212 nsew -flabel metal3 s 41713 355885 42193 355955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] +flabel metal3 s 41737 355885 42193 355955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] port 256 nsew -flabel metal3 s 41713 358921 42193 358991 0 FreeSans 400 0 0 0 gpio_holdover[33] +flabel metal3 s 41737 358921 42193 358991 0 FreeSans 400 0 0 0 gpio_holdover[33] port 388 nsew -flabel metal3 s 41713 363889 42193 363959 0 FreeSans 400 0 0 0 gpio_dm0[33] +flabel metal3 s 41737 363889 42193 363959 0 FreeSans 400 0 0 0 gpio_dm0[33] port 564 nsew -flabel metal3 s 41713 359565 42193 359635 0 FreeSans 400 0 0 0 gpio_dm2[33] +flabel metal3 s 41737 359565 42193 359635 0 FreeSans 400 0 0 0 gpio_dm2[33] port 652 nsew -flabel metal3 s 41713 360209 42193 360279 0 FreeSans 400 0 0 0 gpio_analog_sel[33] +flabel metal3 s 41737 360209 42193 360279 0 FreeSans 400 0 0 0 gpio_analog_sel[33] port 476 nsew -flabel metal3 s 41713 363245 42193 363315 0 FreeSans 400 0 0 0 gpio_analog_pol[33] +flabel metal3 s 41737 363245 42193 363315 0 FreeSans 400 0 0 0 gpio_analog_pol[33] port 520 nsew -flabel metal3 s 41713 364533 42193 364603 0 FreeSans 400 0 0 0 gpio_analog_en[33] +flabel metal3 s 41737 364533 42193 364603 0 FreeSans 400 0 0 0 gpio_analog_en[33] port 432 nsew -flabel metal3 s 41713 326209 42193 326279 0 FreeSans 400 0 0 0 gpio_in[34] +flabel metal3 s 41737 326209 42193 326279 0 FreeSans 400 0 0 0 gpio_in[34] port 695 nsew -flabel metal3 s 41713 324369 42193 324439 0 FreeSans 400 0 0 0 gpio_slow_sel[34] +flabel metal3 s 41737 324369 42193 324439 0 FreeSans 400 0 0 0 gpio_slow_sel[34] port 343 nsew -flabel metal3 s 41713 322529 42193 322599 0 FreeSans 400 0 0 0 gpio_dm1[34] +flabel metal3 s 41737 322529 42193 322599 0 FreeSans 400 0 0 0 gpio_dm1[34] port 607 nsew -flabel metal3 s 41713 311489 42193 311559 0 FreeSans 400 0 0 0 gpio_in_h[34] +flabel metal3 s 41737 311489 42193 311559 0 FreeSans 400 0 0 0 gpio_in_h[34] port 739 nsew -flabel metal3 s 41713 313329 42193 313399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] +flabel metal3 s 41737 313329 42193 313399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] port 299 nsew -flabel metal3 s 41713 315169 42193 315239 0 FreeSans 400 0 0 0 gpio_out[34] +flabel metal3 s 41737 315169 42193 315239 0 FreeSans 400 0 0 0 gpio_out[34] port 123 nsew -flabel metal3 s 41713 312041 42193 312111 0 FreeSans 400 0 0 0 gpio_oeb[34] +flabel metal3 s 41737 312041 42193 312111 0 FreeSans 400 0 0 0 gpio_oeb[34] port 167 nsew -flabel metal3 s 41713 319493 42193 319563 0 FreeSans 400 0 0 0 gpio_inp_dis[34] +flabel metal3 s 41737 319493 42193 319563 0 FreeSans 400 0 0 0 gpio_inp_dis[34] port 211 nsew -flabel metal3 s 41713 312685 42193 312755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] +flabel metal3 s 41737 312685 42193 312755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] port 255 nsew -flabel metal3 s 41713 315721 42193 315791 0 FreeSans 400 0 0 0 gpio_holdover[34] +flabel metal3 s 41737 315721 42193 315791 0 FreeSans 400 0 0 0 gpio_holdover[34] port 387 nsew -flabel metal3 s 41713 316365 42193 316435 0 FreeSans 400 0 0 0 gpio_dm2[34] +flabel metal3 s 41737 316365 42193 316435 0 FreeSans 400 0 0 0 gpio_dm2[34] port 651 nsew -flabel metal3 s 41713 320689 42193 320759 0 FreeSans 400 0 0 0 gpio_dm0[34] +flabel metal3 s 41737 320689 42193 320759 0 FreeSans 400 0 0 0 gpio_dm0[34] port 563 nsew -flabel metal3 s 41713 317009 42193 317079 0 FreeSans 400 0 0 0 gpio_analog_sel[34] +flabel metal3 s 41737 317009 42193 317079 0 FreeSans 400 0 0 0 gpio_analog_sel[34] port 475 nsew -flabel metal3 s 41713 320045 42193 320115 0 FreeSans 400 0 0 0 gpio_analog_pol[34] +flabel metal3 s 41737 320045 42193 320115 0 FreeSans 400 0 0 0 gpio_analog_pol[34] port 519 nsew -flabel metal3 s 41713 321333 42193 321403 0 FreeSans 400 0 0 0 gpio_analog_en[34] +flabel metal3 s 41737 321333 42193 321403 0 FreeSans 400 0 0 0 gpio_analog_en[34] port 431 nsew -flabel metal3 s 41713 283009 42193 283079 0 FreeSans 400 0 0 0 gpio_in[35] +flabel metal3 s 41737 283009 42193 283079 0 FreeSans 400 0 0 0 gpio_in[35] port 694 nsew -flabel metal3 s 41713 281169 42193 281239 0 FreeSans 400 0 0 0 gpio_slow_sel[35] +flabel metal3 s 41737 281169 42193 281239 0 FreeSans 400 0 0 0 gpio_slow_sel[35] port 342 nsew -flabel metal3 s 41713 279329 42193 279399 0 FreeSans 400 0 0 0 gpio_dm1[35] +flabel metal3 s 41737 279329 42193 279399 0 FreeSans 400 0 0 0 gpio_dm1[35] port 606 nsew -flabel metal3 s 41713 268289 42193 268359 0 FreeSans 400 0 0 0 gpio_in_h[35] +flabel metal3 s 41737 268289 42193 268359 0 FreeSans 400 0 0 0 gpio_in_h[35] port 738 nsew -flabel metal3 s 41713 270129 42193 270199 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] +flabel metal3 s 41737 270129 42193 270199 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] port 298 nsew -flabel metal3 s 41713 271969 42193 272039 0 FreeSans 400 0 0 0 gpio_out[35] +flabel metal3 s 41737 271969 42193 272039 0 FreeSans 400 0 0 0 gpio_out[35] port 122 nsew -flabel metal3 s 41713 268841 42193 268911 0 FreeSans 400 0 0 0 gpio_oeb[35] +flabel metal3 s 41737 268841 42193 268911 0 FreeSans 400 0 0 0 gpio_oeb[35] port 166 nsew -flabel metal3 s 41713 276293 42193 276363 0 FreeSans 400 0 0 0 gpio_inp_dis[35] +flabel metal3 s 41737 276293 42193 276363 0 FreeSans 400 0 0 0 gpio_inp_dis[35] port 210 nsew -flabel metal3 s 41713 269485 42193 269555 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] +flabel metal3 s 41737 269485 42193 269555 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] port 254 nsew -flabel metal3 s 41713 272521 42193 272591 0 FreeSans 400 0 0 0 gpio_holdover[35] +flabel metal3 s 41737 272521 42193 272591 0 FreeSans 400 0 0 0 gpio_holdover[35] port 386 nsew -flabel metal3 s 41713 273165 42193 273235 0 FreeSans 400 0 0 0 gpio_dm2[35] +flabel metal3 s 41737 273165 42193 273235 0 FreeSans 400 0 0 0 gpio_dm2[35] port 650 nsew -flabel metal3 s 41713 277489 42193 277559 0 FreeSans 400 0 0 0 gpio_dm0[35] +flabel metal3 s 41737 277489 42193 277559 0 FreeSans 400 0 0 0 gpio_dm0[35] port 562 nsew -flabel metal3 s 41713 273809 42193 273879 0 FreeSans 400 0 0 0 gpio_analog_sel[35] +flabel metal3 s 41737 273809 42193 273879 0 FreeSans 400 0 0 0 gpio_analog_sel[35] port 474 nsew -flabel metal3 s 41713 276845 42193 276915 0 FreeSans 400 0 0 0 gpio_analog_pol[35] +flabel metal3 s 41737 276845 42193 276915 0 FreeSans 400 0 0 0 gpio_analog_pol[35] port 518 nsew -flabel metal3 s 41713 278133 42193 278203 0 FreeSans 400 0 0 0 gpio_analog_en[35] +flabel metal3 s 41737 278133 42193 278203 0 FreeSans 400 0 0 0 gpio_analog_en[35] port 430 nsew -flabel metal3 s 41713 239809 42193 239879 0 FreeSans 400 0 0 0 gpio_in[36] +flabel metal3 s 41737 239809 42193 239879 0 FreeSans 400 0 0 0 gpio_in[36] port 693 nsew -flabel metal3 s 41713 237969 42193 238039 0 FreeSans 400 0 0 0 gpio_slow_sel[36] +flabel metal3 s 41737 237969 42193 238039 0 FreeSans 400 0 0 0 gpio_slow_sel[36] port 341 nsew -flabel metal3 s 41713 236129 42193 236199 0 FreeSans 400 0 0 0 gpio_dm1[36] +flabel metal3 s 41737 236129 42193 236199 0 FreeSans 400 0 0 0 gpio_dm1[36] port 605 nsew -flabel metal3 s 41713 225089 42193 225159 0 FreeSans 400 0 0 0 gpio_in_h[36] +flabel metal3 s 41737 225089 42193 225159 0 FreeSans 400 0 0 0 gpio_in_h[36] port 737 nsew -flabel metal3 s 41713 234289 42193 234359 0 FreeSans 400 0 0 0 gpio_dm0[36] +flabel metal3 s 41737 234289 42193 234359 0 FreeSans 400 0 0 0 gpio_dm0[36] port 561 nsew -flabel metal3 s 41713 230609 42193 230679 0 FreeSans 400 0 0 0 gpio_analog_sel[36] +flabel metal3 s 41737 230609 42193 230679 0 FreeSans 400 0 0 0 gpio_analog_sel[36] port 473 nsew -flabel metal3 s 41713 233645 42193 233715 0 FreeSans 400 0 0 0 gpio_analog_pol[36] +flabel metal3 s 41737 233645 42193 233715 0 FreeSans 400 0 0 0 gpio_analog_pol[36] port 517 nsew -flabel metal3 s 41713 234933 42193 235003 0 FreeSans 400 0 0 0 gpio_analog_en[36] +flabel metal3 s 41737 234933 42193 235003 0 FreeSans 400 0 0 0 gpio_analog_en[36] port 429 nsew -flabel metal3 s 41713 226929 42193 226999 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] +flabel metal3 s 41737 226929 42193 226999 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] port 297 nsew -flabel metal3 s 41713 228769 42193 228839 0 FreeSans 400 0 0 0 gpio_out[36] +flabel metal3 s 41737 228769 42193 228839 0 FreeSans 400 0 0 0 gpio_out[36] port 121 nsew -flabel metal3 s 41713 225641 42193 225711 0 FreeSans 400 0 0 0 gpio_oeb[36] +flabel metal3 s 41737 225641 42193 225711 0 FreeSans 400 0 0 0 gpio_oeb[36] port 165 nsew -flabel metal3 s 41713 233093 42193 233163 0 FreeSans 400 0 0 0 gpio_inp_dis[36] +flabel metal3 s 41737 233093 42193 233163 0 FreeSans 400 0 0 0 gpio_inp_dis[36] port 209 nsew -flabel metal3 s 41713 226285 42193 226355 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] +flabel metal3 s 41737 226285 42193 226355 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] port 253 nsew -flabel metal3 s 41713 229321 42193 229391 0 FreeSans 400 0 0 0 gpio_holdover[36] +flabel metal3 s 41737 229321 42193 229391 0 FreeSans 400 0 0 0 gpio_holdover[36] port 385 nsew -flabel metal3 s 41713 229965 42193 230035 0 FreeSans 400 0 0 0 gpio_dm2[36] +flabel metal3 s 41737 229965 42193 230035 0 FreeSans 400 0 0 0 gpio_dm2[36] port 649 nsew -flabel metal3 s 41713 196609 42193 196679 0 FreeSans 400 0 0 0 gpio_in[37] +flabel metal3 s 41737 196609 42193 196679 0 FreeSans 400 0 0 0 gpio_in[37] port 692 nsew -flabel metal3 s 41713 194769 42193 194839 0 FreeSans 400 0 0 0 gpio_slow_sel[37] +flabel metal3 s 41737 194769 42193 194839 0 FreeSans 400 0 0 0 gpio_slow_sel[37] port 340 nsew -flabel metal3 s 41713 192929 42193 192999 0 FreeSans 400 0 0 0 gpio_dm1[37] +flabel metal3 s 41737 192929 42193 192999 0 FreeSans 400 0 0 0 gpio_dm1[37] port 604 nsew -flabel metal3 s 41713 181889 42193 181959 0 FreeSans 400 0 0 0 gpio_in_h[37] +flabel metal3 s 41737 181889 42193 181959 0 FreeSans 400 0 0 0 gpio_in_h[37] port 736 nsew -flabel metal3 s 41713 189893 42193 189963 0 FreeSans 400 0 0 0 gpio_inp_dis[37] +flabel metal3 s 41737 189893 42193 189963 0 FreeSans 400 0 0 0 gpio_inp_dis[37] port 208 nsew -flabel metal3 s 41713 183729 42193 183799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] +flabel metal3 s 41737 183729 42193 183799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] port 296 nsew -flabel metal3 s 41713 185569 42193 185639 0 FreeSans 400 0 0 0 gpio_out[37] +flabel metal3 s 41737 185569 42193 185639 0 FreeSans 400 0 0 0 gpio_out[37] port 120 nsew -flabel metal3 s 41713 182441 42193 182511 0 FreeSans 400 0 0 0 gpio_oeb[37] +flabel metal3 s 41737 182441 42193 182511 0 FreeSans 400 0 0 0 gpio_oeb[37] port 164 nsew -flabel metal3 s 41713 183085 42193 183155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] +flabel metal3 s 41737 183085 42193 183155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] port 252 nsew -flabel metal3 s 41713 186121 42193 186191 0 FreeSans 400 0 0 0 gpio_holdover[37] +flabel metal3 s 41737 186121 42193 186191 0 FreeSans 400 0 0 0 gpio_holdover[37] port 384 nsew -flabel metal3 s 41713 186765 42193 186835 0 FreeSans 400 0 0 0 gpio_dm2[37] +flabel metal3 s 41737 186765 42193 186835 0 FreeSans 400 0 0 0 gpio_dm2[37] port 648 nsew -flabel metal3 s 41713 191089 42193 191159 0 FreeSans 400 0 0 0 gpio_dm0[37] +flabel metal3 s 41737 191089 42193 191159 0 FreeSans 400 0 0 0 gpio_dm0[37] port 560 nsew -flabel metal3 s 41713 187409 42193 187479 0 FreeSans 400 0 0 0 gpio_analog_sel[37] +flabel metal3 s 41737 187409 42193 187479 0 FreeSans 400 0 0 0 gpio_analog_sel[37] port 472 nsew -flabel metal3 s 41713 190445 42193 190515 0 FreeSans 400 0 0 0 gpio_analog_pol[37] +flabel metal3 s 41737 190445 42193 190515 0 FreeSans 400 0 0 0 gpio_analog_pol[37] port 516 nsew -flabel metal3 s 41713 191733 42193 191803 0 FreeSans 400 0 0 0 gpio_analog_en[37] +flabel metal3 s 41737 191733 42193 191803 0 FreeSans 400 0 0 0 gpio_analog_en[37] port 428 nsew -flabel metal3 s 41713 969209 42193 969279 0 FreeSans 400 0 0 0 gpio_in[24] +flabel metal3 s 41737 969209 42193 969279 0 FreeSans 400 0 0 0 gpio_in[24] port 705 nsew -flabel metal3 s 41713 967369 42193 967439 0 FreeSans 400 0 0 0 gpio_slow_sel[24] +flabel metal3 s 41737 967369 42193 967439 0 FreeSans 400 0 0 0 gpio_slow_sel[24] port 353 nsew -flabel metal3 s 41713 965529 42193 965599 0 FreeSans 400 0 0 0 gpio_dm1[24] +flabel metal3 s 41737 965529 42193 965599 0 FreeSans 400 0 0 0 gpio_dm1[24] port 617 nsew -flabel metal3 s 41713 954489 42193 954559 0 FreeSans 400 0 0 0 gpio_in_h[24] +flabel metal3 s 41737 954489 42193 954559 0 FreeSans 400 0 0 0 gpio_in_h[24] port 749 nsew -flabel metal3 s 41713 956329 42193 956399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] +flabel metal3 s 41737 956329 42193 956399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] port 309 nsew -flabel metal3 s 41713 958169 42193 958239 0 FreeSans 400 0 0 0 gpio_out[24] +flabel metal3 s 41737 958169 42193 958239 0 FreeSans 400 0 0 0 gpio_out[24] port 133 nsew -flabel metal3 s 41713 955041 42193 955111 0 FreeSans 400 0 0 0 gpio_oeb[24] +flabel metal3 s 41737 955041 42193 955111 0 FreeSans 400 0 0 0 gpio_oeb[24] port 177 nsew -flabel metal3 s 41713 962493 42193 962563 0 FreeSans 400 0 0 0 gpio_inp_dis[24] +flabel metal3 s 41737 962493 42193 962563 0 FreeSans 400 0 0 0 gpio_inp_dis[24] port 221 nsew -flabel metal3 s 41713 955685 42193 955755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] +flabel metal3 s 41737 955685 42193 955755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] port 265 nsew -flabel metal3 s 41713 958721 42193 958791 0 FreeSans 400 0 0 0 gpio_holdover[24] +flabel metal3 s 41737 958721 42193 958791 0 FreeSans 400 0 0 0 gpio_holdover[24] port 397 nsew -flabel metal3 s 41713 959365 42193 959435 0 FreeSans 400 0 0 0 gpio_dm2[24] +flabel metal3 s 41737 959365 42193 959435 0 FreeSans 400 0 0 0 gpio_dm2[24] port 661 nsew -flabel metal3 s 41713 963689 42193 963759 0 FreeSans 400 0 0 0 gpio_dm0[24] +flabel metal3 s 41737 963689 42193 963759 0 FreeSans 400 0 0 0 gpio_dm0[24] port 573 nsew -flabel metal3 s 41713 960009 42193 960079 0 FreeSans 400 0 0 0 gpio_analog_sel[24] +flabel metal3 s 41737 960009 42193 960079 0 FreeSans 400 0 0 0 gpio_analog_sel[24] port 485 nsew -flabel metal3 s 41713 963045 42193 963115 0 FreeSans 400 0 0 0 gpio_analog_pol[24] +flabel metal3 s 41737 963045 42193 963115 0 FreeSans 400 0 0 0 gpio_analog_pol[24] port 529 nsew -flabel metal3 s 41713 964333 42193 964403 0 FreeSans 400 0 0 0 gpio_analog_en[24] +flabel metal3 s 41737 964333 42193 964403 0 FreeSans 400 0 0 0 gpio_analog_en[24] port 441 nsew -flabel metal3 s 41713 964814 42193 965028 0 FreeSans 400 0 0 0 analog_noesd_io[24] +flabel metal3 s 41737 964814 42193 965028 0 FreeSans 400 0 0 0 analog_noesd_io[24] port 925 nsew -flabel metal3 s 41713 966697 42193 966825 0 FreeSans 400 0 0 0 analog_io[24] +flabel metal3 s 41737 966697 42193 966825 0 FreeSans 400 0 0 0 analog_io[24] port 881 nsew +flabel metal2 69635 995407 69695 995863 0 FreeSans 400 90 0 0 gpio_loopback_zero[23] +port 794 nsew +flabel metal2 120835 995407 120895 995863 0 FreeSans 400 90 0 0 gpio_loopback_zero[22] +port 795 nsew +flabel metal2 172035 995407 172095 995863 0 FreeSans 400 90 0 0 gpio_loopback_zero[21] +port 796 nsew +flabel metal2 223235 995407 223295 995863 0 FreeSans 400 90 0 0 gpio_loopback_zero[20] +port 797 nsew +flabel metal2 274435 995407 274495 995863 0 FreeSans 400 90 0 0 gpio_loopback_zero[19] +port 798 nsew +flabel metal2 378835 995407 378895 995863 0 FreeSans 400 90 0 0 gpio_loopback_zero[18] +port 799 nsew +flabel metal2 467835 995407 467895 995863 0 FreeSans 400 90 0 0 gpio_loopback_zero[17] +port 800 nsew +flabel metal2 519035 995407 519095 995863 0 FreeSans 400 90 0 0 gpio_loopback_zero[16] +port 801 nsew +flabel metal2 618435 995407 618495 995863 0 FreeSans 400 90 0 0 gpio_loopback_zero[15] +port 802 nsew << properties >> string FIXED_BBOX 0 0 717600 1037600 << end >> diff --git a/mag/openframe_project_wrapper.mag b/mag/openframe_project_wrapper.mag index a21dde1a..a6bf36c3 100644 --- a/mag/openframe_project_wrapper.mag +++ b/mag/openframe_project_wrapper.mag @@ -1,1056 +1,920 @@ magic tech sky130A magscale 1 2 -timestamp 1695675240 -<< checkpaint >> -rect 26297 954638 30878 954986 -rect 77497 954638 82078 954986 -rect 128697 954638 133278 954986 -rect 179897 954638 184478 954986 -rect 231097 954638 235678 954986 -rect 300081 954638 307382 955030 -rect 335497 954638 340078 954986 -rect 424497 954638 429078 954986 -rect 475697 954638 480278 954986 -rect 542281 954638 549582 955030 -rect 577098 954986 579696 955035 -rect 575097 954638 579696 954986 -rect -1312 952066 634638 954638 -rect -1312 929363 1260 952066 -rect 26297 952010 30878 952066 -rect 77497 952010 82078 952066 -rect 128697 952010 133278 952066 -rect 179897 952010 184478 952066 -rect 231097 952010 235678 952066 -rect 300081 952010 307382 952066 -rect 335497 952010 340078 952066 -rect 424497 952010 429078 952066 -rect 475697 952010 480278 952066 -rect 542281 952010 549582 952066 -rect 575097 952010 579696 952066 -rect 577098 952009 579696 952010 -rect 632066 930329 634638 952066 -rect -1778 910398 1409 929363 -rect 631808 927737 635052 930329 -rect 631817 926433 635042 927737 -rect 631817 925735 635103 926433 -rect -1312 880976 1260 910398 -rect -1704 868703 1316 880976 -rect -1312 843782 1260 868703 -rect -1704 836481 1316 843782 -rect 631916 840329 635103 925735 -rect 631808 837737 635103 840329 -rect -1312 801582 1260 836481 -rect 631817 835735 635103 837737 -rect -1704 794281 1316 801582 -rect -1312 758603 1260 794281 -rect -1751 749403 1382 758603 -rect 631916 751329 635103 835735 -rect -1778 741287 1409 749403 -rect 631808 748737 635103 751329 -rect 631817 746735 635103 748737 -rect -1312 715403 1260 741287 -rect -1778 698087 1409 715403 -rect 631916 706329 635103 746735 -rect 631808 703737 635103 706329 -rect 631817 701735 635103 703737 -rect -1312 672203 1260 698087 -rect -1778 611687 1409 672203 -rect 631916 661329 635103 701735 -rect 631808 658737 635103 661329 -rect 631817 656735 635103 658737 -rect 631916 616329 635103 656735 -rect 631828 613737 635103 616329 -rect 631836 611735 635103 613737 -rect -1312 585803 1260 611687 -rect -1778 138487 1409 585803 -rect 631916 571329 635103 611735 -rect 631828 568737 635103 571329 -rect 631836 566735 635103 568737 -rect 631916 526329 635103 566735 -rect 631828 523737 635103 526329 -rect 631916 433822 635103 523737 -rect 631916 416462 635532 433822 -rect 631916 349329 635103 416462 -rect 631828 346737 635103 349329 -rect 631916 304329 635103 346737 -rect 631828 301737 635103 304329 -rect 631916 259329 635103 301737 -rect 631828 256737 635103 259329 -rect 631916 214329 635103 256737 -rect 631828 211737 635103 214329 -rect 631916 169329 635103 211737 -rect 631828 166737 635103 169329 -rect -1312 84181 1260 138487 -rect 631916 124329 635103 166737 -rect 631828 121737 635103 124329 -rect -1704 76880 1316 84181 -rect 631916 79329 635103 121737 -rect -1312 32023 1260 76880 -rect 631828 76737 635103 79329 -rect 631916 57109 635103 76737 -rect -1704 24702 1316 32023 -rect -1312 1260 1260 24702 -rect 35545 1260 42846 1316 -rect 148862 1260 151405 1330 -rect 198023 1260 205174 1316 -rect 207903 1260 215224 1316 -rect 525745 1260 533046 1316 -rect 579545 1260 586846 1316 -rect 632066 1260 634638 57109 -rect -1312 -1312 634638 1260 -rect 35545 -1704 42846 -1312 -rect 98313 -1660 100834 -1312 -rect 148862 -1536 151405 -1312 -rect 198023 -1704 205174 -1312 -rect 207903 -1704 215224 -1312 -rect 525745 -1704 533046 -1312 -rect 579545 -1704 586846 -1312 +timestamp 1695744634 << metal2 >> -rect 27497 953270 27557 953726 +rect 27498 953270 27558 953726 rect 29498 953270 29558 953726 -rect 34360 953270 34416 953750 -rect 34912 953270 34968 953750 -rect 35556 953270 35612 953750 -rect 36200 953270 36256 953750 -rect 38040 953270 38096 953750 -rect 38592 953270 38648 953750 -rect 39236 953270 39292 953750 -rect 39880 953270 39936 953750 -rect 42364 953270 42420 953750 -rect 42916 953270 42972 953750 -rect 43560 953270 43616 953750 -rect 44204 953270 44260 953750 -rect 44677 953270 44891 953750 -rect 45400 953270 45456 953750 -rect 46560 953270 46688 953750 -rect 47240 953270 47296 953750 -rect 49080 953270 49136 953750 -rect 78697 953270 78757 953726 +rect 34360 953270 34416 953726 +rect 34912 953270 34968 953726 +rect 35556 953270 35612 953726 +rect 36200 953270 36256 953726 +rect 38040 953270 38096 953726 +rect 38592 953270 38648 953726 +rect 39236 953270 39292 953726 +rect 39880 953270 39936 953726 +rect 42364 953270 42420 953726 +rect 42916 953270 42972 953726 +rect 43560 953270 43616 953726 +rect 44204 953270 44260 953726 +rect 44677 953270 44891 953726 +rect 45400 953270 45456 953726 +rect 46560 953270 46688 953726 +rect 47240 953270 47296 953726 +rect 49080 953270 49136 953726 +rect 78698 953270 78758 953726 rect 80698 953270 80758 953726 -rect 85760 953270 85816 953750 -rect 86312 953270 86368 953750 -rect 86956 953270 87012 953750 -rect 87600 953270 87656 953750 -rect 89440 953270 89496 953750 -rect 89992 953270 90048 953750 -rect 90636 953270 90692 953750 -rect 91280 953270 91336 953750 -rect 93764 953270 93820 953750 -rect 94316 953270 94372 953750 -rect 94960 953270 95016 953750 -rect 95604 953270 95660 953750 -rect 96077 953270 96291 953750 -rect 96800 953270 96856 953750 -rect 97960 953270 98088 953750 -rect 98640 953270 98696 953750 -rect 100480 953270 100536 953750 -rect 129897 953270 129957 953726 +rect 85760 953270 85816 953726 +rect 86312 953270 86368 953726 +rect 86956 953270 87012 953726 +rect 87600 953270 87656 953726 +rect 89440 953270 89496 953726 +rect 89992 953270 90048 953726 +rect 90636 953270 90692 953726 +rect 91280 953270 91336 953726 +rect 93764 953270 93820 953726 +rect 94316 953270 94372 953726 +rect 94960 953270 95016 953726 +rect 95604 953270 95660 953726 +rect 96077 953270 96291 953726 +rect 96800 953270 96856 953726 +rect 97960 953270 98088 953726 +rect 98640 953270 98696 953726 +rect 100480 953270 100536 953726 +rect 129898 953270 129958 953726 rect 131898 953270 131958 953726 -rect 137160 953270 137216 953750 -rect 137712 953270 137768 953750 -rect 138356 953270 138412 953750 -rect 139000 953270 139056 953750 -rect 140840 953270 140896 953750 -rect 141392 953270 141448 953750 -rect 142036 953270 142092 953750 -rect 142680 953270 142736 953750 -rect 145164 953270 145220 953750 -rect 145716 953270 145772 953750 -rect 146360 953270 146416 953750 -rect 147004 953270 147060 953750 -rect 147477 953270 147691 953750 -rect 148200 953270 148256 953750 -rect 149360 953270 149488 953750 -rect 150040 953270 150096 953750 -rect 151880 953270 151936 953750 -rect 181097 953270 181157 953726 +rect 137160 953270 137216 953726 +rect 137712 953270 137768 953726 +rect 138356 953270 138412 953726 +rect 139000 953270 139056 953726 +rect 140840 953270 140896 953726 +rect 141392 953270 141448 953726 +rect 142036 953270 142092 953726 +rect 142680 953270 142736 953726 +rect 145164 953270 145220 953726 +rect 145716 953270 145772 953726 +rect 146360 953270 146416 953726 +rect 147004 953270 147060 953726 +rect 147477 953270 147691 953726 +rect 148200 953270 148256 953726 +rect 149360 953270 149488 953726 +rect 150040 953270 150096 953726 +rect 151880 953270 151936 953726 +rect 181098 953270 181158 953726 rect 183098 953270 183158 953726 -rect 188560 953270 188616 953750 -rect 189112 953270 189168 953750 -rect 189756 953270 189812 953750 -rect 190400 953270 190456 953750 -rect 192240 953270 192296 953750 -rect 192792 953270 192848 953750 -rect 193436 953270 193492 953750 -rect 194080 953270 194136 953750 -rect 196564 953270 196620 953750 -rect 197116 953270 197172 953750 -rect 197760 953270 197816 953750 -rect 198404 953270 198460 953750 -rect 198877 953270 199091 953750 -rect 199600 953270 199656 953750 -rect 200760 953270 200888 953750 -rect 201440 953270 201496 953750 -rect 203280 953270 203336 953750 -rect 232297 953270 232357 953726 +rect 188560 953270 188616 953726 +rect 189112 953270 189168 953726 +rect 189756 953270 189812 953726 +rect 190400 953270 190456 953726 +rect 192240 953270 192296 953726 +rect 192792 953270 192848 953726 +rect 193436 953270 193492 953726 +rect 194080 953270 194136 953726 +rect 196564 953270 196620 953726 +rect 197116 953270 197172 953726 +rect 197760 953270 197816 953726 +rect 198404 953270 198460 953726 +rect 198877 953270 199091 953726 +rect 199600 953270 199656 953726 +rect 200760 953270 200888 953726 +rect 201440 953270 201496 953726 +rect 203280 953270 203336 953726 +rect 232298 953270 232358 953726 rect 234298 953270 234358 953726 -rect 240160 953270 240216 953750 -rect 240712 953270 240768 953750 -rect 241356 953270 241412 953750 -rect 242000 953270 242056 953750 -rect 243840 953270 243896 953750 -rect 244392 953270 244448 953750 -rect 245036 953270 245092 953750 -rect 245680 953270 245736 953750 -rect 248164 953270 248220 953750 -rect 248716 953270 248772 953750 -rect 249360 953270 249416 953750 -rect 250004 953270 250060 953750 -rect 250477 953270 250691 953750 -rect 251200 953270 251256 953750 -rect 252360 953270 252488 953750 -rect 253040 953270 253096 953750 -rect 254880 953270 254936 953750 -rect 336697 953270 336757 953726 +rect 240160 953270 240216 953726 +rect 240712 953270 240768 953726 +rect 241356 953270 241412 953726 +rect 242000 953270 242056 953726 +rect 243840 953270 243896 953726 +rect 244392 953270 244448 953726 +rect 245036 953270 245092 953726 +rect 245680 953270 245736 953726 +rect 248164 953270 248220 953726 +rect 248716 953270 248772 953726 +rect 249360 953270 249416 953726 +rect 250004 953270 250060 953726 +rect 250477 953270 250691 953726 +rect 251200 953270 251256 953726 +rect 252360 953270 252488 953726 +rect 253040 953270 253096 953726 +rect 254880 953270 254936 953726 +rect 336698 953270 336758 953726 rect 338698 953270 338758 953726 -rect 341960 953270 342016 953750 -rect 342512 953270 342568 953750 -rect 343156 953270 343212 953750 -rect 343800 953270 343856 953750 -rect 345640 953270 345696 953750 -rect 346192 953270 346248 953750 -rect 346836 953270 346892 953750 -rect 347480 953270 347536 953750 -rect 349964 953270 350020 953750 -rect 350516 953270 350572 953750 -rect 351160 953270 351216 953750 -rect 351804 953270 351860 953750 -rect 352277 953270 352491 953750 -rect 353000 953270 353056 953750 -rect 354160 953270 354288 953750 -rect 354840 953270 354896 953750 -rect 356680 953270 356736 953750 -rect 425697 953270 425757 953726 +rect 341960 953270 342016 953726 +rect 342512 953270 342568 953726 +rect 343156 953270 343212 953726 +rect 343800 953270 343856 953726 +rect 345640 953270 345696 953726 +rect 346192 953270 346248 953726 +rect 346836 953270 346892 953726 +rect 347480 953270 347536 953726 +rect 349964 953270 350020 953726 +rect 350516 953270 350572 953726 +rect 351160 953270 351216 953726 +rect 351804 953270 351860 953726 +rect 352277 953270 352491 953726 +rect 353000 953270 353056 953726 +rect 354160 953270 354288 953726 +rect 354840 953270 354896 953726 +rect 356680 953270 356736 953726 +rect 425698 953270 425758 953726 rect 427698 953270 427758 953726 -rect 430960 953270 431016 953750 -rect 431512 953270 431568 953750 -rect 432156 953270 432212 953750 -rect 432800 953270 432856 953750 -rect 434640 953270 434696 953750 -rect 435192 953270 435248 953750 -rect 435836 953270 435892 953750 -rect 436480 953270 436536 953750 -rect 438964 953270 439020 953750 -rect 439516 953270 439572 953750 -rect 440160 953270 440216 953750 -rect 440804 953270 440860 953750 -rect 441277 953270 441491 953750 -rect 442000 953270 442056 953750 -rect 443160 953270 443288 953750 -rect 443840 953270 443896 953750 -rect 445680 953270 445736 953750 -rect 476897 953270 476957 953726 +rect 430960 953270 431016 953726 +rect 431512 953270 431568 953726 +rect 432156 953270 432212 953726 +rect 432800 953270 432856 953726 +rect 434640 953270 434696 953726 +rect 435192 953270 435248 953726 +rect 435836 953270 435892 953726 +rect 436480 953270 436536 953726 +rect 438964 953270 439020 953726 +rect 439516 953270 439572 953726 +rect 440160 953270 440216 953726 +rect 440804 953270 440860 953726 +rect 441277 953270 441491 953726 +rect 442000 953270 442056 953726 +rect 443160 953270 443288 953726 +rect 443840 953270 443896 953726 +rect 445680 953270 445736 953726 +rect 476898 953270 476958 953726 rect 478898 953270 478958 953726 -rect 482360 953270 482416 953750 -rect 482912 953270 482968 953750 -rect 483556 953270 483612 953750 -rect 484200 953270 484256 953750 -rect 486040 953270 486096 953750 -rect 486592 953270 486648 953750 -rect 487236 953270 487292 953750 -rect 487880 953270 487936 953750 -rect 490364 953270 490420 953750 -rect 490916 953270 490972 953750 -rect 491560 953270 491616 953750 -rect 492204 953270 492260 953750 -rect 492677 953270 492891 953750 -rect 493400 953270 493456 953750 -rect 494560 953270 494688 953750 -rect 495240 953270 495296 953750 -rect 497080 953270 497136 953750 -rect 576297 953270 576357 953726 +rect 482360 953270 482416 953726 +rect 482912 953270 482968 953726 +rect 483556 953270 483612 953726 +rect 484200 953270 484256 953726 +rect 486040 953270 486096 953726 +rect 486592 953270 486648 953726 +rect 487236 953270 487292 953726 +rect 487880 953270 487936 953726 +rect 490364 953270 490420 953726 +rect 490916 953270 490972 953726 +rect 491560 953270 491616 953726 +rect 492204 953270 492260 953726 +rect 492677 953270 492891 953726 +rect 493400 953270 493456 953726 +rect 494560 953270 494688 953726 +rect 495240 953270 495296 953726 +rect 497080 953270 497136 953726 +rect 576298 953270 576358 953726 rect 578298 953270 578358 953726 -rect 584160 953270 584216 953750 -rect 584712 953270 584768 953750 -rect 585356 953270 585412 953750 -rect 586000 953270 586056 953750 -rect 587840 953270 587896 953750 -rect 588392 953270 588448 953750 -rect 589036 953270 589092 953750 -rect 589680 953270 589736 953750 -rect 592164 953270 592220 953750 -rect 592716 953270 592772 953750 -rect 593360 953270 593416 953750 -rect 594004 953270 594060 953750 -rect 594477 953270 594691 953750 -rect 595200 953270 595256 953750 -rect 596360 953270 596488 953750 -rect 597040 953270 597096 953750 -rect 598880 953270 598936 953750 +rect 584160 953270 584216 953726 +rect 584712 953270 584768 953726 +rect 585356 953270 585412 953726 +rect 586000 953270 586056 953726 +rect 587840 953270 587896 953726 +rect 588392 953270 588448 953726 +rect 589036 953270 589092 953726 +rect 589680 953270 589736 953726 +rect 592164 953270 592220 953726 +rect 592716 953270 592772 953726 +rect 593360 953270 593416 953726 +rect 594004 953270 594060 953726 +rect 594477 953270 594691 953726 +rect 595200 953270 595256 953726 +rect 596360 953270 596488 953726 +rect 597040 953270 597096 953726 +rect 598880 953270 598936 953726 rect 99571 -90 99637 56 rect 99574 -400 99634 -90 rect 110164 -400 110220 56 -rect 145190 -424 145246 56 -rect 147030 -424 147086 56 -rect 147638 -424 147766 56 -rect 148870 -424 148926 56 -rect 149435 -424 149649 56 -rect 150066 -424 150122 56 -rect 150710 -424 150766 56 -rect 151354 -424 151410 56 -rect 151906 -424 151962 56 -rect 154390 -424 154446 56 -rect 155034 -424 155090 56 -rect 155678 -424 155734 56 -rect 156230 -424 156286 56 -rect 158070 -424 158126 56 -rect 158714 -424 158770 56 -rect 159358 -424 159414 56 -rect 159910 -424 159966 56 +rect 145190 -400 145246 56 +rect 147030 -400 147086 56 +rect 147638 -400 147766 56 +rect 148870 -400 148926 56 +rect 149435 -400 149649 56 +rect 150066 -400 150122 56 +rect 150710 -400 150766 56 +rect 151354 -400 151410 56 +rect 151906 -400 151962 56 +rect 154390 -400 154446 56 +rect 155034 -400 155090 56 +rect 155678 -400 155734 56 +rect 156230 -400 156286 56 +rect 158070 -400 158126 56 +rect 158714 -400 158770 56 +rect 159358 -400 159414 56 +rect 159910 -400 159966 56 rect 160580 -400 160632 56 rect 163791 -400 163843 56 -rect 253790 -424 253846 56 -rect 255630 -424 255686 56 -rect 256238 -424 256366 56 -rect 257470 -424 257526 56 -rect 258035 -424 258249 56 -rect 258666 -424 258722 56 -rect 259310 -424 259366 56 -rect 259954 -424 260010 56 -rect 260506 -424 260562 56 -rect 262990 -424 263046 56 -rect 263634 -424 263690 56 -rect 264278 -424 264334 56 -rect 264830 -424 264886 56 -rect 266670 -424 266726 56 -rect 267314 -424 267370 56 -rect 267958 -424 268014 56 -rect 268510 -424 268566 56 +rect 253790 -400 253846 56 +rect 255630 -400 255686 56 +rect 256238 -400 256366 56 +rect 257470 -400 257526 56 +rect 258035 -400 258249 56 +rect 258666 -400 258722 56 +rect 259310 -400 259366 56 +rect 259954 -400 260010 56 +rect 260506 -400 260562 56 +rect 262990 -400 263046 56 +rect 263634 -400 263690 56 +rect 264278 -400 264334 56 +rect 264830 -400 264886 56 +rect 266670 -400 266726 56 +rect 267314 -400 267370 56 +rect 267958 -400 268014 56 +rect 268510 -400 268566 56 rect 269180 -400 269232 56 rect 273360 -400 273412 56 -rect 308590 -424 308646 56 -rect 310430 -424 310486 56 -rect 311038 -424 311166 56 -rect 312270 -424 312326 56 -rect 312835 -424 313049 56 -rect 313466 -424 313522 56 -rect 314110 -424 314166 56 -rect 314754 -424 314810 56 -rect 315306 -424 315362 56 -rect 317790 -424 317846 56 -rect 318434 -424 318490 56 -rect 319078 -424 319134 56 -rect 319630 -424 319686 56 -rect 321470 -424 321526 56 -rect 322114 -424 322170 56 -rect 322758 -424 322814 56 -rect 323310 -424 323366 56 +rect 308590 -400 308646 56 +rect 310430 -400 310486 56 +rect 311038 -400 311166 56 +rect 312270 -400 312326 56 +rect 312835 -400 313049 56 +rect 313466 -400 313522 56 +rect 314110 -400 314166 56 +rect 314754 -400 314810 56 +rect 315306 -400 315362 56 +rect 317790 -400 317846 56 +rect 318434 -400 318490 56 +rect 319078 -400 319134 56 +rect 319630 -400 319686 56 +rect 321470 -400 321526 56 +rect 322114 -400 322170 56 +rect 322758 -400 322814 56 +rect 323310 -400 323366 56 rect 323980 -400 324032 56 -rect 328165 -400 328217 34 -rect 363390 -424 363446 56 -rect 365230 -424 365286 56 -rect 365838 -424 365966 56 -rect 367070 -424 367126 56 -rect 367635 -424 367849 56 -rect 368266 -424 368322 56 -rect 368910 -424 368966 56 -rect 369554 -424 369610 56 -rect 370106 -424 370162 56 -rect 372590 -424 372646 56 -rect 373234 -424 373290 56 -rect 373878 -424 373934 56 -rect 374430 -424 374486 56 -rect 376270 -424 376326 56 -rect 376914 -424 376970 56 -rect 377558 -424 377614 56 -rect 378110 -424 378166 56 +rect 328165 -400 328217 56 +rect 363390 -400 363446 56 +rect 365230 -400 365286 56 +rect 365838 -400 365966 56 +rect 367070 -400 367126 56 +rect 367635 -400 367849 56 +rect 368266 -400 368322 56 +rect 368910 -400 368966 56 +rect 369554 -400 369610 56 +rect 370106 -400 370162 56 +rect 372590 -400 372646 56 +rect 373234 -400 373290 56 +rect 373878 -400 373934 56 +rect 374430 -400 374486 56 +rect 376270 -400 376326 56 +rect 376914 -400 376970 56 +rect 377558 -400 377614 56 +rect 378110 -400 378166 56 rect 378780 -400 378832 56 rect 382978 -400 383030 56 -rect 418190 -424 418246 56 -rect 420030 -424 420086 56 -rect 420638 -424 420766 56 -rect 421870 -424 421926 56 -rect 422435 -424 422649 56 -rect 423066 -424 423122 56 -rect 423710 -424 423766 56 -rect 424354 -424 424410 56 -rect 424906 -424 424962 56 -rect 427390 -424 427446 56 -rect 428034 -424 428090 56 -rect 428678 -424 428734 56 -rect 429230 -424 429286 56 -rect 431070 -424 431126 56 -rect 431714 -424 431770 56 -rect 432358 -424 432414 56 -rect 432910 -424 432966 56 +rect 418190 -400 418246 56 +rect 420030 -400 420086 56 +rect 420638 -400 420766 56 +rect 421870 -400 421926 56 +rect 422435 -400 422649 56 +rect 423066 -400 423122 56 +rect 423710 -400 423766 56 +rect 424354 -400 424410 56 +rect 424906 -400 424962 56 +rect 427390 -400 427446 56 +rect 428034 -400 428090 56 +rect 428678 -400 428734 56 +rect 429230 -400 429286 56 +rect 431070 -400 431126 56 +rect 431714 -400 431770 56 +rect 432358 -400 432414 56 +rect 432910 -400 432966 56 rect 433580 -400 433632 56 rect 437778 -400 437830 56 -rect 472990 -424 473046 56 -rect 474830 -424 474886 56 -rect 475438 -424 475566 56 -rect 476670 -424 476726 56 -rect 477235 -424 477449 56 -rect 477866 -424 477922 56 -rect 478510 -424 478566 56 -rect 479154 -424 479210 56 -rect 479706 -424 479762 56 -rect 482190 -424 482246 56 -rect 482834 -424 482890 56 -rect 483478 -424 483534 56 -rect 484030 -424 484086 56 -rect 485870 -424 485926 56 -rect 486514 -424 486570 56 -rect 487158 -424 487214 56 -rect 487710 -424 487766 56 +rect 472990 -400 473046 56 +rect 474830 -400 474886 56 +rect 475438 -400 475566 56 +rect 476670 -400 476726 56 +rect 477235 -400 477449 56 +rect 477866 -400 477922 56 +rect 478510 -400 478566 56 +rect 479154 -400 479210 56 +rect 479706 -400 479762 56 +rect 482190 -400 482246 56 +rect 482834 -400 482890 56 +rect 483478 -400 483534 56 +rect 484030 -400 484086 56 +rect 485870 -400 485926 56 +rect 486514 -400 486570 56 +rect 487158 -400 487214 56 +rect 487710 -400 487766 56 rect 488380 -400 488432 56 rect 492635 -400 492687 56 -rect 605082 -260 605134 56 -rect 605306 -260 605358 56 -rect 605530 -260 605582 56 -rect 605754 -260 605806 56 -rect 605978 -260 606030 56 -rect 606202 -260 606254 56 -rect 606426 -260 606478 56 -rect 606650 -260 606702 56 -rect 606874 -260 606926 56 -rect 607098 -260 607150 56 -rect 607322 -260 607374 56 -rect 607546 -260 607598 56 -rect 607770 -260 607822 56 -rect 607994 -260 608046 56 -rect 608218 -260 608270 56 -rect 608442 -260 608494 56 -rect 608666 -260 608718 56 -rect 608890 -260 608942 56 -rect 609114 -260 609166 56 -rect 609338 -260 609390 56 -rect 609562 -260 609614 56 -rect 609786 -260 609838 56 -rect 610010 -260 610062 56 -rect 610234 -260 610286 56 -rect 610458 -260 610510 56 -rect 610682 -260 610734 56 -rect 610906 -260 610958 56 -rect 611130 -260 611182 56 -rect 611354 -260 611406 56 -rect 611578 -260 611630 56 -rect 611802 -260 611854 56 -rect 612026 -260 612078 56 -rect 605093 -400 605121 -260 -rect 605317 -400 605345 -260 -rect 605541 -400 605569 -260 -rect 605765 -400 605793 -260 -rect 605989 -400 606017 -260 -rect 606213 -400 606241 -260 -rect 606437 -400 606465 -260 -rect 606661 -400 606689 -260 -rect 606885 -400 606913 -260 -rect 607109 -400 607137 -260 -rect 607333 -400 607361 -260 -rect 607557 -400 607585 -260 -rect 607781 -400 607809 -260 -rect 608005 -400 608033 -260 -rect 608229 -400 608257 -260 -rect 608453 -400 608481 -260 -rect 608677 -400 608705 -260 -rect 608901 -400 608929 -260 -rect 609125 -400 609153 -260 -rect 609349 -400 609377 -260 -rect 609573 -400 609601 -260 -rect 609797 -400 609825 -260 -rect 610021 -400 610049 -260 -rect 610245 -400 610273 -260 -rect 610469 -400 610497 -260 -rect 610693 -400 610721 -260 -rect 610917 -400 610945 -260 -rect 611141 -400 611169 -260 -rect 611365 -400 611393 -260 -rect 611589 -400 611617 -260 -rect 611813 -400 611841 -260 -rect 612037 -400 612065 -260 +rect 605082 -400 605134 56 +rect 605306 -400 605358 56 +rect 605530 -400 605582 56 +rect 605754 -400 605806 56 +rect 605978 -400 606030 56 +rect 606202 -400 606254 56 +rect 606426 -400 606478 56 +rect 606650 -400 606702 56 +rect 606874 -400 606926 56 +rect 607098 -400 607150 56 +rect 607322 -400 607374 56 +rect 607546 -400 607598 56 +rect 607770 -400 607822 56 +rect 607994 -400 608046 56 +rect 608218 -400 608270 56 +rect 608442 -400 608494 56 +rect 608666 -400 608718 56 +rect 608890 -400 608942 56 +rect 609114 -400 609166 56 +rect 609338 -400 609390 56 +rect 609562 -400 609614 56 +rect 609786 -400 609838 56 +rect 610010 -400 610062 56 +rect 610234 -400 610286 56 +rect 610458 -400 610510 56 +rect 610682 -400 610734 56 +rect 610906 -400 610958 56 +rect 611130 -400 611182 56 +rect 611354 -400 611406 56 +rect 611578 -400 611630 56 +rect 611802 -400 611854 56 +rect 612026 -400 612078 56 << metal3 >> -rect 291362 953270 296142 953770 -rect 301342 953270 306122 953770 -rect 533562 953270 538342 953770 -rect 543542 953270 548322 953770 +rect 291362 953270 296142 953726 +rect 301342 953270 306122 953726 +rect 533562 953270 538342 953726 +rect 543542 953270 548322 953726 rect 633270 929006 633726 929068 -rect -424 927072 56 927142 +rect -400 927072 56 927142 rect 633270 927006 633726 927068 -rect -424 925232 56 925302 -rect 633270 925104 633750 925174 -rect -424 924560 56 924688 -rect 633270 924552 633750 924622 -rect 633270 923908 633750 923978 -rect -424 923392 56 923462 -rect 633270 923264 633750 923334 -rect -424 922677 56 922891 -rect -424 922196 56 922266 -rect -424 921552 56 921622 -rect 633270 921424 633750 921494 -rect -424 920908 56 920978 -rect 633270 920872 633750 920942 -rect -424 920356 56 920426 -rect 633270 920228 633750 920298 -rect 633270 919584 633750 919654 -rect -424 917872 56 917942 -rect -424 917228 56 917298 -rect 633270 917100 633750 917170 -rect -424 916584 56 916654 -rect 633270 916548 633750 916618 -rect -424 916032 56 916102 -rect 633270 915904 633750 915974 -rect 633270 915260 633750 915330 -rect 633270 914635 633750 914849 -rect -424 914192 56 914262 -rect 633270 914064 633750 914134 -rect -424 913548 56 913618 -rect -424 912904 56 912974 -rect 633270 912838 633750 912966 -rect -424 912352 56 912422 -rect 633270 912224 633750 912294 -rect 633270 910384 633750 910454 +rect -400 925232 56 925302 +rect 633270 925104 633726 925174 +rect -400 924560 56 924688 +rect 633270 924552 633726 924622 +rect 633270 923908 633726 923978 +rect -400 923392 56 923462 +rect 633270 923264 633726 923334 +rect -400 922677 56 922891 +rect -400 922196 56 922266 +rect -400 921552 56 921622 +rect 633270 921424 633726 921494 +rect -400 920908 56 920978 +rect 633270 920872 633726 920942 +rect -400 920356 56 920426 +rect 633270 920228 633726 920298 +rect 633270 919584 633726 919654 +rect -400 917872 56 917942 +rect -400 917228 56 917298 +rect 633270 917100 633726 917170 +rect -400 916584 56 916654 +rect 633270 916548 633726 916618 +rect -400 916032 56 916102 +rect 633270 915904 633726 915974 +rect 633270 915260 633726 915330 +rect 633270 914635 633726 914849 +rect -400 914192 56 914262 +rect 633270 914064 633726 914134 +rect -400 913548 56 913618 +rect -400 912904 56 912974 +rect 633270 912838 633726 912966 +rect -400 912352 56 912422 +rect 633270 912224 633726 912294 +rect 633270 910384 633726 910454 rect -400 906644 56 906704 rect -400 904644 56 904704 -rect -444 880014 56 884804 -rect -444 875054 56 879716 -rect -444 869964 56 874764 -rect -444 837742 56 842522 +rect -400 880014 56 884804 +rect -400 875054 56 879716 +rect -400 869964 56 874764 +rect -400 837742 56 842522 rect 633270 839006 633726 839068 rect 633270 837006 633726 837068 -rect 633270 835904 633750 835974 -rect 633270 835352 633750 835422 -rect 633270 834708 633750 834778 -rect 633270 834064 633750 834134 -rect -444 827762 56 832542 -rect 633270 832224 633750 832294 -rect 633270 831672 633750 831742 -rect 633270 831028 633750 831098 -rect 633270 830384 633750 830454 -rect 633270 827900 633750 827970 -rect 633270 827348 633750 827418 -rect 633270 826704 633750 826774 -rect 633270 826060 633750 826130 -rect 633270 825435 633750 825649 -rect 633270 824864 633750 824934 -rect 633270 823638 633750 823766 -rect 633270 823024 633750 823094 -rect 633270 821184 633750 821254 -rect -444 795542 56 800322 -rect -444 785562 56 790342 -rect 633270 786384 633770 791164 -rect 633270 776406 633770 781186 -rect -424 757272 56 757342 -rect -424 755432 56 755502 -rect -424 754760 56 754888 -rect -424 753592 56 753662 -rect -424 752877 56 753091 -rect -424 752396 56 752466 -rect -424 751752 56 751822 -rect -424 751108 56 751178 -rect -424 750556 56 750626 +rect 633270 835904 633726 835974 +rect 633270 835352 633726 835422 +rect 633270 834708 633726 834778 +rect 633270 834064 633726 834134 +rect -400 827762 56 832542 +rect 633270 832224 633726 832294 +rect 633270 831672 633726 831742 +rect 633270 831028 633726 831098 +rect 633270 830384 633726 830454 +rect 633270 827900 633726 827970 +rect 633270 827348 633726 827418 +rect 633270 826704 633726 826774 +rect 633270 826060 633726 826130 +rect 633270 825435 633726 825649 +rect 633270 824864 633726 824934 +rect 633270 823638 633726 823766 +rect 633270 823024 633726 823094 +rect 633270 821184 633726 821254 +rect -400 795542 56 800322 +rect -400 785562 56 790342 +rect 633270 786384 633726 791164 +rect 633270 776406 633726 781186 +rect -400 757272 56 757342 +rect -400 755432 56 755502 +rect -400 754760 56 754888 +rect -400 753592 56 753662 +rect -400 752877 56 753091 +rect -400 752396 56 752466 +rect -400 751752 56 751822 +rect -400 751108 56 751178 +rect -400 750556 56 750626 rect 633270 750006 633726 750068 -rect -424 748072 56 748142 +rect -400 748072 56 748142 rect 633270 748006 633726 748068 -rect -424 747428 56 747498 -rect -424 746784 56 746854 -rect 633270 746704 633750 746774 -rect -424 746232 56 746302 -rect 633270 746152 633750 746222 -rect 633270 745508 633750 745578 -rect 633270 744864 633750 744934 -rect -424 744392 56 744462 -rect -424 743748 56 743818 -rect -424 743104 56 743174 -rect 633270 743024 633750 743094 -rect -424 742552 56 742622 -rect 633270 742472 633750 742542 -rect 633270 741828 633750 741898 -rect 633270 741184 633750 741254 -rect 633270 738700 633750 738770 -rect 633270 738148 633750 738218 -rect 633270 737504 633750 737574 -rect 633270 736860 633750 736930 +rect -400 747428 56 747498 +rect -400 746784 56 746854 +rect 633270 746704 633726 746774 +rect -400 746232 56 746302 +rect 633270 746152 633726 746222 +rect 633270 745508 633726 745578 +rect 633270 744864 633726 744934 +rect -400 744392 56 744462 +rect -400 743748 56 743818 +rect -400 743104 56 743174 +rect 633270 743024 633726 743094 +rect -400 742552 56 742622 +rect 633270 742472 633726 742542 +rect 633270 741828 633726 741898 +rect 633270 741184 633726 741254 +rect 633270 738700 633726 738770 +rect 633270 738148 633726 738218 +rect 633270 737504 633726 737574 +rect 633270 736860 633726 736930 rect -400 736644 56 736704 -rect 633270 736235 633750 736449 -rect 633270 735664 633750 735734 +rect 633270 736235 633726 736449 +rect 633270 735664 633726 735734 rect -400 734644 56 734704 -rect 633270 734438 633750 734566 -rect 633270 733824 633750 733894 -rect 633270 731984 633750 732054 -rect -424 714072 56 714142 -rect -424 712232 56 712302 -rect -424 711560 56 711688 -rect -424 710392 56 710462 -rect -424 709677 56 709891 -rect -424 709196 56 709266 -rect -424 708552 56 708622 -rect -424 707908 56 707978 -rect -424 707356 56 707426 +rect 633270 734438 633726 734566 +rect 633270 733824 633726 733894 +rect 633270 731984 633726 732054 +rect -400 714072 56 714142 +rect -400 712232 56 712302 +rect -400 711560 56 711688 +rect -400 710392 56 710462 +rect -400 709677 56 709891 +rect -400 709196 56 709266 +rect -400 708552 56 708622 +rect -400 707908 56 707978 +rect -400 707356 56 707426 rect 633270 705006 633726 705068 -rect -424 704872 56 704942 -rect -424 704228 56 704298 -rect -424 703584 56 703654 -rect -424 703032 56 703102 +rect -400 704872 56 704942 +rect -400 704228 56 704298 +rect -400 703584 56 703654 +rect -400 703032 56 703102 rect 633270 703006 633726 703068 -rect 633270 701704 633750 701774 -rect -424 701192 56 701262 -rect 633270 701152 633750 701222 -rect -424 700548 56 700618 -rect 633270 700508 633750 700578 -rect -424 699904 56 699974 -rect 633270 699864 633750 699934 -rect -424 699352 56 699422 -rect 633270 698024 633750 698094 -rect 633270 697472 633750 697542 -rect 633270 696828 633750 696898 -rect 633270 696184 633750 696254 +rect 633270 701704 633726 701774 +rect -400 701192 56 701262 +rect 633270 701152 633726 701222 +rect -400 700548 56 700618 +rect 633270 700508 633726 700578 +rect -400 699904 56 699974 +rect 633270 699864 633726 699934 +rect -400 699352 56 699422 +rect 633270 698024 633726 698094 +rect 633270 697472 633726 697542 +rect 633270 696828 633726 696898 +rect 633270 696184 633726 696254 rect -400 693644 56 693704 -rect 633270 693700 633750 693770 -rect 633270 693148 633750 693218 -rect 633270 692504 633750 692574 -rect 633270 691860 633750 691930 +rect 633270 693700 633726 693770 +rect 633270 693148 633726 693218 +rect 633270 692504 633726 692574 +rect 633270 691860 633726 691930 rect -400 691644 56 691704 -rect 633270 691235 633750 691449 -rect 633270 690664 633750 690734 -rect 633270 689438 633750 689566 -rect 633270 688824 633750 688894 -rect 633270 686984 633750 687054 -rect -424 670872 56 670942 -rect -424 669032 56 669102 -rect -424 668360 56 668488 -rect -424 667192 56 667262 -rect -424 666477 56 666691 -rect -424 665996 56 666066 -rect -424 665352 56 665422 -rect -424 664708 56 664778 -rect -424 664156 56 664226 -rect -424 661672 56 661742 -rect -424 661028 56 661098 -rect -424 660384 56 660454 +rect 633270 691235 633726 691449 +rect 633270 690664 633726 690734 +rect 633270 689438 633726 689566 +rect 633270 688824 633726 688894 +rect 633270 686984 633726 687054 +rect -400 670872 56 670942 +rect -400 669032 56 669102 +rect -400 668360 56 668488 +rect -400 667192 56 667262 +rect -400 666477 56 666691 +rect -400 665996 56 666066 +rect -400 665352 56 665422 +rect -400 664708 56 664778 +rect -400 664156 56 664226 +rect -400 661672 56 661742 +rect -400 661028 56 661098 +rect -400 660384 56 660454 rect 633270 660006 633726 660068 -rect -424 659832 56 659902 -rect -424 657992 56 658062 +rect -400 659832 56 659902 +rect -400 657992 56 658062 rect 633270 658006 633726 658068 -rect -424 657348 56 657418 -rect -424 656704 56 656774 -rect 633270 656704 633750 656774 -rect -424 656152 56 656222 -rect 633270 656152 633750 656222 -rect 633270 655508 633750 655578 -rect 633270 654864 633750 654934 -rect 633270 653024 633750 653094 -rect 633270 652472 633750 652542 -rect 633270 651828 633750 651898 -rect 633270 651184 633750 651254 +rect -400 657348 56 657418 +rect -400 656704 56 656774 +rect 633270 656704 633726 656774 +rect -400 656152 56 656222 +rect 633270 656152 633726 656222 +rect 633270 655508 633726 655578 +rect 633270 654864 633726 654934 +rect 633270 653024 633726 653094 +rect 633270 652472 633726 652542 +rect 633270 651828 633726 651898 +rect 633270 651184 633726 651254 rect -400 650644 56 650704 rect -400 648644 56 648704 -rect 633270 648700 633750 648770 -rect 633270 648148 633750 648218 -rect 633270 647504 633750 647574 -rect 633270 646860 633750 646930 -rect 633270 646235 633750 646449 -rect 633270 645664 633750 645734 -rect 633270 644438 633750 644566 -rect 633270 643824 633750 643894 -rect 633270 641984 633750 642054 -rect -424 627672 56 627742 -rect -424 625832 56 625902 -rect -424 625160 56 625288 -rect -424 623992 56 624062 -rect -424 623277 56 623491 -rect -424 622796 56 622866 -rect -424 622152 56 622222 -rect -424 621508 56 621578 -rect -424 620956 56 621026 -rect -424 618472 56 618542 -rect -424 617828 56 617898 -rect -424 617184 56 617254 -rect -424 616632 56 616702 +rect 633270 648700 633726 648770 +rect 633270 648148 633726 648218 +rect 633270 647504 633726 647574 +rect 633270 646860 633726 646930 +rect 633270 646235 633726 646449 +rect 633270 645664 633726 645734 +rect 633270 644438 633726 644566 +rect 633270 643824 633726 643894 +rect 633270 641984 633726 642054 +rect -400 627672 56 627742 +rect -400 625832 56 625902 +rect -400 625160 56 625288 +rect -400 623992 56 624062 +rect -400 623277 56 623491 +rect -400 622796 56 622866 +rect -400 622152 56 622222 +rect -400 621508 56 621578 +rect -400 620956 56 621026 +rect -400 618472 56 618542 +rect -400 617828 56 617898 +rect -400 617184 56 617254 +rect -400 616632 56 616702 rect 633270 615006 633726 615068 -rect -424 614792 56 614862 -rect -424 614148 56 614218 -rect -424 613504 56 613574 -rect -424 612952 56 613022 +rect -400 614792 56 614862 +rect -400 614148 56 614218 +rect -400 613504 56 613574 +rect -400 612952 56 613022 rect 633270 613006 633726 613068 -rect 633270 611504 633750 611574 -rect 633270 610952 633750 611022 -rect 633270 610308 633750 610378 -rect 633270 609664 633750 609734 -rect 633270 607824 633750 607894 +rect 633270 611504 633726 611574 +rect 633270 610952 633726 611022 +rect 633270 610308 633726 610378 +rect 633270 609664 633726 609734 +rect 633270 607824 633726 607894 rect -400 607644 56 607704 -rect 633270 607272 633750 607342 -rect 633270 606628 633750 606698 -rect 633270 605984 633750 606054 +rect 633270 607272 633726 607342 +rect 633270 606628 633726 606698 +rect 633270 605984 633726 606054 rect -400 605644 56 605704 -rect 633270 603500 633750 603570 -rect 633270 602948 633750 603018 -rect 633270 602304 633750 602374 -rect 633270 601660 633750 601730 -rect 633270 601035 633750 601249 -rect 633270 600464 633750 600534 -rect 633270 599238 633750 599366 -rect 633270 598624 633750 598694 -rect 633270 596784 633750 596854 -rect -424 584472 56 584542 -rect -424 582632 56 582702 -rect -424 581960 56 582088 -rect -424 580792 56 580862 -rect -424 580077 56 580291 -rect -424 579596 56 579666 -rect -424 578952 56 579022 -rect -424 578308 56 578378 -rect -424 577756 56 577826 -rect -424 575272 56 575342 -rect -424 574628 56 574698 -rect -424 573984 56 574054 -rect -424 573432 56 573502 -rect -424 571592 56 571662 -rect -424 570948 56 571018 -rect -424 570304 56 570374 +rect 633270 603500 633726 603570 +rect 633270 602948 633726 603018 +rect 633270 602304 633726 602374 +rect 633270 601660 633726 601730 +rect 633270 601035 633726 601249 +rect 633270 600464 633726 600534 +rect 633270 599238 633726 599366 +rect 633270 598624 633726 598694 +rect 633270 596784 633726 596854 +rect -400 584472 56 584542 +rect -400 582632 56 582702 +rect -400 581960 56 582088 +rect -400 580792 56 580862 +rect -400 580077 56 580291 +rect -400 579596 56 579666 +rect -400 578952 56 579022 +rect -400 578308 56 578378 +rect -400 577756 56 577826 +rect -400 575272 56 575342 +rect -400 574628 56 574698 +rect -400 573984 56 574054 +rect -400 573432 56 573502 +rect -400 571592 56 571662 +rect -400 570948 56 571018 +rect -400 570304 56 570374 rect 633270 570006 633726 570068 -rect -424 569752 56 569822 +rect -400 569752 56 569822 rect 633270 568006 633726 568068 -rect 633270 566504 633750 566574 -rect 633270 565952 633750 566022 -rect 633270 565308 633750 565378 +rect 633270 566504 633726 566574 +rect 633270 565952 633726 566022 +rect 633270 565308 633726 565378 rect -400 564644 56 564704 -rect 633270 564664 633750 564734 -rect 633270 562824 633750 562894 +rect 633270 564664 633726 564734 +rect 633270 562824 633726 562894 rect -400 562644 56 562704 -rect 633270 562272 633750 562342 -rect 633270 561628 633750 561698 -rect 633270 560984 633750 561054 -rect 633270 558500 633750 558570 -rect 633270 557948 633750 558018 -rect 633270 557304 633750 557374 -rect 633270 556660 633750 556730 -rect 633270 556035 633750 556249 -rect 633270 555464 633750 555534 -rect 633270 554238 633750 554366 -rect 633270 553624 633750 553694 -rect 633270 551784 633750 551854 -rect -424 541272 56 541342 -rect -424 539432 56 539502 -rect -424 538760 56 538888 -rect -424 537592 56 537662 -rect -424 536877 56 537091 -rect -424 536396 56 536466 -rect -424 535752 56 535822 -rect -424 535108 56 535178 -rect -424 534556 56 534626 -rect -424 532072 56 532142 -rect -424 531428 56 531498 -rect -424 530784 56 530854 -rect -424 530232 56 530302 -rect -424 528392 56 528462 -rect -424 527748 56 527818 -rect -424 527104 56 527174 -rect -424 526552 56 526622 +rect 633270 562272 633726 562342 +rect 633270 561628 633726 561698 +rect 633270 560984 633726 561054 +rect 633270 558500 633726 558570 +rect 633270 557948 633726 558018 +rect 633270 557304 633726 557374 +rect 633270 556660 633726 556730 +rect 633270 556035 633726 556249 +rect 633270 555464 633726 555534 +rect 633270 554238 633726 554366 +rect 633270 553624 633726 553694 +rect 633270 551784 633726 551854 +rect -400 541272 56 541342 +rect -400 539432 56 539502 +rect -400 538760 56 538888 +rect -400 537592 56 537662 +rect -400 536877 56 537091 +rect -400 536396 56 536466 +rect -400 535752 56 535822 +rect -400 535108 56 535178 +rect -400 534556 56 534626 +rect -400 532072 56 532142 +rect -400 531428 56 531498 +rect -400 530784 56 530854 +rect -400 530232 56 530302 +rect -400 528392 56 528462 +rect -400 527748 56 527818 +rect -400 527104 56 527174 +rect -400 526552 56 526622 rect 633270 525006 633726 525068 rect 633270 523005 633726 523067 rect -400 521644 56 521704 -rect 633270 521304 633750 521374 -rect 633270 520752 633750 520822 -rect 633270 520108 633750 520178 +rect 633270 521304 633726 521374 +rect 633270 520752 633726 520822 +rect 633270 520108 633726 520178 rect -400 519644 56 519704 -rect 633270 519464 633750 519534 -rect 633270 517624 633750 517694 -rect 633270 517072 633750 517142 -rect 633270 516428 633750 516498 -rect 633270 515784 633750 515854 -rect 633270 513300 633750 513370 -rect 633270 512748 633750 512818 -rect 633270 512104 633750 512174 -rect 633270 511460 633750 511530 -rect 633270 510835 633750 511049 -rect 633270 510264 633750 510334 -rect 633270 509038 633750 509166 -rect 633270 508424 633750 508494 -rect 633270 506584 633750 506654 -rect -424 498072 56 498142 -rect -424 496232 56 496302 -rect -424 495560 56 495688 -rect -424 494392 56 494462 -rect -424 493677 56 493891 -rect -424 493196 56 493266 -rect -424 492552 56 492622 -rect -424 491908 56 491978 -rect -424 491356 56 491426 -rect -424 488872 56 488942 -rect -424 488228 56 488298 -rect -424 487584 56 487654 -rect -424 487032 56 487102 -rect -424 485192 56 485262 -rect -424 484548 56 484618 -rect -424 483904 56 483974 -rect -424 483352 56 483422 +rect 633270 519464 633726 519534 +rect 633270 517624 633726 517694 +rect 633270 517072 633726 517142 +rect 633270 516428 633726 516498 +rect 633270 515784 633726 515854 +rect 633270 513300 633726 513370 +rect 633270 512748 633726 512818 +rect 633270 512104 633726 512174 +rect 633270 511460 633726 511530 +rect 633270 510835 633726 511049 +rect 633270 510264 633726 510334 +rect 633270 509038 633726 509166 +rect 633270 508424 633726 508494 +rect 633270 506584 633726 506654 +rect -400 498072 56 498142 +rect -400 496232 56 496302 +rect -400 495560 56 495688 +rect -400 494392 56 494462 +rect -400 493677 56 493891 +rect -400 493196 56 493266 +rect -400 492552 56 492622 +rect -400 491908 56 491978 +rect -400 491356 56 491426 +rect -400 488872 56 488942 +rect -400 488228 56 488298 +rect -400 487584 56 487654 +rect -400 487032 56 487102 +rect -400 485192 56 485262 +rect -400 484548 56 484618 +rect -400 483904 56 483974 +rect -400 483352 56 483422 rect -400 478644 56 478704 rect -400 476644 56 476704 -rect 633270 471784 633770 476564 -rect 633270 461804 633770 466584 -rect -444 450940 56 455720 -rect -444 440962 56 445742 -rect 633270 427762 633770 432562 -rect 633270 422810 633770 427472 -rect 633270 417722 633770 422512 -rect -444 408814 56 413604 -rect -444 403862 56 408514 -rect -444 398762 56 403562 -rect 633270 383584 633770 388364 -rect 633270 373606 633770 378386 -rect -424 370472 56 370542 -rect -424 368632 56 368702 -rect -424 367960 56 368088 -rect -424 366792 56 366862 -rect -424 366077 56 366291 -rect -424 365596 56 365666 -rect -424 364952 56 365022 -rect -424 364308 56 364378 -rect -424 363756 56 363826 -rect -424 361272 56 361342 -rect -424 360628 56 360698 -rect -424 359984 56 360054 -rect -424 359432 56 359502 -rect -424 357592 56 357662 -rect -424 356948 56 357018 -rect -424 356304 56 356374 -rect -424 355752 56 355822 +rect 633270 471784 633726 476564 +rect 633270 461804 633726 466584 +rect -400 450940 56 455720 +rect -400 440962 56 445742 +rect 633270 427762 633726 432562 +rect 633270 422810 633726 427472 +rect 633270 417722 633726 422512 +rect -400 408814 56 413604 +rect -400 403862 56 408514 +rect -400 398762 56 403562 +rect 633270 383584 633726 388364 +rect 633270 373606 633726 378386 +rect -400 370472 56 370542 +rect -400 368632 56 368702 +rect -400 367960 56 368088 +rect -400 366792 56 366862 +rect -400 366077 56 366291 +rect -400 365596 56 365666 +rect -400 364952 56 365022 +rect -400 364308 56 364378 +rect -400 363756 56 363826 +rect -400 361272 56 361342 +rect -400 360628 56 360698 +rect -400 359984 56 360054 +rect -400 359432 56 359502 +rect -400 357592 56 357662 +rect -400 356948 56 357018 +rect -400 356304 56 356374 +rect -400 355752 56 355822 rect -400 349644 56 349704 rect 633270 348006 633726 348068 rect -400 347644 56 347704 rect 633270 346005 633726 346067 -rect 633270 344104 633750 344174 -rect 633270 343552 633750 343622 -rect 633270 342908 633750 342978 -rect 633270 342264 633750 342334 -rect 633270 340424 633750 340494 -rect 633270 339872 633750 339942 -rect 633270 339228 633750 339298 -rect 633270 338584 633750 338654 -rect 633270 336100 633750 336170 -rect 633270 335548 633750 335618 -rect 633270 334904 633750 334974 -rect 633270 334260 633750 334330 -rect 633270 333635 633750 333849 -rect 633270 333064 633750 333134 -rect 633270 331838 633750 331966 -rect 633270 331224 633750 331294 -rect 633270 329384 633750 329454 -rect -424 327272 56 327342 -rect -424 325432 56 325502 -rect -424 324760 56 324888 -rect -424 323592 56 323662 -rect -424 322877 56 323091 -rect -424 322396 56 322466 -rect -424 321752 56 321822 -rect -424 321108 56 321178 -rect -424 320556 56 320626 -rect -424 318072 56 318142 -rect -424 317428 56 317498 -rect -424 316784 56 316854 -rect -424 316232 56 316302 -rect -424 314392 56 314462 -rect -424 313748 56 313818 -rect -424 313104 56 313174 -rect -424 312552 56 312622 +rect 633270 344104 633726 344174 +rect 633270 343552 633726 343622 +rect 633270 342908 633726 342978 +rect 633270 342264 633726 342334 +rect 633270 340424 633726 340494 +rect 633270 339872 633726 339942 +rect 633270 339228 633726 339298 +rect 633270 338584 633726 338654 +rect 633270 336100 633726 336170 +rect 633270 335548 633726 335618 +rect 633270 334904 633726 334974 +rect 633270 334260 633726 334330 +rect 633270 333635 633726 333849 +rect 633270 333064 633726 333134 +rect 633270 331838 633726 331966 +rect 633270 331224 633726 331294 +rect 633270 329384 633726 329454 +rect -400 327272 56 327342 +rect -400 325432 56 325502 +rect -400 324760 56 324888 +rect -400 323592 56 323662 +rect -400 322877 56 323091 +rect -400 322396 56 322466 +rect -400 321752 56 321822 +rect -400 321108 56 321178 +rect -400 320556 56 320626 +rect -400 318072 56 318142 +rect -400 317428 56 317498 +rect -400 316784 56 316854 +rect -400 316232 56 316302 +rect -400 314392 56 314462 +rect -400 313748 56 313818 +rect -400 313104 56 313174 +rect -400 312552 56 312622 rect -400 306644 56 306704 rect -400 304644 56 304704 rect 633270 303006 633726 303068 rect 633270 301005 633726 301067 -rect 633270 298904 633750 298974 -rect 633270 298352 633750 298422 -rect 633270 297708 633750 297778 -rect 633270 297064 633750 297134 -rect 633270 295224 633750 295294 -rect 633270 294672 633750 294742 -rect 633270 294028 633750 294098 -rect 633270 293384 633750 293454 -rect 633270 290900 633750 290970 -rect 633270 290348 633750 290418 -rect 633270 289704 633750 289774 -rect 633270 289060 633750 289130 -rect 633270 288435 633750 288649 -rect 633270 287864 633750 287934 -rect 633270 286638 633750 286766 -rect 633270 286024 633750 286094 -rect 633270 284184 633750 284254 -rect -424 284072 56 284142 -rect -424 282232 56 282302 -rect -424 281560 56 281688 -rect -424 280392 56 280462 -rect -424 279677 56 279891 -rect -424 279196 56 279266 -rect -424 278552 56 278622 -rect -424 277908 56 277978 -rect -424 277356 56 277426 -rect -424 274872 56 274942 -rect -424 274228 56 274298 -rect -424 273584 56 273654 -rect -424 273032 56 273102 -rect -424 271192 56 271262 -rect -424 270548 56 270618 -rect -424 269904 56 269974 -rect -424 269352 56 269422 +rect 633270 298904 633726 298974 +rect 633270 298352 633726 298422 +rect 633270 297708 633726 297778 +rect 633270 297064 633726 297134 +rect 633270 295224 633726 295294 +rect 633270 294672 633726 294742 +rect 633270 294028 633726 294098 +rect 633270 293384 633726 293454 +rect 633270 290900 633726 290970 +rect 633270 290348 633726 290418 +rect 633270 289704 633726 289774 +rect 633270 289060 633726 289130 +rect 633270 288435 633726 288649 +rect 633270 287864 633726 287934 +rect 633270 286638 633726 286766 +rect 633270 286024 633726 286094 +rect 633270 284184 633726 284254 +rect -400 284072 56 284142 +rect -400 282232 56 282302 +rect -400 281560 56 281688 +rect -400 280392 56 280462 +rect -400 279677 56 279891 +rect -400 279196 56 279266 +rect -400 278552 56 278622 +rect -400 277908 56 277978 +rect -400 277356 56 277426 +rect -400 274872 56 274942 +rect -400 274228 56 274298 +rect -400 273584 56 273654 +rect -400 273032 56 273102 +rect -400 271192 56 271262 +rect -400 270548 56 270618 +rect -400 269904 56 269974 +rect -400 269352 56 269422 rect -400 263644 56 263704 rect -400 261644 56 261704 rect 633270 258006 633726 258068 rect 633270 256005 633726 256067 -rect 633270 253904 633750 253974 -rect 633270 253352 633750 253422 -rect 633270 252708 633750 252778 -rect 633270 252064 633750 252134 -rect 633270 250224 633750 250294 -rect 633270 249672 633750 249742 -rect 633270 249028 633750 249098 -rect 633270 248384 633750 248454 -rect 633270 245900 633750 245970 -rect 633270 245348 633750 245418 -rect 633270 244704 633750 244774 -rect 633270 244060 633750 244130 -rect 633270 243435 633750 243649 -rect 633270 242864 633750 242934 -rect 633270 241638 633750 241766 -rect 633270 241024 633750 241094 -rect -424 240872 56 240942 -rect 633270 239184 633750 239254 -rect -424 239032 56 239102 -rect -424 238360 56 238488 -rect -424 237192 56 237262 -rect -424 236477 56 236691 -rect -424 235996 56 236066 -rect -424 235352 56 235422 -rect -424 234708 56 234778 -rect -424 234156 56 234226 -rect -424 231672 56 231742 -rect -424 231028 56 231098 -rect -424 230384 56 230454 -rect -424 229832 56 229902 -rect -424 227992 56 228062 -rect -424 227348 56 227418 -rect -424 226704 56 226774 -rect -424 226152 56 226222 +rect 633270 253904 633726 253974 +rect 633270 253352 633726 253422 +rect 633270 252708 633726 252778 +rect 633270 252064 633726 252134 +rect 633270 250224 633726 250294 +rect 633270 249672 633726 249742 +rect 633270 249028 633726 249098 +rect 633270 248384 633726 248454 +rect 633270 245900 633726 245970 +rect 633270 245348 633726 245418 +rect 633270 244704 633726 244774 +rect 633270 244060 633726 244130 +rect 633270 243435 633726 243649 +rect 633270 242864 633726 242934 +rect 633270 241638 633726 241766 +rect 633270 241024 633726 241094 +rect -400 240872 56 240942 +rect 633270 239184 633726 239254 +rect -400 239032 56 239102 +rect -400 238360 56 238488 +rect -400 237192 56 237262 +rect -400 236477 56 236691 +rect -400 235996 56 236066 +rect -400 235352 56 235422 +rect -400 234708 56 234778 +rect -400 234156 56 234226 +rect -400 231672 56 231742 +rect -400 231028 56 231098 +rect -400 230384 56 230454 +rect -400 229832 56 229902 +rect -400 227992 56 228062 +rect -400 227348 56 227418 +rect -400 226704 56 226774 +rect -400 226152 56 226222 rect -400 220644 56 220704 rect -400 218644 56 218704 rect 633270 213006 633726 213068 rect 633270 211005 633726 211067 -rect 633270 208904 633750 208974 -rect 633270 208352 633750 208422 -rect 633270 207708 633750 207778 -rect 633270 207064 633750 207134 -rect 633270 205224 633750 205294 -rect 633270 204672 633750 204742 -rect 633270 204028 633750 204098 -rect 633270 203384 633750 203454 -rect 633270 200900 633750 200970 -rect 633270 200348 633750 200418 -rect 633270 199704 633750 199774 -rect 633270 199060 633750 199130 -rect 633270 198435 633750 198649 -rect 633270 197864 633750 197934 -rect -424 197672 56 197742 -rect 633270 196638 633750 196766 -rect 633270 196024 633750 196094 -rect -424 195832 56 195902 -rect -424 195160 56 195288 -rect 633270 194184 633750 194254 -rect -424 193992 56 194062 -rect -424 193277 56 193491 -rect -424 192796 56 192866 -rect -424 192152 56 192222 -rect -424 191508 56 191578 -rect -424 190956 56 191026 -rect -424 188472 56 188542 -rect -424 187828 56 187898 -rect -424 187184 56 187254 -rect -424 186632 56 186702 -rect -424 184792 56 184862 -rect -424 184148 56 184218 -rect -424 183504 56 183574 -rect -424 182952 56 183022 +rect 633270 208904 633726 208974 +rect 633270 208352 633726 208422 +rect 633270 207708 633726 207778 +rect 633270 207064 633726 207134 +rect 633270 205224 633726 205294 +rect 633270 204672 633726 204742 +rect 633270 204028 633726 204098 +rect 633270 203384 633726 203454 +rect 633270 200900 633726 200970 +rect 633270 200348 633726 200418 +rect 633270 199704 633726 199774 +rect 633270 199060 633726 199130 +rect 633270 198435 633726 198649 +rect 633270 197864 633726 197934 +rect -400 197672 56 197742 +rect 633270 196638 633726 196766 +rect 633270 196024 633726 196094 +rect -400 195832 56 195902 +rect -400 195160 56 195288 +rect 633270 194184 633726 194254 +rect -400 193992 56 194062 +rect -400 193277 56 193491 +rect -400 192796 56 192866 +rect -400 192152 56 192222 +rect -400 191508 56 191578 +rect -400 190956 56 191026 +rect -400 188472 56 188542 +rect -400 187828 56 187898 +rect -400 187184 56 187254 +rect -400 186632 56 186702 +rect -400 184792 56 184862 +rect -400 184148 56 184218 +rect -400 183504 56 183574 +rect -400 182952 56 183022 rect -400 177644 56 177704 rect -400 175644 56 175704 rect 633270 168006 633726 168068 rect 633270 166005 633726 166067 -rect 633270 163704 633750 163774 -rect 633270 163152 633750 163222 -rect 633270 162508 633750 162578 -rect 633270 161864 633750 161934 -rect 633270 160024 633750 160094 -rect 633270 159472 633750 159542 -rect 633270 158828 633750 158898 -rect 633270 158184 633750 158254 -rect 633270 155700 633750 155770 -rect 633270 155148 633750 155218 -rect -424 154472 56 154542 -rect 633270 154504 633750 154574 -rect 633270 153860 633750 153930 -rect 633270 153235 633750 153449 -rect -424 152632 56 152702 -rect 633270 152664 633750 152734 -rect -424 151960 56 152088 -rect 633270 151438 633750 151566 -rect -424 150792 56 150862 -rect 633270 150824 633750 150894 -rect -424 150077 56 150291 -rect -424 149596 56 149666 -rect -424 148952 56 149022 -rect 633270 148984 633750 149054 -rect -424 148308 56 148378 -rect -424 147756 56 147826 -rect -424 145272 56 145342 -rect -424 144628 56 144698 -rect -424 143984 56 144054 -rect -424 143432 56 143502 -rect -424 141592 56 141662 -rect -424 140948 56 141018 -rect -424 140304 56 140374 -rect -424 139752 56 139822 +rect 633270 163704 633726 163774 +rect 633270 163152 633726 163222 +rect 633270 162508 633726 162578 +rect 633270 161864 633726 161934 +rect 633270 160024 633726 160094 +rect 633270 159472 633726 159542 +rect 633270 158828 633726 158898 +rect 633270 158184 633726 158254 +rect 633270 155700 633726 155770 +rect 633270 155148 633726 155218 +rect -400 154472 56 154542 +rect 633270 154504 633726 154574 +rect 633270 153860 633726 153930 +rect 633270 153235 633726 153449 +rect -400 152632 56 152702 +rect 633270 152664 633726 152734 +rect -400 151960 56 152088 +rect 633270 151438 633726 151566 +rect -400 150792 56 150862 +rect 633270 150824 633726 150894 +rect -400 150077 56 150291 +rect -400 149596 56 149666 +rect -400 148952 56 149022 +rect 633270 148984 633726 149054 +rect -400 148308 56 148378 +rect -400 147756 56 147826 +rect -400 145272 56 145342 +rect -400 144628 56 144698 +rect -400 143984 56 144054 +rect -400 143432 56 143502 +rect -400 141592 56 141662 +rect -400 140948 56 141018 +rect -400 140304 56 140374 +rect -400 139752 56 139822 rect -400 134644 56 134704 rect -400 132644 56 132704 rect 633270 123006 633726 123068 rect 633270 121005 633726 121067 -rect 633270 118704 633750 118774 -rect 633270 118152 633750 118222 -rect 633270 117508 633750 117578 -rect 633270 116864 633750 116934 -rect 633270 115024 633750 115094 -rect 633270 114472 633750 114542 -rect 633270 113828 633750 113898 -rect 633270 113184 633750 113254 -rect 633270 110700 633750 110770 -rect 633270 110148 633750 110218 -rect 633270 109504 633750 109574 -rect 633270 108860 633750 108930 -rect 633270 108235 633750 108449 -rect 633270 107664 633750 107734 -rect 633270 106438 633750 106566 -rect 633270 105824 633750 105894 -rect 633270 103984 633750 104054 -rect -444 78140 56 82920 +rect 633270 118704 633726 118774 +rect 633270 118152 633726 118222 +rect 633270 117508 633726 117578 +rect 633270 116864 633726 116934 +rect 633270 115024 633726 115094 +rect 633270 114472 633726 114542 +rect 633270 113828 633726 113898 +rect 633270 113184 633726 113254 +rect 633270 110700 633726 110770 +rect 633270 110148 633726 110218 +rect 633270 109504 633726 109574 +rect 633270 108860 633726 108930 +rect 633270 108235 633726 108449 +rect 633270 107664 633726 107734 +rect 633270 106438 633726 106566 +rect 633270 105824 633726 105894 +rect 633270 103984 633726 104054 +rect -400 78140 56 82920 rect 633270 78006 633726 78068 rect 633270 76005 633726 76067 -rect 633270 73504 633750 73574 -rect 633270 72952 633750 73022 -rect -444 68162 56 72942 -rect 633270 72308 633750 72378 -rect 633270 71664 633750 71734 -rect 633270 69824 633750 69894 -rect 633270 69272 633750 69342 -rect 633270 68628 633750 68698 -rect 633270 67984 633750 68054 -rect 633270 65500 633750 65570 -rect 633270 64948 633750 65018 -rect 633270 64304 633750 64374 -rect 633270 63660 633750 63730 -rect 633270 63035 633750 63249 -rect 633270 62464 633750 62534 -rect 633270 61238 633750 61366 -rect 633270 60624 633750 60694 -rect 633270 58784 633750 58854 +rect 633270 73504 633726 73574 +rect 633270 72952 633726 73022 +rect -400 68162 56 72942 +rect 633270 72308 633726 72378 +rect 633270 71664 633726 71734 +rect 633270 69824 633726 69894 +rect 633270 69272 633726 69342 +rect 633270 68628 633726 68698 +rect 633270 67984 633726 68054 +rect 633270 65500 633726 65570 +rect 633270 64948 633726 65018 +rect 633270 64304 633726 64374 +rect 633270 63660 633726 63730 +rect 633270 63035 633726 63249 +rect 633270 62464 633726 62534 +rect 633270 61238 633726 61366 +rect 633270 60624 633726 60694 +rect 633270 58784 633726 58854 rect -400 53595 56 53665 rect -400 53372 56 53442 rect -400 53147 56 53217 -rect -444 36014 56 40804 -rect -444 25962 56 30762 -rect 36806 -444 41586 56 -rect 46784 -444 51564 56 -rect 199284 -444 203914 56 -rect 209164 -444 213964 56 -rect 527006 -444 531786 56 -rect 536984 -444 541764 56 -rect 580806 -444 585586 56 -rect 590784 -444 595564 56 +rect -400 36014 56 40804 +rect -400 25962 56 30762 +rect 36806 -400 41586 56 +rect 46784 -400 51564 56 +rect 199284 -400 203914 56 +rect 209164 -400 213964 56 +rect 527006 -400 531786 56 +rect 536984 -400 541764 56 +rect 580806 -400 585586 56 +rect 590784 -400 595564 56 << comment >> rect -400 953326 633726 953726 rect -400 0 0 953326 @@ -1058,548 +922,548 @@ rect 633326 58370 633726 953326 rect 633326 0 633726 58369 rect -400 -400 633726 0 << labels >> -flabel metal2 485870 -424 485926 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[43] +flabel metal2 485870 -400 485926 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[43] port 290 nsew -flabel metal2 s 594004 953270 594060 953750 0 FreeSans 400 90 0 0 gpio_analog_en[15] +flabel metal2 s 594004 953270 594060 953726 0 FreeSans 400 90 0 0 gpio_analog_en[15] port 450 nsew -flabel metal2 s 592716 953270 592772 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[15] +flabel metal2 s 592716 953270 592772 953726 0 FreeSans 400 90 0 0 gpio_analog_pol[15] port 538 nsew -flabel metal2 s 589680 953270 589736 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[15] +flabel metal2 s 589680 953270 589736 953726 0 FreeSans 400 90 0 0 gpio_analog_sel[15] port 494 nsew -flabel metal2 s 593360 953270 593416 953750 0 FreeSans 400 90 0 0 gpio_dm0[15] +flabel metal2 s 593360 953270 593416 953726 0 FreeSans 400 90 0 0 gpio_dm0[15] port 582 nsew -flabel metal2 s 595200 953270 595256 953750 0 FreeSans 400 90 0 0 gpio_dm1[15] +flabel metal2 s 595200 953270 595256 953726 0 FreeSans 400 90 0 0 gpio_dm1[15] port 626 nsew -flabel metal2 s 589036 953270 589092 953750 0 FreeSans 400 90 0 0 gpio_dm2[15] +flabel metal2 s 589036 953270 589092 953726 0 FreeSans 400 90 0 0 gpio_dm2[15] port 670 nsew -flabel metal2 s 588392 953270 588448 953750 0 FreeSans 400 90 0 0 gpio_holdover[15] +flabel metal2 s 588392 953270 588448 953726 0 FreeSans 400 90 0 0 gpio_holdover[15] port 406 nsew -flabel metal2 s 585356 953270 585412 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[15] +flabel metal2 s 585356 953270 585412 953726 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[15] port 274 nsew -flabel metal2 s 592164 953270 592220 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[15] +flabel metal2 s 592164 953270 592220 953726 0 FreeSans 400 90 0 0 gpio_inp_dis[15] port 230 nsew -flabel metal2 s 584712 953270 584768 953750 0 FreeSans 400 90 0 0 gpio_oeb[15] +flabel metal2 s 584712 953270 584768 953726 0 FreeSans 400 90 0 0 gpio_oeb[15] port 186 nsew -flabel metal2 s 587840 953270 587896 953750 0 FreeSans 400 90 0 0 gpio_out[15] +flabel metal2 s 587840 953270 587896 953726 0 FreeSans 400 90 0 0 gpio_out[15] port 142 nsew -flabel metal2 s 597040 953270 597096 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[15] +flabel metal2 s 597040 953270 597096 953726 0 FreeSans 400 90 0 0 gpio_slow_sel[15] port 362 nsew -flabel metal2 s 586000 953270 586056 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[15] +flabel metal2 s 586000 953270 586056 953726 0 FreeSans 400 90 0 0 gpio_vtrip_sel[15] port 318 nsew -flabel metal2 s 598880 953270 598936 953750 0 FreeSans 400 90 0 0 gpio_in[15] +flabel metal2 s 598880 953270 598936 953726 0 FreeSans 400 90 0 0 gpio_in[15] port 714 nsew -flabel metal2 s 492204 953270 492260 953750 0 FreeSans 400 90 0 0 gpio_analog_en[16] +flabel metal2 s 492204 953270 492260 953726 0 FreeSans 400 90 0 0 gpio_analog_en[16] port 449 nsew -flabel metal2 s 490916 953270 490972 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[16] +flabel metal2 s 490916 953270 490972 953726 0 FreeSans 400 90 0 0 gpio_analog_pol[16] port 537 nsew -flabel metal2 s 487880 953270 487936 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[16] +flabel metal2 s 487880 953270 487936 953726 0 FreeSans 400 90 0 0 gpio_analog_sel[16] port 493 nsew -flabel metal2 s 491560 953270 491616 953750 0 FreeSans 400 90 0 0 gpio_dm0[16] +flabel metal2 s 491560 953270 491616 953726 0 FreeSans 400 90 0 0 gpio_dm0[16] port 581 nsew -flabel metal2 s 493400 953270 493456 953750 0 FreeSans 400 90 0 0 gpio_dm1[16] +flabel metal2 s 493400 953270 493456 953726 0 FreeSans 400 90 0 0 gpio_dm1[16] port 625 nsew -flabel metal2 s 487236 953270 487292 953750 0 FreeSans 400 90 0 0 gpio_dm2[16] +flabel metal2 s 487236 953270 487292 953726 0 FreeSans 400 90 0 0 gpio_dm2[16] port 669 nsew -flabel metal2 s 486592 953270 486648 953750 0 FreeSans 400 90 0 0 gpio_holdover[16] +flabel metal2 s 486592 953270 486648 953726 0 FreeSans 400 90 0 0 gpio_holdover[16] port 405 nsew -flabel metal2 s 483556 953270 483612 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[16] +flabel metal2 s 483556 953270 483612 953726 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[16] port 273 nsew -flabel metal2 s 490364 953270 490420 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[16] +flabel metal2 s 490364 953270 490420 953726 0 FreeSans 400 90 0 0 gpio_inp_dis[16] port 229 nsew -flabel metal2 s 482912 953270 482968 953750 0 FreeSans 400 90 0 0 gpio_oeb[16] +flabel metal2 s 482912 953270 482968 953726 0 FreeSans 400 90 0 0 gpio_oeb[16] port 185 nsew -flabel metal2 s 486040 953270 486096 953750 0 FreeSans 400 90 0 0 gpio_out[16] +flabel metal2 s 486040 953270 486096 953726 0 FreeSans 400 90 0 0 gpio_out[16] port 141 nsew -flabel metal2 s 495240 953270 495296 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[16] +flabel metal2 s 495240 953270 495296 953726 0 FreeSans 400 90 0 0 gpio_slow_sel[16] port 361 nsew -flabel metal2 s 484200 953270 484256 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[16] +flabel metal2 s 484200 953270 484256 953726 0 FreeSans 400 90 0 0 gpio_vtrip_sel[16] port 317 nsew -flabel metal2 s 497080 953270 497136 953750 0 FreeSans 400 90 0 0 gpio_in[16] +flabel metal2 s 497080 953270 497136 953726 0 FreeSans 400 90 0 0 gpio_in[16] port 713 nsew -flabel metal2 s 442000 953270 442056 953750 0 FreeSans 400 90 0 0 gpio_dm1[17] +flabel metal2 s 442000 953270 442056 953726 0 FreeSans 400 90 0 0 gpio_dm1[17] port 624 nsew -flabel metal2 s 435836 953270 435892 953750 0 FreeSans 400 90 0 0 gpio_dm2[17] +flabel metal2 s 435836 953270 435892 953726 0 FreeSans 400 90 0 0 gpio_dm2[17] port 668 nsew -flabel metal2 s 435192 953270 435248 953750 0 FreeSans 400 90 0 0 gpio_holdover[17] +flabel metal2 s 435192 953270 435248 953726 0 FreeSans 400 90 0 0 gpio_holdover[17] port 404 nsew -flabel metal2 s 432156 953270 432212 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[17] +flabel metal2 s 432156 953270 432212 953726 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[17] port 272 nsew -flabel metal2 s 438964 953270 439020 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[17] +flabel metal2 s 438964 953270 439020 953726 0 FreeSans 400 90 0 0 gpio_inp_dis[17] port 228 nsew -flabel metal2 s 431512 953270 431568 953750 0 FreeSans 400 90 0 0 gpio_oeb[17] +flabel metal2 s 431512 953270 431568 953726 0 FreeSans 400 90 0 0 gpio_oeb[17] port 184 nsew -flabel metal2 s 434640 953270 434696 953750 0 FreeSans 400 90 0 0 gpio_out[17] +flabel metal2 s 434640 953270 434696 953726 0 FreeSans 400 90 0 0 gpio_out[17] port 140 nsew -flabel metal2 s 443840 953270 443896 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[17] +flabel metal2 s 443840 953270 443896 953726 0 FreeSans 400 90 0 0 gpio_slow_sel[17] port 360 nsew -flabel metal2 s 432800 953270 432856 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[17] +flabel metal2 s 432800 953270 432856 953726 0 FreeSans 400 90 0 0 gpio_vtrip_sel[17] port 316 nsew -flabel metal2 s 445680 953270 445736 953750 0 FreeSans 400 90 0 0 gpio_in[17] +flabel metal2 s 445680 953270 445736 953726 0 FreeSans 400 90 0 0 gpio_in[17] port 712 nsew -flabel metal2 s 351804 953270 351860 953750 0 FreeSans 400 90 0 0 gpio_analog_en[18] +flabel metal2 s 351804 953270 351860 953726 0 FreeSans 400 90 0 0 gpio_analog_en[18] port 447 nsew -flabel metal2 s 350516 953270 350572 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[18] +flabel metal2 s 350516 953270 350572 953726 0 FreeSans 400 90 0 0 gpio_analog_pol[18] port 535 nsew -flabel metal2 s 347480 953270 347536 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[18] +flabel metal2 s 347480 953270 347536 953726 0 FreeSans 400 90 0 0 gpio_analog_sel[18] port 491 nsew -flabel metal2 s 351160 953270 351216 953750 0 FreeSans 400 90 0 0 gpio_dm0[18] +flabel metal2 s 351160 953270 351216 953726 0 FreeSans 400 90 0 0 gpio_dm0[18] port 579 nsew -flabel metal2 s 353000 953270 353056 953750 0 FreeSans 400 90 0 0 gpio_dm1[18] +flabel metal2 s 353000 953270 353056 953726 0 FreeSans 400 90 0 0 gpio_dm1[18] port 623 nsew -flabel metal2 s 346836 953270 346892 953750 0 FreeSans 400 90 0 0 gpio_dm2[18] +flabel metal2 s 346836 953270 346892 953726 0 FreeSans 400 90 0 0 gpio_dm2[18] port 667 nsew -flabel metal2 s 346192 953270 346248 953750 0 FreeSans 400 90 0 0 gpio_holdover[18] +flabel metal2 s 346192 953270 346248 953726 0 FreeSans 400 90 0 0 gpio_holdover[18] port 403 nsew -flabel metal2 s 343156 953270 343212 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[18] +flabel metal2 s 343156 953270 343212 953726 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[18] port 271 nsew -flabel metal2 s 349964 953270 350020 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[18] +flabel metal2 s 349964 953270 350020 953726 0 FreeSans 400 90 0 0 gpio_inp_dis[18] port 227 nsew -flabel metal2 s 342512 953270 342568 953750 0 FreeSans 400 90 0 0 gpio_oeb[18] +flabel metal2 s 342512 953270 342568 953726 0 FreeSans 400 90 0 0 gpio_oeb[18] port 183 nsew -flabel metal2 s 345640 953270 345696 953750 0 FreeSans 400 90 0 0 gpio_out[18] +flabel metal2 s 345640 953270 345696 953726 0 FreeSans 400 90 0 0 gpio_out[18] port 139 nsew -flabel metal2 s 354840 953270 354896 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[18] +flabel metal2 s 354840 953270 354896 953726 0 FreeSans 400 90 0 0 gpio_slow_sel[18] port 359 nsew -flabel metal2 s 343800 953270 343856 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[18] +flabel metal2 s 343800 953270 343856 953726 0 FreeSans 400 90 0 0 gpio_vtrip_sel[18] port 315 nsew -flabel metal2 s 356680 953270 356736 953750 0 FreeSans 400 90 0 0 gpio_in[18] +flabel metal2 s 356680 953270 356736 953726 0 FreeSans 400 90 0 0 gpio_in[18] port 711 nsew -flabel metal2 s 440804 953270 440860 953750 0 FreeSans 400 90 0 0 gpio_analog_en[17] +flabel metal2 s 440804 953270 440860 953726 0 FreeSans 400 90 0 0 gpio_analog_en[17] port 448 nsew -flabel metal2 s 439516 953270 439572 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[17] +flabel metal2 s 439516 953270 439572 953726 0 FreeSans 400 90 0 0 gpio_analog_pol[17] port 536 nsew -flabel metal2 s 436480 953270 436536 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[17] +flabel metal2 s 436480 953270 436536 953726 0 FreeSans 400 90 0 0 gpio_analog_sel[17] port 492 nsew -flabel metal2 s 440160 953270 440216 953750 0 FreeSans 400 90 0 0 gpio_dm0[17] +flabel metal2 s 440160 953270 440216 953726 0 FreeSans 400 90 0 0 gpio_dm0[17] port 580 nsew -flabel metal2 s 253040 953270 253096 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[19] +flabel metal2 s 253040 953270 253096 953726 0 FreeSans 400 90 0 0 gpio_slow_sel[19] port 358 nsew -flabel metal2 s 242000 953270 242056 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[19] +flabel metal2 s 242000 953270 242056 953726 0 FreeSans 400 90 0 0 gpio_vtrip_sel[19] port 314 nsew -flabel metal2 s 254880 953270 254936 953750 0 FreeSans 400 90 0 0 gpio_in[19] +flabel metal2 s 254880 953270 254936 953726 0 FreeSans 400 90 0 0 gpio_in[19] port 710 nsew -flabel metal2 s 198404 953270 198460 953750 0 FreeSans 400 90 0 0 gpio_analog_en[20] +flabel metal2 s 198404 953270 198460 953726 0 FreeSans 400 90 0 0 gpio_analog_en[20] port 445 nsew -flabel metal2 s 197116 953270 197172 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[20] +flabel metal2 s 197116 953270 197172 953726 0 FreeSans 400 90 0 0 gpio_analog_pol[20] port 533 nsew -flabel metal2 s 194080 953270 194136 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[20] +flabel metal2 s 194080 953270 194136 953726 0 FreeSans 400 90 0 0 gpio_analog_sel[20] port 489 nsew -flabel metal2 s 197760 953270 197816 953750 0 FreeSans 400 90 0 0 gpio_dm0[20] +flabel metal2 s 197760 953270 197816 953726 0 FreeSans 400 90 0 0 gpio_dm0[20] port 577 nsew -flabel metal2 s 199600 953270 199656 953750 0 FreeSans 400 90 0 0 gpio_dm1[20] +flabel metal2 s 199600 953270 199656 953726 0 FreeSans 400 90 0 0 gpio_dm1[20] port 621 nsew -flabel metal2 s 193436 953270 193492 953750 0 FreeSans 400 90 0 0 gpio_dm2[20] +flabel metal2 s 193436 953270 193492 953726 0 FreeSans 400 90 0 0 gpio_dm2[20] port 665 nsew -flabel metal2 s 192792 953270 192848 953750 0 FreeSans 400 90 0 0 gpio_holdover[20] +flabel metal2 s 192792 953270 192848 953726 0 FreeSans 400 90 0 0 gpio_holdover[20] port 401 nsew -flabel metal2 s 189756 953270 189812 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[20] +flabel metal2 s 189756 953270 189812 953726 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[20] port 269 nsew -flabel metal2 s 196564 953270 196620 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[20] +flabel metal2 s 196564 953270 196620 953726 0 FreeSans 400 90 0 0 gpio_inp_dis[20] port 225 nsew -flabel metal2 s 189112 953270 189168 953750 0 FreeSans 400 90 0 0 gpio_oeb[20] +flabel metal2 s 189112 953270 189168 953726 0 FreeSans 400 90 0 0 gpio_oeb[20] port 181 nsew -flabel metal2 s 192240 953270 192296 953750 0 FreeSans 400 90 0 0 gpio_out[20] +flabel metal2 s 192240 953270 192296 953726 0 FreeSans 400 90 0 0 gpio_out[20] port 137 nsew -flabel metal2 s 201440 953270 201496 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[20] +flabel metal2 s 201440 953270 201496 953726 0 FreeSans 400 90 0 0 gpio_slow_sel[20] port 357 nsew -flabel metal2 s 190400 953270 190456 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[20] +flabel metal2 s 190400 953270 190456 953726 0 FreeSans 400 90 0 0 gpio_vtrip_sel[20] port 313 nsew -flabel metal2 s 203280 953270 203336 953750 0 FreeSans 400 90 0 0 gpio_in[20] +flabel metal2 s 203280 953270 203336 953726 0 FreeSans 400 90 0 0 gpio_in[20] port 709 nsew -flabel metal2 s 250004 953270 250060 953750 0 FreeSans 400 90 0 0 gpio_analog_en[19] +flabel metal2 s 250004 953270 250060 953726 0 FreeSans 400 90 0 0 gpio_analog_en[19] port 446 nsew -flabel metal2 s 248716 953270 248772 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[19] +flabel metal2 s 248716 953270 248772 953726 0 FreeSans 400 90 0 0 gpio_analog_pol[19] port 534 nsew -flabel metal2 s 245680 953270 245736 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[19] +flabel metal2 s 245680 953270 245736 953726 0 FreeSans 400 90 0 0 gpio_analog_sel[19] port 490 nsew -flabel metal2 s 249360 953270 249416 953750 0 FreeSans 400 90 0 0 gpio_dm0[19] +flabel metal2 s 249360 953270 249416 953726 0 FreeSans 400 90 0 0 gpio_dm0[19] port 578 nsew -flabel metal2 s 251200 953270 251256 953750 0 FreeSans 400 90 0 0 gpio_dm1[19] +flabel metal2 s 251200 953270 251256 953726 0 FreeSans 400 90 0 0 gpio_dm1[19] port 622 nsew -flabel metal2 s 245036 953270 245092 953750 0 FreeSans 400 90 0 0 gpio_dm2[19] +flabel metal2 s 245036 953270 245092 953726 0 FreeSans 400 90 0 0 gpio_dm2[19] port 666 nsew -flabel metal2 s 244392 953270 244448 953750 0 FreeSans 400 90 0 0 gpio_holdover[19] +flabel metal2 s 244392 953270 244448 953726 0 FreeSans 400 90 0 0 gpio_holdover[19] port 402 nsew -flabel metal2 s 241356 953270 241412 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[19] +flabel metal2 s 241356 953270 241412 953726 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[19] port 270 nsew -flabel metal2 s 248164 953270 248220 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[19] +flabel metal2 s 248164 953270 248220 953726 0 FreeSans 400 90 0 0 gpio_inp_dis[19] port 226 nsew -flabel metal2 s 240712 953270 240768 953750 0 FreeSans 400 90 0 0 gpio_oeb[19] +flabel metal2 s 240712 953270 240768 953726 0 FreeSans 400 90 0 0 gpio_oeb[19] port 182 nsew -flabel metal2 s 243840 953270 243896 953750 0 FreeSans 400 90 0 0 gpio_out[19] +flabel metal2 s 243840 953270 243896 953726 0 FreeSans 400 90 0 0 gpio_out[19] port 138 nsew -flabel metal2 s 151880 953270 151936 953750 0 FreeSans 400 90 0 0 gpio_in[21] +flabel metal2 s 151880 953270 151936 953726 0 FreeSans 400 90 0 0 gpio_in[21] port 708 nsew -flabel metal2 s 95604 953270 95660 953750 0 FreeSans 400 90 0 0 gpio_analog_en[22] +flabel metal2 s 95604 953270 95660 953726 0 FreeSans 400 90 0 0 gpio_analog_en[22] port 443 nsew -flabel metal2 s 94316 953270 94372 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[22] +flabel metal2 s 94316 953270 94372 953726 0 FreeSans 400 90 0 0 gpio_analog_pol[22] port 531 nsew -flabel metal2 s 91280 953270 91336 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[22] +flabel metal2 s 91280 953270 91336 953726 0 FreeSans 400 90 0 0 gpio_analog_sel[22] port 487 nsew -flabel metal2 s 94960 953270 95016 953750 0 FreeSans 400 90 0 0 gpio_dm0[22] +flabel metal2 s 94960 953270 95016 953726 0 FreeSans 400 90 0 0 gpio_dm0[22] port 575 nsew -flabel metal2 s 96800 953270 96856 953750 0 FreeSans 400 90 0 0 gpio_dm1[22] +flabel metal2 s 96800 953270 96856 953726 0 FreeSans 400 90 0 0 gpio_dm1[22] port 619 nsew -flabel metal2 s 90636 953270 90692 953750 0 FreeSans 400 90 0 0 gpio_dm2[22] +flabel metal2 s 90636 953270 90692 953726 0 FreeSans 400 90 0 0 gpio_dm2[22] port 663 nsew -flabel metal2 s 89992 953270 90048 953750 0 FreeSans 400 90 0 0 gpio_holdover[22] +flabel metal2 s 89992 953270 90048 953726 0 FreeSans 400 90 0 0 gpio_holdover[22] port 399 nsew -flabel metal2 s 86956 953270 87012 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[22] +flabel metal2 s 86956 953270 87012 953726 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[22] port 267 nsew -flabel metal2 s 93764 953270 93820 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[22] +flabel metal2 s 93764 953270 93820 953726 0 FreeSans 400 90 0 0 gpio_inp_dis[22] port 223 nsew -flabel metal2 s 86312 953270 86368 953750 0 FreeSans 400 90 0 0 gpio_oeb[22] +flabel metal2 s 86312 953270 86368 953726 0 FreeSans 400 90 0 0 gpio_oeb[22] port 179 nsew -flabel metal2 s 89440 953270 89496 953750 0 FreeSans 400 90 0 0 gpio_out[22] +flabel metal2 s 89440 953270 89496 953726 0 FreeSans 400 90 0 0 gpio_out[22] port 135 nsew -flabel metal2 s 98640 953270 98696 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[22] +flabel metal2 s 98640 953270 98696 953726 0 FreeSans 400 90 0 0 gpio_slow_sel[22] port 355 nsew -flabel metal2 s 87600 953270 87656 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[22] +flabel metal2 s 87600 953270 87656 953726 0 FreeSans 400 90 0 0 gpio_vtrip_sel[22] port 311 nsew -flabel metal2 s 100480 953270 100536 953750 0 FreeSans 400 90 0 0 gpio_in[22] +flabel metal2 s 100480 953270 100536 953726 0 FreeSans 400 90 0 0 gpio_in[22] port 707 nsew -flabel metal2 s 44204 953270 44260 953750 0 FreeSans 400 90 0 0 gpio_analog_en[23] +flabel metal2 s 44204 953270 44260 953726 0 FreeSans 400 90 0 0 gpio_analog_en[23] port 442 nsew -flabel metal2 s 42916 953270 42972 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[23] +flabel metal2 s 42916 953270 42972 953726 0 FreeSans 400 90 0 0 gpio_analog_pol[23] port 530 nsew -flabel metal2 s 39880 953270 39936 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[23] +flabel metal2 s 39880 953270 39936 953726 0 FreeSans 400 90 0 0 gpio_analog_sel[23] port 486 nsew -flabel metal2 s 43560 953270 43616 953750 0 FreeSans 400 90 0 0 gpio_dm0[23] +flabel metal2 s 43560 953270 43616 953726 0 FreeSans 400 90 0 0 gpio_dm0[23] port 574 nsew -flabel metal2 s 45400 953270 45456 953750 0 FreeSans 400 90 0 0 gpio_dm1[23] +flabel metal2 s 45400 953270 45456 953726 0 FreeSans 400 90 0 0 gpio_dm1[23] port 618 nsew -flabel metal2 s 39236 953270 39292 953750 0 FreeSans 400 90 0 0 gpio_dm2[23] +flabel metal2 s 39236 953270 39292 953726 0 FreeSans 400 90 0 0 gpio_dm2[23] port 662 nsew -flabel metal2 s 38592 953270 38648 953750 0 FreeSans 400 90 0 0 gpio_holdover[23] +flabel metal2 s 38592 953270 38648 953726 0 FreeSans 400 90 0 0 gpio_holdover[23] port 398 nsew -flabel metal2 s 35556 953270 35612 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[23] +flabel metal2 s 35556 953270 35612 953726 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[23] port 266 nsew -flabel metal2 s 42364 953270 42420 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[23] +flabel metal2 s 42364 953270 42420 953726 0 FreeSans 400 90 0 0 gpio_inp_dis[23] port 222 nsew -flabel metal2 s 34912 953270 34968 953750 0 FreeSans 400 90 0 0 gpio_oeb[23] +flabel metal2 s 34912 953270 34968 953726 0 FreeSans 400 90 0 0 gpio_oeb[23] port 178 nsew -flabel metal2 s 38040 953270 38096 953750 0 FreeSans 400 90 0 0 gpio_out[23] +flabel metal2 s 38040 953270 38096 953726 0 FreeSans 400 90 0 0 gpio_out[23] port 134 nsew -flabel metal2 s 47240 953270 47296 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[23] +flabel metal2 s 47240 953270 47296 953726 0 FreeSans 400 90 0 0 gpio_slow_sel[23] port 354 nsew -flabel metal2 s 36200 953270 36256 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[23] +flabel metal2 s 36200 953270 36256 953726 0 FreeSans 400 90 0 0 gpio_vtrip_sel[23] port 310 nsew -flabel metal2 s 49080 953270 49136 953750 0 FreeSans 400 90 0 0 gpio_in[23] +flabel metal2 s 49080 953270 49136 953726 0 FreeSans 400 90 0 0 gpio_in[23] port 706 nsew -flabel metal2 s 147004 953270 147060 953750 0 FreeSans 400 90 0 0 gpio_analog_en[21] +flabel metal2 s 147004 953270 147060 953726 0 FreeSans 400 90 0 0 gpio_analog_en[21] port 444 nsew -flabel metal2 s 145716 953270 145772 953750 0 FreeSans 400 90 0 0 gpio_analog_pol[21] +flabel metal2 s 145716 953270 145772 953726 0 FreeSans 400 90 0 0 gpio_analog_pol[21] port 532 nsew -flabel metal2 s 142680 953270 142736 953750 0 FreeSans 400 90 0 0 gpio_analog_sel[21] +flabel metal2 s 142680 953270 142736 953726 0 FreeSans 400 90 0 0 gpio_analog_sel[21] port 488 nsew -flabel metal2 s 146360 953270 146416 953750 0 FreeSans 400 90 0 0 gpio_dm0[21] +flabel metal2 s 146360 953270 146416 953726 0 FreeSans 400 90 0 0 gpio_dm0[21] port 576 nsew -flabel metal2 s 148200 953270 148256 953750 0 FreeSans 400 90 0 0 gpio_dm1[21] +flabel metal2 s 148200 953270 148256 953726 0 FreeSans 400 90 0 0 gpio_dm1[21] port 620 nsew -flabel metal2 s 142036 953270 142092 953750 0 FreeSans 400 90 0 0 gpio_dm2[21] +flabel metal2 s 142036 953270 142092 953726 0 FreeSans 400 90 0 0 gpio_dm2[21] port 664 nsew -flabel metal2 s 141392 953270 141448 953750 0 FreeSans 400 90 0 0 gpio_holdover[21] +flabel metal2 s 141392 953270 141448 953726 0 FreeSans 400 90 0 0 gpio_holdover[21] port 400 nsew -flabel metal2 s 138356 953270 138412 953750 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[21] +flabel metal2 s 138356 953270 138412 953726 0 FreeSans 400 90 0 0 gpio_ib_mode_sel[21] port 268 nsew -flabel metal2 s 145164 953270 145220 953750 0 FreeSans 400 90 0 0 gpio_inp_dis[21] +flabel metal2 s 145164 953270 145220 953726 0 FreeSans 400 90 0 0 gpio_inp_dis[21] port 224 nsew -flabel metal2 s 137712 953270 137768 953750 0 FreeSans 400 90 0 0 gpio_oeb[21] +flabel metal2 s 137712 953270 137768 953726 0 FreeSans 400 90 0 0 gpio_oeb[21] port 180 nsew -flabel metal2 s 140840 953270 140896 953750 0 FreeSans 400 90 0 0 gpio_out[21] +flabel metal2 s 140840 953270 140896 953726 0 FreeSans 400 90 0 0 gpio_out[21] port 136 nsew -flabel metal2 s 150040 953270 150096 953750 0 FreeSans 400 90 0 0 gpio_slow_sel[21] +flabel metal2 s 150040 953270 150096 953726 0 FreeSans 400 90 0 0 gpio_slow_sel[21] port 356 nsew -flabel metal2 s 139000 953270 139056 953750 0 FreeSans 400 90 0 0 gpio_vtrip_sel[21] +flabel metal2 s 139000 953270 139056 953726 0 FreeSans 400 90 0 0 gpio_vtrip_sel[21] port 312 nsew -flabel metal2 145190 -424 145246 56 0 FreeSans 400 270 0 0 gpio_in[38] +flabel metal2 145190 -400 145246 56 0 FreeSans 400 270 0 0 gpio_in[38] port 691 nsew -flabel metal2 147030 -424 147086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[38] +flabel metal2 147030 -400 147086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[38] port 339 nsew -flabel metal2 148870 -424 148926 56 0 FreeSans 400 270 0 0 gpio_dm1[38] +flabel metal2 148870 -400 148926 56 0 FreeSans 400 270 0 0 gpio_dm1[38] port 559 nsew -flabel metal2 150710 -424 150766 56 0 FreeSans 400 270 0 0 gpio_dm0[38] +flabel metal2 150710 -400 150766 56 0 FreeSans 400 270 0 0 gpio_dm0[38] port 603 nsew -flabel metal2 151354 -424 151410 56 0 FreeSans 400 270 0 0 gpio_analog_pol[38] +flabel metal2 151354 -400 151410 56 0 FreeSans 400 270 0 0 gpio_analog_pol[38] port 515 nsew -flabel metal2 150066 -424 150122 56 0 FreeSans 400 270 0 0 gpio_analog_en[38] +flabel metal2 150066 -400 150122 56 0 FreeSans 400 270 0 0 gpio_analog_en[38] port 427 nsew -flabel metal2 151906 -424 151962 56 0 FreeSans 400 270 0 0 gpio_inp_dis[38] +flabel metal2 151906 -400 151962 56 0 FreeSans 400 270 0 0 gpio_inp_dis[38] port 207 nsew -flabel metal2 154390 -424 154446 56 0 FreeSans 400 270 0 0 gpio_analog_sel[38] +flabel metal2 154390 -400 154446 56 0 FreeSans 400 270 0 0 gpio_analog_sel[38] port 471 nsew -flabel metal2 155034 -424 155090 56 0 FreeSans 400 270 0 0 gpio_dm2[38] +flabel metal2 155034 -400 155090 56 0 FreeSans 400 270 0 0 gpio_dm2[38] port 647 nsew -flabel metal2 155678 -424 155734 56 0 FreeSans 400 270 0 0 gpio_holdover[38] +flabel metal2 155678 -400 155734 56 0 FreeSans 400 270 0 0 gpio_holdover[38] port 383 nsew -flabel metal2 156230 -424 156286 56 0 FreeSans 400 270 0 0 gpio_out[38] +flabel metal2 156230 -400 156286 56 0 FreeSans 400 270 0 0 gpio_out[38] port 119 nsew -flabel metal2 158070 -424 158126 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[38] +flabel metal2 158070 -400 158126 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[38] port 295 nsew -flabel metal2 158714 -424 158770 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[38] +flabel metal2 158714 -400 158770 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[38] port 251 nsew -flabel metal2 159358 -424 159414 56 0 FreeSans 400 270 0 0 gpio_oeb[38] +flabel metal2 159358 -400 159414 56 0 FreeSans 400 270 0 0 gpio_oeb[38] port 163 nsew -flabel metal2 253790 -424 253846 56 0 FreeSans 400 270 0 0 gpio_in[39] +flabel metal2 253790 -400 253846 56 0 FreeSans 400 270 0 0 gpio_in[39] port 690 nsew -flabel metal2 255630 -424 255686 56 0 FreeSans 400 270 0 0 gpio_slow_sel[39] +flabel metal2 255630 -400 255686 56 0 FreeSans 400 270 0 0 gpio_slow_sel[39] port 338 nsew -flabel metal2 257470 -424 257526 56 0 FreeSans 400 270 0 0 gpio_dm1[39] +flabel metal2 257470 -400 257526 56 0 FreeSans 400 270 0 0 gpio_dm1[39] port 602 nsew -flabel metal2 259310 -424 259366 56 0 FreeSans 400 270 0 0 gpio_dm0[39] +flabel metal2 259310 -400 259366 56 0 FreeSans 400 270 0 0 gpio_dm0[39] port 558 nsew -flabel metal2 259954 -424 260010 56 0 FreeSans 400 270 0 0 gpio_analog_pol[39] +flabel metal2 259954 -400 260010 56 0 FreeSans 400 270 0 0 gpio_analog_pol[39] port 514 nsew -flabel metal2 258666 -424 258722 56 0 FreeSans 400 270 0 0 gpio_analog_en[39] +flabel metal2 258666 -400 258722 56 0 FreeSans 400 270 0 0 gpio_analog_en[39] port 426 nsew -flabel metal2 260506 -424 260562 56 0 FreeSans 400 270 0 0 gpio_inp_dis[39] +flabel metal2 260506 -400 260562 56 0 FreeSans 400 270 0 0 gpio_inp_dis[39] port 206 nsew -flabel metal2 262990 -424 263046 56 0 FreeSans 400 270 0 0 gpio_analog_sel[39] +flabel metal2 262990 -400 263046 56 0 FreeSans 400 270 0 0 gpio_analog_sel[39] port 470 nsew -flabel metal2 263634 -424 263690 56 0 FreeSans 400 270 0 0 gpio_dm2[39] +flabel metal2 263634 -400 263690 56 0 FreeSans 400 270 0 0 gpio_dm2[39] port 646 nsew -flabel metal2 264278 -424 264334 56 0 FreeSans 400 270 0 0 gpio_holdover[39] +flabel metal2 264278 -400 264334 56 0 FreeSans 400 270 0 0 gpio_holdover[39] port 382 nsew -flabel metal2 264830 -424 264886 56 0 FreeSans 400 270 0 0 gpio_out[39] +flabel metal2 264830 -400 264886 56 0 FreeSans 400 270 0 0 gpio_out[39] port 118 nsew -flabel metal2 266670 -424 266726 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[39] +flabel metal2 266670 -400 266726 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[39] port 294 nsew -flabel metal2 267314 -424 267370 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[39] +flabel metal2 267314 -400 267370 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[39] port 250 nsew -flabel metal2 267958 -424 268014 56 0 FreeSans 400 270 0 0 gpio_oeb[39] +flabel metal2 267958 -400 268014 56 0 FreeSans 400 270 0 0 gpio_oeb[39] port 162 nsew -flabel metal2 308590 -424 308646 56 0 FreeSans 400 270 0 0 gpio_in[40] +flabel metal2 308590 -400 308646 56 0 FreeSans 400 270 0 0 gpio_in[40] port 689 nsew -flabel metal2 310430 -424 310486 56 0 FreeSans 400 270 0 0 gpio_slow_sel[40] +flabel metal2 310430 -400 310486 56 0 FreeSans 400 270 0 0 gpio_slow_sel[40] port 337 nsew -flabel metal2 312270 -424 312326 56 0 FreeSans 400 270 0 0 gpio_dm1[40] +flabel metal2 312270 -400 312326 56 0 FreeSans 400 270 0 0 gpio_dm1[40] port 601 nsew -flabel metal2 314110 -424 314166 56 0 FreeSans 400 270 0 0 gpio_dm0[40] +flabel metal2 314110 -400 314166 56 0 FreeSans 400 270 0 0 gpio_dm0[40] port 557 nsew -flabel metal2 314754 -424 314810 56 0 FreeSans 400 270 0 0 gpio_analog_pol[40] +flabel metal2 314754 -400 314810 56 0 FreeSans 400 270 0 0 gpio_analog_pol[40] port 513 nsew -flabel metal2 313466 -424 313522 56 0 FreeSans 400 270 0 0 gpio_analog_en[40] +flabel metal2 313466 -400 313522 56 0 FreeSans 400 270 0 0 gpio_analog_en[40] port 425 nsew -flabel metal2 315306 -424 315362 56 0 FreeSans 400 270 0 0 gpio_inp_dis[40] +flabel metal2 315306 -400 315362 56 0 FreeSans 400 270 0 0 gpio_inp_dis[40] port 205 nsew -flabel metal2 317790 -424 317846 56 0 FreeSans 400 270 0 0 gpio_analog_sel[40] +flabel metal2 317790 -400 317846 56 0 FreeSans 400 270 0 0 gpio_analog_sel[40] port 469 nsew -flabel metal2 318434 -424 318490 56 0 FreeSans 400 270 0 0 gpio_dm2[40] +flabel metal2 318434 -400 318490 56 0 FreeSans 400 270 0 0 gpio_dm2[40] port 645 nsew -flabel metal2 319078 -424 319134 56 0 FreeSans 400 270 0 0 gpio_holdover[40] +flabel metal2 319078 -400 319134 56 0 FreeSans 400 270 0 0 gpio_holdover[40] port 381 nsew -flabel metal2 319630 -424 319686 56 0 FreeSans 400 270 0 0 gpio_out[40] +flabel metal2 319630 -400 319686 56 0 FreeSans 400 270 0 0 gpio_out[40] port 117 nsew -flabel metal2 321470 -424 321526 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[40] +flabel metal2 321470 -400 321526 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[40] port 293 nsew -flabel metal2 322114 -424 322170 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[40] +flabel metal2 322114 -400 322170 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[40] port 249 nsew -flabel metal2 322758 -424 322814 56 0 FreeSans 400 270 0 0 gpio_oeb[40] +flabel metal2 322758 -400 322814 56 0 FreeSans 400 270 0 0 gpio_oeb[40] port 161 nsew -flabel metal2 363390 -424 363446 56 0 FreeSans 400 270 0 0 gpio_in[41] +flabel metal2 363390 -400 363446 56 0 FreeSans 400 270 0 0 gpio_in[41] port 688 nsew -flabel metal2 365230 -424 365286 56 0 FreeSans 400 270 0 0 gpio_slow_sel[41] +flabel metal2 365230 -400 365286 56 0 FreeSans 400 270 0 0 gpio_slow_sel[41] port 336 nsew -flabel metal2 367070 -424 367126 56 0 FreeSans 400 270 0 0 gpio_dm1[41] +flabel metal2 367070 -400 367126 56 0 FreeSans 400 270 0 0 gpio_dm1[41] port 600 nsew -flabel metal2 368910 -424 368966 56 0 FreeSans 400 270 0 0 gpio_dm0[41] +flabel metal2 368910 -400 368966 56 0 FreeSans 400 270 0 0 gpio_dm0[41] port 556 nsew -flabel metal2 369554 -424 369610 56 0 FreeSans 400 270 0 0 gpio_analog_pol[41] +flabel metal2 369554 -400 369610 56 0 FreeSans 400 270 0 0 gpio_analog_pol[41] port 512 nsew -flabel metal2 368266 -424 368322 56 0 FreeSans 400 270 0 0 gpio_analog_en[41] +flabel metal2 368266 -400 368322 56 0 FreeSans 400 270 0 0 gpio_analog_en[41] port 424 nsew -flabel metal2 370106 -424 370162 56 0 FreeSans 400 270 0 0 gpio_inp_dis[41] +flabel metal2 370106 -400 370162 56 0 FreeSans 400 270 0 0 gpio_inp_dis[41] port 204 nsew -flabel metal2 372590 -424 372646 56 0 FreeSans 400 270 0 0 gpio_analog_sel[41] +flabel metal2 372590 -400 372646 56 0 FreeSans 400 270 0 0 gpio_analog_sel[41] port 468 nsew -flabel metal2 373234 -424 373290 56 0 FreeSans 400 270 0 0 gpio_dm2[41] +flabel metal2 373234 -400 373290 56 0 FreeSans 400 270 0 0 gpio_dm2[41] port 644 nsew -flabel metal2 373878 -424 373934 56 0 FreeSans 400 270 0 0 gpio_holdover[41] +flabel metal2 373878 -400 373934 56 0 FreeSans 400 270 0 0 gpio_holdover[41] port 380 nsew -flabel metal2 374430 -424 374486 56 0 FreeSans 400 270 0 0 gpio_out[41] +flabel metal2 374430 -400 374486 56 0 FreeSans 400 270 0 0 gpio_out[41] port 116 nsew -flabel metal2 376270 -424 376326 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[41] +flabel metal2 376270 -400 376326 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[41] port 292 nsew -flabel metal2 376914 -424 376970 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[41] +flabel metal2 376914 -400 376970 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[41] port 248 nsew -flabel metal2 377558 -424 377614 56 0 FreeSans 400 270 0 0 gpio_oeb[41] +flabel metal2 377558 -400 377614 56 0 FreeSans 400 270 0 0 gpio_oeb[41] port 160 nsew -flabel metal2 418190 -424 418246 56 0 FreeSans 400 270 0 0 gpio_in[42] +flabel metal2 418190 -400 418246 56 0 FreeSans 400 270 0 0 gpio_in[42] port 687 nsew -flabel metal2 420030 -424 420086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[42] +flabel metal2 420030 -400 420086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[42] port 335 nsew -flabel metal2 421870 -424 421926 56 0 FreeSans 400 270 0 0 gpio_dm1[42] +flabel metal2 421870 -400 421926 56 0 FreeSans 400 270 0 0 gpio_dm1[42] port 599 nsew -flabel metal2 423710 -424 423766 56 0 FreeSans 400 270 0 0 gpio_dm0[42] +flabel metal2 423710 -400 423766 56 0 FreeSans 400 270 0 0 gpio_dm0[42] port 555 nsew -flabel metal2 424354 -424 424410 56 0 FreeSans 400 270 0 0 gpio_analog_pol[42] +flabel metal2 424354 -400 424410 56 0 FreeSans 400 270 0 0 gpio_analog_pol[42] port 511 nsew -flabel metal2 423066 -424 423122 56 0 FreeSans 400 270 0 0 gpio_analog_en[42] +flabel metal2 423066 -400 423122 56 0 FreeSans 400 270 0 0 gpio_analog_en[42] port 423 nsew -flabel metal2 424906 -424 424962 56 0 FreeSans 400 270 0 0 gpio_inp_dis[42] +flabel metal2 424906 -400 424962 56 0 FreeSans 400 270 0 0 gpio_inp_dis[42] port 203 nsew -flabel metal2 427390 -424 427446 56 0 FreeSans 400 270 0 0 gpio_analog_sel[42] +flabel metal2 427390 -400 427446 56 0 FreeSans 400 270 0 0 gpio_analog_sel[42] port 467 nsew -flabel metal2 428034 -424 428090 56 0 FreeSans 400 270 0 0 gpio_dm2[42] +flabel metal2 428034 -400 428090 56 0 FreeSans 400 270 0 0 gpio_dm2[42] port 643 nsew -flabel metal2 428678 -424 428734 56 0 FreeSans 400 270 0 0 gpio_holdover[42] +flabel metal2 428678 -400 428734 56 0 FreeSans 400 270 0 0 gpio_holdover[42] port 379 nsew -flabel metal2 429230 -424 429286 56 0 FreeSans 400 270 0 0 gpio_out[42] +flabel metal2 429230 -400 429286 56 0 FreeSans 400 270 0 0 gpio_out[42] port 115 nsew -flabel metal2 431070 -424 431126 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[42] +flabel metal2 431070 -400 431126 56 0 FreeSans 400 270 0 0 gpio_vtrip_sel[42] port 291 nsew -flabel metal2 431714 -424 431770 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[42] +flabel metal2 431714 -400 431770 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[42] port 247 nsew -flabel metal2 432358 -424 432414 56 0 FreeSans 400 270 0 0 gpio_oeb[42] +flabel metal2 432358 -400 432414 56 0 FreeSans 400 270 0 0 gpio_oeb[42] port 159 nsew -flabel metal2 472990 -424 473046 56 0 FreeSans 400 270 0 0 gpio_in[43] +flabel metal2 472990 -400 473046 56 0 FreeSans 400 270 0 0 gpio_in[43] port 686 nsew -flabel metal2 474830 -424 474886 56 0 FreeSans 400 270 0 0 gpio_slow_sel[43] +flabel metal2 474830 -400 474886 56 0 FreeSans 400 270 0 0 gpio_slow_sel[43] port 334 nsew -flabel metal2 476670 -424 476726 56 0 FreeSans 400 270 0 0 gpio_dm1[43] +flabel metal2 476670 -400 476726 56 0 FreeSans 400 270 0 0 gpio_dm1[43] port 598 nsew -flabel metal2 478510 -424 478566 56 0 FreeSans 400 270 0 0 gpio_dm0[43] +flabel metal2 478510 -400 478566 56 0 FreeSans 400 270 0 0 gpio_dm0[43] port 554 nsew -flabel metal2 479154 -424 479210 56 0 FreeSans 400 270 0 0 gpio_analog_pol[43] +flabel metal2 479154 -400 479210 56 0 FreeSans 400 270 0 0 gpio_analog_pol[43] port 510 nsew -flabel metal2 477866 -424 477922 56 0 FreeSans 400 270 0 0 gpio_analog_en[43] +flabel metal2 477866 -400 477922 56 0 FreeSans 400 270 0 0 gpio_analog_en[43] port 422 nsew -flabel metal2 479706 -424 479762 56 0 FreeSans 400 270 0 0 gpio_inp_dis[43] +flabel metal2 479706 -400 479762 56 0 FreeSans 400 270 0 0 gpio_inp_dis[43] port 202 nsew -flabel metal2 482190 -424 482246 56 0 FreeSans 400 270 0 0 gpio_analog_sel[43] +flabel metal2 482190 -400 482246 56 0 FreeSans 400 270 0 0 gpio_analog_sel[43] port 466 nsew -flabel metal2 482834 -424 482890 56 0 FreeSans 400 270 0 0 gpio_dm2[43] +flabel metal2 482834 -400 482890 56 0 FreeSans 400 270 0 0 gpio_dm2[43] port 642 nsew -flabel metal2 483478 -424 483534 56 0 FreeSans 400 270 0 0 gpio_holdover[43] +flabel metal2 483478 -400 483534 56 0 FreeSans 400 270 0 0 gpio_holdover[43] port 378 nsew -flabel metal2 484030 -424 484086 56 0 FreeSans 400 270 0 0 gpio_out[43] +flabel metal2 484030 -400 484086 56 0 FreeSans 400 270 0 0 gpio_out[43] port 114 nsew -flabel metal2 486514 -424 486570 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[43] +flabel metal2 486514 -400 486570 56 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[43] port 246 nsew -flabel metal2 487158 -424 487214 56 0 FreeSans 400 270 0 0 gpio_oeb[43] +flabel metal2 487158 -400 487214 56 0 FreeSans 400 270 0 0 gpio_oeb[43] port 158 nsew -flabel metal2 s 584160 953270 584216 953750 0 FreeSans 400 90 0 0 gpio_in_h[15] +flabel metal2 s 584160 953270 584216 953726 0 FreeSans 400 90 0 0 gpio_in_h[15] port 758 nsew -flabel metal2 s 482360 953270 482416 953750 0 FreeSans 400 90 0 0 gpio_in_h[16] +flabel metal2 s 482360 953270 482416 953726 0 FreeSans 400 90 0 0 gpio_in_h[16] port 757 nsew -flabel metal2 s 430960 953270 431016 953750 0 FreeSans 400 90 0 0 gpio_in_h[17] +flabel metal2 s 430960 953270 431016 953726 0 FreeSans 400 90 0 0 gpio_in_h[17] port 756 nsew -flabel metal2 s 341960 953270 342016 953750 0 FreeSans 400 90 0 0 gpio_in_h[18] +flabel metal2 s 341960 953270 342016 953726 0 FreeSans 400 90 0 0 gpio_in_h[18] port 755 nsew -flabel metal2 s 240160 953270 240216 953750 0 FreeSans 400 90 0 0 gpio_in_h[19] +flabel metal2 s 240160 953270 240216 953726 0 FreeSans 400 90 0 0 gpio_in_h[19] port 754 nsew -flabel metal2 s 188560 953270 188616 953750 0 FreeSans 400 90 0 0 gpio_in_h[20] +flabel metal2 s 188560 953270 188616 953726 0 FreeSans 400 90 0 0 gpio_in_h[20] port 753 nsew -flabel metal2 s 137160 953270 137216 953750 0 FreeSans 400 90 0 0 gpio_in_h[21] +flabel metal2 s 137160 953270 137216 953726 0 FreeSans 400 90 0 0 gpio_in_h[21] port 752 nsew -flabel metal2 s 85760 953270 85816 953750 0 FreeSans 400 90 0 0 gpio_in_h[22] +flabel metal2 s 85760 953270 85816 953726 0 FreeSans 400 90 0 0 gpio_in_h[22] port 751 nsew -flabel metal2 s 34360 953270 34416 953750 0 FreeSans 400 90 0 0 gpio_in_h[23] +flabel metal2 s 34360 953270 34416 953726 0 FreeSans 400 90 0 0 gpio_in_h[23] port 750 nsew -flabel metal2 s 159910 -424 159966 56 0 FreeSans 400 90 0 0 gpio_in_h[38] +flabel metal2 s 159910 -400 159966 56 0 FreeSans 400 90 0 0 gpio_in_h[38] port 735 nsew -flabel metal2 s 268510 -424 268566 56 0 FreeSans 400 90 0 0 gpio_in_h[39] +flabel metal2 s 268510 -400 268566 56 0 FreeSans 400 90 0 0 gpio_in_h[39] port 734 nsew -flabel metal2 s 323310 -424 323366 56 0 FreeSans 400 90 0 0 gpio_in_h[40] +flabel metal2 s 323310 -400 323366 56 0 FreeSans 400 90 0 0 gpio_in_h[40] port 733 nsew -flabel metal2 s 378110 -424 378166 56 0 FreeSans 400 90 0 0 gpio_in_h[41] +flabel metal2 s 378110 -400 378166 56 0 FreeSans 400 90 0 0 gpio_in_h[41] port 732 nsew -flabel metal2 s 432910 -424 432966 56 0 FreeSans 400 90 0 0 gpio_in_h[42] +flabel metal2 s 432910 -400 432966 56 0 FreeSans 400 90 0 0 gpio_in_h[42] port 731 nsew -flabel metal2 s 487710 -424 487766 56 0 FreeSans 400 90 0 0 gpio_in_h[43] +flabel metal2 s 487710 -400 487766 56 0 FreeSans 400 90 0 0 gpio_in_h[43] port 730 nsew -flabel metal3 633270 422810 633770 427472 0 FreeSans 3200 90 0 0 vccd1 +flabel metal3 633270 422810 633726 427472 0 FreeSans 3200 90 0 0 vccd1 port 28 nsew -flabel metal3 s 633270 786384 633770 791164 0 FreeSans 3200 90 0 0 vdda1 +flabel metal3 s 633270 786384 633726 791164 0 FreeSans 3200 90 0 0 vdda1 port 24 nsew -flabel metal3 s 633270 471784 633770 476564 0 FreeSans 3200 90 0 0 vdda1 +flabel metal3 s 633270 471784 633726 476564 0 FreeSans 3200 90 0 0 vdda1 port 24 nsew -flabel metal3 s 633270 383584 633770 388364 0 FreeSans 3200 90 0 0 vssa1 +flabel metal3 s 633270 383584 633726 388364 0 FreeSans 3200 90 0 0 vssa1 port 26 nsew -flabel metal3 s 533562 953270 538342 953770 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 533562 953270 538342 953726 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 291362 953270 296142 953770 0 FreeSans 3200 0 0 0 vssio +flabel metal3 291362 953270 296142 953726 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 -444 880014 56 884804 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 -400 880014 56 884804 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 -444 827762 56 832542 0 FreeSans 3200 90 0 0 vddio +flabel metal3 -400 827762 56 832542 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 -444 785562 56 790342 0 FreeSans 3200 90 0 0 vssa2 +flabel metal3 -400 785562 56 790342 0 FreeSans 3200 90 0 0 vssa2 port 27 nsew -flabel metal3 -444 440962 56 445742 0 FreeSans 3200 90 0 0 vdda2 +flabel metal3 -400 440962 56 445742 0 FreeSans 3200 90 0 0 vdda2 port 25 nsew -flabel metal3 -444 68162 56 72942 0 FreeSans 3200 90 0 0 vddio +flabel metal3 -400 68162 56 72942 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 536984 -444 541764 56 0 FreeSans 3200 0 0 0 vssio +flabel metal3 536984 -400 541764 56 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 590784 -444 595564 56 0 FreeSans 3200 0 0 0 vdda +flabel metal3 590784 -400 595564 56 0 FreeSans 3200 0 0 0 vdda port 22 nsew flabel comment s 107715 141850 108715 141850 0 FreeSans 1120000 60 0 0 example -flabel metal3 s 633270 556035 633750 556249 0 FreeSans 400 0 0 0 analog_noesd_io[8] +flabel metal3 s 633270 556035 633726 556249 0 FreeSans 400 0 0 0 analog_noesd_io[8] port 941 nsew -flabel metal3 -264 906644 56 906704 0 FreeSans 400 0 0 0 gpio_loopback_one[24] +flabel metal3 -400 906644 56 906704 0 FreeSans 400 0 0 0 gpio_loopback_one[24] port 837 nsew -flabel metal3 -264 736644 56 736704 0 FreeSans 400 0 0 0 gpio_loopback_one[25] +flabel metal3 -400 736644 56 736704 0 FreeSans 400 0 0 0 gpio_loopback_one[25] port 836 nsew -flabel metal3 -264 693644 56 693704 0 FreeSans 400 0 0 0 gpio_loopback_one[26] +flabel metal3 -400 693644 56 693704 0 FreeSans 400 0 0 0 gpio_loopback_one[26] port 835 nsew -flabel metal3 -264 650644 56 650704 0 FreeSans 400 0 0 0 gpio_loopback_one[27] +flabel metal3 -400 650644 56 650704 0 FreeSans 400 0 0 0 gpio_loopback_one[27] port 834 nsew -flabel metal3 -264 607644 56 607704 0 FreeSans 400 0 0 0 gpio_loopback_one[28] +flabel metal3 -400 607644 56 607704 0 FreeSans 400 0 0 0 gpio_loopback_one[28] port 833 nsew -flabel metal3 -264 564644 56 564704 0 FreeSans 400 0 0 0 gpio_loopback_one[29] +flabel metal3 -400 564644 56 564704 0 FreeSans 400 0 0 0 gpio_loopback_one[29] port 832 nsew -flabel metal3 -264 521644 56 521704 0 FreeSans 400 0 0 0 gpio_loopback_one[30] +flabel metal3 -400 521644 56 521704 0 FreeSans 400 0 0 0 gpio_loopback_one[30] port 831 nsew -flabel metal3 -264 478644 56 478704 0 FreeSans 400 0 0 0 gpio_loopback_one[31] +flabel metal3 -400 478644 56 478704 0 FreeSans 400 0 0 0 gpio_loopback_one[31] port 830 nsew -flabel metal3 -264 349644 56 349704 0 FreeSans 400 0 0 0 gpio_loopback_one[32] +flabel metal3 -400 349644 56 349704 0 FreeSans 400 0 0 0 gpio_loopback_one[32] port 829 nsew -flabel metal3 -264 306644 56 306704 0 FreeSans 400 0 0 0 gpio_loopback_one[33] +flabel metal3 -400 306644 56 306704 0 FreeSans 400 0 0 0 gpio_loopback_one[33] port 828 nsew -flabel metal3 -264 263644 56 263704 0 FreeSans 400 0 0 0 gpio_loopback_one[34] +flabel metal3 -400 263644 56 263704 0 FreeSans 400 0 0 0 gpio_loopback_one[34] port 827 nsew -flabel metal3 -264 220644 56 220704 0 FreeSans 400 0 0 0 gpio_loopback_one[35] +flabel metal3 -400 220644 56 220704 0 FreeSans 400 0 0 0 gpio_loopback_one[35] port 826 nsew -flabel metal3 -264 177644 56 177704 0 FreeSans 400 0 0 0 gpio_loopback_one[36] +flabel metal3 -400 177644 56 177704 0 FreeSans 400 0 0 0 gpio_loopback_one[36] port 825 nsew -flabel metal3 -264 134644 56 134704 0 FreeSans 400 0 0 0 gpio_loopback_one[37] +flabel metal3 -400 134644 56 134704 0 FreeSans 400 0 0 0 gpio_loopback_one[37] port 824 nsew -flabel metal2 s 488380 -260 488432 56 0 FreeSans 400 90 0 0 gpio_loopback_one[43] +flabel metal2 s 488380 -400 488432 56 0 FreeSans 400 90 0 0 gpio_loopback_one[43] port 818 nsew -flabel metal2 s 492635 -260 492687 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[43] +flabel metal2 s 492635 -400 492687 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[43] port 774 nsew -flabel metal2 s 433580 -260 433632 56 0 FreeSans 400 90 0 0 gpio_loopback_one[42] +flabel metal2 s 433580 -400 433632 56 0 FreeSans 400 90 0 0 gpio_loopback_one[42] port 819 nsew -flabel metal2 s 437778 -260 437830 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[42] +flabel metal2 s 437778 -400 437830 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[42] port 775 nsew -flabel metal2 s 378780 -260 378832 56 0 FreeSans 400 90 0 0 gpio_loopback_one[41] +flabel metal2 s 378780 -400 378832 56 0 FreeSans 400 90 0 0 gpio_loopback_one[41] port 820 nsew -flabel metal2 s 382978 -260 383030 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[41] +flabel metal2 s 382978 -400 383030 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[41] port 776 nsew -flabel metal2 s 323980 -260 324032 56 0 FreeSans 400 90 0 0 gpio_loopback_one[40] +flabel metal2 s 323980 -400 324032 56 0 FreeSans 400 90 0 0 gpio_loopback_one[40] port 821 nsew -flabel metal2 s 328165 -282 328217 34 0 FreeSans 400 90 0 0 gpio_loopback_zero[40] +flabel metal2 s 328165 -400 328217 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[40] port 777 nsew -flabel metal2 s 269180 -260 269232 56 0 FreeSans 400 90 0 0 gpio_loopback_one[39] +flabel metal2 s 269180 -400 269232 56 0 FreeSans 400 90 0 0 gpio_loopback_one[39] port 822 nsew -flabel metal2 s 273360 -260 273412 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[39] +flabel metal2 s 273360 -400 273412 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[39] port 778 nsew -flabel metal2 s 160580 -260 160632 56 0 FreeSans 400 90 0 0 gpio_loopback_one[38] +flabel metal2 s 160580 -400 160632 56 0 FreeSans 400 90 0 0 gpio_loopback_one[38] port 823 nsew -flabel metal2 s 163791 -259 163843 57 0 FreeSans 400 90 0 0 gpio_loopback_zero[38] +flabel metal2 s 163791 -400 163843 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[38] port 779 nsew -flabel metal2 s 110164 -116 110220 56 0 FreeSans 400 90 0 0 resetb_l +flabel metal2 s 110164 -400 110220 56 0 FreeSans 400 90 0 0 resetb_l port 37 nsew -flabel metal2 s 99571 -90 99637 56 0 FreeSans 400 90 0 0 resetb_h +flabel metal2 s 99571 -400 99637 56 0 FreeSans 400 90 0 0 resetb_h port 36 nsew -flabel metal3 -284 53372 56 53442 0 FreeSans 400 0 0 0 por_l +flabel metal3 -400 53372 56 53442 0 FreeSans 400 0 0 0 por_l port 35 nsew -flabel metal3 -284 53595 56 53665 0 FreeSans 400 0 0 0 porb_l +flabel metal3 -400 53595 56 53665 0 FreeSans 400 0 0 0 porb_l port 34 nsew -flabel metal2 s 605082 -260 605134 56 0 FreeSans 400 90 0 0 mask_rev[0] +flabel metal2 s 605082 -400 605134 56 0 FreeSans 400 90 0 0 mask_rev[0] port 69 nsew -flabel metal3 -284 53147 56 53217 0 FreeSans 400 0 0 0 porb_h +flabel metal3 -400 53147 56 53217 0 FreeSans 400 0 0 0 porb_h port 33 nsew flabel metal2 578298 953270 578358 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[15] port 846 nsew @@ -1619,1274 +1483,1274 @@ flabel metal2 80698 953270 80758 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[ port 839 nsew flabel metal2 29498 953270 29558 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[23] port 838 nsew -flabel metal3 633270 523005 633590 523067 0 FreeSans 400 0 0 0 gpio_loopback_one[7] +flabel metal3 633270 523005 633726 523067 0 FreeSans 400 0 0 0 gpio_loopback_one[7] port 854 nsew -flabel metal3 633270 346005 633590 346067 0 FreeSans 400 0 0 0 gpio_loopback_one[6] +flabel metal3 633270 346005 633726 346067 0 FreeSans 400 0 0 0 gpio_loopback_one[6] port 855 nsew -flabel metal3 633270 301005 633590 301067 0 FreeSans 400 0 0 0 gpio_loopback_one[5] +flabel metal3 633270 301005 633726 301067 0 FreeSans 400 0 0 0 gpio_loopback_one[5] port 856 nsew -flabel metal3 633270 256005 633590 256067 0 FreeSans 400 0 0 0 gpio_loopback_one[4] +flabel metal3 633270 256005 633726 256067 0 FreeSans 400 0 0 0 gpio_loopback_one[4] port 857 nsew -flabel metal3 633270 211005 633590 211067 0 FreeSans 400 0 0 0 gpio_loopback_one[3] +flabel metal3 633270 211005 633726 211067 0 FreeSans 400 0 0 0 gpio_loopback_one[3] port 858 nsew -flabel metal3 633270 166005 633590 166067 0 FreeSans 400 0 0 0 gpio_loopback_one[2] +flabel metal3 633270 166005 633726 166067 0 FreeSans 400 0 0 0 gpio_loopback_one[2] port 859 nsew -flabel metal3 633270 121005 633590 121067 0 FreeSans 400 0 0 0 gpio_loopback_one[1] +flabel metal3 633270 121005 633726 121067 0 FreeSans 400 0 0 0 gpio_loopback_one[1] port 860 nsew -flabel metal3 633270 76005 633590 76067 0 FreeSans 400 0 0 0 gpio_loopback_one[0] +flabel metal3 633270 76005 633726 76067 0 FreeSans 400 0 0 0 gpio_loopback_one[0] port 861 nsew -flabel metal2 s 605978 -260 606030 56 0 FreeSans 400 90 0 0 mask_rev[4] +flabel metal2 s 605978 -400 606030 56 0 FreeSans 400 90 0 0 mask_rev[4] port 65 nsew -flabel metal2 s 606202 -260 606254 56 0 FreeSans 400 90 0 0 mask_rev[5] +flabel metal2 s 606202 -400 606254 56 0 FreeSans 400 90 0 0 mask_rev[5] port 64 nsew -flabel metal2 s 606426 -260 606478 56 0 FreeSans 400 90 0 0 mask_rev[6] +flabel metal2 s 606426 -400 606478 56 0 FreeSans 400 90 0 0 mask_rev[6] port 63 nsew -flabel metal2 s 606650 -260 606702 56 0 FreeSans 400 90 0 0 mask_rev[7] +flabel metal2 s 606650 -400 606702 56 0 FreeSans 400 90 0 0 mask_rev[7] port 62 nsew -flabel metal2 s 606874 -260 606926 56 0 FreeSans 400 90 0 0 mask_rev[8] +flabel metal2 s 606874 -400 606926 56 0 FreeSans 400 90 0 0 mask_rev[8] port 61 nsew -flabel metal2 s 607098 -260 607150 56 0 FreeSans 400 90 0 0 mask_rev[9] +flabel metal2 s 607098 -400 607150 56 0 FreeSans 400 90 0 0 mask_rev[9] port 60 nsew -flabel metal2 s 607322 -260 607374 56 0 FreeSans 400 90 0 0 mask_rev[10] +flabel metal2 s 607322 -400 607374 56 0 FreeSans 400 90 0 0 mask_rev[10] port 59 nsew -flabel metal2 s 607546 -260 607598 56 0 FreeSans 400 90 0 0 mask_rev[11] +flabel metal2 s 607546 -400 607598 56 0 FreeSans 400 90 0 0 mask_rev[11] port 58 nsew -flabel metal2 s 607770 -260 607822 56 0 FreeSans 400 90 0 0 mask_rev[12] +flabel metal2 s 607770 -400 607822 56 0 FreeSans 400 90 0 0 mask_rev[12] port 57 nsew -flabel metal2 s 607994 -260 608046 56 0 FreeSans 400 90 0 0 mask_rev[13] +flabel metal2 s 607994 -400 608046 56 0 FreeSans 400 90 0 0 mask_rev[13] port 56 nsew -flabel metal2 s 608218 -260 608270 56 0 FreeSans 400 90 0 0 mask_rev[14] +flabel metal2 s 608218 -400 608270 56 0 FreeSans 400 90 0 0 mask_rev[14] port 55 nsew -flabel metal2 s 608442 -260 608494 56 0 FreeSans 400 90 0 0 mask_rev[15] +flabel metal2 s 608442 -400 608494 56 0 FreeSans 400 90 0 0 mask_rev[15] port 54 nsew -flabel metal2 s 608666 -260 608718 56 0 FreeSans 400 90 0 0 mask_rev[16] +flabel metal2 s 608666 -400 608718 56 0 FreeSans 400 90 0 0 mask_rev[16] port 53 nsew -flabel metal2 s 608890 -260 608942 56 0 FreeSans 400 90 0 0 mask_rev[17] +flabel metal2 s 608890 -400 608942 56 0 FreeSans 400 90 0 0 mask_rev[17] port 52 nsew -flabel metal2 s 609114 -260 609166 56 0 FreeSans 400 90 0 0 mask_rev[18] +flabel metal2 s 609114 -400 609166 56 0 FreeSans 400 90 0 0 mask_rev[18] port 51 nsew -flabel metal2 s 609338 -260 609390 56 0 FreeSans 400 90 0 0 mask_rev[19] +flabel metal2 s 609338 -400 609390 56 0 FreeSans 400 90 0 0 mask_rev[19] port 50 nsew -flabel metal2 s 609562 -260 609614 56 0 FreeSans 400 90 0 0 mask_rev[20] +flabel metal2 s 609562 -400 609614 56 0 FreeSans 400 90 0 0 mask_rev[20] port 49 nsew -flabel metal2 s 609786 -260 609838 56 0 FreeSans 400 90 0 0 mask_rev[21] +flabel metal2 s 609786 -400 609838 56 0 FreeSans 400 90 0 0 mask_rev[21] port 48 nsew -flabel metal2 s 610010 -260 610062 56 0 FreeSans 400 90 0 0 mask_rev[22] +flabel metal2 s 610010 -400 610062 56 0 FreeSans 400 90 0 0 mask_rev[22] port 47 nsew -flabel metal2 s 610234 -260 610286 56 0 FreeSans 400 90 0 0 mask_rev[23] +flabel metal2 s 610234 -400 610286 56 0 FreeSans 400 90 0 0 mask_rev[23] port 46 nsew -flabel metal2 s 610458 -260 610510 56 0 FreeSans 400 90 0 0 mask_rev[24] +flabel metal2 s 610458 -400 610510 56 0 FreeSans 400 90 0 0 mask_rev[24] port 45 nsew -flabel metal2 s 610682 -260 610734 56 0 FreeSans 400 90 0 0 mask_rev[25] +flabel metal2 s 610682 -400 610734 56 0 FreeSans 400 90 0 0 mask_rev[25] port 44 nsew -flabel metal2 s 610906 -260 610958 56 0 FreeSans 400 90 0 0 mask_rev[26] +flabel metal2 s 610906 -400 610958 56 0 FreeSans 400 90 0 0 mask_rev[26] port 43 nsew -flabel metal2 s 611130 -260 611182 56 0 FreeSans 400 90 0 0 mask_rev[27] +flabel metal2 s 611130 -400 611182 56 0 FreeSans 400 90 0 0 mask_rev[27] port 42 nsew -flabel metal2 s 611354 -260 611406 56 0 FreeSans 400 90 0 0 mask_rev[28] +flabel metal2 s 611354 -400 611406 56 0 FreeSans 400 90 0 0 mask_rev[28] port 41 nsew -flabel metal2 s 611578 -260 611630 56 0 FreeSans 400 90 0 0 mask_rev[29] +flabel metal2 s 611578 -400 611630 56 0 FreeSans 400 90 0 0 mask_rev[29] port 40 nsew -flabel metal2 s 611802 -260 611854 56 0 FreeSans 400 90 0 0 mask_rev[30] +flabel metal2 s 611802 -400 611854 56 0 FreeSans 400 90 0 0 mask_rev[30] port 39 nsew -flabel metal2 s 612026 -260 612078 56 0 FreeSans 400 90 0 0 mask_rev[31] +flabel metal2 s 612026 -400 612078 56 0 FreeSans 400 90 0 0 mask_rev[31] port 38 nsew -flabel metal2 s 605754 -260 605806 56 0 FreeSans 400 90 0 0 mask_rev[3] +flabel metal2 s 605754 -400 605806 56 0 FreeSans 400 90 0 0 mask_rev[3] port 66 nsew -flabel metal2 s 605530 -260 605582 56 0 FreeSans 400 90 0 0 mask_rev[2] +flabel metal2 s 605530 -400 605582 56 0 FreeSans 400 90 0 0 mask_rev[2] port 67 nsew -flabel metal2 s 605306 -260 605358 56 0 FreeSans 400 90 0 0 mask_rev[1] +flabel metal2 s 605306 -400 605358 56 0 FreeSans 400 90 0 0 mask_rev[1] port 68 nsew -flabel metal3 -264 734644 56 734704 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] +flabel metal3 -400 734644 56 734704 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] port 792 nsew -flabel metal3 -264 648644 56 648704 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] +flabel metal3 -400 648644 56 648704 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] port 790 nsew -flabel metal3 -264 562644 56 562704 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] +flabel metal3 -400 562644 56 562704 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] port 788 nsew -flabel metal3 -264 476644 56 476704 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] +flabel metal3 -400 476644 56 476704 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] port 786 nsew -flabel metal3 -264 304644 56 304704 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] +flabel metal3 -400 304644 56 304704 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] port 784 nsew -flabel metal3 -264 218644 56 218704 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] +flabel metal3 -400 218644 56 218704 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] port 782 nsew -flabel metal3 -264 132644 56 132704 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] +flabel metal3 -400 132644 56 132704 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] port 780 nsew -flabel metal3 -264 904644 56 904704 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] +flabel metal3 -400 904644 56 904704 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] port 793 nsew -flabel metal3 -264 691644 56 691704 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] +flabel metal3 -400 691644 56 691704 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] port 791 nsew -flabel metal3 -264 605644 56 605704 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] +flabel metal3 -400 605644 56 605704 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] port 789 nsew -flabel metal3 -264 519644 56 519704 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] +flabel metal3 -400 519644 56 519704 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] port 787 nsew -flabel metal3 -264 347644 56 347704 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] +flabel metal3 -400 347644 56 347704 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] port 785 nsew -flabel metal3 -264 261644 56 261704 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] +flabel metal3 -400 261644 56 261704 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] port 783 nsew -flabel metal3 -264 175644 56 175704 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] +flabel metal3 -400 175644 56 175704 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] port 781 nsew -flabel metal2 27497 953270 27557 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[23] -port 794 nsew -flabel metal2 78697 953270 78757 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[22] -port 795 nsew -flabel metal2 129897 953270 129957 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[21] -port 796 nsew -flabel metal2 181097 953270 181157 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[20] -port 797 nsew -flabel metal2 232297 953270 232357 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[19] -port 798 nsew -flabel metal2 336697 953270 336757 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[18] -port 799 nsew -flabel metal2 425697 953270 425757 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[17] -port 800 nsew -flabel metal2 476897 953270 476957 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[16] -port 801 nsew -flabel metal2 576297 953270 576357 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[15] -port 802 nsew -flabel metal2 147030 -424 147086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[38] +flabel metal2 147030 -400 147086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[38] port 339 nsew -flabel metal2 145190 -424 145246 56 0 FreeSans 400 270 0 0 gpio_in[38] +flabel metal2 145190 -400 145246 56 0 FreeSans 400 270 0 0 gpio_in[38] port 691 nsew -flabel metal3 46784 -444 51564 56 0 FreeSans 3200 0 0 0 vssa +flabel metal3 46784 -400 51564 56 0 FreeSans 3200 0 0 0 vssa port 23 nsew -flabel metal3 633270 61238 633750 61366 0 FreeSans 400 0 0 0 analog_io[0] +flabel metal3 633270 61238 633726 61366 0 FreeSans 400 0 0 0 analog_io[0] port 905 nsew -flabel metal3 633270 63035 633750 63249 0 FreeSans 400 0 0 0 analog_noesd_io[0] +flabel metal3 633270 63035 633726 63249 0 FreeSans 400 0 0 0 analog_noesd_io[0] port 949 nsew -flabel metal3 633270 108235 633750 108449 0 FreeSans 400 0 0 0 analog_noesd_io[1] +flabel metal3 633270 108235 633726 108449 0 FreeSans 400 0 0 0 analog_noesd_io[1] port 948 nsew -flabel metal3 633270 106438 633750 106566 0 FreeSans 400 0 0 0 analog_io[1] +flabel metal3 633270 106438 633726 106566 0 FreeSans 400 0 0 0 analog_io[1] port 904 nsew -flabel metal3 633270 151438 633750 151566 0 FreeSans 400 0 0 0 analog_io[2] +flabel metal3 633270 151438 633726 151566 0 FreeSans 400 0 0 0 analog_io[2] port 903 nsew -flabel metal3 633270 153235 633750 153449 0 FreeSans 400 0 0 0 analog_noesd_io[2] +flabel metal3 633270 153235 633726 153449 0 FreeSans 400 0 0 0 analog_noesd_io[2] port 947 nsew -flabel metal3 633270 196638 633750 196766 0 FreeSans 400 0 0 0 analog_io[3] +flabel metal3 633270 196638 633726 196766 0 FreeSans 400 0 0 0 analog_io[3] port 902 nsew -flabel metal3 633270 198435 633750 198649 0 FreeSans 400 0 0 0 analog_noesd_io[3] +flabel metal3 633270 198435 633726 198649 0 FreeSans 400 0 0 0 analog_noesd_io[3] port 946 nsew -flabel metal3 633270 241638 633750 241766 0 FreeSans 400 0 0 0 analog_io[4] +flabel metal3 633270 241638 633726 241766 0 FreeSans 400 0 0 0 analog_io[4] port 901 nsew -flabel metal3 633270 243435 633750 243649 0 FreeSans 400 0 0 0 analog_noesd_io[4] +flabel metal3 633270 243435 633726 243649 0 FreeSans 400 0 0 0 analog_noesd_io[4] port 945 nsew -flabel metal3 633270 286638 633750 286766 0 FreeSans 400 0 0 0 analog_io[5] +flabel metal3 633270 286638 633726 286766 0 FreeSans 400 0 0 0 analog_io[5] port 900 nsew -flabel metal3 633270 288435 633750 288649 0 FreeSans 400 0 0 0 analog_noesd_io[5] +flabel metal3 633270 288435 633726 288649 0 FreeSans 400 0 0 0 analog_noesd_io[5] port 944 nsew -flabel metal3 633270 331838 633750 331966 0 FreeSans 400 0 0 0 analog_io[6] +flabel metal3 633270 331838 633726 331966 0 FreeSans 400 0 0 0 analog_io[6] port 899 nsew -flabel metal3 633270 333635 633750 333849 0 FreeSans 400 0 0 0 analog_noesd_io[6] +flabel metal3 633270 333635 633726 333849 0 FreeSans 400 0 0 0 analog_noesd_io[6] port 943 nsew -flabel metal3 s 633270 509038 633750 509166 0 FreeSans 400 0 0 0 analog_io[7] +flabel metal3 s 633270 509038 633726 509166 0 FreeSans 400 0 0 0 analog_io[7] port 898 nsew -flabel metal3 s 633270 510835 633750 511049 0 FreeSans 400 0 0 0 analog_noesd_io[7] +flabel metal3 s 633270 510835 633726 511049 0 FreeSans 400 0 0 0 analog_noesd_io[7] port 942 nsew -flabel metal3 s 633270 554238 633750 554366 0 FreeSans 400 0 0 0 analog_io[8] +flabel metal3 s 633270 554238 633726 554366 0 FreeSans 400 0 0 0 analog_io[8] port 897 nsew -flabel metal3 s 633270 599238 633750 599366 0 FreeSans 400 0 0 0 analog_io[9] +flabel metal3 s 633270 599238 633726 599366 0 FreeSans 400 0 0 0 analog_io[9] port 896 nsew -flabel metal3 s 633270 601035 633750 601249 0 FreeSans 400 0 0 0 analog_noesd_io[9] +flabel metal3 s 633270 601035 633726 601249 0 FreeSans 400 0 0 0 analog_noesd_io[9] port 940 nsew -flabel metal3 s 633270 644438 633750 644566 0 FreeSans 400 0 0 0 analog_io[10] +flabel metal3 s 633270 644438 633726 644566 0 FreeSans 400 0 0 0 analog_io[10] port 895 nsew -flabel metal3 s 633270 646235 633750 646449 0 FreeSans 400 0 0 0 analog_noesd_io[10] +flabel metal3 s 633270 646235 633726 646449 0 FreeSans 400 0 0 0 analog_noesd_io[10] port 939 nsew -flabel metal3 s 633270 689438 633750 689566 0 FreeSans 400 0 0 0 analog_io[11] +flabel metal3 s 633270 689438 633726 689566 0 FreeSans 400 0 0 0 analog_io[11] port 894 nsew -flabel metal3 s 633270 691235 633750 691449 0 FreeSans 400 0 0 0 analog_noesd_io[11] +flabel metal3 s 633270 691235 633726 691449 0 FreeSans 400 0 0 0 analog_noesd_io[11] port 938 nsew -flabel metal3 s 633270 734438 633750 734566 0 FreeSans 400 0 0 0 analog_io[12] +flabel metal3 s 633270 734438 633726 734566 0 FreeSans 400 0 0 0 analog_io[12] port 893 nsew -flabel metal3 s 633270 823638 633750 823766 0 FreeSans 400 0 0 0 analog_io[13] +flabel metal3 s 633270 823638 633726 823766 0 FreeSans 400 0 0 0 analog_io[13] port 892 nsew -flabel metal3 s 633270 912838 633750 912966 0 FreeSans 400 0 0 0 analog_io[14] +flabel metal3 s 633270 912838 633726 912966 0 FreeSans 400 0 0 0 analog_io[14] port 891 nsew -flabel metal3 s 633270 736235 633750 736449 0 FreeSans 400 0 0 0 analog_noesd_io[12] +flabel metal3 s 633270 736235 633726 736449 0 FreeSans 400 0 0 0 analog_noesd_io[12] port 937 nsew -flabel metal3 s 633270 825435 633750 825649 0 FreeSans 400 0 0 0 analog_noesd_io[13] +flabel metal3 s 633270 825435 633726 825649 0 FreeSans 400 0 0 0 analog_noesd_io[13] port 936 nsew -flabel metal3 s 633270 914635 633750 914849 0 FreeSans 400 0 0 0 analog_noesd_io[14] +flabel metal3 s 633270 914635 633726 914849 0 FreeSans 400 0 0 0 analog_noesd_io[14] port 935 nsew -flabel metal2 s 596360 953270 596488 953750 0 FreeSans 400 90 0 0 analog_io[15] +flabel metal2 s 596360 953270 596488 953726 0 FreeSans 400 90 0 0 analog_io[15] port 890 nsew -flabel metal2 s 494560 953270 494688 953750 0 FreeSans 400 90 0 0 analog_io[16] +flabel metal2 s 494560 953270 494688 953726 0 FreeSans 400 90 0 0 analog_io[16] port 889 nsew -flabel metal2 s 443160 953270 443288 953750 0 FreeSans 400 90 0 0 analog_io[17] +flabel metal2 s 443160 953270 443288 953726 0 FreeSans 400 90 0 0 analog_io[17] port 888 nsew -flabel metal2 s 354160 953270 354288 953750 0 FreeSans 400 90 0 0 analog_io[18] +flabel metal2 s 354160 953270 354288 953726 0 FreeSans 400 90 0 0 analog_io[18] port 887 nsew -flabel metal2 s 252360 953270 252488 953750 0 FreeSans 400 90 0 0 analog_io[19] +flabel metal2 s 252360 953270 252488 953726 0 FreeSans 400 90 0 0 analog_io[19] port 886 nsew -flabel metal2 s 200760 953270 200888 953750 0 FreeSans 400 90 0 0 analog_io[20] +flabel metal2 s 200760 953270 200888 953726 0 FreeSans 400 90 0 0 analog_io[20] port 885 nsew -flabel metal2 s 149360 953270 149488 953750 0 FreeSans 400 90 0 0 analog_io[21] +flabel metal2 s 149360 953270 149488 953726 0 FreeSans 400 90 0 0 analog_io[21] port 884 nsew -flabel metal2 s 97960 953270 98088 953750 0 FreeSans 400 90 0 0 analog_io[22] +flabel metal2 s 97960 953270 98088 953726 0 FreeSans 400 90 0 0 analog_io[22] port 883 nsew -flabel metal2 s 46560 953270 46688 953750 0 FreeSans 400 90 0 0 analog_io[23] +flabel metal2 s 46560 953270 46688 953726 0 FreeSans 400 90 0 0 analog_io[23] port 882 nsew -flabel metal2 s 594477 953270 594691 953750 0 FreeSans 400 90 0 0 analog_noesd_io[15] +flabel metal2 s 594477 953270 594691 953726 0 FreeSans 400 90 0 0 analog_noesd_io[15] port 934 nsew -flabel metal2 s 492677 953270 492891 953750 0 FreeSans 400 90 0 0 analog_noesd_io[16] +flabel metal2 s 492677 953270 492891 953726 0 FreeSans 400 90 0 0 analog_noesd_io[16] port 933 nsew -flabel metal2 s 441277 953270 441491 953750 0 FreeSans 400 90 0 0 analog_noesd_io[17] +flabel metal2 s 441277 953270 441491 953726 0 FreeSans 400 90 0 0 analog_noesd_io[17] port 932 nsew -flabel metal2 s 352277 953270 352491 953750 0 FreeSans 400 90 0 0 analog_noesd_io[18] +flabel metal2 s 352277 953270 352491 953726 0 FreeSans 400 90 0 0 analog_noesd_io[18] port 931 nsew -flabel metal2 s 250477 953270 250691 953750 0 FreeSans 400 90 0 0 analog_noesd_io[19] +flabel metal2 s 250477 953270 250691 953726 0 FreeSans 400 90 0 0 analog_noesd_io[19] port 930 nsew -flabel metal2 s 198877 953270 199091 953750 0 FreeSans 400 90 0 0 analog_noesd_io[20] +flabel metal2 s 198877 953270 199091 953726 0 FreeSans 400 90 0 0 analog_noesd_io[20] port 929 nsew -flabel metal2 s 147477 953270 147691 953750 0 FreeSans 400 90 0 0 analog_noesd_io[21] +flabel metal2 s 147477 953270 147691 953726 0 FreeSans 400 90 0 0 analog_noesd_io[21] port 928 nsew -flabel metal2 s 96077 953270 96291 953750 0 FreeSans 400 90 0 0 analog_noesd_io[22] +flabel metal2 s 96077 953270 96291 953726 0 FreeSans 400 90 0 0 analog_noesd_io[22] port 927 nsew -flabel metal2 s 44677 953270 44891 953750 0 FreeSans 400 90 0 0 analog_noesd_io[23] +flabel metal2 s 44677 953270 44891 953726 0 FreeSans 400 90 0 0 analog_noesd_io[23] port 926 nsew -flabel metal3 s -424 754760 56 754888 0 FreeSans 400 0 0 0 analog_io[25] +flabel metal3 s -400 754760 56 754888 0 FreeSans 400 0 0 0 analog_io[25] port 880 nsew -flabel metal3 s -424 711560 56 711688 0 FreeSans 400 0 0 0 analog_io[26] +flabel metal3 s -400 711560 56 711688 0 FreeSans 400 0 0 0 analog_io[26] port 879 nsew -flabel metal3 s -424 668360 56 668488 0 FreeSans 400 0 0 0 analog_io[27] +flabel metal3 s -400 668360 56 668488 0 FreeSans 400 0 0 0 analog_io[27] port 878 nsew -flabel metal3 s -424 625160 56 625288 0 FreeSans 400 0 0 0 analog_io[28] +flabel metal3 s -400 625160 56 625288 0 FreeSans 400 0 0 0 analog_io[28] port 877 nsew -flabel metal3 s -424 581960 56 582088 0 FreeSans 400 0 0 0 analog_io[29] +flabel metal3 s -400 581960 56 582088 0 FreeSans 400 0 0 0 analog_io[29] port 876 nsew -flabel metal3 s -424 538760 56 538888 0 FreeSans 400 0 0 0 analog_io[30] +flabel metal3 s -400 538760 56 538888 0 FreeSans 400 0 0 0 analog_io[30] port 875 nsew -flabel metal3 s -424 495560 56 495688 0 FreeSans 400 0 0 0 analog_io[31] +flabel metal3 s -400 495560 56 495688 0 FreeSans 400 0 0 0 analog_io[31] port 874 nsew -flabel metal3 s -424 367960 56 368088 0 FreeSans 400 0 0 0 analog_io[32] +flabel metal3 s -400 367960 56 368088 0 FreeSans 400 0 0 0 analog_io[32] port 873 nsew -flabel metal3 s -424 324760 56 324888 0 FreeSans 400 0 0 0 analog_io[33] +flabel metal3 s -400 324760 56 324888 0 FreeSans 400 0 0 0 analog_io[33] port 872 nsew -flabel metal3 s -424 281560 56 281688 0 FreeSans 400 0 0 0 analog_io[34] +flabel metal3 s -400 281560 56 281688 0 FreeSans 400 0 0 0 analog_io[34] port 871 nsew -flabel metal3 s -424 238360 56 238488 0 FreeSans 400 0 0 0 analog_io[35] +flabel metal3 s -400 238360 56 238488 0 FreeSans 400 0 0 0 analog_io[35] port 870 nsew -flabel metal3 s -424 195160 56 195288 0 FreeSans 400 0 0 0 analog_io[36] +flabel metal3 s -400 195160 56 195288 0 FreeSans 400 0 0 0 analog_io[36] port 869 nsew -flabel metal3 s -424 151960 56 152088 0 FreeSans 400 0 0 0 analog_io[37] +flabel metal3 s -400 151960 56 152088 0 FreeSans 400 0 0 0 analog_io[37] port 868 nsew -flabel metal3 s -424 752877 56 753091 0 FreeSans 400 0 0 0 analog_noesd_io[25] +flabel metal3 s -400 752877 56 753091 0 FreeSans 400 0 0 0 analog_noesd_io[25] port 924 nsew -flabel metal3 s -424 709677 56 709891 0 FreeSans 400 0 0 0 analog_noesd_io[26] +flabel metal3 s -400 709677 56 709891 0 FreeSans 400 0 0 0 analog_noesd_io[26] port 923 nsew -flabel metal3 s -424 666477 56 666691 0 FreeSans 400 0 0 0 analog_noesd_io[27] +flabel metal3 s -400 666477 56 666691 0 FreeSans 400 0 0 0 analog_noesd_io[27] port 922 nsew -flabel metal3 s -424 623277 56 623491 0 FreeSans 400 0 0 0 analog_noesd_io[28] +flabel metal3 s -400 623277 56 623491 0 FreeSans 400 0 0 0 analog_noesd_io[28] port 921 nsew -flabel metal3 s -424 580077 56 580291 0 FreeSans 400 0 0 0 analog_noesd_io[29] +flabel metal3 s -400 580077 56 580291 0 FreeSans 400 0 0 0 analog_noesd_io[29] port 920 nsew -flabel metal3 s -424 536877 56 537091 0 FreeSans 400 0 0 0 analog_noesd_io[30] +flabel metal3 s -400 536877 56 537091 0 FreeSans 400 0 0 0 analog_noesd_io[30] port 919 nsew -flabel metal3 s -424 366077 56 366291 0 FreeSans 400 0 0 0 analog_noesd_io[32] +flabel metal3 s -400 366077 56 366291 0 FreeSans 400 0 0 0 analog_noesd_io[32] port 917 nsew -flabel metal3 s -424 322877 56 323091 0 FreeSans 400 0 0 0 analog_noesd_io[33] +flabel metal3 s -400 322877 56 323091 0 FreeSans 400 0 0 0 analog_noesd_io[33] port 916 nsew -flabel metal3 s -424 279677 56 279891 0 FreeSans 400 0 0 0 analog_noesd_io[34] +flabel metal3 s -400 279677 56 279891 0 FreeSans 400 0 0 0 analog_noesd_io[34] port 915 nsew -flabel metal3 s -424 236477 56 236691 0 FreeSans 400 0 0 0 analog_noesd_io[35] +flabel metal3 s -400 236477 56 236691 0 FreeSans 400 0 0 0 analog_noesd_io[35] port 914 nsew -flabel metal3 s -424 193277 56 193491 0 FreeSans 400 0 0 0 analog_noesd_io[36] +flabel metal3 s -400 193277 56 193491 0 FreeSans 400 0 0 0 analog_noesd_io[36] port 913 nsew -flabel metal3 s -424 150077 56 150291 0 FreeSans 400 0 0 0 analog_noesd_io[37] +flabel metal3 s -400 150077 56 150291 0 FreeSans 400 0 0 0 analog_noesd_io[37] port 912 nsew -flabel metal2 s 256238 -424 256366 56 0 FreeSans 400 90 0 0 analog_io[39] +flabel metal2 s 256238 -400 256366 56 0 FreeSans 400 90 0 0 analog_io[39] port 866 nsew -flabel metal2 s 311038 -424 311166 56 0 FreeSans 400 90 0 0 analog_io[40] +flabel metal2 s 311038 -400 311166 56 0 FreeSans 400 90 0 0 analog_io[40] port 865 nsew -flabel metal2 s 365838 -424 365966 56 0 FreeSans 400 90 0 0 analog_io[41] +flabel metal2 s 365838 -400 365966 56 0 FreeSans 400 90 0 0 analog_io[41] port 864 nsew -flabel metal2 s 420638 -424 420766 56 0 FreeSans 400 90 0 0 analog_io[42] +flabel metal2 s 420638 -400 420766 56 0 FreeSans 400 90 0 0 analog_io[42] port 863 nsew -flabel metal2 s 475438 -424 475566 56 0 FreeSans 400 90 0 0 analog_io[43] +flabel metal2 s 475438 -400 475566 56 0 FreeSans 400 90 0 0 analog_io[43] port 862 nsew -flabel metal2 s 258035 -424 258249 56 0 FreeSans 400 90 0 0 analog_noesd_io[39] +flabel metal2 s 258035 -400 258249 56 0 FreeSans 400 90 0 0 analog_noesd_io[39] port 910 nsew -flabel metal2 s 312835 -424 313049 56 0 FreeSans 400 90 0 0 analog_noesd_io[40] +flabel metal2 s 312835 -400 313049 56 0 FreeSans 400 90 0 0 analog_noesd_io[40] port 909 nsew -flabel metal2 s 367635 -424 367849 56 0 FreeSans 400 90 0 0 analog_noesd_io[41] +flabel metal2 s 367635 -400 367849 56 0 FreeSans 400 90 0 0 analog_noesd_io[41] port 908 nsew -flabel metal2 s 422435 -424 422649 56 0 FreeSans 400 90 0 0 analog_noesd_io[42] +flabel metal2 s 422435 -400 422649 56 0 FreeSans 400 90 0 0 analog_noesd_io[42] port 907 nsew -flabel metal2 s 477235 -424 477449 56 0 FreeSans 400 90 0 0 analog_noesd_io[43] +flabel metal2 s 477235 -400 477449 56 0 FreeSans 400 90 0 0 analog_noesd_io[43] port 906 nsew -flabel metal2 s 149435 -424 149649 56 0 FreeSans 400 90 0 0 analog_noesd_io[38] +flabel metal2 s 149435 -400 149649 56 0 FreeSans 400 90 0 0 analog_noesd_io[38] port 911 nsew -flabel metal2 s 147638 -424 147766 56 0 FreeSans 400 90 0 0 analog_io[38] +flabel metal2 s 147638 -400 147766 56 0 FreeSans 400 90 0 0 analog_io[38] port 867 nsew -flabel metal2 148870 -424 148926 56 0 FreeSans 400 270 0 0 gpio_dm1[38] +flabel metal2 148870 -400 148926 56 0 FreeSans 400 270 0 0 gpio_dm1[38] port 603 nsew -flabel metal2 150710 -424 150766 56 0 FreeSans 400 270 0 0 gpio_dm0[38] +flabel metal2 150710 -400 150766 56 0 FreeSans 400 270 0 0 gpio_dm0[38] port 559 nsew -flabel metal3 s -424 493677 56 493891 0 FreeSans 400 0 0 0 analog_noesd_io[31] +flabel metal3 s -400 493677 56 493891 0 FreeSans 400 0 0 0 analog_noesd_io[31] port 918 nsew -flabel metal3 s 633270 373606 633770 378386 0 FreeSans 3200 90 0 0 vssa1 +flabel metal3 s 633270 373606 633726 378386 0 FreeSans 3200 90 0 0 vssa1 port 26 nsew -flabel metal3 633270 417722 633770 422512 0 FreeSans 3200 90 0 0 vssd1 +flabel metal3 633270 417722 633726 422512 0 FreeSans 3200 90 0 0 vssd1 port 30 nsew -flabel metal3 633270 427762 633770 432562 0 FreeSans 3200 90 0 0 vssd1 +flabel metal3 633270 427762 633726 432562 0 FreeSans 3200 90 0 0 vssd1 port 30 nsew -flabel metal3 s 633270 461804 633770 466584 0 FreeSans 3200 90 0 0 vdda1 +flabel metal3 s 633270 461804 633726 466584 0 FreeSans 3200 90 0 0 vdda1 port 24 nsew -flabel metal3 633270 568006 633590 568068 0 FreeSans 400 0 0 0 gpio_loopback_one[8] +flabel metal3 633270 568006 633726 568068 0 FreeSans 400 0 0 0 gpio_loopback_one[8] port 853 nsew -flabel metal3 633270 613006 633590 613068 0 FreeSans 400 0 0 0 gpio_loopback_one[9] +flabel metal3 633270 613006 633726 613068 0 FreeSans 400 0 0 0 gpio_loopback_one[9] port 852 nsew -flabel metal3 633270 658006 633590 658068 0 FreeSans 400 0 0 0 gpio_loopback_one[10] +flabel metal3 633270 658006 633726 658068 0 FreeSans 400 0 0 0 gpio_loopback_one[10] port 851 nsew -flabel metal3 633270 703006 633590 703068 0 FreeSans 400 0 0 0 gpio_loopback_one[11] +flabel metal3 633270 703006 633726 703068 0 FreeSans 400 0 0 0 gpio_loopback_one[11] port 850 nsew -flabel metal3 633270 748006 633590 748068 0 FreeSans 400 0 0 0 gpio_loopback_one[12] +flabel metal3 633270 748006 633726 748068 0 FreeSans 400 0 0 0 gpio_loopback_one[12] port 849 nsew -flabel metal3 s 633270 776406 633770 781186 0 FreeSans 3200 90 0 0 vdda1 +flabel metal3 s 633270 776406 633726 781186 0 FreeSans 3200 90 0 0 vdda1 port 24 nsew -flabel metal3 633270 837006 633590 837068 0 FreeSans 400 0 0 0 gpio_loopback_one[13] +flabel metal3 633270 837006 633726 837068 0 FreeSans 400 0 0 0 gpio_loopback_one[13] port 848 nsew -flabel metal3 633270 927006 633590 927068 0 FreeSans 400 0 0 0 gpio_loopback_one[14] +flabel metal3 633270 927006 633726 927068 0 FreeSans 400 0 0 0 gpio_loopback_one[14] port 847 nsew -flabel metal3 s 543542 953270 548322 953770 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 543542 953270 548322 953726 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 301342 953270 306122 953770 0 FreeSans 3200 0 0 0 vssio +flabel metal3 301342 953270 306122 953726 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 -444 875054 56 879716 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 -400 875054 56 879716 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 -444 869964 56 874764 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 -400 869964 56 874764 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 -444 837742 56 842522 0 FreeSans 3200 90 0 0 vddio +flabel metal3 -400 837742 56 842522 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 -444 795542 56 800322 0 FreeSans 3200 90 0 0 vssa2 +flabel metal3 -400 795542 56 800322 0 FreeSans 3200 90 0 0 vssa2 port 27 nsew -flabel metal3 s -424 757272 56 757342 0 FreeSans 400 0 0 0 gpio_in[25] +flabel metal3 s -400 757272 56 757342 0 FreeSans 400 0 0 0 gpio_in[25] port 704 nsew -flabel metal3 s -424 755432 56 755502 0 FreeSans 400 0 0 0 gpio_slow_sel[25] +flabel metal3 s -400 755432 56 755502 0 FreeSans 400 0 0 0 gpio_slow_sel[25] port 352 nsew -flabel metal3 s -424 753592 56 753662 0 FreeSans 400 0 0 0 gpio_dm1[25] +flabel metal3 s -400 753592 56 753662 0 FreeSans 400 0 0 0 gpio_dm1[25] port 616 nsew -flabel metal3 s -424 752396 56 752466 0 FreeSans 400 0 0 0 gpio_analog_en[25] +flabel metal3 s -400 752396 56 752466 0 FreeSans 400 0 0 0 gpio_analog_en[25] port 440 nsew -flabel metal3 s -424 751752 56 751822 0 FreeSans 400 0 0 0 gpio_dm0[25] +flabel metal3 s -400 751752 56 751822 0 FreeSans 400 0 0 0 gpio_dm0[25] port 572 nsew -flabel metal3 s -424 751108 56 751178 0 FreeSans 400 0 0 0 gpio_analog_pol[25] +flabel metal3 s -400 751108 56 751178 0 FreeSans 400 0 0 0 gpio_analog_pol[25] port 528 nsew -flabel metal3 s -424 750556 56 750626 0 FreeSans 400 0 0 0 gpio_inp_dis[25] +flabel metal3 s -400 750556 56 750626 0 FreeSans 400 0 0 0 gpio_inp_dis[25] port 220 nsew -flabel metal3 s -424 748072 56 748142 0 FreeSans 400 0 0 0 gpio_analog_sel[25] +flabel metal3 s -400 748072 56 748142 0 FreeSans 400 0 0 0 gpio_analog_sel[25] port 484 nsew -flabel metal3 s -424 747428 56 747498 0 FreeSans 400 0 0 0 gpio_dm2[25] +flabel metal3 s -400 747428 56 747498 0 FreeSans 400 0 0 0 gpio_dm2[25] port 660 nsew -flabel metal3 s -424 746784 56 746854 0 FreeSans 400 0 0 0 gpio_holdover[25] +flabel metal3 s -400 746784 56 746854 0 FreeSans 400 0 0 0 gpio_holdover[25] port 396 nsew -flabel metal3 s -424 746232 56 746302 0 FreeSans 400 0 0 0 gpio_out[25] +flabel metal3 s -400 746232 56 746302 0 FreeSans 400 0 0 0 gpio_out[25] port 132 nsew -flabel metal3 s -424 744392 56 744462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] +flabel metal3 s -400 744392 56 744462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] port 308 nsew -flabel metal3 s -424 743748 56 743818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] +flabel metal3 s -400 743748 56 743818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] port 264 nsew -flabel metal3 s -424 743104 56 743174 0 FreeSans 400 0 0 0 gpio_oeb[25] +flabel metal3 s -400 743104 56 743174 0 FreeSans 400 0 0 0 gpio_oeb[25] port 176 nsew -flabel metal3 s -424 742552 56 742622 0 FreeSans 400 0 0 0 gpio_in_h[25] +flabel metal3 s -400 742552 56 742622 0 FreeSans 400 0 0 0 gpio_in_h[25] port 748 nsew -flabel metal3 s -424 714072 56 714142 0 FreeSans 400 0 0 0 gpio_in[26] +flabel metal3 s -400 714072 56 714142 0 FreeSans 400 0 0 0 gpio_in[26] port 703 nsew -flabel metal3 s -424 712232 56 712302 0 FreeSans 400 0 0 0 gpio_slow_sel[26] +flabel metal3 s -400 712232 56 712302 0 FreeSans 400 0 0 0 gpio_slow_sel[26] port 351 nsew -flabel metal3 s -424 710392 56 710462 0 FreeSans 400 0 0 0 gpio_dm1[26] +flabel metal3 s -400 710392 56 710462 0 FreeSans 400 0 0 0 gpio_dm1[26] port 615 nsew -flabel metal3 s -424 709196 56 709266 0 FreeSans 400 0 0 0 gpio_analog_en[26] +flabel metal3 s -400 709196 56 709266 0 FreeSans 400 0 0 0 gpio_analog_en[26] port 439 nsew -flabel metal3 s -424 708552 56 708622 0 FreeSans 400 0 0 0 gpio_dm0[26] +flabel metal3 s -400 708552 56 708622 0 FreeSans 400 0 0 0 gpio_dm0[26] port 571 nsew -flabel metal3 s -424 707908 56 707978 0 FreeSans 400 0 0 0 gpio_analog_pol[26] +flabel metal3 s -400 707908 56 707978 0 FreeSans 400 0 0 0 gpio_analog_pol[26] port 527 nsew -flabel metal3 s -424 707356 56 707426 0 FreeSans 400 0 0 0 gpio_inp_dis[26] +flabel metal3 s -400 707356 56 707426 0 FreeSans 400 0 0 0 gpio_inp_dis[26] port 219 nsew -flabel metal3 s -424 704872 56 704942 0 FreeSans 400 0 0 0 gpio_analog_sel[26] +flabel metal3 s -400 704872 56 704942 0 FreeSans 400 0 0 0 gpio_analog_sel[26] port 483 nsew -flabel metal3 s -424 704228 56 704298 0 FreeSans 400 0 0 0 gpio_dm2[26] +flabel metal3 s -400 704228 56 704298 0 FreeSans 400 0 0 0 gpio_dm2[26] port 659 nsew -flabel metal3 s -424 703584 56 703654 0 FreeSans 400 0 0 0 gpio_holdover[26] +flabel metal3 s -400 703584 56 703654 0 FreeSans 400 0 0 0 gpio_holdover[26] port 395 nsew -flabel metal3 s -424 703032 56 703102 0 FreeSans 400 0 0 0 gpio_out[26] +flabel metal3 s -400 703032 56 703102 0 FreeSans 400 0 0 0 gpio_out[26] port 131 nsew -flabel metal3 s -424 701192 56 701262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] +flabel metal3 s -400 701192 56 701262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] port 307 nsew -flabel metal3 s -424 700548 56 700618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] +flabel metal3 s -400 700548 56 700618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] port 263 nsew -flabel metal3 s -424 699904 56 699974 0 FreeSans 400 0 0 0 gpio_oeb[26] +flabel metal3 s -400 699904 56 699974 0 FreeSans 400 0 0 0 gpio_oeb[26] port 175 nsew -flabel metal3 s -424 699352 56 699422 0 FreeSans 400 0 0 0 gpio_in_h[26] +flabel metal3 s -400 699352 56 699422 0 FreeSans 400 0 0 0 gpio_in_h[26] port 747 nsew -flabel metal3 s -424 141592 56 141662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] +flabel metal3 s -400 141592 56 141662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] port 296 nsew -flabel metal3 s -424 149596 56 149666 0 FreeSans 400 0 0 0 gpio_analog_en[37] +flabel metal3 s -400 149596 56 149666 0 FreeSans 400 0 0 0 gpio_analog_en[37] port 428 nsew -flabel metal3 s -424 148308 56 148378 0 FreeSans 400 0 0 0 gpio_analog_pol[37] +flabel metal3 s -400 148308 56 148378 0 FreeSans 400 0 0 0 gpio_analog_pol[37] port 516 nsew -flabel metal3 s -424 145272 56 145342 0 FreeSans 400 0 0 0 gpio_analog_sel[37] +flabel metal3 s -400 145272 56 145342 0 FreeSans 400 0 0 0 gpio_analog_sel[37] port 472 nsew -flabel metal3 s -424 148952 56 149022 0 FreeSans 400 0 0 0 gpio_dm0[37] +flabel metal3 s -400 148952 56 149022 0 FreeSans 400 0 0 0 gpio_dm0[37] port 560 nsew -flabel metal3 s -424 144628 56 144698 0 FreeSans 400 0 0 0 gpio_dm2[37] +flabel metal3 s -400 144628 56 144698 0 FreeSans 400 0 0 0 gpio_dm2[37] port 648 nsew -flabel metal3 s -424 143984 56 144054 0 FreeSans 400 0 0 0 gpio_holdover[37] +flabel metal3 s -400 143984 56 144054 0 FreeSans 400 0 0 0 gpio_holdover[37] port 384 nsew -flabel metal3 s -424 140948 56 141018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] +flabel metal3 s -400 140948 56 141018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] port 252 nsew -flabel metal3 s -424 140304 56 140374 0 FreeSans 400 0 0 0 gpio_oeb[37] +flabel metal3 s -400 140304 56 140374 0 FreeSans 400 0 0 0 gpio_oeb[37] port 164 nsew -flabel metal3 s -424 143432 56 143502 0 FreeSans 400 0 0 0 gpio_out[37] +flabel metal3 s -400 143432 56 143502 0 FreeSans 400 0 0 0 gpio_out[37] port 120 nsew -flabel metal3 s -424 147756 56 147826 0 FreeSans 400 0 0 0 gpio_inp_dis[37] +flabel metal3 s -400 147756 56 147826 0 FreeSans 400 0 0 0 gpio_inp_dis[37] port 208 nsew -flabel metal3 s -424 139752 56 139822 0 FreeSans 400 0 0 0 gpio_in_h[37] +flabel metal3 s -400 139752 56 139822 0 FreeSans 400 0 0 0 gpio_in_h[37] port 736 nsew -flabel metal3 s -424 150792 56 150862 0 FreeSans 400 0 0 0 gpio_dm1[37] +flabel metal3 s -400 150792 56 150862 0 FreeSans 400 0 0 0 gpio_dm1[37] port 604 nsew -flabel metal3 s -424 152632 56 152702 0 FreeSans 400 0 0 0 gpio_slow_sel[37] +flabel metal3 s -400 152632 56 152702 0 FreeSans 400 0 0 0 gpio_slow_sel[37] port 340 nsew -flabel metal3 s -424 154472 56 154542 0 FreeSans 400 0 0 0 gpio_in[37] +flabel metal3 s -400 154472 56 154542 0 FreeSans 400 0 0 0 gpio_in[37] port 692 nsew -flabel metal3 s -424 187828 56 187898 0 FreeSans 400 0 0 0 gpio_dm2[36] +flabel metal3 s -400 187828 56 187898 0 FreeSans 400 0 0 0 gpio_dm2[36] port 649 nsew -flabel metal3 s -424 187184 56 187254 0 FreeSans 400 0 0 0 gpio_holdover[36] +flabel metal3 s -400 187184 56 187254 0 FreeSans 400 0 0 0 gpio_holdover[36] port 385 nsew -flabel metal3 s -424 184148 56 184218 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] +flabel metal3 s -400 184148 56 184218 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] port 253 nsew -flabel metal3 s -424 190956 56 191026 0 FreeSans 400 0 0 0 gpio_inp_dis[36] +flabel metal3 s -400 190956 56 191026 0 FreeSans 400 0 0 0 gpio_inp_dis[36] port 209 nsew -flabel metal3 s -424 183504 56 183574 0 FreeSans 400 0 0 0 gpio_oeb[36] +flabel metal3 s -400 183504 56 183574 0 FreeSans 400 0 0 0 gpio_oeb[36] port 165 nsew -flabel metal3 s -424 186632 56 186702 0 FreeSans 400 0 0 0 gpio_out[36] +flabel metal3 s -400 186632 56 186702 0 FreeSans 400 0 0 0 gpio_out[36] port 121 nsew -flabel metal3 s -424 184792 56 184862 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] +flabel metal3 s -400 184792 56 184862 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] port 297 nsew -flabel metal3 s -424 192796 56 192866 0 FreeSans 400 0 0 0 gpio_analog_en[36] +flabel metal3 s -400 192796 56 192866 0 FreeSans 400 0 0 0 gpio_analog_en[36] port 429 nsew -flabel metal3 s -424 191508 56 191578 0 FreeSans 400 0 0 0 gpio_analog_pol[36] +flabel metal3 s -400 191508 56 191578 0 FreeSans 400 0 0 0 gpio_analog_pol[36] port 517 nsew -flabel metal3 s -424 188472 56 188542 0 FreeSans 400 0 0 0 gpio_analog_sel[36] +flabel metal3 s -400 188472 56 188542 0 FreeSans 400 0 0 0 gpio_analog_sel[36] port 473 nsew -flabel metal3 s -424 192152 56 192222 0 FreeSans 400 0 0 0 gpio_dm0[36] +flabel metal3 s -400 192152 56 192222 0 FreeSans 400 0 0 0 gpio_dm0[36] port 561 nsew -flabel metal3 s -424 182952 56 183022 0 FreeSans 400 0 0 0 gpio_in_h[36] +flabel metal3 s -400 182952 56 183022 0 FreeSans 400 0 0 0 gpio_in_h[36] port 737 nsew -flabel metal3 s -424 193992 56 194062 0 FreeSans 400 0 0 0 gpio_dm1[36] +flabel metal3 s -400 193992 56 194062 0 FreeSans 400 0 0 0 gpio_dm1[36] port 605 nsew -flabel metal3 s -424 195832 56 195902 0 FreeSans 400 0 0 0 gpio_slow_sel[36] +flabel metal3 s -400 195832 56 195902 0 FreeSans 400 0 0 0 gpio_slow_sel[36] port 341 nsew -flabel metal3 s -424 197672 56 197742 0 FreeSans 400 0 0 0 gpio_in[36] +flabel metal3 s -400 197672 56 197742 0 FreeSans 400 0 0 0 gpio_in[36] port 693 nsew -flabel metal3 s -424 235996 56 236066 0 FreeSans 400 0 0 0 gpio_analog_en[35] +flabel metal3 s -400 235996 56 236066 0 FreeSans 400 0 0 0 gpio_analog_en[35] port 430 nsew -flabel metal3 s -424 234708 56 234778 0 FreeSans 400 0 0 0 gpio_analog_pol[35] +flabel metal3 s -400 234708 56 234778 0 FreeSans 400 0 0 0 gpio_analog_pol[35] port 518 nsew -flabel metal3 s -424 231672 56 231742 0 FreeSans 400 0 0 0 gpio_analog_sel[35] +flabel metal3 s -400 231672 56 231742 0 FreeSans 400 0 0 0 gpio_analog_sel[35] port 474 nsew -flabel metal3 s -424 235352 56 235422 0 FreeSans 400 0 0 0 gpio_dm0[35] +flabel metal3 s -400 235352 56 235422 0 FreeSans 400 0 0 0 gpio_dm0[35] port 562 nsew -flabel metal3 s -424 231028 56 231098 0 FreeSans 400 0 0 0 gpio_dm2[35] +flabel metal3 s -400 231028 56 231098 0 FreeSans 400 0 0 0 gpio_dm2[35] port 650 nsew -flabel metal3 s -424 230384 56 230454 0 FreeSans 400 0 0 0 gpio_holdover[35] +flabel metal3 s -400 230384 56 230454 0 FreeSans 400 0 0 0 gpio_holdover[35] port 386 nsew -flabel metal3 s -424 227348 56 227418 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] +flabel metal3 s -400 227348 56 227418 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] port 254 nsew -flabel metal3 s -424 234156 56 234226 0 FreeSans 400 0 0 0 gpio_inp_dis[35] +flabel metal3 s -400 234156 56 234226 0 FreeSans 400 0 0 0 gpio_inp_dis[35] port 210 nsew -flabel metal3 s -424 226704 56 226774 0 FreeSans 400 0 0 0 gpio_oeb[35] +flabel metal3 s -400 226704 56 226774 0 FreeSans 400 0 0 0 gpio_oeb[35] port 166 nsew -flabel metal3 s -424 229832 56 229902 0 FreeSans 400 0 0 0 gpio_out[35] +flabel metal3 s -400 229832 56 229902 0 FreeSans 400 0 0 0 gpio_out[35] port 122 nsew -flabel metal3 s -424 227992 56 228062 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] +flabel metal3 s -400 227992 56 228062 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] port 298 nsew -flabel metal3 s -424 226152 56 226222 0 FreeSans 400 0 0 0 gpio_in_h[35] +flabel metal3 s -400 226152 56 226222 0 FreeSans 400 0 0 0 gpio_in_h[35] port 738 nsew -flabel metal3 s -424 237192 56 237262 0 FreeSans 400 0 0 0 gpio_dm1[35] +flabel metal3 s -400 237192 56 237262 0 FreeSans 400 0 0 0 gpio_dm1[35] port 606 nsew -flabel metal3 s -424 239032 56 239102 0 FreeSans 400 0 0 0 gpio_slow_sel[35] +flabel metal3 s -400 239032 56 239102 0 FreeSans 400 0 0 0 gpio_slow_sel[35] port 342 nsew -flabel metal3 s -424 240872 56 240942 0 FreeSans 400 0 0 0 gpio_in[35] +flabel metal3 s -400 240872 56 240942 0 FreeSans 400 0 0 0 gpio_in[35] port 694 nsew -flabel metal3 s -424 279196 56 279266 0 FreeSans 400 0 0 0 gpio_analog_en[34] +flabel metal3 s -400 279196 56 279266 0 FreeSans 400 0 0 0 gpio_analog_en[34] port 431 nsew -flabel metal3 s -424 277908 56 277978 0 FreeSans 400 0 0 0 gpio_analog_pol[34] +flabel metal3 s -400 277908 56 277978 0 FreeSans 400 0 0 0 gpio_analog_pol[34] port 519 nsew -flabel metal3 s -424 274872 56 274942 0 FreeSans 400 0 0 0 gpio_analog_sel[34] +flabel metal3 s -400 274872 56 274942 0 FreeSans 400 0 0 0 gpio_analog_sel[34] port 475 nsew -flabel metal3 s -424 278552 56 278622 0 FreeSans 400 0 0 0 gpio_dm0[34] +flabel metal3 s -400 278552 56 278622 0 FreeSans 400 0 0 0 gpio_dm0[34] port 563 nsew -flabel metal3 s -424 274228 56 274298 0 FreeSans 400 0 0 0 gpio_dm2[34] +flabel metal3 s -400 274228 56 274298 0 FreeSans 400 0 0 0 gpio_dm2[34] port 651 nsew -flabel metal3 s -424 273584 56 273654 0 FreeSans 400 0 0 0 gpio_holdover[34] +flabel metal3 s -400 273584 56 273654 0 FreeSans 400 0 0 0 gpio_holdover[34] port 387 nsew -flabel metal3 s -424 270548 56 270618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] +flabel metal3 s -400 270548 56 270618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] port 255 nsew -flabel metal3 s -424 277356 56 277426 0 FreeSans 400 0 0 0 gpio_inp_dis[34] +flabel metal3 s -400 277356 56 277426 0 FreeSans 400 0 0 0 gpio_inp_dis[34] port 211 nsew -flabel metal3 s -424 269904 56 269974 0 FreeSans 400 0 0 0 gpio_oeb[34] +flabel metal3 s -400 269904 56 269974 0 FreeSans 400 0 0 0 gpio_oeb[34] port 167 nsew -flabel metal3 s -424 273032 56 273102 0 FreeSans 400 0 0 0 gpio_out[34] +flabel metal3 s -400 273032 56 273102 0 FreeSans 400 0 0 0 gpio_out[34] port 123 nsew -flabel metal3 s -424 271192 56 271262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] +flabel metal3 s -400 271192 56 271262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] port 299 nsew -flabel metal3 s -424 269352 56 269422 0 FreeSans 400 0 0 0 gpio_in_h[34] +flabel metal3 s -400 269352 56 269422 0 FreeSans 400 0 0 0 gpio_in_h[34] port 739 nsew -flabel metal3 s -424 280392 56 280462 0 FreeSans 400 0 0 0 gpio_dm1[34] +flabel metal3 s -400 280392 56 280462 0 FreeSans 400 0 0 0 gpio_dm1[34] port 607 nsew -flabel metal3 s -424 282232 56 282302 0 FreeSans 400 0 0 0 gpio_slow_sel[34] +flabel metal3 s -400 282232 56 282302 0 FreeSans 400 0 0 0 gpio_slow_sel[34] port 343 nsew -flabel metal3 s -424 284072 56 284142 0 FreeSans 400 0 0 0 gpio_in[34] +flabel metal3 s -400 284072 56 284142 0 FreeSans 400 0 0 0 gpio_in[34] port 695 nsew -flabel metal3 s -424 322396 56 322466 0 FreeSans 400 0 0 0 gpio_analog_en[33] +flabel metal3 s -400 322396 56 322466 0 FreeSans 400 0 0 0 gpio_analog_en[33] port 432 nsew -flabel metal3 s -424 318072 56 318142 0 FreeSans 400 0 0 0 gpio_analog_sel[33] +flabel metal3 s -400 318072 56 318142 0 FreeSans 400 0 0 0 gpio_analog_sel[33] port 476 nsew -flabel metal3 s -424 317428 56 317498 0 FreeSans 400 0 0 0 gpio_dm2[33] +flabel metal3 s -400 317428 56 317498 0 FreeSans 400 0 0 0 gpio_dm2[33] port 652 nsew -flabel metal3 s -424 321752 56 321822 0 FreeSans 400 0 0 0 gpio_dm0[33] +flabel metal3 s -400 321752 56 321822 0 FreeSans 400 0 0 0 gpio_dm0[33] port 564 nsew -flabel metal3 s -424 316784 56 316854 0 FreeSans 400 0 0 0 gpio_holdover[33] +flabel metal3 s -400 316784 56 316854 0 FreeSans 400 0 0 0 gpio_holdover[33] port 388 nsew -flabel metal3 s -424 313748 56 313818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] +flabel metal3 s -400 313748 56 313818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] port 256 nsew -flabel metal3 s -424 320556 56 320626 0 FreeSans 400 0 0 0 gpio_inp_dis[33] +flabel metal3 s -400 320556 56 320626 0 FreeSans 400 0 0 0 gpio_inp_dis[33] port 212 nsew -flabel metal3 s -424 313104 56 313174 0 FreeSans 400 0 0 0 gpio_oeb[33] +flabel metal3 s -400 313104 56 313174 0 FreeSans 400 0 0 0 gpio_oeb[33] port 168 nsew -flabel metal3 s -424 316232 56 316302 0 FreeSans 400 0 0 0 gpio_out[33] +flabel metal3 s -400 316232 56 316302 0 FreeSans 400 0 0 0 gpio_out[33] port 124 nsew -flabel metal3 s -424 314392 56 314462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] +flabel metal3 s -400 314392 56 314462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] port 300 nsew -flabel metal3 s -424 312552 56 312622 0 FreeSans 400 0 0 0 gpio_in_h[33] +flabel metal3 s -400 312552 56 312622 0 FreeSans 400 0 0 0 gpio_in_h[33] port 740 nsew -flabel metal3 s -424 321108 56 321178 0 FreeSans 400 0 0 0 gpio_analog_pol[33] +flabel metal3 s -400 321108 56 321178 0 FreeSans 400 0 0 0 gpio_analog_pol[33] port 520 nsew -flabel metal3 s -424 323592 56 323662 0 FreeSans 400 0 0 0 gpio_dm1[33] +flabel metal3 s -400 323592 56 323662 0 FreeSans 400 0 0 0 gpio_dm1[33] port 608 nsew -flabel metal3 s -424 325432 56 325502 0 FreeSans 400 0 0 0 gpio_slow_sel[33] +flabel metal3 s -400 325432 56 325502 0 FreeSans 400 0 0 0 gpio_slow_sel[33] port 344 nsew -flabel metal3 s -424 327272 56 327342 0 FreeSans 400 0 0 0 gpio_in[33] +flabel metal3 s -400 327272 56 327342 0 FreeSans 400 0 0 0 gpio_in[33] port 696 nsew -flabel metal3 s -424 365596 56 365666 0 FreeSans 400 0 0 0 gpio_analog_en[32] +flabel metal3 s -400 365596 56 365666 0 FreeSans 400 0 0 0 gpio_analog_en[32] port 433 nsew -flabel metal3 s -424 364308 56 364378 0 FreeSans 400 0 0 0 gpio_analog_pol[32] +flabel metal3 s -400 364308 56 364378 0 FreeSans 400 0 0 0 gpio_analog_pol[32] port 521 nsew -flabel metal3 s -424 361272 56 361342 0 FreeSans 400 0 0 0 gpio_analog_sel[32] +flabel metal3 s -400 361272 56 361342 0 FreeSans 400 0 0 0 gpio_analog_sel[32] port 477 nsew -flabel metal3 s -424 364952 56 365022 0 FreeSans 400 0 0 0 gpio_dm0[32] +flabel metal3 s -400 364952 56 365022 0 FreeSans 400 0 0 0 gpio_dm0[32] port 565 nsew -flabel metal3 s -424 360628 56 360698 0 FreeSans 400 0 0 0 gpio_dm2[32] +flabel metal3 s -400 360628 56 360698 0 FreeSans 400 0 0 0 gpio_dm2[32] port 653 nsew -flabel metal3 s -424 359984 56 360054 0 FreeSans 400 0 0 0 gpio_holdover[32] +flabel metal3 s -400 359984 56 360054 0 FreeSans 400 0 0 0 gpio_holdover[32] port 389 nsew -flabel metal3 s -424 356948 56 357018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] +flabel metal3 s -400 356948 56 357018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] port 257 nsew -flabel metal3 s -424 363756 56 363826 0 FreeSans 400 0 0 0 gpio_inp_dis[32] +flabel metal3 s -400 363756 56 363826 0 FreeSans 400 0 0 0 gpio_inp_dis[32] port 213 nsew -flabel metal3 s -424 356304 56 356374 0 FreeSans 400 0 0 0 gpio_oeb[32] +flabel metal3 s -400 356304 56 356374 0 FreeSans 400 0 0 0 gpio_oeb[32] port 169 nsew -flabel metal3 s -424 359432 56 359502 0 FreeSans 400 0 0 0 gpio_out[32] +flabel metal3 s -400 359432 56 359502 0 FreeSans 400 0 0 0 gpio_out[32] port 125 nsew -flabel metal3 s -424 357592 56 357662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] +flabel metal3 s -400 357592 56 357662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] port 301 nsew -flabel metal3 s -424 355752 56 355822 0 FreeSans 400 0 0 0 gpio_in_h[32] +flabel metal3 s -400 355752 56 355822 0 FreeSans 400 0 0 0 gpio_in_h[32] port 741 nsew -flabel metal3 s -424 366792 56 366862 0 FreeSans 400 0 0 0 gpio_dm1[32] +flabel metal3 s -400 366792 56 366862 0 FreeSans 400 0 0 0 gpio_dm1[32] port 609 nsew -flabel metal3 s -424 368632 56 368702 0 FreeSans 400 0 0 0 gpio_slow_sel[32] +flabel metal3 s -400 368632 56 368702 0 FreeSans 400 0 0 0 gpio_slow_sel[32] port 345 nsew -flabel metal3 s -424 370472 56 370542 0 FreeSans 400 0 0 0 gpio_in[32] +flabel metal3 s -400 370472 56 370542 0 FreeSans 400 0 0 0 gpio_in[32] port 697 nsew -flabel metal3 s -424 493196 56 493266 0 FreeSans 400 0 0 0 gpio_analog_en[31] +flabel metal3 s -400 493196 56 493266 0 FreeSans 400 0 0 0 gpio_analog_en[31] port 434 nsew -flabel metal3 s -424 491908 56 491978 0 FreeSans 400 0 0 0 gpio_analog_pol[31] +flabel metal3 s -400 491908 56 491978 0 FreeSans 400 0 0 0 gpio_analog_pol[31] port 522 nsew -flabel metal3 s -424 488872 56 488942 0 FreeSans 400 0 0 0 gpio_analog_sel[31] +flabel metal3 s -400 488872 56 488942 0 FreeSans 400 0 0 0 gpio_analog_sel[31] port 478 nsew -flabel metal3 s -424 492552 56 492622 0 FreeSans 400 0 0 0 gpio_dm0[31] +flabel metal3 s -400 492552 56 492622 0 FreeSans 400 0 0 0 gpio_dm0[31] port 566 nsew -flabel metal3 s -424 488228 56 488298 0 FreeSans 400 0 0 0 gpio_dm2[31] +flabel metal3 s -400 488228 56 488298 0 FreeSans 400 0 0 0 gpio_dm2[31] port 654 nsew -flabel metal3 s -424 487584 56 487654 0 FreeSans 400 0 0 0 gpio_holdover[31] +flabel metal3 s -400 487584 56 487654 0 FreeSans 400 0 0 0 gpio_holdover[31] port 390 nsew -flabel metal3 s -424 484548 56 484618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] +flabel metal3 s -400 484548 56 484618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] port 258 nsew -flabel metal3 s -424 491356 56 491426 0 FreeSans 400 0 0 0 gpio_inp_dis[31] +flabel metal3 s -400 491356 56 491426 0 FreeSans 400 0 0 0 gpio_inp_dis[31] port 214 nsew -flabel metal3 s -424 483904 56 483974 0 FreeSans 400 0 0 0 gpio_oeb[31] +flabel metal3 s -400 483904 56 483974 0 FreeSans 400 0 0 0 gpio_oeb[31] port 170 nsew -flabel metal3 s -424 487032 56 487102 0 FreeSans 400 0 0 0 gpio_out[31] +flabel metal3 s -400 487032 56 487102 0 FreeSans 400 0 0 0 gpio_out[31] port 126 nsew -flabel metal3 s -424 485192 56 485262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] +flabel metal3 s -400 485192 56 485262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] port 302 nsew -flabel metal3 s -424 483352 56 483422 0 FreeSans 400 0 0 0 gpio_in_h[31] +flabel metal3 s -400 483352 56 483422 0 FreeSans 400 0 0 0 gpio_in_h[31] port 742 nsew -flabel metal3 s -424 494392 56 494462 0 FreeSans 400 0 0 0 gpio_dm1[31] +flabel metal3 s -400 494392 56 494462 0 FreeSans 400 0 0 0 gpio_dm1[31] port 610 nsew -flabel metal3 s -424 496232 56 496302 0 FreeSans 400 0 0 0 gpio_slow_sel[31] +flabel metal3 s -400 496232 56 496302 0 FreeSans 400 0 0 0 gpio_slow_sel[31] port 346 nsew -flabel metal3 s -424 498072 56 498142 0 FreeSans 400 0 0 0 gpio_in[31] +flabel metal3 s -400 498072 56 498142 0 FreeSans 400 0 0 0 gpio_in[31] port 698 nsew -flabel metal3 s -424 535752 56 535822 0 FreeSans 400 0 0 0 gpio_dm0[30] +flabel metal3 s -400 535752 56 535822 0 FreeSans 400 0 0 0 gpio_dm0[30] port 567 nsew -flabel metal3 s -424 531428 56 531498 0 FreeSans 400 0 0 0 gpio_dm2[30] +flabel metal3 s -400 531428 56 531498 0 FreeSans 400 0 0 0 gpio_dm2[30] port 655 nsew -flabel metal3 s -424 530784 56 530854 0 FreeSans 400 0 0 0 gpio_holdover[30] +flabel metal3 s -400 530784 56 530854 0 FreeSans 400 0 0 0 gpio_holdover[30] port 391 nsew -flabel metal3 s -424 527748 56 527818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] +flabel metal3 s -400 527748 56 527818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] port 259 nsew -flabel metal3 s -424 534556 56 534626 0 FreeSans 400 0 0 0 gpio_inp_dis[30] +flabel metal3 s -400 534556 56 534626 0 FreeSans 400 0 0 0 gpio_inp_dis[30] port 215 nsew -flabel metal3 s -424 527104 56 527174 0 FreeSans 400 0 0 0 gpio_oeb[30] +flabel metal3 s -400 527104 56 527174 0 FreeSans 400 0 0 0 gpio_oeb[30] port 171 nsew -flabel metal3 s -424 530232 56 530302 0 FreeSans 400 0 0 0 gpio_out[30] +flabel metal3 s -400 530232 56 530302 0 FreeSans 400 0 0 0 gpio_out[30] port 127 nsew -flabel metal3 s -424 528392 56 528462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] +flabel metal3 s -400 528392 56 528462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] port 303 nsew -flabel metal3 s -424 536396 56 536466 0 FreeSans 400 0 0 0 gpio_analog_en[30] +flabel metal3 s -400 536396 56 536466 0 FreeSans 400 0 0 0 gpio_analog_en[30] port 435 nsew -flabel metal3 s -424 535108 56 535178 0 FreeSans 400 0 0 0 gpio_analog_pol[30] +flabel metal3 s -400 535108 56 535178 0 FreeSans 400 0 0 0 gpio_analog_pol[30] port 523 nsew -flabel metal3 s -424 532072 56 532142 0 FreeSans 400 0 0 0 gpio_analog_sel[30] +flabel metal3 s -400 532072 56 532142 0 FreeSans 400 0 0 0 gpio_analog_sel[30] port 479 nsew -flabel metal3 s -424 526552 56 526622 0 FreeSans 400 0 0 0 gpio_in_h[30] +flabel metal3 s -400 526552 56 526622 0 FreeSans 400 0 0 0 gpio_in_h[30] port 743 nsew -flabel metal3 s -424 537592 56 537662 0 FreeSans 400 0 0 0 gpio_dm1[30] +flabel metal3 s -400 537592 56 537662 0 FreeSans 400 0 0 0 gpio_dm1[30] port 611 nsew -flabel metal3 s -424 539432 56 539502 0 FreeSans 400 0 0 0 gpio_slow_sel[30] +flabel metal3 s -400 539432 56 539502 0 FreeSans 400 0 0 0 gpio_slow_sel[30] port 347 nsew -flabel metal3 s -424 541272 56 541342 0 FreeSans 400 0 0 0 gpio_in[30] +flabel metal3 s -400 541272 56 541342 0 FreeSans 400 0 0 0 gpio_in[30] port 699 nsew -flabel metal3 s -424 575272 56 575342 0 FreeSans 400 0 0 0 gpio_analog_sel[29] +flabel metal3 s -400 575272 56 575342 0 FreeSans 400 0 0 0 gpio_analog_sel[29] port 480 nsew -flabel metal3 s -424 574628 56 574698 0 FreeSans 400 0 0 0 gpio_dm2[29] +flabel metal3 s -400 574628 56 574698 0 FreeSans 400 0 0 0 gpio_dm2[29] port 656 nsew -flabel metal3 s -424 573984 56 574054 0 FreeSans 400 0 0 0 gpio_holdover[29] +flabel metal3 s -400 573984 56 574054 0 FreeSans 400 0 0 0 gpio_holdover[29] port 392 nsew -flabel metal3 s -424 570948 56 571018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] +flabel metal3 s -400 570948 56 571018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] port 260 nsew -flabel metal3 s -424 570304 56 570374 0 FreeSans 400 0 0 0 gpio_oeb[29] +flabel metal3 s -400 570304 56 570374 0 FreeSans 400 0 0 0 gpio_oeb[29] port 172 nsew -flabel metal3 s -424 573432 56 573502 0 FreeSans 400 0 0 0 gpio_out[29] +flabel metal3 s -400 573432 56 573502 0 FreeSans 400 0 0 0 gpio_out[29] port 128 nsew -flabel metal3 s -424 571592 56 571662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] +flabel metal3 s -400 571592 56 571662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] port 304 nsew -flabel metal3 s -424 569752 56 569822 0 FreeSans 400 0 0 0 gpio_in_h[29] +flabel metal3 s -400 569752 56 569822 0 FreeSans 400 0 0 0 gpio_in_h[29] port 744 nsew -flabel metal3 s -424 579596 56 579666 0 FreeSans 400 0 0 0 gpio_analog_en[29] +flabel metal3 s -400 579596 56 579666 0 FreeSans 400 0 0 0 gpio_analog_en[29] port 436 nsew -flabel metal3 s -424 578308 56 578378 0 FreeSans 400 0 0 0 gpio_analog_pol[29] +flabel metal3 s -400 578308 56 578378 0 FreeSans 400 0 0 0 gpio_analog_pol[29] port 524 nsew -flabel metal3 s -424 578952 56 579022 0 FreeSans 400 0 0 0 gpio_dm0[29] +flabel metal3 s -400 578952 56 579022 0 FreeSans 400 0 0 0 gpio_dm0[29] port 568 nsew -flabel metal3 s -424 577756 56 577826 0 FreeSans 400 0 0 0 gpio_inp_dis[29] +flabel metal3 s -400 577756 56 577826 0 FreeSans 400 0 0 0 gpio_inp_dis[29] port 216 nsew -flabel metal3 s -424 580792 56 580862 0 FreeSans 400 0 0 0 gpio_dm1[29] +flabel metal3 s -400 580792 56 580862 0 FreeSans 400 0 0 0 gpio_dm1[29] port 612 nsew -flabel metal3 s -424 582632 56 582702 0 FreeSans 400 0 0 0 gpio_slow_sel[29] +flabel metal3 s -400 582632 56 582702 0 FreeSans 400 0 0 0 gpio_slow_sel[29] port 348 nsew -flabel metal3 s -424 584472 56 584542 0 FreeSans 400 0 0 0 gpio_in[29] +flabel metal3 s -400 584472 56 584542 0 FreeSans 400 0 0 0 gpio_in[29] port 700 nsew -flabel metal3 s -424 622796 56 622866 0 FreeSans 400 0 0 0 gpio_analog_en[28] +flabel metal3 s -400 622796 56 622866 0 FreeSans 400 0 0 0 gpio_analog_en[28] port 437 nsew -flabel metal3 s -424 621508 56 621578 0 FreeSans 400 0 0 0 gpio_analog_pol[28] +flabel metal3 s -400 621508 56 621578 0 FreeSans 400 0 0 0 gpio_analog_pol[28] port 525 nsew -flabel metal3 s -424 618472 56 618542 0 FreeSans 400 0 0 0 gpio_analog_sel[28] +flabel metal3 s -400 618472 56 618542 0 FreeSans 400 0 0 0 gpio_analog_sel[28] port 481 nsew -flabel metal3 s -424 622152 56 622222 0 FreeSans 400 0 0 0 gpio_dm0[28] +flabel metal3 s -400 622152 56 622222 0 FreeSans 400 0 0 0 gpio_dm0[28] port 569 nsew -flabel metal3 s -424 617828 56 617898 0 FreeSans 400 0 0 0 gpio_dm2[28] +flabel metal3 s -400 617828 56 617898 0 FreeSans 400 0 0 0 gpio_dm2[28] port 657 nsew -flabel metal3 s -424 617184 56 617254 0 FreeSans 400 0 0 0 gpio_holdover[28] +flabel metal3 s -400 617184 56 617254 0 FreeSans 400 0 0 0 gpio_holdover[28] port 393 nsew -flabel metal3 s -424 614148 56 614218 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] +flabel metal3 s -400 614148 56 614218 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] port 261 nsew -flabel metal3 s -424 620956 56 621026 0 FreeSans 400 0 0 0 gpio_inp_dis[28] +flabel metal3 s -400 620956 56 621026 0 FreeSans 400 0 0 0 gpio_inp_dis[28] port 217 nsew -flabel metal3 s -424 613504 56 613574 0 FreeSans 400 0 0 0 gpio_oeb[28] +flabel metal3 s -400 613504 56 613574 0 FreeSans 400 0 0 0 gpio_oeb[28] port 173 nsew -flabel metal3 s -424 616632 56 616702 0 FreeSans 400 0 0 0 gpio_out[28] +flabel metal3 s -400 616632 56 616702 0 FreeSans 400 0 0 0 gpio_out[28] port 129 nsew -flabel metal3 s -424 614792 56 614862 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] +flabel metal3 s -400 614792 56 614862 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] port 305 nsew -flabel metal3 s -424 612952 56 613022 0 FreeSans 400 0 0 0 gpio_in_h[28] +flabel metal3 s -400 612952 56 613022 0 FreeSans 400 0 0 0 gpio_in_h[28] port 745 nsew -flabel metal3 s -424 623992 56 624062 0 FreeSans 400 0 0 0 gpio_dm1[28] +flabel metal3 s -400 623992 56 624062 0 FreeSans 400 0 0 0 gpio_dm1[28] port 613 nsew -flabel metal3 s -424 625832 56 625902 0 FreeSans 400 0 0 0 gpio_slow_sel[28] +flabel metal3 s -400 625832 56 625902 0 FreeSans 400 0 0 0 gpio_slow_sel[28] port 349 nsew -flabel metal3 s -424 627672 56 627742 0 FreeSans 400 0 0 0 gpio_in[28] +flabel metal3 s -400 627672 56 627742 0 FreeSans 400 0 0 0 gpio_in[28] port 701 nsew -flabel metal3 s -424 665996 56 666066 0 FreeSans 400 0 0 0 gpio_analog_en[27] +flabel metal3 s -400 665996 56 666066 0 FreeSans 400 0 0 0 gpio_analog_en[27] port 438 nsew -flabel metal3 s -424 664708 56 664778 0 FreeSans 400 0 0 0 gpio_analog_pol[27] +flabel metal3 s -400 664708 56 664778 0 FreeSans 400 0 0 0 gpio_analog_pol[27] port 526 nsew -flabel metal3 s -424 661672 56 661742 0 FreeSans 400 0 0 0 gpio_analog_sel[27] +flabel metal3 s -400 661672 56 661742 0 FreeSans 400 0 0 0 gpio_analog_sel[27] port 482 nsew -flabel metal3 s -424 665352 56 665422 0 FreeSans 400 0 0 0 gpio_dm0[27] +flabel metal3 s -400 665352 56 665422 0 FreeSans 400 0 0 0 gpio_dm0[27] port 570 nsew -flabel metal3 s -424 661028 56 661098 0 FreeSans 400 0 0 0 gpio_dm2[27] +flabel metal3 s -400 661028 56 661098 0 FreeSans 400 0 0 0 gpio_dm2[27] port 658 nsew -flabel metal3 s -424 660384 56 660454 0 FreeSans 400 0 0 0 gpio_holdover[27] +flabel metal3 s -400 660384 56 660454 0 FreeSans 400 0 0 0 gpio_holdover[27] port 394 nsew -flabel metal3 s -424 657348 56 657418 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] +flabel metal3 s -400 657348 56 657418 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] port 262 nsew -flabel metal3 s -424 664156 56 664226 0 FreeSans 400 0 0 0 gpio_inp_dis[27] +flabel metal3 s -400 664156 56 664226 0 FreeSans 400 0 0 0 gpio_inp_dis[27] port 218 nsew -flabel metal3 s -424 656704 56 656774 0 FreeSans 400 0 0 0 gpio_oeb[27] +flabel metal3 s -400 656704 56 656774 0 FreeSans 400 0 0 0 gpio_oeb[27] port 174 nsew -flabel metal3 s -424 659832 56 659902 0 FreeSans 400 0 0 0 gpio_out[27] +flabel metal3 s -400 659832 56 659902 0 FreeSans 400 0 0 0 gpio_out[27] port 130 nsew -flabel metal3 s -424 657992 56 658062 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] +flabel metal3 s -400 657992 56 658062 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] port 306 nsew -flabel metal3 s -424 656152 56 656222 0 FreeSans 400 0 0 0 gpio_in_h[27] +flabel metal3 s -400 656152 56 656222 0 FreeSans 400 0 0 0 gpio_in_h[27] port 746 nsew -flabel metal3 s -424 667192 56 667262 0 FreeSans 400 0 0 0 gpio_dm1[27] +flabel metal3 s -400 667192 56 667262 0 FreeSans 400 0 0 0 gpio_dm1[27] port 614 nsew -flabel metal3 s -424 669032 56 669102 0 FreeSans 400 0 0 0 gpio_slow_sel[27] +flabel metal3 s -400 669032 56 669102 0 FreeSans 400 0 0 0 gpio_slow_sel[27] port 350 nsew -flabel metal3 s -424 670872 56 670942 0 FreeSans 400 0 0 0 gpio_in[27] +flabel metal3 s -400 670872 56 670942 0 FreeSans 400 0 0 0 gpio_in[27] port 702 nsew -flabel metal3 -444 450940 56 455720 0 FreeSans 3200 90 0 0 vdda2 +flabel metal3 -400 450940 56 455720 0 FreeSans 3200 90 0 0 vdda2 port 25 nsew -flabel metal3 -444 408814 56 413604 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 -400 408814 56 413604 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 -444 403862 56 408514 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 -400 403862 56 408514 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 -444 398762 56 403562 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 -400 398762 56 403562 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 -444 78140 56 82920 0 FreeSans 3200 90 0 0 vddio +flabel metal3 -400 78140 56 82920 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 -444 36014 56 40804 0 FreeSans 3200 90 0 0 vccd +flabel metal3 -400 36014 56 40804 0 FreeSans 3200 90 0 0 vccd port 20 nsew -flabel metal3 -444 25962 56 30762 0 FreeSans 3200 90 0 0 vccd +flabel metal3 -400 25962 56 30762 0 FreeSans 3200 90 0 0 vccd port 20 nsew -flabel metal3 36806 -444 41586 56 0 FreeSans 3200 0 0 0 vssa +flabel metal3 36806 -400 41586 56 0 FreeSans 3200 0 0 0 vssa port 23 nsew -flabel metal3 199284 -444 203914 56 0 FreeSans 3200 0 0 0 vssd +flabel metal3 199284 -400 203914 56 0 FreeSans 3200 0 0 0 vssd port 21 nsew -flabel metal3 209164 -444 213964 56 0 FreeSans 3200 0 0 0 vssd +flabel metal3 209164 -400 213964 56 0 FreeSans 3200 0 0 0 vssd port 21 nsew -flabel metal3 527006 -444 531786 56 0 FreeSans 3200 0 0 0 vssio +flabel metal3 527006 -400 531786 56 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 580806 -444 585586 56 0 FreeSans 3200 0 0 0 vdda +flabel metal3 580806 -400 585586 56 0 FreeSans 3200 0 0 0 vdda port 22 nsew -flabel metal3 633270 929006 633590 929068 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] +flabel metal3 633270 929006 633726 929068 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] port 803 nsew -flabel metal3 633270 839006 633590 839068 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] +flabel metal3 633270 839006 633726 839068 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] port 804 nsew -flabel metal3 633270 750006 633590 750068 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] +flabel metal3 633270 750006 633726 750068 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] port 805 nsew -flabel metal3 633270 705006 633590 705068 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] +flabel metal3 633270 705006 633726 705068 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] port 806 nsew -flabel metal3 633270 660006 633590 660068 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] +flabel metal3 633270 660006 633726 660068 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] port 807 nsew -flabel metal3 633270 615006 633590 615068 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] +flabel metal3 633270 615006 633726 615068 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] port 808 nsew -flabel metal3 633270 570006 633590 570068 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] +flabel metal3 633270 570006 633726 570068 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] port 809 nsew -flabel metal3 633270 525006 633590 525068 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] +flabel metal3 633270 525006 633726 525068 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] port 810 nsew -flabel metal3 633270 348006 633590 348068 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] +flabel metal3 633270 348006 633726 348068 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] port 811 nsew -flabel metal3 633270 303006 633590 303068 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] +flabel metal3 633270 303006 633726 303068 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] port 812 nsew -flabel metal3 633270 258006 633590 258068 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] +flabel metal3 633270 258006 633726 258068 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] port 813 nsew -flabel metal3 633270 213006 633590 213068 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] +flabel metal3 633270 213006 633726 213068 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] port 814 nsew -flabel metal3 633270 168006 633590 168068 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] +flabel metal3 633270 168006 633726 168068 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] port 815 nsew -flabel metal3 633270 123006 633590 123068 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] +flabel metal3 633270 123006 633726 123068 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] port 816 nsew -flabel metal3 633270 78006 633590 78068 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] +flabel metal3 633270 78006 633726 78068 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] port 817 nsew -flabel metal3 s 633270 60624 633750 60694 0 FreeSans 400 0 0 0 gpio_slow_sel[0] +flabel metal3 s 633270 60624 633726 60694 0 FreeSans 400 0 0 0 gpio_slow_sel[0] port 377 nsew -flabel metal3 s 633270 58784 633750 58854 0 FreeSans 400 0 0 0 gpio_in[0] +flabel metal3 s 633270 58784 633726 58854 0 FreeSans 400 0 0 0 gpio_in[0] port 729 nsew -flabel metal3 s 633270 62464 633750 62534 0 FreeSans 400 0 0 0 gpio_dm1[0] +flabel metal3 s 633270 62464 633726 62534 0 FreeSans 400 0 0 0 gpio_dm1[0] port 641 nsew -flabel metal3 s 633270 63660 633750 63730 0 FreeSans 400 0 0 0 gpio_analog_en[0] +flabel metal3 s 633270 63660 633726 63730 0 FreeSans 400 0 0 0 gpio_analog_en[0] port 465 nsew -flabel metal3 s 633270 64948 633750 65018 0 FreeSans 400 0 0 0 gpio_analog_pol[0] +flabel metal3 s 633270 64948 633726 65018 0 FreeSans 400 0 0 0 gpio_analog_pol[0] port 553 nsew -flabel metal3 s 633270 67984 633750 68054 0 FreeSans 400 0 0 0 gpio_analog_sel[0] +flabel metal3 s 633270 67984 633726 68054 0 FreeSans 400 0 0 0 gpio_analog_sel[0] port 509 nsew -flabel metal3 s 633270 64304 633750 64374 0 FreeSans 400 0 0 0 gpio_dm0[0] +flabel metal3 s 633270 64304 633726 64374 0 FreeSans 400 0 0 0 gpio_dm0[0] port 597 nsew -flabel metal3 s 633270 68628 633750 68698 0 FreeSans 400 0 0 0 gpio_dm2[0] +flabel metal3 s 633270 68628 633726 68698 0 FreeSans 400 0 0 0 gpio_dm2[0] port 685 nsew -flabel metal3 s 633270 69272 633750 69342 0 FreeSans 400 0 0 0 gpio_holdover[0] +flabel metal3 s 633270 69272 633726 69342 0 FreeSans 400 0 0 0 gpio_holdover[0] port 421 nsew -flabel metal3 s 633270 72308 633750 72378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] +flabel metal3 s 633270 72308 633726 72378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] port 289 nsew -flabel metal3 s 633270 65500 633750 65570 0 FreeSans 400 0 0 0 gpio_inp_dis[0] +flabel metal3 s 633270 65500 633726 65570 0 FreeSans 400 0 0 0 gpio_inp_dis[0] port 245 nsew -flabel metal3 s 633270 72952 633750 73022 0 FreeSans 400 0 0 0 gpio_oeb[0] +flabel metal3 s 633270 72952 633726 73022 0 FreeSans 400 0 0 0 gpio_oeb[0] port 201 nsew -flabel metal3 s 633270 69824 633750 69894 0 FreeSans 400 0 0 0 gpio_out[0] +flabel metal3 s 633270 69824 633726 69894 0 FreeSans 400 0 0 0 gpio_out[0] port 157 nsew -flabel metal3 s 633270 71664 633750 71734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] +flabel metal3 s 633270 71664 633726 71734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] port 333 nsew -flabel metal3 633270 73504 633750 73574 0 FreeSans 400 0 0 0 gpio_in_h[0] +flabel metal3 633270 73504 633726 73574 0 FreeSans 400 0 0 0 gpio_in_h[0] port 773 nsew -flabel metal3 s 633270 105824 633750 105894 0 FreeSans 400 0 0 0 gpio_slow_sel[1] +flabel metal3 s 633270 105824 633726 105894 0 FreeSans 400 0 0 0 gpio_slow_sel[1] port 376 nsew -flabel metal3 s 633270 103984 633750 104054 0 FreeSans 400 0 0 0 gpio_in[1] +flabel metal3 s 633270 103984 633726 104054 0 FreeSans 400 0 0 0 gpio_in[1] port 728 nsew -flabel metal3 s 633270 107664 633750 107734 0 FreeSans 400 0 0 0 gpio_dm1[1] +flabel metal3 s 633270 107664 633726 107734 0 FreeSans 400 0 0 0 gpio_dm1[1] port 640 nsew -flabel metal3 s 633270 108860 633750 108930 0 FreeSans 400 0 0 0 gpio_analog_en[1] +flabel metal3 s 633270 108860 633726 108930 0 FreeSans 400 0 0 0 gpio_analog_en[1] port 464 nsew -flabel metal3 s 633270 110148 633750 110218 0 FreeSans 400 0 0 0 gpio_analog_pol[1] +flabel metal3 s 633270 110148 633726 110218 0 FreeSans 400 0 0 0 gpio_analog_pol[1] port 552 nsew -flabel metal3 s 633270 113184 633750 113254 0 FreeSans 400 0 0 0 gpio_analog_sel[1] +flabel metal3 s 633270 113184 633726 113254 0 FreeSans 400 0 0 0 gpio_analog_sel[1] port 508 nsew -flabel metal3 s 633270 109504 633750 109574 0 FreeSans 400 0 0 0 gpio_dm0[1] +flabel metal3 s 633270 109504 633726 109574 0 FreeSans 400 0 0 0 gpio_dm0[1] port 596 nsew -flabel metal3 s 633270 113828 633750 113898 0 FreeSans 400 0 0 0 gpio_dm2[1] +flabel metal3 s 633270 113828 633726 113898 0 FreeSans 400 0 0 0 gpio_dm2[1] port 684 nsew -flabel metal3 s 633270 114472 633750 114542 0 FreeSans 400 0 0 0 gpio_holdover[1] +flabel metal3 s 633270 114472 633726 114542 0 FreeSans 400 0 0 0 gpio_holdover[1] port 420 nsew -flabel metal3 s 633270 117508 633750 117578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] +flabel metal3 s 633270 117508 633726 117578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] port 288 nsew -flabel metal3 s 633270 110700 633750 110770 0 FreeSans 400 0 0 0 gpio_inp_dis[1] +flabel metal3 s 633270 110700 633726 110770 0 FreeSans 400 0 0 0 gpio_inp_dis[1] port 244 nsew -flabel metal3 s 633270 118152 633750 118222 0 FreeSans 400 0 0 0 gpio_oeb[1] +flabel metal3 s 633270 118152 633726 118222 0 FreeSans 400 0 0 0 gpio_oeb[1] port 200 nsew -flabel metal3 s 633270 115024 633750 115094 0 FreeSans 400 0 0 0 gpio_out[1] +flabel metal3 s 633270 115024 633726 115094 0 FreeSans 400 0 0 0 gpio_out[1] port 156 nsew -flabel metal3 s 633270 116864 633750 116934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] +flabel metal3 s 633270 116864 633726 116934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] port 332 nsew -flabel metal3 633270 118704 633750 118774 0 FreeSans 400 0 0 0 gpio_in_h[1] +flabel metal3 633270 118704 633726 118774 0 FreeSans 400 0 0 0 gpio_in_h[1] port 772 nsew -flabel metal3 s 633270 150824 633750 150894 0 FreeSans 400 0 0 0 gpio_slow_sel[2] +flabel metal3 s 633270 150824 633726 150894 0 FreeSans 400 0 0 0 gpio_slow_sel[2] port 375 nsew -flabel metal3 s 633270 148984 633750 149054 0 FreeSans 400 0 0 0 gpio_in[2] +flabel metal3 s 633270 148984 633726 149054 0 FreeSans 400 0 0 0 gpio_in[2] port 727 nsew -flabel metal3 s 633270 152664 633750 152734 0 FreeSans 400 0 0 0 gpio_dm1[2] +flabel metal3 s 633270 152664 633726 152734 0 FreeSans 400 0 0 0 gpio_dm1[2] port 639 nsew -flabel metal3 s 633270 153860 633750 153930 0 FreeSans 400 0 0 0 gpio_analog_en[2] +flabel metal3 s 633270 153860 633726 153930 0 FreeSans 400 0 0 0 gpio_analog_en[2] port 463 nsew -flabel metal3 s 633270 155148 633750 155218 0 FreeSans 400 0 0 0 gpio_analog_pol[2] +flabel metal3 s 633270 155148 633726 155218 0 FreeSans 400 0 0 0 gpio_analog_pol[2] port 551 nsew -flabel metal3 s 633270 158184 633750 158254 0 FreeSans 400 0 0 0 gpio_analog_sel[2] +flabel metal3 s 633270 158184 633726 158254 0 FreeSans 400 0 0 0 gpio_analog_sel[2] port 507 nsew -flabel metal3 s 633270 154504 633750 154574 0 FreeSans 400 0 0 0 gpio_dm0[2] +flabel metal3 s 633270 154504 633726 154574 0 FreeSans 400 0 0 0 gpio_dm0[2] port 595 nsew -flabel metal3 s 633270 158828 633750 158898 0 FreeSans 400 0 0 0 gpio_dm2[2] +flabel metal3 s 633270 158828 633726 158898 0 FreeSans 400 0 0 0 gpio_dm2[2] port 683 nsew -flabel metal3 s 633270 159472 633750 159542 0 FreeSans 400 0 0 0 gpio_holdover[2] +flabel metal3 s 633270 159472 633726 159542 0 FreeSans 400 0 0 0 gpio_holdover[2] port 419 nsew -flabel metal3 s 633270 162508 633750 162578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] +flabel metal3 s 633270 162508 633726 162578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] port 287 nsew -flabel metal3 s 633270 155700 633750 155770 0 FreeSans 400 0 0 0 gpio_inp_dis[2] +flabel metal3 s 633270 155700 633726 155770 0 FreeSans 400 0 0 0 gpio_inp_dis[2] port 243 nsew -flabel metal3 s 633270 163152 633750 163222 0 FreeSans 400 0 0 0 gpio_oeb[2] +flabel metal3 s 633270 163152 633726 163222 0 FreeSans 400 0 0 0 gpio_oeb[2] port 199 nsew -flabel metal3 s 633270 160024 633750 160094 0 FreeSans 400 0 0 0 gpio_out[2] +flabel metal3 s 633270 160024 633726 160094 0 FreeSans 400 0 0 0 gpio_out[2] port 155 nsew -flabel metal3 s 633270 161864 633750 161934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] +flabel metal3 s 633270 161864 633726 161934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] port 331 nsew -flabel metal3 633270 163704 633750 163774 0 FreeSans 400 0 0 0 gpio_in_h[2] +flabel metal3 633270 163704 633726 163774 0 FreeSans 400 0 0 0 gpio_in_h[2] port 771 nsew -flabel metal3 s 633270 196024 633750 196094 0 FreeSans 400 0 0 0 gpio_slow_sel[3] +flabel metal3 s 633270 196024 633726 196094 0 FreeSans 400 0 0 0 gpio_slow_sel[3] port 374 nsew -flabel metal3 s 633270 194184 633750 194254 0 FreeSans 400 0 0 0 gpio_in[3] +flabel metal3 s 633270 194184 633726 194254 0 FreeSans 400 0 0 0 gpio_in[3] port 726 nsew -flabel metal3 s 633270 197864 633750 197934 0 FreeSans 400 0 0 0 gpio_dm1[3] +flabel metal3 s 633270 197864 633726 197934 0 FreeSans 400 0 0 0 gpio_dm1[3] port 638 nsew -flabel metal3 s 633270 199060 633750 199130 0 FreeSans 400 0 0 0 gpio_analog_en[3] +flabel metal3 s 633270 199060 633726 199130 0 FreeSans 400 0 0 0 gpio_analog_en[3] port 462 nsew -flabel metal3 s 633270 200348 633750 200418 0 FreeSans 400 0 0 0 gpio_analog_pol[3] +flabel metal3 s 633270 200348 633726 200418 0 FreeSans 400 0 0 0 gpio_analog_pol[3] port 550 nsew -flabel metal3 s 633270 203384 633750 203454 0 FreeSans 400 0 0 0 gpio_analog_sel[3] +flabel metal3 s 633270 203384 633726 203454 0 FreeSans 400 0 0 0 gpio_analog_sel[3] port 506 nsew -flabel metal3 s 633270 204028 633750 204098 0 FreeSans 400 0 0 0 gpio_dm2[3] +flabel metal3 s 633270 204028 633726 204098 0 FreeSans 400 0 0 0 gpio_dm2[3] port 682 nsew -flabel metal3 s 633270 199704 633750 199774 0 FreeSans 400 0 0 0 gpio_dm0[3] +flabel metal3 s 633270 199704 633726 199774 0 FreeSans 400 0 0 0 gpio_dm0[3] port 594 nsew -flabel metal3 s 633270 204672 633750 204742 0 FreeSans 400 0 0 0 gpio_holdover[3] +flabel metal3 s 633270 204672 633726 204742 0 FreeSans 400 0 0 0 gpio_holdover[3] port 418 nsew -flabel metal3 s 633270 207708 633750 207778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] +flabel metal3 s 633270 207708 633726 207778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] port 286 nsew -flabel metal3 s 633270 200900 633750 200970 0 FreeSans 400 0 0 0 gpio_inp_dis[3] +flabel metal3 s 633270 200900 633726 200970 0 FreeSans 400 0 0 0 gpio_inp_dis[3] port 242 nsew -flabel metal3 s 633270 208352 633750 208422 0 FreeSans 400 0 0 0 gpio_oeb[3] +flabel metal3 s 633270 208352 633726 208422 0 FreeSans 400 0 0 0 gpio_oeb[3] port 198 nsew -flabel metal3 s 633270 205224 633750 205294 0 FreeSans 400 0 0 0 gpio_out[3] +flabel metal3 s 633270 205224 633726 205294 0 FreeSans 400 0 0 0 gpio_out[3] port 154 nsew -flabel metal3 s 633270 207064 633750 207134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] +flabel metal3 s 633270 207064 633726 207134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] port 330 nsew -flabel metal3 633270 208904 633750 208974 0 FreeSans 400 0 0 0 gpio_in_h[3] +flabel metal3 633270 208904 633726 208974 0 FreeSans 400 0 0 0 gpio_in_h[3] port 770 nsew -flabel metal3 s 633270 241024 633750 241094 0 FreeSans 400 0 0 0 gpio_slow_sel[4] +flabel metal3 s 633270 241024 633726 241094 0 FreeSans 400 0 0 0 gpio_slow_sel[4] port 373 nsew -flabel metal3 s 633270 239184 633750 239254 0 FreeSans 400 0 0 0 gpio_in[4] +flabel metal3 s 633270 239184 633726 239254 0 FreeSans 400 0 0 0 gpio_in[4] port 725 nsew -flabel metal3 s 633270 242864 633750 242934 0 FreeSans 400 0 0 0 gpio_dm1[4] +flabel metal3 s 633270 242864 633726 242934 0 FreeSans 400 0 0 0 gpio_dm1[4] port 637 nsew -flabel metal3 s 633270 244060 633750 244130 0 FreeSans 400 0 0 0 gpio_analog_en[4] +flabel metal3 s 633270 244060 633726 244130 0 FreeSans 400 0 0 0 gpio_analog_en[4] port 461 nsew -flabel metal3 s 633270 245348 633750 245418 0 FreeSans 400 0 0 0 gpio_analog_pol[4] +flabel metal3 s 633270 245348 633726 245418 0 FreeSans 400 0 0 0 gpio_analog_pol[4] port 549 nsew -flabel metal3 s 633270 248384 633750 248454 0 FreeSans 400 0 0 0 gpio_analog_sel[4] +flabel metal3 s 633270 248384 633726 248454 0 FreeSans 400 0 0 0 gpio_analog_sel[4] port 505 nsew -flabel metal3 s 633270 244704 633750 244774 0 FreeSans 400 0 0 0 gpio_dm0[4] +flabel metal3 s 633270 244704 633726 244774 0 FreeSans 400 0 0 0 gpio_dm0[4] port 593 nsew -flabel metal3 s 633270 249028 633750 249098 0 FreeSans 400 0 0 0 gpio_dm2[4] +flabel metal3 s 633270 249028 633726 249098 0 FreeSans 400 0 0 0 gpio_dm2[4] port 681 nsew -flabel metal3 s 633270 249672 633750 249742 0 FreeSans 400 0 0 0 gpio_holdover[4] +flabel metal3 s 633270 249672 633726 249742 0 FreeSans 400 0 0 0 gpio_holdover[4] port 417 nsew -flabel metal3 s 633270 252708 633750 252778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] +flabel metal3 s 633270 252708 633726 252778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] port 285 nsew -flabel metal3 s 633270 245900 633750 245970 0 FreeSans 400 0 0 0 gpio_inp_dis[4] +flabel metal3 s 633270 245900 633726 245970 0 FreeSans 400 0 0 0 gpio_inp_dis[4] port 241 nsew -flabel metal3 s 633270 253352 633750 253422 0 FreeSans 400 0 0 0 gpio_oeb[4] +flabel metal3 s 633270 253352 633726 253422 0 FreeSans 400 0 0 0 gpio_oeb[4] port 197 nsew -flabel metal3 s 633270 250224 633750 250294 0 FreeSans 400 0 0 0 gpio_out[4] +flabel metal3 s 633270 250224 633726 250294 0 FreeSans 400 0 0 0 gpio_out[4] port 153 nsew -flabel metal3 s 633270 252064 633750 252134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] +flabel metal3 s 633270 252064 633726 252134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] port 329 nsew -flabel metal3 633270 253904 633750 253974 0 FreeSans 400 0 0 0 gpio_in_h[4] +flabel metal3 633270 253904 633726 253974 0 FreeSans 400 0 0 0 gpio_in_h[4] port 769 nsew -flabel metal3 s 633270 286024 633750 286094 0 FreeSans 400 0 0 0 gpio_slow_sel[5] +flabel metal3 s 633270 286024 633726 286094 0 FreeSans 400 0 0 0 gpio_slow_sel[5] port 372 nsew -flabel metal3 s 633270 284184 633750 284254 0 FreeSans 400 0 0 0 gpio_in[5] +flabel metal3 s 633270 284184 633726 284254 0 FreeSans 400 0 0 0 gpio_in[5] port 724 nsew -flabel metal3 s 633270 287864 633750 287934 0 FreeSans 400 0 0 0 gpio_dm1[5] +flabel metal3 s 633270 287864 633726 287934 0 FreeSans 400 0 0 0 gpio_dm1[5] port 636 nsew -flabel metal3 s 633270 289060 633750 289130 0 FreeSans 400 0 0 0 gpio_analog_en[5] +flabel metal3 s 633270 289060 633726 289130 0 FreeSans 400 0 0 0 gpio_analog_en[5] port 460 nsew -flabel metal3 s 633270 290348 633750 290418 0 FreeSans 400 0 0 0 gpio_analog_pol[5] +flabel metal3 s 633270 290348 633726 290418 0 FreeSans 400 0 0 0 gpio_analog_pol[5] port 548 nsew -flabel metal3 s 633270 293384 633750 293454 0 FreeSans 400 0 0 0 gpio_analog_sel[5] +flabel metal3 s 633270 293384 633726 293454 0 FreeSans 400 0 0 0 gpio_analog_sel[5] port 504 nsew -flabel metal3 s 633270 289704 633750 289774 0 FreeSans 400 0 0 0 gpio_dm0[5] +flabel metal3 s 633270 289704 633726 289774 0 FreeSans 400 0 0 0 gpio_dm0[5] port 592 nsew -flabel metal3 s 633270 294028 633750 294098 0 FreeSans 400 0 0 0 gpio_dm2[5] +flabel metal3 s 633270 294028 633726 294098 0 FreeSans 400 0 0 0 gpio_dm2[5] port 680 nsew -flabel metal3 s 633270 294672 633750 294742 0 FreeSans 400 0 0 0 gpio_holdover[5] +flabel metal3 s 633270 294672 633726 294742 0 FreeSans 400 0 0 0 gpio_holdover[5] port 416 nsew -flabel metal3 s 633270 297708 633750 297778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] +flabel metal3 s 633270 297708 633726 297778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] port 284 nsew -flabel metal3 s 633270 290900 633750 290970 0 FreeSans 400 0 0 0 gpio_inp_dis[5] +flabel metal3 s 633270 290900 633726 290970 0 FreeSans 400 0 0 0 gpio_inp_dis[5] port 240 nsew -flabel metal3 s 633270 298352 633750 298422 0 FreeSans 400 0 0 0 gpio_oeb[5] +flabel metal3 s 633270 298352 633726 298422 0 FreeSans 400 0 0 0 gpio_oeb[5] port 196 nsew -flabel metal3 s 633270 295224 633750 295294 0 FreeSans 400 0 0 0 gpio_out[5] +flabel metal3 s 633270 295224 633726 295294 0 FreeSans 400 0 0 0 gpio_out[5] port 152 nsew -flabel metal3 s 633270 297064 633750 297134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] +flabel metal3 s 633270 297064 633726 297134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] port 328 nsew -flabel metal3 633270 298904 633750 298974 0 FreeSans 400 0 0 0 gpio_in_h[5] +flabel metal3 633270 298904 633726 298974 0 FreeSans 400 0 0 0 gpio_in_h[5] port 768 nsew -flabel metal3 s 633270 331224 633750 331294 0 FreeSans 400 0 0 0 gpio_slow_sel[6] +flabel metal3 s 633270 331224 633726 331294 0 FreeSans 400 0 0 0 gpio_slow_sel[6] port 371 nsew -flabel metal3 s 633270 329384 633750 329454 0 FreeSans 400 0 0 0 gpio_in[6] +flabel metal3 s 633270 329384 633726 329454 0 FreeSans 400 0 0 0 gpio_in[6] port 723 nsew -flabel metal3 s 633270 333064 633750 333134 0 FreeSans 400 0 0 0 gpio_dm1[6] +flabel metal3 s 633270 333064 633726 333134 0 FreeSans 400 0 0 0 gpio_dm1[6] port 635 nsew -flabel metal3 s 633270 334260 633750 334330 0 FreeSans 400 0 0 0 gpio_analog_en[6] +flabel metal3 s 633270 334260 633726 334330 0 FreeSans 400 0 0 0 gpio_analog_en[6] port 459 nsew -flabel metal3 s 633270 335548 633750 335618 0 FreeSans 400 0 0 0 gpio_analog_pol[6] +flabel metal3 s 633270 335548 633726 335618 0 FreeSans 400 0 0 0 gpio_analog_pol[6] port 547 nsew -flabel metal3 s 633270 338584 633750 338654 0 FreeSans 400 0 0 0 gpio_analog_sel[6] +flabel metal3 s 633270 338584 633726 338654 0 FreeSans 400 0 0 0 gpio_analog_sel[6] port 503 nsew -flabel metal3 s 633270 334904 633750 334974 0 FreeSans 400 0 0 0 gpio_dm0[6] +flabel metal3 s 633270 334904 633726 334974 0 FreeSans 400 0 0 0 gpio_dm0[6] port 591 nsew -flabel metal3 s 633270 339228 633750 339298 0 FreeSans 400 0 0 0 gpio_dm2[6] +flabel metal3 s 633270 339228 633726 339298 0 FreeSans 400 0 0 0 gpio_dm2[6] port 679 nsew -flabel metal3 s 633270 339872 633750 339942 0 FreeSans 400 0 0 0 gpio_holdover[6] +flabel metal3 s 633270 339872 633726 339942 0 FreeSans 400 0 0 0 gpio_holdover[6] port 415 nsew -flabel metal3 s 633270 342908 633750 342978 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] +flabel metal3 s 633270 342908 633726 342978 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] port 283 nsew -flabel metal3 s 633270 336100 633750 336170 0 FreeSans 400 0 0 0 gpio_inp_dis[6] +flabel metal3 s 633270 336100 633726 336170 0 FreeSans 400 0 0 0 gpio_inp_dis[6] port 239 nsew -flabel metal3 s 633270 343552 633750 343622 0 FreeSans 400 0 0 0 gpio_oeb[6] +flabel metal3 s 633270 343552 633726 343622 0 FreeSans 400 0 0 0 gpio_oeb[6] port 195 nsew -flabel metal3 s 633270 340424 633750 340494 0 FreeSans 400 0 0 0 gpio_out[6] +flabel metal3 s 633270 340424 633726 340494 0 FreeSans 400 0 0 0 gpio_out[6] port 151 nsew -flabel metal3 s 633270 342264 633750 342334 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] +flabel metal3 s 633270 342264 633726 342334 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] port 327 nsew -flabel metal3 633270 344104 633750 344174 0 FreeSans 400 0 0 0 gpio_in_h[6] +flabel metal3 633270 344104 633726 344174 0 FreeSans 400 0 0 0 gpio_in_h[6] port 767 nsew -flabel metal3 s 633270 508424 633750 508494 0 FreeSans 400 0 0 0 gpio_slow_sel[7] +flabel metal3 s 633270 508424 633726 508494 0 FreeSans 400 0 0 0 gpio_slow_sel[7] port 370 nsew -flabel metal3 s 633270 506584 633750 506654 0 FreeSans 400 0 0 0 gpio_in[7] +flabel metal3 s 633270 506584 633726 506654 0 FreeSans 400 0 0 0 gpio_in[7] port 722 nsew -flabel metal3 s 633270 510264 633750 510334 0 FreeSans 400 0 0 0 gpio_dm1[7] +flabel metal3 s 633270 510264 633726 510334 0 FreeSans 400 0 0 0 gpio_dm1[7] port 634 nsew -flabel metal3 s 633270 511460 633750 511530 0 FreeSans 400 0 0 0 gpio_analog_en[7] +flabel metal3 s 633270 511460 633726 511530 0 FreeSans 400 0 0 0 gpio_analog_en[7] port 458 nsew -flabel metal3 s 633270 512748 633750 512818 0 FreeSans 400 0 0 0 gpio_analog_pol[7] +flabel metal3 s 633270 512748 633726 512818 0 FreeSans 400 0 0 0 gpio_analog_pol[7] port 546 nsew -flabel metal3 s 633270 515784 633750 515854 0 FreeSans 400 0 0 0 gpio_analog_sel[7] +flabel metal3 s 633270 515784 633726 515854 0 FreeSans 400 0 0 0 gpio_analog_sel[7] port 502 nsew -flabel metal3 s 633270 512104 633750 512174 0 FreeSans 400 0 0 0 gpio_dm0[7] +flabel metal3 s 633270 512104 633726 512174 0 FreeSans 400 0 0 0 gpio_dm0[7] port 590 nsew -flabel metal3 s 633270 516428 633750 516498 0 FreeSans 400 0 0 0 gpio_dm2[7] +flabel metal3 s 633270 516428 633726 516498 0 FreeSans 400 0 0 0 gpio_dm2[7] port 678 nsew -flabel metal3 s 633270 517072 633750 517142 0 FreeSans 400 0 0 0 gpio_holdover[7] +flabel metal3 s 633270 517072 633726 517142 0 FreeSans 400 0 0 0 gpio_holdover[7] port 414 nsew -flabel metal3 s 633270 520108 633750 520178 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] +flabel metal3 s 633270 520108 633726 520178 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] port 282 nsew -flabel metal3 s 633270 513300 633750 513370 0 FreeSans 400 0 0 0 gpio_inp_dis[7] +flabel metal3 s 633270 513300 633726 513370 0 FreeSans 400 0 0 0 gpio_inp_dis[7] port 238 nsew -flabel metal3 s 633270 520752 633750 520822 0 FreeSans 400 0 0 0 gpio_oeb[7] +flabel metal3 s 633270 520752 633726 520822 0 FreeSans 400 0 0 0 gpio_oeb[7] port 194 nsew -flabel metal3 s 633270 517624 633750 517694 0 FreeSans 400 0 0 0 gpio_out[7] +flabel metal3 s 633270 517624 633726 517694 0 FreeSans 400 0 0 0 gpio_out[7] port 150 nsew -flabel metal3 s 633270 519464 633750 519534 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] +flabel metal3 s 633270 519464 633726 519534 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] port 326 nsew -flabel metal3 s 633270 521304 633750 521374 0 FreeSans 400 0 0 0 gpio_in_h[7] +flabel metal3 s 633270 521304 633726 521374 0 FreeSans 400 0 0 0 gpio_in_h[7] port 766 nsew -flabel metal3 s 633270 553624 633750 553694 0 FreeSans 400 0 0 0 gpio_slow_sel[8] +flabel metal3 s 633270 553624 633726 553694 0 FreeSans 400 0 0 0 gpio_slow_sel[8] port 369 nsew -flabel metal3 s 633270 551784 633750 551854 0 FreeSans 400 0 0 0 gpio_in[8] +flabel metal3 s 633270 551784 633726 551854 0 FreeSans 400 0 0 0 gpio_in[8] port 721 nsew -flabel metal3 s 633270 555464 633750 555534 0 FreeSans 400 0 0 0 gpio_dm1[8] +flabel metal3 s 633270 555464 633726 555534 0 FreeSans 400 0 0 0 gpio_dm1[8] port 633 nsew -flabel metal3 s 633270 556660 633750 556730 0 FreeSans 400 0 0 0 gpio_analog_en[8] +flabel metal3 s 633270 556660 633726 556730 0 FreeSans 400 0 0 0 gpio_analog_en[8] port 457 nsew -flabel metal3 s 633270 557948 633750 558018 0 FreeSans 400 0 0 0 gpio_analog_pol[8] +flabel metal3 s 633270 557948 633726 558018 0 FreeSans 400 0 0 0 gpio_analog_pol[8] port 545 nsew -flabel metal3 s 633270 560984 633750 561054 0 FreeSans 400 0 0 0 gpio_analog_sel[8] +flabel metal3 s 633270 560984 633726 561054 0 FreeSans 400 0 0 0 gpio_analog_sel[8] port 501 nsew -flabel metal3 s 633270 557304 633750 557374 0 FreeSans 400 0 0 0 gpio_dm0[8] +flabel metal3 s 633270 557304 633726 557374 0 FreeSans 400 0 0 0 gpio_dm0[8] port 589 nsew -flabel metal3 s 633270 561628 633750 561698 0 FreeSans 400 0 0 0 gpio_dm2[8] +flabel metal3 s 633270 561628 633726 561698 0 FreeSans 400 0 0 0 gpio_dm2[8] port 677 nsew -flabel metal3 s 633270 562272 633750 562342 0 FreeSans 400 0 0 0 gpio_holdover[8] +flabel metal3 s 633270 562272 633726 562342 0 FreeSans 400 0 0 0 gpio_holdover[8] port 413 nsew -flabel metal3 s 633270 565308 633750 565378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] +flabel metal3 s 633270 565308 633726 565378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] port 281 nsew -flabel metal3 s 633270 558500 633750 558570 0 FreeSans 400 0 0 0 gpio_inp_dis[8] +flabel metal3 s 633270 558500 633726 558570 0 FreeSans 400 0 0 0 gpio_inp_dis[8] port 237 nsew -flabel metal3 s 633270 565952 633750 566022 0 FreeSans 400 0 0 0 gpio_oeb[8] +flabel metal3 s 633270 565952 633726 566022 0 FreeSans 400 0 0 0 gpio_oeb[8] port 193 nsew -flabel metal3 s 633270 562824 633750 562894 0 FreeSans 400 0 0 0 gpio_out[8] +flabel metal3 s 633270 562824 633726 562894 0 FreeSans 400 0 0 0 gpio_out[8] port 149 nsew -flabel metal3 s 633270 564664 633750 564734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] +flabel metal3 s 633270 564664 633726 564734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] port 325 nsew -flabel metal3 s 633270 566504 633750 566574 0 FreeSans 400 0 0 0 gpio_in_h[8] +flabel metal3 s 633270 566504 633726 566574 0 FreeSans 400 0 0 0 gpio_in_h[8] port 765 nsew -flabel metal3 s 633270 598624 633750 598694 0 FreeSans 400 0 0 0 gpio_slow_sel[9] +flabel metal3 s 633270 598624 633726 598694 0 FreeSans 400 0 0 0 gpio_slow_sel[9] port 368 nsew -flabel metal3 s 633270 596784 633750 596854 0 FreeSans 400 0 0 0 gpio_in[9] +flabel metal3 s 633270 596784 633726 596854 0 FreeSans 400 0 0 0 gpio_in[9] port 720 nsew -flabel metal3 s 633270 600464 633750 600534 0 FreeSans 400 0 0 0 gpio_dm1[9] +flabel metal3 s 633270 600464 633726 600534 0 FreeSans 400 0 0 0 gpio_dm1[9] port 632 nsew -flabel metal3 s 633270 601660 633750 601730 0 FreeSans 400 0 0 0 gpio_analog_en[9] +flabel metal3 s 633270 601660 633726 601730 0 FreeSans 400 0 0 0 gpio_analog_en[9] port 456 nsew -flabel metal3 s 633270 602948 633750 603018 0 FreeSans 400 0 0 0 gpio_analog_pol[9] +flabel metal3 s 633270 602948 633726 603018 0 FreeSans 400 0 0 0 gpio_analog_pol[9] port 544 nsew -flabel metal3 s 633270 605984 633750 606054 0 FreeSans 400 0 0 0 gpio_analog_sel[9] +flabel metal3 s 633270 605984 633726 606054 0 FreeSans 400 0 0 0 gpio_analog_sel[9] port 500 nsew -flabel metal3 s 633270 602304 633750 602374 0 FreeSans 400 0 0 0 gpio_dm0[9] +flabel metal3 s 633270 602304 633726 602374 0 FreeSans 400 0 0 0 gpio_dm0[9] port 588 nsew -flabel metal3 s 633270 606628 633750 606698 0 FreeSans 400 0 0 0 gpio_dm2[9] +flabel metal3 s 633270 606628 633726 606698 0 FreeSans 400 0 0 0 gpio_dm2[9] port 676 nsew -flabel metal3 s 633270 607272 633750 607342 0 FreeSans 400 0 0 0 gpio_holdover[9] +flabel metal3 s 633270 607272 633726 607342 0 FreeSans 400 0 0 0 gpio_holdover[9] port 412 nsew -flabel metal3 s 633270 610308 633750 610378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] +flabel metal3 s 633270 610308 633726 610378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] port 280 nsew -flabel metal3 s 633270 603500 633750 603570 0 FreeSans 400 0 0 0 gpio_inp_dis[9] +flabel metal3 s 633270 603500 633726 603570 0 FreeSans 400 0 0 0 gpio_inp_dis[9] port 236 nsew -flabel metal3 s 633270 610952 633750 611022 0 FreeSans 400 0 0 0 gpio_oeb[9] +flabel metal3 s 633270 610952 633726 611022 0 FreeSans 400 0 0 0 gpio_oeb[9] port 192 nsew -flabel metal3 s 633270 607824 633750 607894 0 FreeSans 400 0 0 0 gpio_out[9] +flabel metal3 s 633270 607824 633726 607894 0 FreeSans 400 0 0 0 gpio_out[9] port 148 nsew -flabel metal3 s 633270 609664 633750 609734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] +flabel metal3 s 633270 609664 633726 609734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] port 324 nsew -flabel metal3 s 633270 611504 633750 611574 0 FreeSans 400 0 0 0 gpio_in_h[9] +flabel metal3 s 633270 611504 633726 611574 0 FreeSans 400 0 0 0 gpio_in_h[9] port 764 nsew -flabel metal3 s 633270 643824 633750 643894 0 FreeSans 400 0 0 0 gpio_slow_sel[10] +flabel metal3 s 633270 643824 633726 643894 0 FreeSans 400 0 0 0 gpio_slow_sel[10] port 367 nsew -flabel metal3 s 633270 641984 633750 642054 0 FreeSans 400 0 0 0 gpio_in[10] +flabel metal3 s 633270 641984 633726 642054 0 FreeSans 400 0 0 0 gpio_in[10] port 719 nsew -flabel metal3 s 633270 645664 633750 645734 0 FreeSans 400 0 0 0 gpio_dm1[10] +flabel metal3 s 633270 645664 633726 645734 0 FreeSans 400 0 0 0 gpio_dm1[10] port 631 nsew -flabel metal3 s 633270 646860 633750 646930 0 FreeSans 400 0 0 0 gpio_analog_en[10] +flabel metal3 s 633270 646860 633726 646930 0 FreeSans 400 0 0 0 gpio_analog_en[10] port 455 nsew -flabel metal3 s 633270 648148 633750 648218 0 FreeSans 400 0 0 0 gpio_analog_pol[10] +flabel metal3 s 633270 648148 633726 648218 0 FreeSans 400 0 0 0 gpio_analog_pol[10] port 543 nsew -flabel metal3 s 633270 651184 633750 651254 0 FreeSans 400 0 0 0 gpio_analog_sel[10] +flabel metal3 s 633270 651184 633726 651254 0 FreeSans 400 0 0 0 gpio_analog_sel[10] port 499 nsew -flabel metal3 s 633270 647504 633750 647574 0 FreeSans 400 0 0 0 gpio_dm0[10] +flabel metal3 s 633270 647504 633726 647574 0 FreeSans 400 0 0 0 gpio_dm0[10] port 587 nsew -flabel metal3 s 633270 651828 633750 651898 0 FreeSans 400 0 0 0 gpio_dm2[10] +flabel metal3 s 633270 651828 633726 651898 0 FreeSans 400 0 0 0 gpio_dm2[10] port 675 nsew -flabel metal3 s 633270 652472 633750 652542 0 FreeSans 400 0 0 0 gpio_holdover[10] +flabel metal3 s 633270 652472 633726 652542 0 FreeSans 400 0 0 0 gpio_holdover[10] port 411 nsew -flabel metal3 s 633270 655508 633750 655578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] +flabel metal3 s 633270 655508 633726 655578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] port 279 nsew -flabel metal3 s 633270 648700 633750 648770 0 FreeSans 400 0 0 0 gpio_inp_dis[10] +flabel metal3 s 633270 648700 633726 648770 0 FreeSans 400 0 0 0 gpio_inp_dis[10] port 235 nsew -flabel metal3 s 633270 656152 633750 656222 0 FreeSans 400 0 0 0 gpio_oeb[10] +flabel metal3 s 633270 656152 633726 656222 0 FreeSans 400 0 0 0 gpio_oeb[10] port 191 nsew -flabel metal3 s 633270 653024 633750 653094 0 FreeSans 400 0 0 0 gpio_out[10] +flabel metal3 s 633270 653024 633726 653094 0 FreeSans 400 0 0 0 gpio_out[10] port 147 nsew -flabel metal3 s 633270 654864 633750 654934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] +flabel metal3 s 633270 654864 633726 654934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] port 323 nsew -flabel metal3 s 633270 656704 633750 656774 0 FreeSans 400 0 0 0 gpio_in_h[10] +flabel metal3 s 633270 656704 633726 656774 0 FreeSans 400 0 0 0 gpio_in_h[10] port 763 nsew -flabel metal3 s 633270 688824 633750 688894 0 FreeSans 400 0 0 0 gpio_slow_sel[11] +flabel metal3 s 633270 688824 633726 688894 0 FreeSans 400 0 0 0 gpio_slow_sel[11] port 366 nsew -flabel metal3 s 633270 686984 633750 687054 0 FreeSans 400 0 0 0 gpio_in[11] +flabel metal3 s 633270 686984 633726 687054 0 FreeSans 400 0 0 0 gpio_in[11] port 718 nsew -flabel metal3 s 633270 690664 633750 690734 0 FreeSans 400 0 0 0 gpio_dm1[11] +flabel metal3 s 633270 690664 633726 690734 0 FreeSans 400 0 0 0 gpio_dm1[11] port 630 nsew -flabel metal3 s 633270 697472 633750 697542 0 FreeSans 400 0 0 0 gpio_holdover[11] +flabel metal3 s 633270 697472 633726 697542 0 FreeSans 400 0 0 0 gpio_holdover[11] port 410 nsew -flabel metal3 s 633270 700508 633750 700578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] +flabel metal3 s 633270 700508 633726 700578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] port 278 nsew -flabel metal3 s 633270 693700 633750 693770 0 FreeSans 400 0 0 0 gpio_inp_dis[11] +flabel metal3 s 633270 693700 633726 693770 0 FreeSans 400 0 0 0 gpio_inp_dis[11] port 234 nsew -flabel metal3 s 633270 701152 633750 701222 0 FreeSans 400 0 0 0 gpio_oeb[11] +flabel metal3 s 633270 701152 633726 701222 0 FreeSans 400 0 0 0 gpio_oeb[11] port 190 nsew -flabel metal3 s 633270 698024 633750 698094 0 FreeSans 400 0 0 0 gpio_out[11] +flabel metal3 s 633270 698024 633726 698094 0 FreeSans 400 0 0 0 gpio_out[11] port 146 nsew -flabel metal3 s 633270 699864 633750 699934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] +flabel metal3 s 633270 699864 633726 699934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] port 322 nsew -flabel metal3 s 633270 691860 633750 691930 0 FreeSans 400 0 0 0 gpio_analog_en[11] +flabel metal3 s 633270 691860 633726 691930 0 FreeSans 400 0 0 0 gpio_analog_en[11] port 454 nsew -flabel metal3 s 633270 693148 633750 693218 0 FreeSans 400 0 0 0 gpio_analog_pol[11] +flabel metal3 s 633270 693148 633726 693218 0 FreeSans 400 0 0 0 gpio_analog_pol[11] port 542 nsew -flabel metal3 s 633270 696184 633750 696254 0 FreeSans 400 0 0 0 gpio_analog_sel[11] +flabel metal3 s 633270 696184 633726 696254 0 FreeSans 400 0 0 0 gpio_analog_sel[11] port 498 nsew -flabel metal3 s 633270 692504 633750 692574 0 FreeSans 400 0 0 0 gpio_dm0[11] +flabel metal3 s 633270 692504 633726 692574 0 FreeSans 400 0 0 0 gpio_dm0[11] port 586 nsew -flabel metal3 s 633270 696828 633750 696898 0 FreeSans 400 0 0 0 gpio_dm2[11] +flabel metal3 s 633270 696828 633726 696898 0 FreeSans 400 0 0 0 gpio_dm2[11] port 674 nsew -flabel metal3 s 633270 701704 633750 701774 0 FreeSans 400 0 0 0 gpio_in_h[11] +flabel metal3 s 633270 701704 633726 701774 0 FreeSans 400 0 0 0 gpio_in_h[11] port 762 nsew -flabel metal3 s 633270 733824 633750 733894 0 FreeSans 400 0 0 0 gpio_slow_sel[12] +flabel metal3 s 633270 733824 633726 733894 0 FreeSans 400 0 0 0 gpio_slow_sel[12] port 365 nsew -flabel metal3 s 633270 731984 633750 732054 0 FreeSans 400 0 0 0 gpio_in[12] +flabel metal3 s 633270 731984 633726 732054 0 FreeSans 400 0 0 0 gpio_in[12] port 717 nsew -flabel metal3 s 633270 735664 633750 735734 0 FreeSans 400 0 0 0 gpio_dm1[12] +flabel metal3 s 633270 735664 633726 735734 0 FreeSans 400 0 0 0 gpio_dm1[12] port 629 nsew -flabel metal3 s 633270 736860 633750 736930 0 FreeSans 400 0 0 0 gpio_analog_en[12] +flabel metal3 s 633270 736860 633726 736930 0 FreeSans 400 0 0 0 gpio_analog_en[12] port 453 nsew -flabel metal3 s 633270 738148 633750 738218 0 FreeSans 400 0 0 0 gpio_analog_pol[12] +flabel metal3 s 633270 738148 633726 738218 0 FreeSans 400 0 0 0 gpio_analog_pol[12] port 541 nsew -flabel metal3 s 633270 741184 633750 741254 0 FreeSans 400 0 0 0 gpio_analog_sel[12] +flabel metal3 s 633270 741184 633726 741254 0 FreeSans 400 0 0 0 gpio_analog_sel[12] port 497 nsew -flabel metal3 s 633270 737504 633750 737574 0 FreeSans 400 0 0 0 gpio_dm0[12] +flabel metal3 s 633270 737504 633726 737574 0 FreeSans 400 0 0 0 gpio_dm0[12] port 585 nsew -flabel metal3 s 633270 741828 633750 741898 0 FreeSans 400 0 0 0 gpio_dm2[12] +flabel metal3 s 633270 741828 633726 741898 0 FreeSans 400 0 0 0 gpio_dm2[12] port 673 nsew -flabel metal3 s 633270 742472 633750 742542 0 FreeSans 400 0 0 0 gpio_holdover[12] +flabel metal3 s 633270 742472 633726 742542 0 FreeSans 400 0 0 0 gpio_holdover[12] port 409 nsew -flabel metal3 s 633270 745508 633750 745578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] +flabel metal3 s 633270 745508 633726 745578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] port 277 nsew -flabel metal3 s 633270 738700 633750 738770 0 FreeSans 400 0 0 0 gpio_inp_dis[12] +flabel metal3 s 633270 738700 633726 738770 0 FreeSans 400 0 0 0 gpio_inp_dis[12] port 233 nsew -flabel metal3 s 633270 746152 633750 746222 0 FreeSans 400 0 0 0 gpio_oeb[12] +flabel metal3 s 633270 746152 633726 746222 0 FreeSans 400 0 0 0 gpio_oeb[12] port 189 nsew -flabel metal3 s 633270 743024 633750 743094 0 FreeSans 400 0 0 0 gpio_out[12] +flabel metal3 s 633270 743024 633726 743094 0 FreeSans 400 0 0 0 gpio_out[12] port 145 nsew -flabel metal3 s 633270 744864 633750 744934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] +flabel metal3 s 633270 744864 633726 744934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] port 321 nsew -flabel metal3 s 633270 746704 633750 746774 0 FreeSans 400 0 0 0 gpio_in_h[12] +flabel metal3 s 633270 746704 633726 746774 0 FreeSans 400 0 0 0 gpio_in_h[12] port 761 nsew -flabel metal3 s 633270 823024 633750 823094 0 FreeSans 400 0 0 0 gpio_slow_sel[13] +flabel metal3 s 633270 823024 633726 823094 0 FreeSans 400 0 0 0 gpio_slow_sel[13] port 364 nsew -flabel metal3 s 633270 821184 633750 821254 0 FreeSans 400 0 0 0 gpio_in[13] +flabel metal3 s 633270 821184 633726 821254 0 FreeSans 400 0 0 0 gpio_in[13] port 716 nsew -flabel metal3 s 633270 824864 633750 824934 0 FreeSans 400 0 0 0 gpio_dm1[13] +flabel metal3 s 633270 824864 633726 824934 0 FreeSans 400 0 0 0 gpio_dm1[13] port 628 nsew -flabel metal3 s 633270 826060 633750 826130 0 FreeSans 400 0 0 0 gpio_analog_en[13] +flabel metal3 s 633270 826060 633726 826130 0 FreeSans 400 0 0 0 gpio_analog_en[13] port 452 nsew -flabel metal3 s 633270 827348 633750 827418 0 FreeSans 400 0 0 0 gpio_analog_pol[13] +flabel metal3 s 633270 827348 633726 827418 0 FreeSans 400 0 0 0 gpio_analog_pol[13] port 540 nsew -flabel metal3 s 633270 830384 633750 830454 0 FreeSans 400 0 0 0 gpio_analog_sel[13] +flabel metal3 s 633270 830384 633726 830454 0 FreeSans 400 0 0 0 gpio_analog_sel[13] port 496 nsew -flabel metal3 s 633270 826704 633750 826774 0 FreeSans 400 0 0 0 gpio_dm0[13] +flabel metal3 s 633270 826704 633726 826774 0 FreeSans 400 0 0 0 gpio_dm0[13] port 584 nsew -flabel metal3 s 633270 831028 633750 831098 0 FreeSans 400 0 0 0 gpio_dm2[13] +flabel metal3 s 633270 831028 633726 831098 0 FreeSans 400 0 0 0 gpio_dm2[13] port 672 nsew -flabel metal3 s 633270 831672 633750 831742 0 FreeSans 400 0 0 0 gpio_holdover[13] +flabel metal3 s 633270 831672 633726 831742 0 FreeSans 400 0 0 0 gpio_holdover[13] port 408 nsew -flabel metal3 s 633270 834708 633750 834778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] +flabel metal3 s 633270 834708 633726 834778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] port 276 nsew -flabel metal3 s 633270 827900 633750 827970 0 FreeSans 400 0 0 0 gpio_inp_dis[13] +flabel metal3 s 633270 827900 633726 827970 0 FreeSans 400 0 0 0 gpio_inp_dis[13] port 232 nsew -flabel metal3 s 633270 835352 633750 835422 0 FreeSans 400 0 0 0 gpio_oeb[13] +flabel metal3 s 633270 835352 633726 835422 0 FreeSans 400 0 0 0 gpio_oeb[13] port 188 nsew -flabel metal3 s 633270 832224 633750 832294 0 FreeSans 400 0 0 0 gpio_out[13] +flabel metal3 s 633270 832224 633726 832294 0 FreeSans 400 0 0 0 gpio_out[13] port 144 nsew -flabel metal3 s 633270 834064 633750 834134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] +flabel metal3 s 633270 834064 633726 834134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] port 320 nsew -flabel metal3 s 633270 835904 633750 835974 0 FreeSans 400 0 0 0 gpio_in_h[13] +flabel metal3 s 633270 835904 633726 835974 0 FreeSans 400 0 0 0 gpio_in_h[13] port 760 nsew -flabel metal3 s 633270 912224 633750 912294 0 FreeSans 400 0 0 0 gpio_slow_sel[14] +flabel metal3 s 633270 912224 633726 912294 0 FreeSans 400 0 0 0 gpio_slow_sel[14] port 363 nsew -flabel metal3 s 633270 910384 633750 910454 0 FreeSans 400 0 0 0 gpio_in[14] +flabel metal3 s 633270 910384 633726 910454 0 FreeSans 400 0 0 0 gpio_in[14] port 715 nsew -flabel metal3 s 633270 914064 633750 914134 0 FreeSans 400 0 0 0 gpio_dm1[14] +flabel metal3 s 633270 914064 633726 914134 0 FreeSans 400 0 0 0 gpio_dm1[14] port 627 nsew -flabel metal3 s 633270 915260 633750 915330 0 FreeSans 400 0 0 0 gpio_analog_en[14] +flabel metal3 s 633270 915260 633726 915330 0 FreeSans 400 0 0 0 gpio_analog_en[14] port 451 nsew -flabel metal3 s 633270 916548 633750 916618 0 FreeSans 400 0 0 0 gpio_analog_pol[14] +flabel metal3 s 633270 916548 633726 916618 0 FreeSans 400 0 0 0 gpio_analog_pol[14] port 539 nsew -flabel metal3 s 633270 919584 633750 919654 0 FreeSans 400 0 0 0 gpio_analog_sel[14] +flabel metal3 s 633270 919584 633726 919654 0 FreeSans 400 0 0 0 gpio_analog_sel[14] port 495 nsew -flabel metal3 s 633270 915904 633750 915974 0 FreeSans 400 0 0 0 gpio_dm0[14] +flabel metal3 s 633270 915904 633726 915974 0 FreeSans 400 0 0 0 gpio_dm0[14] port 583 nsew -flabel metal3 s 633270 920228 633750 920298 0 FreeSans 400 0 0 0 gpio_dm2[14] +flabel metal3 s 633270 920228 633726 920298 0 FreeSans 400 0 0 0 gpio_dm2[14] port 671 nsew -flabel metal3 s 633270 920872 633750 920942 0 FreeSans 400 0 0 0 gpio_holdover[14] +flabel metal3 s 633270 920872 633726 920942 0 FreeSans 400 0 0 0 gpio_holdover[14] port 407 nsew -flabel metal3 s 633270 923908 633750 923978 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] +flabel metal3 s 633270 923908 633726 923978 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] port 275 nsew -flabel metal3 s 633270 917100 633750 917170 0 FreeSans 400 0 0 0 gpio_inp_dis[14] +flabel metal3 s 633270 917100 633726 917170 0 FreeSans 400 0 0 0 gpio_inp_dis[14] port 231 nsew -flabel metal3 s 633270 924552 633750 924622 0 FreeSans 400 0 0 0 gpio_oeb[14] +flabel metal3 s 633270 924552 633726 924622 0 FreeSans 400 0 0 0 gpio_oeb[14] port 187 nsew -flabel metal3 s 633270 921424 633750 921494 0 FreeSans 400 0 0 0 gpio_out[14] +flabel metal3 s 633270 921424 633726 921494 0 FreeSans 400 0 0 0 gpio_out[14] port 143 nsew -flabel metal3 s 633270 923264 633750 923334 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] +flabel metal3 s 633270 923264 633726 923334 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] port 319 nsew -flabel metal3 s 633270 925104 633750 925174 0 FreeSans 400 0 0 0 gpio_in_h[14] +flabel metal3 s 633270 925104 633726 925174 0 FreeSans 400 0 0 0 gpio_in_h[14] port 759 nsew -flabel metal3 s -424 927072 56 927142 0 FreeSans 400 0 0 0 gpio_in[24] +flabel metal3 s -400 927072 56 927142 0 FreeSans 400 0 0 0 gpio_in[24] port 705 nsew -flabel metal3 s -424 925232 56 925302 0 FreeSans 400 0 0 0 gpio_slow_sel[24] +flabel metal3 s -400 925232 56 925302 0 FreeSans 400 0 0 0 gpio_slow_sel[24] port 353 nsew -flabel metal3 s -424 923392 56 923462 0 FreeSans 400 0 0 0 gpio_dm1[24] +flabel metal3 s -400 923392 56 923462 0 FreeSans 400 0 0 0 gpio_dm1[24] port 617 nsew -flabel metal3 s -424 922196 56 922266 0 FreeSans 400 0 0 0 gpio_analog_en[24] +flabel metal3 s -400 922196 56 922266 0 FreeSans 400 0 0 0 gpio_analog_en[24] port 441 nsew -flabel metal3 s -424 921552 56 921622 0 FreeSans 400 0 0 0 gpio_dm0[24] +flabel metal3 s -400 921552 56 921622 0 FreeSans 400 0 0 0 gpio_dm0[24] port 573 nsew -flabel metal3 s -424 920908 56 920978 0 FreeSans 400 0 0 0 gpio_analog_pol[24] +flabel metal3 s -400 920908 56 920978 0 FreeSans 400 0 0 0 gpio_analog_pol[24] port 529 nsew -flabel metal3 s -424 920356 56 920426 0 FreeSans 400 0 0 0 gpio_inp_dis[24] +flabel metal3 s -400 920356 56 920426 0 FreeSans 400 0 0 0 gpio_inp_dis[24] port 221 nsew -flabel metal3 s -424 917872 56 917942 0 FreeSans 400 0 0 0 gpio_analog_sel[24] +flabel metal3 s -400 917872 56 917942 0 FreeSans 400 0 0 0 gpio_analog_sel[24] port 485 nsew -flabel metal3 s -424 917228 56 917298 0 FreeSans 400 0 0 0 gpio_dm2[24] +flabel metal3 s -400 917228 56 917298 0 FreeSans 400 0 0 0 gpio_dm2[24] port 661 nsew -flabel metal3 s -424 916584 56 916654 0 FreeSans 400 0 0 0 gpio_holdover[24] +flabel metal3 s -400 916584 56 916654 0 FreeSans 400 0 0 0 gpio_holdover[24] port 397 nsew -flabel metal3 s -424 916032 56 916102 0 FreeSans 400 0 0 0 gpio_out[24] +flabel metal3 s -400 916032 56 916102 0 FreeSans 400 0 0 0 gpio_out[24] port 133 nsew -flabel metal3 s -424 914192 56 914262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] +flabel metal3 s -400 914192 56 914262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] port 309 nsew -flabel metal3 s -424 913548 56 913618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] +flabel metal3 s -400 913548 56 913618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] port 265 nsew -flabel metal3 s -424 912904 56 912974 0 FreeSans 400 0 0 0 gpio_oeb[24] +flabel metal3 s -400 912904 56 912974 0 FreeSans 400 0 0 0 gpio_oeb[24] port 177 nsew -flabel metal3 s -424 912352 56 912422 0 FreeSans 400 0 0 0 gpio_in_h[24] +flabel metal3 s -400 912352 56 912422 0 FreeSans 400 0 0 0 gpio_in_h[24] port 749 nsew -flabel metal3 s -424 924560 56 924688 0 FreeSans 400 0 0 0 analog_io[24] +flabel metal3 s -400 924560 56 924688 0 FreeSans 400 0 0 0 analog_io[24] port 881 nsew -flabel metal3 s -424 922677 56 922891 0 FreeSans 400 0 0 0 analog_noesd_io[24] +flabel metal3 s -400 922677 56 922891 0 FreeSans 400 0 0 0 analog_noesd_io[24] port 925 nsew +flabel metal2 27498 953270 27558 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[23] +port 794 nsew +flabel metal2 78698 953270 78758 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[22] +port 795 nsew +flabel metal2 129898 953270 129958 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[21] +port 796 nsew +flabel metal2 181098 953270 181158 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[20] +port 797 nsew +flabel metal2 232298 953270 232358 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[19] +port 798 nsew +flabel metal2 336698 953270 336758 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[18] +port 799 nsew +flabel metal2 425698 953270 425758 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[17] +port 800 nsew +flabel metal2 476898 953270 476958 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[16] +port 801 nsew +flabel metal2 576298 953270 576358 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[15] +port 802 nsew << properties >> -string FIXED_BBOX 56 56 633270 953270 +string FIXED_BBOX 0 0 633326 953326 << end >> From 990f5dffc9ef03ed6c783aa0795426fc42cc12e5 Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Tue, 26 Sep 2023 17:58:05 -0400 Subject: [PATCH 124/138] Found one additional minor adjustment was needed to the resetb_h pin, which was neither 0.28um wide nor completely covered by metal2. --- def/openframe_project_wrapper.def | 2 +- mag/chip_io_openframe.mag | 66 +++++++++++++++---------------- mag/openframe_project_wrapper.mag | 7 ++-- 3 files changed, 37 insertions(+), 38 deletions(-) diff --git a/def/openframe_project_wrapper.def b/def/openframe_project_wrapper.def index 806848c6..8411eae7 100644 --- a/def/openframe_project_wrapper.def +++ b/def/openframe_project_wrapper.def @@ -814,7 +814,7 @@ PINS 914 ; + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 550960 -860 ) N ; - resetb_h + NET resetb_h + PORT - + LAYER met2 ( -165 -1140 ) ( 165 1140 ) + PLACED ( 498020 -860 ) N ; + + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 498020 -860 ) N ; - por_l + NET por_l + PORT + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 267035 ) N ; diff --git a/mag/chip_io_openframe.mag b/mag/chip_io_openframe.mag index 04297cef..b141a50e 100644 --- a/mag/chip_io_openframe.mag +++ b/mag/chip_io_openframe.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1695745228 +timestamp 1695765374 << metal1 >> rect 41866 995682 675734 995734 rect 41866 95347 41918 995682 @@ -599,13 +599,13 @@ rect 41701 95515 41725 95571 rect 17829 95291 17843 95347 rect 18112 95291 41347 95347 rect 41715 95291 41725 95347 -rect 141708 42047 141774 42193 -rect 141710 40350 141771 42047 +rect 141713 40366 141769 42193 rect 145035 41918 145207 41924 rect 145035 41866 145063 41918 rect 145115 41866 145127 41918 rect 145179 41866 145207 41918 rect 145035 41860 145207 41866 +rect 141710 40350 141771 40366 rect 140996 40125 141048 40131 rect 140996 40067 141048 40073 rect 141004 39990 141042 40067 @@ -4616,119 +4616,119 @@ timestamp 1695745122 transform 0 1 414200 -1 0 717600 box 675407 99896 677652 117658 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_0 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 0 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_1 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 45200 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_2 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 90200 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_3 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 135400 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_4 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 180400 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_5 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 225400 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_6 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 270600 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_7 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 447800 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_8 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 493000 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_9 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 538000 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_10 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 583200 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_11 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 628200 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_12 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 673200 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_13 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 762400 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_14 -timestamp 1695675344 +timestamp 1695746973 transform 1 0 0 0 1 851600 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_15 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 1070200 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_16 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 900400 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_17 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 857200 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_18 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 814000 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_19 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 770800 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_20 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 727600 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_21 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 684400 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_22 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 641200 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_23 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 513600 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_24 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 470400 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_25 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 427200 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_26 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 384000 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_27 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 340800 box 675407 99896 677658 117452 use chip_io_gpio_connects_horiz chip_io_gpio_connects_horiz_28 -timestamp 1695675344 +timestamp 1695746973 transform -1 0 717600 0 -1 297600 box 675407 99896 677658 117452 use constant_block constant_value_inst[0] @@ -8592,7 +8592,7 @@ flabel metal2 s 205928 41737 205980 42193 0 FreeSans 400 90 0 0 gpio_loopback_ze port 779 nsew flabel metal2 s 152301 41737 152357 42193 0 FreeSans 400 90 0 0 resetb_l port 37 nsew -flabel metal2 s 141708 41737 141774 42193 0 FreeSans 400 90 0 0 resetb_h +flabel metal2 s 141713 41737 141769 42193 0 FreeSans 400 90 0 0 resetb_h port 36 nsew flabel metal3 41737 95509 42193 95579 0 FreeSans 400 0 0 0 por_l port 35 nsew diff --git a/mag/openframe_project_wrapper.mag b/mag/openframe_project_wrapper.mag index a6bf36c3..bc000ea9 100644 --- a/mag/openframe_project_wrapper.mag +++ b/mag/openframe_project_wrapper.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1695744634 +timestamp 1695765213 << metal2 >> rect 27498 953270 27558 953726 rect 29498 953270 29558 953726 @@ -174,8 +174,7 @@ rect 595200 953270 595256 953726 rect 596360 953270 596488 953726 rect 597040 953270 597096 953726 rect 598880 953270 598936 953726 -rect 99571 -90 99637 56 -rect 99574 -400 99634 -90 +rect 99576 -400 99632 56 rect 110164 -400 110220 56 rect 145190 -400 145246 56 rect 147030 -400 147086 56 @@ -1455,7 +1454,7 @@ flabel metal2 s 163791 -400 163843 56 0 FreeSans 400 90 0 0 gpio_loopback_zero[3 port 779 nsew flabel metal2 s 110164 -400 110220 56 0 FreeSans 400 90 0 0 resetb_l port 37 nsew -flabel metal2 s 99571 -400 99637 56 0 FreeSans 400 90 0 0 resetb_h +flabel metal2 s 99576 -400 99632 56 0 FreeSans 400 90 0 0 resetb_h port 36 nsew flabel metal3 -400 53372 56 53442 0 FreeSans 400 0 0 0 por_l port 35 nsew From 495bf5fc5d22b64f43bba1ea01e67469b5d1adfb Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Wed, 27 Sep 2023 15:07:58 -0400 Subject: [PATCH 125/138] Stretched all metal3 pins 0.02um toward the center of the chip, so that the length of pin inside the wrapper boundary is 0.3um, which is the minimum metal3 layer width, and is required by the routing tool. --- def/openframe_project_wrapper.def | 1182 +++++++------- mag/chip_io_openframe.mag | 2440 ++++++++++++++--------------- mag/openframe_project_wrapper.mag | 2368 ++++++++++++++-------------- 3 files changed, 2995 insertions(+), 2995 deletions(-) diff --git a/def/openframe_project_wrapper.def b/def/openframe_project_wrapper.def index 8411eae7..b78bb25e 100644 --- a/def/openframe_project_wrapper.def +++ b/def/openframe_project_wrapper.def @@ -691,88 +691,88 @@ PINS 914 ; + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2438690 -860 ) N ; - vccd1 + NET vccd1 + PORT - + LAYER met3 ( -1140 -11655 ) ( 1140 11655 ) + PLACED ( 3167490 2125705 ) N ; + + LAYER met3 ( -1150 -11655 ) ( 1150 11655 ) + PLACED ( 3167480 2125705 ) N ; - vdda1 + NET vdda1 + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 3943870 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( 3167480 3943870 ) N ; - vdda1 + NET vdda1 + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 2370870 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( 3167480 2370870 ) N ; - vssa1 + NET vssa1 + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 1929870 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( 3167480 1929870 ) N ; - vssa1 + NET vssa1 + PORT - + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2679760 4767490 ) N ; + + LAYER met3 ( -11950 -1150 ) ( 11950 1150 ) + PLACED ( 2679760 4767480 ) N ; - vssio + NET vssio + PORT - + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 1468760 4767490 ) N ; + + LAYER met3 ( -11950 -1150 ) ( 11950 1150 ) + PLACED ( 1468760 4767480 ) N ; - vccd2 + NET vccd2 + PORT - + LAYER met3 ( -1140 -11975 ) ( 1140 11975 ) + PLACED ( -860 4412045 ) N ; + + LAYER met3 ( -1150 -11975 ) ( 1150 11975 ) + PLACED ( -850 4412045 ) N ; - vddio + NET vddio + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 4150760 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( -850 4150760 ) N ; - vssa2 + NET vssa2 + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 3939760 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( -850 3939760 ) N ; - vdda2 + NET vdda2 + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 2216760 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( -850 2216760 ) N ; - vddio + NET vddio + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 352760 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( -850 352760 ) N ; - vssio + NET vssio + PORT - + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2696870 -860 ) N ; + + LAYER met3 ( -11950 -1150 ) ( 11950 1150 ) + PLACED ( 2696870 -850 ) N ; - vdda + NET vdda + PORT - + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2965870 -860 ) N ; + + LAYER met3 ( -11950 -1150 ) ( 11950 1150 ) + PLACED ( 2965870 -850 ) N ; - analog_noesd_io[8] + NET analog_noesd_io[8] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 2780710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 2780710 ) N ; - gpio_loopback_one[24] + NET gpio_loopback_one[24] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 4533370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 4533370 ) N ; - gpio_loopback_one[25] + NET gpio_loopback_one[25] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3683370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 3683370 ) N ; - gpio_loopback_one[26] + NET gpio_loopback_one[26] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3468370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 3468370 ) N ; - gpio_loopback_one[27] + NET gpio_loopback_one[27] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3253370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 3253370 ) N ; - gpio_loopback_one[28] + NET gpio_loopback_one[28] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3038370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 3038370 ) N ; - gpio_loopback_one[29] + NET gpio_loopback_one[29] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2823370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 2823370 ) N ; - gpio_loopback_one[30] + NET gpio_loopback_one[30] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2608370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 2608370 ) N ; - gpio_loopback_one[31] + NET gpio_loopback_one[31] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2393370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 2393370 ) N ; - gpio_loopback_one[32] + NET gpio_loopback_one[32] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1748370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 1748370 ) N ; - gpio_loopback_one[33] + NET gpio_loopback_one[33] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1533370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 1533370 ) N ; - gpio_loopback_one[34] + NET gpio_loopback_one[34] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1318370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 1318370 ) N ; - gpio_loopback_one[35] + NET gpio_loopback_one[35] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1103370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 1103370 ) N ; - gpio_loopback_one[36] + NET gpio_loopback_one[36] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 888370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 888370 ) N ; - gpio_loopback_one[37] + NET gpio_loopback_one[37] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 673370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 673370 ) N ; - gpio_loopback_one[43] + NET gpio_loopback_one[43] + PORT + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 2442030 -860 ) N ; @@ -817,16 +817,16 @@ PINS 914 ; + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 498020 -860 ) N ; - por_l + NET por_l + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 267035 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 267035 ) N ; - porb_l + NET porb_l + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 268150 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 268150 ) N ; - mask_rev[0] + NET mask_rev[0] + PORT + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3025540 -860 ) N ; - porb_h + NET porb_h + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 265910 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 265910 ) N ; - gpio_loopback_one[15] + NET gpio_loopback_one[15] + PORT + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2891640 4767490 ) N ; @@ -856,28 +856,28 @@ PINS 914 ; + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 147640 4767490 ) N ; - gpio_loopback_one[7] + NET gpio_loopback_one[7] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 2615180 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 2615180 ) N ; - gpio_loopback_one[6] + NET gpio_loopback_one[6] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1730180 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 1730180 ) N ; - gpio_loopback_one[5] + NET gpio_loopback_one[5] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1505180 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 1505180 ) N ; - gpio_loopback_one[4] + NET gpio_loopback_one[4] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1280180 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 1280180 ) N ; - gpio_loopback_one[3] + NET gpio_loopback_one[3] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1055180 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 1055180 ) N ; - gpio_loopback_one[2] + NET gpio_loopback_one[2] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 830180 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 830180 ) N ; - gpio_loopback_one[1] + NET gpio_loopback_one[1] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 605180 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 605180 ) N ; - gpio_loopback_one[0] + NET gpio_loopback_one[0] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 380180 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 380180 ) N ; - mask_rev[4] + NET mask_rev[4] + PORT + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3030020 -860 ) N ; @@ -973,46 +973,46 @@ PINS 914 ; + LAYER met2 ( -130 -1140 ) ( 130 1140 ) + PLACED ( 3026660 -860 ) N ; - gpio_loopback_zero[25] + NET gpio_loopback_zero[25] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3673370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 3673370 ) N ; - gpio_loopback_zero[27] + NET gpio_loopback_zero[27] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3243370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 3243370 ) N ; - gpio_loopback_zero[29] + NET gpio_loopback_zero[29] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2813370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 2813370 ) N ; - gpio_loopback_zero[31] + NET gpio_loopback_zero[31] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2383370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 2383370 ) N ; - gpio_loopback_zero[33] + NET gpio_loopback_zero[33] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1523370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 1523370 ) N ; - gpio_loopback_zero[35] + NET gpio_loopback_zero[35] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1093370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 1093370 ) N ; - gpio_loopback_zero[37] + NET gpio_loopback_zero[37] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 663370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 663370 ) N ; - gpio_loopback_zero[24] + NET gpio_loopback_zero[24] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 4523370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 4523370 ) N ; - gpio_loopback_zero[26] + NET gpio_loopback_zero[26] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3458370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 3458370 ) N ; - gpio_loopback_zero[28] + NET gpio_loopback_zero[28] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 3028370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 3028370 ) N ; - gpio_loopback_zero[30] + NET gpio_loopback_zero[30] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 2598370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 2598370 ) N ; - gpio_loopback_zero[32] + NET gpio_loopback_zero[32] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1738370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 1738370 ) N ; - gpio_loopback_zero[34] + NET gpio_loopback_zero[34] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 1308370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 1308370 ) N ; - gpio_loopback_zero[36] + NET gpio_loopback_zero[36] + PORT - + LAYER met3 ( -1140 -150 ) ( 1140 150 ) + PLACED ( -860 878370 ) N ; + + LAYER met3 ( -1150 -150 ) ( 1150 150 ) + PLACED ( -850 878370 ) N ; - gpio_slow_sel[38] + NET gpio_slow_sel[38] + PORT + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 735290 -860 ) N ; @@ -1021,94 +1021,94 @@ PINS 914 ; + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 726090 -860 ) N ; - vssa + NET vssa + PORT - + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 245870 -860 ) N ; + + LAYER met3 ( -11950 -1150 ) ( 11950 1150 ) + PLACED ( 245870 -850 ) N ; - analog_io[0] + NET analog_io[0] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 306510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 306510 ) N ; - analog_noesd_io[0] + NET analog_noesd_io[0] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 315710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 315710 ) N ; - analog_noesd_io[1] + NET analog_noesd_io[1] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 541710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 541710 ) N ; - analog_io[1] + NET analog_io[1] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 532510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 532510 ) N ; - analog_io[2] + NET analog_io[2] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 757510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 757510 ) N ; - analog_noesd_io[2] + NET analog_noesd_io[2] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 766710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 766710 ) N ; - analog_io[3] + NET analog_io[3] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 983510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 983510 ) N ; - analog_noesd_io[3] + NET analog_noesd_io[3] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 992710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 992710 ) N ; - analog_io[4] + NET analog_io[4] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 1208510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 1208510 ) N ; - analog_noesd_io[4] + NET analog_noesd_io[4] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 1217710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 1217710 ) N ; - analog_io[5] + NET analog_io[5] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 1433510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 1433510 ) N ; - analog_noesd_io[5] + NET analog_noesd_io[5] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 1442710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 1442710 ) N ; - analog_io[6] + NET analog_io[6] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 1659510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 1659510 ) N ; - analog_noesd_io[6] + NET analog_noesd_io[6] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 1668710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 1668710 ) N ; - analog_io[7] + NET analog_io[7] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 2545510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 2545510 ) N ; - analog_noesd_io[7] + NET analog_noesd_io[7] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 2554710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 2554710 ) N ; - analog_io[8] + NET analog_io[8] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 2771510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 2771510 ) N ; - analog_io[9] + NET analog_io[9] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 2996510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 2996510 ) N ; - analog_noesd_io[9] + NET analog_noesd_io[9] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 3005710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 3005710 ) N ; - analog_io[10] + NET analog_io[10] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 3222510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 3222510 ) N ; - analog_noesd_io[10] + NET analog_noesd_io[10] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 3231710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 3231710 ) N ; - analog_io[11] + NET analog_io[11] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 3447510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 3447510 ) N ; - analog_noesd_io[11] + NET analog_noesd_io[11] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 3456710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 3456710 ) N ; - analog_io[12] + NET analog_io[12] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 3672510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 3672510 ) N ; - analog_io[13] + NET analog_io[13] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 4118510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 4118510 ) N ; - analog_io[14] + NET analog_io[14] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( 3167490 4564510 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( 3167480 4564510 ) N ; - analog_noesd_io[12] + NET analog_noesd_io[12] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 3681710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 3681710 ) N ; - analog_noesd_io[13] + NET analog_noesd_io[13] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 4127710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 4127710 ) N ; - analog_noesd_io[14] + NET analog_noesd_io[14] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( 3167490 4573710 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( 3167480 4573710 ) N ; - analog_io[15] + NET analog_io[15] + PORT + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 2982120 4767490 ) N ; @@ -1165,79 +1165,79 @@ PINS 914 ; + LAYER met2 ( -535 -1140 ) ( 535 1140 ) + PLACED ( 223920 4767490 ) N ; - analog_io[25] + NET analog_io[25] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 3774120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 3774120 ) N ; - analog_io[26] + NET analog_io[26] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 3558120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 3558120 ) N ; - analog_io[27] + NET analog_io[27] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 3342120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 3342120 ) N ; - analog_io[28] + NET analog_io[28] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 3126120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 3126120 ) N ; - analog_io[29] + NET analog_io[29] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 2910120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 2910120 ) N ; - analog_io[30] + NET analog_io[30] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 2694120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 2694120 ) N ; - analog_io[31] + NET analog_io[31] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 2478120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 2478120 ) N ; - analog_io[32] + NET analog_io[32] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 1840120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 1840120 ) N ; - analog_io[33] + NET analog_io[33] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 1624120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 1624120 ) N ; - analog_io[34] + NET analog_io[34] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 1408120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 1408120 ) N ; - analog_io[35] + NET analog_io[35] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 1192120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 1192120 ) N ; - analog_io[36] + NET analog_io[36] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 976120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 976120 ) N ; - analog_io[37] + NET analog_io[37] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 760120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 760120 ) N ; - analog_noesd_io[25] + NET analog_noesd_io[25] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 3764920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 3764920 ) N ; - analog_noesd_io[26] + NET analog_noesd_io[26] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 3548920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 3548920 ) N ; - analog_noesd_io[27] + NET analog_noesd_io[27] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 3332920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 3332920 ) N ; - analog_noesd_io[28] + NET analog_noesd_io[28] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 3116920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 3116920 ) N ; - analog_noesd_io[29] + NET analog_noesd_io[29] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 2900920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 2900920 ) N ; - analog_noesd_io[30] + NET analog_noesd_io[30] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 2684920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 2684920 ) N ; - analog_noesd_io[32] + NET analog_noesd_io[32] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 1830920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 1830920 ) N ; - analog_noesd_io[33] + NET analog_noesd_io[33] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 1614920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 1614920 ) N ; - analog_noesd_io[34] + NET analog_noesd_io[34] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 1398920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 1398920 ) N ; - analog_noesd_io[35] + NET analog_noesd_io[35] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 1182920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 1182920 ) N ; - analog_noesd_io[36] + NET analog_noesd_io[36] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 966920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 966920 ) N ; - analog_noesd_io[37] + NET analog_noesd_io[37] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 750920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 750920 ) N ; - analog_io[39] + NET analog_io[39] + PORT + LAYER met2 ( -320 -1140 ) ( 320 1140 ) + PLACED ( 1281510 -860 ) N ; @@ -1282,1453 +1282,1453 @@ PINS 914 ; + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 753690 -860 ) N ; - analog_noesd_io[31] + NET analog_noesd_io[31] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 2468920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 2468920 ) N ; - vssa1 + NET vssa1 + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 1879980 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( 3167480 1879980 ) N ; - vssd1 + NET vssd1 + PORT - + LAYER met3 ( -1140 -11975 ) ( 1140 11975 ) + PLACED ( 3167490 2100585 ) N ; + + LAYER met3 ( -1150 -11975 ) ( 1150 11975 ) + PLACED ( 3167480 2100585 ) N ; - vssd1 + NET vssd1 + PORT - + LAYER met3 ( -1140 -12000 ) ( 1140 12000 ) + PLACED ( 3167490 2150810 ) N ; + + LAYER met3 ( -1150 -12000 ) ( 1150 12000 ) + PLACED ( 3167480 2150810 ) N ; - vdda1 + NET vdda1 + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 2320970 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( 3167480 2320970 ) N ; - gpio_loopback_one[8] + NET gpio_loopback_one[8] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 2840185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 2840185 ) N ; - gpio_loopback_one[9] + NET gpio_loopback_one[9] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3065185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 3065185 ) N ; - gpio_loopback_one[10] + NET gpio_loopback_one[10] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3290185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 3290185 ) N ; - gpio_loopback_one[11] + NET gpio_loopback_one[11] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3515185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 3515185 ) N ; - gpio_loopback_one[12] + NET gpio_loopback_one[12] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3740185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 3740185 ) N ; - vdda1 + NET vdda1 + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( 3167490 3893980 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( 3167480 3893980 ) N ; - gpio_loopback_one[13] + NET gpio_loopback_one[13] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 4185185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 4185185 ) N ; - gpio_loopback_one[14] + NET gpio_loopback_one[14] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 4635185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 4635185 ) N ; - vssa1 + NET vssa1 + PORT - + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2729660 4767490 ) N ; + + LAYER met3 ( -11950 -1150 ) ( 11950 1150 ) + PLACED ( 2729660 4767480 ) N ; - vssio + NET vssio + PORT - + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 1518660 4767490 ) N ; + + LAYER met3 ( -11950 -1150 ) ( 11950 1150 ) + PLACED ( 1518660 4767480 ) N ; - vssd2 + NET vssd2 + PORT - + LAYER met3 ( -1140 -11655 ) ( 1140 11655 ) + PLACED ( -860 4386925 ) N ; + + LAYER met3 ( -1150 -11655 ) ( 1150 11655 ) + PLACED ( -850 4386925 ) N ; - vccd2 + NET vccd2 + PORT - + LAYER met3 ( -1140 -12000 ) ( 1140 12000 ) + PLACED ( -860 4361820 ) N ; + + LAYER met3 ( -1150 -12000 ) ( 1150 12000 ) + PLACED ( -850 4361820 ) N ; - vddio + NET vddio + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 4200660 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( -850 4200660 ) N ; - vssa2 + NET vssa2 + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 3989660 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( -850 3989660 ) N ; - gpio_in[25] + NET gpio_in[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3786535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3786535 ) N ; - gpio_slow_sel[25] + NET gpio_slow_sel[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3777335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3777335 ) N ; - gpio_dm1[25] + NET gpio_dm1[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3768135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3768135 ) N ; - gpio_analog_en[25] + NET gpio_analog_en[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3762155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3762155 ) N ; - gpio_dm0[25] + NET gpio_dm0[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3758935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3758935 ) N ; - gpio_analog_pol[25] + NET gpio_analog_pol[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3755715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3755715 ) N ; - gpio_inp_dis[25] + NET gpio_inp_dis[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3752955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3752955 ) N ; - gpio_analog_sel[25] + NET gpio_analog_sel[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3740535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3740535 ) N ; - gpio_dm2[25] + NET gpio_dm2[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3737315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3737315 ) N ; - gpio_holdover[25] + NET gpio_holdover[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3734095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3734095 ) N ; - gpio_out[25] + NET gpio_out[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3731335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3731335 ) N ; - gpio_vtrip_sel[25] + NET gpio_vtrip_sel[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3722135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3722135 ) N ; - gpio_ib_mode_sel[25] + NET gpio_ib_mode_sel[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3718915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3718915 ) N ; - gpio_oeb[25] + NET gpio_oeb[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3715695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3715695 ) N ; - gpio_in_h[25] + NET gpio_in_h[25] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3712935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3712935 ) N ; - gpio_in[26] + NET gpio_in[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3570535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3570535 ) N ; - gpio_slow_sel[26] + NET gpio_slow_sel[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3561335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3561335 ) N ; - gpio_dm1[26] + NET gpio_dm1[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3552135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3552135 ) N ; - gpio_analog_en[26] + NET gpio_analog_en[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3546155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3546155 ) N ; - gpio_dm0[26] + NET gpio_dm0[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3542935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3542935 ) N ; - gpio_analog_pol[26] + NET gpio_analog_pol[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3539715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3539715 ) N ; - gpio_inp_dis[26] + NET gpio_inp_dis[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3536955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3536955 ) N ; - gpio_analog_sel[26] + NET gpio_analog_sel[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3524535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3524535 ) N ; - gpio_dm2[26] + NET gpio_dm2[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3521315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3521315 ) N ; - gpio_holdover[26] + NET gpio_holdover[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3518095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3518095 ) N ; - gpio_out[26] + NET gpio_out[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3515335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3515335 ) N ; - gpio_vtrip_sel[26] + NET gpio_vtrip_sel[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3506135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3506135 ) N ; - gpio_ib_mode_sel[26] + NET gpio_ib_mode_sel[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3502915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3502915 ) N ; - gpio_oeb[26] + NET gpio_oeb[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3499695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3499695 ) N ; - gpio_in_h[26] + NET gpio_in_h[26] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3496935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3496935 ) N ; - gpio_vtrip_sel[37] + NET gpio_vtrip_sel[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 708135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 708135 ) N ; - gpio_analog_en[37] + NET gpio_analog_en[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 748155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 748155 ) N ; - gpio_analog_pol[37] + NET gpio_analog_pol[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 741715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 741715 ) N ; - gpio_analog_sel[37] + NET gpio_analog_sel[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 726535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 726535 ) N ; - gpio_dm0[37] + NET gpio_dm0[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 744935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 744935 ) N ; - gpio_dm2[37] + NET gpio_dm2[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 723315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 723315 ) N ; - gpio_holdover[37] + NET gpio_holdover[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 720095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 720095 ) N ; - gpio_ib_mode_sel[37] + NET gpio_ib_mode_sel[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 704915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 704915 ) N ; - gpio_oeb[37] + NET gpio_oeb[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 701695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 701695 ) N ; - gpio_out[37] + NET gpio_out[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 717335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 717335 ) N ; - gpio_inp_dis[37] + NET gpio_inp_dis[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 738955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 738955 ) N ; - gpio_in_h[37] + NET gpio_in_h[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 698935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 698935 ) N ; - gpio_dm1[37] + NET gpio_dm1[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 754135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 754135 ) N ; - gpio_slow_sel[37] + NET gpio_slow_sel[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 763335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 763335 ) N ; - gpio_in[37] + NET gpio_in[37] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 772535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 772535 ) N ; - gpio_dm2[36] + NET gpio_dm2[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 939315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 939315 ) N ; - gpio_holdover[36] + NET gpio_holdover[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 936095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 936095 ) N ; - gpio_ib_mode_sel[36] + NET gpio_ib_mode_sel[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 920915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 920915 ) N ; - gpio_inp_dis[36] + NET gpio_inp_dis[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 954955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 954955 ) N ; - gpio_oeb[36] + NET gpio_oeb[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 917695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 917695 ) N ; - gpio_out[36] + NET gpio_out[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 933335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 933335 ) N ; - gpio_vtrip_sel[36] + NET gpio_vtrip_sel[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 924135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 924135 ) N ; - gpio_analog_en[36] + NET gpio_analog_en[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 964155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 964155 ) N ; - gpio_analog_pol[36] + NET gpio_analog_pol[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 957715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 957715 ) N ; - gpio_analog_sel[36] + NET gpio_analog_sel[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 942535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 942535 ) N ; - gpio_dm0[36] + NET gpio_dm0[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 960935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 960935 ) N ; - gpio_in_h[36] + NET gpio_in_h[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 914935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 914935 ) N ; - gpio_dm1[36] + NET gpio_dm1[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 970135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 970135 ) N ; - gpio_slow_sel[36] + NET gpio_slow_sel[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 979335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 979335 ) N ; - gpio_in[36] + NET gpio_in[36] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 988535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 988535 ) N ; - gpio_analog_en[35] + NET gpio_analog_en[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1180155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1180155 ) N ; - gpio_analog_pol[35] + NET gpio_analog_pol[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1173715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1173715 ) N ; - gpio_analog_sel[35] + NET gpio_analog_sel[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1158535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1158535 ) N ; - gpio_dm0[35] + NET gpio_dm0[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1176935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1176935 ) N ; - gpio_dm2[35] + NET gpio_dm2[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1155315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1155315 ) N ; - gpio_holdover[35] + NET gpio_holdover[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1152095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1152095 ) N ; - gpio_ib_mode_sel[35] + NET gpio_ib_mode_sel[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1136915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1136915 ) N ; - gpio_inp_dis[35] + NET gpio_inp_dis[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1170955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1170955 ) N ; - gpio_oeb[35] + NET gpio_oeb[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1133695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1133695 ) N ; - gpio_out[35] + NET gpio_out[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1149335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1149335 ) N ; - gpio_vtrip_sel[35] + NET gpio_vtrip_sel[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1140135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1140135 ) N ; - gpio_in_h[35] + NET gpio_in_h[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1130935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1130935 ) N ; - gpio_dm1[35] + NET gpio_dm1[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1186135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1186135 ) N ; - gpio_slow_sel[35] + NET gpio_slow_sel[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1195335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1195335 ) N ; - gpio_in[35] + NET gpio_in[35] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1204535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1204535 ) N ; - gpio_analog_en[34] + NET gpio_analog_en[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1396155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1396155 ) N ; - gpio_analog_pol[34] + NET gpio_analog_pol[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1389715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1389715 ) N ; - gpio_analog_sel[34] + NET gpio_analog_sel[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1374535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1374535 ) N ; - gpio_dm0[34] + NET gpio_dm0[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1392935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1392935 ) N ; - gpio_dm2[34] + NET gpio_dm2[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1371315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1371315 ) N ; - gpio_holdover[34] + NET gpio_holdover[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1368095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1368095 ) N ; - gpio_ib_mode_sel[34] + NET gpio_ib_mode_sel[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1352915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1352915 ) N ; - gpio_inp_dis[34] + NET gpio_inp_dis[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1386955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1386955 ) N ; - gpio_oeb[34] + NET gpio_oeb[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1349695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1349695 ) N ; - gpio_out[34] + NET gpio_out[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1365335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1365335 ) N ; - gpio_vtrip_sel[34] + NET gpio_vtrip_sel[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1356135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1356135 ) N ; - gpio_in_h[34] + NET gpio_in_h[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1346935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1346935 ) N ; - gpio_dm1[34] + NET gpio_dm1[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1402135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1402135 ) N ; - gpio_slow_sel[34] + NET gpio_slow_sel[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1411335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1411335 ) N ; - gpio_in[34] + NET gpio_in[34] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1420535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1420535 ) N ; - gpio_analog_en[33] + NET gpio_analog_en[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1612155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1612155 ) N ; - gpio_analog_sel[33] + NET gpio_analog_sel[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1590535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1590535 ) N ; - gpio_dm2[33] + NET gpio_dm2[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1587315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1587315 ) N ; - gpio_dm0[33] + NET gpio_dm0[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1608935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1608935 ) N ; - gpio_holdover[33] + NET gpio_holdover[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1584095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1584095 ) N ; - gpio_ib_mode_sel[33] + NET gpio_ib_mode_sel[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1568915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1568915 ) N ; - gpio_inp_dis[33] + NET gpio_inp_dis[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1602955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1602955 ) N ; - gpio_oeb[33] + NET gpio_oeb[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1565695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1565695 ) N ; - gpio_out[33] + NET gpio_out[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1581335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1581335 ) N ; - gpio_vtrip_sel[33] + NET gpio_vtrip_sel[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1572135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1572135 ) N ; - gpio_in_h[33] + NET gpio_in_h[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1562935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1562935 ) N ; - gpio_analog_pol[33] + NET gpio_analog_pol[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1605715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1605715 ) N ; - gpio_dm1[33] + NET gpio_dm1[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1618135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1618135 ) N ; - gpio_slow_sel[33] + NET gpio_slow_sel[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1627335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1627335 ) N ; - gpio_in[33] + NET gpio_in[33] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1636535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1636535 ) N ; - gpio_analog_en[32] + NET gpio_analog_en[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1828155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1828155 ) N ; - gpio_analog_pol[32] + NET gpio_analog_pol[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1821715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1821715 ) N ; - gpio_analog_sel[32] + NET gpio_analog_sel[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1806535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1806535 ) N ; - gpio_dm0[32] + NET gpio_dm0[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1824935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1824935 ) N ; - gpio_dm2[32] + NET gpio_dm2[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1803315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1803315 ) N ; - gpio_holdover[32] + NET gpio_holdover[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1800095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1800095 ) N ; - gpio_ib_mode_sel[32] + NET gpio_ib_mode_sel[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1784915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1784915 ) N ; - gpio_inp_dis[32] + NET gpio_inp_dis[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1818955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1818955 ) N ; - gpio_oeb[32] + NET gpio_oeb[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1781695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1781695 ) N ; - gpio_out[32] + NET gpio_out[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1797335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1797335 ) N ; - gpio_vtrip_sel[32] + NET gpio_vtrip_sel[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1788135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1788135 ) N ; - gpio_in_h[32] + NET gpio_in_h[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1778935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1778935 ) N ; - gpio_dm1[32] + NET gpio_dm1[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1834135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1834135 ) N ; - gpio_slow_sel[32] + NET gpio_slow_sel[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1843335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1843335 ) N ; - gpio_in[32] + NET gpio_in[32] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 1852535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 1852535 ) N ; - gpio_analog_en[31] + NET gpio_analog_en[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2466155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2466155 ) N ; - gpio_analog_pol[31] + NET gpio_analog_pol[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2459715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2459715 ) N ; - gpio_analog_sel[31] + NET gpio_analog_sel[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2444535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2444535 ) N ; - gpio_dm0[31] + NET gpio_dm0[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2462935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2462935 ) N ; - gpio_dm2[31] + NET gpio_dm2[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2441315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2441315 ) N ; - gpio_holdover[31] + NET gpio_holdover[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2438095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2438095 ) N ; - gpio_ib_mode_sel[31] + NET gpio_ib_mode_sel[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2422915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2422915 ) N ; - gpio_inp_dis[31] + NET gpio_inp_dis[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2456955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2456955 ) N ; - gpio_oeb[31] + NET gpio_oeb[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2419695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2419695 ) N ; - gpio_out[31] + NET gpio_out[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2435335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2435335 ) N ; - gpio_vtrip_sel[31] + NET gpio_vtrip_sel[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2426135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2426135 ) N ; - gpio_in_h[31] + NET gpio_in_h[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2416935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2416935 ) N ; - gpio_dm1[31] + NET gpio_dm1[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2472135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2472135 ) N ; - gpio_slow_sel[31] + NET gpio_slow_sel[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2481335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2481335 ) N ; - gpio_in[31] + NET gpio_in[31] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2490535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2490535 ) N ; - gpio_dm0[30] + NET gpio_dm0[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2678935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2678935 ) N ; - gpio_dm2[30] + NET gpio_dm2[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2657315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2657315 ) N ; - gpio_holdover[30] + NET gpio_holdover[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2654095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2654095 ) N ; - gpio_ib_mode_sel[30] + NET gpio_ib_mode_sel[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2638915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2638915 ) N ; - gpio_inp_dis[30] + NET gpio_inp_dis[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2672955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2672955 ) N ; - gpio_oeb[30] + NET gpio_oeb[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2635695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2635695 ) N ; - gpio_out[30] + NET gpio_out[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2651335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2651335 ) N ; - gpio_vtrip_sel[30] + NET gpio_vtrip_sel[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2642135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2642135 ) N ; - gpio_analog_en[30] + NET gpio_analog_en[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2682155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2682155 ) N ; - gpio_analog_pol[30] + NET gpio_analog_pol[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2675715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2675715 ) N ; - gpio_analog_sel[30] + NET gpio_analog_sel[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2660535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2660535 ) N ; - gpio_in_h[30] + NET gpio_in_h[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2632935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2632935 ) N ; - gpio_dm1[30] + NET gpio_dm1[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2688135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2688135 ) N ; - gpio_slow_sel[30] + NET gpio_slow_sel[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2697335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2697335 ) N ; - gpio_in[30] + NET gpio_in[30] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2706535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2706535 ) N ; - gpio_analog_sel[29] + NET gpio_analog_sel[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2876535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2876535 ) N ; - gpio_dm2[29] + NET gpio_dm2[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2873315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2873315 ) N ; - gpio_holdover[29] + NET gpio_holdover[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2870095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2870095 ) N ; - gpio_ib_mode_sel[29] + NET gpio_ib_mode_sel[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2854915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2854915 ) N ; - gpio_oeb[29] + NET gpio_oeb[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2851695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2851695 ) N ; - gpio_out[29] + NET gpio_out[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2867335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2867335 ) N ; - gpio_vtrip_sel[29] + NET gpio_vtrip_sel[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2858135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2858135 ) N ; - gpio_in_h[29] + NET gpio_in_h[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2848935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2848935 ) N ; - gpio_analog_en[29] + NET gpio_analog_en[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2898155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2898155 ) N ; - gpio_analog_pol[29] + NET gpio_analog_pol[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2891715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2891715 ) N ; - gpio_dm0[29] + NET gpio_dm0[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2894935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2894935 ) N ; - gpio_inp_dis[29] + NET gpio_inp_dis[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2888955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2888955 ) N ; - gpio_dm1[29] + NET gpio_dm1[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2904135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2904135 ) N ; - gpio_slow_sel[29] + NET gpio_slow_sel[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2913335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2913335 ) N ; - gpio_in[29] + NET gpio_in[29] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 2922535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 2922535 ) N ; - gpio_analog_en[28] + NET gpio_analog_en[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3114155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3114155 ) N ; - gpio_analog_pol[28] + NET gpio_analog_pol[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3107715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3107715 ) N ; - gpio_analog_sel[28] + NET gpio_analog_sel[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3092535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3092535 ) N ; - gpio_dm0[28] + NET gpio_dm0[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3110935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3110935 ) N ; - gpio_dm2[28] + NET gpio_dm2[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3089315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3089315 ) N ; - gpio_holdover[28] + NET gpio_holdover[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3086095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3086095 ) N ; - gpio_ib_mode_sel[28] + NET gpio_ib_mode_sel[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3070915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3070915 ) N ; - gpio_inp_dis[28] + NET gpio_inp_dis[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3104955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3104955 ) N ; - gpio_oeb[28] + NET gpio_oeb[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3067695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3067695 ) N ; - gpio_out[28] + NET gpio_out[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3083335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3083335 ) N ; - gpio_vtrip_sel[28] + NET gpio_vtrip_sel[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3074135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3074135 ) N ; - gpio_in_h[28] + NET gpio_in_h[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3064935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3064935 ) N ; - gpio_dm1[28] + NET gpio_dm1[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3120135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3120135 ) N ; - gpio_slow_sel[28] + NET gpio_slow_sel[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3129335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3129335 ) N ; - gpio_in[28] + NET gpio_in[28] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3138535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3138535 ) N ; - gpio_analog_en[27] + NET gpio_analog_en[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3330155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3330155 ) N ; - gpio_analog_pol[27] + NET gpio_analog_pol[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3323715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3323715 ) N ; - gpio_analog_sel[27] + NET gpio_analog_sel[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3308535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3308535 ) N ; - gpio_dm0[27] + NET gpio_dm0[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3326935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3326935 ) N ; - gpio_dm2[27] + NET gpio_dm2[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3305315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3305315 ) N ; - gpio_holdover[27] + NET gpio_holdover[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3302095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3302095 ) N ; - gpio_ib_mode_sel[27] + NET gpio_ib_mode_sel[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3286915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3286915 ) N ; - gpio_inp_dis[27] + NET gpio_inp_dis[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3320955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3320955 ) N ; - gpio_oeb[27] + NET gpio_oeb[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3283695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3283695 ) N ; - gpio_out[27] + NET gpio_out[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3299335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3299335 ) N ; - gpio_vtrip_sel[27] + NET gpio_vtrip_sel[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3290135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3290135 ) N ; - gpio_in_h[27] + NET gpio_in_h[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3280935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3280935 ) N ; - gpio_dm1[27] + NET gpio_dm1[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3336135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3336135 ) N ; - gpio_slow_sel[27] + NET gpio_slow_sel[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3345335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3345335 ) N ; - gpio_in[27] + NET gpio_in[27] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 3354535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 3354535 ) N ; - vdda2 + NET vdda2 + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 2266650 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( -850 2266650 ) N ; - vssd2 + NET vssd2 + PORT - + LAYER met3 ( -1140 -11975 ) ( 1140 11975 ) + PLACED ( -860 2056045 ) N ; + + LAYER met3 ( -1150 -11975 ) ( 1150 11975 ) + PLACED ( -850 2056045 ) N ; - vccd2 + NET vccd2 + PORT - + LAYER met3 ( -1140 -11630 ) ( 1140 11630 ) + PLACED ( -860 2030940 ) N ; + + LAYER met3 ( -1150 -11630 ) ( 1150 11630 ) + PLACED ( -850 2030940 ) N ; - vssd2 + NET vssd2 + PORT - + LAYER met3 ( -1140 -12000 ) ( 1140 12000 ) + PLACED ( -860 2005810 ) N ; + + LAYER met3 ( -1150 -12000 ) ( 1150 12000 ) + PLACED ( -850 2005810 ) N ; - vddio + NET vddio + PORT - + LAYER met3 ( -1140 -11950 ) ( 1140 11950 ) + PLACED ( -860 402650 ) N ; + + LAYER met3 ( -1150 -11950 ) ( 1150 11950 ) + PLACED ( -850 402650 ) N ; - vccd + NET vccd + PORT - + LAYER met3 ( -1140 -11975 ) ( 1140 11975 ) + PLACED ( -860 192045 ) N ; + + LAYER met3 ( -1150 -11975 ) ( 1150 11975 ) + PLACED ( -850 192045 ) N ; - vccd + NET vccd + PORT - + LAYER met3 ( -1140 -12000 ) ( 1140 12000 ) + PLACED ( -860 141810 ) N ; + + LAYER met3 ( -1150 -12000 ) ( 1150 12000 ) + PLACED ( -850 141810 ) N ; - vssa + NET vssa + PORT - + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 195980 -860 ) N ; + + LAYER met3 ( -11950 -1150 ) ( 11950 1150 ) + PLACED ( 195980 -850 ) N ; - vssd + NET vssd + PORT - + LAYER met3 ( -11575 -1140 ) ( 11575 1140 ) + PLACED ( 1007995 -860 ) N ; + + LAYER met3 ( -11575 -1150 ) ( 11575 1150 ) + PLACED ( 1007995 -850 ) N ; - vssd + NET vssd + PORT - + LAYER met3 ( -12000 -1140 ) ( 12000 1140 ) + PLACED ( 1057820 -860 ) N ; + + LAYER met3 ( -12000 -1150 ) ( 12000 1150 ) + PLACED ( 1057820 -850 ) N ; - vssio + NET vssio + PORT - + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2646980 -860 ) N ; + + LAYER met3 ( -11950 -1150 ) ( 11950 1150 ) + PLACED ( 2646980 -850 ) N ; - vdda + NET vdda + PORT - + LAYER met3 ( -11950 -1140 ) ( 11950 1140 ) + PLACED ( 2915980 -860 ) N ; + + LAYER met3 ( -11950 -1150 ) ( 11950 1150 ) + PLACED ( 2915980 -850 ) N ; - gpio_loopback_zero[14] + NET gpio_loopback_zero[14] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 4645185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 4645185 ) N ; - gpio_loopback_zero[13] + NET gpio_loopback_zero[13] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 4195185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 4195185 ) N ; - gpio_loopback_zero[12] + NET gpio_loopback_zero[12] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3750185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 3750185 ) N ; - gpio_loopback_zero[11] + NET gpio_loopback_zero[11] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3525185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 3525185 ) N ; - gpio_loopback_zero[10] + NET gpio_loopback_zero[10] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3300185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 3300185 ) N ; - gpio_loopback_zero[9] + NET gpio_loopback_zero[9] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 3075185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 3075185 ) N ; - gpio_loopback_zero[8] + NET gpio_loopback_zero[8] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 2850185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 2850185 ) N ; - gpio_loopback_zero[7] + NET gpio_loopback_zero[7] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 2625185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 2625185 ) N ; - gpio_loopback_zero[6] + NET gpio_loopback_zero[6] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1740185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 1740185 ) N ; - gpio_loopback_zero[5] + NET gpio_loopback_zero[5] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1515185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 1515185 ) N ; - gpio_loopback_zero[4] + NET gpio_loopback_zero[4] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1290185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 1290185 ) N ; - gpio_loopback_zero[3] + NET gpio_loopback_zero[3] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 1065185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 1065185 ) N ; - gpio_loopback_zero[2] + NET gpio_loopback_zero[2] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 840185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 840185 ) N ; - gpio_loopback_zero[1] + NET gpio_loopback_zero[1] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 615185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 615185 ) N ; - gpio_loopback_zero[0] + NET gpio_loopback_zero[0] + PORT - + LAYER met3 ( -1140 -155 ) ( 1140 155 ) + PLACED ( 3167490 390185 ) N ; + + LAYER met3 ( -1150 -155 ) ( 1150 155 ) + PLACED ( 3167480 390185 ) N ; - gpio_slow_sel[0] + NET gpio_slow_sel[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 303295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 303295 ) N ; - gpio_in[0] + NET gpio_in[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 294095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 294095 ) N ; - gpio_dm1[0] + NET gpio_dm1[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 312495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 312495 ) N ; - gpio_analog_en[0] + NET gpio_analog_en[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 318475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 318475 ) N ; - gpio_analog_pol[0] + NET gpio_analog_pol[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 324915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 324915 ) N ; - gpio_analog_sel[0] + NET gpio_analog_sel[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 340095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 340095 ) N ; - gpio_dm0[0] + NET gpio_dm0[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 321695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 321695 ) N ; - gpio_dm2[0] + NET gpio_dm2[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 343315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 343315 ) N ; - gpio_holdover[0] + NET gpio_holdover[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 346535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 346535 ) N ; - gpio_ib_mode_sel[0] + NET gpio_ib_mode_sel[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 361715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 361715 ) N ; - gpio_inp_dis[0] + NET gpio_inp_dis[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 327675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 327675 ) N ; - gpio_oeb[0] + NET gpio_oeb[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 364935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 364935 ) N ; - gpio_out[0] + NET gpio_out[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 349295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 349295 ) N ; - gpio_vtrip_sel[0] + NET gpio_vtrip_sel[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 358495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 358495 ) N ; - gpio_in_h[0] + NET gpio_in_h[0] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 367695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 367695 ) N ; - gpio_slow_sel[1] + NET gpio_slow_sel[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 529295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 529295 ) N ; - gpio_in[1] + NET gpio_in[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 520095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 520095 ) N ; - gpio_dm1[1] + NET gpio_dm1[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 538495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 538495 ) N ; - gpio_analog_en[1] + NET gpio_analog_en[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 544475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 544475 ) N ; - gpio_analog_pol[1] + NET gpio_analog_pol[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 550915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 550915 ) N ; - gpio_analog_sel[1] + NET gpio_analog_sel[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 566095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 566095 ) N ; - gpio_dm0[1] + NET gpio_dm0[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 547695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 547695 ) N ; - gpio_dm2[1] + NET gpio_dm2[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 569315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 569315 ) N ; - gpio_holdover[1] + NET gpio_holdover[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 572535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 572535 ) N ; - gpio_ib_mode_sel[1] + NET gpio_ib_mode_sel[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 587715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 587715 ) N ; - gpio_inp_dis[1] + NET gpio_inp_dis[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 553675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 553675 ) N ; - gpio_oeb[1] + NET gpio_oeb[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 590935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 590935 ) N ; - gpio_out[1] + NET gpio_out[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 575295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 575295 ) N ; - gpio_vtrip_sel[1] + NET gpio_vtrip_sel[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 584495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 584495 ) N ; - gpio_in_h[1] + NET gpio_in_h[1] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 593695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 593695 ) N ; - gpio_slow_sel[2] + NET gpio_slow_sel[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 754295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 754295 ) N ; - gpio_in[2] + NET gpio_in[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 745095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 745095 ) N ; - gpio_dm1[2] + NET gpio_dm1[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 763495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 763495 ) N ; - gpio_analog_en[2] + NET gpio_analog_en[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 769475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 769475 ) N ; - gpio_analog_pol[2] + NET gpio_analog_pol[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 775915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 775915 ) N ; - gpio_analog_sel[2] + NET gpio_analog_sel[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 791095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 791095 ) N ; - gpio_dm0[2] + NET gpio_dm0[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 772695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 772695 ) N ; - gpio_dm2[2] + NET gpio_dm2[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 794315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 794315 ) N ; - gpio_holdover[2] + NET gpio_holdover[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 797535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 797535 ) N ; - gpio_ib_mode_sel[2] + NET gpio_ib_mode_sel[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 812715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 812715 ) N ; - gpio_inp_dis[2] + NET gpio_inp_dis[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 778675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 778675 ) N ; - gpio_oeb[2] + NET gpio_oeb[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 815935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 815935 ) N ; - gpio_out[2] + NET gpio_out[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 800295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 800295 ) N ; - gpio_vtrip_sel[2] + NET gpio_vtrip_sel[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 809495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 809495 ) N ; - gpio_in_h[2] + NET gpio_in_h[2] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 818695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 818695 ) N ; - gpio_slow_sel[3] + NET gpio_slow_sel[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 980295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 980295 ) N ; - gpio_in[3] + NET gpio_in[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 971095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 971095 ) N ; - gpio_dm1[3] + NET gpio_dm1[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 989495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 989495 ) N ; - gpio_analog_en[3] + NET gpio_analog_en[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 995475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 995475 ) N ; - gpio_analog_pol[3] + NET gpio_analog_pol[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1001915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1001915 ) N ; - gpio_analog_sel[3] + NET gpio_analog_sel[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1017095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1017095 ) N ; - gpio_dm2[3] + NET gpio_dm2[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1020315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1020315 ) N ; - gpio_dm0[3] + NET gpio_dm0[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 998695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 998695 ) N ; - gpio_holdover[3] + NET gpio_holdover[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1023535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1023535 ) N ; - gpio_ib_mode_sel[3] + NET gpio_ib_mode_sel[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1038715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1038715 ) N ; - gpio_inp_dis[3] + NET gpio_inp_dis[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1004675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1004675 ) N ; - gpio_oeb[3] + NET gpio_oeb[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1041935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1041935 ) N ; - gpio_out[3] + NET gpio_out[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1026295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1026295 ) N ; - gpio_vtrip_sel[3] + NET gpio_vtrip_sel[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1035495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1035495 ) N ; - gpio_in_h[3] + NET gpio_in_h[3] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1044695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1044695 ) N ; - gpio_slow_sel[4] + NET gpio_slow_sel[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1205295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1205295 ) N ; - gpio_in[4] + NET gpio_in[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1196095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1196095 ) N ; - gpio_dm1[4] + NET gpio_dm1[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1214495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1214495 ) N ; - gpio_analog_en[4] + NET gpio_analog_en[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1220475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1220475 ) N ; - gpio_analog_pol[4] + NET gpio_analog_pol[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1226915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1226915 ) N ; - gpio_analog_sel[4] + NET gpio_analog_sel[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1242095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1242095 ) N ; - gpio_dm0[4] + NET gpio_dm0[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1223695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1223695 ) N ; - gpio_dm2[4] + NET gpio_dm2[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1245315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1245315 ) N ; - gpio_holdover[4] + NET gpio_holdover[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1248535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1248535 ) N ; - gpio_ib_mode_sel[4] + NET gpio_ib_mode_sel[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1263715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1263715 ) N ; - gpio_inp_dis[4] + NET gpio_inp_dis[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1229675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1229675 ) N ; - gpio_oeb[4] + NET gpio_oeb[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1266935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1266935 ) N ; - gpio_out[4] + NET gpio_out[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1251295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1251295 ) N ; - gpio_vtrip_sel[4] + NET gpio_vtrip_sel[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1260495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1260495 ) N ; - gpio_in_h[4] + NET gpio_in_h[4] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1269695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1269695 ) N ; - gpio_slow_sel[5] + NET gpio_slow_sel[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1430295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1430295 ) N ; - gpio_in[5] + NET gpio_in[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1421095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1421095 ) N ; - gpio_dm1[5] + NET gpio_dm1[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1439495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1439495 ) N ; - gpio_analog_en[5] + NET gpio_analog_en[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1445475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1445475 ) N ; - gpio_analog_pol[5] + NET gpio_analog_pol[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1451915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1451915 ) N ; - gpio_analog_sel[5] + NET gpio_analog_sel[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1467095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1467095 ) N ; - gpio_dm0[5] + NET gpio_dm0[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1448695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1448695 ) N ; - gpio_dm2[5] + NET gpio_dm2[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1470315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1470315 ) N ; - gpio_holdover[5] + NET gpio_holdover[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1473535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1473535 ) N ; - gpio_ib_mode_sel[5] + NET gpio_ib_mode_sel[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1488715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1488715 ) N ; - gpio_inp_dis[5] + NET gpio_inp_dis[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1454675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1454675 ) N ; - gpio_oeb[5] + NET gpio_oeb[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1491935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1491935 ) N ; - gpio_out[5] + NET gpio_out[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1476295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1476295 ) N ; - gpio_vtrip_sel[5] + NET gpio_vtrip_sel[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1485495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1485495 ) N ; - gpio_in_h[5] + NET gpio_in_h[5] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1494695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1494695 ) N ; - gpio_slow_sel[6] + NET gpio_slow_sel[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1656295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1656295 ) N ; - gpio_in[6] + NET gpio_in[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1647095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1647095 ) N ; - gpio_dm1[6] + NET gpio_dm1[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1665495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1665495 ) N ; - gpio_analog_en[6] + NET gpio_analog_en[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1671475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1671475 ) N ; - gpio_analog_pol[6] + NET gpio_analog_pol[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1677915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1677915 ) N ; - gpio_analog_sel[6] + NET gpio_analog_sel[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1693095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1693095 ) N ; - gpio_dm0[6] + NET gpio_dm0[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1674695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1674695 ) N ; - gpio_dm2[6] + NET gpio_dm2[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1696315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1696315 ) N ; - gpio_holdover[6] + NET gpio_holdover[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1699535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1699535 ) N ; - gpio_ib_mode_sel[6] + NET gpio_ib_mode_sel[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1714715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1714715 ) N ; - gpio_inp_dis[6] + NET gpio_inp_dis[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1680675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1680675 ) N ; - gpio_oeb[6] + NET gpio_oeb[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1717935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1717935 ) N ; - gpio_out[6] + NET gpio_out[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1702295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1702295 ) N ; - gpio_vtrip_sel[6] + NET gpio_vtrip_sel[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1711495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1711495 ) N ; - gpio_in_h[6] + NET gpio_in_h[6] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 1720695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 1720695 ) N ; - gpio_slow_sel[7] + NET gpio_slow_sel[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2542295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2542295 ) N ; - gpio_in[7] + NET gpio_in[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2533095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2533095 ) N ; - gpio_dm1[7] + NET gpio_dm1[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2551495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2551495 ) N ; - gpio_analog_en[7] + NET gpio_analog_en[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2557475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2557475 ) N ; - gpio_analog_pol[7] + NET gpio_analog_pol[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2563915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2563915 ) N ; - gpio_analog_sel[7] + NET gpio_analog_sel[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2579095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2579095 ) N ; - gpio_dm0[7] + NET gpio_dm0[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2560695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2560695 ) N ; - gpio_dm2[7] + NET gpio_dm2[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2582315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2582315 ) N ; - gpio_holdover[7] + NET gpio_holdover[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2585535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2585535 ) N ; - gpio_ib_mode_sel[7] + NET gpio_ib_mode_sel[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2600715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2600715 ) N ; - gpio_inp_dis[7] + NET gpio_inp_dis[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2566675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2566675 ) N ; - gpio_oeb[7] + NET gpio_oeb[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2603935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2603935 ) N ; - gpio_out[7] + NET gpio_out[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2588295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2588295 ) N ; - gpio_vtrip_sel[7] + NET gpio_vtrip_sel[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2597495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2597495 ) N ; - gpio_in_h[7] + NET gpio_in_h[7] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2606695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2606695 ) N ; - gpio_slow_sel[8] + NET gpio_slow_sel[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2768295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2768295 ) N ; - gpio_in[8] + NET gpio_in[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2759095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2759095 ) N ; - gpio_dm1[8] + NET gpio_dm1[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2777495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2777495 ) N ; - gpio_analog_en[8] + NET gpio_analog_en[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2783475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2783475 ) N ; - gpio_analog_pol[8] + NET gpio_analog_pol[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2789915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2789915 ) N ; - gpio_analog_sel[8] + NET gpio_analog_sel[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2805095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2805095 ) N ; - gpio_dm0[8] + NET gpio_dm0[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2786695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2786695 ) N ; - gpio_dm2[8] + NET gpio_dm2[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2808315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2808315 ) N ; - gpio_holdover[8] + NET gpio_holdover[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2811535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2811535 ) N ; - gpio_ib_mode_sel[8] + NET gpio_ib_mode_sel[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2826715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2826715 ) N ; - gpio_inp_dis[8] + NET gpio_inp_dis[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2792675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2792675 ) N ; - gpio_oeb[8] + NET gpio_oeb[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2829935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2829935 ) N ; - gpio_out[8] + NET gpio_out[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2814295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2814295 ) N ; - gpio_vtrip_sel[8] + NET gpio_vtrip_sel[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2823495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2823495 ) N ; - gpio_in_h[8] + NET gpio_in_h[8] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2832695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2832695 ) N ; - gpio_slow_sel[9] + NET gpio_slow_sel[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2993295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2993295 ) N ; - gpio_in[9] + NET gpio_in[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 2984095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 2984095 ) N ; - gpio_dm1[9] + NET gpio_dm1[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3002495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3002495 ) N ; - gpio_analog_en[9] + NET gpio_analog_en[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3008475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3008475 ) N ; - gpio_analog_pol[9] + NET gpio_analog_pol[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3014915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3014915 ) N ; - gpio_analog_sel[9] + NET gpio_analog_sel[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3030095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3030095 ) N ; - gpio_dm0[9] + NET gpio_dm0[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3011695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3011695 ) N ; - gpio_dm2[9] + NET gpio_dm2[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3033315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3033315 ) N ; - gpio_holdover[9] + NET gpio_holdover[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3036535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3036535 ) N ; - gpio_ib_mode_sel[9] + NET gpio_ib_mode_sel[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3051715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3051715 ) N ; - gpio_inp_dis[9] + NET gpio_inp_dis[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3017675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3017675 ) N ; - gpio_oeb[9] + NET gpio_oeb[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3054935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3054935 ) N ; - gpio_out[9] + NET gpio_out[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3039295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3039295 ) N ; - gpio_vtrip_sel[9] + NET gpio_vtrip_sel[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3048495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3048495 ) N ; - gpio_in_h[9] + NET gpio_in_h[9] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3057695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3057695 ) N ; - gpio_slow_sel[10] + NET gpio_slow_sel[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3219295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3219295 ) N ; - gpio_in[10] + NET gpio_in[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3210095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3210095 ) N ; - gpio_dm1[10] + NET gpio_dm1[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3228495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3228495 ) N ; - gpio_analog_en[10] + NET gpio_analog_en[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3234475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3234475 ) N ; - gpio_analog_pol[10] + NET gpio_analog_pol[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3240915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3240915 ) N ; - gpio_analog_sel[10] + NET gpio_analog_sel[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3256095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3256095 ) N ; - gpio_dm0[10] + NET gpio_dm0[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3237695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3237695 ) N ; - gpio_dm2[10] + NET gpio_dm2[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3259315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3259315 ) N ; - gpio_holdover[10] + NET gpio_holdover[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3262535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3262535 ) N ; - gpio_ib_mode_sel[10] + NET gpio_ib_mode_sel[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3277715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3277715 ) N ; - gpio_inp_dis[10] + NET gpio_inp_dis[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3243675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3243675 ) N ; - gpio_oeb[10] + NET gpio_oeb[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3280935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3280935 ) N ; - gpio_out[10] + NET gpio_out[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3265295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3265295 ) N ; - gpio_vtrip_sel[10] + NET gpio_vtrip_sel[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3274495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3274495 ) N ; - gpio_in_h[10] + NET gpio_in_h[10] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3283695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3283695 ) N ; - gpio_slow_sel[11] + NET gpio_slow_sel[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3444295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3444295 ) N ; - gpio_in[11] + NET gpio_in[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3435095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3435095 ) N ; - gpio_dm1[11] + NET gpio_dm1[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3453495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3453495 ) N ; - gpio_holdover[11] + NET gpio_holdover[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3487535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3487535 ) N ; - gpio_ib_mode_sel[11] + NET gpio_ib_mode_sel[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3502715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3502715 ) N ; - gpio_inp_dis[11] + NET gpio_inp_dis[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3468675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3468675 ) N ; - gpio_oeb[11] + NET gpio_oeb[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3505935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3505935 ) N ; - gpio_out[11] + NET gpio_out[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3490295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3490295 ) N ; - gpio_vtrip_sel[11] + NET gpio_vtrip_sel[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3499495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3499495 ) N ; - gpio_analog_en[11] + NET gpio_analog_en[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3459475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3459475 ) N ; - gpio_analog_pol[11] + NET gpio_analog_pol[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3465915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3465915 ) N ; - gpio_analog_sel[11] + NET gpio_analog_sel[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3481095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3481095 ) N ; - gpio_dm0[11] + NET gpio_dm0[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3462695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3462695 ) N ; - gpio_dm2[11] + NET gpio_dm2[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3484315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3484315 ) N ; - gpio_in_h[11] + NET gpio_in_h[11] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3508695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3508695 ) N ; - gpio_slow_sel[12] + NET gpio_slow_sel[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3669295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3669295 ) N ; - gpio_in[12] + NET gpio_in[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3660095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3660095 ) N ; - gpio_dm1[12] + NET gpio_dm1[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3678495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3678495 ) N ; - gpio_analog_en[12] + NET gpio_analog_en[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3684475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3684475 ) N ; - gpio_analog_pol[12] + NET gpio_analog_pol[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3690915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3690915 ) N ; - gpio_analog_sel[12] + NET gpio_analog_sel[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3706095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3706095 ) N ; - gpio_dm0[12] + NET gpio_dm0[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3687695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3687695 ) N ; - gpio_dm2[12] + NET gpio_dm2[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3709315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3709315 ) N ; - gpio_holdover[12] + NET gpio_holdover[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3712535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3712535 ) N ; - gpio_ib_mode_sel[12] + NET gpio_ib_mode_sel[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3727715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3727715 ) N ; - gpio_inp_dis[12] + NET gpio_inp_dis[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3693675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3693675 ) N ; - gpio_oeb[12] + NET gpio_oeb[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3730935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3730935 ) N ; - gpio_out[12] + NET gpio_out[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3715295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3715295 ) N ; - gpio_vtrip_sel[12] + NET gpio_vtrip_sel[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3724495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3724495 ) N ; - gpio_in_h[12] + NET gpio_in_h[12] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 3733695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 3733695 ) N ; - gpio_slow_sel[13] + NET gpio_slow_sel[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4115295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4115295 ) N ; - gpio_in[13] + NET gpio_in[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4106095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4106095 ) N ; - gpio_dm1[13] + NET gpio_dm1[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4124495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4124495 ) N ; - gpio_analog_en[13] + NET gpio_analog_en[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4130475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4130475 ) N ; - gpio_analog_pol[13] + NET gpio_analog_pol[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4136915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4136915 ) N ; - gpio_analog_sel[13] + NET gpio_analog_sel[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4152095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4152095 ) N ; - gpio_dm0[13] + NET gpio_dm0[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4133695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4133695 ) N ; - gpio_dm2[13] + NET gpio_dm2[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4155315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4155315 ) N ; - gpio_holdover[13] + NET gpio_holdover[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4158535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4158535 ) N ; - gpio_ib_mode_sel[13] + NET gpio_ib_mode_sel[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4173715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4173715 ) N ; - gpio_inp_dis[13] + NET gpio_inp_dis[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4139675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4139675 ) N ; - gpio_oeb[13] + NET gpio_oeb[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4176935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4176935 ) N ; - gpio_out[13] + NET gpio_out[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4161295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4161295 ) N ; - gpio_vtrip_sel[13] + NET gpio_vtrip_sel[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4170495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4170495 ) N ; - gpio_in_h[13] + NET gpio_in_h[13] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4179695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4179695 ) N ; - gpio_slow_sel[14] + NET gpio_slow_sel[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4561295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4561295 ) N ; - gpio_in[14] + NET gpio_in[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4552095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4552095 ) N ; - gpio_dm1[14] + NET gpio_dm1[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4570495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4570495 ) N ; - gpio_analog_en[14] + NET gpio_analog_en[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4576475 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4576475 ) N ; - gpio_analog_pol[14] + NET gpio_analog_pol[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4582915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4582915 ) N ; - gpio_analog_sel[14] + NET gpio_analog_sel[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4598095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4598095 ) N ; - gpio_dm0[14] + NET gpio_dm0[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4579695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4579695 ) N ; - gpio_dm2[14] + NET gpio_dm2[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4601315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4601315 ) N ; - gpio_holdover[14] + NET gpio_holdover[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4604535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4604535 ) N ; - gpio_ib_mode_sel[14] + NET gpio_ib_mode_sel[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4619715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4619715 ) N ; - gpio_inp_dis[14] + NET gpio_inp_dis[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4585675 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4585675 ) N ; - gpio_oeb[14] + NET gpio_oeb[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4622935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4622935 ) N ; - gpio_out[14] + NET gpio_out[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4607295 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4607295 ) N ; - gpio_vtrip_sel[14] + NET gpio_vtrip_sel[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4616495 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4616495 ) N ; - gpio_in_h[14] + NET gpio_in_h[14] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( 3167490 4625695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( 3167480 4625695 ) N ; - gpio_in[24] + NET gpio_in[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4635535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4635535 ) N ; - gpio_slow_sel[24] + NET gpio_slow_sel[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4626335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4626335 ) N ; - gpio_dm1[24] + NET gpio_dm1[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4617135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4617135 ) N ; - gpio_analog_en[24] + NET gpio_analog_en[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4611155 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4611155 ) N ; - gpio_dm0[24] + NET gpio_dm0[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4607935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4607935 ) N ; - gpio_analog_pol[24] + NET gpio_analog_pol[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4604715 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4604715 ) N ; - gpio_inp_dis[24] + NET gpio_inp_dis[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4601955 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4601955 ) N ; - gpio_analog_sel[24] + NET gpio_analog_sel[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4589535 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4589535 ) N ; - gpio_dm2[24] + NET gpio_dm2[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4586315 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4586315 ) N ; - gpio_holdover[24] + NET gpio_holdover[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4583095 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4583095 ) N ; - gpio_out[24] + NET gpio_out[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4580335 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4580335 ) N ; - gpio_vtrip_sel[24] + NET gpio_vtrip_sel[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4571135 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4571135 ) N ; - gpio_ib_mode_sel[24] + NET gpio_ib_mode_sel[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4567915 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4567915 ) N ; - gpio_oeb[24] + NET gpio_oeb[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4564695 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4564695 ) N ; - gpio_in_h[24] + NET gpio_in_h[24] + PORT - + LAYER met3 ( -1140 -175 ) ( 1140 175 ) + PLACED ( -860 4561935 ) N ; + + LAYER met3 ( -1150 -175 ) ( 1150 175 ) + PLACED ( -850 4561935 ) N ; - analog_io[24] + NET analog_io[24] + PORT - + LAYER met3 ( -1140 -320 ) ( 1140 320 ) + PLACED ( -860 4623120 ) N ; + + LAYER met3 ( -1150 -320 ) ( 1150 320 ) + PLACED ( -850 4623120 ) N ; - analog_noesd_io[24] + NET analog_noesd_io[24] + PORT - + LAYER met3 ( -1140 -535 ) ( 1140 535 ) + PLACED ( -860 4613920 ) N ; + + LAYER met3 ( -1150 -535 ) ( 1150 535 ) + PLACED ( -850 4613920 ) N ; - gpio_loopback_zero[23] + NET gpio_loopback_zero[23] + PORT + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 137640 4767490 ) N ; diff --git a/mag/chip_io_openframe.mag b/mag/chip_io_openframe.mag index b141a50e..195129d7 100644 --- a/mag/chip_io_openframe.mag +++ b/mag/chip_io_openframe.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1695765374 +timestamp 1695840914 << metal1 >> rect 41866 995682 675734 995734 rect 41866 95347 41918 995682 @@ -1285,8 +1285,8 @@ rect 276496 996696 276501 996757 rect 277181 996696 280424 996756 rect 276430 996691 276501 996696 rect 225230 996680 225301 996685 -rect 333499 995407 338279 997742 -rect 343478 995407 348258 997742 +rect 333499 995403 338279 997742 +rect 343478 995403 348258 997742 rect 379933 997615 380314 997758 rect 380500 997901 380950 1006097 rect 469500 1006801 469950 1006864 @@ -1356,8 +1356,8 @@ rect 521030 996693 521035 996754 rect 521096 996693 521101 996754 rect 521803 996696 522603 996756 rect 521030 996688 521101 996693 -rect 575699 995407 580479 997640 -rect 585678 995407 590458 997664 +rect 575699 995403 580479 997640 +rect 585678 995403 590458 997664 rect 619533 997615 619914 997758 rect 620100 997901 620550 1006097 rect 620100 997757 620158 997901 @@ -1372,7 +1372,7 @@ rect 620430 996693 620435 996754 rect 620496 996693 620501 996754 rect 621201 996696 624463 996756 rect 620430 996688 620501 996693 -rect 675407 971144 676767 971206 +rect 675403 971144 676767 971206 rect 677626 970068 680341 970107 rect 677626 970064 679567 970068 rect 677626 969760 677649 970064 @@ -1382,54 +1382,54 @@ rect 677793 969760 680341 969764 rect 677626 969726 680341 969760 rect 677626 969463 686875 969540 rect 677626 969462 686108 969463 -rect 41713 969209 42193 969279 -rect 675407 969143 676797 969205 +rect 41713 969209 42197 969279 +rect 675403 969143 676797 969205 rect 677626 969158 677648 969462 rect 677792 969159 686108 969462 rect 686812 969159 686875 969463 rect 677792 969158 686875 969159 rect 677626 969090 686875 969158 -rect 41713 967369 42193 967439 -rect 675407 967241 675887 967311 -rect 41713 966697 42193 966825 -rect 675407 966689 675887 966759 -rect 675407 966045 675887 966115 -rect 41713 965529 42193 965599 -rect 675407 965401 675887 965471 -rect 41713 964814 42193 965028 -rect 41713 964333 42193 964403 -rect 41713 963689 42193 963759 -rect 675407 963561 675887 963631 -rect 41713 963045 42193 963115 -rect 675407 963009 675887 963079 -rect 41713 962493 42193 962563 -rect 675407 962365 675887 962435 -rect 675407 961721 675887 961791 -rect 41713 960009 42193 960079 -rect 41713 959365 42193 959435 -rect 675407 959237 675887 959307 -rect 41713 958721 42193 958791 -rect 675407 958685 675887 958755 -rect 41713 958169 42193 958239 -rect 675407 958041 675887 958111 -rect 675407 957397 675887 957467 -rect 675407 956772 675887 956986 -rect 41713 956329 42193 956399 -rect 675407 956201 675887 956271 -rect 41713 955685 42193 955755 -rect 41713 955041 42193 955111 -rect 675407 954975 675887 955103 -rect 41713 954489 42193 954559 -rect 675407 954361 675887 954431 +rect 41713 967369 42197 967439 +rect 675403 967241 675887 967311 +rect 41713 966697 42197 966825 +rect 675403 966689 675887 966759 +rect 675403 966045 675887 966115 +rect 41713 965529 42197 965599 +rect 675403 965401 675887 965471 +rect 41713 964814 42197 965028 +rect 41713 964333 42197 964403 +rect 41713 963689 42197 963759 +rect 675403 963561 675887 963631 +rect 41713 963045 42197 963115 +rect 675403 963009 675887 963079 +rect 41713 962493 42197 962563 +rect 675403 962365 675887 962435 +rect 675403 961721 675887 961791 +rect 41713 960009 42197 960079 +rect 41713 959365 42197 959435 +rect 675403 959237 675887 959307 +rect 41713 958721 42197 958791 +rect 675403 958685 675887 958755 +rect 41713 958169 42197 958239 +rect 675403 958041 675887 958111 +rect 675403 957397 675887 957467 +rect 675403 956772 675887 956986 +rect 41713 956329 42197 956399 +rect 675403 956201 675887 956271 +rect 41713 955685 42197 955755 +rect 41713 955041 42197 955111 +rect 675403 954975 675887 955103 +rect 41713 954489 42197 954559 +rect 675403 954361 675887 954431 rect 40832 949550 40892 952819 -rect 675407 952521 675887 952591 +rect 675403 952521 675887 952591 rect 30782 948827 39885 948896 rect 30782 948523 30845 948827 rect 31549 948808 39885 948827 rect 31549 948523 39705 948808 rect 30782 948504 39705 948523 rect 39849 948504 39885 948808 -rect 40810 948781 42193 948841 +rect 40810 948781 42197 948841 rect 30782 948446 39885 948504 rect 37316 948222 39885 948260 rect 37316 947918 37386 948222 @@ -1438,37 +1438,37 @@ rect 38090 947918 39704 948216 rect 37316 947912 39704 947918 rect 39848 947912 39885 948216 rect 37316 947879 39885 947912 -rect 40810 946781 42193 946841 -rect 41693 926940 42193 926941 -rect 39880 926939 42193 926940 +rect 40810 946781 42197 946841 +rect 41693 926940 42197 926941 +rect 39880 926939 42197 926940 rect 39880 922151 41039 926939 -rect 41837 922151 42193 926939 +rect 41837 922151 42197 926939 rect 675907 922499 677778 922500 -rect 40717 921852 42193 921853 -rect 39880 921851 42193 921852 +rect 40717 921852 42197 921853 +rect 39880 921851 42197 921852 rect 39880 917191 39919 921851 -rect 40717 917191 42193 921851 -rect 675407 917701 675787 922499 +rect 40717 917191 42197 921851 +rect 675403 917701 675787 922499 rect 676585 917701 677778 922499 -rect 675407 917700 677778 917701 -rect 675407 917699 675907 917700 +rect 675403 917700 677778 917701 +rect 675403 917699 675907 917700 rect 676907 917409 677778 917410 rect 39880 917190 40717 917191 -rect 41693 916900 42193 916901 -rect 39880 916899 42193 916900 +rect 41693 916900 42197 916901 +rect 39880 916899 42197 916900 rect 39880 912101 41039 916899 -rect 41837 912101 42193 916899 -rect 675407 912749 676907 917409 +rect 41837 912101 42197 916899 +rect 675403 912749 676907 917409 rect 677705 912749 677778 917409 -rect 675407 912748 677778 912749 -rect 675407 912747 676907 912748 +rect 675403 912748 677778 912749 +rect 675403 912747 676907 912748 rect 39880 912100 41693 912101 -rect 675407 907661 675787 912449 +rect 675403 907661 675787 912449 rect 676585 907661 677778 912449 -rect 675407 907660 677778 907661 -rect 675407 907659 675907 907660 -rect 39913 879879 42193 884659 -rect 675407 881144 676767 881206 +rect 675403 907660 677778 907661 +rect 675403 907659 675907 907660 +rect 39913 879879 42197 884659 +rect 675403 881144 676767 881206 rect 677626 880068 680341 880107 rect 677626 880064 679567 880068 rect 677626 879760 677649 880064 @@ -1478,44 +1478,44 @@ rect 677793 879760 680341 879764 rect 677626 879726 680341 879760 rect 677626 879463 686875 879540 rect 677626 879462 686108 879463 -rect 675407 879143 676797 879205 +rect 675403 879143 676797 879205 rect 677626 879158 677648 879462 rect 677792 879159 686108 879462 rect 686812 879159 686875 879463 rect 677792 879158 686875 879159 rect 677626 879090 686875 879158 -rect 675407 878041 675887 878111 -rect 675407 877489 675887 877559 -rect 675407 876845 675887 876915 -rect 675407 876201 675887 876271 -rect 39913 869899 42193 874679 -rect 675407 874361 675887 874431 -rect 675407 873809 675887 873879 -rect 675407 873165 675887 873235 -rect 675407 872521 675887 872591 -rect 675407 870037 675887 870107 -rect 675407 869485 675887 869555 -rect 675407 868841 675887 868911 -rect 675407 868197 675887 868267 -rect 675407 867572 675887 867786 -rect 675407 867001 675887 867071 -rect 675407 865775 675887 865903 -rect 675407 865161 675887 865231 -rect 675407 863321 675887 863391 -rect 39920 837679 42193 842459 -rect 39920 827699 42193 832479 -rect 675407 828521 677782 833301 -rect 675407 818543 677782 823323 -rect 41713 799409 42193 799479 -rect 41713 797569 42193 797639 -rect 41713 796897 42193 797025 -rect 41713 795729 42193 795799 -rect 41713 795014 42193 795228 -rect 41713 794533 42193 794603 -rect 41713 793889 42193 793959 -rect 41713 793245 42193 793315 -rect 41713 792693 42193 792763 -rect 675407 792143 676767 792205 +rect 675403 878041 675887 878111 +rect 675403 877489 675887 877559 +rect 675403 876845 675887 876915 +rect 675403 876201 675887 876271 +rect 39913 869899 42197 874679 +rect 675403 874361 675887 874431 +rect 675403 873809 675887 873879 +rect 675403 873165 675887 873235 +rect 675403 872521 675887 872591 +rect 675403 870037 675887 870107 +rect 675403 869485 675887 869555 +rect 675403 868841 675887 868911 +rect 675403 868197 675887 868267 +rect 675403 867572 675887 867786 +rect 675403 867001 675887 867071 +rect 675403 865775 675887 865903 +rect 675403 865161 675887 865231 +rect 675403 863321 675887 863391 +rect 39920 837679 42197 842459 +rect 39920 827699 42197 832479 +rect 675403 828521 677782 833301 +rect 675403 818543 677782 823323 +rect 41713 799409 42197 799479 +rect 41713 797569 42197 797639 +rect 41713 796897 42197 797025 +rect 41713 795729 42197 795799 +rect 41713 795014 42197 795228 +rect 41713 794533 42197 794603 +rect 41713 793889 42197 793959 +rect 41713 793245 42197 793315 +rect 41713 792693 42197 792763 +rect 675403 792143 676767 792205 rect 677626 791068 680341 791107 rect 677626 791064 679567 791068 rect 677626 790760 677649 791064 @@ -1525,42 +1525,42 @@ rect 677793 790760 680341 790764 rect 677626 790726 680341 790760 rect 677626 790463 686875 790540 rect 677626 790462 686108 790463 -rect 41713 790209 42193 790279 -rect 675407 790143 676797 790205 +rect 41713 790209 42197 790279 +rect 675403 790143 676797 790205 rect 677626 790158 677648 790462 rect 677792 790159 686108 790462 rect 686812 790159 686875 790463 rect 677792 790158 686875 790159 rect 677626 790090 686875 790158 -rect 41713 789565 42193 789635 -rect 41713 788921 42193 788991 -rect 675407 788841 675887 788911 -rect 41713 788369 42193 788439 -rect 675407 788289 675887 788359 -rect 675407 787645 675887 787715 -rect 675407 787001 675887 787071 -rect 41713 786529 42193 786599 -rect 41713 785885 42193 785955 -rect 41713 785241 42193 785311 -rect 675407 785161 675887 785231 -rect 41713 784689 42193 784759 -rect 675407 784609 675887 784679 -rect 675407 783965 675887 784035 -rect 675407 783321 675887 783391 +rect 41713 789565 42197 789635 +rect 41713 788921 42197 788991 +rect 675403 788841 675887 788911 +rect 41713 788369 42197 788439 +rect 675403 788289 675887 788359 +rect 675403 787645 675887 787715 +rect 675403 787001 675887 787071 +rect 41713 786529 42197 786599 +rect 41713 785885 42197 785955 +rect 41713 785241 42197 785311 +rect 675403 785161 675887 785231 +rect 41713 784689 42197 784759 +rect 675403 784609 675887 784679 +rect 675403 783965 675887 784035 +rect 675403 783321 675887 783391 rect 40832 779539 40892 783008 -rect 675407 780837 675887 780907 -rect 675407 780285 675887 780355 -rect 675407 779641 675887 779711 -rect 675407 778997 675887 779067 +rect 675403 780837 675887 780907 +rect 675403 780285 675887 780355 +rect 675403 779641 675887 779711 +rect 675403 778997 675887 779067 rect 30782 778827 39885 778896 rect 30782 778523 30845 778827 rect 31549 778808 39885 778827 rect 31549 778523 39705 778808 rect 30782 778504 39705 778523 rect 39849 778504 39885 778808 -rect 40810 778781 42193 778841 +rect 40810 778781 42197 778841 rect 30782 778446 39885 778504 -rect 675407 778372 675887 778586 +rect 675403 778372 675887 778586 rect 37316 778222 39885 778260 rect 37316 777918 37386 778222 rect 38090 778216 39885 778222 @@ -1568,26 +1568,26 @@ rect 38090 777918 39704 778216 rect 37316 777912 39704 777918 rect 39848 777912 39885 778216 rect 37316 777879 39885 777912 -rect 675407 777801 675887 777871 -rect 40810 776781 42193 776841 -rect 675407 776575 675887 776703 -rect 675407 775961 675887 776031 -rect 675407 774121 675887 774191 -rect 41713 756209 42193 756279 -rect 41713 754369 42193 754439 -rect 41713 753697 42193 753825 -rect 41713 752529 42193 752599 -rect 41713 751814 42193 752028 -rect 41713 751333 42193 751403 -rect 41713 750689 42193 750759 -rect 41713 750045 42193 750115 -rect 41713 749493 42193 749563 -rect 675407 747143 676767 747205 -rect 41713 747009 42193 747079 -rect 41713 746365 42193 746435 +rect 675403 777801 675887 777871 +rect 40810 776781 42197 776841 +rect 675403 776575 675887 776703 +rect 675403 775961 675887 776031 +rect 675403 774121 675887 774191 +rect 41713 756209 42197 756279 +rect 41713 754369 42197 754439 +rect 41713 753697 42197 753825 +rect 41713 752529 42197 752599 +rect 41713 751814 42197 752028 +rect 41713 751333 42197 751403 +rect 41713 750689 42197 750759 +rect 41713 750045 42197 750115 +rect 41713 749493 42197 749563 +rect 675403 747143 676767 747205 +rect 41713 747009 42197 747079 +rect 41713 746365 42197 746435 rect 677626 746068 680341 746107 rect 677626 746064 679567 746068 -rect 41713 745721 42193 745791 +rect 41713 745721 42197 745791 rect 677626 745760 677649 746064 rect 677793 745764 679567 746064 rect 680271 745764 680341 746068 @@ -1595,36 +1595,36 @@ rect 677793 745760 680341 745764 rect 677626 745726 680341 745760 rect 677626 745463 686875 745540 rect 677626 745462 686108 745463 -rect 41713 745169 42193 745239 -rect 675407 745143 676797 745205 +rect 41713 745169 42197 745239 +rect 675403 745143 676797 745205 rect 677626 745158 677648 745462 rect 677792 745159 686108 745462 rect 686812 745159 686875 745463 rect 677792 745158 686875 745159 rect 677626 745090 686875 745158 -rect 675407 743841 675887 743911 -rect 41713 743329 42193 743399 -rect 675407 743289 675887 743359 -rect 41713 742685 42193 742755 -rect 675407 742645 675887 742715 -rect 41713 742041 42193 742111 -rect 675407 742001 675887 742071 -rect 41713 741489 42193 741559 -rect 675407 740161 675887 740231 +rect 675403 743841 675887 743911 +rect 41713 743329 42197 743399 +rect 675403 743289 675887 743359 +rect 41713 742685 42197 742755 +rect 675403 742645 675887 742715 +rect 41713 742041 42197 742111 +rect 675403 742001 675887 742071 +rect 41713 741489 42197 741559 +rect 675403 740161 675887 740231 rect 40832 736546 40892 739828 -rect 675407 739609 675887 739679 -rect 675407 738965 675887 739035 -rect 675407 738321 675887 738391 +rect 675403 739609 675887 739679 +rect 675403 738965 675887 739035 +rect 675403 738321 675887 738391 rect 30782 735827 39885 735896 rect 30782 735523 30845 735827 rect 31549 735808 39885 735827 rect 31549 735523 39705 735808 rect 30782 735504 39705 735523 rect 39849 735504 39885 735808 -rect 40810 735781 42193 735841 -rect 675407 735837 675887 735907 +rect 40810 735781 42197 735841 +rect 675403 735837 675887 735907 rect 30782 735446 39885 735504 -rect 675407 735285 675887 735355 +rect 675403 735285 675887 735355 rect 37316 735222 39885 735260 rect 37316 734918 37386 735222 rect 38090 735216 39885 735222 @@ -1632,28 +1632,28 @@ rect 38090 734918 39704 735216 rect 37316 734912 39704 734918 rect 39848 734912 39885 735216 rect 37316 734879 39885 734912 -rect 675407 734641 675887 734711 -rect 675407 733997 675887 734067 -rect 40810 733781 42193 733841 -rect 675407 733372 675887 733586 -rect 675407 732801 675887 732871 -rect 675407 731575 675887 731703 -rect 675407 730961 675887 731031 -rect 675407 729121 675887 729191 -rect 41713 713009 42193 713079 -rect 41713 711169 42193 711239 -rect 41713 710497 42193 710625 -rect 41713 709329 42193 709399 -rect 41713 708614 42193 708828 -rect 41713 708133 42193 708203 -rect 41713 707489 42193 707559 -rect 41713 706845 42193 706915 -rect 41713 706293 42193 706363 -rect 41713 703809 42193 703879 -rect 41713 703165 42193 703235 -rect 41713 702521 42193 702591 -rect 675407 702143 676767 702205 -rect 41713 701969 42193 702039 +rect 675403 734641 675887 734711 +rect 675403 733997 675887 734067 +rect 40810 733781 42197 733841 +rect 675403 733372 675887 733586 +rect 675403 732801 675887 732871 +rect 675403 731575 675887 731703 +rect 675403 730961 675887 731031 +rect 675403 729121 675887 729191 +rect 41713 713009 42197 713079 +rect 41713 711169 42197 711239 +rect 41713 710497 42197 710625 +rect 41713 709329 42197 709399 +rect 41713 708614 42197 708828 +rect 41713 708133 42197 708203 +rect 41713 707489 42197 707559 +rect 41713 706845 42197 706915 +rect 41713 706293 42197 706363 +rect 41713 703809 42197 703879 +rect 41713 703165 42197 703235 +rect 41713 702521 42197 702591 +rect 675403 702143 676767 702205 +rect 41713 701969 42197 702039 rect 677626 701068 680341 701107 rect 677626 701064 679567 701068 rect 677626 700760 677649 701064 @@ -1663,32 +1663,32 @@ rect 677793 700760 680341 700764 rect 677626 700726 680341 700760 rect 677626 700463 686875 700540 rect 677626 700462 686108 700463 -rect 41713 700129 42193 700199 -rect 675407 700143 676797 700205 +rect 41713 700129 42197 700199 +rect 675403 700143 676797 700205 rect 677626 700158 677648 700462 rect 677792 700159 686108 700462 rect 686812 700159 686875 700463 rect 677792 700158 686875 700159 rect 677626 700090 686875 700158 -rect 41713 699485 42193 699555 -rect 41713 698841 42193 698911 -rect 675407 698841 675887 698911 -rect 41713 698289 42193 698359 -rect 675407 698289 675887 698359 -rect 675407 697645 675887 697715 -rect 675407 697001 675887 697071 +rect 41713 699485 42197 699555 +rect 41713 698841 42197 698911 +rect 675403 698841 675887 698911 +rect 41713 698289 42197 698359 +rect 675403 698289 675887 698359 +rect 675403 697645 675887 697715 +rect 675403 697001 675887 697071 rect 40832 693552 40892 696608 -rect 675407 695161 675887 695231 -rect 675407 694609 675887 694679 -rect 675407 693965 675887 694035 -rect 675407 693321 675887 693391 +rect 675403 695161 675887 695231 +rect 675403 694609 675887 694679 +rect 675403 693965 675887 694035 +rect 675403 693321 675887 693391 rect 30782 692827 39885 692896 rect 30782 692523 30845 692827 rect 31549 692808 39885 692827 rect 31549 692523 39705 692808 rect 30782 692504 39705 692523 rect 39849 692504 39885 692808 -rect 40810 692781 42193 692841 +rect 40810 692781 42197 692841 rect 30782 692446 39885 692504 rect 37316 692222 39885 692260 rect 37316 691918 37386 692222 @@ -1697,32 +1697,32 @@ rect 38090 691918 39704 692216 rect 37316 691912 39704 691918 rect 39848 691912 39885 692216 rect 37316 691879 39885 691912 -rect 40810 690781 42193 690841 -rect 675407 690837 675887 690907 -rect 675407 690285 675887 690355 -rect 675407 689641 675887 689711 -rect 675407 688997 675887 689067 -rect 675407 688372 675887 688586 -rect 675407 687801 675887 687871 -rect 675407 686575 675887 686703 -rect 675407 685961 675887 686031 -rect 675407 684121 675887 684191 -rect 41713 669809 42193 669879 -rect 41713 667969 42193 668039 -rect 41713 667297 42193 667425 -rect 41713 666129 42193 666199 -rect 41713 665414 42193 665628 -rect 41713 664933 42193 665003 -rect 41713 664289 42193 664359 -rect 41713 663645 42193 663715 -rect 41713 663093 42193 663163 -rect 41713 660609 42193 660679 -rect 41713 659965 42193 660035 -rect 41713 659321 42193 659391 -rect 41713 658769 42193 658839 -rect 675407 657143 676767 657205 -rect 41713 656929 42193 656999 -rect 41713 656285 42193 656355 +rect 40810 690781 42197 690841 +rect 675403 690837 675887 690907 +rect 675403 690285 675887 690355 +rect 675403 689641 675887 689711 +rect 675403 688997 675887 689067 +rect 675403 688372 675887 688586 +rect 675403 687801 675887 687871 +rect 675403 686575 675887 686703 +rect 675403 685961 675887 686031 +rect 675403 684121 675887 684191 +rect 41713 669809 42197 669879 +rect 41713 667969 42197 668039 +rect 41713 667297 42197 667425 +rect 41713 666129 42197 666199 +rect 41713 665414 42197 665628 +rect 41713 664933 42197 665003 +rect 41713 664289 42197 664359 +rect 41713 663645 42197 663715 +rect 41713 663093 42197 663163 +rect 41713 660609 42197 660679 +rect 41713 659965 42197 660035 +rect 41713 659321 42197 659391 +rect 41713 658769 42197 658839 +rect 675403 657143 676767 657205 +rect 41713 656929 42197 656999 +rect 41713 656285 42197 656355 rect 677626 656068 680341 656107 rect 677626 656064 679567 656068 rect 677626 655760 677649 656064 @@ -1730,31 +1730,31 @@ rect 677793 655764 679567 656064 rect 680271 655764 680341 656068 rect 677793 655760 680341 655764 rect 677626 655726 680341 655760 -rect 41713 655641 42193 655711 +rect 41713 655641 42197 655711 rect 677626 655463 686875 655540 rect 677626 655462 686108 655463 -rect 41713 655089 42193 655159 -rect 675407 655143 676797 655205 +rect 41713 655089 42197 655159 +rect 675403 655143 676797 655205 rect 677626 655158 677648 655462 rect 677792 655159 686108 655462 rect 686812 655159 686875 655463 rect 677792 655158 686875 655159 rect 677626 655090 686875 655158 -rect 675407 653641 675887 653711 +rect 675403 653641 675887 653711 rect 40832 650533 40892 653443 -rect 675407 653089 675887 653159 -rect 675407 652445 675887 652515 -rect 675407 651801 675887 651871 -rect 675407 649961 675887 650031 +rect 675403 653089 675887 653159 +rect 675403 652445 675887 652515 +rect 675403 651801 675887 651871 +rect 675403 649961 675887 650031 rect 30782 649827 39885 649896 rect 30782 649523 30845 649827 rect 31549 649808 39885 649827 rect 31549 649523 39705 649808 rect 30782 649504 39705 649523 rect 39849 649504 39885 649808 -rect 40810 649781 42193 649841 +rect 40810 649781 42197 649841 rect 30782 649446 39885 649504 -rect 675407 649409 675887 649479 +rect 675403 649409 675887 649479 rect 37316 649222 39885 649260 rect 37316 648918 37386 649222 rect 38090 649216 39885 649222 @@ -1762,36 +1762,36 @@ rect 38090 648918 39704 649216 rect 37316 648912 39704 648918 rect 39848 648912 39885 649216 rect 37316 648879 39885 648912 -rect 675407 648765 675887 648835 -rect 675407 648121 675887 648191 -rect 40810 647781 42193 647841 -rect 675407 645637 675887 645707 -rect 675407 645085 675887 645155 -rect 675407 644441 675887 644511 -rect 675407 643797 675887 643867 -rect 675407 643172 675887 643386 -rect 675407 642601 675887 642671 -rect 675407 641375 675887 641503 -rect 675407 640761 675887 640831 -rect 675407 638921 675887 638991 -rect 41713 626609 42193 626679 -rect 41713 624769 42193 624839 -rect 41713 624097 42193 624225 -rect 41713 622929 42193 622999 -rect 41713 622214 42193 622428 -rect 41713 621733 42193 621803 -rect 41713 621089 42193 621159 -rect 41713 620445 42193 620515 -rect 41713 619893 42193 619963 -rect 41713 617409 42193 617479 -rect 41713 616765 42193 616835 -rect 41713 616121 42193 616191 -rect 41713 615569 42193 615639 -rect 41713 613729 42193 613799 -rect 41713 613085 42193 613155 -rect 41713 612441 42193 612511 -rect 675407 612143 676767 612205 -rect 41713 611889 42193 611959 +rect 675403 648765 675887 648835 +rect 675403 648121 675887 648191 +rect 40810 647781 42197 647841 +rect 675403 645637 675887 645707 +rect 675403 645085 675887 645155 +rect 675403 644441 675887 644511 +rect 675403 643797 675887 643867 +rect 675403 643172 675887 643386 +rect 675403 642601 675887 642671 +rect 675403 641375 675887 641503 +rect 675403 640761 675887 640831 +rect 675403 638921 675887 638991 +rect 41713 626609 42197 626679 +rect 41713 624769 42197 624839 +rect 41713 624097 42197 624225 +rect 41713 622929 42197 622999 +rect 41713 622214 42197 622428 +rect 41713 621733 42197 621803 +rect 41713 621089 42197 621159 +rect 41713 620445 42197 620515 +rect 41713 619893 42197 619963 +rect 41713 617409 42197 617479 +rect 41713 616765 42197 616835 +rect 41713 616121 42197 616191 +rect 41713 615569 42197 615639 +rect 41713 613729 42197 613799 +rect 41713 613085 42197 613155 +rect 41713 612441 42197 612511 +rect 675403 612143 676767 612205 +rect 41713 611889 42197 611959 rect 677626 611068 680341 611107 rect 677626 611064 679567 611068 rect 677626 610760 677649 611064 @@ -1802,23 +1802,23 @@ rect 677626 610726 680341 610760 rect 677626 610463 686875 610540 rect 677626 610462 686108 610463 rect 40832 607531 40892 610227 -rect 675407 610143 676797 610205 +rect 675403 610143 676797 610205 rect 677626 610158 677648 610462 rect 677792 610159 686108 610462 rect 686812 610159 686875 610463 rect 677792 610158 686875 610159 rect 677626 610090 686875 610158 -rect 675407 608641 675887 608711 -rect 675407 608089 675887 608159 -rect 675407 607445 675887 607515 +rect 675403 608641 675887 608711 +rect 675403 608089 675887 608159 +rect 675403 607445 675887 607515 rect 30782 606827 39885 606896 rect 30782 606523 30845 606827 rect 31549 606808 39885 606827 rect 31549 606523 39705 606808 rect 30782 606504 39705 606523 rect 39849 606504 39885 606808 -rect 40810 606781 42193 606841 -rect 675407 606801 675887 606871 +rect 40810 606781 42197 606841 +rect 675403 606801 675887 606871 rect 30782 606446 39885 606504 rect 37316 606222 39885 606260 rect 37316 605918 37386 606222 @@ -1827,38 +1827,38 @@ rect 38090 605918 39704 606216 rect 37316 605912 39704 605918 rect 39848 605912 39885 606216 rect 37316 605879 39885 605912 -rect 675407 604961 675887 605031 -rect 40810 604781 42193 604841 -rect 675407 604409 675887 604479 -rect 675407 603765 675887 603835 -rect 675407 603121 675887 603191 -rect 675407 600637 675887 600707 -rect 675407 600085 675887 600155 -rect 675407 599441 675887 599511 -rect 675407 598797 675887 598867 -rect 675407 598172 675887 598386 -rect 675407 597601 675887 597671 -rect 675407 596375 675887 596503 -rect 675407 595761 675887 595831 -rect 675407 593921 675887 593991 -rect 41713 583409 42193 583479 -rect 41713 581569 42193 581639 -rect 41713 580897 42193 581025 -rect 41713 579729 42193 579799 -rect 41713 579014 42193 579228 -rect 41713 578533 42193 578603 -rect 41713 577889 42193 577959 -rect 41713 577245 42193 577315 -rect 41713 576693 42193 576763 -rect 41713 574209 42193 574279 -rect 41713 573565 42193 573635 -rect 41713 572921 42193 572991 -rect 41713 572369 42193 572439 -rect 41713 570529 42193 570599 -rect 41713 569885 42193 569955 -rect 41713 569241 42193 569311 -rect 41713 568689 42193 568759 -rect 675407 567143 676767 567205 +rect 675403 604961 675887 605031 +rect 40810 604781 42197 604841 +rect 675403 604409 675887 604479 +rect 675403 603765 675887 603835 +rect 675403 603121 675887 603191 +rect 675403 600637 675887 600707 +rect 675403 600085 675887 600155 +rect 675403 599441 675887 599511 +rect 675403 598797 675887 598867 +rect 675403 598172 675887 598386 +rect 675403 597601 675887 597671 +rect 675403 596375 675887 596503 +rect 675403 595761 675887 595831 +rect 675403 593921 675887 593991 +rect 41713 583409 42197 583479 +rect 41713 581569 42197 581639 +rect 41713 580897 42197 581025 +rect 41713 579729 42197 579799 +rect 41713 579014 42197 579228 +rect 41713 578533 42197 578603 +rect 41713 577889 42197 577959 +rect 41713 577245 42197 577315 +rect 41713 576693 42197 576763 +rect 41713 574209 42197 574279 +rect 41713 573565 42197 573635 +rect 41713 572921 42197 572991 +rect 41713 572369 42197 572439 +rect 41713 570529 42197 570599 +rect 41713 569885 42197 569955 +rect 41713 569241 42197 569311 +rect 41713 568689 42197 568759 +rect 675403 567143 676767 567205 rect 40832 564525 40892 567008 rect 677626 566068 680341 566107 rect 677626 566064 679567 566068 @@ -1869,7 +1869,7 @@ rect 677793 565760 680341 565764 rect 677626 565726 680341 565760 rect 677626 565463 686875 565540 rect 677626 565462 686108 565463 -rect 675407 565142 676797 565204 +rect 675403 565142 676797 565204 rect 677626 565158 677648 565462 rect 677792 565159 686108 565462 rect 686812 565159 686875 565463 @@ -1881,9 +1881,9 @@ rect 31549 563808 39885 563827 rect 31549 563523 39705 563808 rect 30782 563504 39705 563523 rect 39849 563504 39885 563808 -rect 40810 563781 42193 563841 +rect 40810 563781 42197 563841 rect 30782 563446 39885 563504 -rect 675407 563441 675887 563511 +rect 675403 563441 675887 563511 rect 37316 563222 39885 563260 rect 37316 562918 37386 563222 rect 38090 563216 39885 563222 @@ -1891,40 +1891,40 @@ rect 38090 562918 39704 563216 rect 37316 562912 39704 562918 rect 39848 562912 39885 563216 rect 37316 562879 39885 562912 -rect 675407 562889 675887 562959 -rect 675407 562245 675887 562315 -rect 40810 561781 42193 561841 -rect 675407 561601 675887 561671 -rect 675407 559761 675887 559831 -rect 675407 559209 675887 559279 -rect 675407 558565 675887 558635 -rect 675407 557921 675887 557991 -rect 675407 555437 675887 555507 -rect 675407 554885 675887 554955 -rect 675407 554241 675887 554311 -rect 675407 553597 675887 553667 -rect 675407 552972 675887 553186 -rect 675407 552401 675887 552471 -rect 675407 551175 675887 551303 -rect 675407 550561 675887 550631 -rect 675407 548721 675887 548791 -rect 41713 540209 42193 540279 -rect 41713 538369 42193 538439 -rect 41713 537697 42193 537825 -rect 41713 536529 42193 536599 -rect 41713 535814 42193 536028 -rect 41713 535333 42193 535403 -rect 41713 534689 42193 534759 -rect 41713 534045 42193 534115 -rect 41713 533493 42193 533563 -rect 41713 531009 42193 531079 -rect 41713 530365 42193 530435 -rect 41713 529721 42193 529791 -rect 41713 529169 42193 529239 -rect 41713 527329 42193 527399 -rect 41713 526685 42193 526755 -rect 41713 526041 42193 526111 -rect 41713 525489 42193 525559 +rect 675403 562889 675887 562959 +rect 675403 562245 675887 562315 +rect 40810 561781 42197 561841 +rect 675403 561601 675887 561671 +rect 675403 559761 675887 559831 +rect 675403 559209 675887 559279 +rect 675403 558565 675887 558635 +rect 675403 557921 675887 557991 +rect 675403 555437 675887 555507 +rect 675403 554885 675887 554955 +rect 675403 554241 675887 554311 +rect 675403 553597 675887 553667 +rect 675403 552972 675887 553186 +rect 675403 552401 675887 552471 +rect 675403 551175 675887 551303 +rect 675403 550561 675887 550631 +rect 675403 548721 675887 548791 +rect 41713 540209 42197 540279 +rect 41713 538369 42197 538439 +rect 41713 537697 42197 537825 +rect 41713 536529 42197 536599 +rect 41713 535814 42197 536028 +rect 41713 535333 42197 535403 +rect 41713 534689 42197 534759 +rect 41713 534045 42197 534115 +rect 41713 533493 42197 533563 +rect 41713 531009 42197 531079 +rect 41713 530365 42197 530435 +rect 41713 529721 42197 529791 +rect 41713 529169 42197 529239 +rect 41713 527329 42197 527399 +rect 41713 526685 42197 526755 +rect 41713 526041 42197 526111 +rect 41713 525489 42197 525559 rect 40832 521519 40892 523808 rect 30782 520827 39885 520896 rect 30782 520523 30845 520827 @@ -1932,7 +1932,7 @@ rect 31549 520808 39885 520827 rect 31549 520523 39705 520808 rect 30782 520504 39705 520523 rect 39849 520504 39885 520808 -rect 40810 520781 42193 520841 +rect 40810 520781 42197 520841 rect 30782 520446 39885 520504 rect 37316 520222 39885 520260 rect 37316 519918 37386 520222 @@ -1941,55 +1941,55 @@ rect 38090 519918 39704 520216 rect 37316 519912 39704 519918 rect 39848 519912 39885 520216 rect 37316 519879 39885 519912 -rect 40810 518781 42193 518841 -rect 675407 513921 677812 518701 -rect 675407 503941 677812 508721 -rect 39874 493077 42193 497857 -rect 39874 483099 42193 487879 -rect 675407 469900 676907 474699 +rect 40810 518781 42197 518841 +rect 675403 513921 677812 518701 +rect 675403 503941 677812 508721 +rect 39874 493077 42197 497857 +rect 39874 483099 42197 487879 +rect 675403 469900 676907 474699 rect 677705 469900 677752 474699 -rect 675407 469899 677752 469900 -rect 675407 469600 676109 469609 -rect 675407 469599 677549 469600 -rect 675407 464960 675787 469599 +rect 675403 469899 677752 469900 +rect 675403 469600 676109 469609 +rect 675403 469599 677549 469600 +rect 675403 464960 675787 469599 rect 676585 464960 677549 469599 -rect 675407 464947 676109 464960 +rect 675403 464947 676109 464960 rect 676838 464649 676907 464660 -rect 675407 459861 676907 464649 +rect 675403 459861 676907 464649 rect 677705 459861 677752 464660 -rect 675407 459860 677752 459861 -rect 675407 459859 675907 459860 -rect 39870 455740 42193 455741 +rect 675403 459860 677752 459861 +rect 675403 459859 675907 459860 +rect 39870 455740 42197 455741 rect 39870 450953 39919 455740 -rect 40717 450953 42193 455740 -rect 39870 450952 42193 450953 -rect 41495 450951 42193 450952 +rect 40717 450953 42197 455740 +rect 39870 450952 42197 450953 +rect 41495 450951 42197 450952 rect 40051 446001 41039 450651 -rect 41837 446001 42193 450651 -rect 40051 446000 42193 446001 -rect 41693 445999 42193 446000 +rect 41837 446001 42197 450651 +rect 40051 446000 42197 446001 +rect 41693 445999 42197 446000 rect 39870 440900 39919 445699 -rect 40717 440900 42193 445699 -rect 39870 440899 42193 440900 -rect 675407 425721 677812 430501 -rect 675407 415743 677812 420523 -rect 41713 412609 42193 412679 -rect 41713 410769 42193 410839 -rect 41713 410097 42193 410225 -rect 41713 408929 42193 408999 -rect 41713 408214 42193 408428 -rect 41713 407733 42193 407803 -rect 41713 407089 42193 407159 -rect 41713 406445 42193 406515 -rect 41713 405893 42193 405963 -rect 41713 403409 42193 403479 -rect 41713 402765 42193 402835 -rect 41713 402121 42193 402191 -rect 41713 401569 42193 401639 -rect 41713 399729 42193 399799 -rect 41713 399085 42193 399155 -rect 41713 398441 42193 398511 -rect 41713 397889 42193 397959 +rect 40717 440900 42197 445699 +rect 39870 440899 42197 440900 +rect 675403 425721 677812 430501 +rect 675403 415743 677812 420523 +rect 41713 412609 42197 412679 +rect 41713 410769 42197 410839 +rect 41713 410097 42197 410225 +rect 41713 408929 42197 408999 +rect 41713 408214 42197 408428 +rect 41713 407733 42197 407803 +rect 41713 407089 42197 407159 +rect 41713 406445 42197 406515 +rect 41713 405893 42197 405963 +rect 41713 403409 42197 403479 +rect 41713 402765 42197 402835 +rect 41713 402121 42197 402191 +rect 41713 401569 42197 401639 +rect 41713 399729 42197 399799 +rect 41713 399085 42197 399155 +rect 41713 398441 42197 398511 +rect 41713 397889 42197 397959 rect 40832 392553 40892 396208 rect 30782 391827 39885 391896 rect 30782 391523 30845 391827 @@ -1997,7 +1997,7 @@ rect 31549 391808 39885 391827 rect 31549 391523 39705 391808 rect 30782 391504 39705 391523 rect 39849 391504 39885 391808 -rect 40810 391781 42193 391841 +rect 40810 391781 42197 391841 rect 30782 391446 39885 391504 rect 37316 391222 39885 391260 rect 37316 390918 37386 391222 @@ -2006,8 +2006,8 @@ rect 38090 390918 39704 391216 rect 37316 390912 39704 390918 rect 39848 390912 39885 391216 rect 37316 390879 39885 390912 -rect 675407 390143 676767 390205 -rect 40810 389781 42193 389841 +rect 675403 390143 676767 390205 +rect 40810 389781 42197 389841 rect 677626 389068 680341 389107 rect 677626 389064 679567 389068 rect 677626 388760 677649 389064 @@ -2017,46 +2017,46 @@ rect 677793 388760 680341 388764 rect 677626 388726 680341 388760 rect 677626 388463 686875 388540 rect 677626 388462 686108 388463 -rect 675407 388142 676797 388204 +rect 675403 388142 676797 388204 rect 677626 388158 677648 388462 rect 677792 388159 686108 388462 rect 686812 388159 686875 388463 rect 677792 388158 686875 388159 rect 677626 388090 686875 388158 -rect 675407 386241 675887 386311 -rect 675407 385689 675887 385759 -rect 675407 385045 675887 385115 -rect 675407 384401 675887 384471 -rect 675407 382561 675887 382631 -rect 675407 382009 675887 382079 -rect 675407 381365 675887 381435 -rect 675407 380721 675887 380791 -rect 675407 378237 675887 378307 -rect 675407 377685 675887 377755 -rect 675407 377041 675887 377111 -rect 675407 376397 675887 376467 -rect 675407 375772 675887 375986 -rect 675407 375201 675887 375271 -rect 675407 373975 675887 374103 -rect 675407 373361 675887 373431 -rect 675407 371521 675887 371591 -rect 41713 369409 42193 369479 -rect 41713 367569 42193 367639 -rect 41713 366897 42193 367025 -rect 41713 365729 42193 365799 -rect 41713 365014 42193 365228 -rect 41713 364533 42193 364603 -rect 41713 363889 42193 363959 -rect 41713 363245 42193 363315 -rect 41713 362693 42193 362763 -rect 41713 360209 42193 360279 -rect 41713 359565 42193 359635 -rect 41713 358921 42193 358991 -rect 41713 358369 42193 358439 -rect 41713 356529 42193 356599 -rect 41713 355885 42193 355955 -rect 41713 355241 42193 355311 -rect 41713 354689 42193 354759 +rect 675403 386241 675887 386311 +rect 675403 385689 675887 385759 +rect 675403 385045 675887 385115 +rect 675403 384401 675887 384471 +rect 675403 382561 675887 382631 +rect 675403 382009 675887 382079 +rect 675403 381365 675887 381435 +rect 675403 380721 675887 380791 +rect 675403 378237 675887 378307 +rect 675403 377685 675887 377755 +rect 675403 377041 675887 377111 +rect 675403 376397 675887 376467 +rect 675403 375772 675887 375986 +rect 675403 375201 675887 375271 +rect 675403 373975 675887 374103 +rect 675403 373361 675887 373431 +rect 675403 371521 675887 371591 +rect 41713 369409 42197 369479 +rect 41713 367569 42197 367639 +rect 41713 366897 42197 367025 +rect 41713 365729 42197 365799 +rect 41713 365014 42197 365228 +rect 41713 364533 42197 364603 +rect 41713 363889 42197 363959 +rect 41713 363245 42197 363315 +rect 41713 362693 42197 362763 +rect 41713 360209 42197 360279 +rect 41713 359565 42197 359635 +rect 41713 358921 42197 358991 +rect 41713 358369 42197 358439 +rect 41713 356529 42197 356599 +rect 41713 355885 42197 355955 +rect 41713 355241 42197 355311 +rect 41713 354689 42197 354759 rect 40832 349533 40892 353008 rect 30782 348827 39885 348896 rect 30782 348523 30845 348827 @@ -2064,7 +2064,7 @@ rect 31549 348808 39885 348827 rect 31549 348523 39705 348808 rect 30782 348504 39705 348523 rect 39849 348504 39885 348808 -rect 40810 348781 42193 348841 +rect 40810 348781 42197 348841 rect 30782 348446 39885 348504 rect 37316 348222 39885 348260 rect 37316 347918 37386 348222 @@ -2073,8 +2073,8 @@ rect 38090 347918 39704 348216 rect 37316 347912 39704 347918 rect 39848 347912 39885 348216 rect 37316 347879 39885 347912 -rect 40810 346781 42193 346841 -rect 675407 345143 676767 345205 +rect 40810 346781 42197 346841 +rect 675403 345143 676767 345205 rect 677626 344068 680341 344107 rect 677626 344064 679567 344068 rect 677626 343760 677649 344064 @@ -2084,46 +2084,46 @@ rect 677793 343760 680341 343764 rect 677626 343726 680341 343760 rect 677626 343463 686875 343540 rect 677626 343462 686108 343463 -rect 675407 343142 676797 343204 +rect 675403 343142 676797 343204 rect 677626 343158 677648 343462 rect 677792 343159 686108 343462 rect 686812 343159 686875 343463 rect 677792 343158 686875 343159 rect 677626 343090 686875 343158 -rect 675407 341041 675887 341111 -rect 675407 340489 675887 340559 -rect 675407 339845 675887 339915 -rect 675407 339201 675887 339271 -rect 675407 337361 675887 337431 -rect 675407 336809 675887 336879 -rect 675407 336165 675887 336235 -rect 675407 335521 675887 335591 -rect 675407 333037 675887 333107 -rect 675407 332485 675887 332555 -rect 675407 331841 675887 331911 -rect 675407 331197 675887 331267 -rect 675407 330572 675887 330786 -rect 675407 330001 675887 330071 -rect 675407 328775 675887 328903 -rect 675407 328161 675887 328231 -rect 675407 326321 675887 326391 -rect 41713 326209 42193 326279 -rect 41713 324369 42193 324439 -rect 41713 323697 42193 323825 -rect 41713 322529 42193 322599 -rect 41713 321814 42193 322028 -rect 41713 321333 42193 321403 -rect 41713 320689 42193 320759 -rect 41713 320045 42193 320115 -rect 41713 319493 42193 319563 -rect 41713 317009 42193 317079 -rect 41713 316365 42193 316435 -rect 41713 315721 42193 315791 -rect 41713 315169 42193 315239 -rect 41713 313329 42193 313399 -rect 41713 312685 42193 312755 -rect 41713 312041 42193 312111 -rect 41713 311489 42193 311559 +rect 675403 341041 675887 341111 +rect 675403 340489 675887 340559 +rect 675403 339845 675887 339915 +rect 675403 339201 675887 339271 +rect 675403 337361 675887 337431 +rect 675403 336809 675887 336879 +rect 675403 336165 675887 336235 +rect 675403 335521 675887 335591 +rect 675403 333037 675887 333107 +rect 675403 332485 675887 332555 +rect 675403 331841 675887 331911 +rect 675403 331197 675887 331267 +rect 675403 330572 675887 330786 +rect 675403 330001 675887 330071 +rect 675403 328775 675887 328903 +rect 675403 328161 675887 328231 +rect 675403 326321 675887 326391 +rect 41713 326209 42197 326279 +rect 41713 324369 42197 324439 +rect 41713 323697 42197 323825 +rect 41713 322529 42197 322599 +rect 41713 321814 42197 322028 +rect 41713 321333 42197 321403 +rect 41713 320689 42197 320759 +rect 41713 320045 42197 320115 +rect 41713 319493 42197 319563 +rect 41713 317009 42197 317079 +rect 41713 316365 42197 316435 +rect 41713 315721 42197 315791 +rect 41713 315169 42197 315239 +rect 41713 313329 42197 313399 +rect 41713 312685 42197 312755 +rect 41713 312041 42197 312111 +rect 41713 311489 42197 311559 rect 40832 306514 40892 309808 rect 30782 305827 39885 305896 rect 30782 305523 30845 305827 @@ -2131,7 +2131,7 @@ rect 31549 305808 39885 305827 rect 31549 305523 39705 305808 rect 30782 305504 39705 305523 rect 39849 305504 39885 305808 -rect 40810 305781 42193 305841 +rect 40810 305781 42197 305841 rect 30782 305446 39885 305504 rect 37316 305222 39885 305260 rect 37316 304918 37386 305222 @@ -2140,8 +2140,8 @@ rect 38090 304918 39704 305216 rect 37316 304912 39704 304918 rect 39848 304912 39885 305216 rect 37316 304879 39885 304912 -rect 40810 303781 42193 303841 -rect 675407 300143 676767 300205 +rect 40810 303781 42197 303841 +rect 675403 300143 676767 300205 rect 677626 299068 680341 299107 rect 677626 299064 679567 299068 rect 677626 298760 677649 299064 @@ -2151,46 +2151,46 @@ rect 677793 298760 680341 298764 rect 677626 298726 680341 298760 rect 677626 298463 686875 298540 rect 677626 298462 686108 298463 -rect 675407 298142 676797 298204 +rect 675403 298142 676797 298204 rect 677626 298158 677648 298462 rect 677792 298159 686108 298462 rect 686812 298159 686875 298463 rect 677792 298158 686875 298159 rect 677626 298090 686875 298158 -rect 675407 296041 675887 296111 -rect 675407 295489 675887 295559 -rect 675407 294845 675887 294915 -rect 675407 294201 675887 294271 -rect 675407 292361 675887 292431 -rect 675407 291809 675887 291879 -rect 675407 291165 675887 291235 -rect 675407 290521 675887 290591 -rect 675407 288037 675887 288107 -rect 675407 287485 675887 287555 -rect 675407 286841 675887 286911 -rect 675407 286197 675887 286267 -rect 675407 285572 675887 285786 -rect 675407 285001 675887 285071 -rect 675407 283775 675887 283903 -rect 675407 283161 675887 283231 -rect 41713 283009 42193 283079 -rect 675407 281321 675887 281391 -rect 41713 281169 42193 281239 -rect 41713 280497 42193 280625 -rect 41713 279329 42193 279399 -rect 41713 278614 42193 278828 -rect 41713 278133 42193 278203 -rect 41713 277489 42193 277559 -rect 41713 276845 42193 276915 -rect 41713 276293 42193 276363 -rect 41713 273809 42193 273879 -rect 41713 273165 42193 273235 -rect 41713 272521 42193 272591 -rect 41713 271969 42193 272039 -rect 41713 270129 42193 270199 -rect 41713 269485 42193 269555 -rect 41713 268841 42193 268911 -rect 41713 268289 42193 268359 +rect 675403 296041 675887 296111 +rect 675403 295489 675887 295559 +rect 675403 294845 675887 294915 +rect 675403 294201 675887 294271 +rect 675403 292361 675887 292431 +rect 675403 291809 675887 291879 +rect 675403 291165 675887 291235 +rect 675403 290521 675887 290591 +rect 675403 288037 675887 288107 +rect 675403 287485 675887 287555 +rect 675403 286841 675887 286911 +rect 675403 286197 675887 286267 +rect 675403 285572 675887 285786 +rect 675403 285001 675887 285071 +rect 675403 283775 675887 283903 +rect 675403 283161 675887 283231 +rect 41713 283009 42197 283079 +rect 675403 281321 675887 281391 +rect 41713 281169 42197 281239 +rect 41713 280497 42197 280625 +rect 41713 279329 42197 279399 +rect 41713 278614 42197 278828 +rect 41713 278133 42197 278203 +rect 41713 277489 42197 277559 +rect 41713 276845 42197 276915 +rect 41713 276293 42197 276363 +rect 41713 273809 42197 273879 +rect 41713 273165 42197 273235 +rect 41713 272521 42197 272591 +rect 41713 271969 42197 272039 +rect 41713 270129 42197 270199 +rect 41713 269485 42197 269555 +rect 41713 268841 42197 268911 +rect 41713 268289 42197 268359 rect 40832 263525 40892 266624 rect 30782 262827 39885 262896 rect 30782 262523 30845 262827 @@ -2198,7 +2198,7 @@ rect 31549 262808 39885 262827 rect 31549 262523 39705 262808 rect 30782 262504 39705 262523 rect 39849 262504 39885 262808 -rect 40810 262781 42193 262841 +rect 40810 262781 42197 262841 rect 30782 262446 39885 262504 rect 37316 262222 39885 262260 rect 37316 261918 37386 262222 @@ -2207,8 +2207,8 @@ rect 38090 261918 39704 262216 rect 37316 261912 39704 261918 rect 39848 261912 39885 262216 rect 37316 261879 39885 261912 -rect 40810 260781 42193 260841 -rect 675407 255143 676767 255205 +rect 40810 260781 42197 260841 +rect 675403 255143 676767 255205 rect 677626 254068 680341 254107 rect 677626 254064 679567 254068 rect 677626 253760 677649 254064 @@ -2218,46 +2218,46 @@ rect 677793 253760 680341 253764 rect 677626 253726 680341 253760 rect 677626 253463 686875 253540 rect 677626 253462 686108 253463 -rect 675407 253142 676797 253204 +rect 675403 253142 676797 253204 rect 677626 253158 677648 253462 rect 677792 253159 686108 253462 rect 686812 253159 686875 253463 rect 677792 253158 686875 253159 rect 677626 253090 686875 253158 -rect 675407 251041 675887 251111 -rect 675407 250489 675887 250559 -rect 675407 249845 675887 249915 -rect 675407 249201 675887 249271 -rect 675407 247361 675887 247431 -rect 675407 246809 675887 246879 -rect 675407 246165 675887 246235 -rect 675407 245521 675887 245591 -rect 675407 243037 675887 243107 -rect 675407 242485 675887 242555 -rect 675407 241841 675887 241911 -rect 675407 241197 675887 241267 -rect 675407 240572 675887 240786 -rect 675407 240001 675887 240071 -rect 41713 239809 42193 239879 -rect 675407 238775 675887 238903 -rect 675407 238161 675887 238231 -rect 41713 237969 42193 238039 -rect 41713 237297 42193 237425 -rect 675407 236321 675887 236391 -rect 41713 236129 42193 236199 -rect 41713 235414 42193 235628 -rect 41713 234933 42193 235003 -rect 41713 234289 42193 234359 -rect 41713 233645 42193 233715 -rect 41713 233093 42193 233163 -rect 41713 230609 42193 230679 -rect 41713 229965 42193 230035 -rect 41713 229321 42193 229391 -rect 41713 228769 42193 228839 -rect 41713 226929 42193 226999 -rect 41713 226285 42193 226355 -rect 41713 225641 42193 225711 -rect 41713 225089 42193 225159 +rect 675403 251041 675887 251111 +rect 675403 250489 675887 250559 +rect 675403 249845 675887 249915 +rect 675403 249201 675887 249271 +rect 675403 247361 675887 247431 +rect 675403 246809 675887 246879 +rect 675403 246165 675887 246235 +rect 675403 245521 675887 245591 +rect 675403 243037 675887 243107 +rect 675403 242485 675887 242555 +rect 675403 241841 675887 241911 +rect 675403 241197 675887 241267 +rect 675403 240572 675887 240786 +rect 675403 240001 675887 240071 +rect 41713 239809 42197 239879 +rect 675403 238775 675887 238903 +rect 675403 238161 675887 238231 +rect 41713 237969 42197 238039 +rect 41713 237297 42197 237425 +rect 675403 236321 675887 236391 +rect 41713 236129 42197 236199 +rect 41713 235414 42197 235628 +rect 41713 234933 42197 235003 +rect 41713 234289 42197 234359 +rect 41713 233645 42197 233715 +rect 41713 233093 42197 233163 +rect 41713 230609 42197 230679 +rect 41713 229965 42197 230035 +rect 41713 229321 42197 229391 +rect 41713 228769 42197 228839 +rect 41713 226929 42197 226999 +rect 41713 226285 42197 226355 +rect 41713 225641 42197 225711 +rect 41713 225089 42197 225159 rect 40832 220519 40892 223429 rect 30782 219827 39885 219896 rect 30782 219523 30845 219827 @@ -2265,7 +2265,7 @@ rect 31549 219808 39885 219827 rect 31549 219523 39705 219808 rect 30782 219504 39705 219523 rect 39849 219504 39885 219808 -rect 40810 219781 42193 219841 +rect 40810 219781 42197 219841 rect 30782 219446 39885 219504 rect 37316 219222 39885 219260 rect 37316 218918 37386 219222 @@ -2274,8 +2274,8 @@ rect 38090 218918 39704 219216 rect 37316 218912 39704 218918 rect 39848 218912 39885 219216 rect 37316 218879 39885 218912 -rect 40810 217781 42193 217841 -rect 675407 210143 676767 210205 +rect 40810 217781 42197 217841 +rect 675403 210143 676767 210205 rect 677626 209068 680341 209107 rect 677626 209064 679567 209068 rect 677626 208760 677649 209064 @@ -2285,46 +2285,46 @@ rect 677793 208760 680341 208764 rect 677626 208726 680341 208760 rect 677626 208463 686875 208540 rect 677626 208462 686108 208463 -rect 675407 208142 676797 208204 +rect 675403 208142 676797 208204 rect 677626 208158 677648 208462 rect 677792 208159 686108 208462 rect 686812 208159 686875 208463 rect 677792 208158 686875 208159 rect 677626 208090 686875 208158 -rect 675407 205841 675887 205911 -rect 675407 205289 675887 205359 -rect 675407 204645 675887 204715 -rect 675407 204001 675887 204071 -rect 675407 202161 675887 202231 -rect 675407 201609 675887 201679 -rect 675407 200965 675887 201035 -rect 675407 200321 675887 200391 -rect 675407 197837 675887 197907 -rect 675407 197285 675887 197355 -rect 41713 196609 42193 196679 -rect 675407 196641 675887 196711 -rect 675407 195997 675887 196067 -rect 675407 195372 675887 195586 -rect 41713 194769 42193 194839 -rect 675407 194801 675887 194871 -rect 41713 194097 42193 194225 -rect 675407 193575 675887 193703 -rect 41713 192929 42193 192999 -rect 675407 192961 675887 193031 -rect 41713 192214 42193 192428 -rect 41713 191733 42193 191803 -rect 41713 191089 42193 191159 -rect 675407 191121 675887 191191 -rect 41713 190445 42193 190515 -rect 41713 189893 42193 189963 -rect 41713 187409 42193 187479 -rect 41713 186765 42193 186835 -rect 41713 186121 42193 186191 -rect 41713 185569 42193 185639 -rect 41713 183729 42193 183799 -rect 41713 183085 42193 183155 -rect 41713 182441 42193 182511 -rect 41713 181889 42193 181959 +rect 675403 205841 675887 205911 +rect 675403 205289 675887 205359 +rect 675403 204645 675887 204715 +rect 675403 204001 675887 204071 +rect 675403 202161 675887 202231 +rect 675403 201609 675887 201679 +rect 675403 200965 675887 201035 +rect 675403 200321 675887 200391 +rect 675403 197837 675887 197907 +rect 675403 197285 675887 197355 +rect 41713 196609 42197 196679 +rect 675403 196641 675887 196711 +rect 675403 195997 675887 196067 +rect 675403 195372 675887 195586 +rect 41713 194769 42197 194839 +rect 675403 194801 675887 194871 +rect 41713 194097 42197 194225 +rect 675403 193575 675887 193703 +rect 41713 192929 42197 192999 +rect 675403 192961 675887 193031 +rect 41713 192214 42197 192428 +rect 41713 191733 42197 191803 +rect 41713 191089 42197 191159 +rect 675403 191121 675887 191191 +rect 41713 190445 42197 190515 +rect 41713 189893 42197 189963 +rect 41713 187409 42197 187479 +rect 41713 186765 42197 186835 +rect 41713 186121 42197 186191 +rect 41713 185569 42197 185639 +rect 41713 183729 42197 183799 +rect 41713 183085 42197 183155 +rect 41713 182441 42197 182511 +rect 41713 181889 42197 181959 rect 40832 177543 40892 180230 rect 30782 176827 39885 176896 rect 30782 176523 30845 176827 @@ -2332,7 +2332,7 @@ rect 31549 176808 39885 176827 rect 31549 176523 39705 176808 rect 30782 176504 39705 176523 rect 39849 176504 39885 176808 -rect 40810 176781 42193 176841 +rect 40810 176781 42197 176841 rect 30782 176446 39885 176504 rect 37316 176222 39885 176260 rect 37316 175918 37386 176222 @@ -2341,8 +2341,8 @@ rect 38090 175918 39704 176216 rect 37316 175912 39704 175918 rect 39848 175912 39885 176216 rect 37316 175879 39885 175912 -rect 40810 174781 42193 174841 -rect 675407 165143 676767 165205 +rect 40810 174781 42197 174841 +rect 675403 165143 676767 165205 rect 677626 164068 680341 164107 rect 677626 164064 679567 164068 rect 677626 163760 677649 164064 @@ -2352,31 +2352,31 @@ rect 677793 163760 680341 163764 rect 677626 163726 680341 163760 rect 677626 163463 686875 163540 rect 677626 163462 686108 163463 -rect 675407 163142 676797 163204 +rect 675403 163142 676797 163204 rect 677626 163158 677648 163462 rect 677792 163159 686108 163462 rect 686812 163159 686875 163463 rect 677792 163158 686875 163159 rect 677626 163090 686875 163158 -rect 675407 160841 675887 160911 -rect 675407 160289 675887 160359 -rect 675407 159645 675887 159715 -rect 675407 159001 675887 159071 -rect 675407 157161 675887 157231 -rect 675407 156609 675887 156679 -rect 675407 155965 675887 156035 -rect 675407 155321 675887 155391 -rect 675407 152837 675887 152907 -rect 675407 152285 675887 152355 -rect 675407 151641 675887 151711 -rect 675407 150997 675887 151067 -rect 675407 150372 675887 150586 -rect 675407 149801 675887 149871 -rect 675407 148575 675887 148703 -rect 675407 147961 675887 148031 -rect 675407 146121 675887 146191 -rect 39790 120277 42193 125057 -rect 675407 120143 676744 120205 +rect 675403 160841 675887 160911 +rect 675403 160289 675887 160359 +rect 675403 159645 675887 159715 +rect 675403 159001 675887 159071 +rect 675403 157161 675887 157231 +rect 675403 156609 675887 156679 +rect 675403 155965 675887 156035 +rect 675403 155321 675887 155391 +rect 675403 152837 675887 152907 +rect 675403 152285 675887 152355 +rect 675403 151641 675887 151711 +rect 675403 150997 675887 151067 +rect 675403 150372 675887 150586 +rect 675403 149801 675887 149871 +rect 675403 148575 675887 148703 +rect 675403 147961 675887 148031 +rect 675403 146121 675887 146191 +rect 39790 120277 42197 125057 +rect 675403 120143 676744 120205 rect 677626 119068 680341 119107 rect 677626 119064 679567 119068 rect 677626 118760 677649 119064 @@ -2386,33 +2386,33 @@ rect 677793 118760 680341 118764 rect 677626 118726 680341 118760 rect 677626 118463 686875 118540 rect 677626 118462 686108 118463 -rect 675407 118142 676716 118204 +rect 675403 118142 676716 118204 rect 677626 118158 677648 118462 rect 677792 118159 686108 118462 rect 686812 118159 686875 118463 rect 677792 118158 686875 118159 rect 677626 118090 686875 118158 -rect 675407 115641 675887 115711 -rect 675407 115089 675887 115159 -rect 39790 110299 42193 115079 -rect 675407 114445 675887 114515 -rect 675407 113801 675887 113871 -rect 675407 111961 675887 112031 -rect 675407 111409 675887 111479 -rect 675407 110765 675887 110835 -rect 675407 110121 675887 110191 -rect 675407 107637 675887 107707 -rect 675407 107085 675887 107155 -rect 675407 106441 675887 106511 -rect 675407 105797 675887 105867 -rect 675407 105172 675887 105386 -rect 675407 104601 675887 104671 -rect 675407 103375 675887 103503 -rect 675407 102761 675887 102831 +rect 675403 115641 675887 115711 +rect 675403 115089 675887 115159 +rect 39790 110299 42197 115079 +rect 675403 114445 675887 114515 +rect 675403 113801 675887 113871 +rect 675403 111961 675887 112031 +rect 675403 111409 675887 111479 +rect 675403 110765 675887 110835 +rect 675403 110121 675887 110191 +rect 675403 107637 675887 107707 +rect 675403 107085 675887 107155 +rect 675403 106441 675887 106511 +rect 675403 105797 675887 105867 +rect 675403 105172 675887 105386 +rect 675403 104601 675887 104671 +rect 675403 103375 675887 103503 +rect 675403 102761 675887 102831 rect 19586 101323 31666 101352 rect 19586 99489 30809 101323 rect 31637 99489 31666 101323 -rect 675407 100921 675887 100991 +rect 675403 100921 675887 100991 rect 19586 99457 31666 99489 rect 17843 95353 17912 95915 rect 18569 95576 18629 95915 @@ -2421,26 +2421,26 @@ rect 18929 95795 19201 95800 rect 18929 95739 18934 95795 rect 19194 95739 19201 95795 rect 18929 95729 19201 95739 -rect 41327 95795 42193 95802 +rect 41327 95795 42197 95802 rect 41327 95739 41358 95795 -rect 41709 95739 42193 95795 -rect 41327 95732 42193 95739 +rect 41709 95739 42197 95795 +rect 41327 95732 42197 95739 rect 18563 95571 18835 95576 rect 18563 95515 18569 95571 rect 18829 95515 18835 95571 rect 18563 95505 18835 95515 -rect 41327 95571 42193 95579 +rect 41327 95571 42197 95579 rect 41327 95515 41350 95571 -rect 41701 95515 42193 95571 -rect 41327 95509 42193 95515 +rect 41701 95515 42197 95571 +rect 41327 95509 42197 95515 rect 17837 95347 18118 95353 rect 17837 95291 17843 95347 rect 18112 95291 18118 95347 rect 17837 95283 18118 95291 -rect 41327 95347 42193 95354 +rect 41327 95347 42197 95354 rect 41327 95291 41347 95347 -rect 41698 95291 42193 95347 -rect 41327 95284 42193 95291 +rect 41698 95291 42197 95347 +rect 41327 95284 42197 95291 rect 19024 94481 38186 94499 rect 19024 92770 19050 94481 rect 19352 94456 38186 94481 @@ -2448,12 +2448,12 @@ rect 19352 92802 37362 94456 rect 38160 92802 38186 94456 rect 19352 92770 38186 92802 rect 19024 92753 38186 92770 -rect 41693 82940 42193 82941 -rect 39566 78151 42193 82940 -rect 39566 68099 42193 72899 -rect 78943 39820 83723 42193 -rect 88921 39820 93701 42193 -rect 241421 41693 246051 42193 +rect 41693 82940 42197 82941 +rect 39566 78151 42197 82940 +rect 39566 68099 42197 72899 +rect 78943 39820 83723 42197 +rect 88921 39820 93701 42197 +rect 241421 41693 246051 42197 rect 145825 40874 145891 40877 rect 145825 40872 148252 40874 rect 145825 40816 145830 40872 @@ -2542,7 +2542,7 @@ rect 204337 39728 204371 39872 rect 204675 39728 204718 39872 rect 204337 38114 204718 39728 rect 241421 39564 246050 41693 -rect 251301 39564 256101 42193 +rect 251301 39564 256101 42197 rect 311308 40873 311378 40878 rect 315488 40874 315558 40881 rect 315488 40873 315495 40874 @@ -2671,10 +2671,10 @@ rect 532501 31573 532951 39729 rect 533137 39872 533518 39895 rect 533137 39728 533171 39872 rect 533475 39728 533518 39872 -rect 569143 39844 573923 42193 -rect 579121 39844 583901 42193 -rect 622943 39906 627723 42193 -rect 632921 39906 637701 42193 +rect 569143 39844 573923 42197 +rect 579121 39844 583901 42197 +rect 622943 39906 627723 42197 +rect 632921 39906 637701 42197 rect 533137 38114 533518 39728 rect 533137 37410 533175 38114 rect 533479 37410 533518 38114 @@ -8348,51 +8348,51 @@ flabel metal2 528651 41737 528707 42193 0 FreeSans 400 270 0 0 gpio_ib_mode_sel[ port 246 nsew flabel metal2 529295 41737 529351 42193 0 FreeSans 400 270 0 0 gpio_oeb[43] port 158 nsew -flabel metal3 675407 103375 675863 103503 0 FreeSans 400 0 0 0 analog_io[0] +flabel metal3 675403 103375 675863 103503 0 FreeSans 400 0 0 0 analog_io[0] port 905 nsew -flabel metal3 675407 105172 675863 105386 0 FreeSans 400 0 0 0 analog_noesd_io[0] +flabel metal3 675403 105172 675863 105386 0 FreeSans 400 0 0 0 analog_noesd_io[0] port 949 nsew -flabel metal3 675407 150372 675863 150586 0 FreeSans 400 0 0 0 analog_noesd_io[1] +flabel metal3 675403 150372 675863 150586 0 FreeSans 400 0 0 0 analog_noesd_io[1] port 948 nsew -flabel metal3 675407 148575 675863 148703 0 FreeSans 400 0 0 0 analog_io[1] +flabel metal3 675403 148575 675863 148703 0 FreeSans 400 0 0 0 analog_io[1] port 904 nsew -flabel metal3 675407 193575 675863 193703 0 FreeSans 400 0 0 0 analog_io[2] +flabel metal3 675403 193575 675863 193703 0 FreeSans 400 0 0 0 analog_io[2] port 903 nsew -flabel metal3 675407 195372 675863 195586 0 FreeSans 400 0 0 0 analog_noesd_io[2] +flabel metal3 675403 195372 675863 195586 0 FreeSans 400 0 0 0 analog_noesd_io[2] port 947 nsew -flabel metal3 675407 238775 675863 238903 0 FreeSans 400 0 0 0 analog_io[3] +flabel metal3 675403 238775 675863 238903 0 FreeSans 400 0 0 0 analog_io[3] port 902 nsew -flabel metal3 675407 283775 675863 283903 0 FreeSans 400 0 0 0 analog_io[4] +flabel metal3 675403 283775 675863 283903 0 FreeSans 400 0 0 0 analog_io[4] port 901 nsew -flabel metal3 675407 285572 675863 285786 0 FreeSans 400 0 0 0 analog_noesd_io[4] +flabel metal3 675403 285572 675863 285786 0 FreeSans 400 0 0 0 analog_noesd_io[4] port 945 nsew -flabel metal3 675407 328775 675863 328903 0 FreeSans 400 0 0 0 analog_io[5] +flabel metal3 675403 328775 675863 328903 0 FreeSans 400 0 0 0 analog_io[5] port 900 nsew -flabel metal3 675407 330572 675863 330786 0 FreeSans 400 0 0 0 analog_noesd_io[5] +flabel metal3 675403 330572 675863 330786 0 FreeSans 400 0 0 0 analog_noesd_io[5] port 944 nsew -flabel metal3 675407 373975 675863 374103 0 FreeSans 400 0 0 0 analog_io[6] +flabel metal3 675403 373975 675863 374103 0 FreeSans 400 0 0 0 analog_io[6] port 899 nsew -flabel metal3 675407 375772 675863 375986 0 FreeSans 400 0 0 0 analog_noesd_io[6] +flabel metal3 675403 375772 675863 375986 0 FreeSans 400 0 0 0 analog_noesd_io[6] port 943 nsew -flabel metal3 s 675407 551175 675863 551303 0 FreeSans 400 0 0 0 analog_io[7] +flabel metal3 s 675403 551175 675863 551303 0 FreeSans 400 0 0 0 analog_io[7] port 898 nsew -flabel metal3 s 675407 552972 675863 553186 0 FreeSans 400 0 0 0 analog_noesd_io[7] +flabel metal3 s 675403 552972 675863 553186 0 FreeSans 400 0 0 0 analog_noesd_io[7] port 942 nsew -flabel metal3 s 675407 596375 675863 596503 0 FreeSans 400 0 0 0 analog_io[8] +flabel metal3 s 675403 596375 675863 596503 0 FreeSans 400 0 0 0 analog_io[8] port 897 nsew -flabel metal3 s 675407 598172 675863 598386 0 FreeSans 400 0 0 0 analog_noesd_io[8] +flabel metal3 s 675403 598172 675863 598386 0 FreeSans 400 0 0 0 analog_noesd_io[8] port 941 nsew -flabel metal3 s 675407 641375 675863 641503 0 FreeSans 400 0 0 0 analog_io[9] +flabel metal3 s 675403 641375 675863 641503 0 FreeSans 400 0 0 0 analog_io[9] port 896 nsew -flabel metal3 s 675407 643172 675863 643386 0 FreeSans 400 0 0 0 analog_noesd_io[9] +flabel metal3 s 675403 643172 675863 643386 0 FreeSans 400 0 0 0 analog_noesd_io[9] port 940 nsew -flabel metal3 s 675407 686575 675863 686703 0 FreeSans 400 0 0 0 analog_io[10] +flabel metal3 s 675403 686575 675863 686703 0 FreeSans 400 0 0 0 analog_io[10] port 895 nsew -flabel metal3 s 675407 688372 675863 688586 0 FreeSans 400 0 0 0 analog_noesd_io[10] +flabel metal3 s 675403 688372 675863 688586 0 FreeSans 400 0 0 0 analog_noesd_io[10] port 939 nsew -flabel metal3 s 675407 731575 675863 731703 0 FreeSans 400 0 0 0 analog_io[11] +flabel metal3 s 675403 731575 675863 731703 0 FreeSans 400 0 0 0 analog_io[11] port 894 nsew -flabel metal3 s 675407 733372 675863 733586 0 FreeSans 400 0 0 0 analog_noesd_io[11] +flabel metal3 s 675403 733372 675863 733586 0 FreeSans 400 0 0 0 analog_noesd_io[11] port 938 nsew flabel metal2 s 626297 995407 626353 995863 0 FreeSans 400 90 0 0 gpio_in_h[15] port 758 nsew @@ -8424,11 +8424,11 @@ flabel metal2 s 475047 41737 475103 42193 0 FreeSans 400 90 0 0 gpio_in_h[42] port 731 nsew flabel metal2 s 529847 41737 529903 42193 0 FreeSans 400 90 0 0 gpio_in_h[43] port 730 nsew -flabel metal3 s 675407 776575 675863 776703 0 FreeSans 400 0 0 0 analog_io[12] +flabel metal3 s 675403 776575 675863 776703 0 FreeSans 400 0 0 0 analog_io[12] port 893 nsew -flabel metal3 s 675407 865775 675863 865903 0 FreeSans 400 0 0 0 analog_io[13] +flabel metal3 s 675403 865775 675863 865903 0 FreeSans 400 0 0 0 analog_io[13] port 892 nsew -flabel metal3 s 675407 954975 675863 955103 0 FreeSans 400 0 0 0 analog_io[14] +flabel metal3 s 675403 954975 675863 955103 0 FreeSans 400 0 0 0 analog_io[14] port 891 nsew flabel metal2 s 638497 995407 638625 995863 0 FreeSans 400 90 0 0 analog_io[15] port 890 nsew @@ -8448,27 +8448,27 @@ flabel metal2 s 140097 995407 140225 995863 0 FreeSans 400 90 0 0 analog_io[22] port 883 nsew flabel metal2 s 88697 995407 88825 995863 0 FreeSans 400 90 0 0 analog_io[23] port 882 nsew -flabel metal3 s 41737 796897 42193 797025 0 FreeSans 400 0 0 0 analog_io[25] +flabel metal3 s 41737 796897 42197 797025 0 FreeSans 400 0 0 0 analog_io[25] port 880 nsew -flabel metal3 s 41737 710497 42193 710625 0 FreeSans 400 0 0 0 analog_io[27] +flabel metal3 s 41737 710497 42197 710625 0 FreeSans 400 0 0 0 analog_io[27] port 878 nsew -flabel metal3 s 41737 667297 42193 667425 0 FreeSans 400 0 0 0 analog_io[28] +flabel metal3 s 41737 667297 42197 667425 0 FreeSans 400 0 0 0 analog_io[28] port 877 nsew -flabel metal3 s 41737 624097 42193 624225 0 FreeSans 400 0 0 0 analog_io[29] +flabel metal3 s 41737 624097 42197 624225 0 FreeSans 400 0 0 0 analog_io[29] port 876 nsew -flabel metal3 s 41737 580897 42193 581025 0 FreeSans 400 0 0 0 analog_io[30] +flabel metal3 s 41737 580897 42197 581025 0 FreeSans 400 0 0 0 analog_io[30] port 875 nsew -flabel metal3 s 41737 537697 42193 537825 0 FreeSans 400 0 0 0 analog_io[31] +flabel metal3 s 41737 537697 42197 537825 0 FreeSans 400 0 0 0 analog_io[31] port 874 nsew -flabel metal3 s 41737 410097 42193 410225 0 FreeSans 400 0 0 0 analog_io[32] +flabel metal3 s 41737 410097 42197 410225 0 FreeSans 400 0 0 0 analog_io[32] port 873 nsew -flabel metal3 s 41737 366897 42193 367025 0 FreeSans 400 0 0 0 analog_io[33] +flabel metal3 s 41737 366897 42197 367025 0 FreeSans 400 0 0 0 analog_io[33] port 872 nsew -flabel metal3 s 41737 323697 42193 323825 0 FreeSans 400 0 0 0 analog_io[34] +flabel metal3 s 41737 323697 42197 323825 0 FreeSans 400 0 0 0 analog_io[34] port 871 nsew -flabel metal3 s 41737 280497 42193 280625 0 FreeSans 400 0 0 0 analog_io[35] +flabel metal3 s 41737 280497 42197 280625 0 FreeSans 400 0 0 0 analog_io[35] port 870 nsew -flabel metal3 s 41737 237297 42193 237425 0 FreeSans 400 0 0 0 analog_io[36] +flabel metal3 s 41737 237297 42197 237425 0 FreeSans 400 0 0 0 analog_io[36] port 869 nsew flabel metal2 s 189775 41737 189903 42193 0 FreeSans 400 90 0 0 analog_io[38] port 867 nsew @@ -8480,11 +8480,11 @@ flabel metal2 s 462775 41737 462903 42193 0 FreeSans 400 90 0 0 analog_io[42] port 863 nsew flabel metal2 s 517575 41737 517703 42193 0 FreeSans 400 90 0 0 analog_io[43] port 862 nsew -flabel metal3 s 675407 778372 675863 778586 0 FreeSans 400 0 0 0 analog_noesd_io[12] +flabel metal3 s 675403 778372 675863 778586 0 FreeSans 400 0 0 0 analog_noesd_io[12] port 937 nsew -flabel metal3 s 675407 867572 675863 867786 0 FreeSans 400 0 0 0 analog_noesd_io[13] +flabel metal3 s 675403 867572 675863 867786 0 FreeSans 400 0 0 0 analog_noesd_io[13] port 936 nsew -flabel metal3 s 675407 956772 675863 956986 0 FreeSans 400 0 0 0 analog_noesd_io[14] +flabel metal3 s 675403 956772 675863 956986 0 FreeSans 400 0 0 0 analog_noesd_io[14] port 935 nsew flabel metal2 s 636614 995407 636828 995863 0 FreeSans 400 90 0 0 analog_noesd_io[15] port 934 nsew @@ -8504,27 +8504,27 @@ flabel metal2 s 138214 995407 138428 995863 0 FreeSans 400 90 0 0 analog_noesd_i port 927 nsew flabel metal2 s 86814 995407 87028 995863 0 FreeSans 400 90 0 0 analog_noesd_io[23] port 926 nsew -flabel metal3 s 41737 795014 42193 795228 0 FreeSans 400 0 0 0 analog_noesd_io[25] +flabel metal3 s 41737 795014 42197 795228 0 FreeSans 400 0 0 0 analog_noesd_io[25] port 924 nsew -flabel metal3 s 41737 751814 42193 752028 0 FreeSans 400 0 0 0 analog_noesd_io[26] +flabel metal3 s 41737 751814 42197 752028 0 FreeSans 400 0 0 0 analog_noesd_io[26] port 923 nsew -flabel metal3 s 41737 708614 42193 708828 0 FreeSans 400 0 0 0 analog_noesd_io[27] +flabel metal3 s 41737 708614 42197 708828 0 FreeSans 400 0 0 0 analog_noesd_io[27] port 922 nsew -flabel metal3 s 41737 622214 42193 622428 0 FreeSans 400 0 0 0 analog_noesd_io[29] +flabel metal3 s 41737 622214 42197 622428 0 FreeSans 400 0 0 0 analog_noesd_io[29] port 920 nsew -flabel metal3 s 41737 579014 42193 579228 0 FreeSans 400 0 0 0 analog_noesd_io[30] +flabel metal3 s 41737 579014 42197 579228 0 FreeSans 400 0 0 0 analog_noesd_io[30] port 919 nsew -flabel metal3 s 41737 408214 42193 408428 0 FreeSans 400 0 0 0 analog_noesd_io[32] +flabel metal3 s 41737 408214 42197 408428 0 FreeSans 400 0 0 0 analog_noesd_io[32] port 917 nsew -flabel metal3 s 41737 365014 42193 365228 0 FreeSans 400 0 0 0 analog_noesd_io[33] +flabel metal3 s 41737 365014 42197 365228 0 FreeSans 400 0 0 0 analog_noesd_io[33] port 916 nsew -flabel metal3 s 41737 321814 42193 322028 0 FreeSans 400 0 0 0 analog_noesd_io[34] +flabel metal3 s 41737 321814 42197 322028 0 FreeSans 400 0 0 0 analog_noesd_io[34] port 915 nsew -flabel metal3 s 41737 278614 42193 278828 0 FreeSans 400 0 0 0 analog_noesd_io[35] +flabel metal3 s 41737 278614 42197 278828 0 FreeSans 400 0 0 0 analog_noesd_io[35] port 914 nsew -flabel metal3 s 41737 235414 42193 235628 0 FreeSans 400 0 0 0 analog_noesd_io[36] +flabel metal3 s 41737 235414 42197 235628 0 FreeSans 400 0 0 0 analog_noesd_io[36] port 913 nsew -flabel metal3 s 41737 192214 42193 192428 0 FreeSans 400 0 0 0 analog_noesd_io[37] +flabel metal3 s 41737 192214 42197 192428 0 FreeSans 400 0 0 0 analog_noesd_io[37] port 912 nsew flabel metal2 s 191572 41737 191786 42193 0 FreeSans 400 90 0 0 analog_noesd_io[38] port 911 nsew @@ -8538,33 +8538,33 @@ flabel metal2 s 464572 41737 464786 42193 0 FreeSans 400 90 0 0 analog_noesd_io[ port 907 nsew flabel metal2 s 519372 41737 519586 42193 0 FreeSans 400 90 0 0 analog_noesd_io[43] port 906 nsew -flabel metal3 41737 948781 42193 948841 0 FreeSans 400 0 0 0 gpio_loopback_one[24] +flabel metal3 41737 948781 42197 948841 0 FreeSans 400 0 0 0 gpio_loopback_one[24] port 837 nsew -flabel metal3 41737 778781 42193 778841 0 FreeSans 400 0 0 0 gpio_loopback_one[25] +flabel metal3 41737 778781 42197 778841 0 FreeSans 400 0 0 0 gpio_loopback_one[25] port 836 nsew -flabel metal3 41737 735781 42193 735841 0 FreeSans 400 0 0 0 gpio_loopback_one[26] +flabel metal3 41737 735781 42197 735841 0 FreeSans 400 0 0 0 gpio_loopback_one[26] port 835 nsew -flabel metal3 41737 692781 42193 692841 0 FreeSans 400 0 0 0 gpio_loopback_one[27] +flabel metal3 41737 692781 42197 692841 0 FreeSans 400 0 0 0 gpio_loopback_one[27] port 834 nsew -flabel metal3 41737 649781 42193 649841 0 FreeSans 400 0 0 0 gpio_loopback_one[28] +flabel metal3 41737 649781 42197 649841 0 FreeSans 400 0 0 0 gpio_loopback_one[28] port 833 nsew -flabel metal3 41737 606781 42193 606841 0 FreeSans 400 0 0 0 gpio_loopback_one[29] +flabel metal3 41737 606781 42197 606841 0 FreeSans 400 0 0 0 gpio_loopback_one[29] port 832 nsew -flabel metal3 41737 563781 42193 563841 0 FreeSans 400 0 0 0 gpio_loopback_one[30] +flabel metal3 41737 563781 42197 563841 0 FreeSans 400 0 0 0 gpio_loopback_one[30] port 831 nsew -flabel metal3 41737 520781 42193 520841 0 FreeSans 400 0 0 0 gpio_loopback_one[31] +flabel metal3 41737 520781 42197 520841 0 FreeSans 400 0 0 0 gpio_loopback_one[31] port 830 nsew -flabel metal3 41737 391781 42193 391841 0 FreeSans 400 0 0 0 gpio_loopback_one[32] +flabel metal3 41737 391781 42197 391841 0 FreeSans 400 0 0 0 gpio_loopback_one[32] port 829 nsew -flabel metal3 41737 348781 42193 348841 0 FreeSans 400 0 0 0 gpio_loopback_one[33] +flabel metal3 41737 348781 42197 348841 0 FreeSans 400 0 0 0 gpio_loopback_one[33] port 828 nsew -flabel metal3 41737 305781 42193 305841 0 FreeSans 400 0 0 0 gpio_loopback_one[34] +flabel metal3 41737 305781 42197 305841 0 FreeSans 400 0 0 0 gpio_loopback_one[34] port 827 nsew -flabel metal3 41737 262781 42193 262841 0 FreeSans 400 0 0 0 gpio_loopback_one[35] +flabel metal3 41737 262781 42197 262841 0 FreeSans 400 0 0 0 gpio_loopback_one[35] port 826 nsew -flabel metal3 41737 219781 42193 219841 0 FreeSans 400 0 0 0 gpio_loopback_one[36] +flabel metal3 41737 219781 42197 219841 0 FreeSans 400 0 0 0 gpio_loopback_one[36] port 825 nsew -flabel metal3 41737 176781 42193 176841 0 FreeSans 400 0 0 0 gpio_loopback_one[37] +flabel metal3 41737 176781 42197 176841 0 FreeSans 400 0 0 0 gpio_loopback_one[37] port 824 nsew flabel metal2 s 530517 41737 530569 42193 0 FreeSans 400 90 0 0 gpio_loopback_one[43] port 818 nsew @@ -8594,13 +8594,13 @@ flabel metal2 s 152301 41737 152357 42193 0 FreeSans 400 90 0 0 resetb_l port 37 nsew flabel metal2 s 141713 41737 141769 42193 0 FreeSans 400 90 0 0 resetb_h port 36 nsew -flabel metal3 41737 95509 42193 95579 0 FreeSans 400 0 0 0 por_l +flabel metal3 41737 95509 42197 95579 0 FreeSans 400 0 0 0 por_l port 35 nsew -flabel metal3 41737 95732 42193 95802 0 FreeSans 400 0 0 0 porb_l +flabel metal3 41737 95732 42197 95802 0 FreeSans 400 0 0 0 porb_l port 34 nsew flabel metal2 s 647219 41737 647271 42193 0 FreeSans 400 90 0 0 mask_rev[0] port 69 nsew -flabel metal3 41737 95284 42193 95354 0 FreeSans 400 0 0 0 porb_h +flabel metal3 41737 95284 42197 95354 0 FreeSans 400 0 0 0 porb_h port 33 nsew flabel metal2 620435 995407 620495 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[15] port 846 nsew @@ -8620,45 +8620,45 @@ flabel metal2 122835 995407 122895 995863 0 FreeSans 400 90 0 0 gpio_loopback_on port 839 nsew flabel metal2 71635 995407 71695 995863 0 FreeSans 400 90 0 0 gpio_loopback_one[23] port 838 nsew -flabel metal3 675407 388142 675863 388204 0 FreeSans 400 0 0 0 gpio_loopback_one[6] +flabel metal3 675403 388142 675863 388204 0 FreeSans 400 0 0 0 gpio_loopback_one[6] port 855 nsew -flabel metal3 675407 343142 675863 343204 0 FreeSans 400 0 0 0 gpio_loopback_one[5] +flabel metal3 675403 343142 675863 343204 0 FreeSans 400 0 0 0 gpio_loopback_one[5] port 856 nsew -flabel metal3 675407 298142 675863 298204 0 FreeSans 400 0 0 0 gpio_loopback_one[4] +flabel metal3 675403 298142 675863 298204 0 FreeSans 400 0 0 0 gpio_loopback_one[4] port 857 nsew -flabel metal3 675407 253142 675863 253204 0 FreeSans 400 0 0 0 gpio_loopback_one[3] +flabel metal3 675403 253142 675863 253204 0 FreeSans 400 0 0 0 gpio_loopback_one[3] port 858 nsew -flabel metal3 675407 208142 675863 208204 0 FreeSans 400 0 0 0 gpio_loopback_one[2] +flabel metal3 675403 208142 675863 208204 0 FreeSans 400 0 0 0 gpio_loopback_one[2] port 859 nsew -flabel metal3 675407 163142 675863 163204 0 FreeSans 400 0 0 0 gpio_loopback_one[1] +flabel metal3 675403 163142 675863 163204 0 FreeSans 400 0 0 0 gpio_loopback_one[1] port 860 nsew -flabel metal3 675407 118142 675863 118204 0 FreeSans 400 0 0 0 gpio_loopback_one[0] +flabel metal3 675403 118142 675863 118204 0 FreeSans 400 0 0 0 gpio_loopback_one[0] port 861 nsew -flabel metal3 632921 41737 637701 42193 0 FreeSans 3200 0 0 0 vdda +flabel metal3 632921 41737 637701 42197 0 FreeSans 3200 0 0 0 vdda port 22 nsew -flabel metal3 579121 41737 583901 42193 0 FreeSans 3200 0 0 0 vssio +flabel metal3 579121 41737 583901 42197 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 41737 110299 42193 115079 0 FreeSans 3200 90 0 0 vddio +flabel metal3 41737 110299 42197 115079 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 41737 483099 42193 487879 0 FreeSans 3200 90 0 0 vdda2 +flabel metal3 41737 483099 42197 487879 0 FreeSans 3200 90 0 0 vdda2 port 25 nsew -flabel metal3 41737 827699 42193 832479 0 FreeSans 3200 90 0 0 vssa2 +flabel metal3 41737 827699 42197 832479 0 FreeSans 3200 90 0 0 vssa2 port 27 nsew -flabel metal3 41737 869899 42193 874679 0 FreeSans 3200 90 0 0 vddio +flabel metal3 41737 869899 42197 874679 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 333499 995407 338279 995863 0 FreeSans 3200 0 0 0 vssio +flabel metal3 333499 995403 338279 995863 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 343478 995407 348258 995863 0 FreeSans 3200 0 0 0 vssio +flabel metal3 343478 995403 348258 995863 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 s 575699 995407 580479 995863 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 575699 995403 580479 995863 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 s 585678 995407 590458 995863 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 585678 995403 590458 995863 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 s 675407 425721 675863 430501 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 675403 425721 675863 430501 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 s 675407 513921 675863 518701 0 FreeSans 3200 0 0 0 vdda1 +flabel metal3 s 675403 513921 675863 518701 0 FreeSans 3200 0 0 0 vdda1 port 24 nsew -flabel metal3 s 675407 828521 675863 833301 0 FreeSans 3200 0 0 0 vdda1 +flabel metal3 s 675403 828521 675863 833301 0 FreeSans 3200 0 0 0 vdda1 port 24 nsew flabel metal2 s 648115 41737 648167 42193 0 FreeSans 400 90 0 0 mask_rev[4] port 65 nsew @@ -8724,39 +8724,39 @@ flabel metal2 s 647443 41737 647495 42193 0 FreeSans 400 90 0 0 mask_rev[1] port 68 nsew flabel metal5 s 698512 952840 711002 965360 0 FreeSans 16000 0 0 0 gpio[14] port 99 nsew -flabel metal3 675407 881144 675863 881206 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] +flabel metal3 675403 881144 675863 881206 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] port 804 nsew -flabel metal3 675407 971144 675863 971206 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] +flabel metal3 675403 971144 675863 971206 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] port 803 nsew -flabel metal3 41737 776781 42193 776841 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] +flabel metal3 41737 776781 42197 776841 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] port 792 nsew -flabel metal3 41737 690781 42193 690841 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] +flabel metal3 41737 690781 42197 690841 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] port 790 nsew -flabel metal3 41737 604781 42193 604841 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] +flabel metal3 41737 604781 42197 604841 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] port 788 nsew -flabel metal3 41737 518781 42193 518841 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] +flabel metal3 41737 518781 42197 518841 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] port 786 nsew -flabel metal3 41737 346781 42193 346841 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] +flabel metal3 41737 346781 42197 346841 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] port 784 nsew -flabel metal3 41737 260781 42193 260841 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] +flabel metal3 41737 260781 42197 260841 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] port 782 nsew -flabel metal3 41737 174781 42193 174841 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] +flabel metal3 41737 174781 42197 174841 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] port 780 nsew -flabel metal3 41737 946781 42193 946841 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] +flabel metal3 41737 946781 42197 946841 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] port 793 nsew -flabel metal3 41737 733781 42193 733841 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] +flabel metal3 41737 733781 42197 733841 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] port 791 nsew -flabel metal3 41737 647781 42193 647841 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] +flabel metal3 41737 647781 42197 647841 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] port 789 nsew -flabel metal3 41737 561781 42193 561841 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] +flabel metal3 41737 561781 42197 561841 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] port 787 nsew -flabel metal3 41737 389781 42193 389841 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] +flabel metal3 41737 389781 42197 389841 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] port 785 nsew -flabel metal3 41737 303781 42193 303841 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] +flabel metal3 41737 303781 42197 303841 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] port 783 nsew -flabel metal3 41737 217781 42193 217841 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] +flabel metal3 41737 217781 42197 217841 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] port 781 nsew -flabel metal3 s 41737 194097 42193 194225 0 FreeSans 400 0 0 0 analog_io[37] +flabel metal3 s 41737 194097 42197 194225 0 FreeSans 400 0 0 0 analog_io[37] port 868 nsew flabel metal2 s 298375 41737 298503 42193 0 FreeSans 400 90 0 0 analog_io[39] port 866 nsew @@ -8764,983 +8764,983 @@ flabel metal2 192847 41737 192903 42193 0 FreeSans 400 270 0 0 gpio_dm0[38] port 559 nsew flabel metal2 191007 41737 191063 42193 0 FreeSans 400 270 0 0 gpio_dm1[38] port 603 nsew -flabel metal3 88921 41737 93701 42193 0 FreeSans 3200 0 0 0 vssa +flabel metal3 88921 41737 93701 42197 0 FreeSans 3200 0 0 0 vssa port 23 nsew -flabel metal3 s 41737 535814 42193 536028 0 FreeSans 400 0 0 0 analog_noesd_io[31] +flabel metal3 s 41737 535814 42197 536028 0 FreeSans 400 0 0 0 analog_noesd_io[31] port 918 nsew -flabel metal3 s 41737 665414 42193 665628 0 FreeSans 400 0 0 0 analog_noesd_io[28] +flabel metal3 s 41737 665414 42197 665628 0 FreeSans 400 0 0 0 analog_noesd_io[28] port 921 nsew -flabel metal3 s 41737 753697 42193 753825 0 FreeSans 400 0 0 0 analog_io[26] +flabel metal3 s 41737 753697 42197 753825 0 FreeSans 400 0 0 0 analog_io[26] port 879 nsew -flabel metal3 675407 240572 675863 240786 0 FreeSans 400 0 0 0 analog_noesd_io[3] +flabel metal3 675403 240572 675863 240786 0 FreeSans 400 0 0 0 analog_noesd_io[3] port 946 nsew -flabel metal3 s 675407 100921 675863 100991 0 FreeSans 400 0 0 0 gpio_in[0] +flabel metal3 s 675403 100921 675863 100991 0 FreeSans 400 0 0 0 gpio_in[0] port 729 nsew -flabel metal3 s 675407 102761 675863 102831 0 FreeSans 400 0 0 0 gpio_slow_sel[0] +flabel metal3 s 675403 102761 675863 102831 0 FreeSans 400 0 0 0 gpio_slow_sel[0] port 377 nsew -flabel metal3 s 675407 104601 675863 104671 0 FreeSans 400 0 0 0 gpio_dm1[0] +flabel metal3 s 675403 104601 675863 104671 0 FreeSans 400 0 0 0 gpio_dm1[0] port 641 nsew -flabel metal3 s 675407 105797 675863 105867 0 FreeSans 400 0 0 0 gpio_analog_en[0] +flabel metal3 s 675403 105797 675863 105867 0 FreeSans 400 0 0 0 gpio_analog_en[0] port 465 nsew -flabel metal3 s 675407 107085 675863 107155 0 FreeSans 400 0 0 0 gpio_analog_pol[0] +flabel metal3 s 675403 107085 675863 107155 0 FreeSans 400 0 0 0 gpio_analog_pol[0] port 553 nsew -flabel metal3 s 675407 110121 675863 110191 0 FreeSans 400 0 0 0 gpio_analog_sel[0] +flabel metal3 s 675403 110121 675863 110191 0 FreeSans 400 0 0 0 gpio_analog_sel[0] port 509 nsew -flabel metal3 s 675407 106441 675863 106511 0 FreeSans 400 0 0 0 gpio_dm0[0] +flabel metal3 s 675403 106441 675863 106511 0 FreeSans 400 0 0 0 gpio_dm0[0] port 597 nsew -flabel metal3 s 675407 110765 675863 110835 0 FreeSans 400 0 0 0 gpio_dm2[0] +flabel metal3 s 675403 110765 675863 110835 0 FreeSans 400 0 0 0 gpio_dm2[0] port 685 nsew -flabel metal3 s 675407 111409 675863 111479 0 FreeSans 400 0 0 0 gpio_holdover[0] +flabel metal3 s 675403 111409 675863 111479 0 FreeSans 400 0 0 0 gpio_holdover[0] port 421 nsew -flabel metal3 s 675407 107637 675863 107707 0 FreeSans 400 0 0 0 gpio_inp_dis[0] +flabel metal3 s 675403 107637 675863 107707 0 FreeSans 400 0 0 0 gpio_inp_dis[0] port 245 nsew -flabel metal3 s 675407 115089 675863 115159 0 FreeSans 400 0 0 0 gpio_oeb[0] +flabel metal3 s 675403 115089 675863 115159 0 FreeSans 400 0 0 0 gpio_oeb[0] port 201 nsew -flabel metal3 s 675407 111961 675863 112031 0 FreeSans 400 0 0 0 gpio_out[0] +flabel metal3 s 675403 111961 675863 112031 0 FreeSans 400 0 0 0 gpio_out[0] port 157 nsew -flabel metal3 675407 115641 675863 115711 0 FreeSans 400 0 0 0 gpio_in_h[0] +flabel metal3 675403 115641 675863 115711 0 FreeSans 400 0 0 0 gpio_in_h[0] port 773 nsew -flabel metal3 s 675407 114445 675863 114515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] +flabel metal3 s 675403 114445 675863 114515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] port 289 nsew -flabel metal3 s 675407 113801 675863 113871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] +flabel metal3 s 675403 113801 675863 113871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] port 333 nsew -flabel metal3 675407 120143 675863 120205 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] +flabel metal3 675403 120143 675863 120205 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] port 817 nsew -flabel metal3 s 675407 967241 675863 967311 0 FreeSans 400 0 0 0 gpio_in_h[14] +flabel metal3 s 675403 967241 675863 967311 0 FreeSans 400 0 0 0 gpio_in_h[14] port 759 nsew -flabel metal3 s 675407 965401 675863 965471 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] +flabel metal3 s 675403 965401 675863 965471 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] port 319 nsew -flabel metal3 s 675407 963561 675863 963631 0 FreeSans 400 0 0 0 gpio_out[14] +flabel metal3 s 675403 963561 675863 963631 0 FreeSans 400 0 0 0 gpio_out[14] port 143 nsew -flabel metal3 s 675407 966689 675863 966759 0 FreeSans 400 0 0 0 gpio_oeb[14] +flabel metal3 s 675403 966689 675863 966759 0 FreeSans 400 0 0 0 gpio_oeb[14] port 187 nsew -flabel metal3 s 675407 959237 675863 959307 0 FreeSans 400 0 0 0 gpio_inp_dis[14] +flabel metal3 s 675403 959237 675863 959307 0 FreeSans 400 0 0 0 gpio_inp_dis[14] port 231 nsew -flabel metal3 s 675407 966045 675863 966115 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] +flabel metal3 s 675403 966045 675863 966115 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] port 275 nsew -flabel metal3 s 675407 963009 675863 963079 0 FreeSans 400 0 0 0 gpio_holdover[14] +flabel metal3 s 675403 963009 675863 963079 0 FreeSans 400 0 0 0 gpio_holdover[14] port 407 nsew -flabel metal3 s 675407 962365 675863 962435 0 FreeSans 400 0 0 0 gpio_dm2[14] +flabel metal3 s 675403 962365 675863 962435 0 FreeSans 400 0 0 0 gpio_dm2[14] port 671 nsew -flabel metal3 s 675407 958041 675863 958111 0 FreeSans 400 0 0 0 gpio_dm0[14] +flabel metal3 s 675403 958041 675863 958111 0 FreeSans 400 0 0 0 gpio_dm0[14] port 583 nsew -flabel metal3 s 675407 961721 675863 961791 0 FreeSans 400 0 0 0 gpio_analog_sel[14] +flabel metal3 s 675403 961721 675863 961791 0 FreeSans 400 0 0 0 gpio_analog_sel[14] port 495 nsew -flabel metal3 s 675407 958685 675863 958755 0 FreeSans 400 0 0 0 gpio_analog_pol[14] +flabel metal3 s 675403 958685 675863 958755 0 FreeSans 400 0 0 0 gpio_analog_pol[14] port 539 nsew -flabel metal3 s 675407 957397 675863 957467 0 FreeSans 400 0 0 0 gpio_analog_en[14] +flabel metal3 s 675403 957397 675863 957467 0 FreeSans 400 0 0 0 gpio_analog_en[14] port 451 nsew -flabel metal3 s 675407 956201 675863 956271 0 FreeSans 400 0 0 0 gpio_dm1[14] +flabel metal3 s 675403 956201 675863 956271 0 FreeSans 400 0 0 0 gpio_dm1[14] port 627 nsew -flabel metal3 s 675407 952521 675863 952591 0 FreeSans 400 0 0 0 gpio_in[14] +flabel metal3 s 675403 952521 675863 952591 0 FreeSans 400 0 0 0 gpio_in[14] port 715 nsew -flabel metal3 s 675407 954361 675863 954431 0 FreeSans 400 0 0 0 gpio_slow_sel[14] +flabel metal3 s 675403 954361 675863 954431 0 FreeSans 400 0 0 0 gpio_slow_sel[14] port 363 nsew -flabel metal3 s 675407 878041 675863 878111 0 FreeSans 400 0 0 0 gpio_in_h[13] +flabel metal3 s 675403 878041 675863 878111 0 FreeSans 400 0 0 0 gpio_in_h[13] port 760 nsew -flabel metal3 s 675407 876201 675863 876271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] +flabel metal3 s 675403 876201 675863 876271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] port 320 nsew -flabel metal3 s 675407 874361 675863 874431 0 FreeSans 400 0 0 0 gpio_out[13] +flabel metal3 s 675403 874361 675863 874431 0 FreeSans 400 0 0 0 gpio_out[13] port 144 nsew -flabel metal3 s 675407 877489 675863 877559 0 FreeSans 400 0 0 0 gpio_oeb[13] +flabel metal3 s 675403 877489 675863 877559 0 FreeSans 400 0 0 0 gpio_oeb[13] port 188 nsew -flabel metal3 s 675407 870037 675863 870107 0 FreeSans 400 0 0 0 gpio_inp_dis[13] +flabel metal3 s 675403 870037 675863 870107 0 FreeSans 400 0 0 0 gpio_inp_dis[13] port 232 nsew -flabel metal3 s 675407 876845 675863 876915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] +flabel metal3 s 675403 876845 675863 876915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] port 276 nsew -flabel metal3 s 675407 873809 675863 873879 0 FreeSans 400 0 0 0 gpio_holdover[13] +flabel metal3 s 675403 873809 675863 873879 0 FreeSans 400 0 0 0 gpio_holdover[13] port 408 nsew -flabel metal3 s 675407 873165 675863 873235 0 FreeSans 400 0 0 0 gpio_dm2[13] +flabel metal3 s 675403 873165 675863 873235 0 FreeSans 400 0 0 0 gpio_dm2[13] port 672 nsew -flabel metal3 s 675407 868841 675863 868911 0 FreeSans 400 0 0 0 gpio_dm0[13] +flabel metal3 s 675403 868841 675863 868911 0 FreeSans 400 0 0 0 gpio_dm0[13] port 584 nsew -flabel metal3 s 675407 872521 675863 872591 0 FreeSans 400 0 0 0 gpio_analog_sel[13] +flabel metal3 s 675403 872521 675863 872591 0 FreeSans 400 0 0 0 gpio_analog_sel[13] port 496 nsew -flabel metal3 s 675407 869485 675863 869555 0 FreeSans 400 0 0 0 gpio_analog_pol[13] +flabel metal3 s 675403 869485 675863 869555 0 FreeSans 400 0 0 0 gpio_analog_pol[13] port 540 nsew -flabel metal3 s 675407 868197 675863 868267 0 FreeSans 400 0 0 0 gpio_analog_en[13] +flabel metal3 s 675403 868197 675863 868267 0 FreeSans 400 0 0 0 gpio_analog_en[13] port 452 nsew -flabel metal3 s 675407 867001 675863 867071 0 FreeSans 400 0 0 0 gpio_dm1[13] +flabel metal3 s 675403 867001 675863 867071 0 FreeSans 400 0 0 0 gpio_dm1[13] port 628 nsew -flabel metal3 s 675407 863321 675863 863391 0 FreeSans 400 0 0 0 gpio_in[13] +flabel metal3 s 675403 863321 675863 863391 0 FreeSans 400 0 0 0 gpio_in[13] port 716 nsew -flabel metal3 s 675407 865161 675863 865231 0 FreeSans 400 0 0 0 gpio_slow_sel[13] +flabel metal3 s 675403 865161 675863 865231 0 FreeSans 400 0 0 0 gpio_slow_sel[13] port 364 nsew -flabel metal3 s 675407 788841 675863 788911 0 FreeSans 400 0 0 0 gpio_in_h[12] +flabel metal3 s 675403 788841 675863 788911 0 FreeSans 400 0 0 0 gpio_in_h[12] port 761 nsew -flabel metal3 s 675407 787001 675863 787071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] +flabel metal3 s 675403 787001 675863 787071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] port 321 nsew -flabel metal3 s 675407 785161 675863 785231 0 FreeSans 400 0 0 0 gpio_out[12] +flabel metal3 s 675403 785161 675863 785231 0 FreeSans 400 0 0 0 gpio_out[12] port 145 nsew -flabel metal3 s 675407 788289 675863 788359 0 FreeSans 400 0 0 0 gpio_oeb[12] +flabel metal3 s 675403 788289 675863 788359 0 FreeSans 400 0 0 0 gpio_oeb[12] port 189 nsew -flabel metal3 s 675407 780837 675863 780907 0 FreeSans 400 0 0 0 gpio_inp_dis[12] +flabel metal3 s 675403 780837 675863 780907 0 FreeSans 400 0 0 0 gpio_inp_dis[12] port 233 nsew -flabel metal3 s 675407 787645 675863 787715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] +flabel metal3 s 675403 787645 675863 787715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] port 277 nsew -flabel metal3 s 675407 784609 675863 784679 0 FreeSans 400 0 0 0 gpio_holdover[12] +flabel metal3 s 675403 784609 675863 784679 0 FreeSans 400 0 0 0 gpio_holdover[12] port 409 nsew -flabel metal3 s 675407 783965 675863 784035 0 FreeSans 400 0 0 0 gpio_dm2[12] +flabel metal3 s 675403 783965 675863 784035 0 FreeSans 400 0 0 0 gpio_dm2[12] port 673 nsew -flabel metal3 s 675407 779641 675863 779711 0 FreeSans 400 0 0 0 gpio_dm0[12] +flabel metal3 s 675403 779641 675863 779711 0 FreeSans 400 0 0 0 gpio_dm0[12] port 585 nsew -flabel metal3 s 675407 783321 675863 783391 0 FreeSans 400 0 0 0 gpio_analog_sel[12] +flabel metal3 s 675403 783321 675863 783391 0 FreeSans 400 0 0 0 gpio_analog_sel[12] port 497 nsew -flabel metal3 s 675407 780285 675863 780355 0 FreeSans 400 0 0 0 gpio_analog_pol[12] +flabel metal3 s 675403 780285 675863 780355 0 FreeSans 400 0 0 0 gpio_analog_pol[12] port 541 nsew -flabel metal3 s 675407 778997 675863 779067 0 FreeSans 400 0 0 0 gpio_analog_en[12] +flabel metal3 s 675403 778997 675863 779067 0 FreeSans 400 0 0 0 gpio_analog_en[12] port 453 nsew -flabel metal3 s 675407 777801 675863 777871 0 FreeSans 400 0 0 0 gpio_dm1[12] +flabel metal3 s 675403 777801 675863 777871 0 FreeSans 400 0 0 0 gpio_dm1[12] port 629 nsew -flabel metal3 s 675407 774121 675863 774191 0 FreeSans 400 0 0 0 gpio_in[12] +flabel metal3 s 675403 774121 675863 774191 0 FreeSans 400 0 0 0 gpio_in[12] port 717 nsew -flabel metal3 s 675407 775961 675863 776031 0 FreeSans 400 0 0 0 gpio_slow_sel[12] +flabel metal3 s 675403 775961 675863 776031 0 FreeSans 400 0 0 0 gpio_slow_sel[12] port 365 nsew -flabel metal3 s 675407 743841 675863 743911 0 FreeSans 400 0 0 0 gpio_in_h[11] +flabel metal3 s 675403 743841 675863 743911 0 FreeSans 400 0 0 0 gpio_in_h[11] port 762 nsew -flabel metal3 s 675407 738965 675863 739035 0 FreeSans 400 0 0 0 gpio_dm2[11] +flabel metal3 s 675403 738965 675863 739035 0 FreeSans 400 0 0 0 gpio_dm2[11] port 674 nsew -flabel metal3 s 675407 734641 675863 734711 0 FreeSans 400 0 0 0 gpio_dm0[11] +flabel metal3 s 675403 734641 675863 734711 0 FreeSans 400 0 0 0 gpio_dm0[11] port 586 nsew -flabel metal3 s 675407 738321 675863 738391 0 FreeSans 400 0 0 0 gpio_analog_sel[11] +flabel metal3 s 675403 738321 675863 738391 0 FreeSans 400 0 0 0 gpio_analog_sel[11] port 498 nsew -flabel metal3 s 675407 735285 675863 735355 0 FreeSans 400 0 0 0 gpio_analog_pol[11] +flabel metal3 s 675403 735285 675863 735355 0 FreeSans 400 0 0 0 gpio_analog_pol[11] port 542 nsew -flabel metal3 s 675407 733997 675863 734067 0 FreeSans 400 0 0 0 gpio_analog_en[11] +flabel metal3 s 675403 733997 675863 734067 0 FreeSans 400 0 0 0 gpio_analog_en[11] port 454 nsew -flabel metal3 s 675407 742001 675863 742071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] +flabel metal3 s 675403 742001 675863 742071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] port 322 nsew -flabel metal3 s 675407 740161 675863 740231 0 FreeSans 400 0 0 0 gpio_out[11] +flabel metal3 s 675403 740161 675863 740231 0 FreeSans 400 0 0 0 gpio_out[11] port 146 nsew -flabel metal3 s 675407 743289 675863 743359 0 FreeSans 400 0 0 0 gpio_oeb[11] +flabel metal3 s 675403 743289 675863 743359 0 FreeSans 400 0 0 0 gpio_oeb[11] port 190 nsew -flabel metal3 s 675407 735837 675863 735907 0 FreeSans 400 0 0 0 gpio_inp_dis[11] +flabel metal3 s 675403 735837 675863 735907 0 FreeSans 400 0 0 0 gpio_inp_dis[11] port 234 nsew -flabel metal3 s 675407 742645 675863 742715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] +flabel metal3 s 675403 742645 675863 742715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] port 278 nsew -flabel metal3 s 675407 739609 675863 739679 0 FreeSans 400 0 0 0 gpio_holdover[11] +flabel metal3 s 675403 739609 675863 739679 0 FreeSans 400 0 0 0 gpio_holdover[11] port 410 nsew -flabel metal3 s 675407 732801 675863 732871 0 FreeSans 400 0 0 0 gpio_dm1[11] +flabel metal3 s 675403 732801 675863 732871 0 FreeSans 400 0 0 0 gpio_dm1[11] port 630 nsew -flabel metal3 s 675407 729121 675863 729191 0 FreeSans 400 0 0 0 gpio_in[11] +flabel metal3 s 675403 729121 675863 729191 0 FreeSans 400 0 0 0 gpio_in[11] port 718 nsew -flabel metal3 s 675407 730961 675863 731031 0 FreeSans 400 0 0 0 gpio_slow_sel[11] +flabel metal3 s 675403 730961 675863 731031 0 FreeSans 400 0 0 0 gpio_slow_sel[11] port 366 nsew -flabel metal3 s 675407 698841 675863 698911 0 FreeSans 400 0 0 0 gpio_in_h[10] +flabel metal3 s 675403 698841 675863 698911 0 FreeSans 400 0 0 0 gpio_in_h[10] port 763 nsew -flabel metal3 s 675407 697001 675863 697071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] +flabel metal3 s 675403 697001 675863 697071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] port 323 nsew -flabel metal3 s 675407 695161 675863 695231 0 FreeSans 400 0 0 0 gpio_out[10] +flabel metal3 s 675403 695161 675863 695231 0 FreeSans 400 0 0 0 gpio_out[10] port 147 nsew -flabel metal3 s 675407 698289 675863 698359 0 FreeSans 400 0 0 0 gpio_oeb[10] +flabel metal3 s 675403 698289 675863 698359 0 FreeSans 400 0 0 0 gpio_oeb[10] port 191 nsew -flabel metal3 s 675407 690837 675863 690907 0 FreeSans 400 0 0 0 gpio_inp_dis[10] +flabel metal3 s 675403 690837 675863 690907 0 FreeSans 400 0 0 0 gpio_inp_dis[10] port 235 nsew -flabel metal3 s 675407 697645 675863 697715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] +flabel metal3 s 675403 697645 675863 697715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] port 279 nsew -flabel metal3 s 675407 694609 675863 694679 0 FreeSans 400 0 0 0 gpio_holdover[10] +flabel metal3 s 675403 694609 675863 694679 0 FreeSans 400 0 0 0 gpio_holdover[10] port 411 nsew -flabel metal3 s 675407 693965 675863 694035 0 FreeSans 400 0 0 0 gpio_dm2[10] +flabel metal3 s 675403 693965 675863 694035 0 FreeSans 400 0 0 0 gpio_dm2[10] port 675 nsew -flabel metal3 s 675407 689641 675863 689711 0 FreeSans 400 0 0 0 gpio_dm0[10] +flabel metal3 s 675403 689641 675863 689711 0 FreeSans 400 0 0 0 gpio_dm0[10] port 587 nsew -flabel metal3 s 675407 693321 675863 693391 0 FreeSans 400 0 0 0 gpio_analog_sel[10] +flabel metal3 s 675403 693321 675863 693391 0 FreeSans 400 0 0 0 gpio_analog_sel[10] port 499 nsew -flabel metal3 s 675407 690285 675863 690355 0 FreeSans 400 0 0 0 gpio_analog_pol[10] +flabel metal3 s 675403 690285 675863 690355 0 FreeSans 400 0 0 0 gpio_analog_pol[10] port 543 nsew -flabel metal3 s 675407 688997 675863 689067 0 FreeSans 400 0 0 0 gpio_analog_en[10] +flabel metal3 s 675403 688997 675863 689067 0 FreeSans 400 0 0 0 gpio_analog_en[10] port 455 nsew -flabel metal3 s 675407 687801 675863 687871 0 FreeSans 400 0 0 0 gpio_dm1[10] +flabel metal3 s 675403 687801 675863 687871 0 FreeSans 400 0 0 0 gpio_dm1[10] port 631 nsew -flabel metal3 s 675407 684121 675863 684191 0 FreeSans 400 0 0 0 gpio_in[10] +flabel metal3 s 675403 684121 675863 684191 0 FreeSans 400 0 0 0 gpio_in[10] port 719 nsew -flabel metal3 s 675407 685961 675863 686031 0 FreeSans 400 0 0 0 gpio_slow_sel[10] +flabel metal3 s 675403 685961 675863 686031 0 FreeSans 400 0 0 0 gpio_slow_sel[10] port 367 nsew -flabel metal3 s 675407 653641 675863 653711 0 FreeSans 400 0 0 0 gpio_in_h[9] +flabel metal3 s 675403 653641 675863 653711 0 FreeSans 400 0 0 0 gpio_in_h[9] port 764 nsew -flabel metal3 s 675407 651801 675863 651871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] +flabel metal3 s 675403 651801 675863 651871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] port 324 nsew -flabel metal3 s 675407 649961 675863 650031 0 FreeSans 400 0 0 0 gpio_out[9] +flabel metal3 s 675403 649961 675863 650031 0 FreeSans 400 0 0 0 gpio_out[9] port 148 nsew -flabel metal3 s 675407 653089 675863 653159 0 FreeSans 400 0 0 0 gpio_oeb[9] +flabel metal3 s 675403 653089 675863 653159 0 FreeSans 400 0 0 0 gpio_oeb[9] port 192 nsew -flabel metal3 s 675407 645637 675863 645707 0 FreeSans 400 0 0 0 gpio_inp_dis[9] +flabel metal3 s 675403 645637 675863 645707 0 FreeSans 400 0 0 0 gpio_inp_dis[9] port 236 nsew -flabel metal3 s 675407 652445 675863 652515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] +flabel metal3 s 675403 652445 675863 652515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] port 280 nsew -flabel metal3 s 675407 649409 675863 649479 0 FreeSans 400 0 0 0 gpio_holdover[9] +flabel metal3 s 675403 649409 675863 649479 0 FreeSans 400 0 0 0 gpio_holdover[9] port 412 nsew -flabel metal3 s 675407 648765 675863 648835 0 FreeSans 400 0 0 0 gpio_dm2[9] +flabel metal3 s 675403 648765 675863 648835 0 FreeSans 400 0 0 0 gpio_dm2[9] port 676 nsew -flabel metal3 s 675407 644441 675863 644511 0 FreeSans 400 0 0 0 gpio_dm0[9] +flabel metal3 s 675403 644441 675863 644511 0 FreeSans 400 0 0 0 gpio_dm0[9] port 588 nsew -flabel metal3 s 675407 648121 675863 648191 0 FreeSans 400 0 0 0 gpio_analog_sel[9] +flabel metal3 s 675403 648121 675863 648191 0 FreeSans 400 0 0 0 gpio_analog_sel[9] port 500 nsew -flabel metal3 s 675407 645085 675863 645155 0 FreeSans 400 0 0 0 gpio_analog_pol[9] +flabel metal3 s 675403 645085 675863 645155 0 FreeSans 400 0 0 0 gpio_analog_pol[9] port 544 nsew -flabel metal3 s 675407 643797 675863 643867 0 FreeSans 400 0 0 0 gpio_analog_en[9] +flabel metal3 s 675403 643797 675863 643867 0 FreeSans 400 0 0 0 gpio_analog_en[9] port 456 nsew -flabel metal3 s 675407 642601 675863 642671 0 FreeSans 400 0 0 0 gpio_dm1[9] +flabel metal3 s 675403 642601 675863 642671 0 FreeSans 400 0 0 0 gpio_dm1[9] port 632 nsew -flabel metal3 s 675407 638921 675863 638991 0 FreeSans 400 0 0 0 gpio_in[9] +flabel metal3 s 675403 638921 675863 638991 0 FreeSans 400 0 0 0 gpio_in[9] port 720 nsew -flabel metal3 s 675407 640761 675863 640831 0 FreeSans 400 0 0 0 gpio_slow_sel[9] +flabel metal3 s 675403 640761 675863 640831 0 FreeSans 400 0 0 0 gpio_slow_sel[9] port 368 nsew -flabel metal3 s 675407 608641 675863 608711 0 FreeSans 400 0 0 0 gpio_in_h[8] +flabel metal3 s 675403 608641 675863 608711 0 FreeSans 400 0 0 0 gpio_in_h[8] port 765 nsew -flabel metal3 s 675407 606801 675863 606871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] +flabel metal3 s 675403 606801 675863 606871 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] port 325 nsew -flabel metal3 s 675407 604961 675863 605031 0 FreeSans 400 0 0 0 gpio_out[8] +flabel metal3 s 675403 604961 675863 605031 0 FreeSans 400 0 0 0 gpio_out[8] port 149 nsew -flabel metal3 s 675407 608089 675863 608159 0 FreeSans 400 0 0 0 gpio_oeb[8] +flabel metal3 s 675403 608089 675863 608159 0 FreeSans 400 0 0 0 gpio_oeb[8] port 193 nsew -flabel metal3 s 675407 600637 675863 600707 0 FreeSans 400 0 0 0 gpio_inp_dis[8] +flabel metal3 s 675403 600637 675863 600707 0 FreeSans 400 0 0 0 gpio_inp_dis[8] port 237 nsew -flabel metal3 s 675407 607445 675863 607515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] +flabel metal3 s 675403 607445 675863 607515 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] port 281 nsew -flabel metal3 s 675407 604409 675863 604479 0 FreeSans 400 0 0 0 gpio_holdover[8] +flabel metal3 s 675403 604409 675863 604479 0 FreeSans 400 0 0 0 gpio_holdover[8] port 413 nsew -flabel metal3 s 675407 603765 675863 603835 0 FreeSans 400 0 0 0 gpio_dm2[8] +flabel metal3 s 675403 603765 675863 603835 0 FreeSans 400 0 0 0 gpio_dm2[8] port 677 nsew -flabel metal3 s 675407 599441 675863 599511 0 FreeSans 400 0 0 0 gpio_dm0[8] +flabel metal3 s 675403 599441 675863 599511 0 FreeSans 400 0 0 0 gpio_dm0[8] port 589 nsew -flabel metal3 s 675407 603121 675863 603191 0 FreeSans 400 0 0 0 gpio_analog_sel[8] +flabel metal3 s 675403 603121 675863 603191 0 FreeSans 400 0 0 0 gpio_analog_sel[8] port 501 nsew -flabel metal3 s 675407 600085 675863 600155 0 FreeSans 400 0 0 0 gpio_analog_pol[8] +flabel metal3 s 675403 600085 675863 600155 0 FreeSans 400 0 0 0 gpio_analog_pol[8] port 545 nsew -flabel metal3 s 675407 598797 675863 598867 0 FreeSans 400 0 0 0 gpio_analog_en[8] +flabel metal3 s 675403 598797 675863 598867 0 FreeSans 400 0 0 0 gpio_analog_en[8] port 457 nsew -flabel metal3 s 675407 597601 675863 597671 0 FreeSans 400 0 0 0 gpio_dm1[8] +flabel metal3 s 675403 597601 675863 597671 0 FreeSans 400 0 0 0 gpio_dm1[8] port 633 nsew -flabel metal3 s 675407 593921 675863 593991 0 FreeSans 400 0 0 0 gpio_in[8] +flabel metal3 s 675403 593921 675863 593991 0 FreeSans 400 0 0 0 gpio_in[8] port 721 nsew -flabel metal3 s 675407 595761 675863 595831 0 FreeSans 400 0 0 0 gpio_slow_sel[8] +flabel metal3 s 675403 595761 675863 595831 0 FreeSans 400 0 0 0 gpio_slow_sel[8] port 369 nsew -flabel metal3 s 675407 563441 675863 563511 0 FreeSans 400 0 0 0 gpio_in_h[7] +flabel metal3 s 675403 563441 675863 563511 0 FreeSans 400 0 0 0 gpio_in_h[7] port 766 nsew -flabel metal3 s 675407 561601 675863 561671 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] +flabel metal3 s 675403 561601 675863 561671 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] port 326 nsew -flabel metal3 s 675407 559761 675863 559831 0 FreeSans 400 0 0 0 gpio_out[7] +flabel metal3 s 675403 559761 675863 559831 0 FreeSans 400 0 0 0 gpio_out[7] port 150 nsew -flabel metal3 s 675407 562889 675863 562959 0 FreeSans 400 0 0 0 gpio_oeb[7] +flabel metal3 s 675403 562889 675863 562959 0 FreeSans 400 0 0 0 gpio_oeb[7] port 194 nsew -flabel metal3 s 675407 555437 675863 555507 0 FreeSans 400 0 0 0 gpio_inp_dis[7] +flabel metal3 s 675403 555437 675863 555507 0 FreeSans 400 0 0 0 gpio_inp_dis[7] port 238 nsew -flabel metal3 s 675407 562245 675863 562315 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] +flabel metal3 s 675403 562245 675863 562315 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] port 282 nsew -flabel metal3 s 675407 559209 675863 559279 0 FreeSans 400 0 0 0 gpio_holdover[7] +flabel metal3 s 675403 559209 675863 559279 0 FreeSans 400 0 0 0 gpio_holdover[7] port 414 nsew -flabel metal3 s 675407 558565 675863 558635 0 FreeSans 400 0 0 0 gpio_dm2[7] +flabel metal3 s 675403 558565 675863 558635 0 FreeSans 400 0 0 0 gpio_dm2[7] port 678 nsew -flabel metal3 s 675407 554241 675863 554311 0 FreeSans 400 0 0 0 gpio_dm0[7] +flabel metal3 s 675403 554241 675863 554311 0 FreeSans 400 0 0 0 gpio_dm0[7] port 590 nsew -flabel metal3 s 675407 557921 675863 557991 0 FreeSans 400 0 0 0 gpio_analog_sel[7] +flabel metal3 s 675403 557921 675863 557991 0 FreeSans 400 0 0 0 gpio_analog_sel[7] port 502 nsew -flabel metal3 s 675407 554885 675863 554955 0 FreeSans 400 0 0 0 gpio_analog_pol[7] +flabel metal3 s 675403 554885 675863 554955 0 FreeSans 400 0 0 0 gpio_analog_pol[7] port 546 nsew -flabel metal3 s 675407 553597 675863 553667 0 FreeSans 400 0 0 0 gpio_analog_en[7] +flabel metal3 s 675403 553597 675863 553667 0 FreeSans 400 0 0 0 gpio_analog_en[7] port 458 nsew -flabel metal3 s 675407 552401 675863 552471 0 FreeSans 400 0 0 0 gpio_dm1[7] +flabel metal3 s 675403 552401 675863 552471 0 FreeSans 400 0 0 0 gpio_dm1[7] port 634 nsew -flabel metal3 s 675407 548721 675863 548791 0 FreeSans 400 0 0 0 gpio_in[7] +flabel metal3 s 675403 548721 675863 548791 0 FreeSans 400 0 0 0 gpio_in[7] port 722 nsew -flabel metal3 s 675407 550561 675863 550631 0 FreeSans 400 0 0 0 gpio_slow_sel[7] +flabel metal3 s 675403 550561 675863 550631 0 FreeSans 400 0 0 0 gpio_slow_sel[7] port 370 nsew -flabel metal3 675407 386241 675863 386311 0 FreeSans 400 0 0 0 gpio_in_h[6] +flabel metal3 675403 386241 675863 386311 0 FreeSans 400 0 0 0 gpio_in_h[6] port 767 nsew -flabel metal3 s 675407 384401 675863 384471 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] +flabel metal3 s 675403 384401 675863 384471 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] port 327 nsew -flabel metal3 s 675407 382561 675863 382631 0 FreeSans 400 0 0 0 gpio_out[6] +flabel metal3 s 675403 382561 675863 382631 0 FreeSans 400 0 0 0 gpio_out[6] port 151 nsew -flabel metal3 s 675407 385689 675863 385759 0 FreeSans 400 0 0 0 gpio_oeb[6] +flabel metal3 s 675403 385689 675863 385759 0 FreeSans 400 0 0 0 gpio_oeb[6] port 195 nsew -flabel metal3 s 675407 378237 675863 378307 0 FreeSans 400 0 0 0 gpio_inp_dis[6] +flabel metal3 s 675403 378237 675863 378307 0 FreeSans 400 0 0 0 gpio_inp_dis[6] port 239 nsew -flabel metal3 s 675407 385045 675863 385115 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] +flabel metal3 s 675403 385045 675863 385115 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] port 283 nsew -flabel metal3 s 675407 382009 675863 382079 0 FreeSans 400 0 0 0 gpio_holdover[6] +flabel metal3 s 675403 382009 675863 382079 0 FreeSans 400 0 0 0 gpio_holdover[6] port 415 nsew -flabel metal3 s 675407 381365 675863 381435 0 FreeSans 400 0 0 0 gpio_dm2[6] +flabel metal3 s 675403 381365 675863 381435 0 FreeSans 400 0 0 0 gpio_dm2[6] port 679 nsew -flabel metal3 s 675407 377041 675863 377111 0 FreeSans 400 0 0 0 gpio_dm0[6] +flabel metal3 s 675403 377041 675863 377111 0 FreeSans 400 0 0 0 gpio_dm0[6] port 591 nsew -flabel metal3 s 675407 380721 675863 380791 0 FreeSans 400 0 0 0 gpio_analog_sel[6] +flabel metal3 s 675403 380721 675863 380791 0 FreeSans 400 0 0 0 gpio_analog_sel[6] port 503 nsew -flabel metal3 s 675407 377685 675863 377755 0 FreeSans 400 0 0 0 gpio_analog_pol[6] +flabel metal3 s 675403 377685 675863 377755 0 FreeSans 400 0 0 0 gpio_analog_pol[6] port 547 nsew -flabel metal3 s 675407 376397 675863 376467 0 FreeSans 400 0 0 0 gpio_analog_en[6] +flabel metal3 s 675403 376397 675863 376467 0 FreeSans 400 0 0 0 gpio_analog_en[6] port 459 nsew -flabel metal3 s 675407 375201 675863 375271 0 FreeSans 400 0 0 0 gpio_dm1[6] +flabel metal3 s 675403 375201 675863 375271 0 FreeSans 400 0 0 0 gpio_dm1[6] port 635 nsew -flabel metal3 s 675407 371521 675863 371591 0 FreeSans 400 0 0 0 gpio_in[6] +flabel metal3 s 675403 371521 675863 371591 0 FreeSans 400 0 0 0 gpio_in[6] port 723 nsew -flabel metal3 s 675407 373361 675863 373431 0 FreeSans 400 0 0 0 gpio_slow_sel[6] +flabel metal3 s 675403 373361 675863 373431 0 FreeSans 400 0 0 0 gpio_slow_sel[6] port 371 nsew -flabel metal3 675407 341041 675863 341111 0 FreeSans 400 0 0 0 gpio_in_h[5] +flabel metal3 675403 341041 675863 341111 0 FreeSans 400 0 0 0 gpio_in_h[5] port 768 nsew -flabel metal3 s 675407 339201 675863 339271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] +flabel metal3 s 675403 339201 675863 339271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] port 328 nsew -flabel metal3 s 675407 337361 675863 337431 0 FreeSans 400 0 0 0 gpio_out[5] +flabel metal3 s 675403 337361 675863 337431 0 FreeSans 400 0 0 0 gpio_out[5] port 152 nsew -flabel metal3 s 675407 340489 675863 340559 0 FreeSans 400 0 0 0 gpio_oeb[5] +flabel metal3 s 675403 340489 675863 340559 0 FreeSans 400 0 0 0 gpio_oeb[5] port 196 nsew -flabel metal3 s 675407 333037 675863 333107 0 FreeSans 400 0 0 0 gpio_inp_dis[5] +flabel metal3 s 675403 333037 675863 333107 0 FreeSans 400 0 0 0 gpio_inp_dis[5] port 240 nsew -flabel metal3 s 675407 339845 675863 339915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] +flabel metal3 s 675403 339845 675863 339915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] port 284 nsew -flabel metal3 s 675407 336809 675863 336879 0 FreeSans 400 0 0 0 gpio_holdover[5] +flabel metal3 s 675403 336809 675863 336879 0 FreeSans 400 0 0 0 gpio_holdover[5] port 416 nsew -flabel metal3 s 675407 336165 675863 336235 0 FreeSans 400 0 0 0 gpio_dm2[5] +flabel metal3 s 675403 336165 675863 336235 0 FreeSans 400 0 0 0 gpio_dm2[5] port 680 nsew -flabel metal3 s 675407 331841 675863 331911 0 FreeSans 400 0 0 0 gpio_dm0[5] +flabel metal3 s 675403 331841 675863 331911 0 FreeSans 400 0 0 0 gpio_dm0[5] port 592 nsew -flabel metal3 s 675407 335521 675863 335591 0 FreeSans 400 0 0 0 gpio_analog_sel[5] +flabel metal3 s 675403 335521 675863 335591 0 FreeSans 400 0 0 0 gpio_analog_sel[5] port 504 nsew -flabel metal3 s 675407 332485 675863 332555 0 FreeSans 400 0 0 0 gpio_analog_pol[5] +flabel metal3 s 675403 332485 675863 332555 0 FreeSans 400 0 0 0 gpio_analog_pol[5] port 548 nsew -flabel metal3 s 675407 331197 675863 331267 0 FreeSans 400 0 0 0 gpio_analog_en[5] +flabel metal3 s 675403 331197 675863 331267 0 FreeSans 400 0 0 0 gpio_analog_en[5] port 460 nsew -flabel metal3 s 675407 330001 675863 330071 0 FreeSans 400 0 0 0 gpio_dm1[5] +flabel metal3 s 675403 330001 675863 330071 0 FreeSans 400 0 0 0 gpio_dm1[5] port 636 nsew -flabel metal3 s 675407 326321 675863 326391 0 FreeSans 400 0 0 0 gpio_in[5] +flabel metal3 s 675403 326321 675863 326391 0 FreeSans 400 0 0 0 gpio_in[5] port 724 nsew -flabel metal3 s 675407 328161 675863 328231 0 FreeSans 400 0 0 0 gpio_slow_sel[5] +flabel metal3 s 675403 328161 675863 328231 0 FreeSans 400 0 0 0 gpio_slow_sel[5] port 372 nsew -flabel metal3 675407 296041 675863 296111 0 FreeSans 400 0 0 0 gpio_in_h[4] +flabel metal3 675403 296041 675863 296111 0 FreeSans 400 0 0 0 gpio_in_h[4] port 769 nsew -flabel metal3 s 675407 294201 675863 294271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] +flabel metal3 s 675403 294201 675863 294271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] port 329 nsew -flabel metal3 s 675407 292361 675863 292431 0 FreeSans 400 0 0 0 gpio_out[4] +flabel metal3 s 675403 292361 675863 292431 0 FreeSans 400 0 0 0 gpio_out[4] port 153 nsew -flabel metal3 s 675407 295489 675863 295559 0 FreeSans 400 0 0 0 gpio_oeb[4] +flabel metal3 s 675403 295489 675863 295559 0 FreeSans 400 0 0 0 gpio_oeb[4] port 197 nsew -flabel metal3 s 675407 288037 675863 288107 0 FreeSans 400 0 0 0 gpio_inp_dis[4] +flabel metal3 s 675403 288037 675863 288107 0 FreeSans 400 0 0 0 gpio_inp_dis[4] port 241 nsew -flabel metal3 s 675407 294845 675863 294915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] +flabel metal3 s 675403 294845 675863 294915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] port 285 nsew -flabel metal3 s 675407 291809 675863 291879 0 FreeSans 400 0 0 0 gpio_holdover[4] +flabel metal3 s 675403 291809 675863 291879 0 FreeSans 400 0 0 0 gpio_holdover[4] port 417 nsew -flabel metal3 s 675407 291165 675863 291235 0 FreeSans 400 0 0 0 gpio_dm2[4] +flabel metal3 s 675403 291165 675863 291235 0 FreeSans 400 0 0 0 gpio_dm2[4] port 681 nsew -flabel metal3 s 675407 286841 675863 286911 0 FreeSans 400 0 0 0 gpio_dm0[4] +flabel metal3 s 675403 286841 675863 286911 0 FreeSans 400 0 0 0 gpio_dm0[4] port 593 nsew -flabel metal3 s 675407 290521 675863 290591 0 FreeSans 400 0 0 0 gpio_analog_sel[4] +flabel metal3 s 675403 290521 675863 290591 0 FreeSans 400 0 0 0 gpio_analog_sel[4] port 505 nsew -flabel metal3 s 675407 287485 675863 287555 0 FreeSans 400 0 0 0 gpio_analog_pol[4] +flabel metal3 s 675403 287485 675863 287555 0 FreeSans 400 0 0 0 gpio_analog_pol[4] port 549 nsew -flabel metal3 s 675407 286197 675863 286267 0 FreeSans 400 0 0 0 gpio_analog_en[4] +flabel metal3 s 675403 286197 675863 286267 0 FreeSans 400 0 0 0 gpio_analog_en[4] port 461 nsew -flabel metal3 s 675407 285001 675863 285071 0 FreeSans 400 0 0 0 gpio_dm1[4] +flabel metal3 s 675403 285001 675863 285071 0 FreeSans 400 0 0 0 gpio_dm1[4] port 637 nsew -flabel metal3 s 675407 281321 675863 281391 0 FreeSans 400 0 0 0 gpio_in[4] +flabel metal3 s 675403 281321 675863 281391 0 FreeSans 400 0 0 0 gpio_in[4] port 725 nsew -flabel metal3 s 675407 283161 675863 283231 0 FreeSans 400 0 0 0 gpio_slow_sel[4] +flabel metal3 s 675403 283161 675863 283231 0 FreeSans 400 0 0 0 gpio_slow_sel[4] port 373 nsew -flabel metal3 675407 251041 675863 251111 0 FreeSans 400 0 0 0 gpio_in_h[3] +flabel metal3 675403 251041 675863 251111 0 FreeSans 400 0 0 0 gpio_in_h[3] port 770 nsew -flabel metal3 s 675407 249201 675863 249271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] +flabel metal3 s 675403 249201 675863 249271 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] port 330 nsew -flabel metal3 s 675407 247361 675863 247431 0 FreeSans 400 0 0 0 gpio_out[3] +flabel metal3 s 675403 247361 675863 247431 0 FreeSans 400 0 0 0 gpio_out[3] port 154 nsew -flabel metal3 s 675407 250489 675863 250559 0 FreeSans 400 0 0 0 gpio_oeb[3] +flabel metal3 s 675403 250489 675863 250559 0 FreeSans 400 0 0 0 gpio_oeb[3] port 198 nsew -flabel metal3 s 675407 243037 675863 243107 0 FreeSans 400 0 0 0 gpio_inp_dis[3] +flabel metal3 s 675403 243037 675863 243107 0 FreeSans 400 0 0 0 gpio_inp_dis[3] port 242 nsew -flabel metal3 s 675407 249845 675863 249915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] +flabel metal3 s 675403 249845 675863 249915 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] port 286 nsew -flabel metal3 s 675407 246809 675863 246879 0 FreeSans 400 0 0 0 gpio_holdover[3] +flabel metal3 s 675403 246809 675863 246879 0 FreeSans 400 0 0 0 gpio_holdover[3] port 418 nsew -flabel metal3 s 675407 241841 675863 241911 0 FreeSans 400 0 0 0 gpio_dm0[3] +flabel metal3 s 675403 241841 675863 241911 0 FreeSans 400 0 0 0 gpio_dm0[3] port 594 nsew -flabel metal3 s 675407 246165 675863 246235 0 FreeSans 400 0 0 0 gpio_dm2[3] +flabel metal3 s 675403 246165 675863 246235 0 FreeSans 400 0 0 0 gpio_dm2[3] port 682 nsew -flabel metal3 s 675407 245521 675863 245591 0 FreeSans 400 0 0 0 gpio_analog_sel[3] +flabel metal3 s 675403 245521 675863 245591 0 FreeSans 400 0 0 0 gpio_analog_sel[3] port 506 nsew -flabel metal3 s 675407 242485 675863 242555 0 FreeSans 400 0 0 0 gpio_analog_pol[3] +flabel metal3 s 675403 242485 675863 242555 0 FreeSans 400 0 0 0 gpio_analog_pol[3] port 550 nsew -flabel metal3 s 675407 241197 675863 241267 0 FreeSans 400 0 0 0 gpio_analog_en[3] +flabel metal3 s 675403 241197 675863 241267 0 FreeSans 400 0 0 0 gpio_analog_en[3] port 462 nsew -flabel metal3 s 675407 240001 675863 240071 0 FreeSans 400 0 0 0 gpio_dm1[3] +flabel metal3 s 675403 240001 675863 240071 0 FreeSans 400 0 0 0 gpio_dm1[3] port 638 nsew -flabel metal3 s 675407 236321 675863 236391 0 FreeSans 400 0 0 0 gpio_in[3] +flabel metal3 s 675403 236321 675863 236391 0 FreeSans 400 0 0 0 gpio_in[3] port 726 nsew -flabel metal3 s 675407 238161 675863 238231 0 FreeSans 400 0 0 0 gpio_slow_sel[3] +flabel metal3 s 675403 238161 675863 238231 0 FreeSans 400 0 0 0 gpio_slow_sel[3] port 374 nsew -flabel metal3 675407 205841 675863 205911 0 FreeSans 400 0 0 0 gpio_in_h[2] +flabel metal3 675403 205841 675863 205911 0 FreeSans 400 0 0 0 gpio_in_h[2] port 771 nsew -flabel metal3 s 675407 204001 675863 204071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] +flabel metal3 s 675403 204001 675863 204071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] port 331 nsew -flabel metal3 s 675407 202161 675863 202231 0 FreeSans 400 0 0 0 gpio_out[2] +flabel metal3 s 675403 202161 675863 202231 0 FreeSans 400 0 0 0 gpio_out[2] port 155 nsew -flabel metal3 s 675407 205289 675863 205359 0 FreeSans 400 0 0 0 gpio_oeb[2] +flabel metal3 s 675403 205289 675863 205359 0 FreeSans 400 0 0 0 gpio_oeb[2] port 199 nsew -flabel metal3 s 675407 197837 675863 197907 0 FreeSans 400 0 0 0 gpio_inp_dis[2] +flabel metal3 s 675403 197837 675863 197907 0 FreeSans 400 0 0 0 gpio_inp_dis[2] port 243 nsew -flabel metal3 s 675407 204645 675863 204715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] +flabel metal3 s 675403 204645 675863 204715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] port 287 nsew -flabel metal3 s 675407 201609 675863 201679 0 FreeSans 400 0 0 0 gpio_holdover[2] +flabel metal3 s 675403 201609 675863 201679 0 FreeSans 400 0 0 0 gpio_holdover[2] port 419 nsew -flabel metal3 s 675407 200965 675863 201035 0 FreeSans 400 0 0 0 gpio_dm2[2] +flabel metal3 s 675403 200965 675863 201035 0 FreeSans 400 0 0 0 gpio_dm2[2] port 683 nsew -flabel metal3 s 675407 196641 675863 196711 0 FreeSans 400 0 0 0 gpio_dm0[2] +flabel metal3 s 675403 196641 675863 196711 0 FreeSans 400 0 0 0 gpio_dm0[2] port 595 nsew -flabel metal3 s 675407 200321 675863 200391 0 FreeSans 400 0 0 0 gpio_analog_sel[2] +flabel metal3 s 675403 200321 675863 200391 0 FreeSans 400 0 0 0 gpio_analog_sel[2] port 507 nsew -flabel metal3 s 675407 197285 675863 197355 0 FreeSans 400 0 0 0 gpio_analog_pol[2] +flabel metal3 s 675403 197285 675863 197355 0 FreeSans 400 0 0 0 gpio_analog_pol[2] port 551 nsew -flabel metal3 s 675407 195997 675863 196067 0 FreeSans 400 0 0 0 gpio_analog_en[2] +flabel metal3 s 675403 195997 675863 196067 0 FreeSans 400 0 0 0 gpio_analog_en[2] port 463 nsew -flabel metal3 s 675407 194801 675863 194871 0 FreeSans 400 0 0 0 gpio_dm1[2] +flabel metal3 s 675403 194801 675863 194871 0 FreeSans 400 0 0 0 gpio_dm1[2] port 639 nsew -flabel metal3 s 675407 191121 675863 191191 0 FreeSans 400 0 0 0 gpio_in[2] +flabel metal3 s 675403 191121 675863 191191 0 FreeSans 400 0 0 0 gpio_in[2] port 727 nsew -flabel metal3 s 675407 192961 675863 193031 0 FreeSans 400 0 0 0 gpio_slow_sel[2] +flabel metal3 s 675403 192961 675863 193031 0 FreeSans 400 0 0 0 gpio_slow_sel[2] port 375 nsew -flabel metal3 675407 160841 675863 160911 0 FreeSans 400 0 0 0 gpio_in_h[1] +flabel metal3 675403 160841 675863 160911 0 FreeSans 400 0 0 0 gpio_in_h[1] port 772 nsew -flabel metal3 s 675407 159001 675863 159071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] +flabel metal3 s 675403 159001 675863 159071 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] port 332 nsew -flabel metal3 s 675407 157161 675863 157231 0 FreeSans 400 0 0 0 gpio_out[1] +flabel metal3 s 675403 157161 675863 157231 0 FreeSans 400 0 0 0 gpio_out[1] port 156 nsew -flabel metal3 s 675407 160289 675863 160359 0 FreeSans 400 0 0 0 gpio_oeb[1] +flabel metal3 s 675403 160289 675863 160359 0 FreeSans 400 0 0 0 gpio_oeb[1] port 200 nsew -flabel metal3 s 675407 152837 675863 152907 0 FreeSans 400 0 0 0 gpio_inp_dis[1] +flabel metal3 s 675403 152837 675863 152907 0 FreeSans 400 0 0 0 gpio_inp_dis[1] port 244 nsew -flabel metal3 s 675407 159645 675863 159715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] +flabel metal3 s 675403 159645 675863 159715 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] port 288 nsew -flabel metal3 s 675407 156609 675863 156679 0 FreeSans 400 0 0 0 gpio_holdover[1] +flabel metal3 s 675403 156609 675863 156679 0 FreeSans 400 0 0 0 gpio_holdover[1] port 420 nsew -flabel metal3 s 675407 155965 675863 156035 0 FreeSans 400 0 0 0 gpio_dm2[1] +flabel metal3 s 675403 155965 675863 156035 0 FreeSans 400 0 0 0 gpio_dm2[1] port 684 nsew -flabel metal3 s 675407 151641 675863 151711 0 FreeSans 400 0 0 0 gpio_dm0[1] +flabel metal3 s 675403 151641 675863 151711 0 FreeSans 400 0 0 0 gpio_dm0[1] port 596 nsew -flabel metal3 s 675407 155321 675863 155391 0 FreeSans 400 0 0 0 gpio_analog_sel[1] +flabel metal3 s 675403 155321 675863 155391 0 FreeSans 400 0 0 0 gpio_analog_sel[1] port 508 nsew -flabel metal3 s 675407 152285 675863 152355 0 FreeSans 400 0 0 0 gpio_analog_pol[1] +flabel metal3 s 675403 152285 675863 152355 0 FreeSans 400 0 0 0 gpio_analog_pol[1] port 552 nsew -flabel metal3 s 675407 150997 675863 151067 0 FreeSans 400 0 0 0 gpio_analog_en[1] +flabel metal3 s 675403 150997 675863 151067 0 FreeSans 400 0 0 0 gpio_analog_en[1] port 464 nsew -flabel metal3 s 675407 149801 675863 149871 0 FreeSans 400 0 0 0 gpio_dm1[1] +flabel metal3 s 675403 149801 675863 149871 0 FreeSans 400 0 0 0 gpio_dm1[1] port 640 nsew -flabel metal3 s 675407 147961 675863 148031 0 FreeSans 400 0 0 0 gpio_slow_sel[1] +flabel metal3 s 675403 147961 675863 148031 0 FreeSans 400 0 0 0 gpio_slow_sel[1] port 376 nsew -flabel metal3 s 675407 146121 675863 146191 0 FreeSans 400 0 0 0 gpio_in[1] +flabel metal3 s 675403 146121 675863 146191 0 FreeSans 400 0 0 0 gpio_in[1] port 728 nsew -flabel metal3 675407 969143 675863 969205 0 FreeSans 400 0 0 0 gpio_loopback_one[14] +flabel metal3 675403 969143 675863 969205 0 FreeSans 400 0 0 0 gpio_loopback_one[14] port 847 nsew -flabel metal3 675407 879143 675863 879205 0 FreeSans 400 0 0 0 gpio_loopback_one[13] +flabel metal3 675403 879143 675863 879205 0 FreeSans 400 0 0 0 gpio_loopback_one[13] port 848 nsew -flabel metal3 675407 792143 675863 792205 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] +flabel metal3 675403 792143 675863 792205 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] port 805 nsew -flabel metal3 675407 790143 675863 790205 0 FreeSans 400 0 0 0 gpio_loopback_one[12] +flabel metal3 675403 790143 675863 790205 0 FreeSans 400 0 0 0 gpio_loopback_one[12] port 849 nsew -flabel metal3 675407 747143 675863 747205 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] +flabel metal3 675403 747143 675863 747205 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] port 806 nsew -flabel metal3 675407 745143 675863 745205 0 FreeSans 400 0 0 0 gpio_loopback_one[11] +flabel metal3 675403 745143 675863 745205 0 FreeSans 400 0 0 0 gpio_loopback_one[11] port 850 nsew -flabel metal3 675407 702143 675863 702205 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] +flabel metal3 675403 702143 675863 702205 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] port 807 nsew -flabel metal3 675407 700143 675863 700205 0 FreeSans 400 0 0 0 gpio_loopback_one[10] +flabel metal3 675403 700143 675863 700205 0 FreeSans 400 0 0 0 gpio_loopback_one[10] port 851 nsew -flabel metal3 675407 657143 675863 657205 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] +flabel metal3 675403 657143 675863 657205 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] port 808 nsew -flabel metal3 675407 655143 675863 655205 0 FreeSans 400 0 0 0 gpio_loopback_one[9] +flabel metal3 675403 655143 675863 655205 0 FreeSans 400 0 0 0 gpio_loopback_one[9] port 852 nsew -flabel metal3 675407 612143 675863 612205 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] +flabel metal3 675403 612143 675863 612205 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] port 809 nsew -flabel metal3 675407 610143 675863 610205 0 FreeSans 400 0 0 0 gpio_loopback_one[8] +flabel metal3 675403 610143 675863 610205 0 FreeSans 400 0 0 0 gpio_loopback_one[8] port 853 nsew -flabel metal3 675407 567143 675863 567205 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] +flabel metal3 675403 567143 675863 567205 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] port 810 nsew -flabel metal3 675407 565142 675863 565204 0 FreeSans 400 0 0 0 gpio_loopback_one[7] +flabel metal3 675403 565142 675863 565204 0 FreeSans 400 0 0 0 gpio_loopback_one[7] port 854 nsew -flabel metal3 675407 390143 675863 390205 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] +flabel metal3 675403 390143 675863 390205 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] port 811 nsew -flabel metal3 675407 345143 675863 345205 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] +flabel metal3 675403 345143 675863 345205 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] port 812 nsew -flabel metal3 675407 300143 675863 300205 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] +flabel metal3 675403 300143 675863 300205 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] port 813 nsew -flabel metal3 675407 255143 675863 255205 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] +flabel metal3 675403 255143 675863 255205 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] port 814 nsew -flabel metal3 675407 210143 675863 210205 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] +flabel metal3 675403 210143 675863 210205 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] port 815 nsew -flabel metal3 675407 165143 675863 165205 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] +flabel metal3 675403 165143 675863 165205 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] port 816 nsew -flabel metal3 s 675407 917699 675863 922499 0 FreeSans 3200 0 0 0 vccd1 +flabel metal3 s 675403 917699 675863 922499 0 FreeSans 3200 0 0 0 vccd1 port 28 nsew -flabel metal3 s 675407 912747 675863 917409 0 FreeSans 3200 0 0 0 vssd1 +flabel metal3 s 675403 912747 675863 917409 0 FreeSans 3200 0 0 0 vssd1 port 30 nsew -flabel metal3 s 675407 907659 675863 912449 0 FreeSans 3200 0 0 0 vccd1 +flabel metal3 s 675403 907659 675863 912449 0 FreeSans 3200 0 0 0 vccd1 port 28 nsew -flabel metal3 s 675407 818543 675863 823323 0 FreeSans 3200 0 0 0 vdda1 +flabel metal3 s 675403 818543 675863 823323 0 FreeSans 3200 0 0 0 vdda1 port 24 nsew -flabel metal3 s 675407 503941 675863 508721 0 FreeSans 3200 0 0 0 vdda1 +flabel metal3 s 675403 503941 675863 508721 0 FreeSans 3200 0 0 0 vdda1 port 24 nsew -flabel metal3 675407 469899 675863 474699 0 FreeSans 3200 90 0 0 vssd1 +flabel metal3 675403 469899 675863 474699 0 FreeSans 3200 90 0 0 vssd1 port 30 nsew -flabel metal3 675407 464947 675863 469609 0 FreeSans 3200 90 0 0 vccd1 +flabel metal3 675403 464947 675863 469609 0 FreeSans 3200 90 0 0 vccd1 port 28 nsew -flabel metal3 675407 459859 675863 464649 0 FreeSans 3200 90 0 0 vssd1 +flabel metal3 675403 459859 675863 464649 0 FreeSans 3200 90 0 0 vssd1 port 30 nsew -flabel metal3 s 675407 415743 675863 420523 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 675403 415743 675863 420523 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 622943 41737 627723 42193 0 FreeSans 3200 0 0 0 vdda +flabel metal3 622943 41737 627723 42197 0 FreeSans 3200 0 0 0 vdda port 22 nsew -flabel metal3 569143 41737 573923 42193 0 FreeSans 3200 0 0 0 vssio +flabel metal3 569143 41737 573923 42197 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 251301 41737 256101 42193 0 FreeSans 3200 0 0 0 vssd +flabel metal3 251301 41737 256101 42197 0 FreeSans 3200 0 0 0 vssd port 21 nsew -flabel metal3 241421 41737 246051 42193 0 FreeSans 3200 0 0 0 vssd +flabel metal3 241421 41737 246051 42197 0 FreeSans 3200 0 0 0 vssd port 21 nsew -flabel metal3 78943 41737 83723 42193 0 FreeSans 3200 0 0 0 vssa +flabel metal3 78943 41737 83723 42197 0 FreeSans 3200 0 0 0 vssa port 23 nsew -flabel metal3 41737 68099 42193 72899 0 FreeSans 3200 90 0 0 vccd +flabel metal3 41737 68099 42197 72899 0 FreeSans 3200 90 0 0 vccd port 20 nsew -flabel metal3 41737 78151 42193 82941 0 FreeSans 3200 90 0 0 vccd +flabel metal3 41737 78151 42197 82941 0 FreeSans 3200 90 0 0 vccd port 20 nsew -flabel metal3 41737 120277 42193 125057 0 FreeSans 3200 90 0 0 vddio +flabel metal3 41737 120277 42197 125057 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 41737 440899 42193 445699 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 41737 440899 42197 445699 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 41737 445999 42193 450651 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 41737 445999 42197 450651 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 41737 450951 42193 455741 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 41737 450951 42197 455741 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 41737 493077 42193 497857 0 FreeSans 3200 90 0 0 vdda2 +flabel metal3 41737 493077 42197 497857 0 FreeSans 3200 90 0 0 vdda2 port 25 nsew -flabel metal3 41737 837679 42193 842459 0 FreeSans 3200 90 0 0 vssa2 +flabel metal3 41737 837679 42197 842459 0 FreeSans 3200 90 0 0 vssa2 port 27 nsew -flabel metal3 41737 879879 42193 884659 0 FreeSans 3200 90 0 0 vddio +flabel metal3 41737 879879 42197 884659 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 41737 912101 42193 916901 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 41737 912101 42197 916901 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 41737 917191 42193 921853 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 41737 917191 42197 921853 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 41737 922151 42193 926941 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 41737 922151 42197 926941 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 s 41737 799409 42193 799479 0 FreeSans 400 0 0 0 gpio_in[25] +flabel metal3 s 41737 799409 42197 799479 0 FreeSans 400 0 0 0 gpio_in[25] port 704 nsew -flabel metal3 s 41737 797569 42193 797639 0 FreeSans 400 0 0 0 gpio_slow_sel[25] +flabel metal3 s 41737 797569 42197 797639 0 FreeSans 400 0 0 0 gpio_slow_sel[25] port 352 nsew -flabel metal3 s 41737 795729 42193 795799 0 FreeSans 400 0 0 0 gpio_dm1[25] +flabel metal3 s 41737 795729 42197 795799 0 FreeSans 400 0 0 0 gpio_dm1[25] port 616 nsew -flabel metal3 s 41737 784689 42193 784759 0 FreeSans 400 0 0 0 gpio_in_h[25] +flabel metal3 s 41737 784689 42197 784759 0 FreeSans 400 0 0 0 gpio_in_h[25] port 748 nsew -flabel metal3 s 41737 786529 42193 786599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] +flabel metal3 s 41737 786529 42197 786599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] port 308 nsew -flabel metal3 s 41737 788369 42193 788439 0 FreeSans 400 0 0 0 gpio_out[25] +flabel metal3 s 41737 788369 42197 788439 0 FreeSans 400 0 0 0 gpio_out[25] port 132 nsew -flabel metal3 s 41737 785241 42193 785311 0 FreeSans 400 0 0 0 gpio_oeb[25] +flabel metal3 s 41737 785241 42197 785311 0 FreeSans 400 0 0 0 gpio_oeb[25] port 176 nsew -flabel metal3 s 41737 792693 42193 792763 0 FreeSans 400 0 0 0 gpio_inp_dis[25] +flabel metal3 s 41737 792693 42197 792763 0 FreeSans 400 0 0 0 gpio_inp_dis[25] port 220 nsew -flabel metal3 s 41737 785885 42193 785955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] +flabel metal3 s 41737 785885 42197 785955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] port 264 nsew -flabel metal3 s 41737 788921 42193 788991 0 FreeSans 400 0 0 0 gpio_holdover[25] +flabel metal3 s 41737 788921 42197 788991 0 FreeSans 400 0 0 0 gpio_holdover[25] port 396 nsew -flabel metal3 s 41737 789565 42193 789635 0 FreeSans 400 0 0 0 gpio_dm2[25] +flabel metal3 s 41737 789565 42197 789635 0 FreeSans 400 0 0 0 gpio_dm2[25] port 660 nsew -flabel metal3 s 41737 793889 42193 793959 0 FreeSans 400 0 0 0 gpio_dm0[25] +flabel metal3 s 41737 793889 42197 793959 0 FreeSans 400 0 0 0 gpio_dm0[25] port 572 nsew -flabel metal3 s 41737 790209 42193 790279 0 FreeSans 400 0 0 0 gpio_analog_sel[25] +flabel metal3 s 41737 790209 42197 790279 0 FreeSans 400 0 0 0 gpio_analog_sel[25] port 484 nsew -flabel metal3 s 41737 793245 42193 793315 0 FreeSans 400 0 0 0 gpio_analog_pol[25] +flabel metal3 s 41737 793245 42197 793315 0 FreeSans 400 0 0 0 gpio_analog_pol[25] port 528 nsew -flabel metal3 s 41737 794533 42193 794603 0 FreeSans 400 0 0 0 gpio_analog_en[25] +flabel metal3 s 41737 794533 42197 794603 0 FreeSans 400 0 0 0 gpio_analog_en[25] port 440 nsew -flabel metal3 s 41737 756209 42193 756279 0 FreeSans 400 0 0 0 gpio_in[26] +flabel metal3 s 41737 756209 42197 756279 0 FreeSans 400 0 0 0 gpio_in[26] port 703 nsew -flabel metal3 s 41737 754369 42193 754439 0 FreeSans 400 0 0 0 gpio_slow_sel[26] +flabel metal3 s 41737 754369 42197 754439 0 FreeSans 400 0 0 0 gpio_slow_sel[26] port 351 nsew -flabel metal3 s 41737 752529 42193 752599 0 FreeSans 400 0 0 0 gpio_dm1[26] +flabel metal3 s 41737 752529 42197 752599 0 FreeSans 400 0 0 0 gpio_dm1[26] port 615 nsew -flabel metal3 s 41737 741489 42193 741559 0 FreeSans 400 0 0 0 gpio_in_h[26] +flabel metal3 s 41737 741489 42197 741559 0 FreeSans 400 0 0 0 gpio_in_h[26] port 747 nsew -flabel metal3 s 41737 743329 42193 743399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] +flabel metal3 s 41737 743329 42197 743399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] port 307 nsew -flabel metal3 s 41737 745169 42193 745239 0 FreeSans 400 0 0 0 gpio_out[26] +flabel metal3 s 41737 745169 42197 745239 0 FreeSans 400 0 0 0 gpio_out[26] port 131 nsew -flabel metal3 s 41737 742041 42193 742111 0 FreeSans 400 0 0 0 gpio_oeb[26] +flabel metal3 s 41737 742041 42197 742111 0 FreeSans 400 0 0 0 gpio_oeb[26] port 175 nsew -flabel metal3 s 41737 749493 42193 749563 0 FreeSans 400 0 0 0 gpio_inp_dis[26] +flabel metal3 s 41737 749493 42197 749563 0 FreeSans 400 0 0 0 gpio_inp_dis[26] port 219 nsew -flabel metal3 s 41737 742685 42193 742755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] +flabel metal3 s 41737 742685 42197 742755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] port 263 nsew -flabel metal3 s 41737 745721 42193 745791 0 FreeSans 400 0 0 0 gpio_holdover[26] +flabel metal3 s 41737 745721 42197 745791 0 FreeSans 400 0 0 0 gpio_holdover[26] port 395 nsew -flabel metal3 s 41737 746365 42193 746435 0 FreeSans 400 0 0 0 gpio_dm2[26] +flabel metal3 s 41737 746365 42197 746435 0 FreeSans 400 0 0 0 gpio_dm2[26] port 659 nsew -flabel metal3 s 41737 750689 42193 750759 0 FreeSans 400 0 0 0 gpio_dm0[26] +flabel metal3 s 41737 750689 42197 750759 0 FreeSans 400 0 0 0 gpio_dm0[26] port 571 nsew -flabel metal3 s 41737 747009 42193 747079 0 FreeSans 400 0 0 0 gpio_analog_sel[26] +flabel metal3 s 41737 747009 42197 747079 0 FreeSans 400 0 0 0 gpio_analog_sel[26] port 483 nsew -flabel metal3 s 41737 750045 42193 750115 0 FreeSans 400 0 0 0 gpio_analog_pol[26] +flabel metal3 s 41737 750045 42197 750115 0 FreeSans 400 0 0 0 gpio_analog_pol[26] port 527 nsew -flabel metal3 s 41737 751333 42193 751403 0 FreeSans 400 0 0 0 gpio_analog_en[26] +flabel metal3 s 41737 751333 42197 751403 0 FreeSans 400 0 0 0 gpio_analog_en[26] port 439 nsew -flabel metal3 s 41737 713009 42193 713079 0 FreeSans 400 0 0 0 gpio_in[27] +flabel metal3 s 41737 713009 42197 713079 0 FreeSans 400 0 0 0 gpio_in[27] port 702 nsew -flabel metal3 s 41737 711169 42193 711239 0 FreeSans 400 0 0 0 gpio_slow_sel[27] +flabel metal3 s 41737 711169 42197 711239 0 FreeSans 400 0 0 0 gpio_slow_sel[27] port 350 nsew -flabel metal3 s 41737 709329 42193 709399 0 FreeSans 400 0 0 0 gpio_dm1[27] +flabel metal3 s 41737 709329 42197 709399 0 FreeSans 400 0 0 0 gpio_dm1[27] port 614 nsew -flabel metal3 s 41737 698289 42193 698359 0 FreeSans 400 0 0 0 gpio_in_h[27] +flabel metal3 s 41737 698289 42197 698359 0 FreeSans 400 0 0 0 gpio_in_h[27] port 746 nsew -flabel metal3 s 41737 700129 42193 700199 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] +flabel metal3 s 41737 700129 42197 700199 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] port 306 nsew -flabel metal3 s 41737 701969 42193 702039 0 FreeSans 400 0 0 0 gpio_out[27] +flabel metal3 s 41737 701969 42197 702039 0 FreeSans 400 0 0 0 gpio_out[27] port 130 nsew -flabel metal3 s 41737 698841 42193 698911 0 FreeSans 400 0 0 0 gpio_oeb[27] +flabel metal3 s 41737 698841 42197 698911 0 FreeSans 400 0 0 0 gpio_oeb[27] port 174 nsew -flabel metal3 s 41737 706293 42193 706363 0 FreeSans 400 0 0 0 gpio_inp_dis[27] +flabel metal3 s 41737 706293 42197 706363 0 FreeSans 400 0 0 0 gpio_inp_dis[27] port 218 nsew -flabel metal3 s 41737 699485 42193 699555 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] +flabel metal3 s 41737 699485 42197 699555 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] port 262 nsew -flabel metal3 s 41737 702521 42193 702591 0 FreeSans 400 0 0 0 gpio_holdover[27] +flabel metal3 s 41737 702521 42197 702591 0 FreeSans 400 0 0 0 gpio_holdover[27] port 394 nsew -flabel metal3 s 41737 703165 42193 703235 0 FreeSans 400 0 0 0 gpio_dm2[27] +flabel metal3 s 41737 703165 42197 703235 0 FreeSans 400 0 0 0 gpio_dm2[27] port 658 nsew -flabel metal3 s 41737 707489 42193 707559 0 FreeSans 400 0 0 0 gpio_dm0[27] +flabel metal3 s 41737 707489 42197 707559 0 FreeSans 400 0 0 0 gpio_dm0[27] port 570 nsew -flabel metal3 s 41737 703809 42193 703879 0 FreeSans 400 0 0 0 gpio_analog_sel[27] +flabel metal3 s 41737 703809 42197 703879 0 FreeSans 400 0 0 0 gpio_analog_sel[27] port 482 nsew -flabel metal3 s 41737 706845 42193 706915 0 FreeSans 400 0 0 0 gpio_analog_pol[27] +flabel metal3 s 41737 706845 42197 706915 0 FreeSans 400 0 0 0 gpio_analog_pol[27] port 526 nsew -flabel metal3 s 41737 708133 42193 708203 0 FreeSans 400 0 0 0 gpio_analog_en[27] +flabel metal3 s 41737 708133 42197 708203 0 FreeSans 400 0 0 0 gpio_analog_en[27] port 438 nsew -flabel metal3 s 41737 669809 42193 669879 0 FreeSans 400 0 0 0 gpio_in[28] +flabel metal3 s 41737 669809 42197 669879 0 FreeSans 400 0 0 0 gpio_in[28] port 701 nsew -flabel metal3 s 41737 667969 42193 668039 0 FreeSans 400 0 0 0 gpio_slow_sel[28] +flabel metal3 s 41737 667969 42197 668039 0 FreeSans 400 0 0 0 gpio_slow_sel[28] port 349 nsew -flabel metal3 s 41737 666129 42193 666199 0 FreeSans 400 0 0 0 gpio_dm1[28] +flabel metal3 s 41737 666129 42197 666199 0 FreeSans 400 0 0 0 gpio_dm1[28] port 613 nsew -flabel metal3 s 41737 655089 42193 655159 0 FreeSans 400 0 0 0 gpio_in_h[28] +flabel metal3 s 41737 655089 42197 655159 0 FreeSans 400 0 0 0 gpio_in_h[28] port 745 nsew -flabel metal3 s 41737 656929 42193 656999 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] +flabel metal3 s 41737 656929 42197 656999 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] port 305 nsew -flabel metal3 s 41737 658769 42193 658839 0 FreeSans 400 0 0 0 gpio_out[28] +flabel metal3 s 41737 658769 42197 658839 0 FreeSans 400 0 0 0 gpio_out[28] port 129 nsew -flabel metal3 s 41737 655641 42193 655711 0 FreeSans 400 0 0 0 gpio_oeb[28] +flabel metal3 s 41737 655641 42197 655711 0 FreeSans 400 0 0 0 gpio_oeb[28] port 173 nsew -flabel metal3 s 41737 663093 42193 663163 0 FreeSans 400 0 0 0 gpio_inp_dis[28] +flabel metal3 s 41737 663093 42197 663163 0 FreeSans 400 0 0 0 gpio_inp_dis[28] port 217 nsew -flabel metal3 s 41737 656285 42193 656355 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] +flabel metal3 s 41737 656285 42197 656355 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] port 261 nsew -flabel metal3 s 41737 659321 42193 659391 0 FreeSans 400 0 0 0 gpio_holdover[28] +flabel metal3 s 41737 659321 42197 659391 0 FreeSans 400 0 0 0 gpio_holdover[28] port 393 nsew -flabel metal3 s 41737 659965 42193 660035 0 FreeSans 400 0 0 0 gpio_dm2[28] +flabel metal3 s 41737 659965 42197 660035 0 FreeSans 400 0 0 0 gpio_dm2[28] port 657 nsew -flabel metal3 s 41737 664289 42193 664359 0 FreeSans 400 0 0 0 gpio_dm0[28] +flabel metal3 s 41737 664289 42197 664359 0 FreeSans 400 0 0 0 gpio_dm0[28] port 569 nsew -flabel metal3 s 41737 660609 42193 660679 0 FreeSans 400 0 0 0 gpio_analog_sel[28] +flabel metal3 s 41737 660609 42197 660679 0 FreeSans 400 0 0 0 gpio_analog_sel[28] port 481 nsew -flabel metal3 s 41737 663645 42193 663715 0 FreeSans 400 0 0 0 gpio_analog_pol[28] +flabel metal3 s 41737 663645 42197 663715 0 FreeSans 400 0 0 0 gpio_analog_pol[28] port 525 nsew -flabel metal3 s 41737 664933 42193 665003 0 FreeSans 400 0 0 0 gpio_analog_en[28] +flabel metal3 s 41737 664933 42197 665003 0 FreeSans 400 0 0 0 gpio_analog_en[28] port 437 nsew -flabel metal3 s 41737 626609 42193 626679 0 FreeSans 400 0 0 0 gpio_in[29] +flabel metal3 s 41737 626609 42197 626679 0 FreeSans 400 0 0 0 gpio_in[29] port 700 nsew -flabel metal3 s 41737 624769 42193 624839 0 FreeSans 400 0 0 0 gpio_slow_sel[29] +flabel metal3 s 41737 624769 42197 624839 0 FreeSans 400 0 0 0 gpio_slow_sel[29] port 348 nsew -flabel metal3 s 41737 622929 42193 622999 0 FreeSans 400 0 0 0 gpio_dm1[29] +flabel metal3 s 41737 622929 42197 622999 0 FreeSans 400 0 0 0 gpio_dm1[29] port 612 nsew -flabel metal3 s 41737 611889 42193 611959 0 FreeSans 400 0 0 0 gpio_in_h[29] +flabel metal3 s 41737 611889 42197 611959 0 FreeSans 400 0 0 0 gpio_in_h[29] port 744 nsew -flabel metal3 s 41737 613729 42193 613799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] +flabel metal3 s 41737 613729 42197 613799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] port 304 nsew -flabel metal3 s 41737 615569 42193 615639 0 FreeSans 400 0 0 0 gpio_out[29] +flabel metal3 s 41737 615569 42197 615639 0 FreeSans 400 0 0 0 gpio_out[29] port 128 nsew -flabel metal3 s 41737 612441 42193 612511 0 FreeSans 400 0 0 0 gpio_oeb[29] +flabel metal3 s 41737 612441 42197 612511 0 FreeSans 400 0 0 0 gpio_oeb[29] port 172 nsew -flabel metal3 s 41737 619893 42193 619963 0 FreeSans 400 0 0 0 gpio_inp_dis[29] +flabel metal3 s 41737 619893 42197 619963 0 FreeSans 400 0 0 0 gpio_inp_dis[29] port 216 nsew -flabel metal3 s 41737 613085 42193 613155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] +flabel metal3 s 41737 613085 42197 613155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] port 260 nsew -flabel metal3 s 41737 616121 42193 616191 0 FreeSans 400 0 0 0 gpio_holdover[29] +flabel metal3 s 41737 616121 42197 616191 0 FreeSans 400 0 0 0 gpio_holdover[29] port 392 nsew -flabel metal3 s 41737 616765 42193 616835 0 FreeSans 400 0 0 0 gpio_dm2[29] +flabel metal3 s 41737 616765 42197 616835 0 FreeSans 400 0 0 0 gpio_dm2[29] port 656 nsew -flabel metal3 s 41737 621089 42193 621159 0 FreeSans 400 0 0 0 gpio_dm0[29] +flabel metal3 s 41737 621089 42197 621159 0 FreeSans 400 0 0 0 gpio_dm0[29] port 568 nsew -flabel metal3 s 41737 617409 42193 617479 0 FreeSans 400 0 0 0 gpio_analog_sel[29] +flabel metal3 s 41737 617409 42197 617479 0 FreeSans 400 0 0 0 gpio_analog_sel[29] port 480 nsew -flabel metal3 s 41737 620445 42193 620515 0 FreeSans 400 0 0 0 gpio_analog_pol[29] +flabel metal3 s 41737 620445 42197 620515 0 FreeSans 400 0 0 0 gpio_analog_pol[29] port 524 nsew -flabel metal3 s 41737 621733 42193 621803 0 FreeSans 400 0 0 0 gpio_analog_en[29] +flabel metal3 s 41737 621733 42197 621803 0 FreeSans 400 0 0 0 gpio_analog_en[29] port 436 nsew -flabel metal3 s 41737 583409 42193 583479 0 FreeSans 400 0 0 0 gpio_in[30] +flabel metal3 s 41737 583409 42197 583479 0 FreeSans 400 0 0 0 gpio_in[30] port 699 nsew -flabel metal3 s 41737 581569 42193 581639 0 FreeSans 400 0 0 0 gpio_slow_sel[30] +flabel metal3 s 41737 581569 42197 581639 0 FreeSans 400 0 0 0 gpio_slow_sel[30] port 347 nsew -flabel metal3 s 41737 579729 42193 579799 0 FreeSans 400 0 0 0 gpio_dm1[30] +flabel metal3 s 41737 579729 42197 579799 0 FreeSans 400 0 0 0 gpio_dm1[30] port 611 nsew -flabel metal3 s 41737 568689 42193 568759 0 FreeSans 400 0 0 0 gpio_in_h[30] +flabel metal3 s 41737 568689 42197 568759 0 FreeSans 400 0 0 0 gpio_in_h[30] port 743 nsew -flabel metal3 s 41737 574209 42193 574279 0 FreeSans 400 0 0 0 gpio_analog_sel[30] +flabel metal3 s 41737 574209 42197 574279 0 FreeSans 400 0 0 0 gpio_analog_sel[30] port 479 nsew -flabel metal3 s 41737 577245 42193 577315 0 FreeSans 400 0 0 0 gpio_analog_pol[30] +flabel metal3 s 41737 577245 42197 577315 0 FreeSans 400 0 0 0 gpio_analog_pol[30] port 523 nsew -flabel metal3 s 41737 578533 42193 578603 0 FreeSans 400 0 0 0 gpio_analog_en[30] +flabel metal3 s 41737 578533 42197 578603 0 FreeSans 400 0 0 0 gpio_analog_en[30] port 435 nsew -flabel metal3 s 41737 570529 42193 570599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] +flabel metal3 s 41737 570529 42197 570599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] port 303 nsew -flabel metal3 s 41737 572369 42193 572439 0 FreeSans 400 0 0 0 gpio_out[30] +flabel metal3 s 41737 572369 42197 572439 0 FreeSans 400 0 0 0 gpio_out[30] port 127 nsew -flabel metal3 s 41737 569241 42193 569311 0 FreeSans 400 0 0 0 gpio_oeb[30] +flabel metal3 s 41737 569241 42197 569311 0 FreeSans 400 0 0 0 gpio_oeb[30] port 171 nsew -flabel metal3 s 41737 576693 42193 576763 0 FreeSans 400 0 0 0 gpio_inp_dis[30] +flabel metal3 s 41737 576693 42197 576763 0 FreeSans 400 0 0 0 gpio_inp_dis[30] port 215 nsew -flabel metal3 s 41737 569885 42193 569955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] +flabel metal3 s 41737 569885 42197 569955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] port 259 nsew -flabel metal3 s 41737 572921 42193 572991 0 FreeSans 400 0 0 0 gpio_holdover[30] +flabel metal3 s 41737 572921 42197 572991 0 FreeSans 400 0 0 0 gpio_holdover[30] port 391 nsew -flabel metal3 s 41737 573565 42193 573635 0 FreeSans 400 0 0 0 gpio_dm2[30] +flabel metal3 s 41737 573565 42197 573635 0 FreeSans 400 0 0 0 gpio_dm2[30] port 655 nsew -flabel metal3 s 41737 577889 42193 577959 0 FreeSans 400 0 0 0 gpio_dm0[30] +flabel metal3 s 41737 577889 42197 577959 0 FreeSans 400 0 0 0 gpio_dm0[30] port 567 nsew -flabel metal3 s 41737 540209 42193 540279 0 FreeSans 400 0 0 0 gpio_in[31] +flabel metal3 s 41737 540209 42197 540279 0 FreeSans 400 0 0 0 gpio_in[31] port 698 nsew -flabel metal3 s 41737 538369 42193 538439 0 FreeSans 400 0 0 0 gpio_slow_sel[31] +flabel metal3 s 41737 538369 42197 538439 0 FreeSans 400 0 0 0 gpio_slow_sel[31] port 346 nsew -flabel metal3 s 41737 536529 42193 536599 0 FreeSans 400 0 0 0 gpio_dm1[31] +flabel metal3 s 41737 536529 42197 536599 0 FreeSans 400 0 0 0 gpio_dm1[31] port 610 nsew -flabel metal3 s 41737 525489 42193 525559 0 FreeSans 400 0 0 0 gpio_in_h[31] +flabel metal3 s 41737 525489 42197 525559 0 FreeSans 400 0 0 0 gpio_in_h[31] port 742 nsew -flabel metal3 s 41737 527329 42193 527399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] +flabel metal3 s 41737 527329 42197 527399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] port 302 nsew -flabel metal3 s 41737 529169 42193 529239 0 FreeSans 400 0 0 0 gpio_out[31] +flabel metal3 s 41737 529169 42197 529239 0 FreeSans 400 0 0 0 gpio_out[31] port 126 nsew -flabel metal3 s 41737 526041 42193 526111 0 FreeSans 400 0 0 0 gpio_oeb[31] +flabel metal3 s 41737 526041 42197 526111 0 FreeSans 400 0 0 0 gpio_oeb[31] port 170 nsew -flabel metal3 s 41737 533493 42193 533563 0 FreeSans 400 0 0 0 gpio_inp_dis[31] +flabel metal3 s 41737 533493 42197 533563 0 FreeSans 400 0 0 0 gpio_inp_dis[31] port 214 nsew -flabel metal3 s 41737 526685 42193 526755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] +flabel metal3 s 41737 526685 42197 526755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] port 258 nsew -flabel metal3 s 41737 529721 42193 529791 0 FreeSans 400 0 0 0 gpio_holdover[31] +flabel metal3 s 41737 529721 42197 529791 0 FreeSans 400 0 0 0 gpio_holdover[31] port 390 nsew -flabel metal3 s 41737 530365 42193 530435 0 FreeSans 400 0 0 0 gpio_dm2[31] +flabel metal3 s 41737 530365 42197 530435 0 FreeSans 400 0 0 0 gpio_dm2[31] port 654 nsew -flabel metal3 s 41737 534689 42193 534759 0 FreeSans 400 0 0 0 gpio_dm0[31] +flabel metal3 s 41737 534689 42197 534759 0 FreeSans 400 0 0 0 gpio_dm0[31] port 566 nsew -flabel metal3 s 41737 531009 42193 531079 0 FreeSans 400 0 0 0 gpio_analog_sel[31] +flabel metal3 s 41737 531009 42197 531079 0 FreeSans 400 0 0 0 gpio_analog_sel[31] port 478 nsew -flabel metal3 s 41737 534045 42193 534115 0 FreeSans 400 0 0 0 gpio_analog_pol[31] +flabel metal3 s 41737 534045 42197 534115 0 FreeSans 400 0 0 0 gpio_analog_pol[31] port 522 nsew -flabel metal3 s 41737 535333 42193 535403 0 FreeSans 400 0 0 0 gpio_analog_en[31] +flabel metal3 s 41737 535333 42197 535403 0 FreeSans 400 0 0 0 gpio_analog_en[31] port 434 nsew -flabel metal3 s 41737 412609 42193 412679 0 FreeSans 400 0 0 0 gpio_in[32] +flabel metal3 s 41737 412609 42197 412679 0 FreeSans 400 0 0 0 gpio_in[32] port 697 nsew -flabel metal3 s 41737 410769 42193 410839 0 FreeSans 400 0 0 0 gpio_slow_sel[32] +flabel metal3 s 41737 410769 42197 410839 0 FreeSans 400 0 0 0 gpio_slow_sel[32] port 345 nsew -flabel metal3 s 41737 408929 42193 408999 0 FreeSans 400 0 0 0 gpio_dm1[32] +flabel metal3 s 41737 408929 42197 408999 0 FreeSans 400 0 0 0 gpio_dm1[32] port 609 nsew -flabel metal3 s 41737 397889 42193 397959 0 FreeSans 400 0 0 0 gpio_in_h[32] +flabel metal3 s 41737 397889 42197 397959 0 FreeSans 400 0 0 0 gpio_in_h[32] port 741 nsew -flabel metal3 s 41737 399729 42193 399799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] +flabel metal3 s 41737 399729 42197 399799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] port 301 nsew -flabel metal3 s 41737 401569 42193 401639 0 FreeSans 400 0 0 0 gpio_out[32] +flabel metal3 s 41737 401569 42197 401639 0 FreeSans 400 0 0 0 gpio_out[32] port 125 nsew -flabel metal3 s 41737 398441 42193 398511 0 FreeSans 400 0 0 0 gpio_oeb[32] +flabel metal3 s 41737 398441 42197 398511 0 FreeSans 400 0 0 0 gpio_oeb[32] port 169 nsew -flabel metal3 s 41737 405893 42193 405963 0 FreeSans 400 0 0 0 gpio_inp_dis[32] +flabel metal3 s 41737 405893 42197 405963 0 FreeSans 400 0 0 0 gpio_inp_dis[32] port 213 nsew -flabel metal3 s 41737 399085 42193 399155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] +flabel metal3 s 41737 399085 42197 399155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] port 257 nsew -flabel metal3 s 41737 402121 42193 402191 0 FreeSans 400 0 0 0 gpio_holdover[32] +flabel metal3 s 41737 402121 42197 402191 0 FreeSans 400 0 0 0 gpio_holdover[32] port 389 nsew -flabel metal3 s 41737 402765 42193 402835 0 FreeSans 400 0 0 0 gpio_dm2[32] +flabel metal3 s 41737 402765 42197 402835 0 FreeSans 400 0 0 0 gpio_dm2[32] port 653 nsew -flabel metal3 s 41737 407089 42193 407159 0 FreeSans 400 0 0 0 gpio_dm0[32] +flabel metal3 s 41737 407089 42197 407159 0 FreeSans 400 0 0 0 gpio_dm0[32] port 565 nsew -flabel metal3 s 41737 403409 42193 403479 0 FreeSans 400 0 0 0 gpio_analog_sel[32] +flabel metal3 s 41737 403409 42197 403479 0 FreeSans 400 0 0 0 gpio_analog_sel[32] port 477 nsew -flabel metal3 s 41737 406445 42193 406515 0 FreeSans 400 0 0 0 gpio_analog_pol[32] +flabel metal3 s 41737 406445 42197 406515 0 FreeSans 400 0 0 0 gpio_analog_pol[32] port 521 nsew -flabel metal3 s 41737 407733 42193 407803 0 FreeSans 400 0 0 0 gpio_analog_en[32] +flabel metal3 s 41737 407733 42197 407803 0 FreeSans 400 0 0 0 gpio_analog_en[32] port 433 nsew -flabel metal3 s 41737 369409 42193 369479 0 FreeSans 400 0 0 0 gpio_in[33] +flabel metal3 s 41737 369409 42197 369479 0 FreeSans 400 0 0 0 gpio_in[33] port 696 nsew -flabel metal3 s 41737 367569 42193 367639 0 FreeSans 400 0 0 0 gpio_slow_sel[33] +flabel metal3 s 41737 367569 42197 367639 0 FreeSans 400 0 0 0 gpio_slow_sel[33] port 344 nsew -flabel metal3 s 41737 365729 42193 365799 0 FreeSans 400 0 0 0 gpio_dm1[33] +flabel metal3 s 41737 365729 42197 365799 0 FreeSans 400 0 0 0 gpio_dm1[33] port 608 nsew -flabel metal3 s 41737 354689 42193 354759 0 FreeSans 400 0 0 0 gpio_in_h[33] +flabel metal3 s 41737 354689 42197 354759 0 FreeSans 400 0 0 0 gpio_in_h[33] port 740 nsew -flabel metal3 s 41737 356529 42193 356599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] +flabel metal3 s 41737 356529 42197 356599 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] port 300 nsew -flabel metal3 s 41737 358369 42193 358439 0 FreeSans 400 0 0 0 gpio_out[33] +flabel metal3 s 41737 358369 42197 358439 0 FreeSans 400 0 0 0 gpio_out[33] port 124 nsew -flabel metal3 s 41737 355241 42193 355311 0 FreeSans 400 0 0 0 gpio_oeb[33] +flabel metal3 s 41737 355241 42197 355311 0 FreeSans 400 0 0 0 gpio_oeb[33] port 168 nsew -flabel metal3 s 41737 362693 42193 362763 0 FreeSans 400 0 0 0 gpio_inp_dis[33] +flabel metal3 s 41737 362693 42197 362763 0 FreeSans 400 0 0 0 gpio_inp_dis[33] port 212 nsew -flabel metal3 s 41737 355885 42193 355955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] +flabel metal3 s 41737 355885 42197 355955 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] port 256 nsew -flabel metal3 s 41737 358921 42193 358991 0 FreeSans 400 0 0 0 gpio_holdover[33] +flabel metal3 s 41737 358921 42197 358991 0 FreeSans 400 0 0 0 gpio_holdover[33] port 388 nsew -flabel metal3 s 41737 363889 42193 363959 0 FreeSans 400 0 0 0 gpio_dm0[33] +flabel metal3 s 41737 363889 42197 363959 0 FreeSans 400 0 0 0 gpio_dm0[33] port 564 nsew -flabel metal3 s 41737 359565 42193 359635 0 FreeSans 400 0 0 0 gpio_dm2[33] +flabel metal3 s 41737 359565 42197 359635 0 FreeSans 400 0 0 0 gpio_dm2[33] port 652 nsew -flabel metal3 s 41737 360209 42193 360279 0 FreeSans 400 0 0 0 gpio_analog_sel[33] +flabel metal3 s 41737 360209 42197 360279 0 FreeSans 400 0 0 0 gpio_analog_sel[33] port 476 nsew -flabel metal3 s 41737 363245 42193 363315 0 FreeSans 400 0 0 0 gpio_analog_pol[33] +flabel metal3 s 41737 363245 42197 363315 0 FreeSans 400 0 0 0 gpio_analog_pol[33] port 520 nsew -flabel metal3 s 41737 364533 42193 364603 0 FreeSans 400 0 0 0 gpio_analog_en[33] +flabel metal3 s 41737 364533 42197 364603 0 FreeSans 400 0 0 0 gpio_analog_en[33] port 432 nsew -flabel metal3 s 41737 326209 42193 326279 0 FreeSans 400 0 0 0 gpio_in[34] +flabel metal3 s 41737 326209 42197 326279 0 FreeSans 400 0 0 0 gpio_in[34] port 695 nsew -flabel metal3 s 41737 324369 42193 324439 0 FreeSans 400 0 0 0 gpio_slow_sel[34] +flabel metal3 s 41737 324369 42197 324439 0 FreeSans 400 0 0 0 gpio_slow_sel[34] port 343 nsew -flabel metal3 s 41737 322529 42193 322599 0 FreeSans 400 0 0 0 gpio_dm1[34] +flabel metal3 s 41737 322529 42197 322599 0 FreeSans 400 0 0 0 gpio_dm1[34] port 607 nsew -flabel metal3 s 41737 311489 42193 311559 0 FreeSans 400 0 0 0 gpio_in_h[34] +flabel metal3 s 41737 311489 42197 311559 0 FreeSans 400 0 0 0 gpio_in_h[34] port 739 nsew -flabel metal3 s 41737 313329 42193 313399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] +flabel metal3 s 41737 313329 42197 313399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] port 299 nsew -flabel metal3 s 41737 315169 42193 315239 0 FreeSans 400 0 0 0 gpio_out[34] +flabel metal3 s 41737 315169 42197 315239 0 FreeSans 400 0 0 0 gpio_out[34] port 123 nsew -flabel metal3 s 41737 312041 42193 312111 0 FreeSans 400 0 0 0 gpio_oeb[34] +flabel metal3 s 41737 312041 42197 312111 0 FreeSans 400 0 0 0 gpio_oeb[34] port 167 nsew -flabel metal3 s 41737 319493 42193 319563 0 FreeSans 400 0 0 0 gpio_inp_dis[34] +flabel metal3 s 41737 319493 42197 319563 0 FreeSans 400 0 0 0 gpio_inp_dis[34] port 211 nsew -flabel metal3 s 41737 312685 42193 312755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] +flabel metal3 s 41737 312685 42197 312755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] port 255 nsew -flabel metal3 s 41737 315721 42193 315791 0 FreeSans 400 0 0 0 gpio_holdover[34] +flabel metal3 s 41737 315721 42197 315791 0 FreeSans 400 0 0 0 gpio_holdover[34] port 387 nsew -flabel metal3 s 41737 316365 42193 316435 0 FreeSans 400 0 0 0 gpio_dm2[34] +flabel metal3 s 41737 316365 42197 316435 0 FreeSans 400 0 0 0 gpio_dm2[34] port 651 nsew -flabel metal3 s 41737 320689 42193 320759 0 FreeSans 400 0 0 0 gpio_dm0[34] +flabel metal3 s 41737 320689 42197 320759 0 FreeSans 400 0 0 0 gpio_dm0[34] port 563 nsew -flabel metal3 s 41737 317009 42193 317079 0 FreeSans 400 0 0 0 gpio_analog_sel[34] +flabel metal3 s 41737 317009 42197 317079 0 FreeSans 400 0 0 0 gpio_analog_sel[34] port 475 nsew -flabel metal3 s 41737 320045 42193 320115 0 FreeSans 400 0 0 0 gpio_analog_pol[34] +flabel metal3 s 41737 320045 42197 320115 0 FreeSans 400 0 0 0 gpio_analog_pol[34] port 519 nsew -flabel metal3 s 41737 321333 42193 321403 0 FreeSans 400 0 0 0 gpio_analog_en[34] +flabel metal3 s 41737 321333 42197 321403 0 FreeSans 400 0 0 0 gpio_analog_en[34] port 431 nsew -flabel metal3 s 41737 283009 42193 283079 0 FreeSans 400 0 0 0 gpio_in[35] +flabel metal3 s 41737 283009 42197 283079 0 FreeSans 400 0 0 0 gpio_in[35] port 694 nsew -flabel metal3 s 41737 281169 42193 281239 0 FreeSans 400 0 0 0 gpio_slow_sel[35] +flabel metal3 s 41737 281169 42197 281239 0 FreeSans 400 0 0 0 gpio_slow_sel[35] port 342 nsew -flabel metal3 s 41737 279329 42193 279399 0 FreeSans 400 0 0 0 gpio_dm1[35] +flabel metal3 s 41737 279329 42197 279399 0 FreeSans 400 0 0 0 gpio_dm1[35] port 606 nsew -flabel metal3 s 41737 268289 42193 268359 0 FreeSans 400 0 0 0 gpio_in_h[35] +flabel metal3 s 41737 268289 42197 268359 0 FreeSans 400 0 0 0 gpio_in_h[35] port 738 nsew -flabel metal3 s 41737 270129 42193 270199 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] +flabel metal3 s 41737 270129 42197 270199 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] port 298 nsew -flabel metal3 s 41737 271969 42193 272039 0 FreeSans 400 0 0 0 gpio_out[35] +flabel metal3 s 41737 271969 42197 272039 0 FreeSans 400 0 0 0 gpio_out[35] port 122 nsew -flabel metal3 s 41737 268841 42193 268911 0 FreeSans 400 0 0 0 gpio_oeb[35] +flabel metal3 s 41737 268841 42197 268911 0 FreeSans 400 0 0 0 gpio_oeb[35] port 166 nsew -flabel metal3 s 41737 276293 42193 276363 0 FreeSans 400 0 0 0 gpio_inp_dis[35] +flabel metal3 s 41737 276293 42197 276363 0 FreeSans 400 0 0 0 gpio_inp_dis[35] port 210 nsew -flabel metal3 s 41737 269485 42193 269555 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] +flabel metal3 s 41737 269485 42197 269555 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] port 254 nsew -flabel metal3 s 41737 272521 42193 272591 0 FreeSans 400 0 0 0 gpio_holdover[35] +flabel metal3 s 41737 272521 42197 272591 0 FreeSans 400 0 0 0 gpio_holdover[35] port 386 nsew -flabel metal3 s 41737 273165 42193 273235 0 FreeSans 400 0 0 0 gpio_dm2[35] +flabel metal3 s 41737 273165 42197 273235 0 FreeSans 400 0 0 0 gpio_dm2[35] port 650 nsew -flabel metal3 s 41737 277489 42193 277559 0 FreeSans 400 0 0 0 gpio_dm0[35] +flabel metal3 s 41737 277489 42197 277559 0 FreeSans 400 0 0 0 gpio_dm0[35] port 562 nsew -flabel metal3 s 41737 273809 42193 273879 0 FreeSans 400 0 0 0 gpio_analog_sel[35] +flabel metal3 s 41737 273809 42197 273879 0 FreeSans 400 0 0 0 gpio_analog_sel[35] port 474 nsew -flabel metal3 s 41737 276845 42193 276915 0 FreeSans 400 0 0 0 gpio_analog_pol[35] +flabel metal3 s 41737 276845 42197 276915 0 FreeSans 400 0 0 0 gpio_analog_pol[35] port 518 nsew -flabel metal3 s 41737 278133 42193 278203 0 FreeSans 400 0 0 0 gpio_analog_en[35] +flabel metal3 s 41737 278133 42197 278203 0 FreeSans 400 0 0 0 gpio_analog_en[35] port 430 nsew -flabel metal3 s 41737 239809 42193 239879 0 FreeSans 400 0 0 0 gpio_in[36] +flabel metal3 s 41737 239809 42197 239879 0 FreeSans 400 0 0 0 gpio_in[36] port 693 nsew -flabel metal3 s 41737 237969 42193 238039 0 FreeSans 400 0 0 0 gpio_slow_sel[36] +flabel metal3 s 41737 237969 42197 238039 0 FreeSans 400 0 0 0 gpio_slow_sel[36] port 341 nsew -flabel metal3 s 41737 236129 42193 236199 0 FreeSans 400 0 0 0 gpio_dm1[36] +flabel metal3 s 41737 236129 42197 236199 0 FreeSans 400 0 0 0 gpio_dm1[36] port 605 nsew -flabel metal3 s 41737 225089 42193 225159 0 FreeSans 400 0 0 0 gpio_in_h[36] +flabel metal3 s 41737 225089 42197 225159 0 FreeSans 400 0 0 0 gpio_in_h[36] port 737 nsew -flabel metal3 s 41737 234289 42193 234359 0 FreeSans 400 0 0 0 gpio_dm0[36] +flabel metal3 s 41737 234289 42197 234359 0 FreeSans 400 0 0 0 gpio_dm0[36] port 561 nsew -flabel metal3 s 41737 230609 42193 230679 0 FreeSans 400 0 0 0 gpio_analog_sel[36] +flabel metal3 s 41737 230609 42197 230679 0 FreeSans 400 0 0 0 gpio_analog_sel[36] port 473 nsew -flabel metal3 s 41737 233645 42193 233715 0 FreeSans 400 0 0 0 gpio_analog_pol[36] +flabel metal3 s 41737 233645 42197 233715 0 FreeSans 400 0 0 0 gpio_analog_pol[36] port 517 nsew -flabel metal3 s 41737 234933 42193 235003 0 FreeSans 400 0 0 0 gpio_analog_en[36] +flabel metal3 s 41737 234933 42197 235003 0 FreeSans 400 0 0 0 gpio_analog_en[36] port 429 nsew -flabel metal3 s 41737 226929 42193 226999 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] +flabel metal3 s 41737 226929 42197 226999 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] port 297 nsew -flabel metal3 s 41737 228769 42193 228839 0 FreeSans 400 0 0 0 gpio_out[36] +flabel metal3 s 41737 228769 42197 228839 0 FreeSans 400 0 0 0 gpio_out[36] port 121 nsew -flabel metal3 s 41737 225641 42193 225711 0 FreeSans 400 0 0 0 gpio_oeb[36] +flabel metal3 s 41737 225641 42197 225711 0 FreeSans 400 0 0 0 gpio_oeb[36] port 165 nsew -flabel metal3 s 41737 233093 42193 233163 0 FreeSans 400 0 0 0 gpio_inp_dis[36] +flabel metal3 s 41737 233093 42197 233163 0 FreeSans 400 0 0 0 gpio_inp_dis[36] port 209 nsew -flabel metal3 s 41737 226285 42193 226355 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] +flabel metal3 s 41737 226285 42197 226355 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] port 253 nsew -flabel metal3 s 41737 229321 42193 229391 0 FreeSans 400 0 0 0 gpio_holdover[36] +flabel metal3 s 41737 229321 42197 229391 0 FreeSans 400 0 0 0 gpio_holdover[36] port 385 nsew -flabel metal3 s 41737 229965 42193 230035 0 FreeSans 400 0 0 0 gpio_dm2[36] +flabel metal3 s 41737 229965 42197 230035 0 FreeSans 400 0 0 0 gpio_dm2[36] port 649 nsew -flabel metal3 s 41737 196609 42193 196679 0 FreeSans 400 0 0 0 gpio_in[37] +flabel metal3 s 41737 196609 42197 196679 0 FreeSans 400 0 0 0 gpio_in[37] port 692 nsew -flabel metal3 s 41737 194769 42193 194839 0 FreeSans 400 0 0 0 gpio_slow_sel[37] +flabel metal3 s 41737 194769 42197 194839 0 FreeSans 400 0 0 0 gpio_slow_sel[37] port 340 nsew -flabel metal3 s 41737 192929 42193 192999 0 FreeSans 400 0 0 0 gpio_dm1[37] +flabel metal3 s 41737 192929 42197 192999 0 FreeSans 400 0 0 0 gpio_dm1[37] port 604 nsew -flabel metal3 s 41737 181889 42193 181959 0 FreeSans 400 0 0 0 gpio_in_h[37] +flabel metal3 s 41737 181889 42197 181959 0 FreeSans 400 0 0 0 gpio_in_h[37] port 736 nsew -flabel metal3 s 41737 189893 42193 189963 0 FreeSans 400 0 0 0 gpio_inp_dis[37] +flabel metal3 s 41737 189893 42197 189963 0 FreeSans 400 0 0 0 gpio_inp_dis[37] port 208 nsew -flabel metal3 s 41737 183729 42193 183799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] +flabel metal3 s 41737 183729 42197 183799 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] port 296 nsew -flabel metal3 s 41737 185569 42193 185639 0 FreeSans 400 0 0 0 gpio_out[37] +flabel metal3 s 41737 185569 42197 185639 0 FreeSans 400 0 0 0 gpio_out[37] port 120 nsew -flabel metal3 s 41737 182441 42193 182511 0 FreeSans 400 0 0 0 gpio_oeb[37] +flabel metal3 s 41737 182441 42197 182511 0 FreeSans 400 0 0 0 gpio_oeb[37] port 164 nsew -flabel metal3 s 41737 183085 42193 183155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] +flabel metal3 s 41737 183085 42197 183155 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] port 252 nsew -flabel metal3 s 41737 186121 42193 186191 0 FreeSans 400 0 0 0 gpio_holdover[37] +flabel metal3 s 41737 186121 42197 186191 0 FreeSans 400 0 0 0 gpio_holdover[37] port 384 nsew -flabel metal3 s 41737 186765 42193 186835 0 FreeSans 400 0 0 0 gpio_dm2[37] +flabel metal3 s 41737 186765 42197 186835 0 FreeSans 400 0 0 0 gpio_dm2[37] port 648 nsew -flabel metal3 s 41737 191089 42193 191159 0 FreeSans 400 0 0 0 gpio_dm0[37] +flabel metal3 s 41737 191089 42197 191159 0 FreeSans 400 0 0 0 gpio_dm0[37] port 560 nsew -flabel metal3 s 41737 187409 42193 187479 0 FreeSans 400 0 0 0 gpio_analog_sel[37] +flabel metal3 s 41737 187409 42197 187479 0 FreeSans 400 0 0 0 gpio_analog_sel[37] port 472 nsew -flabel metal3 s 41737 190445 42193 190515 0 FreeSans 400 0 0 0 gpio_analog_pol[37] +flabel metal3 s 41737 190445 42197 190515 0 FreeSans 400 0 0 0 gpio_analog_pol[37] port 516 nsew -flabel metal3 s 41737 191733 42193 191803 0 FreeSans 400 0 0 0 gpio_analog_en[37] +flabel metal3 s 41737 191733 42197 191803 0 FreeSans 400 0 0 0 gpio_analog_en[37] port 428 nsew -flabel metal3 s 41737 969209 42193 969279 0 FreeSans 400 0 0 0 gpio_in[24] +flabel metal3 s 41737 969209 42197 969279 0 FreeSans 400 0 0 0 gpio_in[24] port 705 nsew -flabel metal3 s 41737 967369 42193 967439 0 FreeSans 400 0 0 0 gpio_slow_sel[24] +flabel metal3 s 41737 967369 42197 967439 0 FreeSans 400 0 0 0 gpio_slow_sel[24] port 353 nsew -flabel metal3 s 41737 965529 42193 965599 0 FreeSans 400 0 0 0 gpio_dm1[24] +flabel metal3 s 41737 965529 42197 965599 0 FreeSans 400 0 0 0 gpio_dm1[24] port 617 nsew -flabel metal3 s 41737 954489 42193 954559 0 FreeSans 400 0 0 0 gpio_in_h[24] +flabel metal3 s 41737 954489 42197 954559 0 FreeSans 400 0 0 0 gpio_in_h[24] port 749 nsew -flabel metal3 s 41737 956329 42193 956399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] +flabel metal3 s 41737 956329 42197 956399 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] port 309 nsew -flabel metal3 s 41737 958169 42193 958239 0 FreeSans 400 0 0 0 gpio_out[24] +flabel metal3 s 41737 958169 42197 958239 0 FreeSans 400 0 0 0 gpio_out[24] port 133 nsew -flabel metal3 s 41737 955041 42193 955111 0 FreeSans 400 0 0 0 gpio_oeb[24] +flabel metal3 s 41737 955041 42197 955111 0 FreeSans 400 0 0 0 gpio_oeb[24] port 177 nsew -flabel metal3 s 41737 962493 42193 962563 0 FreeSans 400 0 0 0 gpio_inp_dis[24] +flabel metal3 s 41737 962493 42197 962563 0 FreeSans 400 0 0 0 gpio_inp_dis[24] port 221 nsew -flabel metal3 s 41737 955685 42193 955755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] +flabel metal3 s 41737 955685 42197 955755 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] port 265 nsew -flabel metal3 s 41737 958721 42193 958791 0 FreeSans 400 0 0 0 gpio_holdover[24] +flabel metal3 s 41737 958721 42197 958791 0 FreeSans 400 0 0 0 gpio_holdover[24] port 397 nsew -flabel metal3 s 41737 959365 42193 959435 0 FreeSans 400 0 0 0 gpio_dm2[24] +flabel metal3 s 41737 959365 42197 959435 0 FreeSans 400 0 0 0 gpio_dm2[24] port 661 nsew -flabel metal3 s 41737 963689 42193 963759 0 FreeSans 400 0 0 0 gpio_dm0[24] +flabel metal3 s 41737 963689 42197 963759 0 FreeSans 400 0 0 0 gpio_dm0[24] port 573 nsew -flabel metal3 s 41737 960009 42193 960079 0 FreeSans 400 0 0 0 gpio_analog_sel[24] +flabel metal3 s 41737 960009 42197 960079 0 FreeSans 400 0 0 0 gpio_analog_sel[24] port 485 nsew -flabel metal3 s 41737 963045 42193 963115 0 FreeSans 400 0 0 0 gpio_analog_pol[24] +flabel metal3 s 41737 963045 42197 963115 0 FreeSans 400 0 0 0 gpio_analog_pol[24] port 529 nsew -flabel metal3 s 41737 964333 42193 964403 0 FreeSans 400 0 0 0 gpio_analog_en[24] +flabel metal3 s 41737 964333 42197 964403 0 FreeSans 400 0 0 0 gpio_analog_en[24] port 441 nsew -flabel metal3 s 41737 964814 42193 965028 0 FreeSans 400 0 0 0 analog_noesd_io[24] +flabel metal3 s 41737 964814 42197 965028 0 FreeSans 400 0 0 0 analog_noesd_io[24] port 925 nsew -flabel metal3 s 41737 966697 42193 966825 0 FreeSans 400 0 0 0 analog_io[24] +flabel metal3 s 41737 966697 42197 966825 0 FreeSans 400 0 0 0 analog_io[24] port 881 nsew flabel metal2 69635 995407 69695 995863 0 FreeSans 400 90 0 0 gpio_loopback_zero[23] port 794 nsew diff --git a/mag/openframe_project_wrapper.mag b/mag/openframe_project_wrapper.mag index bc000ea9..459eb065 100644 --- a/mag/openframe_project_wrapper.mag +++ b/mag/openframe_project_wrapper.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1695765213 +timestamp 1695840358 << metal2 >> rect 27498 953270 27558 953726 rect 29498 953270 29558 953726 @@ -323,597 +323,597 @@ rect 611578 -400 611630 56 rect 611802 -400 611854 56 rect 612026 -400 612078 56 << metal3 >> -rect 291362 953270 296142 953726 -rect 301342 953270 306122 953726 -rect 533562 953270 538342 953726 -rect 543542 953270 548322 953726 -rect 633270 929006 633726 929068 -rect -400 927072 56 927142 -rect 633270 927006 633726 927068 -rect -400 925232 56 925302 -rect 633270 925104 633726 925174 -rect -400 924560 56 924688 -rect 633270 924552 633726 924622 -rect 633270 923908 633726 923978 -rect -400 923392 56 923462 -rect 633270 923264 633726 923334 -rect -400 922677 56 922891 -rect -400 922196 56 922266 -rect -400 921552 56 921622 -rect 633270 921424 633726 921494 -rect -400 920908 56 920978 -rect 633270 920872 633726 920942 -rect -400 920356 56 920426 -rect 633270 920228 633726 920298 -rect 633270 919584 633726 919654 -rect -400 917872 56 917942 -rect -400 917228 56 917298 -rect 633270 917100 633726 917170 -rect -400 916584 56 916654 -rect 633270 916548 633726 916618 -rect -400 916032 56 916102 -rect 633270 915904 633726 915974 -rect 633270 915260 633726 915330 -rect 633270 914635 633726 914849 -rect -400 914192 56 914262 -rect 633270 914064 633726 914134 -rect -400 913548 56 913618 -rect -400 912904 56 912974 -rect 633270 912838 633726 912966 -rect -400 912352 56 912422 -rect 633270 912224 633726 912294 -rect 633270 910384 633726 910454 -rect -400 906644 56 906704 -rect -400 904644 56 904704 -rect -400 880014 56 884804 -rect -400 875054 56 879716 -rect -400 869964 56 874764 -rect -400 837742 56 842522 -rect 633270 839006 633726 839068 -rect 633270 837006 633726 837068 -rect 633270 835904 633726 835974 -rect 633270 835352 633726 835422 -rect 633270 834708 633726 834778 -rect 633270 834064 633726 834134 -rect -400 827762 56 832542 -rect 633270 832224 633726 832294 -rect 633270 831672 633726 831742 -rect 633270 831028 633726 831098 -rect 633270 830384 633726 830454 -rect 633270 827900 633726 827970 -rect 633270 827348 633726 827418 -rect 633270 826704 633726 826774 -rect 633270 826060 633726 826130 -rect 633270 825435 633726 825649 -rect 633270 824864 633726 824934 -rect 633270 823638 633726 823766 -rect 633270 823024 633726 823094 -rect 633270 821184 633726 821254 -rect -400 795542 56 800322 -rect -400 785562 56 790342 -rect 633270 786384 633726 791164 -rect 633270 776406 633726 781186 -rect -400 757272 56 757342 -rect -400 755432 56 755502 -rect -400 754760 56 754888 -rect -400 753592 56 753662 -rect -400 752877 56 753091 -rect -400 752396 56 752466 -rect -400 751752 56 751822 -rect -400 751108 56 751178 -rect -400 750556 56 750626 -rect 633270 750006 633726 750068 -rect -400 748072 56 748142 -rect 633270 748006 633726 748068 -rect -400 747428 56 747498 -rect -400 746784 56 746854 -rect 633270 746704 633726 746774 -rect -400 746232 56 746302 -rect 633270 746152 633726 746222 -rect 633270 745508 633726 745578 -rect 633270 744864 633726 744934 -rect -400 744392 56 744462 -rect -400 743748 56 743818 -rect -400 743104 56 743174 -rect 633270 743024 633726 743094 -rect -400 742552 56 742622 -rect 633270 742472 633726 742542 -rect 633270 741828 633726 741898 -rect 633270 741184 633726 741254 -rect 633270 738700 633726 738770 -rect 633270 738148 633726 738218 -rect 633270 737504 633726 737574 -rect 633270 736860 633726 736930 -rect -400 736644 56 736704 -rect 633270 736235 633726 736449 -rect 633270 735664 633726 735734 -rect -400 734644 56 734704 -rect 633270 734438 633726 734566 -rect 633270 733824 633726 733894 -rect 633270 731984 633726 732054 -rect -400 714072 56 714142 -rect -400 712232 56 712302 -rect -400 711560 56 711688 -rect -400 710392 56 710462 -rect -400 709677 56 709891 -rect -400 709196 56 709266 -rect -400 708552 56 708622 -rect -400 707908 56 707978 -rect -400 707356 56 707426 -rect 633270 705006 633726 705068 -rect -400 704872 56 704942 -rect -400 704228 56 704298 -rect -400 703584 56 703654 -rect -400 703032 56 703102 -rect 633270 703006 633726 703068 -rect 633270 701704 633726 701774 -rect -400 701192 56 701262 -rect 633270 701152 633726 701222 -rect -400 700548 56 700618 -rect 633270 700508 633726 700578 -rect -400 699904 56 699974 -rect 633270 699864 633726 699934 -rect -400 699352 56 699422 -rect 633270 698024 633726 698094 -rect 633270 697472 633726 697542 -rect 633270 696828 633726 696898 -rect 633270 696184 633726 696254 -rect -400 693644 56 693704 -rect 633270 693700 633726 693770 -rect 633270 693148 633726 693218 -rect 633270 692504 633726 692574 -rect 633270 691860 633726 691930 -rect -400 691644 56 691704 -rect 633270 691235 633726 691449 -rect 633270 690664 633726 690734 -rect 633270 689438 633726 689566 -rect 633270 688824 633726 688894 -rect 633270 686984 633726 687054 -rect -400 670872 56 670942 -rect -400 669032 56 669102 -rect -400 668360 56 668488 -rect -400 667192 56 667262 -rect -400 666477 56 666691 -rect -400 665996 56 666066 -rect -400 665352 56 665422 -rect -400 664708 56 664778 -rect -400 664156 56 664226 -rect -400 661672 56 661742 -rect -400 661028 56 661098 -rect -400 660384 56 660454 -rect 633270 660006 633726 660068 -rect -400 659832 56 659902 -rect -400 657992 56 658062 -rect 633270 658006 633726 658068 -rect -400 657348 56 657418 -rect -400 656704 56 656774 -rect 633270 656704 633726 656774 -rect -400 656152 56 656222 -rect 633270 656152 633726 656222 -rect 633270 655508 633726 655578 -rect 633270 654864 633726 654934 -rect 633270 653024 633726 653094 -rect 633270 652472 633726 652542 -rect 633270 651828 633726 651898 -rect 633270 651184 633726 651254 -rect -400 650644 56 650704 -rect -400 648644 56 648704 -rect 633270 648700 633726 648770 -rect 633270 648148 633726 648218 -rect 633270 647504 633726 647574 -rect 633270 646860 633726 646930 -rect 633270 646235 633726 646449 -rect 633270 645664 633726 645734 -rect 633270 644438 633726 644566 -rect 633270 643824 633726 643894 -rect 633270 641984 633726 642054 -rect -400 627672 56 627742 -rect -400 625832 56 625902 -rect -400 625160 56 625288 -rect -400 623992 56 624062 -rect -400 623277 56 623491 -rect -400 622796 56 622866 -rect -400 622152 56 622222 -rect -400 621508 56 621578 -rect -400 620956 56 621026 -rect -400 618472 56 618542 -rect -400 617828 56 617898 -rect -400 617184 56 617254 -rect -400 616632 56 616702 -rect 633270 615006 633726 615068 -rect -400 614792 56 614862 -rect -400 614148 56 614218 -rect -400 613504 56 613574 -rect -400 612952 56 613022 -rect 633270 613006 633726 613068 -rect 633270 611504 633726 611574 -rect 633270 610952 633726 611022 -rect 633270 610308 633726 610378 -rect 633270 609664 633726 609734 -rect 633270 607824 633726 607894 -rect -400 607644 56 607704 -rect 633270 607272 633726 607342 -rect 633270 606628 633726 606698 -rect 633270 605984 633726 606054 -rect -400 605644 56 605704 -rect 633270 603500 633726 603570 -rect 633270 602948 633726 603018 -rect 633270 602304 633726 602374 -rect 633270 601660 633726 601730 -rect 633270 601035 633726 601249 -rect 633270 600464 633726 600534 -rect 633270 599238 633726 599366 -rect 633270 598624 633726 598694 -rect 633270 596784 633726 596854 -rect -400 584472 56 584542 -rect -400 582632 56 582702 -rect -400 581960 56 582088 -rect -400 580792 56 580862 -rect -400 580077 56 580291 -rect -400 579596 56 579666 -rect -400 578952 56 579022 -rect -400 578308 56 578378 -rect -400 577756 56 577826 -rect -400 575272 56 575342 -rect -400 574628 56 574698 -rect -400 573984 56 574054 -rect -400 573432 56 573502 -rect -400 571592 56 571662 -rect -400 570948 56 571018 -rect -400 570304 56 570374 -rect 633270 570006 633726 570068 -rect -400 569752 56 569822 -rect 633270 568006 633726 568068 -rect 633270 566504 633726 566574 -rect 633270 565952 633726 566022 -rect 633270 565308 633726 565378 -rect -400 564644 56 564704 -rect 633270 564664 633726 564734 -rect 633270 562824 633726 562894 -rect -400 562644 56 562704 -rect 633270 562272 633726 562342 -rect 633270 561628 633726 561698 -rect 633270 560984 633726 561054 -rect 633270 558500 633726 558570 -rect 633270 557948 633726 558018 -rect 633270 557304 633726 557374 -rect 633270 556660 633726 556730 -rect 633270 556035 633726 556249 -rect 633270 555464 633726 555534 -rect 633270 554238 633726 554366 -rect 633270 553624 633726 553694 -rect 633270 551784 633726 551854 -rect -400 541272 56 541342 -rect -400 539432 56 539502 -rect -400 538760 56 538888 -rect -400 537592 56 537662 -rect -400 536877 56 537091 -rect -400 536396 56 536466 -rect -400 535752 56 535822 -rect -400 535108 56 535178 -rect -400 534556 56 534626 -rect -400 532072 56 532142 -rect -400 531428 56 531498 -rect -400 530784 56 530854 -rect -400 530232 56 530302 -rect -400 528392 56 528462 -rect -400 527748 56 527818 -rect -400 527104 56 527174 -rect -400 526552 56 526622 -rect 633270 525006 633726 525068 -rect 633270 523005 633726 523067 -rect -400 521644 56 521704 -rect 633270 521304 633726 521374 -rect 633270 520752 633726 520822 -rect 633270 520108 633726 520178 -rect -400 519644 56 519704 -rect 633270 519464 633726 519534 -rect 633270 517624 633726 517694 -rect 633270 517072 633726 517142 -rect 633270 516428 633726 516498 -rect 633270 515784 633726 515854 -rect 633270 513300 633726 513370 -rect 633270 512748 633726 512818 -rect 633270 512104 633726 512174 -rect 633270 511460 633726 511530 -rect 633270 510835 633726 511049 -rect 633270 510264 633726 510334 -rect 633270 509038 633726 509166 -rect 633270 508424 633726 508494 -rect 633270 506584 633726 506654 -rect -400 498072 56 498142 -rect -400 496232 56 496302 -rect -400 495560 56 495688 -rect -400 494392 56 494462 -rect -400 493677 56 493891 -rect -400 493196 56 493266 -rect -400 492552 56 492622 -rect -400 491908 56 491978 -rect -400 491356 56 491426 -rect -400 488872 56 488942 -rect -400 488228 56 488298 -rect -400 487584 56 487654 -rect -400 487032 56 487102 -rect -400 485192 56 485262 -rect -400 484548 56 484618 -rect -400 483904 56 483974 -rect -400 483352 56 483422 -rect -400 478644 56 478704 -rect -400 476644 56 476704 -rect 633270 471784 633726 476564 -rect 633270 461804 633726 466584 -rect -400 450940 56 455720 -rect -400 440962 56 445742 -rect 633270 427762 633726 432562 -rect 633270 422810 633726 427472 -rect 633270 417722 633726 422512 -rect -400 408814 56 413604 -rect -400 403862 56 408514 -rect -400 398762 56 403562 -rect 633270 383584 633726 388364 -rect 633270 373606 633726 378386 -rect -400 370472 56 370542 -rect -400 368632 56 368702 -rect -400 367960 56 368088 -rect -400 366792 56 366862 -rect -400 366077 56 366291 -rect -400 365596 56 365666 -rect -400 364952 56 365022 -rect -400 364308 56 364378 -rect -400 363756 56 363826 -rect -400 361272 56 361342 -rect -400 360628 56 360698 -rect -400 359984 56 360054 -rect -400 359432 56 359502 -rect -400 357592 56 357662 -rect -400 356948 56 357018 -rect -400 356304 56 356374 -rect -400 355752 56 355822 -rect -400 349644 56 349704 -rect 633270 348006 633726 348068 -rect -400 347644 56 347704 -rect 633270 346005 633726 346067 -rect 633270 344104 633726 344174 -rect 633270 343552 633726 343622 -rect 633270 342908 633726 342978 -rect 633270 342264 633726 342334 -rect 633270 340424 633726 340494 -rect 633270 339872 633726 339942 -rect 633270 339228 633726 339298 -rect 633270 338584 633726 338654 -rect 633270 336100 633726 336170 -rect 633270 335548 633726 335618 -rect 633270 334904 633726 334974 -rect 633270 334260 633726 334330 -rect 633270 333635 633726 333849 -rect 633270 333064 633726 333134 -rect 633270 331838 633726 331966 -rect 633270 331224 633726 331294 -rect 633270 329384 633726 329454 -rect -400 327272 56 327342 -rect -400 325432 56 325502 -rect -400 324760 56 324888 -rect -400 323592 56 323662 -rect -400 322877 56 323091 -rect -400 322396 56 322466 -rect -400 321752 56 321822 -rect -400 321108 56 321178 -rect -400 320556 56 320626 -rect -400 318072 56 318142 -rect -400 317428 56 317498 -rect -400 316784 56 316854 -rect -400 316232 56 316302 -rect -400 314392 56 314462 -rect -400 313748 56 313818 -rect -400 313104 56 313174 -rect -400 312552 56 312622 -rect -400 306644 56 306704 -rect -400 304644 56 304704 -rect 633270 303006 633726 303068 -rect 633270 301005 633726 301067 -rect 633270 298904 633726 298974 -rect 633270 298352 633726 298422 -rect 633270 297708 633726 297778 -rect 633270 297064 633726 297134 -rect 633270 295224 633726 295294 -rect 633270 294672 633726 294742 -rect 633270 294028 633726 294098 -rect 633270 293384 633726 293454 -rect 633270 290900 633726 290970 -rect 633270 290348 633726 290418 -rect 633270 289704 633726 289774 -rect 633270 289060 633726 289130 -rect 633270 288435 633726 288649 -rect 633270 287864 633726 287934 -rect 633270 286638 633726 286766 -rect 633270 286024 633726 286094 -rect 633270 284184 633726 284254 -rect -400 284072 56 284142 -rect -400 282232 56 282302 -rect -400 281560 56 281688 -rect -400 280392 56 280462 -rect -400 279677 56 279891 -rect -400 279196 56 279266 -rect -400 278552 56 278622 -rect -400 277908 56 277978 -rect -400 277356 56 277426 -rect -400 274872 56 274942 -rect -400 274228 56 274298 -rect -400 273584 56 273654 -rect -400 273032 56 273102 -rect -400 271192 56 271262 -rect -400 270548 56 270618 -rect -400 269904 56 269974 -rect -400 269352 56 269422 -rect -400 263644 56 263704 -rect -400 261644 56 261704 -rect 633270 258006 633726 258068 -rect 633270 256005 633726 256067 -rect 633270 253904 633726 253974 -rect 633270 253352 633726 253422 -rect 633270 252708 633726 252778 -rect 633270 252064 633726 252134 -rect 633270 250224 633726 250294 -rect 633270 249672 633726 249742 -rect 633270 249028 633726 249098 -rect 633270 248384 633726 248454 -rect 633270 245900 633726 245970 -rect 633270 245348 633726 245418 -rect 633270 244704 633726 244774 -rect 633270 244060 633726 244130 -rect 633270 243435 633726 243649 -rect 633270 242864 633726 242934 -rect 633270 241638 633726 241766 -rect 633270 241024 633726 241094 -rect -400 240872 56 240942 -rect 633270 239184 633726 239254 -rect -400 239032 56 239102 -rect -400 238360 56 238488 -rect -400 237192 56 237262 -rect -400 236477 56 236691 -rect -400 235996 56 236066 -rect -400 235352 56 235422 -rect -400 234708 56 234778 -rect -400 234156 56 234226 -rect -400 231672 56 231742 -rect -400 231028 56 231098 -rect -400 230384 56 230454 -rect -400 229832 56 229902 -rect -400 227992 56 228062 -rect -400 227348 56 227418 -rect -400 226704 56 226774 -rect -400 226152 56 226222 -rect -400 220644 56 220704 -rect -400 218644 56 218704 -rect 633270 213006 633726 213068 -rect 633270 211005 633726 211067 -rect 633270 208904 633726 208974 -rect 633270 208352 633726 208422 -rect 633270 207708 633726 207778 -rect 633270 207064 633726 207134 -rect 633270 205224 633726 205294 -rect 633270 204672 633726 204742 -rect 633270 204028 633726 204098 -rect 633270 203384 633726 203454 -rect 633270 200900 633726 200970 -rect 633270 200348 633726 200418 -rect 633270 199704 633726 199774 -rect 633270 199060 633726 199130 -rect 633270 198435 633726 198649 -rect 633270 197864 633726 197934 -rect -400 197672 56 197742 -rect 633270 196638 633726 196766 -rect 633270 196024 633726 196094 -rect -400 195832 56 195902 -rect -400 195160 56 195288 -rect 633270 194184 633726 194254 -rect -400 193992 56 194062 -rect -400 193277 56 193491 -rect -400 192796 56 192866 -rect -400 192152 56 192222 -rect -400 191508 56 191578 -rect -400 190956 56 191026 -rect -400 188472 56 188542 -rect -400 187828 56 187898 -rect -400 187184 56 187254 -rect -400 186632 56 186702 -rect -400 184792 56 184862 -rect -400 184148 56 184218 -rect -400 183504 56 183574 -rect -400 182952 56 183022 -rect -400 177644 56 177704 -rect -400 175644 56 175704 -rect 633270 168006 633726 168068 -rect 633270 166005 633726 166067 -rect 633270 163704 633726 163774 -rect 633270 163152 633726 163222 -rect 633270 162508 633726 162578 -rect 633270 161864 633726 161934 -rect 633270 160024 633726 160094 -rect 633270 159472 633726 159542 -rect 633270 158828 633726 158898 -rect 633270 158184 633726 158254 -rect 633270 155700 633726 155770 -rect 633270 155148 633726 155218 -rect -400 154472 56 154542 -rect 633270 154504 633726 154574 -rect 633270 153860 633726 153930 -rect 633270 153235 633726 153449 -rect -400 152632 56 152702 -rect 633270 152664 633726 152734 -rect -400 151960 56 152088 -rect 633270 151438 633726 151566 -rect -400 150792 56 150862 -rect 633270 150824 633726 150894 -rect -400 150077 56 150291 -rect -400 149596 56 149666 -rect -400 148952 56 149022 -rect 633270 148984 633726 149054 -rect -400 148308 56 148378 -rect -400 147756 56 147826 -rect -400 145272 56 145342 -rect -400 144628 56 144698 -rect -400 143984 56 144054 -rect -400 143432 56 143502 -rect -400 141592 56 141662 -rect -400 140948 56 141018 -rect -400 140304 56 140374 -rect -400 139752 56 139822 -rect -400 134644 56 134704 -rect -400 132644 56 132704 -rect 633270 123006 633726 123068 -rect 633270 121005 633726 121067 -rect 633270 118704 633726 118774 -rect 633270 118152 633726 118222 -rect 633270 117508 633726 117578 -rect 633270 116864 633726 116934 -rect 633270 115024 633726 115094 -rect 633270 114472 633726 114542 -rect 633270 113828 633726 113898 -rect 633270 113184 633726 113254 -rect 633270 110700 633726 110770 -rect 633270 110148 633726 110218 -rect 633270 109504 633726 109574 -rect 633270 108860 633726 108930 -rect 633270 108235 633726 108449 -rect 633270 107664 633726 107734 -rect 633270 106438 633726 106566 -rect 633270 105824 633726 105894 -rect 633270 103984 633726 104054 -rect -400 78140 56 82920 -rect 633270 78006 633726 78068 -rect 633270 76005 633726 76067 -rect 633270 73504 633726 73574 -rect 633270 72952 633726 73022 -rect -400 68162 56 72942 -rect 633270 72308 633726 72378 -rect 633270 71664 633726 71734 -rect 633270 69824 633726 69894 -rect 633270 69272 633726 69342 -rect 633270 68628 633726 68698 -rect 633270 67984 633726 68054 -rect 633270 65500 633726 65570 -rect 633270 64948 633726 65018 -rect 633270 64304 633726 64374 -rect 633270 63660 633726 63730 -rect 633270 63035 633726 63249 -rect 633270 62464 633726 62534 -rect 633270 61238 633726 61366 -rect 633270 60624 633726 60694 -rect 633270 58784 633726 58854 -rect -400 53595 56 53665 -rect -400 53372 56 53442 -rect -400 53147 56 53217 -rect -400 36014 56 40804 -rect -400 25962 56 30762 -rect 36806 -400 41586 56 -rect 46784 -400 51564 56 -rect 199284 -400 203914 56 -rect 209164 -400 213964 56 -rect 527006 -400 531786 56 -rect 536984 -400 541764 56 -rect 580806 -400 585586 56 -rect 590784 -400 595564 56 +rect 291362 953266 296142 953726 +rect 301342 953266 306122 953726 +rect 533562 953266 538342 953726 +rect 543542 953266 548322 953726 +rect 633266 929006 633726 929068 +rect -400 927072 60 927142 +rect 633266 927006 633726 927068 +rect -400 925232 60 925302 +rect 633266 925104 633726 925174 +rect -400 924560 60 924688 +rect 633266 924552 633726 924622 +rect 633266 923908 633726 923978 +rect -400 923392 60 923462 +rect 633266 923264 633726 923334 +rect -400 922677 60 922891 +rect -400 922196 60 922266 +rect -400 921552 60 921622 +rect 633266 921424 633726 921494 +rect -400 920908 60 920978 +rect 633266 920872 633726 920942 +rect -400 920356 60 920426 +rect 633266 920228 633726 920298 +rect 633266 919584 633726 919654 +rect -400 917872 60 917942 +rect -400 917228 60 917298 +rect 633266 917100 633726 917170 +rect -400 916584 60 916654 +rect 633266 916548 633726 916618 +rect -400 916032 60 916102 +rect 633266 915904 633726 915974 +rect 633266 915260 633726 915330 +rect 633266 914635 633726 914849 +rect -400 914192 60 914262 +rect 633266 914064 633726 914134 +rect -400 913548 60 913618 +rect -400 912904 60 912974 +rect 633266 912838 633726 912966 +rect -400 912352 60 912422 +rect 633266 912224 633726 912294 +rect 633266 910384 633726 910454 +rect -400 906644 60 906704 +rect -400 904644 60 904704 +rect -400 880014 60 884804 +rect -400 875054 60 879716 +rect -400 869964 60 874764 +rect -400 837742 60 842522 +rect 633266 839006 633726 839068 +rect 633266 837006 633726 837068 +rect 633266 835904 633726 835974 +rect 633266 835352 633726 835422 +rect 633266 834708 633726 834778 +rect 633266 834064 633726 834134 +rect -400 827762 60 832542 +rect 633266 832224 633726 832294 +rect 633266 831672 633726 831742 +rect 633266 831028 633726 831098 +rect 633266 830384 633726 830454 +rect 633266 827900 633726 827970 +rect 633266 827348 633726 827418 +rect 633266 826704 633726 826774 +rect 633266 826060 633726 826130 +rect 633266 825435 633726 825649 +rect 633266 824864 633726 824934 +rect 633266 823638 633726 823766 +rect 633266 823024 633726 823094 +rect 633266 821184 633726 821254 +rect -400 795542 60 800322 +rect -400 785562 60 790342 +rect 633266 786384 633726 791164 +rect 633266 776406 633726 781186 +rect -400 757272 60 757342 +rect -400 755432 60 755502 +rect -400 754760 60 754888 +rect -400 753592 60 753662 +rect -400 752877 60 753091 +rect -400 752396 60 752466 +rect -400 751752 60 751822 +rect -400 751108 60 751178 +rect -400 750556 60 750626 +rect 633266 750006 633726 750068 +rect -400 748072 60 748142 +rect 633266 748006 633726 748068 +rect -400 747428 60 747498 +rect -400 746784 60 746854 +rect 633266 746704 633726 746774 +rect -400 746232 60 746302 +rect 633266 746152 633726 746222 +rect 633266 745508 633726 745578 +rect 633266 744864 633726 744934 +rect -400 744392 60 744462 +rect -400 743748 60 743818 +rect -400 743104 60 743174 +rect 633266 743024 633726 743094 +rect -400 742552 60 742622 +rect 633266 742472 633726 742542 +rect 633266 741828 633726 741898 +rect 633266 741184 633726 741254 +rect 633266 738700 633726 738770 +rect 633266 738148 633726 738218 +rect 633266 737504 633726 737574 +rect 633266 736860 633726 736930 +rect -400 736644 60 736704 +rect 633266 736235 633726 736449 +rect 633266 735664 633726 735734 +rect -400 734644 60 734704 +rect 633266 734438 633726 734566 +rect 633266 733824 633726 733894 +rect 633266 731984 633726 732054 +rect -400 714072 60 714142 +rect -400 712232 60 712302 +rect -400 711560 60 711688 +rect -400 710392 60 710462 +rect -400 709677 60 709891 +rect -400 709196 60 709266 +rect -400 708552 60 708622 +rect -400 707908 60 707978 +rect -400 707356 60 707426 +rect 633266 705006 633726 705068 +rect -400 704872 60 704942 +rect -400 704228 60 704298 +rect -400 703584 60 703654 +rect -400 703032 60 703102 +rect 633266 703006 633726 703068 +rect 633266 701704 633726 701774 +rect -400 701192 60 701262 +rect 633266 701152 633726 701222 +rect -400 700548 60 700618 +rect 633266 700508 633726 700578 +rect -400 699904 60 699974 +rect 633266 699864 633726 699934 +rect -400 699352 60 699422 +rect 633266 698024 633726 698094 +rect 633266 697472 633726 697542 +rect 633266 696828 633726 696898 +rect 633266 696184 633726 696254 +rect -400 693644 60 693704 +rect 633266 693700 633726 693770 +rect 633266 693148 633726 693218 +rect 633266 692504 633726 692574 +rect 633266 691860 633726 691930 +rect -400 691644 60 691704 +rect 633266 691235 633726 691449 +rect 633266 690664 633726 690734 +rect 633266 689438 633726 689566 +rect 633266 688824 633726 688894 +rect 633266 686984 633726 687054 +rect -400 670872 60 670942 +rect -400 669032 60 669102 +rect -400 668360 60 668488 +rect -400 667192 60 667262 +rect -400 666477 60 666691 +rect -400 665996 60 666066 +rect -400 665352 60 665422 +rect -400 664708 60 664778 +rect -400 664156 60 664226 +rect -400 661672 60 661742 +rect -400 661028 60 661098 +rect -400 660384 60 660454 +rect 633266 660006 633726 660068 +rect -400 659832 60 659902 +rect -400 657992 60 658062 +rect 633266 658006 633726 658068 +rect -400 657348 60 657418 +rect -400 656704 60 656774 +rect 633266 656704 633726 656774 +rect -400 656152 60 656222 +rect 633266 656152 633726 656222 +rect 633266 655508 633726 655578 +rect 633266 654864 633726 654934 +rect 633266 653024 633726 653094 +rect 633266 652472 633726 652542 +rect 633266 651828 633726 651898 +rect 633266 651184 633726 651254 +rect -400 650644 60 650704 +rect -400 648644 60 648704 +rect 633266 648700 633726 648770 +rect 633266 648148 633726 648218 +rect 633266 647504 633726 647574 +rect 633266 646860 633726 646930 +rect 633266 646235 633726 646449 +rect 633266 645664 633726 645734 +rect 633266 644438 633726 644566 +rect 633266 643824 633726 643894 +rect 633266 641984 633726 642054 +rect -400 627672 60 627742 +rect -400 625832 60 625902 +rect -400 625160 60 625288 +rect -400 623992 60 624062 +rect -400 623277 60 623491 +rect -400 622796 60 622866 +rect -400 622152 60 622222 +rect -400 621508 60 621578 +rect -400 620956 60 621026 +rect -400 618472 60 618542 +rect -400 617828 60 617898 +rect -400 617184 60 617254 +rect -400 616632 60 616702 +rect 633266 615006 633726 615068 +rect -400 614792 60 614862 +rect -400 614148 60 614218 +rect -400 613504 60 613574 +rect -400 612952 60 613022 +rect 633266 613006 633726 613068 +rect 633266 611504 633726 611574 +rect 633266 610952 633726 611022 +rect 633266 610308 633726 610378 +rect 633266 609664 633726 609734 +rect 633266 607824 633726 607894 +rect -400 607644 60 607704 +rect 633266 607272 633726 607342 +rect 633266 606628 633726 606698 +rect 633266 605984 633726 606054 +rect -400 605644 60 605704 +rect 633266 603500 633726 603570 +rect 633266 602948 633726 603018 +rect 633266 602304 633726 602374 +rect 633266 601660 633726 601730 +rect 633266 601035 633726 601249 +rect 633266 600464 633726 600534 +rect 633266 599238 633726 599366 +rect 633266 598624 633726 598694 +rect 633266 596784 633726 596854 +rect -400 584472 60 584542 +rect -400 582632 60 582702 +rect -400 581960 60 582088 +rect -400 580792 60 580862 +rect -400 580077 60 580291 +rect -400 579596 60 579666 +rect -400 578952 60 579022 +rect -400 578308 60 578378 +rect -400 577756 60 577826 +rect -400 575272 60 575342 +rect -400 574628 60 574698 +rect -400 573984 60 574054 +rect -400 573432 60 573502 +rect -400 571592 60 571662 +rect -400 570948 60 571018 +rect -400 570304 60 570374 +rect 633266 570006 633726 570068 +rect -400 569752 60 569822 +rect 633266 568006 633726 568068 +rect 633266 566504 633726 566574 +rect 633266 565952 633726 566022 +rect 633266 565308 633726 565378 +rect -400 564644 60 564704 +rect 633266 564664 633726 564734 +rect 633266 562824 633726 562894 +rect -400 562644 60 562704 +rect 633266 562272 633726 562342 +rect 633266 561628 633726 561698 +rect 633266 560984 633726 561054 +rect 633266 558500 633726 558570 +rect 633266 557948 633726 558018 +rect 633266 557304 633726 557374 +rect 633266 556660 633726 556730 +rect 633266 556035 633726 556249 +rect 633266 555464 633726 555534 +rect 633266 554238 633726 554366 +rect 633266 553624 633726 553694 +rect 633266 551784 633726 551854 +rect -400 541272 60 541342 +rect -400 539432 60 539502 +rect -400 538760 60 538888 +rect -400 537592 60 537662 +rect -400 536877 60 537091 +rect -400 536396 60 536466 +rect -400 535752 60 535822 +rect -400 535108 60 535178 +rect -400 534556 60 534626 +rect -400 532072 60 532142 +rect -400 531428 60 531498 +rect -400 530784 60 530854 +rect -400 530232 60 530302 +rect -400 528392 60 528462 +rect -400 527748 60 527818 +rect -400 527104 60 527174 +rect -400 526552 60 526622 +rect 633266 525006 633726 525068 +rect 633266 523005 633726 523067 +rect -400 521644 60 521704 +rect 633266 521304 633726 521374 +rect 633266 520752 633726 520822 +rect 633266 520108 633726 520178 +rect -400 519644 60 519704 +rect 633266 519464 633726 519534 +rect 633266 517624 633726 517694 +rect 633266 517072 633726 517142 +rect 633266 516428 633726 516498 +rect 633266 515784 633726 515854 +rect 633266 513300 633726 513370 +rect 633266 512748 633726 512818 +rect 633266 512104 633726 512174 +rect 633266 511460 633726 511530 +rect 633266 510835 633726 511049 +rect 633266 510264 633726 510334 +rect 633266 509038 633726 509166 +rect 633266 508424 633726 508494 +rect 633266 506584 633726 506654 +rect -400 498072 60 498142 +rect -400 496232 60 496302 +rect -400 495560 60 495688 +rect -400 494392 60 494462 +rect -400 493677 60 493891 +rect -400 493196 60 493266 +rect -400 492552 60 492622 +rect -400 491908 60 491978 +rect -400 491356 60 491426 +rect -400 488872 60 488942 +rect -400 488228 60 488298 +rect -400 487584 60 487654 +rect -400 487032 60 487102 +rect -400 485192 60 485262 +rect -400 484548 60 484618 +rect -400 483904 60 483974 +rect -400 483352 60 483422 +rect -400 478644 60 478704 +rect -400 476644 60 476704 +rect 633266 471784 633726 476564 +rect 633266 461804 633726 466584 +rect -400 450940 60 455720 +rect -400 440962 60 445742 +rect 633266 427762 633726 432562 +rect 633266 422810 633726 427472 +rect 633266 417722 633726 422512 +rect -400 408814 60 413604 +rect -400 403862 60 408514 +rect -400 398762 60 403562 +rect 633266 383584 633726 388364 +rect 633266 373606 633726 378386 +rect -400 370472 60 370542 +rect -400 368632 60 368702 +rect -400 367960 60 368088 +rect -400 366792 60 366862 +rect -400 366077 60 366291 +rect -400 365596 60 365666 +rect -400 364952 60 365022 +rect -400 364308 60 364378 +rect -400 363756 60 363826 +rect -400 361272 60 361342 +rect -400 360628 60 360698 +rect -400 359984 60 360054 +rect -400 359432 60 359502 +rect -400 357592 60 357662 +rect -400 356948 60 357018 +rect -400 356304 60 356374 +rect -400 355752 60 355822 +rect -400 349644 60 349704 +rect 633266 348006 633726 348068 +rect -400 347644 60 347704 +rect 633266 346005 633726 346067 +rect 633266 344104 633726 344174 +rect 633266 343552 633726 343622 +rect 633266 342908 633726 342978 +rect 633266 342264 633726 342334 +rect 633266 340424 633726 340494 +rect 633266 339872 633726 339942 +rect 633266 339228 633726 339298 +rect 633266 338584 633726 338654 +rect 633266 336100 633726 336170 +rect 633266 335548 633726 335618 +rect 633266 334904 633726 334974 +rect 633266 334260 633726 334330 +rect 633266 333635 633726 333849 +rect 633266 333064 633726 333134 +rect 633266 331838 633726 331966 +rect 633266 331224 633726 331294 +rect 633266 329384 633726 329454 +rect -400 327272 60 327342 +rect -400 325432 60 325502 +rect -400 324760 60 324888 +rect -400 323592 60 323662 +rect -400 322877 60 323091 +rect -400 322396 60 322466 +rect -400 321752 60 321822 +rect -400 321108 60 321178 +rect -400 320556 60 320626 +rect -400 318072 60 318142 +rect -400 317428 60 317498 +rect -400 316784 60 316854 +rect -400 316232 60 316302 +rect -400 314392 60 314462 +rect -400 313748 60 313818 +rect -400 313104 60 313174 +rect -400 312552 60 312622 +rect -400 306644 60 306704 +rect -400 304644 60 304704 +rect 633266 303006 633726 303068 +rect 633266 301005 633726 301067 +rect 633266 298904 633726 298974 +rect 633266 298352 633726 298422 +rect 633266 297708 633726 297778 +rect 633266 297064 633726 297134 +rect 633266 295224 633726 295294 +rect 633266 294672 633726 294742 +rect 633266 294028 633726 294098 +rect 633266 293384 633726 293454 +rect 633266 290900 633726 290970 +rect 633266 290348 633726 290418 +rect 633266 289704 633726 289774 +rect 633266 289060 633726 289130 +rect 633266 288435 633726 288649 +rect 633266 287864 633726 287934 +rect 633266 286638 633726 286766 +rect 633266 286024 633726 286094 +rect 633266 284184 633726 284254 +rect -400 284072 60 284142 +rect -400 282232 60 282302 +rect -400 281560 60 281688 +rect -400 280392 60 280462 +rect -400 279677 60 279891 +rect -400 279196 60 279266 +rect -400 278552 60 278622 +rect -400 277908 60 277978 +rect -400 277356 60 277426 +rect -400 274872 60 274942 +rect -400 274228 60 274298 +rect -400 273584 60 273654 +rect -400 273032 60 273102 +rect -400 271192 60 271262 +rect -400 270548 60 270618 +rect -400 269904 60 269974 +rect -400 269352 60 269422 +rect -400 263644 60 263704 +rect -400 261644 60 261704 +rect 633266 258006 633726 258068 +rect 633266 256005 633726 256067 +rect 633266 253904 633726 253974 +rect 633266 253352 633726 253422 +rect 633266 252708 633726 252778 +rect 633266 252064 633726 252134 +rect 633266 250224 633726 250294 +rect 633266 249672 633726 249742 +rect 633266 249028 633726 249098 +rect 633266 248384 633726 248454 +rect 633266 245900 633726 245970 +rect 633266 245348 633726 245418 +rect 633266 244704 633726 244774 +rect 633266 244060 633726 244130 +rect 633266 243435 633726 243649 +rect 633266 242864 633726 242934 +rect 633266 241638 633726 241766 +rect 633266 241024 633726 241094 +rect -400 240872 60 240942 +rect 633266 239184 633726 239254 +rect -400 239032 60 239102 +rect -400 238360 60 238488 +rect -400 237192 60 237262 +rect -400 236477 60 236691 +rect -400 235996 60 236066 +rect -400 235352 60 235422 +rect -400 234708 60 234778 +rect -400 234156 60 234226 +rect -400 231672 60 231742 +rect -400 231028 60 231098 +rect -400 230384 60 230454 +rect -400 229832 60 229902 +rect -400 227992 60 228062 +rect -400 227348 60 227418 +rect -400 226704 60 226774 +rect -400 226152 60 226222 +rect -400 220644 60 220704 +rect -400 218644 60 218704 +rect 633266 213006 633726 213068 +rect 633266 211005 633726 211067 +rect 633266 208904 633726 208974 +rect 633266 208352 633726 208422 +rect 633266 207708 633726 207778 +rect 633266 207064 633726 207134 +rect 633266 205224 633726 205294 +rect 633266 204672 633726 204742 +rect 633266 204028 633726 204098 +rect 633266 203384 633726 203454 +rect 633266 200900 633726 200970 +rect 633266 200348 633726 200418 +rect 633266 199704 633726 199774 +rect 633266 199060 633726 199130 +rect 633266 198435 633726 198649 +rect 633266 197864 633726 197934 +rect -400 197672 60 197742 +rect 633266 196638 633726 196766 +rect 633266 196024 633726 196094 +rect -400 195832 60 195902 +rect -400 195160 60 195288 +rect 633266 194184 633726 194254 +rect -400 193992 60 194062 +rect -400 193277 60 193491 +rect -400 192796 60 192866 +rect -400 192152 60 192222 +rect -400 191508 60 191578 +rect -400 190956 60 191026 +rect -400 188472 60 188542 +rect -400 187828 60 187898 +rect -400 187184 60 187254 +rect -400 186632 60 186702 +rect -400 184792 60 184862 +rect -400 184148 60 184218 +rect -400 183504 60 183574 +rect -400 182952 60 183022 +rect -400 177644 60 177704 +rect -400 175644 60 175704 +rect 633266 168006 633726 168068 +rect 633266 166005 633726 166067 +rect 633266 163704 633726 163774 +rect 633266 163152 633726 163222 +rect 633266 162508 633726 162578 +rect 633266 161864 633726 161934 +rect 633266 160024 633726 160094 +rect 633266 159472 633726 159542 +rect 633266 158828 633726 158898 +rect 633266 158184 633726 158254 +rect 633266 155700 633726 155770 +rect 633266 155148 633726 155218 +rect -400 154472 60 154542 +rect 633266 154504 633726 154574 +rect 633266 153860 633726 153930 +rect 633266 153235 633726 153449 +rect -400 152632 60 152702 +rect 633266 152664 633726 152734 +rect -400 151960 60 152088 +rect 633266 151438 633726 151566 +rect -400 150792 60 150862 +rect 633266 150824 633726 150894 +rect -400 150077 60 150291 +rect -400 149596 60 149666 +rect -400 148952 60 149022 +rect 633266 148984 633726 149054 +rect -400 148308 60 148378 +rect -400 147756 60 147826 +rect -400 145272 60 145342 +rect -400 144628 60 144698 +rect -400 143984 60 144054 +rect -400 143432 60 143502 +rect -400 141592 60 141662 +rect -400 140948 60 141018 +rect -400 140304 60 140374 +rect -400 139752 60 139822 +rect -400 134644 60 134704 +rect -400 132644 60 132704 +rect 633266 123006 633726 123068 +rect 633266 121005 633726 121067 +rect 633266 118704 633726 118774 +rect 633266 118152 633726 118222 +rect 633266 117508 633726 117578 +rect 633266 116864 633726 116934 +rect 633266 115024 633726 115094 +rect 633266 114472 633726 114542 +rect 633266 113828 633726 113898 +rect 633266 113184 633726 113254 +rect 633266 110700 633726 110770 +rect 633266 110148 633726 110218 +rect 633266 109504 633726 109574 +rect 633266 108860 633726 108930 +rect 633266 108235 633726 108449 +rect 633266 107664 633726 107734 +rect 633266 106438 633726 106566 +rect 633266 105824 633726 105894 +rect 633266 103984 633726 104054 +rect -400 78140 60 82920 +rect 633266 78006 633726 78068 +rect 633266 76005 633726 76067 +rect 633266 73504 633726 73574 +rect 633266 72952 633726 73022 +rect -400 68162 60 72942 +rect 633266 72308 633726 72378 +rect 633266 71664 633726 71734 +rect 633266 69824 633726 69894 +rect 633266 69272 633726 69342 +rect 633266 68628 633726 68698 +rect 633266 67984 633726 68054 +rect 633266 65500 633726 65570 +rect 633266 64948 633726 65018 +rect 633266 64304 633726 64374 +rect 633266 63660 633726 63730 +rect 633266 63035 633726 63249 +rect 633266 62464 633726 62534 +rect 633266 61238 633726 61366 +rect 633266 60624 633726 60694 +rect 633266 58784 633726 58854 +rect -400 53595 60 53665 +rect -400 53372 60 53442 +rect -400 53147 60 53217 +rect -400 36014 60 40804 +rect -400 25962 60 30762 +rect 36806 -400 41586 60 +rect 46784 -400 51564 60 +rect 199284 -400 203914 60 +rect 209164 -400 213964 60 +rect 527006 -400 531786 60 +rect 536984 -400 541764 60 +rect 580806 -400 585586 60 +rect 590784 -400 595564 60 << comment >> rect -400 953326 633726 953726 rect -400 0 0 953326 @@ -1371,62 +1371,62 @@ flabel metal2 s 432910 -400 432966 56 0 FreeSans 400 90 0 0 gpio_in_h[42] port 731 nsew flabel metal2 s 487710 -400 487766 56 0 FreeSans 400 90 0 0 gpio_in_h[43] port 730 nsew -flabel metal3 633270 422810 633726 427472 0 FreeSans 3200 90 0 0 vccd1 +flabel metal3 633266 422810 633726 427472 0 FreeSans 3200 90 0 0 vccd1 port 28 nsew -flabel metal3 s 633270 786384 633726 791164 0 FreeSans 3200 90 0 0 vdda1 +flabel metal3 s 633266 786384 633726 791164 0 FreeSans 3200 90 0 0 vdda1 port 24 nsew -flabel metal3 s 633270 471784 633726 476564 0 FreeSans 3200 90 0 0 vdda1 +flabel metal3 s 633266 471784 633726 476564 0 FreeSans 3200 90 0 0 vdda1 port 24 nsew -flabel metal3 s 633270 383584 633726 388364 0 FreeSans 3200 90 0 0 vssa1 +flabel metal3 s 633266 383584 633726 388364 0 FreeSans 3200 90 0 0 vssa1 port 26 nsew -flabel metal3 s 533562 953270 538342 953726 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 533562 953266 538342 953726 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 291362 953270 296142 953726 0 FreeSans 3200 0 0 0 vssio +flabel metal3 291362 953266 296142 953726 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 -400 880014 56 884804 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 -400 880014 60 884804 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 -400 827762 56 832542 0 FreeSans 3200 90 0 0 vddio +flabel metal3 -400 827762 60 832542 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 -400 785562 56 790342 0 FreeSans 3200 90 0 0 vssa2 +flabel metal3 -400 785562 60 790342 0 FreeSans 3200 90 0 0 vssa2 port 27 nsew -flabel metal3 -400 440962 56 445742 0 FreeSans 3200 90 0 0 vdda2 +flabel metal3 -400 440962 60 445742 0 FreeSans 3200 90 0 0 vdda2 port 25 nsew -flabel metal3 -400 68162 56 72942 0 FreeSans 3200 90 0 0 vddio +flabel metal3 -400 68162 60 72942 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 536984 -400 541764 56 0 FreeSans 3200 0 0 0 vssio +flabel metal3 536984 -400 541764 60 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 590784 -400 595564 56 0 FreeSans 3200 0 0 0 vdda +flabel metal3 590784 -400 595564 60 0 FreeSans 3200 0 0 0 vdda port 22 nsew flabel comment s 107715 141850 108715 141850 0 FreeSans 1120000 60 0 0 example -flabel metal3 s 633270 556035 633726 556249 0 FreeSans 400 0 0 0 analog_noesd_io[8] +flabel metal3 s 633266 556035 633726 556249 0 FreeSans 400 0 0 0 analog_noesd_io[8] port 941 nsew -flabel metal3 -400 906644 56 906704 0 FreeSans 400 0 0 0 gpio_loopback_one[24] +flabel metal3 -400 906644 60 906704 0 FreeSans 400 0 0 0 gpio_loopback_one[24] port 837 nsew -flabel metal3 -400 736644 56 736704 0 FreeSans 400 0 0 0 gpio_loopback_one[25] +flabel metal3 -400 736644 60 736704 0 FreeSans 400 0 0 0 gpio_loopback_one[25] port 836 nsew -flabel metal3 -400 693644 56 693704 0 FreeSans 400 0 0 0 gpio_loopback_one[26] +flabel metal3 -400 693644 60 693704 0 FreeSans 400 0 0 0 gpio_loopback_one[26] port 835 nsew -flabel metal3 -400 650644 56 650704 0 FreeSans 400 0 0 0 gpio_loopback_one[27] +flabel metal3 -400 650644 60 650704 0 FreeSans 400 0 0 0 gpio_loopback_one[27] port 834 nsew -flabel metal3 -400 607644 56 607704 0 FreeSans 400 0 0 0 gpio_loopback_one[28] +flabel metal3 -400 607644 60 607704 0 FreeSans 400 0 0 0 gpio_loopback_one[28] port 833 nsew -flabel metal3 -400 564644 56 564704 0 FreeSans 400 0 0 0 gpio_loopback_one[29] +flabel metal3 -400 564644 60 564704 0 FreeSans 400 0 0 0 gpio_loopback_one[29] port 832 nsew -flabel metal3 -400 521644 56 521704 0 FreeSans 400 0 0 0 gpio_loopback_one[30] +flabel metal3 -400 521644 60 521704 0 FreeSans 400 0 0 0 gpio_loopback_one[30] port 831 nsew -flabel metal3 -400 478644 56 478704 0 FreeSans 400 0 0 0 gpio_loopback_one[31] +flabel metal3 -400 478644 60 478704 0 FreeSans 400 0 0 0 gpio_loopback_one[31] port 830 nsew -flabel metal3 -400 349644 56 349704 0 FreeSans 400 0 0 0 gpio_loopback_one[32] +flabel metal3 -400 349644 60 349704 0 FreeSans 400 0 0 0 gpio_loopback_one[32] port 829 nsew -flabel metal3 -400 306644 56 306704 0 FreeSans 400 0 0 0 gpio_loopback_one[33] +flabel metal3 -400 306644 60 306704 0 FreeSans 400 0 0 0 gpio_loopback_one[33] port 828 nsew -flabel metal3 -400 263644 56 263704 0 FreeSans 400 0 0 0 gpio_loopback_one[34] +flabel metal3 -400 263644 60 263704 0 FreeSans 400 0 0 0 gpio_loopback_one[34] port 827 nsew -flabel metal3 -400 220644 56 220704 0 FreeSans 400 0 0 0 gpio_loopback_one[35] +flabel metal3 -400 220644 60 220704 0 FreeSans 400 0 0 0 gpio_loopback_one[35] port 826 nsew -flabel metal3 -400 177644 56 177704 0 FreeSans 400 0 0 0 gpio_loopback_one[36] +flabel metal3 -400 177644 60 177704 0 FreeSans 400 0 0 0 gpio_loopback_one[36] port 825 nsew -flabel metal3 -400 134644 56 134704 0 FreeSans 400 0 0 0 gpio_loopback_one[37] +flabel metal3 -400 134644 60 134704 0 FreeSans 400 0 0 0 gpio_loopback_one[37] port 824 nsew flabel metal2 s 488380 -400 488432 56 0 FreeSans 400 90 0 0 gpio_loopback_one[43] port 818 nsew @@ -1456,13 +1456,13 @@ flabel metal2 s 110164 -400 110220 56 0 FreeSans 400 90 0 0 resetb_l port 37 nsew flabel metal2 s 99576 -400 99632 56 0 FreeSans 400 90 0 0 resetb_h port 36 nsew -flabel metal3 -400 53372 56 53442 0 FreeSans 400 0 0 0 por_l +flabel metal3 -400 53372 60 53442 0 FreeSans 400 0 0 0 por_l port 35 nsew -flabel metal3 -400 53595 56 53665 0 FreeSans 400 0 0 0 porb_l +flabel metal3 -400 53595 60 53665 0 FreeSans 400 0 0 0 porb_l port 34 nsew flabel metal2 s 605082 -400 605134 56 0 FreeSans 400 90 0 0 mask_rev[0] port 69 nsew -flabel metal3 -400 53147 56 53217 0 FreeSans 400 0 0 0 porb_h +flabel metal3 -400 53147 60 53217 0 FreeSans 400 0 0 0 porb_h port 33 nsew flabel metal2 578298 953270 578358 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[15] port 846 nsew @@ -1482,21 +1482,21 @@ flabel metal2 80698 953270 80758 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[ port 839 nsew flabel metal2 29498 953270 29558 953726 0 FreeSans 400 90 0 0 gpio_loopback_one[23] port 838 nsew -flabel metal3 633270 523005 633726 523067 0 FreeSans 400 0 0 0 gpio_loopback_one[7] +flabel metal3 633266 523005 633726 523067 0 FreeSans 400 0 0 0 gpio_loopback_one[7] port 854 nsew -flabel metal3 633270 346005 633726 346067 0 FreeSans 400 0 0 0 gpio_loopback_one[6] +flabel metal3 633266 346005 633726 346067 0 FreeSans 400 0 0 0 gpio_loopback_one[6] port 855 nsew -flabel metal3 633270 301005 633726 301067 0 FreeSans 400 0 0 0 gpio_loopback_one[5] +flabel metal3 633266 301005 633726 301067 0 FreeSans 400 0 0 0 gpio_loopback_one[5] port 856 nsew -flabel metal3 633270 256005 633726 256067 0 FreeSans 400 0 0 0 gpio_loopback_one[4] +flabel metal3 633266 256005 633726 256067 0 FreeSans 400 0 0 0 gpio_loopback_one[4] port 857 nsew -flabel metal3 633270 211005 633726 211067 0 FreeSans 400 0 0 0 gpio_loopback_one[3] +flabel metal3 633266 211005 633726 211067 0 FreeSans 400 0 0 0 gpio_loopback_one[3] port 858 nsew -flabel metal3 633270 166005 633726 166067 0 FreeSans 400 0 0 0 gpio_loopback_one[2] +flabel metal3 633266 166005 633726 166067 0 FreeSans 400 0 0 0 gpio_loopback_one[2] port 859 nsew -flabel metal3 633270 121005 633726 121067 0 FreeSans 400 0 0 0 gpio_loopback_one[1] +flabel metal3 633266 121005 633726 121067 0 FreeSans 400 0 0 0 gpio_loopback_one[1] port 860 nsew -flabel metal3 633270 76005 633726 76067 0 FreeSans 400 0 0 0 gpio_loopback_one[0] +flabel metal3 633266 76005 633726 76067 0 FreeSans 400 0 0 0 gpio_loopback_one[0] port 861 nsew flabel metal2 s 605978 -400 606030 56 0 FreeSans 400 90 0 0 mask_rev[4] port 65 nsew @@ -1517,7 +1517,7 @@ port 58 nsew flabel metal2 s 607770 -400 607822 56 0 FreeSans 400 90 0 0 mask_rev[12] port 57 nsew flabel metal2 s 607994 -400 608046 56 0 FreeSans 400 90 0 0 mask_rev[13] -port 56 nsew +port 60 nsew flabel metal2 s 608218 -400 608270 56 0 FreeSans 400 90 0 0 mask_rev[14] port 55 nsew flabel metal2 s 608442 -400 608494 56 0 FreeSans 400 90 0 0 mask_rev[15] @@ -1560,97 +1560,97 @@ flabel metal2 s 605530 -400 605582 56 0 FreeSans 400 90 0 0 mask_rev[2] port 67 nsew flabel metal2 s 605306 -400 605358 56 0 FreeSans 400 90 0 0 mask_rev[1] port 68 nsew -flabel metal3 -400 734644 56 734704 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] +flabel metal3 -400 734644 60 734704 0 FreeSans 400 0 0 0 gpio_loopback_zero[25] port 792 nsew -flabel metal3 -400 648644 56 648704 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] +flabel metal3 -400 648644 60 648704 0 FreeSans 400 0 0 0 gpio_loopback_zero[27] port 790 nsew -flabel metal3 -400 562644 56 562704 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] +flabel metal3 -400 562644 60 562704 0 FreeSans 400 0 0 0 gpio_loopback_zero[29] port 788 nsew -flabel metal3 -400 476644 56 476704 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] +flabel metal3 -400 476644 60 476704 0 FreeSans 400 0 0 0 gpio_loopback_zero[31] port 786 nsew -flabel metal3 -400 304644 56 304704 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] +flabel metal3 -400 304644 60 304704 0 FreeSans 400 0 0 0 gpio_loopback_zero[33] port 784 nsew -flabel metal3 -400 218644 56 218704 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] +flabel metal3 -400 218644 60 218704 0 FreeSans 400 0 0 0 gpio_loopback_zero[35] port 782 nsew -flabel metal3 -400 132644 56 132704 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] +flabel metal3 -400 132644 60 132704 0 FreeSans 400 0 0 0 gpio_loopback_zero[37] port 780 nsew -flabel metal3 -400 904644 56 904704 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] +flabel metal3 -400 904644 60 904704 0 FreeSans 400 0 0 0 gpio_loopback_zero[24] port 793 nsew -flabel metal3 -400 691644 56 691704 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] +flabel metal3 -400 691644 60 691704 0 FreeSans 400 0 0 0 gpio_loopback_zero[26] port 791 nsew -flabel metal3 -400 605644 56 605704 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] +flabel metal3 -400 605644 60 605704 0 FreeSans 400 0 0 0 gpio_loopback_zero[28] port 789 nsew -flabel metal3 -400 519644 56 519704 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] +flabel metal3 -400 519644 60 519704 0 FreeSans 400 0 0 0 gpio_loopback_zero[30] port 787 nsew -flabel metal3 -400 347644 56 347704 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] +flabel metal3 -400 347644 60 347704 0 FreeSans 400 0 0 0 gpio_loopback_zero[32] port 785 nsew -flabel metal3 -400 261644 56 261704 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] +flabel metal3 -400 261644 60 261704 0 FreeSans 400 0 0 0 gpio_loopback_zero[34] port 783 nsew -flabel metal3 -400 175644 56 175704 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] +flabel metal3 -400 175644 60 175704 0 FreeSans 400 0 0 0 gpio_loopback_zero[36] port 781 nsew flabel metal2 147030 -400 147086 56 0 FreeSans 400 270 0 0 gpio_slow_sel[38] port 339 nsew flabel metal2 145190 -400 145246 56 0 FreeSans 400 270 0 0 gpio_in[38] port 691 nsew -flabel metal3 46784 -400 51564 56 0 FreeSans 3200 0 0 0 vssa +flabel metal3 46784 -400 51564 60 0 FreeSans 3200 0 0 0 vssa port 23 nsew -flabel metal3 633270 61238 633726 61366 0 FreeSans 400 0 0 0 analog_io[0] +flabel metal3 633266 61238 633726 61366 0 FreeSans 400 0 0 0 analog_io[0] port 905 nsew -flabel metal3 633270 63035 633726 63249 0 FreeSans 400 0 0 0 analog_noesd_io[0] +flabel metal3 633266 63035 633726 63249 0 FreeSans 400 0 0 0 analog_noesd_io[0] port 949 nsew -flabel metal3 633270 108235 633726 108449 0 FreeSans 400 0 0 0 analog_noesd_io[1] +flabel metal3 633266 108235 633726 108449 0 FreeSans 400 0 0 0 analog_noesd_io[1] port 948 nsew -flabel metal3 633270 106438 633726 106566 0 FreeSans 400 0 0 0 analog_io[1] +flabel metal3 633266 106438 633726 106566 0 FreeSans 400 0 0 0 analog_io[1] port 904 nsew -flabel metal3 633270 151438 633726 151566 0 FreeSans 400 0 0 0 analog_io[2] +flabel metal3 633266 151438 633726 151566 0 FreeSans 400 0 0 0 analog_io[2] port 903 nsew -flabel metal3 633270 153235 633726 153449 0 FreeSans 400 0 0 0 analog_noesd_io[2] +flabel metal3 633266 153235 633726 153449 0 FreeSans 400 0 0 0 analog_noesd_io[2] port 947 nsew -flabel metal3 633270 196638 633726 196766 0 FreeSans 400 0 0 0 analog_io[3] +flabel metal3 633266 196638 633726 196766 0 FreeSans 400 0 0 0 analog_io[3] port 902 nsew -flabel metal3 633270 198435 633726 198649 0 FreeSans 400 0 0 0 analog_noesd_io[3] +flabel metal3 633266 198435 633726 198649 0 FreeSans 400 0 0 0 analog_noesd_io[3] port 946 nsew -flabel metal3 633270 241638 633726 241766 0 FreeSans 400 0 0 0 analog_io[4] +flabel metal3 633266 241638 633726 241766 0 FreeSans 400 0 0 0 analog_io[4] port 901 nsew -flabel metal3 633270 243435 633726 243649 0 FreeSans 400 0 0 0 analog_noesd_io[4] +flabel metal3 633266 243435 633726 243649 0 FreeSans 400 0 0 0 analog_noesd_io[4] port 945 nsew -flabel metal3 633270 286638 633726 286766 0 FreeSans 400 0 0 0 analog_io[5] +flabel metal3 633266 286638 633726 286766 0 FreeSans 400 0 0 0 analog_io[5] port 900 nsew -flabel metal3 633270 288435 633726 288649 0 FreeSans 400 0 0 0 analog_noesd_io[5] +flabel metal3 633266 288435 633726 288649 0 FreeSans 400 0 0 0 analog_noesd_io[5] port 944 nsew -flabel metal3 633270 331838 633726 331966 0 FreeSans 400 0 0 0 analog_io[6] +flabel metal3 633266 331838 633726 331966 0 FreeSans 400 0 0 0 analog_io[6] port 899 nsew -flabel metal3 633270 333635 633726 333849 0 FreeSans 400 0 0 0 analog_noesd_io[6] +flabel metal3 633266 333635 633726 333849 0 FreeSans 400 0 0 0 analog_noesd_io[6] port 943 nsew -flabel metal3 s 633270 509038 633726 509166 0 FreeSans 400 0 0 0 analog_io[7] +flabel metal3 s 633266 509038 633726 509166 0 FreeSans 400 0 0 0 analog_io[7] port 898 nsew -flabel metal3 s 633270 510835 633726 511049 0 FreeSans 400 0 0 0 analog_noesd_io[7] +flabel metal3 s 633266 510835 633726 511049 0 FreeSans 400 0 0 0 analog_noesd_io[7] port 942 nsew -flabel metal3 s 633270 554238 633726 554366 0 FreeSans 400 0 0 0 analog_io[8] +flabel metal3 s 633266 554238 633726 554366 0 FreeSans 400 0 0 0 analog_io[8] port 897 nsew -flabel metal3 s 633270 599238 633726 599366 0 FreeSans 400 0 0 0 analog_io[9] +flabel metal3 s 633266 599238 633726 599366 0 FreeSans 400 0 0 0 analog_io[9] port 896 nsew -flabel metal3 s 633270 601035 633726 601249 0 FreeSans 400 0 0 0 analog_noesd_io[9] +flabel metal3 s 633266 601035 633726 601249 0 FreeSans 400 0 0 0 analog_noesd_io[9] port 940 nsew -flabel metal3 s 633270 644438 633726 644566 0 FreeSans 400 0 0 0 analog_io[10] +flabel metal3 s 633266 644438 633726 644566 0 FreeSans 400 0 0 0 analog_io[10] port 895 nsew -flabel metal3 s 633270 646235 633726 646449 0 FreeSans 400 0 0 0 analog_noesd_io[10] +flabel metal3 s 633266 646235 633726 646449 0 FreeSans 400 0 0 0 analog_noesd_io[10] port 939 nsew -flabel metal3 s 633270 689438 633726 689566 0 FreeSans 400 0 0 0 analog_io[11] +flabel metal3 s 633266 689438 633726 689566 0 FreeSans 400 0 0 0 analog_io[11] port 894 nsew -flabel metal3 s 633270 691235 633726 691449 0 FreeSans 400 0 0 0 analog_noesd_io[11] +flabel metal3 s 633266 691235 633726 691449 0 FreeSans 400 0 0 0 analog_noesd_io[11] port 938 nsew -flabel metal3 s 633270 734438 633726 734566 0 FreeSans 400 0 0 0 analog_io[12] +flabel metal3 s 633266 734438 633726 734566 0 FreeSans 400 0 0 0 analog_io[12] port 893 nsew -flabel metal3 s 633270 823638 633726 823766 0 FreeSans 400 0 0 0 analog_io[13] +flabel metal3 s 633266 823638 633726 823766 0 FreeSans 400 0 0 0 analog_io[13] port 892 nsew -flabel metal3 s 633270 912838 633726 912966 0 FreeSans 400 0 0 0 analog_io[14] +flabel metal3 s 633266 912838 633726 912966 0 FreeSans 400 0 0 0 analog_io[14] port 891 nsew -flabel metal3 s 633270 736235 633726 736449 0 FreeSans 400 0 0 0 analog_noesd_io[12] +flabel metal3 s 633266 736235 633726 736449 0 FreeSans 400 0 0 0 analog_noesd_io[12] port 937 nsew -flabel metal3 s 633270 825435 633726 825649 0 FreeSans 400 0 0 0 analog_noesd_io[13] +flabel metal3 s 633266 825435 633726 825649 0 FreeSans 400 0 0 0 analog_noesd_io[13] port 936 nsew -flabel metal3 s 633270 914635 633726 914849 0 FreeSans 400 0 0 0 analog_noesd_io[14] +flabel metal3 s 633266 914635 633726 914849 0 FreeSans 400 0 0 0 analog_noesd_io[14] port 935 nsew flabel metal2 s 596360 953270 596488 953726 0 FreeSans 400 90 0 0 analog_io[15] port 890 nsew @@ -1688,55 +1688,55 @@ flabel metal2 s 96077 953270 96291 953726 0 FreeSans 400 90 0 0 analog_noesd_io[ port 927 nsew flabel metal2 s 44677 953270 44891 953726 0 FreeSans 400 90 0 0 analog_noesd_io[23] port 926 nsew -flabel metal3 s -400 754760 56 754888 0 FreeSans 400 0 0 0 analog_io[25] +flabel metal3 s -400 754760 60 754888 0 FreeSans 400 0 0 0 analog_io[25] port 880 nsew -flabel metal3 s -400 711560 56 711688 0 FreeSans 400 0 0 0 analog_io[26] +flabel metal3 s -400 711560 60 711688 0 FreeSans 400 0 0 0 analog_io[26] port 879 nsew -flabel metal3 s -400 668360 56 668488 0 FreeSans 400 0 0 0 analog_io[27] +flabel metal3 s -400 668360 60 668488 0 FreeSans 400 0 0 0 analog_io[27] port 878 nsew -flabel metal3 s -400 625160 56 625288 0 FreeSans 400 0 0 0 analog_io[28] +flabel metal3 s -400 625160 60 625288 0 FreeSans 400 0 0 0 analog_io[28] port 877 nsew -flabel metal3 s -400 581960 56 582088 0 FreeSans 400 0 0 0 analog_io[29] +flabel metal3 s -400 581960 60 582088 0 FreeSans 400 0 0 0 analog_io[29] port 876 nsew -flabel metal3 s -400 538760 56 538888 0 FreeSans 400 0 0 0 analog_io[30] +flabel metal3 s -400 538760 60 538888 0 FreeSans 400 0 0 0 analog_io[30] port 875 nsew -flabel metal3 s -400 495560 56 495688 0 FreeSans 400 0 0 0 analog_io[31] +flabel metal3 s -400 495560 60 495688 0 FreeSans 400 0 0 0 analog_io[31] port 874 nsew -flabel metal3 s -400 367960 56 368088 0 FreeSans 400 0 0 0 analog_io[32] +flabel metal3 s -400 367960 60 368088 0 FreeSans 400 0 0 0 analog_io[32] port 873 nsew -flabel metal3 s -400 324760 56 324888 0 FreeSans 400 0 0 0 analog_io[33] +flabel metal3 s -400 324760 60 324888 0 FreeSans 400 0 0 0 analog_io[33] port 872 nsew -flabel metal3 s -400 281560 56 281688 0 FreeSans 400 0 0 0 analog_io[34] +flabel metal3 s -400 281560 60 281688 0 FreeSans 400 0 0 0 analog_io[34] port 871 nsew -flabel metal3 s -400 238360 56 238488 0 FreeSans 400 0 0 0 analog_io[35] +flabel metal3 s -400 238360 60 238488 0 FreeSans 400 0 0 0 analog_io[35] port 870 nsew -flabel metal3 s -400 195160 56 195288 0 FreeSans 400 0 0 0 analog_io[36] +flabel metal3 s -400 195160 60 195288 0 FreeSans 400 0 0 0 analog_io[36] port 869 nsew -flabel metal3 s -400 151960 56 152088 0 FreeSans 400 0 0 0 analog_io[37] +flabel metal3 s -400 151960 60 152088 0 FreeSans 400 0 0 0 analog_io[37] port 868 nsew -flabel metal3 s -400 752877 56 753091 0 FreeSans 400 0 0 0 analog_noesd_io[25] +flabel metal3 s -400 752877 60 753091 0 FreeSans 400 0 0 0 analog_noesd_io[25] port 924 nsew -flabel metal3 s -400 709677 56 709891 0 FreeSans 400 0 0 0 analog_noesd_io[26] +flabel metal3 s -400 709677 60 709891 0 FreeSans 400 0 0 0 analog_noesd_io[26] port 923 nsew -flabel metal3 s -400 666477 56 666691 0 FreeSans 400 0 0 0 analog_noesd_io[27] +flabel metal3 s -400 666477 60 666691 0 FreeSans 400 0 0 0 analog_noesd_io[27] port 922 nsew -flabel metal3 s -400 623277 56 623491 0 FreeSans 400 0 0 0 analog_noesd_io[28] +flabel metal3 s -400 623277 60 623491 0 FreeSans 400 0 0 0 analog_noesd_io[28] port 921 nsew -flabel metal3 s -400 580077 56 580291 0 FreeSans 400 0 0 0 analog_noesd_io[29] +flabel metal3 s -400 580077 60 580291 0 FreeSans 400 0 0 0 analog_noesd_io[29] port 920 nsew -flabel metal3 s -400 536877 56 537091 0 FreeSans 400 0 0 0 analog_noesd_io[30] +flabel metal3 s -400 536877 60 537091 0 FreeSans 400 0 0 0 analog_noesd_io[30] port 919 nsew -flabel metal3 s -400 366077 56 366291 0 FreeSans 400 0 0 0 analog_noesd_io[32] +flabel metal3 s -400 366077 60 366291 0 FreeSans 400 0 0 0 analog_noesd_io[32] port 917 nsew -flabel metal3 s -400 322877 56 323091 0 FreeSans 400 0 0 0 analog_noesd_io[33] +flabel metal3 s -400 322877 60 323091 0 FreeSans 400 0 0 0 analog_noesd_io[33] port 916 nsew -flabel metal3 s -400 279677 56 279891 0 FreeSans 400 0 0 0 analog_noesd_io[34] +flabel metal3 s -400 279677 60 279891 0 FreeSans 400 0 0 0 analog_noesd_io[34] port 915 nsew -flabel metal3 s -400 236477 56 236691 0 FreeSans 400 0 0 0 analog_noesd_io[35] +flabel metal3 s -400 236477 60 236691 0 FreeSans 400 0 0 0 analog_noesd_io[35] port 914 nsew -flabel metal3 s -400 193277 56 193491 0 FreeSans 400 0 0 0 analog_noesd_io[36] +flabel metal3 s -400 193277 60 193491 0 FreeSans 400 0 0 0 analog_noesd_io[36] port 913 nsew -flabel metal3 s -400 150077 56 150291 0 FreeSans 400 0 0 0 analog_noesd_io[37] +flabel metal3 s -400 150077 60 150291 0 FreeSans 400 0 0 0 analog_noesd_io[37] port 912 nsew flabel metal2 s 256238 -400 256366 56 0 FreeSans 400 90 0 0 analog_io[39] port 866 nsew @@ -1766,971 +1766,971 @@ flabel metal2 148870 -400 148926 56 0 FreeSans 400 270 0 0 gpio_dm1[38] port 603 nsew flabel metal2 150710 -400 150766 56 0 FreeSans 400 270 0 0 gpio_dm0[38] port 559 nsew -flabel metal3 s -400 493677 56 493891 0 FreeSans 400 0 0 0 analog_noesd_io[31] +flabel metal3 s -400 493677 60 493891 0 FreeSans 400 0 0 0 analog_noesd_io[31] port 918 nsew -flabel metal3 s 633270 373606 633726 378386 0 FreeSans 3200 90 0 0 vssa1 +flabel metal3 s 633266 373606 633726 378386 0 FreeSans 3200 90 0 0 vssa1 port 26 nsew -flabel metal3 633270 417722 633726 422512 0 FreeSans 3200 90 0 0 vssd1 +flabel metal3 633266 417722 633726 422512 0 FreeSans 3200 90 0 0 vssd1 port 30 nsew -flabel metal3 633270 427762 633726 432562 0 FreeSans 3200 90 0 0 vssd1 +flabel metal3 633266 427762 633726 432562 0 FreeSans 3200 90 0 0 vssd1 port 30 nsew -flabel metal3 s 633270 461804 633726 466584 0 FreeSans 3200 90 0 0 vdda1 +flabel metal3 s 633266 461804 633726 466584 0 FreeSans 3200 90 0 0 vdda1 port 24 nsew -flabel metal3 633270 568006 633726 568068 0 FreeSans 400 0 0 0 gpio_loopback_one[8] +flabel metal3 633266 568006 633726 568068 0 FreeSans 400 0 0 0 gpio_loopback_one[8] port 853 nsew -flabel metal3 633270 613006 633726 613068 0 FreeSans 400 0 0 0 gpio_loopback_one[9] +flabel metal3 633266 613006 633726 613068 0 FreeSans 400 0 0 0 gpio_loopback_one[9] port 852 nsew -flabel metal3 633270 658006 633726 658068 0 FreeSans 400 0 0 0 gpio_loopback_one[10] +flabel metal3 633266 658006 633726 658068 0 FreeSans 400 0 0 0 gpio_loopback_one[10] port 851 nsew -flabel metal3 633270 703006 633726 703068 0 FreeSans 400 0 0 0 gpio_loopback_one[11] +flabel metal3 633266 703006 633726 703068 0 FreeSans 400 0 0 0 gpio_loopback_one[11] port 850 nsew -flabel metal3 633270 748006 633726 748068 0 FreeSans 400 0 0 0 gpio_loopback_one[12] +flabel metal3 633266 748006 633726 748068 0 FreeSans 400 0 0 0 gpio_loopback_one[12] port 849 nsew -flabel metal3 s 633270 776406 633726 781186 0 FreeSans 3200 90 0 0 vdda1 +flabel metal3 s 633266 776406 633726 781186 0 FreeSans 3200 90 0 0 vdda1 port 24 nsew -flabel metal3 633270 837006 633726 837068 0 FreeSans 400 0 0 0 gpio_loopback_one[13] +flabel metal3 633266 837006 633726 837068 0 FreeSans 400 0 0 0 gpio_loopback_one[13] port 848 nsew -flabel metal3 633270 927006 633726 927068 0 FreeSans 400 0 0 0 gpio_loopback_one[14] +flabel metal3 633266 927006 633726 927068 0 FreeSans 400 0 0 0 gpio_loopback_one[14] port 847 nsew -flabel metal3 s 543542 953270 548322 953726 0 FreeSans 3200 0 0 0 vssa1 +flabel metal3 s 543542 953266 548322 953726 0 FreeSans 3200 0 0 0 vssa1 port 26 nsew -flabel metal3 301342 953270 306122 953726 0 FreeSans 3200 0 0 0 vssio +flabel metal3 301342 953266 306122 953726 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 -400 875054 56 879716 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 -400 875054 60 879716 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 -400 869964 56 874764 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 -400 869964 60 874764 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 -400 837742 56 842522 0 FreeSans 3200 90 0 0 vddio +flabel metal3 -400 837742 60 842522 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 -400 795542 56 800322 0 FreeSans 3200 90 0 0 vssa2 +flabel metal3 -400 795542 60 800322 0 FreeSans 3200 90 0 0 vssa2 port 27 nsew -flabel metal3 s -400 757272 56 757342 0 FreeSans 400 0 0 0 gpio_in[25] +flabel metal3 s -400 757272 60 757342 0 FreeSans 400 0 0 0 gpio_in[25] port 704 nsew -flabel metal3 s -400 755432 56 755502 0 FreeSans 400 0 0 0 gpio_slow_sel[25] +flabel metal3 s -400 755432 60 755502 0 FreeSans 400 0 0 0 gpio_slow_sel[25] port 352 nsew -flabel metal3 s -400 753592 56 753662 0 FreeSans 400 0 0 0 gpio_dm1[25] +flabel metal3 s -400 753592 60 753662 0 FreeSans 400 0 0 0 gpio_dm1[25] port 616 nsew -flabel metal3 s -400 752396 56 752466 0 FreeSans 400 0 0 0 gpio_analog_en[25] +flabel metal3 s -400 752396 60 752466 0 FreeSans 400 0 0 0 gpio_analog_en[25] port 440 nsew -flabel metal3 s -400 751752 56 751822 0 FreeSans 400 0 0 0 gpio_dm0[25] +flabel metal3 s -400 751752 60 751822 0 FreeSans 400 0 0 0 gpio_dm0[25] port 572 nsew -flabel metal3 s -400 751108 56 751178 0 FreeSans 400 0 0 0 gpio_analog_pol[25] +flabel metal3 s -400 751108 60 751178 0 FreeSans 400 0 0 0 gpio_analog_pol[25] port 528 nsew -flabel metal3 s -400 750556 56 750626 0 FreeSans 400 0 0 0 gpio_inp_dis[25] +flabel metal3 s -400 750556 60 750626 0 FreeSans 400 0 0 0 gpio_inp_dis[25] port 220 nsew -flabel metal3 s -400 748072 56 748142 0 FreeSans 400 0 0 0 gpio_analog_sel[25] +flabel metal3 s -400 748072 60 748142 0 FreeSans 400 0 0 0 gpio_analog_sel[25] port 484 nsew -flabel metal3 s -400 747428 56 747498 0 FreeSans 400 0 0 0 gpio_dm2[25] +flabel metal3 s -400 747428 60 747498 0 FreeSans 400 0 0 0 gpio_dm2[25] port 660 nsew -flabel metal3 s -400 746784 56 746854 0 FreeSans 400 0 0 0 gpio_holdover[25] +flabel metal3 s -400 746784 60 746854 0 FreeSans 400 0 0 0 gpio_holdover[25] port 396 nsew -flabel metal3 s -400 746232 56 746302 0 FreeSans 400 0 0 0 gpio_out[25] +flabel metal3 s -400 746232 60 746302 0 FreeSans 400 0 0 0 gpio_out[25] port 132 nsew -flabel metal3 s -400 744392 56 744462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] +flabel metal3 s -400 744392 60 744462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[25] port 308 nsew -flabel metal3 s -400 743748 56 743818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] +flabel metal3 s -400 743748 60 743818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[25] port 264 nsew -flabel metal3 s -400 743104 56 743174 0 FreeSans 400 0 0 0 gpio_oeb[25] +flabel metal3 s -400 743104 60 743174 0 FreeSans 400 0 0 0 gpio_oeb[25] port 176 nsew -flabel metal3 s -400 742552 56 742622 0 FreeSans 400 0 0 0 gpio_in_h[25] +flabel metal3 s -400 742552 60 742622 0 FreeSans 400 0 0 0 gpio_in_h[25] port 748 nsew -flabel metal3 s -400 714072 56 714142 0 FreeSans 400 0 0 0 gpio_in[26] +flabel metal3 s -400 714072 60 714142 0 FreeSans 400 0 0 0 gpio_in[26] port 703 nsew -flabel metal3 s -400 712232 56 712302 0 FreeSans 400 0 0 0 gpio_slow_sel[26] +flabel metal3 s -400 712232 60 712302 0 FreeSans 400 0 0 0 gpio_slow_sel[26] port 351 nsew -flabel metal3 s -400 710392 56 710462 0 FreeSans 400 0 0 0 gpio_dm1[26] +flabel metal3 s -400 710392 60 710462 0 FreeSans 400 0 0 0 gpio_dm1[26] port 615 nsew -flabel metal3 s -400 709196 56 709266 0 FreeSans 400 0 0 0 gpio_analog_en[26] +flabel metal3 s -400 709196 60 709266 0 FreeSans 400 0 0 0 gpio_analog_en[26] port 439 nsew -flabel metal3 s -400 708552 56 708622 0 FreeSans 400 0 0 0 gpio_dm0[26] +flabel metal3 s -400 708552 60 708622 0 FreeSans 400 0 0 0 gpio_dm0[26] port 571 nsew -flabel metal3 s -400 707908 56 707978 0 FreeSans 400 0 0 0 gpio_analog_pol[26] +flabel metal3 s -400 707908 60 707978 0 FreeSans 400 0 0 0 gpio_analog_pol[26] port 527 nsew -flabel metal3 s -400 707356 56 707426 0 FreeSans 400 0 0 0 gpio_inp_dis[26] +flabel metal3 s -400 707356 60 707426 0 FreeSans 400 0 0 0 gpio_inp_dis[26] port 219 nsew -flabel metal3 s -400 704872 56 704942 0 FreeSans 400 0 0 0 gpio_analog_sel[26] +flabel metal3 s -400 704872 60 704942 0 FreeSans 400 0 0 0 gpio_analog_sel[26] port 483 nsew -flabel metal3 s -400 704228 56 704298 0 FreeSans 400 0 0 0 gpio_dm2[26] +flabel metal3 s -400 704228 60 704298 0 FreeSans 400 0 0 0 gpio_dm2[26] port 659 nsew -flabel metal3 s -400 703584 56 703654 0 FreeSans 400 0 0 0 gpio_holdover[26] +flabel metal3 s -400 703584 60 703654 0 FreeSans 400 0 0 0 gpio_holdover[26] port 395 nsew -flabel metal3 s -400 703032 56 703102 0 FreeSans 400 0 0 0 gpio_out[26] +flabel metal3 s -400 703032 60 703102 0 FreeSans 400 0 0 0 gpio_out[26] port 131 nsew -flabel metal3 s -400 701192 56 701262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] +flabel metal3 s -400 701192 60 701262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[26] port 307 nsew -flabel metal3 s -400 700548 56 700618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] +flabel metal3 s -400 700548 60 700618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[26] port 263 nsew -flabel metal3 s -400 699904 56 699974 0 FreeSans 400 0 0 0 gpio_oeb[26] +flabel metal3 s -400 699904 60 699974 0 FreeSans 400 0 0 0 gpio_oeb[26] port 175 nsew -flabel metal3 s -400 699352 56 699422 0 FreeSans 400 0 0 0 gpio_in_h[26] +flabel metal3 s -400 699352 60 699422 0 FreeSans 400 0 0 0 gpio_in_h[26] port 747 nsew -flabel metal3 s -400 141592 56 141662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] +flabel metal3 s -400 141592 60 141662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[37] port 296 nsew -flabel metal3 s -400 149596 56 149666 0 FreeSans 400 0 0 0 gpio_analog_en[37] +flabel metal3 s -400 149596 60 149666 0 FreeSans 400 0 0 0 gpio_analog_en[37] port 428 nsew -flabel metal3 s -400 148308 56 148378 0 FreeSans 400 0 0 0 gpio_analog_pol[37] +flabel metal3 s -400 148308 60 148378 0 FreeSans 400 0 0 0 gpio_analog_pol[37] port 516 nsew -flabel metal3 s -400 145272 56 145342 0 FreeSans 400 0 0 0 gpio_analog_sel[37] +flabel metal3 s -400 145272 60 145342 0 FreeSans 400 0 0 0 gpio_analog_sel[37] port 472 nsew -flabel metal3 s -400 148952 56 149022 0 FreeSans 400 0 0 0 gpio_dm0[37] +flabel metal3 s -400 148952 60 149022 0 FreeSans 400 0 0 0 gpio_dm0[37] port 560 nsew -flabel metal3 s -400 144628 56 144698 0 FreeSans 400 0 0 0 gpio_dm2[37] +flabel metal3 s -400 144628 60 144698 0 FreeSans 400 0 0 0 gpio_dm2[37] port 648 nsew -flabel metal3 s -400 143984 56 144054 0 FreeSans 400 0 0 0 gpio_holdover[37] +flabel metal3 s -400 143984 60 144054 0 FreeSans 400 0 0 0 gpio_holdover[37] port 384 nsew -flabel metal3 s -400 140948 56 141018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] +flabel metal3 s -400 140948 60 141018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[37] port 252 nsew -flabel metal3 s -400 140304 56 140374 0 FreeSans 400 0 0 0 gpio_oeb[37] +flabel metal3 s -400 140304 60 140374 0 FreeSans 400 0 0 0 gpio_oeb[37] port 164 nsew -flabel metal3 s -400 143432 56 143502 0 FreeSans 400 0 0 0 gpio_out[37] +flabel metal3 s -400 143432 60 143502 0 FreeSans 400 0 0 0 gpio_out[37] port 120 nsew -flabel metal3 s -400 147756 56 147826 0 FreeSans 400 0 0 0 gpio_inp_dis[37] +flabel metal3 s -400 147756 60 147826 0 FreeSans 400 0 0 0 gpio_inp_dis[37] port 208 nsew -flabel metal3 s -400 139752 56 139822 0 FreeSans 400 0 0 0 gpio_in_h[37] +flabel metal3 s -400 139752 60 139822 0 FreeSans 400 0 0 0 gpio_in_h[37] port 736 nsew -flabel metal3 s -400 150792 56 150862 0 FreeSans 400 0 0 0 gpio_dm1[37] +flabel metal3 s -400 150792 60 150862 0 FreeSans 400 0 0 0 gpio_dm1[37] port 604 nsew -flabel metal3 s -400 152632 56 152702 0 FreeSans 400 0 0 0 gpio_slow_sel[37] +flabel metal3 s -400 152632 60 152702 0 FreeSans 400 0 0 0 gpio_slow_sel[37] port 340 nsew -flabel metal3 s -400 154472 56 154542 0 FreeSans 400 0 0 0 gpio_in[37] +flabel metal3 s -400 154472 60 154542 0 FreeSans 400 0 0 0 gpio_in[37] port 692 nsew -flabel metal3 s -400 187828 56 187898 0 FreeSans 400 0 0 0 gpio_dm2[36] +flabel metal3 s -400 187828 60 187898 0 FreeSans 400 0 0 0 gpio_dm2[36] port 649 nsew -flabel metal3 s -400 187184 56 187254 0 FreeSans 400 0 0 0 gpio_holdover[36] +flabel metal3 s -400 187184 60 187254 0 FreeSans 400 0 0 0 gpio_holdover[36] port 385 nsew -flabel metal3 s -400 184148 56 184218 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] +flabel metal3 s -400 184148 60 184218 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[36] port 253 nsew -flabel metal3 s -400 190956 56 191026 0 FreeSans 400 0 0 0 gpio_inp_dis[36] +flabel metal3 s -400 190956 60 191026 0 FreeSans 400 0 0 0 gpio_inp_dis[36] port 209 nsew -flabel metal3 s -400 183504 56 183574 0 FreeSans 400 0 0 0 gpio_oeb[36] +flabel metal3 s -400 183504 60 183574 0 FreeSans 400 0 0 0 gpio_oeb[36] port 165 nsew -flabel metal3 s -400 186632 56 186702 0 FreeSans 400 0 0 0 gpio_out[36] +flabel metal3 s -400 186632 60 186702 0 FreeSans 400 0 0 0 gpio_out[36] port 121 nsew -flabel metal3 s -400 184792 56 184862 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] +flabel metal3 s -400 184792 60 184862 0 FreeSans 400 0 0 0 gpio_vtrip_sel[36] port 297 nsew -flabel metal3 s -400 192796 56 192866 0 FreeSans 400 0 0 0 gpio_analog_en[36] +flabel metal3 s -400 192796 60 192866 0 FreeSans 400 0 0 0 gpio_analog_en[36] port 429 nsew -flabel metal3 s -400 191508 56 191578 0 FreeSans 400 0 0 0 gpio_analog_pol[36] +flabel metal3 s -400 191508 60 191578 0 FreeSans 400 0 0 0 gpio_analog_pol[36] port 517 nsew -flabel metal3 s -400 188472 56 188542 0 FreeSans 400 0 0 0 gpio_analog_sel[36] +flabel metal3 s -400 188472 60 188542 0 FreeSans 400 0 0 0 gpio_analog_sel[36] port 473 nsew -flabel metal3 s -400 192152 56 192222 0 FreeSans 400 0 0 0 gpio_dm0[36] +flabel metal3 s -400 192152 60 192222 0 FreeSans 400 0 0 0 gpio_dm0[36] port 561 nsew -flabel metal3 s -400 182952 56 183022 0 FreeSans 400 0 0 0 gpio_in_h[36] +flabel metal3 s -400 182952 60 183022 0 FreeSans 400 0 0 0 gpio_in_h[36] port 737 nsew -flabel metal3 s -400 193992 56 194062 0 FreeSans 400 0 0 0 gpio_dm1[36] +flabel metal3 s -400 193992 60 194062 0 FreeSans 400 0 0 0 gpio_dm1[36] port 605 nsew -flabel metal3 s -400 195832 56 195902 0 FreeSans 400 0 0 0 gpio_slow_sel[36] +flabel metal3 s -400 195832 60 195902 0 FreeSans 400 0 0 0 gpio_slow_sel[36] port 341 nsew -flabel metal3 s -400 197672 56 197742 0 FreeSans 400 0 0 0 gpio_in[36] +flabel metal3 s -400 197672 60 197742 0 FreeSans 400 0 0 0 gpio_in[36] port 693 nsew -flabel metal3 s -400 235996 56 236066 0 FreeSans 400 0 0 0 gpio_analog_en[35] +flabel metal3 s -400 235996 60 236066 0 FreeSans 400 0 0 0 gpio_analog_en[35] port 430 nsew -flabel metal3 s -400 234708 56 234778 0 FreeSans 400 0 0 0 gpio_analog_pol[35] +flabel metal3 s -400 234708 60 234778 0 FreeSans 400 0 0 0 gpio_analog_pol[35] port 518 nsew -flabel metal3 s -400 231672 56 231742 0 FreeSans 400 0 0 0 gpio_analog_sel[35] +flabel metal3 s -400 231672 60 231742 0 FreeSans 400 0 0 0 gpio_analog_sel[35] port 474 nsew -flabel metal3 s -400 235352 56 235422 0 FreeSans 400 0 0 0 gpio_dm0[35] +flabel metal3 s -400 235352 60 235422 0 FreeSans 400 0 0 0 gpio_dm0[35] port 562 nsew -flabel metal3 s -400 231028 56 231098 0 FreeSans 400 0 0 0 gpio_dm2[35] +flabel metal3 s -400 231028 60 231098 0 FreeSans 400 0 0 0 gpio_dm2[35] port 650 nsew -flabel metal3 s -400 230384 56 230454 0 FreeSans 400 0 0 0 gpio_holdover[35] +flabel metal3 s -400 230384 60 230454 0 FreeSans 400 0 0 0 gpio_holdover[35] port 386 nsew -flabel metal3 s -400 227348 56 227418 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] +flabel metal3 s -400 227348 60 227418 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[35] port 254 nsew -flabel metal3 s -400 234156 56 234226 0 FreeSans 400 0 0 0 gpio_inp_dis[35] +flabel metal3 s -400 234156 60 234226 0 FreeSans 400 0 0 0 gpio_inp_dis[35] port 210 nsew -flabel metal3 s -400 226704 56 226774 0 FreeSans 400 0 0 0 gpio_oeb[35] +flabel metal3 s -400 226704 60 226774 0 FreeSans 400 0 0 0 gpio_oeb[35] port 166 nsew -flabel metal3 s -400 229832 56 229902 0 FreeSans 400 0 0 0 gpio_out[35] +flabel metal3 s -400 229832 60 229902 0 FreeSans 400 0 0 0 gpio_out[35] port 122 nsew -flabel metal3 s -400 227992 56 228062 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] +flabel metal3 s -400 227992 60 228062 0 FreeSans 400 0 0 0 gpio_vtrip_sel[35] port 298 nsew -flabel metal3 s -400 226152 56 226222 0 FreeSans 400 0 0 0 gpio_in_h[35] +flabel metal3 s -400 226152 60 226222 0 FreeSans 400 0 0 0 gpio_in_h[35] port 738 nsew -flabel metal3 s -400 237192 56 237262 0 FreeSans 400 0 0 0 gpio_dm1[35] +flabel metal3 s -400 237192 60 237262 0 FreeSans 400 0 0 0 gpio_dm1[35] port 606 nsew -flabel metal3 s -400 239032 56 239102 0 FreeSans 400 0 0 0 gpio_slow_sel[35] +flabel metal3 s -400 239032 60 239102 0 FreeSans 400 0 0 0 gpio_slow_sel[35] port 342 nsew -flabel metal3 s -400 240872 56 240942 0 FreeSans 400 0 0 0 gpio_in[35] +flabel metal3 s -400 240872 60 240942 0 FreeSans 400 0 0 0 gpio_in[35] port 694 nsew -flabel metal3 s -400 279196 56 279266 0 FreeSans 400 0 0 0 gpio_analog_en[34] +flabel metal3 s -400 279196 60 279266 0 FreeSans 400 0 0 0 gpio_analog_en[34] port 431 nsew -flabel metal3 s -400 277908 56 277978 0 FreeSans 400 0 0 0 gpio_analog_pol[34] +flabel metal3 s -400 277908 60 277978 0 FreeSans 400 0 0 0 gpio_analog_pol[34] port 519 nsew -flabel metal3 s -400 274872 56 274942 0 FreeSans 400 0 0 0 gpio_analog_sel[34] +flabel metal3 s -400 274872 60 274942 0 FreeSans 400 0 0 0 gpio_analog_sel[34] port 475 nsew -flabel metal3 s -400 278552 56 278622 0 FreeSans 400 0 0 0 gpio_dm0[34] +flabel metal3 s -400 278552 60 278622 0 FreeSans 400 0 0 0 gpio_dm0[34] port 563 nsew -flabel metal3 s -400 274228 56 274298 0 FreeSans 400 0 0 0 gpio_dm2[34] +flabel metal3 s -400 274228 60 274298 0 FreeSans 400 0 0 0 gpio_dm2[34] port 651 nsew -flabel metal3 s -400 273584 56 273654 0 FreeSans 400 0 0 0 gpio_holdover[34] +flabel metal3 s -400 273584 60 273654 0 FreeSans 400 0 0 0 gpio_holdover[34] port 387 nsew -flabel metal3 s -400 270548 56 270618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] +flabel metal3 s -400 270548 60 270618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[34] port 255 nsew -flabel metal3 s -400 277356 56 277426 0 FreeSans 400 0 0 0 gpio_inp_dis[34] +flabel metal3 s -400 277356 60 277426 0 FreeSans 400 0 0 0 gpio_inp_dis[34] port 211 nsew -flabel metal3 s -400 269904 56 269974 0 FreeSans 400 0 0 0 gpio_oeb[34] +flabel metal3 s -400 269904 60 269974 0 FreeSans 400 0 0 0 gpio_oeb[34] port 167 nsew -flabel metal3 s -400 273032 56 273102 0 FreeSans 400 0 0 0 gpio_out[34] +flabel metal3 s -400 273032 60 273102 0 FreeSans 400 0 0 0 gpio_out[34] port 123 nsew -flabel metal3 s -400 271192 56 271262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] +flabel metal3 s -400 271192 60 271262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[34] port 299 nsew -flabel metal3 s -400 269352 56 269422 0 FreeSans 400 0 0 0 gpio_in_h[34] +flabel metal3 s -400 269352 60 269422 0 FreeSans 400 0 0 0 gpio_in_h[34] port 739 nsew -flabel metal3 s -400 280392 56 280462 0 FreeSans 400 0 0 0 gpio_dm1[34] +flabel metal3 s -400 280392 60 280462 0 FreeSans 400 0 0 0 gpio_dm1[34] port 607 nsew -flabel metal3 s -400 282232 56 282302 0 FreeSans 400 0 0 0 gpio_slow_sel[34] +flabel metal3 s -400 282232 60 282302 0 FreeSans 400 0 0 0 gpio_slow_sel[34] port 343 nsew -flabel metal3 s -400 284072 56 284142 0 FreeSans 400 0 0 0 gpio_in[34] +flabel metal3 s -400 284072 60 284142 0 FreeSans 400 0 0 0 gpio_in[34] port 695 nsew -flabel metal3 s -400 322396 56 322466 0 FreeSans 400 0 0 0 gpio_analog_en[33] +flabel metal3 s -400 322396 60 322466 0 FreeSans 400 0 0 0 gpio_analog_en[33] port 432 nsew -flabel metal3 s -400 318072 56 318142 0 FreeSans 400 0 0 0 gpio_analog_sel[33] +flabel metal3 s -400 318072 60 318142 0 FreeSans 400 0 0 0 gpio_analog_sel[33] port 476 nsew -flabel metal3 s -400 317428 56 317498 0 FreeSans 400 0 0 0 gpio_dm2[33] +flabel metal3 s -400 317428 60 317498 0 FreeSans 400 0 0 0 gpio_dm2[33] port 652 nsew -flabel metal3 s -400 321752 56 321822 0 FreeSans 400 0 0 0 gpio_dm0[33] +flabel metal3 s -400 321752 60 321822 0 FreeSans 400 0 0 0 gpio_dm0[33] port 564 nsew -flabel metal3 s -400 316784 56 316854 0 FreeSans 400 0 0 0 gpio_holdover[33] +flabel metal3 s -400 316784 60 316854 0 FreeSans 400 0 0 0 gpio_holdover[33] port 388 nsew -flabel metal3 s -400 313748 56 313818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] +flabel metal3 s -400 313748 60 313818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[33] port 256 nsew -flabel metal3 s -400 320556 56 320626 0 FreeSans 400 0 0 0 gpio_inp_dis[33] +flabel metal3 s -400 320556 60 320626 0 FreeSans 400 0 0 0 gpio_inp_dis[33] port 212 nsew -flabel metal3 s -400 313104 56 313174 0 FreeSans 400 0 0 0 gpio_oeb[33] +flabel metal3 s -400 313104 60 313174 0 FreeSans 400 0 0 0 gpio_oeb[33] port 168 nsew -flabel metal3 s -400 316232 56 316302 0 FreeSans 400 0 0 0 gpio_out[33] +flabel metal3 s -400 316232 60 316302 0 FreeSans 400 0 0 0 gpio_out[33] port 124 nsew -flabel metal3 s -400 314392 56 314462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] +flabel metal3 s -400 314392 60 314462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[33] port 300 nsew -flabel metal3 s -400 312552 56 312622 0 FreeSans 400 0 0 0 gpio_in_h[33] +flabel metal3 s -400 312552 60 312622 0 FreeSans 400 0 0 0 gpio_in_h[33] port 740 nsew -flabel metal3 s -400 321108 56 321178 0 FreeSans 400 0 0 0 gpio_analog_pol[33] +flabel metal3 s -400 321108 60 321178 0 FreeSans 400 0 0 0 gpio_analog_pol[33] port 520 nsew -flabel metal3 s -400 323592 56 323662 0 FreeSans 400 0 0 0 gpio_dm1[33] +flabel metal3 s -400 323592 60 323662 0 FreeSans 400 0 0 0 gpio_dm1[33] port 608 nsew -flabel metal3 s -400 325432 56 325502 0 FreeSans 400 0 0 0 gpio_slow_sel[33] +flabel metal3 s -400 325432 60 325502 0 FreeSans 400 0 0 0 gpio_slow_sel[33] port 344 nsew -flabel metal3 s -400 327272 56 327342 0 FreeSans 400 0 0 0 gpio_in[33] +flabel metal3 s -400 327272 60 327342 0 FreeSans 400 0 0 0 gpio_in[33] port 696 nsew -flabel metal3 s -400 365596 56 365666 0 FreeSans 400 0 0 0 gpio_analog_en[32] +flabel metal3 s -400 365596 60 365666 0 FreeSans 400 0 0 0 gpio_analog_en[32] port 433 nsew -flabel metal3 s -400 364308 56 364378 0 FreeSans 400 0 0 0 gpio_analog_pol[32] +flabel metal3 s -400 364308 60 364378 0 FreeSans 400 0 0 0 gpio_analog_pol[32] port 521 nsew -flabel metal3 s -400 361272 56 361342 0 FreeSans 400 0 0 0 gpio_analog_sel[32] +flabel metal3 s -400 361272 60 361342 0 FreeSans 400 0 0 0 gpio_analog_sel[32] port 477 nsew -flabel metal3 s -400 364952 56 365022 0 FreeSans 400 0 0 0 gpio_dm0[32] +flabel metal3 s -400 364952 60 365022 0 FreeSans 400 0 0 0 gpio_dm0[32] port 565 nsew -flabel metal3 s -400 360628 56 360698 0 FreeSans 400 0 0 0 gpio_dm2[32] +flabel metal3 s -400 360628 60 360698 0 FreeSans 400 0 0 0 gpio_dm2[32] port 653 nsew -flabel metal3 s -400 359984 56 360054 0 FreeSans 400 0 0 0 gpio_holdover[32] +flabel metal3 s -400 359984 60 360054 0 FreeSans 400 0 0 0 gpio_holdover[32] port 389 nsew -flabel metal3 s -400 356948 56 357018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] +flabel metal3 s -400 356948 60 357018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[32] port 257 nsew -flabel metal3 s -400 363756 56 363826 0 FreeSans 400 0 0 0 gpio_inp_dis[32] +flabel metal3 s -400 363756 60 363826 0 FreeSans 400 0 0 0 gpio_inp_dis[32] port 213 nsew -flabel metal3 s -400 356304 56 356374 0 FreeSans 400 0 0 0 gpio_oeb[32] +flabel metal3 s -400 356304 60 356374 0 FreeSans 400 0 0 0 gpio_oeb[32] port 169 nsew -flabel metal3 s -400 359432 56 359502 0 FreeSans 400 0 0 0 gpio_out[32] +flabel metal3 s -400 359432 60 359502 0 FreeSans 400 0 0 0 gpio_out[32] port 125 nsew -flabel metal3 s -400 357592 56 357662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] +flabel metal3 s -400 357592 60 357662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[32] port 301 nsew -flabel metal3 s -400 355752 56 355822 0 FreeSans 400 0 0 0 gpio_in_h[32] +flabel metal3 s -400 355752 60 355822 0 FreeSans 400 0 0 0 gpio_in_h[32] port 741 nsew -flabel metal3 s -400 366792 56 366862 0 FreeSans 400 0 0 0 gpio_dm1[32] +flabel metal3 s -400 366792 60 366862 0 FreeSans 400 0 0 0 gpio_dm1[32] port 609 nsew -flabel metal3 s -400 368632 56 368702 0 FreeSans 400 0 0 0 gpio_slow_sel[32] +flabel metal3 s -400 368632 60 368702 0 FreeSans 400 0 0 0 gpio_slow_sel[32] port 345 nsew -flabel metal3 s -400 370472 56 370542 0 FreeSans 400 0 0 0 gpio_in[32] +flabel metal3 s -400 370472 60 370542 0 FreeSans 400 0 0 0 gpio_in[32] port 697 nsew -flabel metal3 s -400 493196 56 493266 0 FreeSans 400 0 0 0 gpio_analog_en[31] +flabel metal3 s -400 493196 60 493266 0 FreeSans 400 0 0 0 gpio_analog_en[31] port 434 nsew -flabel metal3 s -400 491908 56 491978 0 FreeSans 400 0 0 0 gpio_analog_pol[31] +flabel metal3 s -400 491908 60 491978 0 FreeSans 400 0 0 0 gpio_analog_pol[31] port 522 nsew -flabel metal3 s -400 488872 56 488942 0 FreeSans 400 0 0 0 gpio_analog_sel[31] +flabel metal3 s -400 488872 60 488942 0 FreeSans 400 0 0 0 gpio_analog_sel[31] port 478 nsew -flabel metal3 s -400 492552 56 492622 0 FreeSans 400 0 0 0 gpio_dm0[31] +flabel metal3 s -400 492552 60 492622 0 FreeSans 400 0 0 0 gpio_dm0[31] port 566 nsew -flabel metal3 s -400 488228 56 488298 0 FreeSans 400 0 0 0 gpio_dm2[31] +flabel metal3 s -400 488228 60 488298 0 FreeSans 400 0 0 0 gpio_dm2[31] port 654 nsew -flabel metal3 s -400 487584 56 487654 0 FreeSans 400 0 0 0 gpio_holdover[31] +flabel metal3 s -400 487584 60 487654 0 FreeSans 400 0 0 0 gpio_holdover[31] port 390 nsew -flabel metal3 s -400 484548 56 484618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] +flabel metal3 s -400 484548 60 484618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[31] port 258 nsew -flabel metal3 s -400 491356 56 491426 0 FreeSans 400 0 0 0 gpio_inp_dis[31] +flabel metal3 s -400 491356 60 491426 0 FreeSans 400 0 0 0 gpio_inp_dis[31] port 214 nsew -flabel metal3 s -400 483904 56 483974 0 FreeSans 400 0 0 0 gpio_oeb[31] +flabel metal3 s -400 483904 60 483974 0 FreeSans 400 0 0 0 gpio_oeb[31] port 170 nsew -flabel metal3 s -400 487032 56 487102 0 FreeSans 400 0 0 0 gpio_out[31] +flabel metal3 s -400 487032 60 487102 0 FreeSans 400 0 0 0 gpio_out[31] port 126 nsew -flabel metal3 s -400 485192 56 485262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] +flabel metal3 s -400 485192 60 485262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[31] port 302 nsew -flabel metal3 s -400 483352 56 483422 0 FreeSans 400 0 0 0 gpio_in_h[31] +flabel metal3 s -400 483352 60 483422 0 FreeSans 400 0 0 0 gpio_in_h[31] port 742 nsew -flabel metal3 s -400 494392 56 494462 0 FreeSans 400 0 0 0 gpio_dm1[31] +flabel metal3 s -400 494392 60 494462 0 FreeSans 400 0 0 0 gpio_dm1[31] port 610 nsew -flabel metal3 s -400 496232 56 496302 0 FreeSans 400 0 0 0 gpio_slow_sel[31] +flabel metal3 s -400 496232 60 496302 0 FreeSans 400 0 0 0 gpio_slow_sel[31] port 346 nsew -flabel metal3 s -400 498072 56 498142 0 FreeSans 400 0 0 0 gpio_in[31] +flabel metal3 s -400 498072 60 498142 0 FreeSans 400 0 0 0 gpio_in[31] port 698 nsew -flabel metal3 s -400 535752 56 535822 0 FreeSans 400 0 0 0 gpio_dm0[30] +flabel metal3 s -400 535752 60 535822 0 FreeSans 400 0 0 0 gpio_dm0[30] port 567 nsew -flabel metal3 s -400 531428 56 531498 0 FreeSans 400 0 0 0 gpio_dm2[30] +flabel metal3 s -400 531428 60 531498 0 FreeSans 400 0 0 0 gpio_dm2[30] port 655 nsew -flabel metal3 s -400 530784 56 530854 0 FreeSans 400 0 0 0 gpio_holdover[30] +flabel metal3 s -400 530784 60 530854 0 FreeSans 400 0 0 0 gpio_holdover[30] port 391 nsew -flabel metal3 s -400 527748 56 527818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] +flabel metal3 s -400 527748 60 527818 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[30] port 259 nsew -flabel metal3 s -400 534556 56 534626 0 FreeSans 400 0 0 0 gpio_inp_dis[30] +flabel metal3 s -400 534556 60 534626 0 FreeSans 400 0 0 0 gpio_inp_dis[30] port 215 nsew -flabel metal3 s -400 527104 56 527174 0 FreeSans 400 0 0 0 gpio_oeb[30] +flabel metal3 s -400 527104 60 527174 0 FreeSans 400 0 0 0 gpio_oeb[30] port 171 nsew -flabel metal3 s -400 530232 56 530302 0 FreeSans 400 0 0 0 gpio_out[30] +flabel metal3 s -400 530232 60 530302 0 FreeSans 400 0 0 0 gpio_out[30] port 127 nsew -flabel metal3 s -400 528392 56 528462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] +flabel metal3 s -400 528392 60 528462 0 FreeSans 400 0 0 0 gpio_vtrip_sel[30] port 303 nsew -flabel metal3 s -400 536396 56 536466 0 FreeSans 400 0 0 0 gpio_analog_en[30] +flabel metal3 s -400 536396 60 536466 0 FreeSans 400 0 0 0 gpio_analog_en[30] port 435 nsew -flabel metal3 s -400 535108 56 535178 0 FreeSans 400 0 0 0 gpio_analog_pol[30] +flabel metal3 s -400 535108 60 535178 0 FreeSans 400 0 0 0 gpio_analog_pol[30] port 523 nsew -flabel metal3 s -400 532072 56 532142 0 FreeSans 400 0 0 0 gpio_analog_sel[30] +flabel metal3 s -400 532072 60 532142 0 FreeSans 400 0 0 0 gpio_analog_sel[30] port 479 nsew -flabel metal3 s -400 526552 56 526622 0 FreeSans 400 0 0 0 gpio_in_h[30] +flabel metal3 s -400 526552 60 526622 0 FreeSans 400 0 0 0 gpio_in_h[30] port 743 nsew -flabel metal3 s -400 537592 56 537662 0 FreeSans 400 0 0 0 gpio_dm1[30] +flabel metal3 s -400 537592 60 537662 0 FreeSans 400 0 0 0 gpio_dm1[30] port 611 nsew -flabel metal3 s -400 539432 56 539502 0 FreeSans 400 0 0 0 gpio_slow_sel[30] +flabel metal3 s -400 539432 60 539502 0 FreeSans 400 0 0 0 gpio_slow_sel[30] port 347 nsew -flabel metal3 s -400 541272 56 541342 0 FreeSans 400 0 0 0 gpio_in[30] +flabel metal3 s -400 541272 60 541342 0 FreeSans 400 0 0 0 gpio_in[30] port 699 nsew -flabel metal3 s -400 575272 56 575342 0 FreeSans 400 0 0 0 gpio_analog_sel[29] +flabel metal3 s -400 575272 60 575342 0 FreeSans 400 0 0 0 gpio_analog_sel[29] port 480 nsew -flabel metal3 s -400 574628 56 574698 0 FreeSans 400 0 0 0 gpio_dm2[29] +flabel metal3 s -400 574628 60 574698 0 FreeSans 400 0 0 0 gpio_dm2[29] port 656 nsew -flabel metal3 s -400 573984 56 574054 0 FreeSans 400 0 0 0 gpio_holdover[29] +flabel metal3 s -400 573984 60 574054 0 FreeSans 400 0 0 0 gpio_holdover[29] port 392 nsew -flabel metal3 s -400 570948 56 571018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] +flabel metal3 s -400 570948 60 571018 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[29] port 260 nsew -flabel metal3 s -400 570304 56 570374 0 FreeSans 400 0 0 0 gpio_oeb[29] +flabel metal3 s -400 570304 60 570374 0 FreeSans 400 0 0 0 gpio_oeb[29] port 172 nsew -flabel metal3 s -400 573432 56 573502 0 FreeSans 400 0 0 0 gpio_out[29] +flabel metal3 s -400 573432 60 573502 0 FreeSans 400 0 0 0 gpio_out[29] port 128 nsew -flabel metal3 s -400 571592 56 571662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] +flabel metal3 s -400 571592 60 571662 0 FreeSans 400 0 0 0 gpio_vtrip_sel[29] port 304 nsew -flabel metal3 s -400 569752 56 569822 0 FreeSans 400 0 0 0 gpio_in_h[29] +flabel metal3 s -400 569752 60 569822 0 FreeSans 400 0 0 0 gpio_in_h[29] port 744 nsew -flabel metal3 s -400 579596 56 579666 0 FreeSans 400 0 0 0 gpio_analog_en[29] +flabel metal3 s -400 579596 60 579666 0 FreeSans 400 0 0 0 gpio_analog_en[29] port 436 nsew -flabel metal3 s -400 578308 56 578378 0 FreeSans 400 0 0 0 gpio_analog_pol[29] +flabel metal3 s -400 578308 60 578378 0 FreeSans 400 0 0 0 gpio_analog_pol[29] port 524 nsew -flabel metal3 s -400 578952 56 579022 0 FreeSans 400 0 0 0 gpio_dm0[29] +flabel metal3 s -400 578952 60 579022 0 FreeSans 400 0 0 0 gpio_dm0[29] port 568 nsew -flabel metal3 s -400 577756 56 577826 0 FreeSans 400 0 0 0 gpio_inp_dis[29] +flabel metal3 s -400 577756 60 577826 0 FreeSans 400 0 0 0 gpio_inp_dis[29] port 216 nsew -flabel metal3 s -400 580792 56 580862 0 FreeSans 400 0 0 0 gpio_dm1[29] +flabel metal3 s -400 580792 60 580862 0 FreeSans 400 0 0 0 gpio_dm1[29] port 612 nsew -flabel metal3 s -400 582632 56 582702 0 FreeSans 400 0 0 0 gpio_slow_sel[29] +flabel metal3 s -400 582632 60 582702 0 FreeSans 400 0 0 0 gpio_slow_sel[29] port 348 nsew -flabel metal3 s -400 584472 56 584542 0 FreeSans 400 0 0 0 gpio_in[29] +flabel metal3 s -400 584472 60 584542 0 FreeSans 400 0 0 0 gpio_in[29] port 700 nsew -flabel metal3 s -400 622796 56 622866 0 FreeSans 400 0 0 0 gpio_analog_en[28] +flabel metal3 s -400 622796 60 622866 0 FreeSans 400 0 0 0 gpio_analog_en[28] port 437 nsew -flabel metal3 s -400 621508 56 621578 0 FreeSans 400 0 0 0 gpio_analog_pol[28] +flabel metal3 s -400 621508 60 621578 0 FreeSans 400 0 0 0 gpio_analog_pol[28] port 525 nsew -flabel metal3 s -400 618472 56 618542 0 FreeSans 400 0 0 0 gpio_analog_sel[28] +flabel metal3 s -400 618472 60 618542 0 FreeSans 400 0 0 0 gpio_analog_sel[28] port 481 nsew -flabel metal3 s -400 622152 56 622222 0 FreeSans 400 0 0 0 gpio_dm0[28] +flabel metal3 s -400 622152 60 622222 0 FreeSans 400 0 0 0 gpio_dm0[28] port 569 nsew -flabel metal3 s -400 617828 56 617898 0 FreeSans 400 0 0 0 gpio_dm2[28] +flabel metal3 s -400 617828 60 617898 0 FreeSans 400 0 0 0 gpio_dm2[28] port 657 nsew -flabel metal3 s -400 617184 56 617254 0 FreeSans 400 0 0 0 gpio_holdover[28] +flabel metal3 s -400 617184 60 617254 0 FreeSans 400 0 0 0 gpio_holdover[28] port 393 nsew -flabel metal3 s -400 614148 56 614218 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] +flabel metal3 s -400 614148 60 614218 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[28] port 261 nsew -flabel metal3 s -400 620956 56 621026 0 FreeSans 400 0 0 0 gpio_inp_dis[28] +flabel metal3 s -400 620956 60 621026 0 FreeSans 400 0 0 0 gpio_inp_dis[28] port 217 nsew -flabel metal3 s -400 613504 56 613574 0 FreeSans 400 0 0 0 gpio_oeb[28] +flabel metal3 s -400 613504 60 613574 0 FreeSans 400 0 0 0 gpio_oeb[28] port 173 nsew -flabel metal3 s -400 616632 56 616702 0 FreeSans 400 0 0 0 gpio_out[28] +flabel metal3 s -400 616632 60 616702 0 FreeSans 400 0 0 0 gpio_out[28] port 129 nsew -flabel metal3 s -400 614792 56 614862 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] +flabel metal3 s -400 614792 60 614862 0 FreeSans 400 0 0 0 gpio_vtrip_sel[28] port 305 nsew -flabel metal3 s -400 612952 56 613022 0 FreeSans 400 0 0 0 gpio_in_h[28] +flabel metal3 s -400 612952 60 613022 0 FreeSans 400 0 0 0 gpio_in_h[28] port 745 nsew -flabel metal3 s -400 623992 56 624062 0 FreeSans 400 0 0 0 gpio_dm1[28] +flabel metal3 s -400 623992 60 624062 0 FreeSans 400 0 0 0 gpio_dm1[28] port 613 nsew -flabel metal3 s -400 625832 56 625902 0 FreeSans 400 0 0 0 gpio_slow_sel[28] +flabel metal3 s -400 625832 60 625902 0 FreeSans 400 0 0 0 gpio_slow_sel[28] port 349 nsew -flabel metal3 s -400 627672 56 627742 0 FreeSans 400 0 0 0 gpio_in[28] +flabel metal3 s -400 627672 60 627742 0 FreeSans 400 0 0 0 gpio_in[28] port 701 nsew -flabel metal3 s -400 665996 56 666066 0 FreeSans 400 0 0 0 gpio_analog_en[27] +flabel metal3 s -400 665996 60 666066 0 FreeSans 400 0 0 0 gpio_analog_en[27] port 438 nsew -flabel metal3 s -400 664708 56 664778 0 FreeSans 400 0 0 0 gpio_analog_pol[27] +flabel metal3 s -400 664708 60 664778 0 FreeSans 400 0 0 0 gpio_analog_pol[27] port 526 nsew -flabel metal3 s -400 661672 56 661742 0 FreeSans 400 0 0 0 gpio_analog_sel[27] +flabel metal3 s -400 661672 60 661742 0 FreeSans 400 0 0 0 gpio_analog_sel[27] port 482 nsew -flabel metal3 s -400 665352 56 665422 0 FreeSans 400 0 0 0 gpio_dm0[27] +flabel metal3 s -400 665352 60 665422 0 FreeSans 400 0 0 0 gpio_dm0[27] port 570 nsew -flabel metal3 s -400 661028 56 661098 0 FreeSans 400 0 0 0 gpio_dm2[27] +flabel metal3 s -400 661028 60 661098 0 FreeSans 400 0 0 0 gpio_dm2[27] port 658 nsew -flabel metal3 s -400 660384 56 660454 0 FreeSans 400 0 0 0 gpio_holdover[27] +flabel metal3 s -400 660384 60 660454 0 FreeSans 400 0 0 0 gpio_holdover[27] port 394 nsew -flabel metal3 s -400 657348 56 657418 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] +flabel metal3 s -400 657348 60 657418 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[27] port 262 nsew -flabel metal3 s -400 664156 56 664226 0 FreeSans 400 0 0 0 gpio_inp_dis[27] +flabel metal3 s -400 664156 60 664226 0 FreeSans 400 0 0 0 gpio_inp_dis[27] port 218 nsew -flabel metal3 s -400 656704 56 656774 0 FreeSans 400 0 0 0 gpio_oeb[27] +flabel metal3 s -400 656704 60 656774 0 FreeSans 400 0 0 0 gpio_oeb[27] port 174 nsew -flabel metal3 s -400 659832 56 659902 0 FreeSans 400 0 0 0 gpio_out[27] +flabel metal3 s -400 659832 60 659902 0 FreeSans 400 0 0 0 gpio_out[27] port 130 nsew -flabel metal3 s -400 657992 56 658062 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] +flabel metal3 s -400 657992 60 658062 0 FreeSans 400 0 0 0 gpio_vtrip_sel[27] port 306 nsew -flabel metal3 s -400 656152 56 656222 0 FreeSans 400 0 0 0 gpio_in_h[27] +flabel metal3 s -400 656152 60 656222 0 FreeSans 400 0 0 0 gpio_in_h[27] port 746 nsew -flabel metal3 s -400 667192 56 667262 0 FreeSans 400 0 0 0 gpio_dm1[27] +flabel metal3 s -400 667192 60 667262 0 FreeSans 400 0 0 0 gpio_dm1[27] port 614 nsew -flabel metal3 s -400 669032 56 669102 0 FreeSans 400 0 0 0 gpio_slow_sel[27] +flabel metal3 s -400 669032 60 669102 0 FreeSans 400 0 0 0 gpio_slow_sel[27] port 350 nsew -flabel metal3 s -400 670872 56 670942 0 FreeSans 400 0 0 0 gpio_in[27] +flabel metal3 s -400 670872 60 670942 0 FreeSans 400 0 0 0 gpio_in[27] port 702 nsew -flabel metal3 -400 450940 56 455720 0 FreeSans 3200 90 0 0 vdda2 +flabel metal3 -400 450940 60 455720 0 FreeSans 3200 90 0 0 vdda2 port 25 nsew -flabel metal3 -400 408814 56 413604 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 -400 408814 60 413604 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 -400 403862 56 408514 0 FreeSans 3200 90 0 0 vccd2 +flabel metal3 -400 403862 60 408514 0 FreeSans 3200 90 0 0 vccd2 port 29 nsew -flabel metal3 -400 398762 56 403562 0 FreeSans 3200 90 0 0 vssd2 +flabel metal3 -400 398762 60 403562 0 FreeSans 3200 90 0 0 vssd2 port 31 nsew -flabel metal3 -400 78140 56 82920 0 FreeSans 3200 90 0 0 vddio +flabel metal3 -400 78140 60 82920 0 FreeSans 3200 90 0 0 vddio port 18 nsew -flabel metal3 -400 36014 56 40804 0 FreeSans 3200 90 0 0 vccd +flabel metal3 -400 36014 60 40804 0 FreeSans 3200 90 0 0 vccd port 20 nsew -flabel metal3 -400 25962 56 30762 0 FreeSans 3200 90 0 0 vccd +flabel metal3 -400 25962 60 30762 0 FreeSans 3200 90 0 0 vccd port 20 nsew -flabel metal3 36806 -400 41586 56 0 FreeSans 3200 0 0 0 vssa +flabel metal3 36806 -400 41586 60 0 FreeSans 3200 0 0 0 vssa port 23 nsew -flabel metal3 199284 -400 203914 56 0 FreeSans 3200 0 0 0 vssd +flabel metal3 199284 -400 203914 60 0 FreeSans 3200 0 0 0 vssd port 21 nsew -flabel metal3 209164 -400 213964 56 0 FreeSans 3200 0 0 0 vssd +flabel metal3 209164 -400 213964 60 0 FreeSans 3200 0 0 0 vssd port 21 nsew -flabel metal3 527006 -400 531786 56 0 FreeSans 3200 0 0 0 vssio +flabel metal3 527006 -400 531786 60 0 FreeSans 3200 0 0 0 vssio port 19 nsew -flabel metal3 580806 -400 585586 56 0 FreeSans 3200 0 0 0 vdda +flabel metal3 580806 -400 585586 60 0 FreeSans 3200 0 0 0 vdda port 22 nsew -flabel metal3 633270 929006 633726 929068 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] +flabel metal3 633266 929006 633726 929068 0 FreeSans 400 0 0 0 gpio_loopback_zero[14] port 803 nsew -flabel metal3 633270 839006 633726 839068 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] +flabel metal3 633266 839006 633726 839068 0 FreeSans 400 0 0 0 gpio_loopback_zero[13] port 804 nsew -flabel metal3 633270 750006 633726 750068 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] +flabel metal3 633266 750006 633726 750068 0 FreeSans 400 0 0 0 gpio_loopback_zero[12] port 805 nsew -flabel metal3 633270 705006 633726 705068 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] +flabel metal3 633266 705006 633726 705068 0 FreeSans 400 0 0 0 gpio_loopback_zero[11] port 806 nsew -flabel metal3 633270 660006 633726 660068 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] +flabel metal3 633266 660006 633726 660068 0 FreeSans 400 0 0 0 gpio_loopback_zero[10] port 807 nsew -flabel metal3 633270 615006 633726 615068 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] +flabel metal3 633266 615006 633726 615068 0 FreeSans 400 0 0 0 gpio_loopback_zero[9] port 808 nsew -flabel metal3 633270 570006 633726 570068 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] +flabel metal3 633266 570006 633726 570068 0 FreeSans 400 0 0 0 gpio_loopback_zero[8] port 809 nsew -flabel metal3 633270 525006 633726 525068 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] +flabel metal3 633266 525006 633726 525068 0 FreeSans 400 0 0 0 gpio_loopback_zero[7] port 810 nsew -flabel metal3 633270 348006 633726 348068 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] +flabel metal3 633266 348006 633726 348068 0 FreeSans 400 0 0 0 gpio_loopback_zero[6] port 811 nsew -flabel metal3 633270 303006 633726 303068 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] +flabel metal3 633266 303006 633726 303068 0 FreeSans 400 0 0 0 gpio_loopback_zero[5] port 812 nsew -flabel metal3 633270 258006 633726 258068 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] +flabel metal3 633266 258006 633726 258068 0 FreeSans 400 0 0 0 gpio_loopback_zero[4] port 813 nsew -flabel metal3 633270 213006 633726 213068 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] +flabel metal3 633266 213006 633726 213068 0 FreeSans 400 0 0 0 gpio_loopback_zero[3] port 814 nsew -flabel metal3 633270 168006 633726 168068 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] +flabel metal3 633266 168006 633726 168068 0 FreeSans 400 0 0 0 gpio_loopback_zero[2] port 815 nsew -flabel metal3 633270 123006 633726 123068 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] +flabel metal3 633266 123006 633726 123068 0 FreeSans 400 0 0 0 gpio_loopback_zero[1] port 816 nsew -flabel metal3 633270 78006 633726 78068 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] +flabel metal3 633266 78006 633726 78068 0 FreeSans 400 0 0 0 gpio_loopback_zero[0] port 817 nsew -flabel metal3 s 633270 60624 633726 60694 0 FreeSans 400 0 0 0 gpio_slow_sel[0] +flabel metal3 s 633266 60624 633726 60694 0 FreeSans 400 0 0 0 gpio_slow_sel[0] port 377 nsew -flabel metal3 s 633270 58784 633726 58854 0 FreeSans 400 0 0 0 gpio_in[0] +flabel metal3 s 633266 58784 633726 58854 0 FreeSans 400 0 0 0 gpio_in[0] port 729 nsew -flabel metal3 s 633270 62464 633726 62534 0 FreeSans 400 0 0 0 gpio_dm1[0] +flabel metal3 s 633266 62464 633726 62534 0 FreeSans 400 0 0 0 gpio_dm1[0] port 641 nsew -flabel metal3 s 633270 63660 633726 63730 0 FreeSans 400 0 0 0 gpio_analog_en[0] +flabel metal3 s 633266 63660 633726 63730 0 FreeSans 400 0 0 0 gpio_analog_en[0] port 465 nsew -flabel metal3 s 633270 64948 633726 65018 0 FreeSans 400 0 0 0 gpio_analog_pol[0] +flabel metal3 s 633266 64948 633726 65018 0 FreeSans 400 0 0 0 gpio_analog_pol[0] port 553 nsew -flabel metal3 s 633270 67984 633726 68054 0 FreeSans 400 0 0 0 gpio_analog_sel[0] +flabel metal3 s 633266 67984 633726 68054 0 FreeSans 400 0 0 0 gpio_analog_sel[0] port 509 nsew -flabel metal3 s 633270 64304 633726 64374 0 FreeSans 400 0 0 0 gpio_dm0[0] +flabel metal3 s 633266 64304 633726 64374 0 FreeSans 400 0 0 0 gpio_dm0[0] port 597 nsew -flabel metal3 s 633270 68628 633726 68698 0 FreeSans 400 0 0 0 gpio_dm2[0] +flabel metal3 s 633266 68628 633726 68698 0 FreeSans 400 0 0 0 gpio_dm2[0] port 685 nsew -flabel metal3 s 633270 69272 633726 69342 0 FreeSans 400 0 0 0 gpio_holdover[0] +flabel metal3 s 633266 69272 633726 69342 0 FreeSans 400 0 0 0 gpio_holdover[0] port 421 nsew -flabel metal3 s 633270 72308 633726 72378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] +flabel metal3 s 633266 72308 633726 72378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[0] port 289 nsew -flabel metal3 s 633270 65500 633726 65570 0 FreeSans 400 0 0 0 gpio_inp_dis[0] +flabel metal3 s 633266 65500 633726 65570 0 FreeSans 400 0 0 0 gpio_inp_dis[0] port 245 nsew -flabel metal3 s 633270 72952 633726 73022 0 FreeSans 400 0 0 0 gpio_oeb[0] +flabel metal3 s 633266 72952 633726 73022 0 FreeSans 400 0 0 0 gpio_oeb[0] port 201 nsew -flabel metal3 s 633270 69824 633726 69894 0 FreeSans 400 0 0 0 gpio_out[0] +flabel metal3 s 633266 69824 633726 69894 0 FreeSans 400 0 0 0 gpio_out[0] port 157 nsew -flabel metal3 s 633270 71664 633726 71734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] +flabel metal3 s 633266 71664 633726 71734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[0] port 333 nsew -flabel metal3 633270 73504 633726 73574 0 FreeSans 400 0 0 0 gpio_in_h[0] +flabel metal3 633266 73504 633726 73574 0 FreeSans 400 0 0 0 gpio_in_h[0] port 773 nsew -flabel metal3 s 633270 105824 633726 105894 0 FreeSans 400 0 0 0 gpio_slow_sel[1] +flabel metal3 s 633266 105824 633726 105894 0 FreeSans 400 0 0 0 gpio_slow_sel[1] port 376 nsew -flabel metal3 s 633270 103984 633726 104054 0 FreeSans 400 0 0 0 gpio_in[1] +flabel metal3 s 633266 103984 633726 104054 0 FreeSans 400 0 0 0 gpio_in[1] port 728 nsew -flabel metal3 s 633270 107664 633726 107734 0 FreeSans 400 0 0 0 gpio_dm1[1] +flabel metal3 s 633266 107664 633726 107734 0 FreeSans 400 0 0 0 gpio_dm1[1] port 640 nsew -flabel metal3 s 633270 108860 633726 108930 0 FreeSans 400 0 0 0 gpio_analog_en[1] +flabel metal3 s 633266 108860 633726 108930 0 FreeSans 400 0 0 0 gpio_analog_en[1] port 464 nsew -flabel metal3 s 633270 110148 633726 110218 0 FreeSans 400 0 0 0 gpio_analog_pol[1] +flabel metal3 s 633266 110148 633726 110218 0 FreeSans 400 0 0 0 gpio_analog_pol[1] port 552 nsew -flabel metal3 s 633270 113184 633726 113254 0 FreeSans 400 0 0 0 gpio_analog_sel[1] +flabel metal3 s 633266 113184 633726 113254 0 FreeSans 400 0 0 0 gpio_analog_sel[1] port 508 nsew -flabel metal3 s 633270 109504 633726 109574 0 FreeSans 400 0 0 0 gpio_dm0[1] +flabel metal3 s 633266 109504 633726 109574 0 FreeSans 400 0 0 0 gpio_dm0[1] port 596 nsew -flabel metal3 s 633270 113828 633726 113898 0 FreeSans 400 0 0 0 gpio_dm2[1] +flabel metal3 s 633266 113828 633726 113898 0 FreeSans 400 0 0 0 gpio_dm2[1] port 684 nsew -flabel metal3 s 633270 114472 633726 114542 0 FreeSans 400 0 0 0 gpio_holdover[1] +flabel metal3 s 633266 114472 633726 114542 0 FreeSans 400 0 0 0 gpio_holdover[1] port 420 nsew -flabel metal3 s 633270 117508 633726 117578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] +flabel metal3 s 633266 117508 633726 117578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[1] port 288 nsew -flabel metal3 s 633270 110700 633726 110770 0 FreeSans 400 0 0 0 gpio_inp_dis[1] +flabel metal3 s 633266 110700 633726 110770 0 FreeSans 400 0 0 0 gpio_inp_dis[1] port 244 nsew -flabel metal3 s 633270 118152 633726 118222 0 FreeSans 400 0 0 0 gpio_oeb[1] +flabel metal3 s 633266 118152 633726 118222 0 FreeSans 400 0 0 0 gpio_oeb[1] port 200 nsew -flabel metal3 s 633270 115024 633726 115094 0 FreeSans 400 0 0 0 gpio_out[1] +flabel metal3 s 633266 115024 633726 115094 0 FreeSans 400 0 0 0 gpio_out[1] port 156 nsew -flabel metal3 s 633270 116864 633726 116934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] +flabel metal3 s 633266 116864 633726 116934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[1] port 332 nsew -flabel metal3 633270 118704 633726 118774 0 FreeSans 400 0 0 0 gpio_in_h[1] +flabel metal3 633266 118704 633726 118774 0 FreeSans 400 0 0 0 gpio_in_h[1] port 772 nsew -flabel metal3 s 633270 150824 633726 150894 0 FreeSans 400 0 0 0 gpio_slow_sel[2] +flabel metal3 s 633266 150824 633726 150894 0 FreeSans 400 0 0 0 gpio_slow_sel[2] port 375 nsew -flabel metal3 s 633270 148984 633726 149054 0 FreeSans 400 0 0 0 gpio_in[2] +flabel metal3 s 633266 148984 633726 149054 0 FreeSans 400 0 0 0 gpio_in[2] port 727 nsew -flabel metal3 s 633270 152664 633726 152734 0 FreeSans 400 0 0 0 gpio_dm1[2] +flabel metal3 s 633266 152664 633726 152734 0 FreeSans 400 0 0 0 gpio_dm1[2] port 639 nsew -flabel metal3 s 633270 153860 633726 153930 0 FreeSans 400 0 0 0 gpio_analog_en[2] +flabel metal3 s 633266 153860 633726 153930 0 FreeSans 400 0 0 0 gpio_analog_en[2] port 463 nsew -flabel metal3 s 633270 155148 633726 155218 0 FreeSans 400 0 0 0 gpio_analog_pol[2] +flabel metal3 s 633266 155148 633726 155218 0 FreeSans 400 0 0 0 gpio_analog_pol[2] port 551 nsew -flabel metal3 s 633270 158184 633726 158254 0 FreeSans 400 0 0 0 gpio_analog_sel[2] +flabel metal3 s 633266 158184 633726 158254 0 FreeSans 400 0 0 0 gpio_analog_sel[2] port 507 nsew -flabel metal3 s 633270 154504 633726 154574 0 FreeSans 400 0 0 0 gpio_dm0[2] +flabel metal3 s 633266 154504 633726 154574 0 FreeSans 400 0 0 0 gpio_dm0[2] port 595 nsew -flabel metal3 s 633270 158828 633726 158898 0 FreeSans 400 0 0 0 gpio_dm2[2] +flabel metal3 s 633266 158828 633726 158898 0 FreeSans 400 0 0 0 gpio_dm2[2] port 683 nsew -flabel metal3 s 633270 159472 633726 159542 0 FreeSans 400 0 0 0 gpio_holdover[2] +flabel metal3 s 633266 159472 633726 159542 0 FreeSans 400 0 0 0 gpio_holdover[2] port 419 nsew -flabel metal3 s 633270 162508 633726 162578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] +flabel metal3 s 633266 162508 633726 162578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[2] port 287 nsew -flabel metal3 s 633270 155700 633726 155770 0 FreeSans 400 0 0 0 gpio_inp_dis[2] +flabel metal3 s 633266 155700 633726 155770 0 FreeSans 400 0 0 0 gpio_inp_dis[2] port 243 nsew -flabel metal3 s 633270 163152 633726 163222 0 FreeSans 400 0 0 0 gpio_oeb[2] +flabel metal3 s 633266 163152 633726 163222 0 FreeSans 400 0 0 0 gpio_oeb[2] port 199 nsew -flabel metal3 s 633270 160024 633726 160094 0 FreeSans 400 0 0 0 gpio_out[2] +flabel metal3 s 633266 160024 633726 160094 0 FreeSans 400 0 0 0 gpio_out[2] port 155 nsew -flabel metal3 s 633270 161864 633726 161934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] +flabel metal3 s 633266 161864 633726 161934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[2] port 331 nsew -flabel metal3 633270 163704 633726 163774 0 FreeSans 400 0 0 0 gpio_in_h[2] +flabel metal3 633266 163704 633726 163774 0 FreeSans 400 0 0 0 gpio_in_h[2] port 771 nsew -flabel metal3 s 633270 196024 633726 196094 0 FreeSans 400 0 0 0 gpio_slow_sel[3] +flabel metal3 s 633266 196024 633726 196094 0 FreeSans 400 0 0 0 gpio_slow_sel[3] port 374 nsew -flabel metal3 s 633270 194184 633726 194254 0 FreeSans 400 0 0 0 gpio_in[3] +flabel metal3 s 633266 194184 633726 194254 0 FreeSans 400 0 0 0 gpio_in[3] port 726 nsew -flabel metal3 s 633270 197864 633726 197934 0 FreeSans 400 0 0 0 gpio_dm1[3] +flabel metal3 s 633266 197864 633726 197934 0 FreeSans 400 0 0 0 gpio_dm1[3] port 638 nsew -flabel metal3 s 633270 199060 633726 199130 0 FreeSans 400 0 0 0 gpio_analog_en[3] +flabel metal3 s 633266 199060 633726 199130 0 FreeSans 400 0 0 0 gpio_analog_en[3] port 462 nsew -flabel metal3 s 633270 200348 633726 200418 0 FreeSans 400 0 0 0 gpio_analog_pol[3] +flabel metal3 s 633266 200348 633726 200418 0 FreeSans 400 0 0 0 gpio_analog_pol[3] port 550 nsew -flabel metal3 s 633270 203384 633726 203454 0 FreeSans 400 0 0 0 gpio_analog_sel[3] +flabel metal3 s 633266 203384 633726 203454 0 FreeSans 400 0 0 0 gpio_analog_sel[3] port 506 nsew -flabel metal3 s 633270 204028 633726 204098 0 FreeSans 400 0 0 0 gpio_dm2[3] +flabel metal3 s 633266 204028 633726 204098 0 FreeSans 400 0 0 0 gpio_dm2[3] port 682 nsew -flabel metal3 s 633270 199704 633726 199774 0 FreeSans 400 0 0 0 gpio_dm0[3] +flabel metal3 s 633266 199704 633726 199774 0 FreeSans 400 0 0 0 gpio_dm0[3] port 594 nsew -flabel metal3 s 633270 204672 633726 204742 0 FreeSans 400 0 0 0 gpio_holdover[3] +flabel metal3 s 633266 204672 633726 204742 0 FreeSans 400 0 0 0 gpio_holdover[3] port 418 nsew -flabel metal3 s 633270 207708 633726 207778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] +flabel metal3 s 633266 207708 633726 207778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[3] port 286 nsew -flabel metal3 s 633270 200900 633726 200970 0 FreeSans 400 0 0 0 gpio_inp_dis[3] +flabel metal3 s 633266 200900 633726 200970 0 FreeSans 400 0 0 0 gpio_inp_dis[3] port 242 nsew -flabel metal3 s 633270 208352 633726 208422 0 FreeSans 400 0 0 0 gpio_oeb[3] +flabel metal3 s 633266 208352 633726 208422 0 FreeSans 400 0 0 0 gpio_oeb[3] port 198 nsew -flabel metal3 s 633270 205224 633726 205294 0 FreeSans 400 0 0 0 gpio_out[3] +flabel metal3 s 633266 205224 633726 205294 0 FreeSans 400 0 0 0 gpio_out[3] port 154 nsew -flabel metal3 s 633270 207064 633726 207134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] +flabel metal3 s 633266 207064 633726 207134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[3] port 330 nsew -flabel metal3 633270 208904 633726 208974 0 FreeSans 400 0 0 0 gpio_in_h[3] +flabel metal3 633266 208904 633726 208974 0 FreeSans 400 0 0 0 gpio_in_h[3] port 770 nsew -flabel metal3 s 633270 241024 633726 241094 0 FreeSans 400 0 0 0 gpio_slow_sel[4] +flabel metal3 s 633266 241024 633726 241094 0 FreeSans 400 0 0 0 gpio_slow_sel[4] port 373 nsew -flabel metal3 s 633270 239184 633726 239254 0 FreeSans 400 0 0 0 gpio_in[4] +flabel metal3 s 633266 239184 633726 239254 0 FreeSans 400 0 0 0 gpio_in[4] port 725 nsew -flabel metal3 s 633270 242864 633726 242934 0 FreeSans 400 0 0 0 gpio_dm1[4] +flabel metal3 s 633266 242864 633726 242934 0 FreeSans 400 0 0 0 gpio_dm1[4] port 637 nsew -flabel metal3 s 633270 244060 633726 244130 0 FreeSans 400 0 0 0 gpio_analog_en[4] +flabel metal3 s 633266 244060 633726 244130 0 FreeSans 400 0 0 0 gpio_analog_en[4] port 461 nsew -flabel metal3 s 633270 245348 633726 245418 0 FreeSans 400 0 0 0 gpio_analog_pol[4] +flabel metal3 s 633266 245348 633726 245418 0 FreeSans 400 0 0 0 gpio_analog_pol[4] port 549 nsew -flabel metal3 s 633270 248384 633726 248454 0 FreeSans 400 0 0 0 gpio_analog_sel[4] +flabel metal3 s 633266 248384 633726 248454 0 FreeSans 400 0 0 0 gpio_analog_sel[4] port 505 nsew -flabel metal3 s 633270 244704 633726 244774 0 FreeSans 400 0 0 0 gpio_dm0[4] +flabel metal3 s 633266 244704 633726 244774 0 FreeSans 400 0 0 0 gpio_dm0[4] port 593 nsew -flabel metal3 s 633270 249028 633726 249098 0 FreeSans 400 0 0 0 gpio_dm2[4] +flabel metal3 s 633266 249028 633726 249098 0 FreeSans 400 0 0 0 gpio_dm2[4] port 681 nsew -flabel metal3 s 633270 249672 633726 249742 0 FreeSans 400 0 0 0 gpio_holdover[4] +flabel metal3 s 633266 249672 633726 249742 0 FreeSans 400 0 0 0 gpio_holdover[4] port 417 nsew -flabel metal3 s 633270 252708 633726 252778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] +flabel metal3 s 633266 252708 633726 252778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[4] port 285 nsew -flabel metal3 s 633270 245900 633726 245970 0 FreeSans 400 0 0 0 gpio_inp_dis[4] +flabel metal3 s 633266 245900 633726 245970 0 FreeSans 400 0 0 0 gpio_inp_dis[4] port 241 nsew -flabel metal3 s 633270 253352 633726 253422 0 FreeSans 400 0 0 0 gpio_oeb[4] +flabel metal3 s 633266 253352 633726 253422 0 FreeSans 400 0 0 0 gpio_oeb[4] port 197 nsew -flabel metal3 s 633270 250224 633726 250294 0 FreeSans 400 0 0 0 gpio_out[4] +flabel metal3 s 633266 250224 633726 250294 0 FreeSans 400 0 0 0 gpio_out[4] port 153 nsew -flabel metal3 s 633270 252064 633726 252134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] +flabel metal3 s 633266 252064 633726 252134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[4] port 329 nsew -flabel metal3 633270 253904 633726 253974 0 FreeSans 400 0 0 0 gpio_in_h[4] +flabel metal3 633266 253904 633726 253974 0 FreeSans 400 0 0 0 gpio_in_h[4] port 769 nsew -flabel metal3 s 633270 286024 633726 286094 0 FreeSans 400 0 0 0 gpio_slow_sel[5] +flabel metal3 s 633266 286024 633726 286094 0 FreeSans 400 0 0 0 gpio_slow_sel[5] port 372 nsew -flabel metal3 s 633270 284184 633726 284254 0 FreeSans 400 0 0 0 gpio_in[5] +flabel metal3 s 633266 284184 633726 284254 0 FreeSans 400 0 0 0 gpio_in[5] port 724 nsew -flabel metal3 s 633270 287864 633726 287934 0 FreeSans 400 0 0 0 gpio_dm1[5] +flabel metal3 s 633266 287864 633726 287934 0 FreeSans 400 0 0 0 gpio_dm1[5] port 636 nsew -flabel metal3 s 633270 289060 633726 289130 0 FreeSans 400 0 0 0 gpio_analog_en[5] +flabel metal3 s 633266 289060 633726 289130 0 FreeSans 400 0 0 0 gpio_analog_en[5] port 460 nsew -flabel metal3 s 633270 290348 633726 290418 0 FreeSans 400 0 0 0 gpio_analog_pol[5] +flabel metal3 s 633266 290348 633726 290418 0 FreeSans 400 0 0 0 gpio_analog_pol[5] port 548 nsew -flabel metal3 s 633270 293384 633726 293454 0 FreeSans 400 0 0 0 gpio_analog_sel[5] +flabel metal3 s 633266 293384 633726 293454 0 FreeSans 400 0 0 0 gpio_analog_sel[5] port 504 nsew -flabel metal3 s 633270 289704 633726 289774 0 FreeSans 400 0 0 0 gpio_dm0[5] +flabel metal3 s 633266 289704 633726 289774 0 FreeSans 400 0 0 0 gpio_dm0[5] port 592 nsew -flabel metal3 s 633270 294028 633726 294098 0 FreeSans 400 0 0 0 gpio_dm2[5] +flabel metal3 s 633266 294028 633726 294098 0 FreeSans 400 0 0 0 gpio_dm2[5] port 680 nsew -flabel metal3 s 633270 294672 633726 294742 0 FreeSans 400 0 0 0 gpio_holdover[5] +flabel metal3 s 633266 294672 633726 294742 0 FreeSans 400 0 0 0 gpio_holdover[5] port 416 nsew -flabel metal3 s 633270 297708 633726 297778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] +flabel metal3 s 633266 297708 633726 297778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[5] port 284 nsew -flabel metal3 s 633270 290900 633726 290970 0 FreeSans 400 0 0 0 gpio_inp_dis[5] +flabel metal3 s 633266 290900 633726 290970 0 FreeSans 400 0 0 0 gpio_inp_dis[5] port 240 nsew -flabel metal3 s 633270 298352 633726 298422 0 FreeSans 400 0 0 0 gpio_oeb[5] +flabel metal3 s 633266 298352 633726 298422 0 FreeSans 400 0 0 0 gpio_oeb[5] port 196 nsew -flabel metal3 s 633270 295224 633726 295294 0 FreeSans 400 0 0 0 gpio_out[5] +flabel metal3 s 633266 295224 633726 295294 0 FreeSans 400 0 0 0 gpio_out[5] port 152 nsew -flabel metal3 s 633270 297064 633726 297134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] +flabel metal3 s 633266 297064 633726 297134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[5] port 328 nsew -flabel metal3 633270 298904 633726 298974 0 FreeSans 400 0 0 0 gpio_in_h[5] +flabel metal3 633266 298904 633726 298974 0 FreeSans 400 0 0 0 gpio_in_h[5] port 768 nsew -flabel metal3 s 633270 331224 633726 331294 0 FreeSans 400 0 0 0 gpio_slow_sel[6] +flabel metal3 s 633266 331224 633726 331294 0 FreeSans 400 0 0 0 gpio_slow_sel[6] port 371 nsew -flabel metal3 s 633270 329384 633726 329454 0 FreeSans 400 0 0 0 gpio_in[6] +flabel metal3 s 633266 329384 633726 329454 0 FreeSans 400 0 0 0 gpio_in[6] port 723 nsew -flabel metal3 s 633270 333064 633726 333134 0 FreeSans 400 0 0 0 gpio_dm1[6] +flabel metal3 s 633266 333064 633726 333134 0 FreeSans 400 0 0 0 gpio_dm1[6] port 635 nsew -flabel metal3 s 633270 334260 633726 334330 0 FreeSans 400 0 0 0 gpio_analog_en[6] +flabel metal3 s 633266 334260 633726 334330 0 FreeSans 400 0 0 0 gpio_analog_en[6] port 459 nsew -flabel metal3 s 633270 335548 633726 335618 0 FreeSans 400 0 0 0 gpio_analog_pol[6] +flabel metal3 s 633266 335548 633726 335618 0 FreeSans 400 0 0 0 gpio_analog_pol[6] port 547 nsew -flabel metal3 s 633270 338584 633726 338654 0 FreeSans 400 0 0 0 gpio_analog_sel[6] +flabel metal3 s 633266 338584 633726 338654 0 FreeSans 400 0 0 0 gpio_analog_sel[6] port 503 nsew -flabel metal3 s 633270 334904 633726 334974 0 FreeSans 400 0 0 0 gpio_dm0[6] +flabel metal3 s 633266 334904 633726 334974 0 FreeSans 400 0 0 0 gpio_dm0[6] port 591 nsew -flabel metal3 s 633270 339228 633726 339298 0 FreeSans 400 0 0 0 gpio_dm2[6] +flabel metal3 s 633266 339228 633726 339298 0 FreeSans 400 0 0 0 gpio_dm2[6] port 679 nsew -flabel metal3 s 633270 339872 633726 339942 0 FreeSans 400 0 0 0 gpio_holdover[6] +flabel metal3 s 633266 339872 633726 339942 0 FreeSans 400 0 0 0 gpio_holdover[6] port 415 nsew -flabel metal3 s 633270 342908 633726 342978 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] +flabel metal3 s 633266 342908 633726 342978 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[6] port 283 nsew -flabel metal3 s 633270 336100 633726 336170 0 FreeSans 400 0 0 0 gpio_inp_dis[6] +flabel metal3 s 633266 336100 633726 336170 0 FreeSans 400 0 0 0 gpio_inp_dis[6] port 239 nsew -flabel metal3 s 633270 343552 633726 343622 0 FreeSans 400 0 0 0 gpio_oeb[6] +flabel metal3 s 633266 343552 633726 343622 0 FreeSans 400 0 0 0 gpio_oeb[6] port 195 nsew -flabel metal3 s 633270 340424 633726 340494 0 FreeSans 400 0 0 0 gpio_out[6] +flabel metal3 s 633266 340424 633726 340494 0 FreeSans 400 0 0 0 gpio_out[6] port 151 nsew -flabel metal3 s 633270 342264 633726 342334 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] +flabel metal3 s 633266 342264 633726 342334 0 FreeSans 400 0 0 0 gpio_vtrip_sel[6] port 327 nsew -flabel metal3 633270 344104 633726 344174 0 FreeSans 400 0 0 0 gpio_in_h[6] +flabel metal3 633266 344104 633726 344174 0 FreeSans 400 0 0 0 gpio_in_h[6] port 767 nsew -flabel metal3 s 633270 508424 633726 508494 0 FreeSans 400 0 0 0 gpio_slow_sel[7] +flabel metal3 s 633266 508424 633726 508494 0 FreeSans 400 0 0 0 gpio_slow_sel[7] port 370 nsew -flabel metal3 s 633270 506584 633726 506654 0 FreeSans 400 0 0 0 gpio_in[7] +flabel metal3 s 633266 506584 633726 506654 0 FreeSans 400 0 0 0 gpio_in[7] port 722 nsew -flabel metal3 s 633270 510264 633726 510334 0 FreeSans 400 0 0 0 gpio_dm1[7] +flabel metal3 s 633266 510264 633726 510334 0 FreeSans 400 0 0 0 gpio_dm1[7] port 634 nsew -flabel metal3 s 633270 511460 633726 511530 0 FreeSans 400 0 0 0 gpio_analog_en[7] +flabel metal3 s 633266 511460 633726 511530 0 FreeSans 400 0 0 0 gpio_analog_en[7] port 458 nsew -flabel metal3 s 633270 512748 633726 512818 0 FreeSans 400 0 0 0 gpio_analog_pol[7] +flabel metal3 s 633266 512748 633726 512818 0 FreeSans 400 0 0 0 gpio_analog_pol[7] port 546 nsew -flabel metal3 s 633270 515784 633726 515854 0 FreeSans 400 0 0 0 gpio_analog_sel[7] +flabel metal3 s 633266 515784 633726 515854 0 FreeSans 400 0 0 0 gpio_analog_sel[7] port 502 nsew -flabel metal3 s 633270 512104 633726 512174 0 FreeSans 400 0 0 0 gpio_dm0[7] +flabel metal3 s 633266 512104 633726 512174 0 FreeSans 400 0 0 0 gpio_dm0[7] port 590 nsew -flabel metal3 s 633270 516428 633726 516498 0 FreeSans 400 0 0 0 gpio_dm2[7] +flabel metal3 s 633266 516428 633726 516498 0 FreeSans 400 0 0 0 gpio_dm2[7] port 678 nsew -flabel metal3 s 633270 517072 633726 517142 0 FreeSans 400 0 0 0 gpio_holdover[7] +flabel metal3 s 633266 517072 633726 517142 0 FreeSans 400 0 0 0 gpio_holdover[7] port 414 nsew -flabel metal3 s 633270 520108 633726 520178 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] +flabel metal3 s 633266 520108 633726 520178 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[7] port 282 nsew -flabel metal3 s 633270 513300 633726 513370 0 FreeSans 400 0 0 0 gpio_inp_dis[7] +flabel metal3 s 633266 513300 633726 513370 0 FreeSans 400 0 0 0 gpio_inp_dis[7] port 238 nsew -flabel metal3 s 633270 520752 633726 520822 0 FreeSans 400 0 0 0 gpio_oeb[7] +flabel metal3 s 633266 520752 633726 520822 0 FreeSans 400 0 0 0 gpio_oeb[7] port 194 nsew -flabel metal3 s 633270 517624 633726 517694 0 FreeSans 400 0 0 0 gpio_out[7] +flabel metal3 s 633266 517624 633726 517694 0 FreeSans 400 0 0 0 gpio_out[7] port 150 nsew -flabel metal3 s 633270 519464 633726 519534 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] +flabel metal3 s 633266 519464 633726 519534 0 FreeSans 400 0 0 0 gpio_vtrip_sel[7] port 326 nsew -flabel metal3 s 633270 521304 633726 521374 0 FreeSans 400 0 0 0 gpio_in_h[7] +flabel metal3 s 633266 521304 633726 521374 0 FreeSans 400 0 0 0 gpio_in_h[7] port 766 nsew -flabel metal3 s 633270 553624 633726 553694 0 FreeSans 400 0 0 0 gpio_slow_sel[8] +flabel metal3 s 633266 553624 633726 553694 0 FreeSans 400 0 0 0 gpio_slow_sel[8] port 369 nsew -flabel metal3 s 633270 551784 633726 551854 0 FreeSans 400 0 0 0 gpio_in[8] +flabel metal3 s 633266 551784 633726 551854 0 FreeSans 400 0 0 0 gpio_in[8] port 721 nsew -flabel metal3 s 633270 555464 633726 555534 0 FreeSans 400 0 0 0 gpio_dm1[8] +flabel metal3 s 633266 555464 633726 555534 0 FreeSans 400 0 0 0 gpio_dm1[8] port 633 nsew -flabel metal3 s 633270 556660 633726 556730 0 FreeSans 400 0 0 0 gpio_analog_en[8] +flabel metal3 s 633266 556660 633726 556730 0 FreeSans 400 0 0 0 gpio_analog_en[8] port 457 nsew -flabel metal3 s 633270 557948 633726 558018 0 FreeSans 400 0 0 0 gpio_analog_pol[8] +flabel metal3 s 633266 557948 633726 558018 0 FreeSans 400 0 0 0 gpio_analog_pol[8] port 545 nsew -flabel metal3 s 633270 560984 633726 561054 0 FreeSans 400 0 0 0 gpio_analog_sel[8] +flabel metal3 s 633266 560984 633726 561054 0 FreeSans 400 0 0 0 gpio_analog_sel[8] port 501 nsew -flabel metal3 s 633270 557304 633726 557374 0 FreeSans 400 0 0 0 gpio_dm0[8] +flabel metal3 s 633266 557304 633726 557374 0 FreeSans 400 0 0 0 gpio_dm0[8] port 589 nsew -flabel metal3 s 633270 561628 633726 561698 0 FreeSans 400 0 0 0 gpio_dm2[8] +flabel metal3 s 633266 561628 633726 561698 0 FreeSans 400 0 0 0 gpio_dm2[8] port 677 nsew -flabel metal3 s 633270 562272 633726 562342 0 FreeSans 400 0 0 0 gpio_holdover[8] +flabel metal3 s 633266 562272 633726 562342 0 FreeSans 400 0 0 0 gpio_holdover[8] port 413 nsew -flabel metal3 s 633270 565308 633726 565378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] +flabel metal3 s 633266 565308 633726 565378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[8] port 281 nsew -flabel metal3 s 633270 558500 633726 558570 0 FreeSans 400 0 0 0 gpio_inp_dis[8] +flabel metal3 s 633266 558500 633726 558570 0 FreeSans 400 0 0 0 gpio_inp_dis[8] port 237 nsew -flabel metal3 s 633270 565952 633726 566022 0 FreeSans 400 0 0 0 gpio_oeb[8] +flabel metal3 s 633266 565952 633726 566022 0 FreeSans 400 0 0 0 gpio_oeb[8] port 193 nsew -flabel metal3 s 633270 562824 633726 562894 0 FreeSans 400 0 0 0 gpio_out[8] +flabel metal3 s 633266 562824 633726 562894 0 FreeSans 400 0 0 0 gpio_out[8] port 149 nsew -flabel metal3 s 633270 564664 633726 564734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] +flabel metal3 s 633266 564664 633726 564734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[8] port 325 nsew -flabel metal3 s 633270 566504 633726 566574 0 FreeSans 400 0 0 0 gpio_in_h[8] +flabel metal3 s 633266 566504 633726 566574 0 FreeSans 400 0 0 0 gpio_in_h[8] port 765 nsew -flabel metal3 s 633270 598624 633726 598694 0 FreeSans 400 0 0 0 gpio_slow_sel[9] +flabel metal3 s 633266 598624 633726 598694 0 FreeSans 400 0 0 0 gpio_slow_sel[9] port 368 nsew -flabel metal3 s 633270 596784 633726 596854 0 FreeSans 400 0 0 0 gpio_in[9] +flabel metal3 s 633266 596784 633726 596854 0 FreeSans 400 0 0 0 gpio_in[9] port 720 nsew -flabel metal3 s 633270 600464 633726 600534 0 FreeSans 400 0 0 0 gpio_dm1[9] +flabel metal3 s 633266 600464 633726 600534 0 FreeSans 400 0 0 0 gpio_dm1[9] port 632 nsew -flabel metal3 s 633270 601660 633726 601730 0 FreeSans 400 0 0 0 gpio_analog_en[9] +flabel metal3 s 633266 601660 633726 601730 0 FreeSans 400 0 0 0 gpio_analog_en[9] port 456 nsew -flabel metal3 s 633270 602948 633726 603018 0 FreeSans 400 0 0 0 gpio_analog_pol[9] +flabel metal3 s 633266 602948 633726 603018 0 FreeSans 400 0 0 0 gpio_analog_pol[9] port 544 nsew -flabel metal3 s 633270 605984 633726 606054 0 FreeSans 400 0 0 0 gpio_analog_sel[9] +flabel metal3 s 633266 605984 633726 606054 0 FreeSans 400 0 0 0 gpio_analog_sel[9] port 500 nsew -flabel metal3 s 633270 602304 633726 602374 0 FreeSans 400 0 0 0 gpio_dm0[9] +flabel metal3 s 633266 602304 633726 602374 0 FreeSans 400 0 0 0 gpio_dm0[9] port 588 nsew -flabel metal3 s 633270 606628 633726 606698 0 FreeSans 400 0 0 0 gpio_dm2[9] +flabel metal3 s 633266 606628 633726 606698 0 FreeSans 400 0 0 0 gpio_dm2[9] port 676 nsew -flabel metal3 s 633270 607272 633726 607342 0 FreeSans 400 0 0 0 gpio_holdover[9] +flabel metal3 s 633266 607272 633726 607342 0 FreeSans 400 0 0 0 gpio_holdover[9] port 412 nsew -flabel metal3 s 633270 610308 633726 610378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] +flabel metal3 s 633266 610308 633726 610378 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[9] port 280 nsew -flabel metal3 s 633270 603500 633726 603570 0 FreeSans 400 0 0 0 gpio_inp_dis[9] +flabel metal3 s 633266 603500 633726 603570 0 FreeSans 400 0 0 0 gpio_inp_dis[9] port 236 nsew -flabel metal3 s 633270 610952 633726 611022 0 FreeSans 400 0 0 0 gpio_oeb[9] +flabel metal3 s 633266 610952 633726 611022 0 FreeSans 400 0 0 0 gpio_oeb[9] port 192 nsew -flabel metal3 s 633270 607824 633726 607894 0 FreeSans 400 0 0 0 gpio_out[9] +flabel metal3 s 633266 607824 633726 607894 0 FreeSans 400 0 0 0 gpio_out[9] port 148 nsew -flabel metal3 s 633270 609664 633726 609734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] +flabel metal3 s 633266 609664 633726 609734 0 FreeSans 400 0 0 0 gpio_vtrip_sel[9] port 324 nsew -flabel metal3 s 633270 611504 633726 611574 0 FreeSans 400 0 0 0 gpio_in_h[9] +flabel metal3 s 633266 611504 633726 611574 0 FreeSans 400 0 0 0 gpio_in_h[9] port 764 nsew -flabel metal3 s 633270 643824 633726 643894 0 FreeSans 400 0 0 0 gpio_slow_sel[10] +flabel metal3 s 633266 643824 633726 643894 0 FreeSans 400 0 0 0 gpio_slow_sel[10] port 367 nsew -flabel metal3 s 633270 641984 633726 642054 0 FreeSans 400 0 0 0 gpio_in[10] +flabel metal3 s 633266 641984 633726 642054 0 FreeSans 400 0 0 0 gpio_in[10] port 719 nsew -flabel metal3 s 633270 645664 633726 645734 0 FreeSans 400 0 0 0 gpio_dm1[10] +flabel metal3 s 633266 645664 633726 645734 0 FreeSans 400 0 0 0 gpio_dm1[10] port 631 nsew -flabel metal3 s 633270 646860 633726 646930 0 FreeSans 400 0 0 0 gpio_analog_en[10] +flabel metal3 s 633266 646860 633726 646930 0 FreeSans 400 0 0 0 gpio_analog_en[10] port 455 nsew -flabel metal3 s 633270 648148 633726 648218 0 FreeSans 400 0 0 0 gpio_analog_pol[10] +flabel metal3 s 633266 648148 633726 648218 0 FreeSans 400 0 0 0 gpio_analog_pol[10] port 543 nsew -flabel metal3 s 633270 651184 633726 651254 0 FreeSans 400 0 0 0 gpio_analog_sel[10] +flabel metal3 s 633266 651184 633726 651254 0 FreeSans 400 0 0 0 gpio_analog_sel[10] port 499 nsew -flabel metal3 s 633270 647504 633726 647574 0 FreeSans 400 0 0 0 gpio_dm0[10] +flabel metal3 s 633266 647504 633726 647574 0 FreeSans 400 0 0 0 gpio_dm0[10] port 587 nsew -flabel metal3 s 633270 651828 633726 651898 0 FreeSans 400 0 0 0 gpio_dm2[10] +flabel metal3 s 633266 651828 633726 651898 0 FreeSans 400 0 0 0 gpio_dm2[10] port 675 nsew -flabel metal3 s 633270 652472 633726 652542 0 FreeSans 400 0 0 0 gpio_holdover[10] +flabel metal3 s 633266 652472 633726 652542 0 FreeSans 400 0 0 0 gpio_holdover[10] port 411 nsew -flabel metal3 s 633270 655508 633726 655578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] +flabel metal3 s 633266 655508 633726 655578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[10] port 279 nsew -flabel metal3 s 633270 648700 633726 648770 0 FreeSans 400 0 0 0 gpio_inp_dis[10] +flabel metal3 s 633266 648700 633726 648770 0 FreeSans 400 0 0 0 gpio_inp_dis[10] port 235 nsew -flabel metal3 s 633270 656152 633726 656222 0 FreeSans 400 0 0 0 gpio_oeb[10] +flabel metal3 s 633266 656152 633726 656222 0 FreeSans 400 0 0 0 gpio_oeb[10] port 191 nsew -flabel metal3 s 633270 653024 633726 653094 0 FreeSans 400 0 0 0 gpio_out[10] +flabel metal3 s 633266 653024 633726 653094 0 FreeSans 400 0 0 0 gpio_out[10] port 147 nsew -flabel metal3 s 633270 654864 633726 654934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] +flabel metal3 s 633266 654864 633726 654934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[10] port 323 nsew -flabel metal3 s 633270 656704 633726 656774 0 FreeSans 400 0 0 0 gpio_in_h[10] +flabel metal3 s 633266 656704 633726 656774 0 FreeSans 400 0 0 0 gpio_in_h[10] port 763 nsew -flabel metal3 s 633270 688824 633726 688894 0 FreeSans 400 0 0 0 gpio_slow_sel[11] +flabel metal3 s 633266 688824 633726 688894 0 FreeSans 400 0 0 0 gpio_slow_sel[11] port 366 nsew -flabel metal3 s 633270 686984 633726 687054 0 FreeSans 400 0 0 0 gpio_in[11] +flabel metal3 s 633266 686984 633726 687054 0 FreeSans 400 0 0 0 gpio_in[11] port 718 nsew -flabel metal3 s 633270 690664 633726 690734 0 FreeSans 400 0 0 0 gpio_dm1[11] +flabel metal3 s 633266 690664 633726 690734 0 FreeSans 400 0 0 0 gpio_dm1[11] port 630 nsew -flabel metal3 s 633270 697472 633726 697542 0 FreeSans 400 0 0 0 gpio_holdover[11] +flabel metal3 s 633266 697472 633726 697542 0 FreeSans 400 0 0 0 gpio_holdover[11] port 410 nsew -flabel metal3 s 633270 700508 633726 700578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] +flabel metal3 s 633266 700508 633726 700578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[11] port 278 nsew -flabel metal3 s 633270 693700 633726 693770 0 FreeSans 400 0 0 0 gpio_inp_dis[11] +flabel metal3 s 633266 693700 633726 693770 0 FreeSans 400 0 0 0 gpio_inp_dis[11] port 234 nsew -flabel metal3 s 633270 701152 633726 701222 0 FreeSans 400 0 0 0 gpio_oeb[11] +flabel metal3 s 633266 701152 633726 701222 0 FreeSans 400 0 0 0 gpio_oeb[11] port 190 nsew -flabel metal3 s 633270 698024 633726 698094 0 FreeSans 400 0 0 0 gpio_out[11] +flabel metal3 s 633266 698024 633726 698094 0 FreeSans 400 0 0 0 gpio_out[11] port 146 nsew -flabel metal3 s 633270 699864 633726 699934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] +flabel metal3 s 633266 699864 633726 699934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[11] port 322 nsew -flabel metal3 s 633270 691860 633726 691930 0 FreeSans 400 0 0 0 gpio_analog_en[11] +flabel metal3 s 633266 691860 633726 691930 0 FreeSans 400 0 0 0 gpio_analog_en[11] port 454 nsew -flabel metal3 s 633270 693148 633726 693218 0 FreeSans 400 0 0 0 gpio_analog_pol[11] +flabel metal3 s 633266 693148 633726 693218 0 FreeSans 400 0 0 0 gpio_analog_pol[11] port 542 nsew -flabel metal3 s 633270 696184 633726 696254 0 FreeSans 400 0 0 0 gpio_analog_sel[11] +flabel metal3 s 633266 696184 633726 696254 0 FreeSans 400 0 0 0 gpio_analog_sel[11] port 498 nsew -flabel metal3 s 633270 692504 633726 692574 0 FreeSans 400 0 0 0 gpio_dm0[11] +flabel metal3 s 633266 692504 633726 692574 0 FreeSans 400 0 0 0 gpio_dm0[11] port 586 nsew -flabel metal3 s 633270 696828 633726 696898 0 FreeSans 400 0 0 0 gpio_dm2[11] +flabel metal3 s 633266 696828 633726 696898 0 FreeSans 400 0 0 0 gpio_dm2[11] port 674 nsew -flabel metal3 s 633270 701704 633726 701774 0 FreeSans 400 0 0 0 gpio_in_h[11] +flabel metal3 s 633266 701704 633726 701774 0 FreeSans 400 0 0 0 gpio_in_h[11] port 762 nsew -flabel metal3 s 633270 733824 633726 733894 0 FreeSans 400 0 0 0 gpio_slow_sel[12] +flabel metal3 s 633266 733824 633726 733894 0 FreeSans 400 0 0 0 gpio_slow_sel[12] port 365 nsew -flabel metal3 s 633270 731984 633726 732054 0 FreeSans 400 0 0 0 gpio_in[12] +flabel metal3 s 633266 731984 633726 732054 0 FreeSans 400 0 0 0 gpio_in[12] port 717 nsew -flabel metal3 s 633270 735664 633726 735734 0 FreeSans 400 0 0 0 gpio_dm1[12] +flabel metal3 s 633266 735664 633726 735734 0 FreeSans 400 0 0 0 gpio_dm1[12] port 629 nsew -flabel metal3 s 633270 736860 633726 736930 0 FreeSans 400 0 0 0 gpio_analog_en[12] +flabel metal3 s 633266 736860 633726 736930 0 FreeSans 400 0 0 0 gpio_analog_en[12] port 453 nsew -flabel metal3 s 633270 738148 633726 738218 0 FreeSans 400 0 0 0 gpio_analog_pol[12] +flabel metal3 s 633266 738148 633726 738218 0 FreeSans 400 0 0 0 gpio_analog_pol[12] port 541 nsew -flabel metal3 s 633270 741184 633726 741254 0 FreeSans 400 0 0 0 gpio_analog_sel[12] +flabel metal3 s 633266 741184 633726 741254 0 FreeSans 400 0 0 0 gpio_analog_sel[12] port 497 nsew -flabel metal3 s 633270 737504 633726 737574 0 FreeSans 400 0 0 0 gpio_dm0[12] +flabel metal3 s 633266 737504 633726 737574 0 FreeSans 400 0 0 0 gpio_dm0[12] port 585 nsew -flabel metal3 s 633270 741828 633726 741898 0 FreeSans 400 0 0 0 gpio_dm2[12] +flabel metal3 s 633266 741828 633726 741898 0 FreeSans 400 0 0 0 gpio_dm2[12] port 673 nsew -flabel metal3 s 633270 742472 633726 742542 0 FreeSans 400 0 0 0 gpio_holdover[12] +flabel metal3 s 633266 742472 633726 742542 0 FreeSans 400 0 0 0 gpio_holdover[12] port 409 nsew -flabel metal3 s 633270 745508 633726 745578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] +flabel metal3 s 633266 745508 633726 745578 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[12] port 277 nsew -flabel metal3 s 633270 738700 633726 738770 0 FreeSans 400 0 0 0 gpio_inp_dis[12] +flabel metal3 s 633266 738700 633726 738770 0 FreeSans 400 0 0 0 gpio_inp_dis[12] port 233 nsew -flabel metal3 s 633270 746152 633726 746222 0 FreeSans 400 0 0 0 gpio_oeb[12] +flabel metal3 s 633266 746152 633726 746222 0 FreeSans 400 0 0 0 gpio_oeb[12] port 189 nsew -flabel metal3 s 633270 743024 633726 743094 0 FreeSans 400 0 0 0 gpio_out[12] +flabel metal3 s 633266 743024 633726 743094 0 FreeSans 400 0 0 0 gpio_out[12] port 145 nsew -flabel metal3 s 633270 744864 633726 744934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] +flabel metal3 s 633266 744864 633726 744934 0 FreeSans 400 0 0 0 gpio_vtrip_sel[12] port 321 nsew -flabel metal3 s 633270 746704 633726 746774 0 FreeSans 400 0 0 0 gpio_in_h[12] +flabel metal3 s 633266 746704 633726 746774 0 FreeSans 400 0 0 0 gpio_in_h[12] port 761 nsew -flabel metal3 s 633270 823024 633726 823094 0 FreeSans 400 0 0 0 gpio_slow_sel[13] +flabel metal3 s 633266 823024 633726 823094 0 FreeSans 400 0 0 0 gpio_slow_sel[13] port 364 nsew -flabel metal3 s 633270 821184 633726 821254 0 FreeSans 400 0 0 0 gpio_in[13] +flabel metal3 s 633266 821184 633726 821254 0 FreeSans 400 0 0 0 gpio_in[13] port 716 nsew -flabel metal3 s 633270 824864 633726 824934 0 FreeSans 400 0 0 0 gpio_dm1[13] +flabel metal3 s 633266 824864 633726 824934 0 FreeSans 400 0 0 0 gpio_dm1[13] port 628 nsew -flabel metal3 s 633270 826060 633726 826130 0 FreeSans 400 0 0 0 gpio_analog_en[13] +flabel metal3 s 633266 826060 633726 826130 0 FreeSans 400 0 0 0 gpio_analog_en[13] port 452 nsew -flabel metal3 s 633270 827348 633726 827418 0 FreeSans 400 0 0 0 gpio_analog_pol[13] +flabel metal3 s 633266 827348 633726 827418 0 FreeSans 400 0 0 0 gpio_analog_pol[13] port 540 nsew -flabel metal3 s 633270 830384 633726 830454 0 FreeSans 400 0 0 0 gpio_analog_sel[13] +flabel metal3 s 633266 830384 633726 830454 0 FreeSans 400 0 0 0 gpio_analog_sel[13] port 496 nsew -flabel metal3 s 633270 826704 633726 826774 0 FreeSans 400 0 0 0 gpio_dm0[13] +flabel metal3 s 633266 826704 633726 826774 0 FreeSans 400 0 0 0 gpio_dm0[13] port 584 nsew -flabel metal3 s 633270 831028 633726 831098 0 FreeSans 400 0 0 0 gpio_dm2[13] +flabel metal3 s 633266 831028 633726 831098 0 FreeSans 400 0 0 0 gpio_dm2[13] port 672 nsew -flabel metal3 s 633270 831672 633726 831742 0 FreeSans 400 0 0 0 gpio_holdover[13] +flabel metal3 s 633266 831672 633726 831742 0 FreeSans 400 0 0 0 gpio_holdover[13] port 408 nsew -flabel metal3 s 633270 834708 633726 834778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] +flabel metal3 s 633266 834708 633726 834778 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[13] port 276 nsew -flabel metal3 s 633270 827900 633726 827970 0 FreeSans 400 0 0 0 gpio_inp_dis[13] +flabel metal3 s 633266 827900 633726 827970 0 FreeSans 400 0 0 0 gpio_inp_dis[13] port 232 nsew -flabel metal3 s 633270 835352 633726 835422 0 FreeSans 400 0 0 0 gpio_oeb[13] +flabel metal3 s 633266 835352 633726 835422 0 FreeSans 400 0 0 0 gpio_oeb[13] port 188 nsew -flabel metal3 s 633270 832224 633726 832294 0 FreeSans 400 0 0 0 gpio_out[13] +flabel metal3 s 633266 832224 633726 832294 0 FreeSans 400 0 0 0 gpio_out[13] port 144 nsew -flabel metal3 s 633270 834064 633726 834134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] +flabel metal3 s 633266 834064 633726 834134 0 FreeSans 400 0 0 0 gpio_vtrip_sel[13] port 320 nsew -flabel metal3 s 633270 835904 633726 835974 0 FreeSans 400 0 0 0 gpio_in_h[13] +flabel metal3 s 633266 835904 633726 835974 0 FreeSans 400 0 0 0 gpio_in_h[13] port 760 nsew -flabel metal3 s 633270 912224 633726 912294 0 FreeSans 400 0 0 0 gpio_slow_sel[14] +flabel metal3 s 633266 912224 633726 912294 0 FreeSans 400 0 0 0 gpio_slow_sel[14] port 363 nsew -flabel metal3 s 633270 910384 633726 910454 0 FreeSans 400 0 0 0 gpio_in[14] +flabel metal3 s 633266 910384 633726 910454 0 FreeSans 400 0 0 0 gpio_in[14] port 715 nsew -flabel metal3 s 633270 914064 633726 914134 0 FreeSans 400 0 0 0 gpio_dm1[14] +flabel metal3 s 633266 914064 633726 914134 0 FreeSans 400 0 0 0 gpio_dm1[14] port 627 nsew -flabel metal3 s 633270 915260 633726 915330 0 FreeSans 400 0 0 0 gpio_analog_en[14] +flabel metal3 s 633266 915260 633726 915330 0 FreeSans 400 0 0 0 gpio_analog_en[14] port 451 nsew -flabel metal3 s 633270 916548 633726 916618 0 FreeSans 400 0 0 0 gpio_analog_pol[14] +flabel metal3 s 633266 916548 633726 916618 0 FreeSans 400 0 0 0 gpio_analog_pol[14] port 539 nsew -flabel metal3 s 633270 919584 633726 919654 0 FreeSans 400 0 0 0 gpio_analog_sel[14] +flabel metal3 s 633266 919584 633726 919654 0 FreeSans 400 0 0 0 gpio_analog_sel[14] port 495 nsew -flabel metal3 s 633270 915904 633726 915974 0 FreeSans 400 0 0 0 gpio_dm0[14] +flabel metal3 s 633266 915904 633726 915974 0 FreeSans 400 0 0 0 gpio_dm0[14] port 583 nsew -flabel metal3 s 633270 920228 633726 920298 0 FreeSans 400 0 0 0 gpio_dm2[14] +flabel metal3 s 633266 920228 633726 920298 0 FreeSans 400 0 0 0 gpio_dm2[14] port 671 nsew -flabel metal3 s 633270 920872 633726 920942 0 FreeSans 400 0 0 0 gpio_holdover[14] +flabel metal3 s 633266 920872 633726 920942 0 FreeSans 400 0 0 0 gpio_holdover[14] port 407 nsew -flabel metal3 s 633270 923908 633726 923978 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] +flabel metal3 s 633266 923908 633726 923978 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[14] port 275 nsew -flabel metal3 s 633270 917100 633726 917170 0 FreeSans 400 0 0 0 gpio_inp_dis[14] +flabel metal3 s 633266 917100 633726 917170 0 FreeSans 400 0 0 0 gpio_inp_dis[14] port 231 nsew -flabel metal3 s 633270 924552 633726 924622 0 FreeSans 400 0 0 0 gpio_oeb[14] +flabel metal3 s 633266 924552 633726 924622 0 FreeSans 400 0 0 0 gpio_oeb[14] port 187 nsew -flabel metal3 s 633270 921424 633726 921494 0 FreeSans 400 0 0 0 gpio_out[14] +flabel metal3 s 633266 921424 633726 921494 0 FreeSans 400 0 0 0 gpio_out[14] port 143 nsew -flabel metal3 s 633270 923264 633726 923334 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] +flabel metal3 s 633266 923264 633726 923334 0 FreeSans 400 0 0 0 gpio_vtrip_sel[14] port 319 nsew -flabel metal3 s 633270 925104 633726 925174 0 FreeSans 400 0 0 0 gpio_in_h[14] +flabel metal3 s 633266 925104 633726 925174 0 FreeSans 400 0 0 0 gpio_in_h[14] port 759 nsew -flabel metal3 s -400 927072 56 927142 0 FreeSans 400 0 0 0 gpio_in[24] +flabel metal3 s -400 927072 60 927142 0 FreeSans 400 0 0 0 gpio_in[24] port 705 nsew -flabel metal3 s -400 925232 56 925302 0 FreeSans 400 0 0 0 gpio_slow_sel[24] +flabel metal3 s -400 925232 60 925302 0 FreeSans 400 0 0 0 gpio_slow_sel[24] port 353 nsew -flabel metal3 s -400 923392 56 923462 0 FreeSans 400 0 0 0 gpio_dm1[24] +flabel metal3 s -400 923392 60 923462 0 FreeSans 400 0 0 0 gpio_dm1[24] port 617 nsew -flabel metal3 s -400 922196 56 922266 0 FreeSans 400 0 0 0 gpio_analog_en[24] +flabel metal3 s -400 922196 60 922266 0 FreeSans 400 0 0 0 gpio_analog_en[24] port 441 nsew -flabel metal3 s -400 921552 56 921622 0 FreeSans 400 0 0 0 gpio_dm0[24] +flabel metal3 s -400 921552 60 921622 0 FreeSans 400 0 0 0 gpio_dm0[24] port 573 nsew -flabel metal3 s -400 920908 56 920978 0 FreeSans 400 0 0 0 gpio_analog_pol[24] +flabel metal3 s -400 920908 60 920978 0 FreeSans 400 0 0 0 gpio_analog_pol[24] port 529 nsew -flabel metal3 s -400 920356 56 920426 0 FreeSans 400 0 0 0 gpio_inp_dis[24] +flabel metal3 s -400 920356 60 920426 0 FreeSans 400 0 0 0 gpio_inp_dis[24] port 221 nsew -flabel metal3 s -400 917872 56 917942 0 FreeSans 400 0 0 0 gpio_analog_sel[24] +flabel metal3 s -400 917872 60 917942 0 FreeSans 400 0 0 0 gpio_analog_sel[24] port 485 nsew -flabel metal3 s -400 917228 56 917298 0 FreeSans 400 0 0 0 gpio_dm2[24] +flabel metal3 s -400 917228 60 917298 0 FreeSans 400 0 0 0 gpio_dm2[24] port 661 nsew -flabel metal3 s -400 916584 56 916654 0 FreeSans 400 0 0 0 gpio_holdover[24] +flabel metal3 s -400 916584 60 916654 0 FreeSans 400 0 0 0 gpio_holdover[24] port 397 nsew -flabel metal3 s -400 916032 56 916102 0 FreeSans 400 0 0 0 gpio_out[24] +flabel metal3 s -400 916032 60 916102 0 FreeSans 400 0 0 0 gpio_out[24] port 133 nsew -flabel metal3 s -400 914192 56 914262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] +flabel metal3 s -400 914192 60 914262 0 FreeSans 400 0 0 0 gpio_vtrip_sel[24] port 309 nsew -flabel metal3 s -400 913548 56 913618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] +flabel metal3 s -400 913548 60 913618 0 FreeSans 400 0 0 0 gpio_ib_mode_sel[24] port 265 nsew -flabel metal3 s -400 912904 56 912974 0 FreeSans 400 0 0 0 gpio_oeb[24] +flabel metal3 s -400 912904 60 912974 0 FreeSans 400 0 0 0 gpio_oeb[24] port 177 nsew -flabel metal3 s -400 912352 56 912422 0 FreeSans 400 0 0 0 gpio_in_h[24] +flabel metal3 s -400 912352 60 912422 0 FreeSans 400 0 0 0 gpio_in_h[24] port 749 nsew -flabel metal3 s -400 924560 56 924688 0 FreeSans 400 0 0 0 analog_io[24] +flabel metal3 s -400 924560 60 924688 0 FreeSans 400 0 0 0 analog_io[24] port 881 nsew -flabel metal3 s -400 922677 56 922891 0 FreeSans 400 0 0 0 analog_noesd_io[24] +flabel metal3 s -400 922677 60 922891 0 FreeSans 400 0 0 0 analog_noesd_io[24] port 925 nsew flabel metal2 27498 953270 27558 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[23] port 794 nsew From b3273ca5aa254887a512b0ae70cecd9110cf0f4d Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Sun, 1 Oct 2023 21:11:33 -0400 Subject: [PATCH 126/138] Added the set of missing pins on the 2nd of the two vccd1/vssd1 power pads to the user project wrapper layout, which were missing, as pointed out by Marwan. Regenerated the wrapper DEF file from the updated layout. --- def/openframe_project_wrapper.def | 11 ++++++++++- mag/openframe_project_wrapper.mag | 11 ++++++++++- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/def/openframe_project_wrapper.def b/def/openframe_project_wrapper.def index b78bb25e..e6382610 100644 --- a/def/openframe_project_wrapper.def +++ b/def/openframe_project_wrapper.def @@ -13,7 +13,7 @@ END VIAS COMPONENTS 0 ; END COMPONENTS -PINS 914 ; +PINS 917 ; - gpio_vtrip_sel[43] + NET gpio_vtrip_sel[43] + PORT + LAYER met2 ( -140 -1140 ) ( 140 1140 ) + PLACED ( 2429490 -860 ) N ; @@ -2756,6 +2756,15 @@ PINS 914 ; - gpio_loopback_zero[15] + NET gpio_loopback_zero[15] + PORT + LAYER met2 ( -150 -1140 ) ( 150 1140 ) + PLACED ( 2881640 4767490 ) N ; + - vccd1 + NET vccd1 + + PORT + + LAYER met3 ( -1150 -12000 ) ( 1150 12000 ) + PLACED ( 3167480 4389810 ) N ; + - vssd1 + NET vssd1 + + PORT + + LAYER met3 ( -1150 -11655 ) ( 1150 11655 ) + PLACED ( 3167480 4364705 ) N ; + - vccd1 + NET vccd1 + + PORT + + LAYER met3 ( -1150 -11975 ) ( 1150 11975 ) + PLACED ( 3167480 4339585 ) N ; END PINS END DESIGN diff --git a/mag/openframe_project_wrapper.mag b/mag/openframe_project_wrapper.mag index 459eb065..047cab34 100644 --- a/mag/openframe_project_wrapper.mag +++ b/mag/openframe_project_wrapper.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1695840358 +timestamp 1696208960 << metal2 >> rect 27498 953270 27558 953726 rect 29498 953270 29558 953726 @@ -367,7 +367,10 @@ rect -400 906644 60 906704 rect -400 904644 60 904704 rect -400 880014 60 884804 rect -400 875054 60 879716 +rect 633266 875562 633726 880362 rect -400 869964 60 874764 +rect 633266 870610 633726 875272 +rect 633266 865522 633726 870312 rect -400 837742 60 842522 rect 633266 839006 633726 839068 rect 633266 837006 633726 837068 @@ -2750,6 +2753,12 @@ flabel metal2 476898 953270 476958 953726 0 FreeSans 400 90 0 0 gpio_loopback_ze port 801 nsew flabel metal2 576298 953270 576358 953726 0 FreeSans 400 90 0 0 gpio_loopback_zero[15] port 802 nsew +flabel metal3 s 633266 875562 633726 880362 0 FreeSans 3200 90 0 0 vccd1 +port 28 nsew +flabel metal3 s 633266 870610 633726 875272 0 FreeSans 3200 90 0 0 vssd1 +port 30 nsew +flabel metal3 s 633266 865522 633726 870312 0 FreeSans 3200 90 0 0 vccd1 +port 28 nsew << properties >> string FIXED_BBOX 0 0 633326 953326 << end >> From 112142521c7af82354f0ef4d7832ad5711928093 Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sun, 8 Oct 2023 14:05:22 +0300 Subject: [PATCH 127/138] Add files via upload --- gds/openframe_project_wrapper_empty.gds.gz | Bin 0 -> 32900 bytes 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 gds/openframe_project_wrapper_empty.gds.gz diff --git a/gds/openframe_project_wrapper_empty.gds.gz b/gds/openframe_project_wrapper_empty.gds.gz new file mode 100644 index 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zze6U1_iNHy#l8J3@>J_;&Ej21a0ZMghQx~If1xCoXIDENH-)uNUVw0f15(*Bn|%JiWRi#(-1WZp$87MadBAK*H*zFu2t8W9`sctt z*b9991DGumv?F)2@3?OGT*cRrl)*i~mlY6Ig(xiDs@a&l3fMw+&+I^9CDWolAi((2 z*r)zpixY#ENdQXP)cgBz^{TP|W#LUj2BDqPTgV0yjMa z^Gvh)4$%&WG7 Date: Sun, 8 Oct 2023 17:59:16 -0400 Subject: [PATCH 128/138] Reverted "chip_io_gpio_connects.mag". Backed out an error in which the layout "chip_io_gpio_connects.mag", which was used on caravel and caravan, was modified for openframe, making it incompatible with caravel and caravan. Renamed it to "chip_io_gpio_connects_vert.mag" which makes it unique to openframe and also matches the nomenclature of "chip_io_gpio_connects_horiz". --- mag/chip_io_gpio_connects.mag | 261 +++++++++-------------------- mag/chip_io_gpio_connects_vert.mag | 215 ++++++++++++++++++++++++ mag/chip_io_openframe.mag | 30 ++-- 3 files changed, 306 insertions(+), 200 deletions(-) create mode 100644 mag/chip_io_gpio_connects_vert.mag diff --git a/mag/chip_io_gpio_connects.mag b/mag/chip_io_gpio_connects.mag index e149b496..0bbce4fe 100644 --- a/mag/chip_io_gpio_connects.mag +++ b/mag/chip_io_gpio_connects.mag @@ -1,215 +1,106 @@ magic tech sky130A magscale 1 2 -timestamp 1695745122 +timestamp 1686151263 +<< checkpaint >> +rect 675396 121665 678085 122078 +rect 675258 117277 678085 121665 +rect 674508 115475 678085 117277 +rect 674508 114693 678023 115475 +rect 674516 114683 678023 114693 +rect 674516 114672 678018 114683 +rect 674516 103443 677084 114672 +rect 674514 103440 677086 103443 +rect 674514 103439 677088 103440 +rect 674509 103379 677091 103439 +rect 674509 100863 677215 103379 +rect 674512 100696 677215 100863 +rect 674516 99196 677084 100696 << metal1 >> -rect 675768 115799 675774 116011 -rect 675826 115799 675832 116011 +rect 675768 115959 675774 116011 +rect 675826 115959 675832 116011 rect 675682 113371 675734 115709 rect 675586 112665 675638 112671 rect 675586 112487 675638 112493 -rect 675588 108330 675636 112487 -rect 675682 108990 675734 113199 -rect 675586 108324 675638 108330 -rect 675586 108146 675638 108152 -rect 675588 100462 675636 108146 +rect 675490 109630 675542 109636 +rect 675490 109452 675542 109458 +rect 675492 101631 675540 109452 +rect 675588 108347 675636 112487 +rect 675682 109050 675734 113199 +rect 675586 108341 675638 108347 +rect 675586 108163 675638 108169 +rect 675490 101625 675542 101631 +rect 675490 101567 675542 101573 +rect 675492 100265 675540 101567 +rect 675588 100462 675636 108163 rect 675586 100456 675638 100462 rect 675586 100278 675638 100284 rect 675588 100265 675636 100278 -rect 675682 99896 675734 108806 -rect 675776 102383 675824 115799 -rect 675878 109636 675930 109642 -rect 675878 109452 675930 109458 -rect 675774 102377 675826 102383 +rect 675682 99896 675734 108866 +rect 675776 102183 675824 115959 +rect 675774 102177 675826 102183 rect 675774 102119 675826 102125 -rect 675880 101831 675928 109452 -rect 677392 103462 677399 103674 -rect 677451 103514 677458 103674 -rect 677451 103462 677652 103514 -rect 675878 101825 675930 101831 -rect 675878 101567 675930 101573 << via1 >> -rect 675774 115799 675826 116011 +rect 675774 115959 675826 116011 rect 675682 113199 675734 113371 rect 675586 112493 675638 112665 -rect 675682 108806 675734 108990 -rect 675586 108152 675638 108324 +rect 675490 109458 675542 109630 +rect 675682 108866 675734 109050 +rect 675586 108169 675638 108341 +rect 675490 101573 675542 101625 rect 675586 100284 675638 100456 -rect 675878 109458 675930 109636 -rect 675774 102125 675826 102377 -rect 677399 103462 677451 103674 -rect 675878 101573 675930 101825 +rect 675774 102125 675826 102177 << metal2 >> rect 675774 116011 675826 116017 rect 676698 116015 676758 116024 rect 675826 115961 676698 116009 -rect 675826 115801 675836 115961 -rect 676685 115801 676698 115961 -rect 675774 115793 675826 115799 -rect 676698 115786 676758 115795 -rect 677000 115915 677278 115920 -rect 677000 115801 677159 115915 -rect 677273 115801 677282 115915 -rect 677000 115796 677278 115801 -rect 677000 115703 677085 115796 -rect 675831 115647 677085 115703 -rect 677025 115279 677614 115325 -rect 677025 115151 677071 115279 -rect 675874 115095 677071 115151 -rect 676855 114870 677614 114916 -rect 676855 114507 676901 114870 -rect 675874 114451 676901 114507 -rect 677017 114722 677614 114774 -rect 677017 113863 677069 114722 -rect 675874 113807 677069 113863 -rect 676969 113397 677614 113449 -rect 675676 113199 675682 113371 +rect 675774 115953 675826 115959 +rect 676698 115946 676758 115955 +rect 675676 113311 675682 113371 +rect 675407 113255 675682 113311 +rect 675676 113199 675682 113255 rect 675734 113311 675740 113371 -rect 676969 113311 677021 113397 -rect 675734 113255 677021 113311 +rect 675734 113255 675887 113311 rect 675734 113199 675740 113255 -rect 677022 112686 677614 112738 -rect 677022 112667 677074 112686 -rect 675580 112665 677074 112667 -rect 675580 112493 675586 112665 -rect 675638 112611 677074 112665 +rect 675407 112665 675887 112667 +rect 675407 112611 675586 112665 +rect 675580 112493 675586 112611 +rect 675638 112611 675887 112665 rect 675638 112493 675644 112611 -rect 675874 111967 677216 112023 -rect 677164 111529 677216 111967 -rect 677164 111477 677614 111529 -rect 675874 111415 677044 111471 -rect 675874 110771 676892 110827 -rect 676836 110302 676892 110771 -rect 676992 110680 677044 111415 -rect 676992 110628 677614 110680 -rect 676836 110250 677614 110302 -rect 675874 110127 676727 110183 -rect 676671 109850 676727 110127 -rect 676671 109798 677614 109850 -rect 675872 109637 675936 109643 -rect 675872 109636 677614 109637 -rect 675872 109458 675878 109636 -rect 675930 109585 677614 109636 -rect 675930 109581 676776 109585 -rect 675930 109458 675936 109581 -rect 675872 109451 675936 109458 -rect 675676 108990 675740 108997 -rect 675676 108806 675682 108990 -rect 675734 108908 675740 108990 -rect 675734 108856 677614 108908 -rect 675734 108806 675740 108856 -rect 675676 108799 675740 108806 -rect 675580 108326 675644 108331 -rect 675580 108324 677230 108326 -rect 675580 108152 675586 108324 -rect 675638 108322 677230 108324 -rect 675638 108270 677614 108322 -rect 675638 108152 675644 108270 -rect 675580 108145 675644 108152 -rect 675874 107643 677216 107699 -rect 675874 107091 677086 107147 -rect 677020 106982 677086 107091 -rect 677016 106766 677025 106982 -rect 677081 106766 677090 106982 -rect 677164 106951 677216 107643 -rect 677164 106899 677614 106951 -rect 677020 106761 677086 106766 -rect 675874 106447 677230 106503 -rect 677174 106029 677230 106447 -rect 677174 105977 677614 106029 -rect 675874 105803 677451 105859 -rect 676806 105386 677010 105390 -rect 675407 105381 677015 105386 -rect 675407 105172 676806 105381 -rect 676801 104977 676806 105172 -rect 677010 104977 677015 105381 -rect 676801 104972 677015 104977 -rect 676806 104968 677010 104972 -rect 675874 104607 676520 104663 -rect 675407 103375 676368 103503 -rect 676240 103038 676368 103375 -rect 676466 103185 676518 104607 -rect 677399 103674 677451 105803 -rect 677399 103456 677451 103462 -rect 676466 103133 677240 103185 -rect 676240 102910 677133 103038 -rect 675874 102767 676909 102823 -rect 675769 102377 675832 102383 -rect 675769 102125 675774 102377 -rect 675826 102179 675832 102377 -rect 675826 102125 676776 102179 -rect 675769 102123 676776 102125 -rect 675769 102116 675832 102123 -rect 675871 101825 675936 101834 -rect 675871 101573 675878 101825 -rect 675930 101627 675936 101825 -rect 675930 101573 676610 101627 -rect 675871 101571 676610 101573 -rect 675871 101564 675936 101571 -rect 675874 100927 676467 100983 -rect 675580 100456 675644 100463 -rect 675580 100284 675586 100456 +rect 675407 109630 675887 109631 +rect 675407 109575 675490 109630 +rect 675484 109458 675490 109575 +rect 675542 109575 675887 109630 +rect 675542 109458 675548 109575 +rect 675676 108866 675682 109050 +rect 675734 108866 675740 109050 +rect 675407 108341 675887 108343 +rect 675407 108287 675586 108341 +rect 675580 108169 675586 108287 +rect 675638 108287 675887 108341 +rect 675638 108169 675644 108287 +rect 675407 102177 675887 102179 +rect 675407 102125 675774 102177 +rect 675826 102125 675887 102177 +rect 675407 102123 675887 102125 +rect 675407 101625 675887 101627 +rect 675407 101573 675490 101625 +rect 675542 101573 675887 101625 +rect 675407 101571 675887 101573 +rect 675580 100339 675586 100456 +rect 675407 100284 675586 100339 rect 675638 100339 675644 100456 -rect 675638 100284 676255 100339 -rect 676401 100307 676467 100927 -rect 675580 100283 676255 100284 -rect 675580 100276 675644 100283 -rect 676214 100057 676254 100283 -rect 676397 100091 676406 100307 -rect 676462 100091 676471 100307 -rect 676570 100259 676610 101571 -rect 676710 100595 676776 102123 -rect 676710 100379 676715 100595 -rect 676771 100379 676776 100595 -rect 676857 100478 676909 102767 -rect 677005 100744 677133 102910 -rect 677188 102633 677240 103133 -rect 677188 102581 677614 102633 -rect 677005 100616 677614 100744 -rect 676857 100426 677614 100478 -rect 676710 100374 676776 100379 -rect 676715 100370 676771 100374 -rect 676570 100219 677614 100259 -rect 676401 100086 676467 100091 -rect 676214 100017 677614 100057 +rect 675638 100284 675887 100339 +rect 675407 100283 675887 100284 << via2 >> -rect 676698 115795 676758 116015 -rect 677159 115801 677273 115915 -rect 677025 106766 677081 106982 -rect 676806 104977 677010 105381 -rect 676406 100091 676462 100307 -rect 676715 100379 676771 100595 +rect 676698 115955 676758 116015 << metal3 >> rect 676696 116020 676756 117658 rect 676693 116015 676763 116020 -rect 676693 115795 676698 116015 -rect 676758 115795 676763 116015 -rect 677154 115915 677614 115920 -rect 677154 115801 677159 115915 -rect 677273 115801 677614 115915 -rect 677154 115796 677614 115801 -rect 676693 115790 676763 115795 -rect 676696 115783 676756 115790 -rect 677020 106982 677095 106987 -rect 677020 106766 677025 106982 -rect 677081 106827 677095 106982 -rect 677081 106766 677614 106827 -rect 677020 106761 677614 106766 -rect 676801 105381 677015 105386 -rect 676801 104977 676806 105381 -rect 677010 104977 677015 105381 -rect 676801 103436 677015 104977 -rect 676801 103222 677614 103436 -rect 676710 100595 676776 100600 -rect 676710 100379 676715 100595 -rect 676771 100379 676776 100595 -rect 676401 100307 676472 100312 -rect 676401 100091 676406 100307 -rect 676462 100152 676472 100307 -rect 676710 100284 676776 100379 -rect 676710 100218 677614 100284 -rect 676462 100091 677614 100152 -rect 676401 100086 677614 100091 +rect 676693 115955 676698 116015 +rect 676758 115955 676763 116015 +rect 676693 115950 676763 115955 +rect 676696 115943 676756 115950 << properties >> string flatten true << end >> diff --git a/mag/chip_io_gpio_connects_vert.mag b/mag/chip_io_gpio_connects_vert.mag new file mode 100644 index 00000000..e149b496 --- /dev/null +++ b/mag/chip_io_gpio_connects_vert.mag @@ -0,0 +1,215 @@ +magic +tech sky130A +magscale 1 2 +timestamp 1695745122 +<< metal1 >> +rect 675768 115799 675774 116011 +rect 675826 115799 675832 116011 +rect 675682 113371 675734 115709 +rect 675586 112665 675638 112671 +rect 675586 112487 675638 112493 +rect 675588 108330 675636 112487 +rect 675682 108990 675734 113199 +rect 675586 108324 675638 108330 +rect 675586 108146 675638 108152 +rect 675588 100462 675636 108146 +rect 675586 100456 675638 100462 +rect 675586 100278 675638 100284 +rect 675588 100265 675636 100278 +rect 675682 99896 675734 108806 +rect 675776 102383 675824 115799 +rect 675878 109636 675930 109642 +rect 675878 109452 675930 109458 +rect 675774 102377 675826 102383 +rect 675774 102119 675826 102125 +rect 675880 101831 675928 109452 +rect 677392 103462 677399 103674 +rect 677451 103514 677458 103674 +rect 677451 103462 677652 103514 +rect 675878 101825 675930 101831 +rect 675878 101567 675930 101573 +<< via1 >> +rect 675774 115799 675826 116011 +rect 675682 113199 675734 113371 +rect 675586 112493 675638 112665 +rect 675682 108806 675734 108990 +rect 675586 108152 675638 108324 +rect 675586 100284 675638 100456 +rect 675878 109458 675930 109636 +rect 675774 102125 675826 102377 +rect 677399 103462 677451 103674 +rect 675878 101573 675930 101825 +<< metal2 >> +rect 675774 116011 675826 116017 +rect 676698 116015 676758 116024 +rect 675826 115961 676698 116009 +rect 675826 115801 675836 115961 +rect 676685 115801 676698 115961 +rect 675774 115793 675826 115799 +rect 676698 115786 676758 115795 +rect 677000 115915 677278 115920 +rect 677000 115801 677159 115915 +rect 677273 115801 677282 115915 +rect 677000 115796 677278 115801 +rect 677000 115703 677085 115796 +rect 675831 115647 677085 115703 +rect 677025 115279 677614 115325 +rect 677025 115151 677071 115279 +rect 675874 115095 677071 115151 +rect 676855 114870 677614 114916 +rect 676855 114507 676901 114870 +rect 675874 114451 676901 114507 +rect 677017 114722 677614 114774 +rect 677017 113863 677069 114722 +rect 675874 113807 677069 113863 +rect 676969 113397 677614 113449 +rect 675676 113199 675682 113371 +rect 675734 113311 675740 113371 +rect 676969 113311 677021 113397 +rect 675734 113255 677021 113311 +rect 675734 113199 675740 113255 +rect 677022 112686 677614 112738 +rect 677022 112667 677074 112686 +rect 675580 112665 677074 112667 +rect 675580 112493 675586 112665 +rect 675638 112611 677074 112665 +rect 675638 112493 675644 112611 +rect 675874 111967 677216 112023 +rect 677164 111529 677216 111967 +rect 677164 111477 677614 111529 +rect 675874 111415 677044 111471 +rect 675874 110771 676892 110827 +rect 676836 110302 676892 110771 +rect 676992 110680 677044 111415 +rect 676992 110628 677614 110680 +rect 676836 110250 677614 110302 +rect 675874 110127 676727 110183 +rect 676671 109850 676727 110127 +rect 676671 109798 677614 109850 +rect 675872 109637 675936 109643 +rect 675872 109636 677614 109637 +rect 675872 109458 675878 109636 +rect 675930 109585 677614 109636 +rect 675930 109581 676776 109585 +rect 675930 109458 675936 109581 +rect 675872 109451 675936 109458 +rect 675676 108990 675740 108997 +rect 675676 108806 675682 108990 +rect 675734 108908 675740 108990 +rect 675734 108856 677614 108908 +rect 675734 108806 675740 108856 +rect 675676 108799 675740 108806 +rect 675580 108326 675644 108331 +rect 675580 108324 677230 108326 +rect 675580 108152 675586 108324 +rect 675638 108322 677230 108324 +rect 675638 108270 677614 108322 +rect 675638 108152 675644 108270 +rect 675580 108145 675644 108152 +rect 675874 107643 677216 107699 +rect 675874 107091 677086 107147 +rect 677020 106982 677086 107091 +rect 677016 106766 677025 106982 +rect 677081 106766 677090 106982 +rect 677164 106951 677216 107643 +rect 677164 106899 677614 106951 +rect 677020 106761 677086 106766 +rect 675874 106447 677230 106503 +rect 677174 106029 677230 106447 +rect 677174 105977 677614 106029 +rect 675874 105803 677451 105859 +rect 676806 105386 677010 105390 +rect 675407 105381 677015 105386 +rect 675407 105172 676806 105381 +rect 676801 104977 676806 105172 +rect 677010 104977 677015 105381 +rect 676801 104972 677015 104977 +rect 676806 104968 677010 104972 +rect 675874 104607 676520 104663 +rect 675407 103375 676368 103503 +rect 676240 103038 676368 103375 +rect 676466 103185 676518 104607 +rect 677399 103674 677451 105803 +rect 677399 103456 677451 103462 +rect 676466 103133 677240 103185 +rect 676240 102910 677133 103038 +rect 675874 102767 676909 102823 +rect 675769 102377 675832 102383 +rect 675769 102125 675774 102377 +rect 675826 102179 675832 102377 +rect 675826 102125 676776 102179 +rect 675769 102123 676776 102125 +rect 675769 102116 675832 102123 +rect 675871 101825 675936 101834 +rect 675871 101573 675878 101825 +rect 675930 101627 675936 101825 +rect 675930 101573 676610 101627 +rect 675871 101571 676610 101573 +rect 675871 101564 675936 101571 +rect 675874 100927 676467 100983 +rect 675580 100456 675644 100463 +rect 675580 100284 675586 100456 +rect 675638 100339 675644 100456 +rect 675638 100284 676255 100339 +rect 676401 100307 676467 100927 +rect 675580 100283 676255 100284 +rect 675580 100276 675644 100283 +rect 676214 100057 676254 100283 +rect 676397 100091 676406 100307 +rect 676462 100091 676471 100307 +rect 676570 100259 676610 101571 +rect 676710 100595 676776 102123 +rect 676710 100379 676715 100595 +rect 676771 100379 676776 100595 +rect 676857 100478 676909 102767 +rect 677005 100744 677133 102910 +rect 677188 102633 677240 103133 +rect 677188 102581 677614 102633 +rect 677005 100616 677614 100744 +rect 676857 100426 677614 100478 +rect 676710 100374 676776 100379 +rect 676715 100370 676771 100374 +rect 676570 100219 677614 100259 +rect 676401 100086 676467 100091 +rect 676214 100017 677614 100057 +<< via2 >> +rect 676698 115795 676758 116015 +rect 677159 115801 677273 115915 +rect 677025 106766 677081 106982 +rect 676806 104977 677010 105381 +rect 676406 100091 676462 100307 +rect 676715 100379 676771 100595 +<< metal3 >> +rect 676696 116020 676756 117658 +rect 676693 116015 676763 116020 +rect 676693 115795 676698 116015 +rect 676758 115795 676763 116015 +rect 677154 115915 677614 115920 +rect 677154 115801 677159 115915 +rect 677273 115801 677614 115915 +rect 677154 115796 677614 115801 +rect 676693 115790 676763 115795 +rect 676696 115783 676756 115790 +rect 677020 106982 677095 106987 +rect 677020 106766 677025 106982 +rect 677081 106827 677095 106982 +rect 677081 106766 677614 106827 +rect 677020 106761 677614 106766 +rect 676801 105381 677015 105386 +rect 676801 104977 676806 105381 +rect 677010 104977 677015 105381 +rect 676801 103436 677015 104977 +rect 676801 103222 677614 103436 +rect 676710 100595 676776 100600 +rect 676710 100379 676715 100595 +rect 676771 100379 676776 100595 +rect 676401 100307 676472 100312 +rect 676401 100091 676406 100307 +rect 676462 100152 676472 100307 +rect 676710 100284 676776 100379 +rect 676710 100218 677614 100284 +rect 676462 100091 677614 100152 +rect 676401 100086 677614 100091 +<< properties >> +string flatten true +<< end >> diff --git a/mag/chip_io_openframe.mag b/mag/chip_io_openframe.mag index 195129d7..616880c3 100644 --- a/mag/chip_io_openframe.mag +++ b/mag/chip_io_openframe.mag @@ -4555,63 +4555,63 @@ use caravel_motto caravel_motto_0 timestamp 1637698310 transform 1 0 -108943 0 1 -4710 box 373080 14838 395618 19242 -use chip_io_gpio_connects chip_io_gpio_connects_0 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_0 timestamp 1695745122 transform 0 -1 742000 1 0 320000 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_1 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_1 timestamp 1695745122 transform 0 -1 640200 1 0 320000 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_2 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_2 timestamp 1695745122 transform 0 -1 588800 1 0 320000 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_3 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_3 timestamp 1695745122 transform 0 -1 499800 1 0 320000 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_4 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_4 timestamp 1695745122 transform 0 -1 398000 1 0 320000 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_5 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_5 timestamp 1695745122 transform 0 -1 346400 1 0 320000 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_6 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_6 timestamp 1695745122 transform 0 -1 295000 1 0 320000 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_7 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_7 timestamp 1695745122 transform 0 -1 243600 1 0 320000 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_8 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_8 timestamp 1695745122 transform 0 -1 192200 1 0 320000 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_35 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_35 timestamp 1695745122 transform 0 1 86400 -1 0 717600 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_39 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_39 timestamp 1695745122 transform 0 1 195000 -1 0 717600 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_40 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_40 timestamp 1695745122 transform 0 1 249800 -1 0 717600 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_41 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_41 timestamp 1695745122 transform 0 1 304600 -1 0 717600 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_42 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_42 timestamp 1695745122 transform 0 1 359400 -1 0 717600 box 675407 99896 677652 117658 -use chip_io_gpio_connects chip_io_gpio_connects_43 +use chip_io_gpio_connects_vert chip_io_gpio_connects_vert_43 timestamp 1695745122 transform 0 1 414200 -1 0 717600 box 675407 99896 677652 117658 From 2c92ebfabbae3ec5a12ea6a9cc5f7ef3cf32ea04 Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Thu, 12 Oct 2023 15:11:03 +0300 Subject: [PATCH 129/138] Create block_CI.yaml --- .github/workflows/block_CI.yaml | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 .github/workflows/block_CI.yaml diff --git a/.github/workflows/block_CI.yaml b/.github/workflows/block_CI.yaml new file mode 100644 index 00000000..464d1634 --- /dev/null +++ b/.github/workflows/block_CI.yaml @@ -0,0 +1,27 @@ +name: Block PR + +on: + pull_request: + branches: + - main + +jobs: + changed_files: + runs-on: ubuntu-latest + name: Test changed-files + permissions: + pull-requests: read + + steps: + - name: Get changed files + id: changed-files + uses: tj-actions/changed-files@v39 + + - name: List all changed files + run: | + for file in ${{ steps.changed-files.outputs.all_changed_files }}; do + echo "$file was changed" + if [[ "$file" == *"verilog/rtl/"* || "$file" == *"mag/"* || "$file" == *"gds/"* ]]; then + exit 1 + fi + done From 4cd9d9cf2a1170655642a4204f772d64a0bdb86c Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Wed, 18 Oct 2023 12:47:56 -0400 Subject: [PATCH 130/138] Added pins "vddio" and "vssio" to the openframe and openframe project wrapper RTL netlists and and openframe project wrapper GL netlist. --- verilog/gl/caravel_openframe-example.v | 4 +++- verilog/gl/caravel_openframe.v | 4 +++- verilog/rtl/__openframe_project_wrapper.v | 4 ++++ 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/verilog/gl/caravel_openframe-example.v b/verilog/gl/caravel_openframe-example.v index ee3fc728..73ea7fde 100644 --- a/verilog/gl/caravel_openframe-example.v +++ b/verilog/gl/caravel_openframe-example.v @@ -1016,6 +1016,8 @@ module caravel_openframe(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, .resetb_h(rstb_h), .resetb_l(rstb_l), .vccd1(vccd1_core), - .vssd1(vssd1_core) + .vssd1(vssd1_core), + .vddio(vddio_core), + .vssio(vssio_core) ); endmodule diff --git a/verilog/gl/caravel_openframe.v b/verilog/gl/caravel_openframe.v index ffbbc634..1396f3c6 100644 --- a/verilog/gl/caravel_openframe.v +++ b/verilog/gl/caravel_openframe.v @@ -1026,6 +1026,8 @@ module caravel_openframe(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, .vssa2(vssa2_core), .vssd(vssd_core), .vssd1(vssd1_core), - .vssd2(vssd2_core) + .vssd2(vssd2_core), + .vddio(vddio_core), + .vssio(vssio_core) ); endmodule diff --git a/verilog/rtl/__openframe_project_wrapper.v b/verilog/rtl/__openframe_project_wrapper.v index 585497e1..32b81107 100644 --- a/verilog/rtl/__openframe_project_wrapper.v +++ b/verilog/rtl/__openframe_project_wrapper.v @@ -43,6 +43,8 @@ module openframe_project_wrapper ( inout vssd, // Common digital ground inout vssd1, // User area 1 digital ground inout vssd2, // User area 2 digital ground + inout vddio, // Common 3.3V ESD supply + inout vssio, // Common ESD ground `endif /* Signals exported from the frame area to the user project */ @@ -116,6 +118,8 @@ module openframe_project_wrapper ( .vssd(vssd), .vssd1(vssd1), .vssd2(vssd2), + .vddio(vddio), + .vssio(vssio), `endif .porb_h(porb_h), .porb_l(porb_l), From bcb0e2791d3078df406925dba6d0f5f4219ffca0 Mon Sep 17 00:00:00 2001 From: RTimothyEdwards Date: Wed, 18 Oct 2023 16:59:36 +0000 Subject: [PATCH 131/138] Apply automatic changes to Manifest and README.rst --- manifest | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/manifest b/manifest index b404cdc5..80684ba2 100644 --- a/manifest +++ b/manifest @@ -1,4 +1,4 @@ -489e60b851555f9238e3f9949c01b95fbad13565 verilog/rtl/__openframe_project_wrapper.v +5b0e67cbc4fd8ee8edeb380102e7e7ae07796bcc verilog/rtl/__openframe_project_wrapper.v 535d0592c0b1349489b6b86fd5449f9d1d81482e verilog/rtl/__uprj_analog_netlists.v 87735eb5981740ca4d4b48e6b0321c8bb0023800 verilog/rtl/__uprj_netlists.v 729a8ce3c67c5197578ecc31db960c91ce437b27 verilog/rtl/__user_analog_project_wrapper.v From 93c54686f0eeab032c65d50cb95529e0c721d1cc Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sun, 22 Oct 2023 10:00:28 +0300 Subject: [PATCH 132/138] Update Makefile --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 6042efd5..51e6345e 100644 --- a/Makefile +++ b/Makefile @@ -98,7 +98,7 @@ SPECIAL_VOLTAGE_LIBRARY ?= sky130_fd_sc_hvl IO_LIBRARY ?= sky130_fd_io PRIMITIVES_LIBRARY ?= sky130_fd_pr SKYWATER_COMMIT ?= f70d8ca46961ff92719d8870a18a076370b85f6c -OPEN_PDKS_COMMIT ?= 0059588eebfc704681dc2368bd1d33d96281d10f +OPEN_PDKS_COMMIT ?= 12df12e2e74145e31c5a13de02f9a1e176b56e67 # = 1.0.303 PDK_MAGIC_COMMIT ?= 085131b090cb511d785baf52a10cf6df8a657d44 # = 8.3.294 From 6c21917d49cc4e60f9fb341c7ccb50e6af9d8715 Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sun, 22 Oct 2023 10:08:28 +0300 Subject: [PATCH 133/138] Update auto-update-caravel-lite.yml --- .github/workflows/auto-update-caravel-lite.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/auto-update-caravel-lite.yml b/.github/workflows/auto-update-caravel-lite.yml index b7ffd3c4..2a292260 100644 --- a/.github/workflows/auto-update-caravel-lite.yml +++ b/.github/workflows/auto-update-caravel-lite.yml @@ -51,7 +51,7 @@ jobs: git remote add parent https://github.com/efabless/caravel git pull parent main git fetch --all --tags - git filter-repo --path def --path-glob 'signoff/*/openlane-signoff/spef' --path signoff/caravel/caravel.sdc --path signoff/caravan/caravan.sdc --path openlane/user_project_wrapper --path openlane/user_analog_project_wrapper --path openlane/Makefile --path gds/user_project_wrapper_empty.gds.gz --path gds/user_analog_project_wrapper_empty.gds.gz --path mag/user_project_wrapper_empty.mag --path mag/user_analog_project_wrapper_empty.mag --path lef/user_project_wrapper_empty.lef --path lef/user_analog_project_wrapper_empty.lef --path verilog/ --path Makefile --path scripts/ --path LICENSE --path manifest --path spi/lvs/run_lvs.sh --path gds/gds2mag-all.sh --path gds/drc_on_gds.tcl --path gds/antenna_on_gds.tcl --path spi/lvs/caravel.spice --path spi/lvs/caravan.spice --force + git filter-repo --path def --path-glob 'signoff/*/openlane-signoff/spef' --path signoff/caravel/caravel.sdc --path signoff/caravan/caravan.sdc --path openlane/user_project_wrapper --path openlane/user_analog_project_wrapper --path openlane/Makefile --path gds/user_project_wrapper_empty.gds.gz --path gds/user_analog_project_wrapper_empty.gds.gz --path gds/openframe_project_wrapper_empty.gds.gz --path mag/user_project_wrapper_empty.mag --path mag/user_analog_project_wrapper_empty.mag --path lef/user_project_wrapper_empty.lef --path lef/user_analog_project_wrapper_empty.lef --path verilog/ --path Makefile --path scripts/ --path LICENSE --path manifest --path spi/lvs/run_lvs.sh --path gds/gds2mag-all.sh --path gds/drc_on_gds.tcl --path gds/antenna_on_gds.tcl --path spi/lvs/caravel.spice --path spi/lvs/caravan.spice --force git remote add caravel_lite https://x-access-token:${{ secrets.EFSTAFF_TOKEN }}@github.com/efabless/caravel-lite git push --force caravel_lite main git push -f --tags caravel_lite main From b9a2e3ad7f81bbc8e372a114c1a1b839636f79d5 Mon Sep 17 00:00:00 2001 From: Tim Edwards Date: Sat, 4 Nov 2023 21:08:20 -0400 Subject: [PATCH 134/138] Revert the user_id_programming.mag file back to the state it was in before my Sept. 25 commit, where it accidentally got overwritten when magic decided it needed a timestamp update for some reason, destroying my manual edits in the process. --- mag/user_id_programming.mag | 687 ++++++++++++++++-------------------- 1 file changed, 301 insertions(+), 386 deletions(-) diff --git a/mag/user_id_programming.mag b/mag/user_id_programming.mag index f2254553..6ad139cc 100644 --- a/mag/user_id_programming.mag +++ b/mag/user_id_programming.mag @@ -2,8 +2,6 @@ magic tech sky130A magscale 1 2 timestamp 1650371074 -<< checkpaint >> -rect -194 -220 7278 7292 << nwell >> rect 2304 2369 2397 2389 << viali >> @@ -39,6 +37,39 @@ rect 5641 1853 5675 1887 rect 1685 1377 1719 1411 rect 2973 1377 3007 1411 rect 4629 1377 4663 1411 +<< locali >> +rect 4353 5117 4387 5151 +rect 5273 5117 5307 5151 +rect 2145 4641 2179 4675 +rect 3249 4641 3283 4675 +rect 3617 4641 3651 4675 +rect 4721 4641 4755 4675 +rect 1593 4029 1627 4063 +rect 2053 4029 2087 4063 +rect 4445 4029 4479 4063 +rect 4721 4029 4755 4063 +rect 5549 4029 5583 4063 +rect 1685 3553 1719 3587 +rect 1961 3553 1995 3587 +rect 2697 3553 2731 3587 +rect 3157 3553 3191 3587 +rect 3433 3553 3467 3587 +rect 4261 3553 4295 3587 +rect 4813 3553 4847 3587 +rect 5273 3553 5307 3587 +rect 1593 2941 1627 2975 +rect 4813 2397 4847 2431 +rect 5089 2397 5123 2431 +rect 1593 1853 1627 1887 +rect 2145 1853 2179 1887 +rect 2605 1853 2639 1887 +rect 2881 1853 2915 1887 +rect 3249 1853 3283 1887 +rect 4077 1853 4111 1887 +rect 5641 1853 5675 1887 +rect 1685 1377 1719 1411 +rect 2973 1377 3007 1411 +rect 4629 1377 4663 1411 << metal1 >> rect 1104 6010 5980 6032 rect 1104 5958 2607 6010 @@ -69,25 +100,19 @@ rect 1104 5392 5980 5414 rect 4062 5108 4068 5160 rect 4120 5148 4126 5160 rect 4157 5148 4215 5157 -rect 4341 5151 4399 5157 -rect 4341 5148 4353 5151 -rect 4120 5120 4353 5148 +rect 4341 5148 4399 5157 +rect 4120 5120 4399 5148 rect 4120 5108 4126 5120 rect 4157 5111 4215 5120 -rect 4341 5117 4353 5120 -rect 4387 5117 4399 5151 -rect 4341 5111 4399 5117 +rect 4341 5111 4399 5120 rect 4614 5108 4620 5160 rect 4672 5148 4678 5160 rect 5077 5148 5135 5157 -rect 5261 5151 5319 5157 -rect 5261 5148 5273 5151 -rect 4672 5120 5273 5148 +rect 5261 5148 5319 5157 +rect 4672 5120 5319 5148 rect 4672 5108 4678 5120 rect 5077 5111 5135 5120 -rect 5261 5117 5273 5120 -rect 5307 5117 5319 5151 -rect 5261 5111 5319 5117 +rect 5261 5111 5319 5120 rect 1104 4922 5980 4944 rect 1104 4870 2607 4922 rect 2659 4870 2671 4922 @@ -100,16 +125,11 @@ rect 4412 4870 4424 4922 rect 4476 4870 5980 4922 rect 1104 4848 5980 4870 rect 1949 4672 2007 4681 -rect 2133 4675 2191 4681 -rect 2133 4672 2145 4675 -rect 1949 4644 2145 4672 -rect 1949 4635 2007 4644 -rect 2133 4641 2145 4644 -rect 2179 4672 2191 4675 +rect 2133 4672 2191 4681 rect 2958 4672 2964 4684 -rect 2179 4644 2964 4672 -rect 2179 4641 2191 4644 -rect 2133 4635 2191 4641 +rect 1949 4644 2964 4672 +rect 1949 4635 2007 4644 +rect 2133 4635 2191 4644 rect 2958 4632 2964 4644 rect 3016 4632 3022 4684 rect 3050 4672 3114 4684 @@ -119,21 +139,15 @@ rect 3050 4632 3114 4644 rect 3234 4632 3240 4644 rect 3292 4632 3298 4684 rect 3418 4672 3482 4684 -rect 3602 4675 3666 4684 -rect 3602 4672 3617 4675 -rect 3418 4644 3617 4672 +rect 3602 4672 3666 4684 +rect 3418 4644 3666 4672 rect 3418 4632 3482 4644 -rect 3602 4641 3617 4644 -rect 3651 4641 3666 4675 -rect 3602 4632 3666 4641 +rect 3602 4632 3666 4644 rect 4522 4674 4586 4684 -rect 4706 4675 4770 4684 -rect 4706 4674 4721 4675 -rect 4522 4644 4721 4674 +rect 4706 4674 4770 4684 +rect 4522 4644 4770 4674 rect 4522 4632 4586 4644 -rect 4706 4641 4721 4644 -rect 4755 4641 4770 4675 -rect 4706 4632 4770 4641 +rect 4706 4632 4770 4644 rect 3620 4468 3648 4632 rect 4720 4539 4755 4632 rect 4720 4505 4754 4539 @@ -179,43 +193,31 @@ rect 2280 4128 2286 4140 rect 2280 4100 3924 4128 rect 2280 4088 2286 4100 rect 1857 4059 1915 4069 -rect 2041 4063 2099 4069 -rect 2041 4059 2053 4063 -rect 1857 4031 2053 4059 +rect 2041 4059 2099 4069 +rect 1857 4031 2099 4059 rect 1857 4023 1915 4031 -rect 2041 4029 2053 4031 -rect 2087 4029 2099 4063 -rect 2041 4023 2099 4029 +rect 2041 4023 2099 4031 rect 3896 3992 3924 4100 rect 4062 4020 4068 4072 rect 4120 4060 4126 4072 rect 4540 4069 4568 4236 rect 4249 4060 4307 4069 -rect 4433 4063 4491 4069 -rect 4433 4060 4445 4063 -rect 4120 4032 4445 4060 +rect 4433 4060 4491 4069 +rect 4120 4032 4491 4060 rect 4120 4020 4126 4032 rect 4249 4023 4307 4032 -rect 4433 4029 4445 4032 -rect 4479 4029 4491 4063 -rect 4433 4023 4491 4029 +rect 4433 4023 4491 4032 rect 4525 4060 4583 4069 -rect 4709 4063 4767 4069 -rect 4709 4060 4721 4063 -rect 4525 4032 4721 4060 +rect 4709 4060 4767 4069 +rect 4525 4032 4767 4060 rect 4525 4023 4583 4032 -rect 4709 4029 4721 4032 -rect 4755 4029 4767 4063 -rect 4709 4023 4767 4029 +rect 4709 4023 4767 4032 rect 5350 4020 5356 4072 rect 5408 4060 5414 4072 -rect 5537 4063 5595 4069 -rect 5537 4060 5549 4063 -rect 5408 4031 5549 4060 +rect 5537 4060 5595 4069 +rect 5408 4031 5595 4060 rect 5408 4020 5414 4031 -rect 5537 4029 5549 4031 -rect 5583 4029 5595 4063 -rect 5537 4023 5595 4029 +rect 5537 4023 5595 4031 rect 4890 3992 4896 4004 rect 3896 3964 4896 3992 rect 4890 3952 4896 3964 @@ -250,24 +252,16 @@ rect 1964 3593 1992 3624 rect 5902 3612 5908 3624 rect 5960 3612 5966 3664 rect 1765 3584 1823 3593 -rect 1949 3587 2007 3593 -rect 1949 3584 1961 3587 -rect 1765 3556 1961 3584 +rect 1949 3584 2007 3593 +rect 1765 3556 2007 3584 rect 1765 3547 1823 3556 -rect 1949 3553 1961 3556 -rect 1995 3553 2007 3587 -rect 1949 3547 2007 3553 +rect 1949 3547 2007 3556 rect 2501 3586 2559 3593 -rect 2685 3587 2743 3593 -rect 2685 3586 2697 3587 -rect 2501 3555 2697 3586 -rect 2501 3547 2559 3555 -rect 2685 3553 2697 3555 -rect 2731 3586 2743 3587 +rect 2685 3586 2743 3593 rect 2774 3586 2780 3596 -rect 2731 3555 2780 3586 -rect 2731 3553 2743 3555 -rect 2685 3547 2743 3553 +rect 2501 3555 2780 3586 +rect 2501 3547 2559 3555 +rect 2685 3547 2743 3555 rect 2774 3544 2780 3555 rect 2832 3544 2838 3596 rect 2958 3584 3022 3596 @@ -277,45 +271,31 @@ rect 2958 3544 3022 3556 rect 3142 3544 3148 3556 rect 3200 3544 3206 3596 rect 3234 3585 3298 3596 -rect 3418 3587 3482 3596 -rect 3418 3585 3433 3587 -rect 3234 3557 3433 3585 +rect 3418 3585 3482 3596 +rect 3234 3557 3482 3585 rect 3234 3544 3298 3557 -rect 3418 3553 3433 3557 -rect 3467 3553 3482 3587 -rect 3418 3544 3482 3553 +rect 3418 3544 3482 3557 rect 4065 3584 4123 3593 -rect 4249 3587 4307 3593 -rect 4249 3584 4261 3587 -rect 4065 3556 4261 3584 -rect 4065 3547 4123 3556 -rect 4249 3553 4261 3556 -rect 4295 3584 4307 3587 +rect 4249 3584 4307 3593 rect 4522 3584 4528 3596 -rect 4295 3556 4528 3584 -rect 4295 3553 4307 3556 -rect 4249 3547 4307 3553 +rect 4065 3556 4528 3584 +rect 4065 3547 4123 3556 +rect 4249 3547 4307 3556 rect 4522 3544 4528 3556 rect 4580 3544 4586 3596 rect 4614 3585 4678 3596 -rect 4798 3587 4862 3596 -rect 4798 3585 4813 3587 -rect 4614 3557 4813 3585 +rect 4798 3585 4862 3596 +rect 4614 3557 4862 3585 rect 4614 3544 4678 3557 -rect 4798 3553 4813 3557 -rect 4847 3553 4862 3587 -rect 4798 3544 4862 3553 +rect 4798 3544 4862 3557 rect 4982 3544 4988 3596 rect 5040 3584 5046 3596 rect 5077 3584 5135 3593 -rect 5261 3587 5319 3593 -rect 5261 3584 5273 3587 -rect 5040 3556 5273 3584 +rect 5261 3584 5319 3593 +rect 5040 3556 5319 3584 rect 5040 3544 5046 3556 rect 5077 3547 5135 3556 -rect 5261 3553 5273 3556 -rect 5307 3553 5319 3587 -rect 5261 3547 5319 3553 +rect 5261 3547 5319 3556 rect 2222 3408 2228 3460 rect 2280 3448 2286 3460 rect 3438 3448 3466 3544 @@ -355,16 +335,11 @@ rect 2831 3131 2837 3143 rect 5902 3136 5908 3143 rect 5960 3136 5966 3188 rect 1397 2972 1455 2981 -rect 1581 2975 1639 2981 -rect 1581 2972 1593 2975 -rect 1397 2944 1593 2972 -rect 1397 2935 1455 2944 -rect 1581 2941 1593 2944 -rect 1627 2972 1639 2975 +rect 1581 2972 1639 2981 rect 3050 2972 3056 2984 -rect 1627 2944 3056 2972 -rect 1627 2941 1639 2944 -rect 1581 2935 1639 2941 +rect 1397 2944 3056 2972 +rect 1397 2935 1455 2944 +rect 1581 2935 1639 2944 rect 3050 2932 3056 2944 rect 3108 2932 3114 2984 rect 1670 2796 1676 2848 @@ -391,22 +366,16 @@ rect 4815 2437 4843 2468 rect 5442 2456 5448 2468 rect 5500 2456 5506 2508 rect 4617 2429 4675 2437 -rect 4801 2431 4859 2437 -rect 4801 2429 4813 2431 -rect 4617 2401 4813 2429 +rect 4801 2429 4859 2437 +rect 4617 2401 4859 2429 rect 4617 2391 4675 2401 -rect 4801 2397 4813 2401 -rect 4847 2397 4859 2431 -rect 4801 2391 4859 2397 +rect 4801 2391 4859 2401 rect 4890 2388 4896 2440 rect 4948 2428 4954 2440 -rect 5077 2431 5135 2437 -rect 5077 2428 5089 2431 -rect 4948 2400 5089 2428 +rect 5077 2428 5135 2437 +rect 4948 2400 5135 2428 rect 4948 2388 4954 2400 -rect 5077 2397 5089 2400 -rect 5123 2397 5135 2431 -rect 5077 2391 5135 2397 +rect 5077 2391 5135 2400 rect 2314 2320 2320 2372 rect 2372 2360 2378 2372 rect 6454 2360 6460 2372 @@ -436,66 +405,47 @@ rect 1268 1952 1274 1964 rect 1268 1924 2452 1952 rect 1268 1912 1274 1924 rect 1397 1884 1455 1893 -rect 1581 1887 1639 1893 -rect 1581 1884 1593 1887 -rect 1397 1856 1593 1884 +rect 1581 1884 1639 1893 +rect 1397 1856 1639 1884 rect 1397 1847 1455 1856 -rect 1581 1853 1593 1856 -rect 1627 1853 1639 1887 -rect 1581 1847 1639 1853 +rect 1581 1847 1639 1856 rect 1949 1884 2007 1893 -rect 2133 1887 2191 1893 -rect 2133 1884 2145 1887 -rect 1949 1856 2145 1884 -rect 1949 1847 2007 1856 -rect 2133 1853 2145 1856 -rect 2179 1884 2191 1887 +rect 2133 1884 2191 1893 rect 2314 1884 2320 1896 -rect 2179 1856 2320 1884 -rect 2179 1853 2191 1856 -rect 2133 1847 2191 1853 +rect 1949 1856 2320 1884 +rect 1949 1847 2007 1856 +rect 2133 1847 2191 1856 rect 1596 1816 1624 1847 rect 2314 1844 2320 1856 rect 2372 1844 2378 1896 rect 2424 1893 2452 1924 rect 2409 1884 2467 1893 -rect 2593 1887 2651 1893 -rect 2593 1884 2605 1887 -rect 2409 1856 2605 1884 +rect 2593 1884 2651 1893 +rect 2409 1856 2651 1884 rect 2409 1847 2467 1856 -rect 2593 1853 2605 1856 -rect 2639 1853 2651 1887 -rect 2593 1847 2651 1853 +rect 2593 1847 2651 1856 rect 2685 1884 2743 1893 -rect 2869 1887 2927 1893 -rect 2869 1884 2881 1887 -rect 2685 1856 2881 1884 -rect 2685 1847 2743 1856 -rect 2869 1853 2881 1856 -rect 2915 1884 2927 1887 +rect 2869 1884 2927 1893 rect 2976 1884 3004 1992 rect 3970 1980 3976 1992 rect 4028 1980 4034 2032 -rect 2915 1856 3004 1884 +rect 2685 1856 3004 1884 rect 3050 1884 3114 1896 rect 3234 1884 3240 1896 rect 3050 1856 3240 1884 -rect 2915 1853 2927 1856 -rect 2869 1847 2927 1853 +rect 2685 1847 2743 1856 +rect 2869 1847 2927 1856 rect 3050 1844 3114 1856 rect 3234 1844 3240 1856 rect 3292 1844 3298 1896 rect 3786 1844 3792 1896 rect 3844 1884 3850 1896 rect 3881 1884 3939 1893 -rect 4065 1887 4123 1893 -rect 4065 1884 4077 1887 -rect 3844 1856 4077 1884 +rect 4065 1884 4123 1893 +rect 3844 1856 4123 1884 rect 3844 1844 3850 1856 rect 3881 1847 3939 1856 -rect 4065 1853 4077 1856 -rect 4111 1853 4123 1887 -rect 4065 1847 4123 1853 +rect 4065 1847 4123 1856 rect 5442 1884 5506 1896 rect 5626 1884 5632 1896 rect 5442 1856 5632 1884 @@ -522,14 +472,11 @@ rect 1104 1584 5980 1606 rect 1118 1368 1124 1420 rect 1176 1408 1182 1420 rect 1489 1408 1547 1417 -rect 1673 1411 1731 1417 -rect 1673 1408 1685 1411 -rect 1176 1380 1685 1408 +rect 1673 1408 1731 1417 +rect 1176 1380 1731 1408 rect 1176 1368 1182 1380 rect 1489 1371 1547 1380 -rect 1673 1377 1685 1380 -rect 1719 1377 1731 1411 -rect 1673 1371 1731 1377 +rect 1673 1371 1731 1380 rect 2774 1408 2838 1420 rect 2958 1408 2964 1420 rect 2774 1380 2964 1408 @@ -589,11 +536,7 @@ rect 4296 4870 4348 4922 rect 4360 4870 4412 4922 rect 4424 4870 4476 4922 rect 2964 4632 3016 4684 -rect 3240 4675 3292 4684 -rect 3240 4641 3249 4675 -rect 3249 4641 3283 4675 -rect 3283 4641 3292 4675 -rect 3240 4632 3292 4641 +rect 3240 4632 3292 4684 rect 3884 4428 3936 4480 rect 4712 4428 4764 4480 rect 1794 4326 1846 4378 @@ -610,11 +553,7 @@ rect 5173 4326 5225 4378 rect 5237 4326 5289 4378 rect 3056 4224 3108 4276 rect 1400 4156 1452 4208 -rect 1584 4063 1636 4072 -rect 1584 4029 1593 4063 -rect 1593 4029 1627 4063 -rect 1627 4029 1636 4063 -rect 1584 4020 1636 4029 +rect 1584 4020 1636 4072 rect 2228 4088 2280 4140 rect 4068 4020 4120 4072 rect 5356 4020 5408 4072 @@ -629,18 +568,10 @@ rect 4360 3782 4412 3834 rect 4424 3782 4476 3834 rect 572 3680 624 3732 rect 4712 3680 4764 3732 -rect 1676 3587 1728 3596 -rect 1676 3553 1685 3587 -rect 1685 3553 1719 3587 -rect 1719 3553 1728 3587 -rect 1676 3544 1728 3553 +rect 1676 3544 1728 3596 rect 5908 3612 5960 3664 rect 2780 3544 2832 3596 -rect 3148 3587 3200 3596 -rect 3148 3553 3157 3587 -rect 3157 3553 3191 3587 -rect 3191 3553 3200 3587 -rect 3148 3544 3200 3553 +rect 3148 3544 3200 3596 rect 4528 3544 4580 3596 rect 4988 3544 5040 3596 rect 2228 3408 2280 3460 @@ -689,17 +620,9 @@ rect 5237 2150 5289 2202 rect 1216 1912 1268 1964 rect 2320 1844 2372 1896 rect 3976 1980 4028 2032 -rect 3240 1887 3292 1896 -rect 3240 1853 3249 1887 -rect 3249 1853 3283 1887 -rect 3283 1853 3292 1887 -rect 3240 1844 3292 1853 +rect 3240 1844 3292 1896 rect 3792 1844 3844 1896 -rect 5632 1887 5684 1896 -rect 5632 1853 5641 1887 -rect 5641 1853 5675 1887 -rect 5675 1853 5684 1887 -rect 5632 1844 5684 1853 +rect 5632 1844 5684 1896 rect 3240 1708 3292 1760 rect 2607 1606 2659 1658 rect 2671 1606 2723 1658 @@ -710,16 +633,8 @@ rect 4296 1606 4348 1658 rect 4360 1606 4412 1658 rect 4424 1606 4476 1658 rect 1124 1368 1176 1420 -rect 2964 1411 3016 1420 -rect 2964 1377 2973 1411 -rect 2973 1377 3007 1411 -rect 3007 1377 3016 1411 -rect 2964 1368 3016 1377 -rect 4620 1411 4672 1420 -rect 4620 1377 4629 1411 -rect 4629 1377 4663 1411 -rect 4663 1377 4672 1411 -rect 4620 1368 4672 1377 +rect 2964 1368 3016 1420 +rect 4620 1368 4672 1420 rect 1794 1062 1846 1114 rect 1858 1062 1910 1114 rect 1922 1062 1974 1114 @@ -2634,457 +2549,457 @@ rect 3660 1738 5049 1974 rect 5285 1738 5980 1974 rect 1104 1696 5980 1738 use sky130_fd_sc_hd__fill_1 FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1692890899 +timestamp 1638025753 transform 1 0 1380 0 -1 1632 box -38 -48 130 592 use sky130_fd_sc_hd__decap_8 FILLER_0_7 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1692890899 +timestamp 1648946573 transform 1 0 1748 0 -1 1632 box -38 -48 774 592 use sky130_fd_sc_hd__decap_3 FILLER_0_15 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2484 0 -1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__decap_8 FILLER_0_21 -timestamp 1692890899 +timestamp 1648946573 transform 1 0 3036 0 -1 1632 box -38 -48 774 592 use sky130_fd_sc_hd__fill_2 FILLER_0_29 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3772 0 -1 1632 box -38 -48 222 592 use sky130_fd_sc_hd__decap_4 FILLER_0_32 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4048 0 -1 1632 box -38 -48 406 592 use sky130_fd_sc_hd__decap_8 FILLER_0_39 -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4692 0 -1 1632 box -38 -48 774 592 use sky130_fd_sc_hd__decap_3 FILLER_0_47 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 5428 0 -1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__decap_3 FILLER_1_6 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 1656 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__fill_2 FILLER_1_12 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2208 0 1 1632 box -38 -48 222 592 use sky130_fd_sc_hd__fill_1 FILLER_1_20 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2944 0 1 1632 box -38 -48 130 592 use sky130_fd_sc_hd__decap_6 FILLER_1_24 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3312 0 1 1632 box -38 -48 590 592 use sky130_fd_sc_hd__decap_12 FILLER_1_33 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4140 0 1 1632 box -38 -48 1142 592 use sky130_fd_sc_hd__fill_2 FILLER_1_45 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 5244 0 1 1632 box -38 -48 222 592 use sky130_fd_sc_hd__decap_12 FILLER_2_3 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 1380 0 -1 2720 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_12 FILLER_2_15 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2484 0 -1 2720 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_4 FILLER_2_27 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3588 0 -1 2720 box -38 -48 406 592 use sky130_fd_sc_hd__decap_6 FILLER_2_32 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4048 0 -1 2720 box -38 -48 590 592 use sky130_fd_sc_hd__decap_6 FILLER_2_44 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 5152 0 -1 2720 box -38 -48 590 592 use sky130_fd_sc_hd__decap_12 FILLER_3_6 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 1656 0 1 2720 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_12 FILLER_3_18 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2760 0 1 2720 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_12 FILLER_3_30 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3864 0 1 2720 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_8 FILLER_3_42 -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4968 0 1 2720 box -38 -48 774 592 use sky130_fd_sc_hd__fill_1 FILLER_4_3 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 1380 0 -1 3808 box -38 -48 130 592 use sky130_fd_sc_hd__decap_4 FILLER_4_10 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2024 0 -1 3808 box -38 -48 406 592 use sky130_fd_sc_hd__fill_1 FILLER_4_14 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2392 0 -1 3808 box -38 -48 130 592 use sky130_fd_sc_hd__fill_2 FILLER_4_18 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2760 0 -1 3808 box -38 -48 222 592 use sky130_fd_sc_hd__decap_4 FILLER_4_26 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3496 0 -1 3808 box -38 -48 406 592 use sky130_fd_sc_hd__fill_1 FILLER_4_30 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3864 0 -1 3808 box -38 -48 130 592 use sky130_fd_sc_hd__decap_3 FILLER_4_35 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4324 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__fill_2 FILLER_4_41 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4876 0 -1 3808 box -38 -48 222 592 use sky130_fd_sc_hd__decap_4 FILLER_4_46 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 5336 0 -1 3808 box -38 -48 406 592 use sky130_fd_sc_hd__fill_2 FILLER_5_6 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 1656 0 1 3808 box -38 -48 222 592 use sky130_fd_sc_hd__decap_12 FILLER_5_11 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2116 0 1 3808 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_8 FILLER_5_23 -timestamp 1692890899 +timestamp 1648946573 transform 1 0 3220 0 1 3808 box -38 -48 774 592 use sky130_fd_sc_hd__decap_3 FILLER_5_31 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3956 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__decap_6 FILLER_5_40 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4784 0 1 3808 box -38 -48 590 592 use sky130_fd_sc_hd__fill_1 FILLER_5_49 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 5612 0 1 3808 box -38 -48 130 592 use sky130_fd_sc_hd__decap_6 FILLER_6_3 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 1380 0 -1 4896 box -38 -48 590 592 use sky130_fd_sc_hd__decap_8 FILLER_6_12 -timestamp 1692890899 +timestamp 1648946573 transform 1 0 2208 0 -1 4896 box -38 -48 774 592 use sky130_fd_sc_hd__fill_1 FILLER_6_20 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2944 0 -1 4896 box -38 -48 130 592 use sky130_fd_sc_hd__fill_1 FILLER_6_24 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3312 0 -1 4896 box -38 -48 130 592 use sky130_fd_sc_hd__decap_3 FILLER_6_28 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3680 0 -1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__decap_4 FILLER_6_32 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4048 0 -1 4896 box -38 -48 406 592 use sky130_fd_sc_hd__fill_1 FILLER_6_36 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4416 0 -1 4896 box -38 -48 130 592 use sky130_fd_sc_hd__decap_8 FILLER_6_40 -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4784 0 -1 4896 box -38 -48 774 592 use sky130_fd_sc_hd__fill_2 FILLER_6_48 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 5520 0 -1 4896 box -38 -48 222 592 use sky130_fd_sc_hd__decap_12 FILLER_7_3 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 1380 0 1 4896 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_12 FILLER_7_15 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2484 0 1 4896 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_6 FILLER_7_27 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3588 0 1 4896 box -38 -48 590 592 use sky130_fd_sc_hd__decap_6 FILLER_7_36 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4416 0 1 4896 box -38 -48 590 592 use sky130_fd_sc_hd__fill_1 FILLER_7_42 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4968 0 1 4896 box -38 -48 130 592 use sky130_fd_sc_hd__decap_4 FILLER_7_46 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 5336 0 1 4896 box -38 -48 406 592 use sky130_fd_sc_hd__decap_12 FILLER_8_3 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 1380 0 -1 5984 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_12 FILLER_8_15 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 2484 0 -1 5984 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_4 FILLER_8_27 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 3588 0 -1 5984 box -38 -48 406 592 use sky130_fd_sc_hd__decap_12 FILLER_8_32 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 4048 0 -1 5984 box -38 -48 1142 592 use sky130_fd_sc_hd__decap_6 FILLER_8_44 -timestamp 1692890899 +timestamp 1638025753 transform 1 0 5152 0 -1 5984 box -38 -48 590 592 +use sky130_fd_sc_hd__decap_3 PHY_0 +timestamp 1638025753 +transform 1 0 1104 0 -1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_1 +timestamp 1638025753 +transform -1 0 5980 0 -1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_2 +timestamp 1638025753 +transform 1 0 1104 0 1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_3 +timestamp 1638025753 +transform -1 0 5980 0 1 1632 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_4 +timestamp 1638025753 +transform 1 0 1104 0 -1 2720 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_5 +timestamp 1638025753 +transform -1 0 5980 0 -1 2720 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_6 +timestamp 1638025753 +transform 1 0 1104 0 1 2720 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_7 +timestamp 1638025753 +transform -1 0 5980 0 1 2720 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_8 +timestamp 1638025753 +transform 1 0 1104 0 -1 3808 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_9 +timestamp 1638025753 +transform -1 0 5980 0 -1 3808 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_10 +timestamp 1638025753 +transform 1 0 1104 0 1 3808 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_11 +timestamp 1638025753 +transform -1 0 5980 0 1 3808 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_12 +timestamp 1638025753 +transform 1 0 1104 0 -1 4896 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_13 +timestamp 1638025753 +transform -1 0 5980 0 -1 4896 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_14 +timestamp 1638025753 +transform 1 0 1104 0 1 4896 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_15 +timestamp 1638025753 +transform -1 0 5980 0 1 4896 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_16 +timestamp 1638025753 +transform 1 0 1104 0 -1 5984 +box -38 -48 314 592 +use sky130_fd_sc_hd__decap_3 PHY_17 +timestamp 1638025753 +transform -1 0 5980 0 -1 5984 +box -38 -48 314 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_18 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag +timestamp 1638025753 +transform 1 0 3956 0 -1 1632 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_19 +timestamp 1638025753 +transform 1 0 3956 0 -1 2720 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_20 +timestamp 1638025753 +transform 1 0 3956 0 -1 3808 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_21 +timestamp 1638025753 +transform 1 0 3956 0 -1 4896 +box -38 -48 130 592 +use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_22 +timestamp 1638025753 +transform 1 0 3956 0 -1 5984 +box -38 -48 130 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1692890899 +timestamp 1648946573 transform 1 0 2392 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[1\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 3036 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[2\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 1840 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[3\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 1380 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[4\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 5428 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[5\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4140 0 1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[6\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 1380 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[7\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 3864 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[8\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 3220 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[9\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4876 0 -1 2720 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[10\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4232 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[11\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 2668 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[12\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4508 0 -1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[13\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4600 0 -1 2720 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[14\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 2484 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[15\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4416 0 -1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[16\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4600 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[17\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 1472 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[18\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4508 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[19\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 1932 0 -1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[20\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 2760 0 -1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[21\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 3404 0 -1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[22\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 4048 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[23\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 5060 0 1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[24\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 1748 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[25\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 2944 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[26\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 5060 0 -1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[27\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 1472 0 -1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[28\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 1932 0 1 1632 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[29\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 5336 0 1 3808 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[30\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 3036 0 -1 4896 box -38 -48 314 592 use sky130_fd_sc_hd__conb_1 mask_rev_value\[31\] -timestamp 1692890899 +timestamp 1648946573 transform 1 0 1380 0 1 2720 box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_0 -timestamp 1692890899 -transform 1 0 1104 0 -1 1632 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_1 -timestamp 1692890899 -transform -1 0 5980 0 -1 1632 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_2 -timestamp 1692890899 -transform 1 0 1104 0 1 1632 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_3 -timestamp 1692890899 -transform -1 0 5980 0 1 1632 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_4 -timestamp 1692890899 -transform 1 0 1104 0 -1 2720 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_5 -timestamp 1692890899 -transform -1 0 5980 0 -1 2720 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_6 -timestamp 1692890899 -transform 1 0 1104 0 1 2720 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_7 -timestamp 1692890899 -transform -1 0 5980 0 1 2720 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_8 -timestamp 1692890899 -transform 1 0 1104 0 -1 3808 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_9 -timestamp 1692890899 -transform -1 0 5980 0 -1 3808 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_10 -timestamp 1692890899 -transform 1 0 1104 0 1 3808 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_11 -timestamp 1692890899 -transform -1 0 5980 0 1 3808 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_12 -timestamp 1692890899 -transform 1 0 1104 0 -1 4896 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_13 -timestamp 1692890899 -transform -1 0 5980 0 -1 4896 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_14 -timestamp 1692890899 -transform 1 0 1104 0 1 4896 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_15 -timestamp 1692890899 -transform -1 0 5980 0 1 4896 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_16 -timestamp 1692890899 -transform 1 0 1104 0 -1 5984 -box -38 -48 314 592 -use sky130_fd_sc_hd__decap_3 PHY_17 -timestamp 1692890899 -transform -1 0 5980 0 -1 5984 -box -38 -48 314 592 -use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_18 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag -timestamp 1692890899 -transform 1 0 3956 0 -1 1632 -box -38 -48 130 592 -use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_19 -timestamp 1692890899 -transform 1 0 3956 0 -1 2720 -box -38 -48 130 592 -use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_20 -timestamp 1692890899 -transform 1 0 3956 0 -1 3808 -box -38 -48 130 592 -use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_21 -timestamp 1692890899 -transform 1 0 3956 0 -1 4896 -box -38 -48 130 592 -use sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_22 -timestamp 1692890899 -transform 1 0 3956 0 -1 5984 -box -38 -48 130 592 << labels >> rlabel metal2 s 4066 6277 4122 7077 4 mask_rev[0] port 1 nsew From 084af0eb7cc34afdd6ed0eb3fa5f0ff656e4db26 Mon Sep 17 00:00:00 2001 From: Jeff DiCorpo <42048757+jeffdi@users.noreply.github.com> Date: Sun, 5 Nov 2023 10:47:16 -0800 Subject: [PATCH 135/138] update tag = mpw-9f --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 51e6345e..4cdbe930 100644 --- a/Makefile +++ b/Makefile @@ -50,7 +50,7 @@ LARGE_FILES_GZ_SPLIT += $(addsuffix .00.split, $(ARCHIVES)) MCW_ROOT?=$(PWD)/mgmt_core_wrapper MCW ?=LITEX_VEXRISCV -MPW_TAG ?= mpw-9e +MPW_TAG ?= mpw-9f PYTHON_BIN ?= python3 From 4991cf2d511bf2ffdd4927ba73e01aade586cf16 Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sun, 12 Nov 2023 15:02:35 +0200 Subject: [PATCH 136/138] Update .readthedocs.yml --- .readthedocs.yml | 30 ++++++++++++------------------ 1 file changed, 12 insertions(+), 18 deletions(-) diff --git a/.readthedocs.yml b/.readthedocs.yml index 7380a941..f0ccf901 100755 --- a/.readthedocs.yml +++ b/.readthedocs.yml @@ -1,28 +1,22 @@ -# SPDX-FileCopyrightText: 2020 Efabless Corporation -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# -# SPDX-License-Identifier: Apache-2.0 -# .readthedocs.yml +# .readthedocs.yaml # Read the Docs configuration file # See https://docs.readthedocs.io/en/stable/config-file/v2.html for details # Required version: 2 +# Set the version of Python and other tools you might need +build: + os: ubuntu-22.04 + tools: + python: "3.10" + # Build documentation in the docs/ directory with Sphinx sphinx: configuration: docs/source/conf.py -conda: - environment: docs/environment.yml +# We recommend specifying your dependencies to enable reproducible builds: +# https://docs.readthedocs.io/en/stable/guides/reproducible-builds.html +python: + install: + - requirements: docs/requirements.txt From 5c05a01d634f486cfa37e389f02dd5f422726573 Mon Sep 17 00:00:00 2001 From: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com> Date: Sun, 12 Nov 2023 15:03:35 +0200 Subject: [PATCH 137/138] Update requirements.txt --- docs/requirements.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/requirements.txt b/docs/requirements.txt index 46b77444..7b714032 100755 --- a/docs/requirements.txt +++ b/docs/requirements.txt @@ -6,3 +6,4 @@ sphinx-autobuild recommonmark sphinx_markdown_tables sphinxcontrib-wavedrom +sphinx_rtd_theme From 2a5c603348589db0fdf1506c3d40c21e238de881 Mon Sep 17 00:00:00 2001 From: marwaneltoukhy Date: Sun, 12 Nov 2023 13:15:01 +0000 Subject: [PATCH 138/138] Apply automatic changes to Manifest and README.rst --- manifest | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/manifest b/manifest index 178b2c15..b2846969 100644 --- a/manifest +++ b/manifest @@ -22,7 +22,7 @@ ae07f0d87e69f4dd2026ed841e3a962facac847b verilog/rtl/caravel_openframe.v d97cb60c8d125d6098111d4f0aa00410515770eb verilog/rtl/caravel_power_routing.v e54c181033aa019f0edcaed5ffc71e54c3888970 verilog/rtl/chip_io.v 1088531d6a69d82b976d4aca7ae923423680a715 verilog/rtl/chip_io_alt.v -e293e138c6e6f5df76db78bdaa34a35003f6ba5f verilog/rtl/chip_io_openframe.v +b080fd6193e1aee1cd476d8a4c117d65ae1e1178 verilog/rtl/chip_io_openframe.v 126aff02aa229dc346301c552d785dec76a4d68e verilog/rtl/clock_div.v 941bd7636e7558b045faa3d8c6ba2d91b4c4b798 verilog/rtl/constant_block.v 58fd210a64e502fb231d843eada4052f923d788d verilog/rtl/copyright_block.v @@ -47,7 +47,7 @@ c96ba94e5779ea6afe452d89632eaada73e26aab verilog/rtl/mprj_io.v e0c6ead5e35c1ba01d923c482e953c2af9691524 verilog/rtl/mprj_io_buffer.v 3baffde4788f01e2ff0e5cd83020a76bd63ef7d7 verilog/rtl/mprj_logic_high.v 5287821a0ed1994850a978ef0cd024fac51fb6e8 verilog/rtl/open_source.v -33c8fc54298e5425875aaab8c139074ec7d0e9e9 verilog/rtl/openframe_netlists.v +189532aff9e5e2ebbd99befd05cbf50e948b14af verilog/rtl/openframe_netlists.v b53c154e6acaf44e858c936c8027d0229608676e verilog/rtl/pads.v 669d16642d5dd5f6824812754db20db98c9fe17b verilog/rtl/ring_osc2x13.v 83937790b8f5dbcdd7e9a804b5e9bdf475c0ab7d verilog/rtl/simple_por.v