Issue and/or Feature Request: Automatic updating of IP

[jwkunz]

In the Jasper tool flow, in toolflow.py, when the .tcl script is being generated, there is a boolean field "upgrade_ip" from the incoming yaml that puts in a line in the .tcl script to update the Xilinx IP. It appears the yaml always puts the "upgrade_ip" as "True" (or is there a way to put this field as "False" that I am missing?)

I stumbled on this having an issue using the rfdc block in Vivado 2021.2 where the Vivado tools crash because they upgrade the jasper generated version 2.0 rfdc to the 2.6 version of the 2021.2 tools. Vivado can't find the version 2.6 in the sysgen ip directory and crashes.

It may cause more problems to flat out disable updating IP in general, but it would be nice if the pull down menu where you select a synthesis tool in the various platform blocks had a little checkbox to allow the user to select if they would like to update the IP during the jasper compilation. This could help make the tools more robust to Xilinx software versions.

[mitchburnett]

This is because you are using a version of Vivado not listed in the compatibility matrix. Which indicated over in #190 would occur.

While the upgrade IP option is ran in projects using RFDC, this is not the cause of the issue. The gen_tcl_cmd() method for the rfdc yellow block is where the version of the IP is selected. The version used is still a static value until the parameters for the in the yellow block implementation can promote itself as the versions in Vivado advance.

Closing.