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madifx.c
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madifx.c
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/*
* ALSA driver for RME Hammerfall DSP MADI FX audio interface(s)
*
* Based on hdspm.c
* Copyright (c) 2012-2015 Adrian Knoth <[email protected]>
* Copyright (c) 2003 Winfried Ritsch (IEM)
* code based on hdsp.c Paul Davis
* Marcus Andersson
* Thomas Charbonnel
* Florian Faber
* Adrian Knoth
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/math64.h>
#include <linux/io.h>
#include <linux/version.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/info.h>
#include <sound/asoundef.h>
#include <sound/rawmidi.h>
#include <sound/hwdep.h>
#include <sound/initval.h>
#include "madifx.h"
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
/* Enable this card */
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
module_param_array(index, int, NULL, 0444);
MODULE_PARM_DESC(index, "Index value for RME MADIFX interface.");
module_param_array(id, charp, NULL, 0444);
MODULE_PARM_DESC(id, "ID string for RME MADIFX interface.");
module_param_array(enable, bool, NULL, 0444);
MODULE_PARM_DESC(enable, "Enable/disable specific MADIFX soundcards.");
MODULE_AUTHOR
(
"Adrian Knoth <[email protected]>"
);
MODULE_DESCRIPTION("RME MADIFX");
MODULE_LICENSE("GPL");
/* --- Write registers. ---
These are defined as byte-offsets from the iobase value. */
#define MADIFX_CONTROL_REG (0*4)
#define MADIFX_IRQ_ACK (3*4)
#define MADIFX_FREQ_REG (1*4)
#define MADIFX_SETTINGS_REG (2*4)
#define MADIFX_START_LEVEL (6*4)
#define MADIFX_midi_out0_data (8*4)
#define MADIFX_midi_out1_data (9*4)
#define MADIFX_midi_out2_data (10*4)
#define MADIFX_midi_out3_data (11*4)
#define MADIFX_ENABLE_OUTPUT (64*4)
#define MADIFX_ENABLE_INPUT (96*4)
#define MADIFX_MIXER_LIST_VOL (16384*4)
#define MADIFX_MIXER_LIST_CH (20480*4)
#define MADIFX_WR_OUTPUT_GAIN ((24576+256)*4)
#define MADIFX_SAMPLE_FRAMES_PER_BUFFER 8192
#define MADIFX_PAGE_ADDRESS_LIST (8192*4)
/* page table size in entries, multiply by 4 to get byte offset */
#define MADIFX_MAX_PAGE_TABLE_SIZE 4096
#define MADIFX_LPTI_HMFX (MADIFX_MAX_PAGE_TABLE_SIZE/2+25*32768*8/4096)
#define MADIFX_LPTI_MFXT (MADIFX_MAX_PAGE_TABLE_SIZE/2+26*32768*8/4096)
#define HDSPM_MADI_mixerBase 32768 /* 32768-65535 for 2x64x64 Fader */
#define HDSPM_MATRIX_MIXER_SIZE 8192 /* = 2*64*64 * 4 Byte => 32kB */
/* --- Read registers. ---
These are defined as byte-offsets from the iobase value */
#define MADIFX_RD_STATUS (0*4)
#define MADIFX_RD_INP_STATUS (1*4)
#define MADIFX_RD_INP_FREQ (2*4)
#define MADIFX_RD_PLL_FREQ (3*4)
/* MADIFX_RD_VERSION is encoded as
* card_type(7..0) & "0000" & build(19..0)
*/
#define MADIFX_RD_VERSION (4*4)
#define MADIFX_RD_FLASH (5*4)
#define MADIFX_RD_BARCODE0 (6*4)
#define MADIFX_RD_BARCODE1 (7*4)
#define MADIFX_RD_DSP_DATA (8*4)
#define MADIFX_RD_DSP_STATUS (9*4)
#define MADIFX_midi_in0_data (12*4)
#define MADIFX_midi_in1_data (13*4)
#define MADIFX_midi_in2_data (14*4)
#define MADIFX_midi_in3_data (15*4)
#define MADIFX_midi_out0_status (16*4)
#define MADIFX_midi_out1_status (17*4)
#define MADIFX_midi_out2_status (18*4)
#define MADIFX_midi_out3_status (19*4)
#define MADIFX_midi_in0_status (20*4)
#define MADIFX_midi_in1_status (21*4)
#define MADIFX_midi_in2_status (22*4)
#define MADIFX_midi_in3_status (23*4)
/* input status */
#define MADIFX_madi1_lock 0x0001
#define MADIFX_madi2_lock 0x0002
#define MADIFX_madi3_lock 0x0004
#define MADIFX_aes_lock 0x0008
#define MADIFX_word_lock 0x0010
#define MADIFX_madi1_sync 0x0020
#define MADIFX_madi2_sync 0x0040
#define MADIFX_madi3_sync 0x0080
#define MADIFX_word_sync 0x0100
#define MADIFX_aes_sync 0x0200
#define MADIFX_madi1_rx_64ch 0x0400
#define MADIFX_madi2_rx_64ch 0x0800
#define MADIFX_madi3_rx_64ch 0x1000
#define MADIFX_SelSyncRef0 0x2000
#define MADIFX_SelSyncRef1 0x4000
#define MADIFX_SelSyncRef2 0x8000
#define MADIFX_MADIInput0 0x10000
#define MADIFX_MADIInput1 0x20000
#define MADIFX_redundancy_rb 0x40000
#define MADIFX_mirror_out_rb 0x80000
#define MADIFX_sync_in_lock 0x100000
#define MADIFX_sync_in_sync 0x200000
/* control register bits */
#define MADIFX_START 0x00000001
#define MADIFX_freq0 0x00000002
#define MADIFX_freq1 0x00000004
#define MADIFX_freq2 0x00000008
#define MADIFX_freq3 0x00000010
#define MADIFX_BUF_SIZ_0 0x00000020
#define MADIFX_BUF_SIZ_1 0x00000040
#define MADIFX_BUF_SIZ_2 0x00000080
#define MADIFX_LAT_0 0x00000100
#define MADIFX_LAT_1 0x00000200
#define MADIFX_LAT_2 0x00000400
#define MADIFX_LAT_3 0x00000800
#define MADIFX_IE_AUDIO 0x00001000
#define MADIFX_IEN0 0x00002000
#define MADIFX_IEN1 0x00004000
#define MADIFX_IEN2 0x00008000
#define MADIFX_IEN3 0x00010000
#define MADIFX_float_format 0x00020000
#define MADIFX_CLR_TMS 0x00040000
#define MADIFX_Dolby 0x00080000
#define MADIFX_kFrequencyMask \
(MADIFX_freq0 + MADIFX_freq1 + MADIFX_freq2 + MADIFX_freq3)
#define MADIFX_kBufferPositionMask 0xFFF0
enum {
MADIFX_kFrequency32kHz = 0,
MADIFX_kFrequency44_1kHz = MADIFX_freq0,
MADIFX_kFrequency48kHz = MADIFX_freq1,
MADIFX_kFrequency64kHz = MADIFX_freq2 + 0,
MADIFX_kFrequency88_2kHz = MADIFX_freq2 + MADIFX_freq0,
MADIFX_kFrequency96kHz = MADIFX_freq2 + MADIFX_freq1,
MADIFX_kFrequency128kHz = MADIFX_freq3 + MADIFX_freq2 + 0,
MADIFX_kFrequency176_4kHz = MADIFX_freq3 + MADIFX_freq2 + MADIFX_freq0,
MADIFX_kFrequency192kHz = MADIFX_freq3 + MADIFX_freq2 + MADIFX_freq1
};
/* settings register bits */
#define MADIFX_SyncRef0 0x00000001
#define MADIFX_SyncRef1 0x00000002
#define MADIFX_SyncRef2 0x00000004
#define MADIFX_PRO 0x00000008
#define MADIFX_DSP_EN 0x00000010
#define MADIFX_WCK_TERM 0x00000020
#define MADIFX_WCK48 0x00000040
#define MADIFX_madi1_tx_64ch 0x00000080
#define MADIFX_madi2_tx_64ch 0x00000100
#define MADIFX_madi3_tx_64ch 0x00000200
#define MADIFX_madi1_smux 0x00000400
#define MADIFX_madi2_smux 0x00000800
#define MADIFX_madi3_smux 0x00001000
#define MADIFX_redundancy_mode 0x00002000
#define MADIFX_mirror_madi_out 0x00004000
#define MADIFX_SyncRefMask (MADIFX_SyncRef0 | MADIFX_SyncRef1 | MADIFX_SyncRef2)
/* input freq register bits */
#define MADIFX_madi1_freq0 0x00001
#define MADIFX_madi1_freq1 0x00002
#define MADIFX_madi1_freq2 0x00004
#define MADIFX_madi1_freq3 0x00008
#define MADIFX_madi2_freq0 0x00010
#define MADIFX_madi2_freq1 0x00020
#define MADIFX_madi2_freq2 0x00040
#define MADIFX_madi2_freq3 0x00080
#define MADIFX_madi3_freq0 0x00100
#define MADIFX_madi3_freq1 0x00200
#define MADIFX_madi3_freq2 0x00400
#define MADIFX_madi3_freq3 0x00800
#define MADIFX_aes_freq0 0x01000
#define MADIFX_aes_freq1 0x02000
#define MADIFX_aes_freq2 0x04000
#define MADIFX_aes_freq3 0x08000
#define MADIFX_word_freq0 0x10000
#define MADIFX_word_freq1 0x20000
#define MADIFX_word_freq2 0x40000
#define MADIFX_word_freq3 0x80000
#define MADIFX_sync_in_freq0 0x100000
#define MADIFX_sync_in_freq1 0x200000
#define MADIFX_sync_in_freq2 0x400000
#define MADIFX_sync_in_freq3 0x800000
/* Index to DMA level buffer in uint32_t units */
#define MADIFX_RD_RMS_IN (0*1)
#define MADIFX_RD_PEAK_IN (512*1)
#define MADIFX_RD_RMS_PLAY (1024*1)
#define MADIFX_RD_PEAK_PLAY (1536*1)
#define MADIFX_RD_RMS_OUT (2048*1)
#define MADIFX_RD_PEAK_OUT (2560*1)
#define MADIFX_RD_RMS_IN_PRE (3072*1)
#define MADIFX_RD_PEAK_IN_PRE (3584*1)
#define MADIFX_RD_RMS_OUT_PRE (4096*1)
#define MADIFX_RD_PEAK_OUT_PRE (4608*1)
/* MADIFX MIDI Interrupt enable */
#define MADIFX_IEN0 0x00002000
#define MADIFX_IEN1 0x00004000
#define MADIFX_IEN2 0x00008000
#define MADIFX_IEN3 0x00010000
/* status register, MIDI IRQ Pending */
#define MADIFX_mIRQ0 0x10000000
#define MADIFX_mIRQ1 0x20000000
#define MADIFX_mIRQ2 0x40000000
#define MADIFX_mIRQ3 0x80000000
/* --- bit helper defines */
#define MADIFX_LatencyMask (MADIFX_LAT_0|MADIFX_LAT_1|MADIFX_LAT_2|MADIFX_LAT_3)
#define madifx_encode_latency(x) (((x)<<8) & MADIFX_LatencyMask)
#define madifx_decode_latency(x) ((((x) & MADIFX_LatencyMask)>>8))
/* speemode is enum 0,1,2 for ss/ds/qs, so (1<<speedmode) returns 1, 2, 4. */
#define madifx_speed_multiplier(x) (1<<(x)->speedmode)
#define HDSPM_audioIRQPending (1<<0) /* IRQ is high and pending */
/* Mixer Values */
#define UNITY_GAIN 32768 /* = 65536/2 */
#define MINUS_INFINITY_GAIN 0
/* Number of channels for different Speed Modes */
#define MADIFX_SS_IN_CHANNELS 194
#define MADIFX_DS_IN_CHANNELS 98
#define MADIFX_QS_IN_CHANNELS 50
#define MADIFX_SS_OUT_CHANNELS 196
#define MADIFX_DS_OUT_CHANNELS 100
#define MADIFX_QS_OUT_CHANNELS 52
#define HDSPM_MADIFX_REV 213
/* speed factor modes */
#define HDSPM_SPEED_SINGLE 0
#define HDSPM_SPEED_DOUBLE 1
#define HDSPM_SPEED_QUAD 2
/* DMA buffers in byte; 8192 samples per channel, each 4 bytes wide */
#define NUM_INPUTS_S_MFXT (64*3+4)
#define NUM_OUTPUTS_S_MFXT (64*3+6)
#define INPUT_DMA_BUFFER_SIZE (NUM_INPUTS_S_MFXT*32768)
#define OUTPUT_DMA_BUFFER_SIZE (NUM_OUTPUTS_S_MFXT*32768)
/* names for speed modes */
static char *madifx_speed_names[] = { "single", "double", "quad" };
static const char *const texts_madifx_clock_source[] = {
"Internal",
"Word Clock", /* OSX driver has first AES, then WC, but real HW is
different */
"AES In",
"MADI 1 In",
"MADI 2 In",
"MADI 3 In",
"Sync In"
};
static const char *const texts_freq[] = {
"No Lock",
"32 kHz",
"44.1 kHz",
"48 kHz",
"64 kHz",
"88.2 kHz",
"96 kHz",
"128 kHz",
"176.4 kHz",
"192 kHz"
};
struct madifx_midi {
struct mfx *mfx;
int id;
struct snd_rawmidi *rmidi;
struct snd_rawmidi_substream *input;
struct snd_rawmidi_substream *output;
char istimer; /* timer in use */
struct timer_list timer;
spinlock_t lock;
int pending;
int dataIn;
int statusIn;
int dataOut;
int statusOut;
int ie;
int irq;
};
struct mfx {
spinlock_t lock;
/* only one playback and/or capture stream */
struct snd_pcm_substream *capture_substream;
struct snd_pcm_substream *playback_substream;
char *card_name; /* for procinfo */
unsigned short firmware_rev;
uint8_t io_type;
int monitor_outs; /* set up monitoring outs init flag */
u32 control_register; /* cached value */
u32 control2_register; /* cached value */
u32 settings_register;
struct madifx_midi midi[4];
struct work_struct midi_work;
size_t period_bytes;
unsigned char ss_in_channels;
unsigned char ds_in_channels;
unsigned char qs_in_channels;
unsigned char ss_out_channels;
unsigned char ds_out_channels;
unsigned char qs_out_channels;
unsigned char max_channels_in;
unsigned char max_channels_out;
char **port_names_in;
char **port_names_out;
char **port_names_in_ss, **port_names_in_ds, **port_names_in_qs;
char **port_names_out_ss, **port_names_out_ds, **port_names_out_qs;
unsigned char *playback_buffer; /* suitably aligned address */
unsigned char *capture_buffer; /* suitably aligned address */
u32 *level_buffer; /* suitably aligned address */
pid_t capture_pid; /* process id which uses capture */
pid_t playback_pid; /* process id which uses capture */
int running; /* running status */
int last_external_sample_rate; /* samplerate mystic ... */
int last_internal_sample_rate;
int system_sample_rate;
int dev; /* Hardware vars... */
int irq;
unsigned long port;
void __iomem *iobase;
int irq_count; /* for debug */
int midiPorts;
struct snd_card *card; /* one card */
struct snd_pcm *pcm; /* has one pcm */
struct snd_hwdep *hwdep; /* and a hwdep for additional ioctl */
struct pci_dev *pci; /* and an pci info */
/* Mixer vars */
/* full mixer accessible over mixer ioctl or hwdep-device */
struct madifx_newmixer *newmixer;
dma_addr_t *dmaPageTable;
const char *const *texts_clocksource;
int texts_clocksource_items;
cycles_t last_interrupt;
unsigned int serial;
int speedmode;
#ifdef CONFIG_SND_MADIFX_BROKEN
struct snd_dma_buffer dmaLevelBuffer;
struct madifx_level_buffer peak_rms;
#endif
};
static const struct pci_device_id snd_madifx_ids[] = {
{
.vendor = PCI_VENDOR_ID_XILINX,
.device = 0x3fc7,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
.class = 0,
.class_mask = 0,
.driver_data = 0},
{0,}
};
MODULE_DEVICE_TABLE(pci, snd_madifx_ids);
/* prototypes */
static int snd_madifx_create_alsa_devices(struct snd_card *card,
struct mfx *mfx);
static int snd_madifx_create_pcm(struct snd_card *card,
struct mfx *mfx);
static inline void snd_madifx_initialize_midi_flush(struct mfx *mfx);
static int madifx_external_freq_index(struct mfx *mfx,
enum madifx_syncsource port);
static int madifx_get_clock_select(struct mfx *mfx);
static int snd_madifx_set_defaults(struct mfx *mfx);
static int madifx_system_clock_mode(struct mfx *mfx);
static inline int HDSPM_bit2freq(int n)
{
static const int bit2freq_tab[] = {
0, 32000, 44100, 48000, 64000, 88200,
96000, 128000, 176400, 192000 };
if (n < 1 || n > 9)
return 0;
return bit2freq_tab[n];
}
/* Write/read to/from HDSPM with Adresses in Bytes
not words but only 32Bit writes are allowed */
static inline void madifx_write(struct mfx *mfx, unsigned int reg,
unsigned int val)
{
writel(val, mfx->iobase + reg);
}
static inline unsigned int madifx_read(struct mfx *mfx, unsigned int reg)
{
return readl(mfx->iobase + reg);
}
/* enable DMA for specific channels, now available for DSP-MADI */
static inline void snd_madifx_enable_in(struct mfx *mfx, int i, int v)
{
madifx_write(mfx, MADIFX_ENABLE_INPUT + (4 * i), v);
}
static inline void snd_madifx_enable_out(struct mfx *mfx, int i, int v)
{
madifx_write(mfx, MADIFX_ENABLE_OUTPUT + (4 * i), v);
}
/* check if same process is writing and reading */
static int snd_madifx_use_is_exclusive(struct mfx *mfx)
{
unsigned long flags;
int ret = 1;
spin_lock_irqsave(&mfx->lock, flags);
if ((mfx->playback_pid != mfx->capture_pid) &&
(mfx->playback_pid >= 0) && (mfx->capture_pid >= 0)) {
ret = 0;
}
spin_unlock_irqrestore(&mfx->lock, flags);
return ret;
}
/* return latency in samples per period */
static int madifx_get_latency(struct mfx *mfx)
{
int n;
n = madifx_decode_latency(mfx->control_register);
return 1 << (n + 5);
}
/* Latency function */
static inline void madifx_compute_period_size(struct mfx *mfx)
{
mfx->period_bytes = 4 * madifx_get_latency(mfx);
}
/* position of the hardware pointer in the buffer */
static snd_pcm_uframes_t madifx_hw_pointer(struct mfx *mfx)
{
u32 position;
position = madifx_read(mfx, MADIFX_RD_STATUS);
position &= MADIFX_kBufferPositionMask;
position >>= 4;
position *= 4;
#if 0
position -= 4; /* safety offset */
#endif
position &= (MADIFX_SAMPLE_FRAMES_PER_BUFFER-1);
return position;
}
static inline void madifx_start_audio(struct mfx *s)
{
s->control_register |= (MADIFX_IE_AUDIO | MADIFX_START);
madifx_write(s, MADIFX_CONTROL_REG, s->control_register);
}
static inline void madifx_stop_audio(struct mfx *s)
{
s->control_register &= ~(MADIFX_START | MADIFX_IE_AUDIO);
madifx_write(s, MADIFX_CONTROL_REG, s->control_register);
}
static void madifx_silence_playback(struct mfx *mfx)
{
void *buf = mfx->playback_buffer;
if (!buf)
return;
memset(buf, 0, OUTPUT_DMA_BUFFER_SIZE);
}
static int madifx_set_interrupt_interval(struct mfx *s, unsigned int frames)
{
int n;
spin_lock_irq(&s->lock);
/* FIXME: We have four bits, but we don't know the mapping to frames,
* yet.
* LAT_3 is 2048
* LAT_2 is 128
* LAT_1 is 32
* LAT_0 is 16
*
* 2^(n+4), encode n to 4 bits
*/
n = 0;
frames >>= 6;
while (frames) {
n++;
frames >>= 1;
}
s->control_register &= ~MADIFX_LatencyMask;
s->control_register |= madifx_encode_latency(n);
madifx_write(s, MADIFX_CONTROL_REG, s->control_register);
madifx_compute_period_size(s);
spin_unlock_irq(&s->lock);
return 0;
}
static u64 madifx_calc_dds_value(struct mfx *mfx, u64 period)
{
u64 freq_const;
if (period == 0)
return 0;
switch (mfx->io_type) {
case MADIFX:
freq_const = 131072000000000ULL;
break;
default:
snd_BUG();
return 0;
}
return div_u64(freq_const, period);
}
static void madifx_set_dds_value(struct mfx *mfx, int rate)
{
u64 n;
if (rate >= 112000)
rate /= 4;
else if (rate >= 56000)
rate /= 2;
switch (mfx->io_type) {
case MADIFX:
n = 131072000000000ULL; /* 125 MHz */
break;
default:
snd_BUG();
return;
}
n = div_u64(n, rate);
/* n should be less than 2^32 for being written to FREQ register */
snd_BUG_ON(n >> 32);
madifx_write(mfx, MADIFX_FREQ_REG, (u32)n);
}
static int madifx_get_external_rate(struct mfx *mfx)
{
int current_clock = madifx_get_clock_select(mfx);
/* map to enum madifx_syncsource */
switch (current_clock) {
case 0:
case 6:
/* Master or Sync-In */
break;
case 1:
current_clock = syncsource_wc;
break;
case 2:
current_clock = syncsource_aes;
break;
case 3:
case 4:
case 5:
/* MADI1 == 3, MADI2 == 4, MADI3 == 5 map to
* MADI1 == 0, MADI2 = 1, MADI3 == 2
*/
current_clock -= 3;
break;
default:
dev_err(mfx->card->dev,
"MADIFX: Unknown clock source\n");
return 0;
}
return HDSPM_bit2freq(madifx_external_freq_index(mfx, current_clock));
}
/* dummy set rate lets see what happens */
static int madifx_set_rate(struct mfx *mfx, int rate, int called_internally)
{
int current_rate;
int rate_bits;
int not_set = 0;
int current_speed, target_speed;
/* ASSUMPTION: mfx->lock is either set, or there is no need for
it (e.g. during module initialization).
*/
if (1 == madifx_system_clock_mode(mfx)) {
/* SLAVE --- */
if (called_internally) {
/* request from ctl or card initialization
just make a warning an remember setting
for future master mode switching */
dev_warn(mfx->card->dev,
"MADIFX: Warning: device is not running as a clock master.\n");
not_set = 1;
} else {
int external_freq = madifx_get_external_rate(mfx);
if (rate != external_freq) {
dev_warn(mfx->card->dev,
"MADIFX: Warning: Requested rate %d doesn't match external rate %d\n",
rate, external_freq);
not_set = 1;
}
}
}
current_rate = mfx->system_sample_rate;
/* Changing between Singe, Double and Quad speed is not
allowed if any substreams are open. This is because such a change
causes a shift in the location of the DMA buffers and a reduction
in the number of available buffers.
Note that a similar but essentially insoluble problem exists for
externally-driven rate changes. All we can do is to flag rate
changes in the read/write routines.
*/
if (current_rate <= 56000)
current_speed = HDSPM_SPEED_SINGLE;
else if (current_rate <= 96000)
current_speed = HDSPM_SPEED_DOUBLE;
else
current_speed = HDSPM_SPEED_QUAD;
if (rate <= 48000)
target_speed = HDSPM_SPEED_SINGLE;
else if (rate <= 112000)
target_speed = HDSPM_SPEED_DOUBLE;
else
target_speed = HDSPM_SPEED_QUAD;
switch (rate) {
case 32000:
rate_bits = MADIFX_kFrequency32kHz;
break;
case 44100:
rate_bits = MADIFX_kFrequency44_1kHz;
break;
case 48000:
rate_bits = MADIFX_kFrequency48kHz;
break;
case 64000:
rate_bits = MADIFX_kFrequency64kHz;
break;
case 88200:
rate_bits = MADIFX_kFrequency88_2kHz;
break;
case 96000:
rate_bits = MADIFX_kFrequency96kHz;
break;
case 128000:
rate_bits = MADIFX_kFrequency128kHz;
break;
case 176400:
rate_bits = MADIFX_kFrequency176_4kHz;
break;
case 192000:
rate_bits = MADIFX_kFrequency192kHz;
break;
default:
return -EINVAL;
}
if (current_speed != target_speed
&& (mfx->capture_pid >= 0 || mfx->playback_pid >= 0)) {
dev_err
(mfx->card->dev,
"MADIFX: cannot change from %s speed to %s speed mode (capture PID = %d, playback PID = %d)\n",
madifx_speed_names[current_speed],
madifx_speed_names[target_speed],
mfx->capture_pid, mfx->playback_pid);
return -EBUSY;
}
madifx_set_dds_value(mfx, rate);
mfx->control_register &= ~MADIFX_kFrequencyMask;
mfx->control_register |= rate_bits;
madifx_write(mfx, MADIFX_CONTROL_REG, mfx->control_register);
mfx->system_sample_rate = rate;
if (rate <= 56000) {
mfx->max_channels_in = mfx->ss_in_channels;
mfx->max_channels_out = mfx->ss_out_channels;
mfx->port_names_in = mfx->port_names_in_ss;
mfx->port_names_out = mfx->port_names_out_ss;
mfx->speedmode = ss;
} else if (rate <= 112000) {
mfx->max_channels_in = mfx->ds_in_channels;
mfx->max_channels_out = mfx->ds_out_channels;
mfx->port_names_in = mfx->port_names_in_ds;
mfx->port_names_out = mfx->port_names_out_ds;
mfx->speedmode = ds;
} else {
mfx->max_channels_in = mfx->qs_in_channels;
mfx->max_channels_out = mfx->qs_out_channels;
mfx->port_names_in = mfx->port_names_in_qs;
mfx->port_names_out = mfx->port_names_out_qs;
mfx->speedmode = qs;
}
if (not_set != 0)
return -1;
return 0;
}
/*----------------------------------------------------------------------------
MIDI
----------------------------------------------------------------------------*/
static inline unsigned char snd_madifx_midi_read_byte(struct mfx *mfx,
int id)
{
/* the hardware already does the relevant bit-mask with 0xff */
return madifx_read(mfx, mfx->midi[id].dataIn);
}
static inline void snd_madifx_midi_write_byte(struct mfx *mfx, int id,
int val)
{
/* the hardware already does the relevant bit-mask with 0xff */
return madifx_write(mfx, mfx->midi[id].dataOut, val);
}
static inline int snd_madifx_midi_input_available(struct mfx *mfx, int id)
{
return madifx_read(mfx, mfx->midi[id].statusIn) & 0xFF;
}
static inline int snd_madifx_midi_output_possible(struct mfx *mfx, int id)
{
int fifo_bytes_used;
fifo_bytes_used = madifx_read(mfx, mfx->midi[id].statusOut) & 0xFF;
if (fifo_bytes_used < 128)
return 128 - fifo_bytes_used;
else
return 0;
}
static void snd_madifx_flush_midi_input(struct mfx *mfx, int id)
{
while (snd_madifx_midi_input_available(mfx, id))
snd_madifx_midi_read_byte(mfx, id);
}
static int snd_madifx_midi_output_write(struct madifx_midi *hmidi)
{
unsigned long flags;
int n_pending;
int to_write;
int i;
unsigned char buf[128];
/* Output is not interrupt driven */
spin_lock_irqsave(&hmidi->lock, flags);
if (hmidi->output &&
!snd_rawmidi_transmit_empty(hmidi->output)) {
n_pending = snd_madifx_midi_output_possible(hmidi->mfx,
hmidi->id);
if (n_pending > 0) {
if (n_pending > (int)sizeof(buf))
n_pending = sizeof(buf);
to_write = snd_rawmidi_transmit(hmidi->output, buf,
n_pending);
if (to_write > 0) {
for (i = 0; i < to_write; ++i)
snd_madifx_midi_write_byte(hmidi->mfx,
hmidi->id,
buf[i]);
}
}
}
spin_unlock_irqrestore(&hmidi->lock, flags);
return 0;
}
static int snd_madifx_midi_input_read(struct madifx_midi *hmidi)
{
unsigned char buf[128]; /* this buffer is designed to match the MIDI
* input FIFO size
*/
unsigned long flags;
int n_pending;
int i;
spin_lock_irqsave(&hmidi->lock, flags);
n_pending = snd_madifx_midi_input_available(hmidi->mfx, hmidi->id);
if (n_pending > 0) {
if (hmidi->input) {
if (n_pending > (int)sizeof(buf))
n_pending = sizeof(buf);
for (i = 0; i < n_pending; ++i)
buf[i] = snd_madifx_midi_read_byte(hmidi->mfx,
hmidi->id);
if (n_pending)
snd_rawmidi_receive(hmidi->input, buf,
n_pending);
} else {
/* flush the MIDI input FIFO */
while (n_pending--)
snd_madifx_midi_read_byte(hmidi->mfx,
hmidi->id);
}
}
hmidi->pending = 0;
spin_unlock_irqrestore(&hmidi->lock, flags);
spin_lock_irqsave(&hmidi->mfx->lock, flags);
hmidi->mfx->control_register |= hmidi->ie;
madifx_write(hmidi->mfx, MADIFX_CONTROL_REG,
hmidi->mfx->control_register);
spin_unlock_irqrestore(&hmidi->mfx->lock, flags);
return snd_madifx_midi_output_write(hmidi);
}
static void
snd_madifx_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
{
struct mfx *mfx;
struct madifx_midi *hmidi;
unsigned long flags;
hmidi = substream->rmidi->private_data;
mfx = hmidi->mfx;
spin_lock_irqsave(&mfx->lock, flags);
if (up) {
if (!(mfx->control_register & hmidi->ie)) {
snd_madifx_flush_midi_input(mfx, hmidi->id);
mfx->control_register |= hmidi->ie;
}
} else {
mfx->control_register &= ~hmidi->ie;
}
madifx_write(mfx, MADIFX_CONTROL_REG, mfx->control_register);
spin_unlock_irqrestore(&mfx->lock, flags);
}
static void snd_madifx_midi_output_timer(struct timer_list *t)
{
struct madifx_midi *hmidi = from_timer(hmidi, t, timer);
unsigned long flags;
snd_madifx_midi_output_write(hmidi);
spin_lock_irqsave(&hmidi->lock, flags);
/* this does not bump hmidi->istimer, because the
kernel automatically removed the timer when it
expired, and we are now adding it back, thus
leaving istimer wherever it was set before.
*/
if (hmidi->istimer)
mod_timer(&hmidi->timer, 1 + jiffies);
spin_unlock_irqrestore(&hmidi->lock, flags);
}
static void
snd_madifx_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
{
struct madifx_midi *hmidi;
unsigned long flags;
hmidi = substream->rmidi->private_data;
spin_lock_irqsave(&hmidi->lock, flags);
if (up) {
if (!hmidi->istimer) {