From 651635b935ccbe7258cb2a247bb9ac43292545d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Arthur=20de=20Ara=C3=BAjo=20Farias?= Date: Sat, 23 Sep 2023 12:01:57 +0200 Subject: [PATCH] Fixing __FPU_ENABLED redefinition warning when compiling --- .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f722xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f723xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f730xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f732xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f733xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f745xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f746xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f750xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f756xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f765xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f767xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f769xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f777xx.h | 2 ++ .../TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f779xx.h | 2 ++ .../Legacy/{stm32f7xx_hal_can.c => stm32f7xx_hal_can_legacy.c} | 0 .../Legacy/{stm32f7xx_hal_eth.c => stm32f7xx_hal_eth_legacy.c} | 0 16 files changed, 28 insertions(+) rename targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/STM32F7xx_HAL_Driver/Legacy/{stm32f7xx_hal_can.c => stm32f7xx_hal_can_legacy.c} (100%) rename targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/STM32F7xx_HAL_Driver/Legacy/{stm32f7xx_hal_eth.c => stm32f7xx_hal_eth_legacy.c} (100%) diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f722xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f722xx.h index a40bf9c84a7c..3481d4386eec 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f722xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f722xx.h @@ -155,7 +155,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f723xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f723xx.h index 2d4dd943a614..e1c338f45b61 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f723xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f723xx.h @@ -155,7 +155,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f730xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f730xx.h index a4052f8bd891..310201e7782e 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f730xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f730xx.h @@ -156,7 +156,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f732xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f732xx.h index f6631b83a431..b26edbf57d08 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f732xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f732xx.h @@ -156,7 +156,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f733xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f733xx.h index 2b086a0bcd63..cbac2ca89d1e 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f733xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f733xx.h @@ -156,7 +156,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f745xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f745xx.h index 71d94e7ed8c3..1fa8658c753f 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f745xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f745xx.h @@ -165,7 +165,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f746xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f746xx.h index ae1298c7e5ab..b0e09771344d 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f746xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f746xx.h @@ -167,7 +167,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f750xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f750xx.h index 407c6dbfb0f9..be7d98485e6b 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f750xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f750xx.h @@ -168,7 +168,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f756xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f756xx.h index 2ae1238670a3..cef2175b75f5 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f756xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f756xx.h @@ -168,7 +168,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f765xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f765xx.h index 58e562cb25b6..b4f452b7ca97 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f765xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f765xx.h @@ -175,7 +175,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f767xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f767xx.h index 0c22653066f0..a95d6ac29a88 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f767xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f767xx.h @@ -178,7 +178,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f769xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f769xx.h index c2ce9d447595..bb87ee85face 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f769xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f769xx.h @@ -179,7 +179,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f777xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f777xx.h index d4c2783fada6..555ce18c8c86 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f777xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f777xx.h @@ -179,7 +179,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f779xx.h b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f779xx.h index 5887bac7e2db..de1fd8e0a9df 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f779xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/CMSIS/stm32f779xx.h @@ -180,7 +180,9 @@ typedef enum #define __MPU_PRESENT 1U /*!< CM7 provides an MPU */ #define __NVIC_PRIO_BITS 4U /*!< CM7 uses 4 Bits for the Priority Levels */ #define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#ifndef __FPU_PRESENT #define __FPU_PRESENT 1U /*!< FPU present */ +#endif #define __ICACHE_PRESENT 1U /*!< CM7 instruction cache present */ #define __DCACHE_PRESENT 1U /*!< CM7 data cache present */ #include "core_cm7.h" /*!< Cortex-M7 processor and core peripherals */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/STM32F7xx_HAL_Driver/Legacy/stm32f7xx_hal_can.c b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/STM32F7xx_HAL_Driver/Legacy/stm32f7xx_hal_can_legacy.c similarity index 100% rename from targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/STM32F7xx_HAL_Driver/Legacy/stm32f7xx_hal_can.c rename to targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/STM32F7xx_HAL_Driver/Legacy/stm32f7xx_hal_can_legacy.c diff --git a/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/STM32F7xx_HAL_Driver/Legacy/stm32f7xx_hal_eth.c b/targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/STM32F7xx_HAL_Driver/Legacy/stm32f7xx_hal_eth_legacy.c similarity index 100% rename from targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/STM32F7xx_HAL_Driver/Legacy/stm32f7xx_hal_eth.c rename to targets/TARGET_STM/TARGET_STM32F7/STM32Cube_FW/STM32F7xx_HAL_Driver/Legacy/stm32f7xx_hal_eth_legacy.c